1 /* SPDX-License-Identifier: GPL-2.0 */
2 /******************************************************************************
3 *
4 * Copyright(c) 2007 - 2017 Realtek Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 *****************************************************************************/
16 #define _HCI_HAL_INIT_C_
17
18 #include <drv_types.h>
19 #include <rtl8188e_hal.h>
20 #include "hal_com_h2c.h"
21
22 #ifndef CONFIG_USB_HCI
23
24 #error "CONFIG_USB_HCI shall be on!\n"
25
26 #endif
27
28
29 static void
_ConfigNormalChipOutEP_8188E(PADAPTER pAdapter,u8 NumOutPipe)30 _ConfigNormalChipOutEP_8188E(
31 PADAPTER pAdapter,
32 u8 NumOutPipe
33 )
34 {
35 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
36
37 switch (NumOutPipe) {
38 case 3:
39 pHalData->OutEpQueueSel = TX_SELE_HQ | TX_SELE_LQ | TX_SELE_NQ;
40 pHalData->OutEpNumber = 3;
41 break;
42 case 2:
43 pHalData->OutEpQueueSel = TX_SELE_HQ | TX_SELE_NQ;
44 pHalData->OutEpNumber = 2;
45 break;
46 case 1:
47 pHalData->OutEpQueueSel = TX_SELE_HQ;
48 pHalData->OutEpNumber = 1;
49 break;
50 default:
51 break;
52
53 }
54 RTW_INFO("%s OutEpQueueSel(0x%02x), OutEpNumber(%d)\n", __FUNCTION__, pHalData->OutEpQueueSel, pHalData->OutEpNumber);
55
56 }
57
HalUsbSetQueuePipeMapping8188EUsb(PADAPTER pAdapter,u8 NumInPipe,u8 NumOutPipe)58 static BOOLEAN HalUsbSetQueuePipeMapping8188EUsb(
59 PADAPTER pAdapter,
60 u8 NumInPipe,
61 u8 NumOutPipe
62 )
63 {
64 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
65 BOOLEAN result = _FALSE;
66
67 _ConfigNormalChipOutEP_8188E(pAdapter, NumOutPipe);
68
69 /* Normal chip with one IN and one OUT doesn't have interrupt IN EP. */
70 if (1 == pHalData->OutEpNumber) {
71 if (1 != NumInPipe)
72 return result;
73 }
74
75 /* All config other than above support one Bulk IN and one Interrupt IN. */
76 /* if(2 != NumInPipe){ */
77 /* return result; */
78 /* } */
79
80 result = Hal_MappingOutPipe(pAdapter, NumOutPipe);
81
82 return result;
83
84 }
85
rtl8188eu_interface_configure(_adapter * padapter)86 void rtl8188eu_interface_configure(_adapter *padapter)
87 {
88 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
89 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
90 struct registry_priv *registry_par = &padapter->registrypriv;
91
92 if (IS_HIGH_SPEED_USB(padapter)) {
93 pHalData->UsbBulkOutSize = USB_HIGH_SPEED_BULK_SIZE;/* 512 bytes */
94 } else {
95 pHalData->UsbBulkOutSize = USB_FULL_SPEED_BULK_SIZE;/* 64 bytes */
96 }
97
98 pHalData->interfaceIndex = pdvobjpriv->InterfaceNumber;
99
100 #ifdef CONFIG_USB_TX_AGGREGATION
101 pHalData->UsbTxAggMode = 1;
102 pHalData->UsbTxAggDescNum = 0x1; /* only 4 bits */
103 #endif
104
105 #ifdef CONFIG_USB_RX_AGGREGATION
106 pHalData->rxagg_mode = registry_par->usb_rxagg_mode;
107
108 if ((pHalData->rxagg_mode != RX_AGG_DMA) && (pHalData->rxagg_mode != RX_AGG_USB))
109 pHalData->rxagg_mode = RX_AGG_DMA;
110
111 if (pHalData->rxagg_mode == RX_AGG_DMA) {
112 pHalData->rxagg_dma_size = 48; /* uint: 128b, 0x0A = 10 = MAX_RX_DMA_BUFFER_SIZE/2/pHalData->UsbBulkOutSize */
113 pHalData->rxagg_dma_timeout = 0x4; /* 6, absolute time = 34ms/(2^6) */
114 } else if (pHalData->rxagg_mode == RX_AGG_USB) {
115 pHalData->rxagg_usb_size = 16; /* unit: 512b */
116 pHalData->rxagg_usb_timeout = 0x6;
117 }
118 #endif
119
120 HalUsbSetQueuePipeMapping8188EUsb(padapter,
121 pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes);
122
123 }
124
_InitPowerOn_8188EU(_adapter * padapter)125 static u32 _InitPowerOn_8188EU(_adapter *padapter)
126 {
127 u16 value16;
128 /* HW Power on sequence */
129 u8 bMacPwrCtrlOn = _FALSE;
130
131
132 rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn);
133 if (bMacPwrCtrlOn == _TRUE)
134 return _SUCCESS;
135
136 if (!HalPwrSeqCmdParsing(padapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8188E_NIC_PWR_ON_FLOW)) {
137 RTW_ERR("%s: run power on flow fail\n", __func__);
138 return _FAIL;
139 }
140
141 /* Enable MAC DMA/WMAC/SCHEDULE/SEC block */
142 /* Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */
143 rtw_write16(padapter, REG_CR, 0x00); /* suggseted by zhouzhou, by page, 20111230 */
144
145
146 /* Enable MAC DMA/WMAC/SCHEDULE/SEC block */
147 value16 = rtw_read16(padapter, REG_CR);
148 value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN
149 | PROTOCOL_EN | SCHEDULE_EN | ENSEC | CALTMR_EN);
150 /* for SDIO - Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */
151
152 rtw_write16(padapter, REG_CR, value16);
153
154 bMacPwrCtrlOn = _TRUE;
155 rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn);
156
157 return _SUCCESS;
158
159 }
160
161 #ifdef CONFIG_BT_COEXIST
_InitBTCoexist(_adapter * padapter)162 static void _InitBTCoexist(_adapter *padapter)
163 {
164 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
165 struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist);
166 u8 u1Tmp;
167
168 if (pbtpriv->BT_Coexist && pbtpriv->BT_CoexistType == BT_CSR_BC4) {
169
170 /* #if MP_DRIVER != 1 */
171 if (padapter->registrypriv.mp_mode == 0) {
172 if (pbtpriv->BT_Ant_isolation) {
173 rtw_write8(padapter, REG_GPIO_MUXCFG, 0xa0);
174 RTW_INFO("BT write 0x%x = 0x%x\n", REG_GPIO_MUXCFG, 0xa0);
175 }
176 }
177 /* #endif */
178
179 u1Tmp = rtw_read8(padapter, 0x4fd) & BIT0;
180 u1Tmp = u1Tmp |
181 ((pbtpriv->BT_Ant_isolation == 1) ? 0 : BIT1) |
182 ((pbtpriv->BT_Service == BT_SCO) ? 0 : BIT2);
183 rtw_write8(padapter, 0x4fd, u1Tmp);
184 RTW_INFO("BT write 0x%x = 0x%x for non-isolation\n", 0x4fd, u1Tmp);
185
186
187 rtw_write32(padapter, REG_BT_COEX_TABLE + 4, 0xaaaa9aaa);
188 RTW_INFO("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE + 4, 0xaaaa9aaa);
189
190 rtw_write32(padapter, REG_BT_COEX_TABLE + 8, 0xffbd0040);
191 RTW_INFO("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE + 8, 0xffbd0040);
192
193 rtw_write32(padapter, REG_BT_COEX_TABLE + 0xc, 0x40000010);
194 RTW_INFO("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE + 0xc, 0x40000010);
195
196 /* Config to 1T1R */
197 u1Tmp = rtw_read8(padapter, rOFDM0_TRxPathEnable);
198 u1Tmp &= ~(BIT1);
199 rtw_write8(padapter, rOFDM0_TRxPathEnable, u1Tmp);
200 RTW_INFO("BT write 0xC04 = 0x%x\n", u1Tmp);
201
202 u1Tmp = rtw_read8(padapter, rOFDM1_TRxPathEnable);
203 u1Tmp &= ~(BIT1);
204 rtw_write8(padapter, rOFDM1_TRxPathEnable, u1Tmp);
205 RTW_INFO("BT write 0xD04 = 0x%x\n", u1Tmp);
206
207 }
208 }
209 #endif
210
211
212
213 /* ---------------------------------------------------------------
214 *
215 * MAC init functions
216 *
217 * --------------------------------------------------------------- */
218
219 /* Shall USB interface init this? */
220 static void
_InitInterrupt(PADAPTER Adapter)221 _InitInterrupt(
222 PADAPTER Adapter
223 )
224 {
225 u32 imr, imr_ex;
226 u8 usb_opt;
227 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
228
229 #ifdef CONFIG_USB_INTERRUPT_IN_PIPE
230 struct dvobj_priv *pdev = adapter_to_dvobj(Adapter);
231 #endif
232
233 /* HISR write one to clear */
234 rtw_write32(Adapter, REG_HISR_88E, 0xFFFFFFFF);
235 /* HIMR - */
236 imr = IMR_PSTIMEOUT_88E | IMR_TBDER_88E | IMR_CPWM_88E | IMR_CPWM2_88E ;
237 rtw_write32(Adapter, REG_HIMR_88E, imr);
238 pHalData->IntrMask[0] = imr;
239
240 imr_ex = IMR_TXERR_88E | IMR_RXERR_88E | IMR_TXFOVW_88E | IMR_RXFOVW_88E;
241 rtw_write32(Adapter, REG_HIMRE_88E, imr_ex);
242 pHalData->IntrMask[1] = imr_ex;
243
244 #ifdef CONFIG_SUPPORT_USB_INT
245 /* REG_USB_SPECIAL_OPTION - BIT(4) */
246 /* 0; Use interrupt endpoint to upload interrupt pkt */
247 /* 1; Use bulk endpoint to upload interrupt pkt, */
248 usb_opt = rtw_read8(Adapter, REG_USB_SPECIAL_OPTION);
249
250 if ((IS_FULL_SPEED_USB(Adapter))
251 #ifdef CONFIG_USB_INTERRUPT_IN_PIPE
252 || (pdev->RtInPipe[REALTEK_USB_IN_INT_EP_IDX] == 0x05)
253 #endif
254 )
255 usb_opt = usb_opt & (~INT_BULK_SEL);
256 else
257 usb_opt = usb_opt | (INT_BULK_SEL);
258
259 rtw_write8(Adapter, REG_USB_SPECIAL_OPTION, usb_opt);
260
261 #endif/* CONFIG_SUPPORT_USB_INT */
262
263 }
264
265
266 static void
_InitQueueReservedPage(PADAPTER Adapter)267 _InitQueueReservedPage(
268 PADAPTER Adapter
269 )
270 {
271 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
272 struct registry_priv *pregistrypriv = &Adapter->registrypriv;
273 u32 outEPNum = (u32)pHalData->OutEpNumber;
274 u32 numHQ = 0;
275 u32 numLQ = 0;
276 u32 numNQ = 0;
277 u32 numPubQ = 0x00;
278 u32 value32;
279 u8 value8;
280 BOOLEAN bWiFiConfig = pregistrypriv->wifi_spec;
281
282 if (bWiFiConfig || pregistrypriv->qos_opt_enable) {
283 if (pHalData->OutEpQueueSel & TX_SELE_HQ)
284 numHQ = WMM_NORMAL_PAGE_NUM_HPQ_88E;
285
286 if (pHalData->OutEpQueueSel & TX_SELE_LQ)
287 numLQ = WMM_NORMAL_PAGE_NUM_LPQ_88E;
288
289 /* NOTE: This step shall be proceed before writting REG_RQPN. */
290 if (pHalData->OutEpQueueSel & TX_SELE_NQ)
291 numNQ = WMM_NORMAL_PAGE_NUM_NPQ_88E;
292 } else {
293 if (pHalData->OutEpQueueSel & TX_SELE_HQ)
294 numHQ = NORMAL_PAGE_NUM_HPQ_88E;
295
296 if (pHalData->OutEpQueueSel & TX_SELE_LQ)
297 numLQ = NORMAL_PAGE_NUM_LPQ_88E;
298
299 /* NOTE: This step shall be proceed before writting REG_RQPN. */
300 if (pHalData->OutEpQueueSel & TX_SELE_NQ)
301 numNQ = NORMAL_PAGE_NUM_NPQ_88E;
302 }
303
304 value8 = (u8)_NPQ(numNQ);
305 rtw_write8(Adapter, REG_RQPN_NPQ, value8);
306
307 numPubQ = TX_TOTAL_PAGE_NUMBER_88E(Adapter) - numHQ - numLQ - numNQ;
308
309 /* TX DMA */
310 value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN;
311 rtw_write32(Adapter, REG_RQPN, value32);
312 }
313
314 static void
_InitTxBufferBoundary(PADAPTER Adapter,u8 txpktbuf_bndy)315 _InitTxBufferBoundary(
316 PADAPTER Adapter,
317 u8 txpktbuf_bndy
318 )
319 {
320 struct registry_priv *pregistrypriv = &Adapter->registrypriv;
321 /* HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); */
322
323 /* u16 txdmactrl; */
324
325 rtw_write8(Adapter, REG_BCNQ_BDNY, txpktbuf_bndy);
326 rtw_write8(Adapter, REG_MGQ_BDNY, txpktbuf_bndy);
327 rtw_write8(Adapter, REG_WMAC_LBK_BF_HD, txpktbuf_bndy);
328 rtw_write8(Adapter, REG_TRXFF_BNDY, txpktbuf_bndy);
329 rtw_write8(Adapter, REG_TDECTRL + 1, txpktbuf_bndy);
330
331 }
332
333 static void
_InitPageBoundary(PADAPTER Adapter)334 _InitPageBoundary(
335 PADAPTER Adapter
336 )
337 {
338 /* RX Page Boundary */
339 u16 rxff_bndy = 0;
340
341 rxff_bndy = MAX_RX_DMA_BUFFER_SIZE_88E(Adapter) - 1;
342
343 #if 0
344
345 /* RX Page Boundary */
346 /* srand(static_cast<unsigned int>(time(NULL)) ); */
347 if (bSupportRemoteWakeUp) {
348 Offset = MAX_RX_DMA_BUFFER_SIZE_88E(Adapter) + MAX_TX_REPORT_BUFFER_SIZE - MAX_SUPPORT_WOL_PATTERN_NUM(Adapter) * WKFMCAM_SIZE;
349 Offset = Offset / 128; /* RX page size = 128 byte */
350 rxff_bndy = (Offset * 128) - 1;
351 } else
352
353 #endif
354 rtw_write16(Adapter, (REG_TRXFF_BNDY + 2), rxff_bndy);
355 }
356
357
358 static void
_InitNormalChipRegPriority(PADAPTER Adapter,u16 beQ,u16 bkQ,u16 viQ,u16 voQ,u16 mgtQ,u16 hiQ)359 _InitNormalChipRegPriority(
360 PADAPTER Adapter,
361 u16 beQ,
362 u16 bkQ,
363 u16 viQ,
364 u16 voQ,
365 u16 mgtQ,
366 u16 hiQ
367 )
368 {
369 u16 value16 = (rtw_read16(Adapter, REG_TRXDMA_CTRL) & 0x7);
370
371 value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) |
372 _TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) |
373 _TXDMA_MGQ_MAP(mgtQ) | _TXDMA_HIQ_MAP(hiQ);
374
375 rtw_write16(Adapter, REG_TRXDMA_CTRL, value16);
376 }
377
378 static void
_InitNormalChipOneOutEpPriority(PADAPTER Adapter)379 _InitNormalChipOneOutEpPriority(
380 PADAPTER Adapter
381 )
382 {
383 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
384
385 u16 value = 0;
386 switch (pHalData->OutEpQueueSel) {
387 case TX_SELE_HQ:
388 value = QUEUE_HIGH;
389 break;
390 case TX_SELE_LQ:
391 value = QUEUE_LOW;
392 break;
393 case TX_SELE_NQ:
394 value = QUEUE_NORMAL;
395 break;
396 default:
397 /* RT_ASSERT(FALSE,("Shall not reach here!\n")); */
398 break;
399 }
400
401 _InitNormalChipRegPriority(Adapter,
402 value,
403 value,
404 value,
405 value,
406 value,
407 value
408 );
409
410 }
411
412 static void
_InitNormalChipTwoOutEpPriority(PADAPTER Adapter)413 _InitNormalChipTwoOutEpPriority(
414 PADAPTER Adapter
415 )
416 {
417 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
418 struct registry_priv *pregistrypriv = &Adapter->registrypriv;
419 u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
420
421
422 u16 valueHi = 0;
423 u16 valueLow = 0;
424
425 switch (pHalData->OutEpQueueSel) {
426 case (TX_SELE_HQ | TX_SELE_LQ):
427 valueHi = QUEUE_HIGH;
428 valueLow = QUEUE_LOW;
429 break;
430 case (TX_SELE_NQ | TX_SELE_LQ):
431 valueHi = QUEUE_NORMAL;
432 valueLow = QUEUE_LOW;
433 break;
434 case (TX_SELE_HQ | TX_SELE_NQ):
435 valueHi = QUEUE_HIGH;
436 valueLow = QUEUE_NORMAL;
437 break;
438 default:
439 /* RT_ASSERT(FALSE,("Shall not reach here!\n")); */
440 break;
441 }
442
443 if (!pregistrypriv->wifi_spec) {
444 beQ = valueLow;
445 bkQ = valueLow;
446 viQ = valueHi;
447 voQ = valueHi;
448 mgtQ = valueHi;
449 hiQ = valueHi;
450 } else { /* for WMM ,CONFIG_OUT_EP_WIFI_MODE */
451 beQ = valueLow;
452 bkQ = valueHi;
453 viQ = valueHi;
454 voQ = valueLow;
455 mgtQ = valueHi;
456 hiQ = valueHi;
457 }
458
459 _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
460
461 }
462
463 static void
_InitNormalChipThreeOutEpPriority(PADAPTER Adapter)464 _InitNormalChipThreeOutEpPriority(
465 PADAPTER Adapter
466 )
467 {
468 struct registry_priv *pregistrypriv = &Adapter->registrypriv;
469 u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
470
471 if (!pregistrypriv->wifi_spec) { /* typical setting */
472 beQ = QUEUE_LOW;
473 bkQ = QUEUE_LOW;
474 viQ = QUEUE_NORMAL;
475 voQ = QUEUE_HIGH;
476 mgtQ = QUEUE_HIGH;
477 hiQ = QUEUE_HIGH;
478 } else { /* for WMM */
479 beQ = QUEUE_LOW;
480 bkQ = QUEUE_NORMAL;
481 viQ = QUEUE_NORMAL;
482 voQ = QUEUE_HIGH;
483 mgtQ = QUEUE_HIGH;
484 hiQ = QUEUE_HIGH;
485 }
486 _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
487 }
488
489 static void
_InitQueuePriority(PADAPTER Adapter)490 _InitQueuePriority(
491 PADAPTER Adapter
492 )
493 {
494 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
495
496 switch (pHalData->OutEpNumber) {
497 case 1:
498 _InitNormalChipOneOutEpPriority(Adapter);
499 break;
500 case 2:
501 _InitNormalChipTwoOutEpPriority(Adapter);
502 break;
503 case 3:
504 _InitNormalChipThreeOutEpPriority(Adapter);
505 break;
506 default:
507 /* RT_ASSERT(FALSE,("Shall not reach here!\n")); */
508 break;
509 }
510
511
512 }
513
514
515
516 static void
_InitHardwareDropIncorrectBulkOut(PADAPTER Adapter)517 _InitHardwareDropIncorrectBulkOut(
518 PADAPTER Adapter
519 )
520 {
521 #ifdef ENABLE_USB_DROP_INCORRECT_OUT
522 u32 value32 = rtw_read32(Adapter, REG_TXDMA_OFFSET_CHK);
523 value32 |= DROP_DATA_EN;
524 rtw_write32(Adapter, REG_TXDMA_OFFSET_CHK, value32);
525 #endif
526 }
527
528 static void
_InitNetworkType(PADAPTER Adapter)529 _InitNetworkType(
530 PADAPTER Adapter
531 )
532 {
533 u32 value32;
534
535 value32 = rtw_read32(Adapter, REG_CR);
536 /* TODO: use the other function to set network type */
537 value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP);
538
539 rtw_write32(Adapter, REG_CR, value32);
540 /* RASSERT(pIoBase->rtw_read8(REG_CR + 2) == 0x2); */
541 }
542
543
544 static void
_InitDriverInfoSize(PADAPTER Adapter,u8 drvInfoSize)545 _InitDriverInfoSize(
546 PADAPTER Adapter,
547 u8 drvInfoSize
548 )
549 {
550 rtw_write8(Adapter, REG_RX_DRVINFO_SZ, drvInfoSize);
551 }
552
553 static void
_InitWMACSetting(PADAPTER Adapter)554 _InitWMACSetting(
555 PADAPTER Adapter
556 )
557 {
558 /* u32 value32; */
559 /* u16 value16; */
560 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
561 u32 rcr;
562
563 /* rcr = AAP | APM | AM | AB | APP_ICV | ADF | AMF | APP_FCS | HTC_LOC_CTRL | APP_MIC | APP_PHYSTS; */
564 /* rcr = */
565 /* RCR_AAP | RCR_APM | RCR_AM | RCR_AB |RCR_CBSSID_DATA| RCR_CBSSID_BCN| RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYSTS; */
566 /* don't turn on AAP, it will allow all packets to driver */
567 rcr = RCR_APM | RCR_AM | RCR_AB | RCR_CBSSID_DATA | RCR_CBSSID_BCN | RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYST_RXFF;
568
569 #if (1 == RTL8188E_RX_PACKET_INCLUDE_CRC)
570 rcr |= ACRC32;
571 #endif
572 rtw_hal_set_hwreg(Adapter, HW_VAR_RCR, (u8 *)&rcr);
573
574 /* Accept all multicast address */
575 rtw_write32(Adapter, REG_MAR, 0xFFFFFFFF);
576 rtw_write32(Adapter, REG_MAR + 4, 0xFFFFFFFF);
577
578
579 /* Accept all data frames */
580 /* value16 = 0xFFFF; */
581 /* rtw_write16(Adapter, REG_RXFLTMAP2, value16); */
582
583 /* 2010.09.08 hpfan */
584 /* Since ADF is removed from RCR, ps-poll will not be indicate to driver, */
585 /* RxFilterMap should mask ps-poll to gurantee AP mode can rx ps-poll. */
586 /* value16 = 0x400; */
587 /* rtw_write16(Adapter, REG_RXFLTMAP1, value16); */
588
589 /* Accept all management frames */
590 /* value16 = 0xFFFF; */
591 /* rtw_write16(Adapter, REG_RXFLTMAP0, value16); */
592
593 /* enable RX_SHIFT bits */
594 /* rtw_write8(Adapter, REG_TRXDMA_CTRL, rtw_read8(Adapter, REG_TRXDMA_CTRL)|BIT(1)); */
595
596 }
597
598 static void
_InitAdaptiveCtrl(PADAPTER Adapter)599 _InitAdaptiveCtrl(
600 PADAPTER Adapter
601 )
602 {
603 u16 value16;
604 u32 value32;
605
606 /* Response Rate Set */
607 value32 = rtw_read32(Adapter, REG_RRSR);
608 value32 &= ~RATE_BITMAP_ALL;
609 value32 |= RATE_RRSR_CCK_ONLY_1M;
610
611 #ifdef RTW_DYNAMIC_RRSR
612 rtw_phydm_set_rrsr(Adapter, value32, TRUE);
613 #else
614 rtw_write32(Adapter, REG_RRSR, value32);
615 #endif
616
617 /* CF-END Threshold */
618 /* m_spIoBase->rtw_write8(REG_CFEND_TH, 0x1); */
619
620 /* SIFS (used in NAV) */
621 value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
622 rtw_write16(Adapter, REG_SPEC_SIFS, value16);
623
624 /* Retry Limit */
625 value16 = BIT_LRL(RL_VAL_STA) | BIT_SRL(RL_VAL_STA);
626 rtw_write16(Adapter, REG_RETRY_LIMIT, value16);
627
628 }
629
630 static void
_InitEDCA(PADAPTER Adapter)631 _InitEDCA(
632 PADAPTER Adapter
633 )
634 {
635 /* Set Spec SIFS (used in NAV) */
636 rtw_write16(Adapter, REG_SPEC_SIFS, 0x100a);
637 rtw_write16(Adapter, REG_MAC_SPEC_SIFS, 0x100a);
638
639 /* Set SIFS for CCK */
640 rtw_write16(Adapter, REG_SIFS_CTX, 0x100a);
641
642 /* Set SIFS for OFDM */
643 rtw_write16(Adapter, REG_SIFS_TRX, 0x100a);
644
645 /* TXOP */
646 rtw_write32(Adapter, REG_EDCA_BE_PARAM, 0x005EA42B);
647 rtw_write32(Adapter, REG_EDCA_BK_PARAM, 0x0000A44F);
648 rtw_write32(Adapter, REG_EDCA_VI_PARAM, 0x005EA324);
649 rtw_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226);
650 }
651
652
653 static void
_InitBeaconMaxError(PADAPTER Adapter,BOOLEAN InfraMode)654 _InitBeaconMaxError(
655 PADAPTER Adapter,
656 BOOLEAN InfraMode
657 )
658 {
659
660 }
661
662
663 #ifdef CONFIG_RTW_LED
_InitHWLed(PADAPTER Adapter)664 static void _InitHWLed(PADAPTER Adapter)
665 {
666 struct led_priv *pledpriv = adapter_to_led(Adapter);
667
668 if (pledpriv->LedStrategy != HW_LED)
669 return;
670
671 /* HW led control
672 * to do ....
673 * must consider cases of antenna diversity/ commbo card/solo card/mini card */
674
675 }
676 #endif /* CONFIG_RTW_LED */
677
678 static void
_InitRDGSetting(PADAPTER Adapter)679 _InitRDGSetting(
680 PADAPTER Adapter
681 )
682 {
683 rtw_write8(Adapter, REG_RD_CTRL, 0xFF);
684 rtw_write16(Adapter, REG_RD_NAV_NXT, 0x200);
685 rtw_write8(Adapter, REG_RD_RESP_PKT_TH, 0x05);
686 }
687
688 static void
_InitRetryFunction(PADAPTER Adapter)689 _InitRetryFunction(
690 PADAPTER Adapter
691 )
692 {
693 u8 value8;
694
695 value8 = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL);
696 value8 |= EN_AMPDU_RTY_NEW;
697 rtw_write8(Adapter, REG_FWHW_TXQ_CTRL, value8);
698
699 /* Set ACK timeout */
700 rtw_write8(Adapter, REG_ACKTO, 0x40);
701 }
702
703 /*-----------------------------------------------------------------------------
704 * Function: usb_AggSettingTxUpdate()
705 *
706 * Overview: Seperate TX/RX parameters update independent for TP detection and
707 * dynamic TX/RX aggreagtion parameters update.
708 *
709 * Input: PADAPTER
710 *
711 * Output/Return: NONE
712 *
713 * Revised History:
714 * When Who Remark
715 * 12/10/2010 MHC Seperate to smaller function.
716 *
717 *---------------------------------------------------------------------------*/
718 static void
usb_AggSettingTxUpdate(PADAPTER Adapter)719 usb_AggSettingTxUpdate(
720 PADAPTER Adapter
721 )
722 {
723 #ifdef CONFIG_USB_TX_AGGREGATION
724 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
725 /* PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); */
726 u32 value32;
727
728 if (Adapter->registrypriv.wifi_spec)
729 pHalData->UsbTxAggMode = _FALSE;
730
731 if (pHalData->UsbTxAggMode) {
732 value32 = rtw_read32(Adapter, REG_TDECTRL);
733 value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT);
734 value32 |= ((pHalData->UsbTxAggDescNum & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT);
735
736 rtw_write32(Adapter, REG_TDECTRL, value32);
737 }
738
739 #endif
740 } /* usb_AggSettingTxUpdate */
741
742
743 /*-----------------------------------------------------------------------------
744 * Function: usb_AggSettingRxUpdate()
745 *
746 * Overview: Seperate TX/RX parameters update independent for TP detection and
747 * dynamic TX/RX aggreagtion parameters update.
748 *
749 * Input: PADAPTER
750 *
751 * Output/Return: NONE
752 *
753 * Revised History:
754 * When Who Remark
755 * 12/10/2010 MHC Seperate to smaller function.
756 *
757 *---------------------------------------------------------------------------*/
758 static void
usb_AggSettingRxUpdate(PADAPTER Adapter)759 usb_AggSettingRxUpdate(
760 PADAPTER Adapter
761 )
762 {
763 #ifdef CONFIG_USB_RX_AGGREGATION
764 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
765 /* PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); */
766 u8 valueDMA;
767 u8 valueUSB;
768
769 valueDMA = rtw_read8(Adapter, REG_TRXDMA_CTRL);
770 valueUSB = rtw_read8(Adapter, REG_USB_SPECIAL_OPTION);
771
772 switch (pHalData->rxagg_mode) {
773 case RX_AGG_DMA:
774 valueDMA |= RXDMA_AGG_EN;
775 valueUSB &= ~USB_AGG_EN;
776 break;
777 case RX_AGG_USB:
778 valueDMA &= ~RXDMA_AGG_EN;
779 valueUSB |= USB_AGG_EN;
780 break;
781 case RX_AGG_MIX:
782 valueDMA |= RXDMA_AGG_EN;
783 valueUSB |= USB_AGG_EN;
784 break;
785 case RX_AGG_DISABLE:
786 default:
787 valueDMA &= ~RXDMA_AGG_EN;
788 valueUSB &= ~USB_AGG_EN;
789 break;
790 }
791
792 rtw_write8(Adapter, REG_TRXDMA_CTRL, valueDMA);
793 rtw_write8(Adapter, REG_USB_SPECIAL_OPTION, valueUSB);
794
795 switch (pHalData->rxagg_mode) {
796 case RX_AGG_DMA:
797 rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, pHalData->rxagg_dma_size);
798 rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH + 1, pHalData->rxagg_dma_timeout);
799 break;
800 case RX_AGG_USB:
801 rtw_write8(Adapter, REG_USB_AGG_TH, pHalData->rxagg_usb_size);
802 rtw_write8(Adapter, REG_USB_AGG_TO, pHalData->rxagg_usb_timeout);
803 break;
804 case RX_AGG_MIX:
805 rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, pHalData->rxagg_dma_size);
806 rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH + 1, pHalData->rxagg_dma_timeout & 0x1F); /* 0x280[12:8] */
807
808 rtw_write8(Adapter, REG_USB_AGG_TH, pHalData->rxagg_usb_size);
809 rtw_write8(Adapter, REG_USB_AGG_TO, pHalData->rxagg_usb_timeout);
810
811 break;
812 case RX_AGG_DISABLE:
813 default:
814 /* TODO: */
815 break;
816 }
817
818 switch (PBP_128) {
819 case PBP_128:
820 pHalData->HwRxPageSize = 128;
821 break;
822 case PBP_64:
823 pHalData->HwRxPageSize = 64;
824 break;
825 case PBP_256:
826 pHalData->HwRxPageSize = 256;
827 break;
828 case PBP_512:
829 pHalData->HwRxPageSize = 512;
830 break;
831 case PBP_1024:
832 pHalData->HwRxPageSize = 1024;
833 break;
834 default:
835 /* RT_ASSERT(FALSE, ("RX_PAGE_SIZE_REG_VALUE definition is incorrect!\n")); */
836 break;
837 }
838 #endif
839 } /* usb_AggSettingRxUpdate */
840
841 static void
InitUsbAggregationSetting(PADAPTER Adapter)842 InitUsbAggregationSetting(
843 PADAPTER Adapter
844 )
845 {
846 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
847
848 /* Tx aggregation setting */
849 usb_AggSettingTxUpdate(Adapter);
850
851 /* Rx aggregation setting */
852 usb_AggSettingRxUpdate(Adapter);
853
854 /* 201/12/10 MH Add for USB agg mode dynamic switch. */
855 pHalData->UsbRxHighSpeedMode = _FALSE;
856 }
857 void
HalRxAggr8188EUsb(PADAPTER Adapter,BOOLEAN Value)858 HalRxAggr8188EUsb(
859 PADAPTER Adapter,
860 BOOLEAN Value
861 )
862 {
863 #if 0/* USB_RX_AGGREGATION_92C */
864
865 PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
866 u8 valueDMATimeout;
867 u8 valueDMAPageCount;
868 u8 valueUSBTimeout;
869 u8 valueUSBBlockCount;
870
871 /* selection to prevent bad TP. */
872 if (IS_WIRELESS_MODE_B(Adapter) || IS_WIRELESS_MODE_G(Adapter) || IS_WIRELESS_MODE_A(Adapter) || pMgntInfo->bWiFiConfg) {
873 /* 2010.04.27 hpfan */
874 /* Adjust RxAggrTimeout to close to zero disable RxAggr, suggested by designer */
875 /* Timeout value is calculated by 34 / (2^n) */
876 valueDMATimeout = 0x0f;
877 valueDMAPageCount = 0x01;
878 valueUSBTimeout = 0x0f;
879 valueUSBBlockCount = 0x01;
880 rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_PGTO, (u8 *)&valueDMATimeout);
881 rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_PGTH, (u8 *)&valueDMAPageCount);
882 rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_USBTO, (u8 *)&valueUSBTimeout);
883 rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_USBTH, (u8 *)&valueUSBBlockCount);
884 } else {
885 rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_USBTO, (u8 *)&pMgntInfo->RegRxAggBlockTimeout);
886 rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_USBTH, (u8 *)&pMgntInfo->RegRxAggBlockCount);
887 }
888
889 #endif
890 }
891
892 /*-----------------------------------------------------------------------------
893 * Function: USB_AggModeSwitch()
894 *
895 * Overview: When RX traffic is more than 40M, we need to adjust some parameters to increase
896 * RX speed by increasing batch indication size. This will decrease TCP ACK speed, we
897 * need to monitor the influence of FTP/network share.
898 * For TX mode, we are still ubder investigation.
899 *
900 * Input: PADAPTER
901 *
902 * Output: NONE
903 *
904 * Return: NONE
905 *
906 * Revised History:
907 * When Who Remark
908 * 12/10/2010 MHC Create Version 0.
909 *
910 *---------------------------------------------------------------------------*/
911 void
USB_AggModeSwitch(PADAPTER Adapter)912 USB_AggModeSwitch(
913 PADAPTER Adapter
914 )
915 {
916 #if 0
917 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
918 PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo);
919
920 /* pHalData->UsbRxHighSpeedMode = FALSE; */
921 /* How to measure the RX speed? We assume that when traffic is more than */
922 if (pMgntInfo->bRegAggDMEnable == FALSE) {
923 return; /* Inf not support. */
924 }
925
926
927 if (pMgntInfo->LinkDetectInfo.bHigherBusyRxTraffic == TRUE &&
928 pHalData->UsbRxHighSpeedMode == FALSE) {
929 pHalData->UsbRxHighSpeedMode = TRUE;
930 } else if (pMgntInfo->LinkDetectInfo.bHigherBusyRxTraffic == FALSE &&
931 pHalData->UsbRxHighSpeedMode == TRUE) {
932 pHalData->UsbRxHighSpeedMode = FALSE;
933 } else
934 return;
935
936
937 #if USB_RX_AGGREGATION_92C
938 if (pHalData->UsbRxHighSpeedMode == TRUE) {
939 /* 2010/12/10 MH The parameter is tested by SD1 engineer and SD3 channel emulator. */
940 /* USB mode */
941 #if (RT_PLATFORM == PLATFORM_LINUX)
942 if (pMgntInfo->LinkDetectInfo.bTxBusyTraffic) {
943 pHalData->RxAggBlockCount = 16;
944 pHalData->RxAggBlockTimeout = 7;
945 } else
946 #endif
947 {
948 pHalData->RxAggBlockCount = 40;
949 pHalData->RxAggBlockTimeout = 5;
950 }
951 /* Mix mode */
952 pHalData->RxAggPageCount = 72;
953 pHalData->RxAggPageTimeout = 6;
954 } else {
955 /* USB mode */
956 pHalData->RxAggBlockCount = pMgntInfo->RegRxAggBlockCount;
957 pHalData->RxAggBlockTimeout = pMgntInfo->RegRxAggBlockTimeout;
958 /* Mix mode */
959 pHalData->RxAggPageCount = pMgntInfo->RegRxAggPageCount;
960 pHalData->RxAggPageTimeout = pMgntInfo->RegRxAggPageTimeout;
961 }
962
963 if (pHalData->RxAggBlockCount > MAX_RX_AGG_BLKCNT)
964 pHalData->RxAggBlockCount = MAX_RX_AGG_BLKCNT;
965 #if (OS_WIN_FROM_VISTA(OS_VERSION)) || (RT_PLATFORM == PLATFORM_LINUX) /* do not support WINXP to prevent usbehci.sys BSOD */
966 if (IS_WIRELESS_MODE_N_24G(Adapter) || IS_WIRELESS_MODE_N_5G(Adapter)) {
967 /* */
968 /* 2010/12/24 MH According to V1012 QC IOT test, XP BSOD happen when running chariot test */
969 /* with the aggregation dynamic change!! We need to disable the function to prevent it is broken */
970 /* in usbehci.sys. */
971 /* */
972 usb_AggSettingRxUpdate_8188E(Adapter);
973
974 /* 2010/12/27 MH According to designer's suggstion, we can only modify Timeout value. Otheriwse */
975 /* there might many HW incorrect behavior, the XP BSOD at usbehci.sys may be relative to the */
976 /* issue. Base on the newest test, we can not enable block cnt > 30, otherwise XP usbehci.sys may */
977 /* BSOD. */
978 }
979 #endif
980
981 #endif
982 #endif
983 } /* USB_AggModeSwitch */
984
985 static void
_InitRFType(PADAPTER Adapter)986 _InitRFType(
987 PADAPTER Adapter
988 )
989 {
990 struct registry_priv *pregpriv = &Adapter->registrypriv;
991 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
992
993 #if DISABLE_BB_RF
994 pHalData->rf_chip = RF_PSEUDO_11N;
995 return;
996 #endif
997 pHalData->rf_chip = RF_6052;
998
999 /* TODO: Consider that EEPROM set 92CU to 1T1R later. */
1000 /* Force to overwrite setting according to chip version. Ignore EEPROM setting. */
1001 /* pHalData->RF_Type = is92CU ? RF_2T2R : RF_1T1R; */
1002 RTW_INFO("Set RF Chip ID to RF_6052 and RF type to %d.\n", pHalData->rf_type);
1003
1004 }
1005
1006 /* Set CCK and OFDM Block "ON" */
_BBTurnOnBlock(PADAPTER Adapter)1007 static void _BBTurnOnBlock(
1008 PADAPTER Adapter
1009 )
1010 {
1011 #if (DISABLE_BB_RF)
1012 return;
1013 #endif
1014
1015 phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1);
1016 phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1);
1017 }
1018
1019 static void
_InitAntenna_Selection(PADAPTER Adapter)1020 _InitAntenna_Selection(PADAPTER Adapter)
1021 {
1022 #ifdef CONFIG_ANTENNA_DIVERSITY
1023 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1024
1025 if (pHalData->AntDivCfg == 0)
1026 return;
1027 RTW_INFO("==> %s ....\n", __FUNCTION__);
1028
1029 rtw_write32(Adapter, REG_LEDCFG0, rtw_read32(Adapter, REG_LEDCFG0) | BIT23);
1030 phy_set_bb_reg(Adapter, rFPGA0_XAB_RFParameter, BIT13, 0x01);
1031 #endif
1032 }
1033
1034 /*
1035 * 2010/08/26 MH Add for selective suspend mode check.
1036 * If Efuse 0x0e bit1 is not enabled, we can not support selective suspend for Minicard and
1037 * slim card.
1038 * */
1039 #if 0
1040 static void
1041 HalDetectSelectiveSuspendMode(
1042 PADAPTER Adapter
1043 )
1044 {
1045 u8 tmpvalue;
1046 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1047 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter);
1048
1049 /* If support HW radio detect, we need to enable WOL ability, otherwise, we */
1050 /* can not use FW to notify host the power state switch. */
1051
1052 EFUSE_ShadowRead(Adapter, 1, EEPROM_USB_OPTIONAL1, (u32 *)&tmpvalue);
1053
1054 RTW_INFO("HalDetectSelectiveSuspendMode(): SS ");
1055 if (tmpvalue & BIT1)
1056 RTW_INFO("Enable\n");
1057 else {
1058 RTW_INFO("Disable\n");
1059 pdvobjpriv->RegUsbSS = _FALSE;
1060 }
1061
1062 /* 2010/09/01 MH According to Dongle Selective Suspend INF. We can switch SS mode. */
1063 if (pdvobjpriv->RegUsbSS && !SUPPORT_HW_RADIO_DETECT(pHalData)) {
1064 /* PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); */
1065
1066 /* if (!pMgntInfo->bRegDongleSS) */
1067 /* { */
1068 pdvobjpriv->RegUsbSS = _FALSE;
1069 /* } */
1070 }
1071 } /* HalDetectSelectiveSuspendMode */
1072 #endif
1073
RfOnOffDetect(PADAPTER pAdapter)1074 rt_rf_power_state RfOnOffDetect(PADAPTER pAdapter)
1075 {
1076 struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(pAdapter);
1077 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
1078 u8 val8;
1079 rt_rf_power_state rfpowerstate = rf_off;
1080
1081 if (pwrctl->bHWPowerdown) {
1082 val8 = rtw_read8(pAdapter, REG_HSISR);
1083 RTW_INFO("pwrdown, 0x5c(BIT7)=%02x\n", val8);
1084 rfpowerstate = (val8 & BIT7) ? rf_off : rf_on;
1085 } else { /* rf on/off */
1086 rtw_write8(pAdapter, REG_MAC_PINMUX_CFG, rtw_read8(pAdapter, REG_MAC_PINMUX_CFG) & ~(BIT3));
1087 val8 = rtw_read8(pAdapter, REG_GPIO_IO_SEL);
1088 RTW_INFO("GPIO_IN=%02x\n", val8);
1089 rfpowerstate = (val8 & BIT3) ? rf_on : rf_off;
1090 }
1091 return rfpowerstate;
1092 } /* HalDetectPwrDownMode */
1093
1094 void _ps_open_RF(_adapter *padapter);
1095
rtl8188eu_hal_init(PADAPTER Adapter)1096 u32 rtl8188eu_hal_init(PADAPTER Adapter)
1097 {
1098 u8 value8 = 0;
1099 u16 value16;
1100 u8 txpktbuf_bndy;
1101 u32 status = _SUCCESS;
1102 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1103 struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(Adapter);
1104 struct registry_priv *pregistrypriv = &Adapter->registrypriv;
1105
1106 rt_rf_power_state eRfPowerStateToSet;
1107 #ifdef CONFIG_BT_COEXIST
1108 struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist);
1109 #endif
1110
1111 systime init_start_time = rtw_get_current_time();
1112
1113
1114 #ifdef DBG_HAL_INIT_PROFILING
1115
1116 enum HAL_INIT_STAGES {
1117 HAL_INIT_STAGES_BEGIN = 0,
1118 HAL_INIT_STAGES_INIT_PW_ON,
1119 HAL_INIT_STAGES_MISC01,
1120 HAL_INIT_STAGES_DOWNLOAD_FW,
1121 HAL_INIT_STAGES_MAC,
1122 HAL_INIT_STAGES_BB,
1123 HAL_INIT_STAGES_RF,
1124 HAL_INIT_STAGES_EFUSE_PATCH,
1125 HAL_INIT_STAGES_INIT_LLTT,
1126
1127 HAL_INIT_STAGES_MISC02,
1128 HAL_INIT_STAGES_TURN_ON_BLOCK,
1129 HAL_INIT_STAGES_INIT_SECURITY,
1130 HAL_INIT_STAGES_MISC11,
1131 HAL_INIT_STAGES_INIT_HAL_DM,
1132 /* HAL_INIT_STAGES_RF_PS, */
1133 HAL_INIT_STAGES_IQK,
1134 HAL_INIT_STAGES_PW_TRACK,
1135 HAL_INIT_STAGES_LCK,
1136 /* HAL_INIT_STAGES_MISC21, */
1137 /* HAL_INIT_STAGES_INIT_PABIAS, */
1138 #ifdef CONFIG_BT_COEXIST
1139 HAL_INIT_STAGES_BT_COEXIST,
1140 #endif
1141 /* HAL_INIT_STAGES_ANTENNA_SEL, */
1142 /* HAL_INIT_STAGES_MISC31, */
1143 HAL_INIT_STAGES_END,
1144 HAL_INIT_STAGES_NUM
1145 };
1146
1147 char *hal_init_stages_str[] = {
1148 "HAL_INIT_STAGES_BEGIN",
1149 "HAL_INIT_STAGES_INIT_PW_ON",
1150 "HAL_INIT_STAGES_MISC01",
1151 "HAL_INIT_STAGES_DOWNLOAD_FW",
1152 "HAL_INIT_STAGES_MAC",
1153 "HAL_INIT_STAGES_BB",
1154 "HAL_INIT_STAGES_RF",
1155 "HAL_INIT_STAGES_EFUSE_PATCH",
1156 "HAL_INIT_STAGES_INIT_LLTT",
1157 "HAL_INIT_STAGES_MISC02",
1158 "HAL_INIT_STAGES_TURN_ON_BLOCK",
1159 "HAL_INIT_STAGES_INIT_SECURITY",
1160 "HAL_INIT_STAGES_MISC11",
1161 "HAL_INIT_STAGES_INIT_HAL_DM",
1162 /* "HAL_INIT_STAGES_RF_PS", */
1163 "HAL_INIT_STAGES_IQK",
1164 "HAL_INIT_STAGES_PW_TRACK",
1165 "HAL_INIT_STAGES_LCK",
1166 /* "HAL_INIT_STAGES_MISC21", */
1167 #ifdef CONFIG_BT_COEXIST
1168 "HAL_INIT_STAGES_BT_COEXIST",
1169 #endif
1170 /* "HAL_INIT_STAGES_ANTENNA_SEL", */
1171 /* "HAL_INIT_STAGES_MISC31", */
1172 "HAL_INIT_STAGES_END",
1173 };
1174
1175 int hal_init_profiling_i;
1176 systime hal_init_stages_timestamp[HAL_INIT_STAGES_NUM]; /* used to record the time of each stage's starting point */
1177
1178 for (hal_init_profiling_i = 0; hal_init_profiling_i < HAL_INIT_STAGES_NUM; hal_init_profiling_i++)
1179 hal_init_stages_timestamp[hal_init_profiling_i] = 0;
1180
1181 #define HAL_INIT_PROFILE_TAG(stage) do { hal_init_stages_timestamp[(stage)] = rtw_get_current_time(); } while (0)
1182 #else
1183 #define HAL_INIT_PROFILE_TAG(stage) do {} while (0)
1184 #endif /* DBG_HAL_INIT_PROFILING */
1185
1186
1187
1188
1189 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BEGIN);
1190
1191 if (pwrctrlpriv->bkeepfwalive) {
1192 _ps_open_RF(Adapter);
1193
1194 if (pHalData->bIQKInitialized) {
1195 /* PHY_IQCalibrate(padapter, _TRUE); */
1196 /*phy_iq_calibrate_8188e(Adapter, _TRUE);*/
1197 halrf_iqk_trigger(&pHalData->odmpriv, _TRUE);
1198 } else {
1199 /* PHY_IQCalibrate(padapter, _FALSE); */
1200 /*phy_iq_calibrate_8188e(Adapter, _FALSE);*/
1201 halrf_iqk_trigger(&pHalData->odmpriv, _FALSE);
1202 pHalData->bIQKInitialized = _TRUE;
1203 }
1204
1205 /* dm_check_txpowertracking(padapter);
1206 * phy_lc_calibrate(padapter); */
1207 odm_txpowertracking_check(&pHalData->odmpriv);
1208 /*phy_lc_calibrate_8188e(&pHalData->odmpriv);*/
1209 halrf_lck_trigger(&pHalData->odmpriv);
1210 goto exit;
1211 }
1212
1213
1214 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PW_ON);
1215 status = rtw_hal_power_on(Adapter);
1216 if (status == _FAIL) {
1217 goto exit;
1218 }
1219
1220 /* Set RF type for BB/RF configuration */
1221 _InitRFType(Adapter);/* ->_ReadRFType() */
1222
1223 /* Save target channel */
1224 /* <Roger_Notes> Current Channel will be updated again later. */
1225 pHalData->current_channel = 6;/* default set to 6 */
1226 if (pwrctrlpriv->reg_rfoff == _TRUE)
1227 pwrctrlpriv->rf_pwrstate = rf_off;
1228
1229 /* 2010/08/09 MH We need to check if we need to turnon or off RF after detecting */
1230 /* HW GPIO pin. Before PHY_RFConfig8192C. */
1231 /* HalDetectPwrDownMode(Adapter); */
1232 /* 2010/08/26 MH If Efuse does not support sective suspend then disable the function. */
1233 /*HalDetectSelectiveSuspendMode(Adapter);*/
1234
1235 if (!pregistrypriv->wifi_spec)
1236 txpktbuf_bndy = TX_PAGE_BOUNDARY_88E(Adapter);
1237 else {
1238 /* for WMM */
1239 txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_88E(Adapter);
1240 }
1241
1242 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC01);
1243 _InitQueueReservedPage(Adapter);
1244 _InitQueuePriority(Adapter);
1245 _InitPageBoundary(Adapter);
1246 _InitTransferPageSize(Adapter);
1247
1248 #ifdef CONFIG_IOL_IOREG_CFG
1249 _InitTxBufferBoundary(Adapter, 0);
1250 #endif
1251
1252
1253
1254 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW);
1255 if (Adapter->registrypriv.mp_mode == 0) {
1256 status = rtl8188e_FirmwareDownload(Adapter, _FALSE);
1257 if (status != _SUCCESS) {
1258 RTW_INFO("%s: Download Firmware failed!!\n", __FUNCTION__);
1259 pHalData->bFWReady = _FALSE;
1260 pHalData->fw_ractrl = _FALSE;
1261 return status;
1262 } else {
1263 pHalData->bFWReady = _TRUE;
1264 #ifdef CONFIG_SFW_SUPPORTED
1265 pHalData->fw_ractrl = IS_VENDOR_8188E_I_CUT_SERIES(Adapter) ? _TRUE : _FALSE;
1266 #else
1267 pHalData->fw_ractrl = _FALSE;
1268 #endif
1269 }
1270 }
1271
1272 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MAC);
1273 #if (HAL_MAC_ENABLE == 1)
1274 status = PHY_MACConfig8188E(Adapter);
1275 if (status == _FAIL) {
1276 RTW_INFO(" ### Failed to init MAC ......\n ");
1277 goto exit;
1278 }
1279 #endif
1280
1281 /* */
1282 /* d. Initialize BB related configurations. */
1283 /* */
1284 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BB);
1285 #if (HAL_BB_ENABLE == 1)
1286 status = PHY_BBConfig8188E(Adapter);
1287 if (status == _FAIL) {
1288 RTW_INFO(" ### Failed to init BB ......\n ");
1289 goto exit;
1290 }
1291 #endif
1292
1293
1294 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_RF);
1295 #if (HAL_RF_ENABLE == 1)
1296 status = PHY_RFConfig8188E(Adapter);
1297 if (status == _FAIL) {
1298 RTW_INFO(" ### Failed to init RF ......\n ");
1299 goto exit;
1300 }
1301 #endif
1302
1303 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_EFUSE_PATCH);
1304 #if defined(CONFIG_IOL_EFUSE_PATCH)
1305 status = rtl8188e_iol_efuse_patch(Adapter);
1306 if (status == _FAIL) {
1307 RTW_INFO("%s rtl8188e_iol_efuse_patch failed\n", __FUNCTION__);
1308 goto exit;
1309 }
1310 #endif
1311
1312 _InitTxBufferBoundary(Adapter, txpktbuf_bndy);
1313
1314 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_LLTT);
1315 status = InitLLTTable(Adapter, txpktbuf_bndy);
1316 if (status == _FAIL) {
1317 goto exit;
1318 }
1319
1320 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02);
1321 /* Get Rx PHY status in order to report RSSI and others. */
1322 _InitDriverInfoSize(Adapter, DRVINFO_SZ);
1323
1324 _InitInterrupt(Adapter);
1325 _InitNetworkType(Adapter);/* set msr */
1326 _InitWMACSetting(Adapter);
1327 _InitAdaptiveCtrl(Adapter);
1328 _InitEDCA(Adapter);
1329 _InitRetryFunction(Adapter);
1330 InitUsbAggregationSetting(Adapter);
1331 InitBeaconParameters_8188e(Adapter);
1332 _InitBeaconMaxError(Adapter, _TRUE);
1333
1334 /* */
1335 /* Init CR MACTXEN, MACRXEN after setting RxFF boundary REG_TRXFF_BNDY to patch */
1336 /* Hw bug which Hw initials RxFF boundry size to a value which is larger than the real Rx buffer size in 88E. */
1337 /* */
1338 /* Enable MACTXEN/MACRXEN block */
1339 value16 = rtw_read16(Adapter, REG_CR);
1340 value16 |= (MACTXEN | MACRXEN);
1341 rtw_write8(Adapter, REG_CR, value16);
1342
1343 _InitHardwareDropIncorrectBulkOut(Adapter);
1344
1345
1346 if (pHalData->bRDGEnable)
1347 _InitRDGSetting(Adapter);
1348
1349 /* Enable TX Report & Tx Report Timer */
1350 value8 = rtw_read8(Adapter, REG_TX_RPT_CTRL);
1351 rtw_write8(Adapter, REG_TX_RPT_CTRL, (value8 | BIT1 | BIT0));
1352
1353 #if (RATE_ADAPTIVE_SUPPORT == 1)
1354 if (!pHalData->fw_ractrl) {
1355 /* Set MAX RPT MACID */
1356 rtw_write8(Adapter, REG_TX_RPT_CTRL + 1, 2); /* FOR sta mode ,0: bc/mc ,1:AP */
1357 /* Tx RPT Timer. Unit: 32us */
1358 rtw_write16(Adapter, REG_TX_RPT_TIME, 0xCdf0);
1359 } else
1360 #endif
1361 {
1362 /* disable tx rpt */
1363 rtw_write8(Adapter, REG_TX_RPT_CTRL + 1, 0); /* FOR sta mode ,0: bc/mc ,1:AP */
1364 }
1365 #if 0
1366 if (pHTInfo->bRDGEnable)
1367 _InitRDGSetting_8188E(Adapter);
1368 #endif
1369
1370 #ifdef CONFIG_TX_EARLY_MODE
1371 if (pHalData->bEarlyModeEnable) {
1372
1373 value8 = rtw_read8(Adapter, REG_EARLY_MODE_CONTROL);
1374 #if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1
1375 value8 = value8 | 0x1f;
1376 #else
1377 value8 = value8 | 0xf;
1378 #endif
1379 rtw_write8(Adapter, REG_EARLY_MODE_CONTROL, value8);
1380
1381 rtw_write8(Adapter, REG_EARLY_MODE_CONTROL + 3, 0x80);
1382
1383 value8 = rtw_read8(Adapter, REG_TCR + 1);
1384 value8 = value8 | 0x40;
1385 rtw_write8(Adapter, REG_TCR + 1, value8);
1386 } else
1387 #endif
1388 {
1389 rtw_write8(Adapter, REG_EARLY_MODE_CONTROL, 0);
1390 }
1391
1392 rtw_write32(Adapter, REG_MACID_NO_LINK_0, 0xFFFFFFFF);
1393 rtw_write32(Adapter, REG_MACID_NO_LINK_1, 0xFFFFFFFF);
1394
1395
1396 #ifdef CONFIG_RTW_LED
1397 _InitHWLed(Adapter);
1398 #endif /* CONFIG_RTW_LED */
1399
1400
1401 /* */
1402 /* Joseph Note: Keep RfRegChnlVal for later use. */
1403 /* */
1404 pHalData->RfRegChnlVal[0] = phy_query_rf_reg(Adapter, 0, RF_CHNLBW, bRFRegOffsetMask);
1405 pHalData->RfRegChnlVal[1] = phy_query_rf_reg(Adapter, 1, RF_CHNLBW, bRFRegOffsetMask);
1406
1407 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_TURN_ON_BLOCK);
1408 _BBTurnOnBlock(Adapter);
1409 /* NicIFSetMacAddress(padapter, padapter->PermanentAddress); */
1410
1411 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY);
1412 invalidate_cam_all(Adapter);
1413
1414 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11);
1415 /* 2010/12/17 MH We need to set TX power according to EFUSE content at first. */
1416 rtw_hal_set_tx_power_level(Adapter, pHalData->current_channel);
1417
1418 _InitAntenna_Selection(Adapter);
1419
1420 /* */
1421 /* Disable BAR, suggested by Scott */
1422 /* 2010.04.09 add by hpfan */
1423 /* */
1424 rtw_write32(Adapter, REG_BAR_MODE_CTRL, 0x0201ffff);
1425
1426 /* HW SEQ CTRL */
1427 /* set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. */
1428 rtw_write8(Adapter, REG_HWSEQ_CTRL, 0xFF);
1429
1430 PHY_SetRFEReg_8188E(Adapter);
1431
1432 if (pregistrypriv->wifi_spec) {
1433 rtw_write16(Adapter, REG_FAST_EDCA_CTRL , 0);
1434 /* Nav limit , suggest by scott */
1435 rtw_write8(Adapter, REG_NAV_UPPER, 0x0);
1436 }
1437
1438 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM);
1439 rtl8188e_InitHalDm(Adapter);
1440
1441 #if (MP_DRIVER == 1)
1442 if (Adapter->registrypriv.mp_mode == 1) {
1443 Adapter->mppriv.channel = pHalData->current_channel;
1444 MPT_InitializeAdapter(Adapter, Adapter->mppriv.channel);
1445 } else
1446 #endif /* #if (MP_DRIVER == 1) */
1447 {
1448 /* */
1449 /* 2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status */
1450 /* and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not */
1451 /* call init_adapter. May cause some problem?? */
1452 /* */
1453 /* Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed */
1454 /* in MgntActSet_RF_State() after wake up, because the value of pHalData->eRFPowerState */
1455 /* is the same as eRfOff, we should change it to eRfOn after we config RF parameters. */
1456 /* Added by tynli. 2010.03.30. */
1457 pwrctrlpriv->rf_pwrstate = rf_on;
1458
1459 if (!pHalData->fw_ractrl) {
1460 /* enable Tx report. */
1461 rtw_write8(Adapter, REG_FWHW_TXQ_CTRL + 1, 0x0F);
1462 /* tynli_test_tx_report. */
1463 rtw_write16(Adapter, REG_TX_RPT_TIME, 0x3DF0);
1464 }
1465
1466 /* Suggested by SD1 pisa. Added by tynli. 2011.10.21. */
1467 rtw_write8(Adapter, REG_EARLY_MODE_CONTROL + 3, 0x01); /* Pretx_en, for WEP/TKIP SEC */
1468
1469
1470 /* enable tx DMA to drop the redundate data of packet */
1471 rtw_write16(Adapter, REG_TXDMA_OFFSET_CHK, (rtw_read16(Adapter, REG_TXDMA_OFFSET_CHK) | DROP_DATA_EN));
1472
1473 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK);
1474 /* 2010/08/26 MH Merge from 8192CE. */
1475 if (pwrctrlpriv->rf_pwrstate == rf_on) {
1476
1477 pHalData->neediqk_24g = _TRUE;
1478 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK);
1479
1480 odm_txpowertracking_check(&pHalData->odmpriv);
1481
1482
1483 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK);
1484 /*phy_lc_calibrate_8188e(&pHalData->odmpriv);*/
1485 halrf_lck_trigger(&pHalData->odmpriv);
1486 }
1487 }
1488
1489 rtw_write8(Adapter, REG_USB_HRPWM, 0);
1490
1491 #ifdef CONFIG_XMIT_ACK
1492 /* ack for xmit mgmt frames. */
1493 rtw_write32(Adapter, REG_FWHW_TXQ_CTRL, rtw_read32(Adapter, REG_FWHW_TXQ_CTRL) | BIT(12));
1494 #endif /* CONFIG_XMIT_ACK */
1495
1496 exit:
1497 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END);
1498
1499 RTW_INFO("%s in %dms\n", __FUNCTION__, rtw_get_passing_time_ms(init_start_time));
1500
1501 #ifdef DBG_HAL_INIT_PROFILING
1502 hal_init_stages_timestamp[HAL_INIT_STAGES_END] = rtw_get_current_time();
1503
1504 for (hal_init_profiling_i = 0; hal_init_profiling_i < HAL_INIT_STAGES_NUM - 1; hal_init_profiling_i++) {
1505 RTW_INFO("DBG_HAL_INIT_PROFILING: %35s, %lu, %5lu, %5u\n"
1506 , hal_init_stages_str[hal_init_profiling_i]
1507 , hal_init_stages_timestamp[hal_init_profiling_i]
1508 , (hal_init_stages_timestamp[hal_init_profiling_i + 1] - hal_init_stages_timestamp[hal_init_profiling_i])
1509 , rtw_get_time_interval_ms(hal_init_stages_timestamp[hal_init_profiling_i], hal_init_stages_timestamp[hal_init_profiling_i + 1])
1510 );
1511 }
1512 #endif
1513
1514
1515
1516 return status;
1517 }
1518
_ps_open_RF(_adapter * padapter)1519 void _ps_open_RF(_adapter *padapter)
1520 {
1521 /* here call with bRegSSPwrLvl 1, bRegSSPwrLvl 2 needs to be verified */
1522 /* phy_SsPwrSwitch92CU(padapter, rf_on, 1); */
1523 }
1524
_ps_close_RF(_adapter * padapter)1525 void _ps_close_RF(_adapter *padapter)
1526 {
1527 /* here call with bRegSSPwrLvl 1, bRegSSPwrLvl 2 needs to be verified */
1528 /* phy_SsPwrSwitch92CU(padapter, rf_off, 1); */
1529 }
1530
1531
1532 void
hal_poweroff_8188eu(PADAPTER Adapter)1533 hal_poweroff_8188eu(
1534 PADAPTER Adapter
1535 )
1536 {
1537
1538 u8 val8;
1539 u16 val16;
1540 u32 val32;
1541 u8 bMacPwrCtrlOn = _FALSE;
1542
1543 rtw_hal_get_hwreg(Adapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn);
1544 if (bMacPwrCtrlOn == _FALSE)
1545 return ;
1546
1547
1548 /* Stop Tx Report Timer. 0x4EC[Bit1]=b'0 */
1549 val8 = rtw_read8(Adapter, REG_TX_RPT_CTRL);
1550 rtw_write8(Adapter, REG_TX_RPT_CTRL, val8 & (~BIT1));
1551
1552 /* stop rx */
1553 rtw_write8(Adapter, REG_CR, 0x0);
1554
1555 /* Run LPS WL RFOFF flow */
1556 HalPwrSeqCmdParsing(Adapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8188E_NIC_LPS_ENTER_FLOW);
1557
1558
1559 /* 2. 0x1F[7:0] = 0 */ /* turn off RF */
1560 /* rtw_write8(Adapter, REG_RF_CTRL, 0x00); */
1561
1562 val8 = rtw_read8(Adapter, REG_MCUFWDL);
1563 if ((val8 & RAM_DL_SEL) && GET_HAL_DATA(Adapter)->bFWReady) { /* 8051 RAM code */
1564 /* _8051Reset88E(padapter); */
1565
1566 /* Reset MCU 0x2[10]=0. */
1567 val8 = rtw_read8(Adapter, REG_SYS_FUNC_EN + 1);
1568 val8 &= ~BIT(2); /* 0x2[10], FEN_CPUEN */
1569 rtw_write8(Adapter, REG_SYS_FUNC_EN + 1, val8);
1570 }
1571
1572 /* val8 = rtw_read8(Adapter, REG_SYS_FUNC_EN+1); */
1573 /* val8 &= ~BIT(2); */ /* 0x2[10], FEN_CPUEN */
1574 /* rtw_write8(Adapter, REG_SYS_FUNC_EN+1, val8); */
1575
1576 /* MCUFWDL 0x80[1:0]=0 */
1577 /* reset MCU ready status */
1578 rtw_write8(Adapter, REG_MCUFWDL, 0);
1579
1580 /* YJ,add,111212 */
1581 /* Disable 32k */
1582 val8 = rtw_read8(Adapter, REG_32K_CTRL);
1583 rtw_write8(Adapter, REG_32K_CTRL, val8 & (~BIT0));
1584
1585 /* Card disable power action flow */
1586 HalPwrSeqCmdParsing(Adapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8188E_NIC_DISABLE_FLOW);
1587
1588 /* Reset MCU IO Wrapper */
1589 val8 = rtw_read8(Adapter, REG_RSV_CTRL + 1);
1590 rtw_write8(Adapter, REG_RSV_CTRL + 1, (val8 & (~BIT3)));
1591 val8 = rtw_read8(Adapter, REG_RSV_CTRL + 1);
1592 rtw_write8(Adapter, REG_RSV_CTRL + 1, val8 | BIT3);
1593
1594 #if 0
1595 /* 7. RSV_CTRL 0x1C[7:0] = 0x0E */ /* lock ISO/CLK/Power control register */
1596 rtw_write8(Adapter, REG_RSV_CTRL, 0x0e);
1597 #endif
1598 #if 1
1599 /* YJ,test add, 111207. For Power Consumption. */
1600 val8 = rtw_read8(Adapter, GPIO_IN);
1601 rtw_write8(Adapter, GPIO_OUT, val8);
1602 rtw_write8(Adapter, GPIO_IO_SEL, 0xFF);/* Reg0x46 */
1603
1604 val8 = rtw_read8(Adapter, REG_GPIO_IO_SEL);
1605 /* rtw_write8(Adapter, REG_GPIO_IO_SEL, (val8<<4)|val8); */
1606 rtw_write8(Adapter, REG_GPIO_IO_SEL, (val8 << 4));
1607 val8 = rtw_read8(Adapter, REG_GPIO_IO_SEL + 1);
1608 rtw_write8(Adapter, REG_GPIO_IO_SEL + 1, val8 | 0x0F); /* Reg0x43 */
1609 rtw_write32(Adapter, REG_BB_PAD_CTRL, 0x00080808);/* set LNA ,TRSW,EX_PA Pin to output mode */
1610 #endif
1611
1612 GET_HAL_DATA(Adapter)->bFWReady = _FALSE;
1613
1614 bMacPwrCtrlOn = _FALSE;
1615 rtw_hal_set_hwreg(Adapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn);
1616 }
rtl8188eu_hw_power_down(_adapter * padapter)1617 static void rtl8188eu_hw_power_down(_adapter *padapter)
1618 {
1619 /* 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. */
1620 /* Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. */
1621
1622 /* Enable register area 0x0-0xc. */
1623 rtw_write8(padapter, REG_RSV_CTRL, 0x0);
1624 rtw_write16(padapter, REG_APS_FSMCO, 0x8812);
1625 }
1626
rtl8188eu_hal_deinit(PADAPTER Adapter)1627 u32 rtl8188eu_hal_deinit(PADAPTER Adapter)
1628 {
1629 struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(Adapter);
1630 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1631 RTW_INFO("==> %s\n", __FUNCTION__);
1632
1633 #ifdef CONFIG_SUPPORT_USB_INT
1634 rtw_write32(Adapter, REG_HIMR_88E, IMR_DISABLED_88E);
1635 rtw_write32(Adapter, REG_HIMRE_88E, IMR_DISABLED_88E);
1636 #endif
1637
1638 #ifdef SUPPORT_HW_RFOFF_DETECTED
1639 RTW_INFO("bkeepfwalive(%x)\n", pwrctl->bkeepfwalive);
1640 if (pwrctl->bkeepfwalive) {
1641 _ps_close_RF(Adapter);
1642 if ((pwrctl->bHWPwrPindetect) && (pwrctl->bHWPowerdown))
1643 rtl8188eu_hw_power_down(Adapter);
1644 } else
1645 #endif
1646 {
1647 if (rtw_is_hw_init_completed(Adapter)) {
1648 rtw_hal_power_off(Adapter);
1649
1650 if ((pwrctl->bHWPwrPindetect) && (pwrctl->bHWPowerdown))
1651 rtl8188eu_hw_power_down(Adapter);
1652
1653 }
1654 }
1655 return _SUCCESS;
1656 }
1657
1658
rtl8188eu_inirp_init(PADAPTER Adapter)1659 unsigned int rtl8188eu_inirp_init(PADAPTER Adapter)
1660 {
1661 u8 i;
1662 struct recv_buf *precvbuf;
1663 uint status;
1664 struct dvobj_priv *pdev = adapter_to_dvobj(Adapter);
1665 struct intf_hdl *pintfhdl = &Adapter->iopriv.intf;
1666 struct recv_priv *precvpriv = &(Adapter->recvpriv);
1667 u32(*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
1668 #ifdef CONFIG_USB_INTERRUPT_IN_PIPE
1669 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1670 u32(*_read_interrupt)(struct intf_hdl *pintfhdl, u32 addr);
1671 #endif
1672
1673
1674 _read_port = pintfhdl->io_ops._read_port;
1675
1676 status = _SUCCESS;
1677
1678
1679 precvpriv->ff_hwaddr = RECV_BULK_IN_ADDR;
1680
1681 /* issue Rx irp to receive data */
1682 precvbuf = (struct recv_buf *)precvpriv->precv_buf;
1683 for (i = 0; i < NR_RECVBUFF; i++) {
1684 if (_read_port(pintfhdl, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf) == _FALSE) {
1685 status = _FAIL;
1686 goto exit;
1687 }
1688
1689 precvbuf++;
1690 precvpriv->free_recv_buf_queue_cnt--;
1691 }
1692
1693 #ifdef CONFIG_USB_INTERRUPT_IN_PIPE
1694 if (pdev->RtInPipe[REALTEK_USB_IN_INT_EP_IDX] != 0x05) {
1695 status = _FAIL;
1696 RTW_INFO("%s =>Warning !! Have not USB Int-IN pipe, RtIntInPipe(%d)!!!\n", __func__, pdev->RtInPipe[REALTEK_USB_IN_INT_EP_IDX]);
1697 goto exit;
1698 }
1699 _read_interrupt = pintfhdl->io_ops._read_interrupt;
1700 if (_read_interrupt(pintfhdl, RECV_INT_IN_ADDR) == _FALSE) {
1701 status = _FAIL;
1702 }
1703 #endif
1704
1705 exit:
1706
1707
1708
1709 return status;
1710
1711 }
1712
rtl8188eu_inirp_deinit(PADAPTER Adapter)1713 unsigned int rtl8188eu_inirp_deinit(PADAPTER Adapter)
1714 {
1715
1716 rtw_read_port_cancel(Adapter);
1717
1718
1719 return _SUCCESS;
1720 }
1721
1722
1723
1724 /* -------------------------------------------------------------------------
1725 *
1726 * EEPROM Power index mapping
1727 *
1728 * ------------------------------------------------------------------------- */
1729
1730
1731 /* -------------------------------------------------------------------
1732 *
1733 * EEPROM/EFUSE Content Parsing
1734 *
1735 * ------------------------------------------------------------------- */
1736
1737 static void
_ReadLEDSetting(PADAPTER Adapter,u8 * PROMContent,BOOLEAN AutoloadFail)1738 _ReadLEDSetting(
1739 PADAPTER Adapter,
1740 u8 *PROMContent,
1741 BOOLEAN AutoloadFail
1742 )
1743 {
1744 #ifdef CONFIG_RTW_LED
1745 struct led_priv *pledpriv = adapter_to_led(Adapter);
1746 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1747 #ifdef CONFIG_RTW_SW_LED
1748 pledpriv->bRegUseLed = _TRUE;
1749
1750 switch (pHalData->CustomerID) {
1751 default:
1752 pledpriv->LedStrategy = SW_LED_MODE1;
1753 break;
1754 }
1755 pHalData->bLedOpenDrain = _TRUE;/* Support Open-drain arrangement for controlling the LED. Added by Roger, 2009.10.16. */
1756 #else /* HW LED */
1757 pledpriv->LedStrategy = HW_LED;
1758 #endif /* CONFIG_RTW_SW_LED */
1759 #endif
1760 }
1761
1762 static void
Hal_EfuseParsePIDVID_8188EU(PADAPTER pAdapter,u8 * hwinfo,BOOLEAN AutoLoadFail)1763 Hal_EfuseParsePIDVID_8188EU(
1764 PADAPTER pAdapter,
1765 u8 *hwinfo,
1766 BOOLEAN AutoLoadFail
1767 )
1768 {
1769
1770 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
1771
1772 if (!AutoLoadFail) {
1773 /* VID, PID */
1774 pHalData->EEPROMVID = ReadLE2Byte(&hwinfo[EEPROM_VID_88EU]);
1775 pHalData->EEPROMPID = ReadLE2Byte(&hwinfo[EEPROM_PID_88EU]);
1776
1777 /* Customer ID, 0x00 and 0xff are reserved for Realtek. */
1778 pHalData->EEPROMCustomerID = *(u8 *)&hwinfo[EEPROM_CustomID_88E];
1779 pHalData->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID;
1780
1781 } else {
1782 pHalData->EEPROMVID = EEPROM_Default_VID;
1783 pHalData->EEPROMPID = EEPROM_Default_PID;
1784
1785 /* Customer ID, 0x00 and 0xff are reserved for Realtek. */
1786 pHalData->EEPROMCustomerID = EEPROM_Default_CustomerID;
1787 pHalData->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID;
1788
1789 }
1790
1791 RTW_INFO("VID = 0x%04X, PID = 0x%04X\n", pHalData->EEPROMVID, pHalData->EEPROMPID);
1792 RTW_INFO("Customer ID: 0x%02X, SubCustomer ID: 0x%02X\n", pHalData->EEPROMCustomerID, pHalData->EEPROMSubCustomerID);
1793 }
1794
1795 static void
Hal_CustomizeByCustomerID_8188EU(PADAPTER padapter)1796 Hal_CustomizeByCustomerID_8188EU(
1797 PADAPTER padapter
1798 )
1799 {
1800 #if 0
1801 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
1802
1803 /* For customized behavior. */
1804 if ((pHalData->EEPROMVID == 0x103C) && (pHalData->EEPROMVID == 0x1629)) /* HP Lite-On for RTL8188CUS Slim Combo. */
1805 pHalData->CustomerID = RT_CID_819x_HP;
1806
1807 /* Decide CustomerID according to VID/DID or EEPROM */
1808 switch (pHalData->EEPROMCustomerID) {
1809 case EEPROM_CID_DEFAULT:
1810 if ((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3308))
1811 pHalData->CustomerID = RT_CID_DLINK;
1812 else if ((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3309))
1813 pHalData->CustomerID = RT_CID_DLINK;
1814 else if ((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x330a))
1815 pHalData->CustomerID = RT_CID_DLINK;
1816 break;
1817 case EEPROM_CID_WHQL:
1818 padapter->bInHctTest = TRUE;
1819
1820 pMgntInfo->bSupportTurboMode = FALSE;
1821 pMgntInfo->bAutoTurboBy8186 = FALSE;
1822
1823 pMgntInfo->PowerSaveControl.bInactivePs = FALSE;
1824 pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE;
1825 pMgntInfo->PowerSaveControl.bLeisurePs = FALSE;
1826 pMgntInfo->PowerSaveControl.bLeisurePsModeBackup = FALSE;
1827 pMgntInfo->keepAliveLevel = 0;
1828
1829 padapter->bUnloadDriverwhenS3S4 = FALSE;
1830 break;
1831 default:
1832 pHalData->CustomerID = RT_CID_DEFAULT;
1833 break;
1834
1835 }
1836
1837
1838 hal_CustomizedBehavior_8723U(padapter);
1839 #endif
1840 }
1841
1842 static void
readAdapterInfo_8188EU(PADAPTER padapter)1843 readAdapterInfo_8188EU(
1844 PADAPTER padapter
1845 )
1846 {
1847 PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
1848
1849 /* parse the eeprom/efuse content */
1850 Hal_EfuseParseIDCode88E(padapter, pHalData->efuse_eeprom_data);
1851 Hal_EfuseParsePIDVID_8188EU(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1852 hal_config_macaddr(padapter, pHalData->bautoload_fail_flag);
1853 Hal_ReadPowerSavingMode88E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1854 Hal_ReadTxPowerInfo88E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1855 Hal_EfuseParseEEPROMVer88E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1856 rtl8188e_EfuseParseChnlPlan(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1857 Hal_EfuseParseXtal_8188E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1858 Hal_EfuseParseCustomerID88E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1859 Hal_ReadAntennaDiversity88E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1860 Hal_EfuseParseBoardType88E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1861 Hal_ReadThermalMeter_88E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1862 Hal_ReadPAType_8188E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1863 Hal_ReadAmplifierType_8188E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1864 Hal_ReadRFEType_8188E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1865 #ifdef CONFIG_RF_POWER_TRIM
1866 Hal_ReadRFGainOffset(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1867 #endif /*CONFIG_RF_POWER_TRIM*/
1868
1869 /* */
1870 /* The following part initialize some vars by PG info. */
1871 /* */
1872
1873 #if defined(CONFIG_WOWLAN) && defined(CONFIG_SDIO_HCI)
1874 Hal_DetectWoWMode(padapter);
1875 #endif /* CONFIG_WOWLAN && CONFIG_SDIO_HCI */
1876
1877 Hal_CustomizeByCustomerID_8188EU(padapter);
1878
1879 _ReadLEDSetting(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1880 }
1881
_ReadPROMContent(PADAPTER Adapter)1882 static void _ReadPROMContent(
1883 PADAPTER Adapter
1884 )
1885 {
1886 PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
1887 u8 eeValue;
1888
1889 /* check system boot selection */
1890 eeValue = rtw_read8(Adapter, REG_9346CR);
1891 pHalData->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? _TRUE : _FALSE;
1892 pHalData->bautoload_fail_flag = (eeValue & EEPROM_EN) ? _FALSE : _TRUE;
1893
1894
1895 RTW_INFO("Boot from %s, Autoload %s !\n", (pHalData->EepromOrEfuse ? "EEPROM" : "EFUSE"),
1896 (pHalData->bautoload_fail_flag ? "Fail" : "OK"));
1897
1898 /* pHalData->EEType = IS_BOOT_FROM_EEPROM(Adapter) ? EEPROM_93C46 : EEPROM_BOOT_EFUSE; */
1899
1900 Hal_InitPGData88E(Adapter);
1901 readAdapterInfo_8188EU(Adapter);
1902 }
1903
1904
1905
1906 static void
_ReadRFType(PADAPTER Adapter)1907 _ReadRFType(
1908 PADAPTER Adapter
1909 )
1910 {
1911 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1912
1913 #if DISABLE_BB_RF
1914 pHalData->rf_chip = RF_PSEUDO_11N;
1915 #else
1916 pHalData->rf_chip = RF_6052;
1917 #endif
1918 }
1919
ReadAdapterInfo8188EU(PADAPTER Adapter)1920 static u8 ReadAdapterInfo8188EU(PADAPTER Adapter)
1921 {
1922 /* Read EEPROM size before call any EEPROM function */
1923 Adapter->EepromAddressSize = GetEEPROMSize8188E(Adapter);
1924
1925 _ReadRFType(Adapter);/* rf_chip->_InitRFType() */
1926 _ReadPROMContent(Adapter);
1927
1928 return _SUCCESS;
1929 }
1930
UpdateInterruptMask8188EU(PADAPTER padapter,u8 bHIMR0,u32 AddMSR,u32 RemoveMSR)1931 void UpdateInterruptMask8188EU(PADAPTER padapter, u8 bHIMR0 , u32 AddMSR, u32 RemoveMSR)
1932 {
1933 HAL_DATA_TYPE *pHalData;
1934
1935 u32 *himr;
1936 pHalData = GET_HAL_DATA(padapter);
1937
1938 if (bHIMR0)
1939 himr = &(pHalData->IntrMask[0]);
1940 else
1941 himr = &(pHalData->IntrMask[1]);
1942
1943 if (AddMSR)
1944 *himr |= AddMSR;
1945
1946 if (RemoveMSR)
1947 *himr &= (~RemoveMSR);
1948
1949 if (bHIMR0)
1950 rtw_write32(padapter, REG_HIMR_88E, *himr);
1951 else
1952 rtw_write32(padapter, REG_HIMRE_88E, *himr);
1953
1954 }
1955
SetHwReg8188EU(PADAPTER Adapter,u8 variable,u8 * val)1956 u8 SetHwReg8188EU(PADAPTER Adapter, u8 variable, u8 *val)
1957 {
1958 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1959 u8 ret = _SUCCESS;
1960
1961
1962 switch (variable) {
1963
1964 case HW_VAR_RXDMA_AGG_PG_TH:
1965 #ifdef CONFIG_USB_RX_AGGREGATION
1966 {
1967 /* threshold == 1 , Disable Rx-agg when AP is B/G mode or wifi_spec=1 to prevent bad TP. */
1968
1969 u8 threshold = *((u8 *)val);
1970
1971 if (threshold == 0) {
1972 switch (pHalData->rxagg_mode) {
1973 case RX_AGG_DMA:
1974 threshold = (pHalData->rxagg_dma_size & 0x0F);
1975 break;
1976 case RX_AGG_USB:
1977 case RX_AGG_MIX:
1978 threshold = (pHalData->rxagg_usb_size & 0x0F);
1979 break;
1980 case RX_AGG_DISABLE:
1981 default:
1982 break;
1983 }
1984 }
1985
1986 rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold);
1987
1988 #ifdef CONFIG_80211N_HT
1989 {
1990 /* 2014-07-24 Fix WIFI Logo -5.2.4/5.2.9 - DT3 low TP issue */
1991 /* Adjust RxAggrTimeout to close to zero disable RxAggr for RxAgg-USB mode, suggested by designer */
1992 /* Timeout value is calculated by 34 / (2^n) */
1993 struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
1994 struct ht_priv *phtpriv = &pmlmepriv->htpriv;
1995
1996 if (pHalData->rxagg_mode == RX_AGG_USB) {
1997 /* BG mode || (wifi_spec=1 && BG mode Testbed) */
1998 if ((threshold == 1) && (phtpriv->ht_option == _FALSE))
1999 rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH + 1, 0);
2000 else
2001 rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH + 1, pHalData->rxagg_usb_timeout);
2002 }
2003 }
2004 #endif/* CONFIG_80211N_HT */
2005 }
2006 #endif/* CONFIG_USB_RX_AGGREGATION */
2007 break;
2008 case HW_VAR_SET_RPWM:
2009 #ifdef CONFIG_LPS_LCLK
2010 {
2011 u8 ps_state = *((u8 *)val);
2012 /* rpwm value only use BIT0(clock bit) ,BIT6(Ack bit), and BIT7(Toggle bit) for 88e. */
2013 /* BIT0 value - 1: 32k, 0:40MHz. */
2014 /* BIT6 value - 1: report cpwm value after success set, 0:do not report. */
2015 /* BIT7 value - Toggle bit change. */
2016 /* modify by Thomas. 2012/4/2. */
2017 ps_state = ps_state & 0xC1;
2018 /* RTW_INFO("##### Change RPWM value to = %x for switch clk #####\n",ps_state); */
2019 rtw_write8(Adapter, REG_USB_HRPWM, ps_state);
2020 }
2021 #endif
2022 break;
2023 default:
2024 ret = SetHwReg8188E(Adapter, variable, val);
2025 break;
2026 }
2027
2028 return ret;
2029 }
2030
GetHwReg8188EU(PADAPTER Adapter,u8 variable,u8 * val)2031 void GetHwReg8188EU(PADAPTER Adapter, u8 variable, u8 *val)
2032 {
2033 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
2034
2035 switch (variable) {
2036 default:
2037 GetHwReg8188E(Adapter, variable, val);
2038 break;
2039 }
2040
2041 }
2042
2043 /*
2044 * Description:
2045 * Query setting of specified variable.
2046 * */
2047 u8
GetHalDefVar8188EUsb(PADAPTER Adapter,HAL_DEF_VARIABLE eVariable,void * pValue)2048 GetHalDefVar8188EUsb(
2049 PADAPTER Adapter,
2050 HAL_DEF_VARIABLE eVariable,
2051 void *pValue
2052 )
2053 {
2054 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
2055 u8 bResult = _SUCCESS;
2056
2057 switch (eVariable) {
2058 case HW_VAR_MAX_RX_AMPDU_FACTOR:
2059 *((u32 *)pValue) = MAX_AMPDU_FACTOR_64K;
2060 break;
2061
2062 case HAL_DEF_TX_LDPC:
2063 case HAL_DEF_RX_LDPC:
2064 *((u8 *)pValue) = _FALSE;
2065 break;
2066 case HAL_DEF_TX_STBC:
2067 *((u8 *)pValue) = 0;
2068 break;
2069 case HAL_DEF_RX_STBC:
2070 *((u8 *)pValue) = 1;
2071 break;
2072 default:
2073 bResult = GetHalDefVar8188E(Adapter, eVariable, pValue);
2074 break;
2075 }
2076
2077 return bResult;
2078 }
2079
2080
2081
2082
2083 /*
2084 * Description:
2085 * Change default setting of specified variable.
2086 * */
2087 u8
SetHalDefVar8188EUsb(PADAPTER Adapter,HAL_DEF_VARIABLE eVariable,void * pValue)2088 SetHalDefVar8188EUsb(
2089 PADAPTER Adapter,
2090 HAL_DEF_VARIABLE eVariable,
2091 void *pValue
2092 )
2093 {
2094 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
2095 u8 bResult = _SUCCESS;
2096
2097 switch (eVariable) {
2098 default:
2099 bResult = SetHalDefVar(Adapter, eVariable, pValue);
2100 break;
2101 }
2102
2103 return bResult;
2104 }
2105 #if 0
2106 u32 _update_92cu_basic_rate(_adapter *padapter, unsigned int mask)
2107 {
2108 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
2109 #ifdef CONFIG_BT_COEXIST
2110 struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist);
2111 #endif
2112 unsigned int BrateCfg = 0;
2113
2114 #ifdef CONFIG_BT_COEXIST
2115 if ((pbtpriv->BT_Coexist) && (pbtpriv->BT_CoexistType == BT_CSR_BC4))
2116 BrateCfg = mask & 0x151;
2117
2118 else
2119 #endif
2120 {
2121 /* if(pHalData->version_id != VERSION_TEST_CHIP_88C) */
2122 BrateCfg = mask & 0x15F;
2123 /* else //for 88CU 46PING setting, Disable CCK 2M, 5.5M, Others must tuning */
2124 /* BrateCfg = mask & 0x159; */
2125 }
2126
2127 BrateCfg |= 0x01; /* default enable 1M ACK rate */
2128
2129 return BrateCfg;
2130 }
2131 #endif
2132
rtl8188eu_init_default_value(_adapter * padapter)2133 static void rtl8188eu_init_default_value(_adapter *padapter)
2134 {
2135 PHAL_DATA_TYPE pHalData;
2136 struct pwrctrl_priv *pwrctrlpriv;
2137 u8 i;
2138
2139 pHalData = GET_HAL_DATA(padapter);
2140 pwrctrlpriv = adapter_to_pwrctl(padapter);
2141
2142
2143 /* init default value */
2144 pHalData->fw_ractrl = _FALSE;
2145 if (!pwrctrlpriv->bkeepfwalive)
2146 pHalData->LastHMEBoxNum = 0;
2147
2148 /* init dm default value */
2149 pHalData->bIQKInitialized = _FALSE;
2150
2151 pHalData->EfuseHal.fakeEfuseBank = 0;
2152 pHalData->EfuseHal.fakeEfuseUsedBytes = 0;
2153 _rtw_memset(pHalData->EfuseHal.fakeEfuseContent, 0xFF, EFUSE_MAX_HW_SIZE);
2154 _rtw_memset(pHalData->EfuseHal.fakeEfuseInitMap, 0xFF, EFUSE_MAX_MAP_LEN);
2155 _rtw_memset(pHalData->EfuseHal.fakeEfuseModifiedMap, 0xFF, EFUSE_MAX_MAP_LEN);
2156 }
2157
rtl8188eu_ps_func(PADAPTER Adapter,HAL_INTF_PS_FUNC efunc_id,u8 * val)2158 static u8 rtl8188eu_ps_func(PADAPTER Adapter, HAL_INTF_PS_FUNC efunc_id, u8 *val)
2159 {
2160 u8 bResult = _TRUE;
2161 switch (efunc_id) {
2162
2163 #if defined(CONFIG_AUTOSUSPEND) && defined(SUPPORT_HW_RFOFF_DETECTED)
2164 case HAL_USB_SELECT_SUSPEND: {
2165 u8 bfwpoll = *((u8 *)val);
2166 /* rtl8188e_set_FwSelectSuspend_cmd(Adapter,bfwpoll ,500); */ /* note fw to support hw power down ping detect */
2167 }
2168 break;
2169 #endif /* CONFIG_AUTOSUSPEND && SUPPORT_HW_RFOFF_DETECTED */
2170
2171 default:
2172 break;
2173 }
2174 return bResult;
2175 }
2176
rtl8188eu_set_hal_ops(_adapter * padapter)2177 void rtl8188eu_set_hal_ops(_adapter *padapter)
2178 {
2179 struct hal_ops *pHalFunc = &padapter->hal_func;
2180
2181
2182 pHalFunc->hal_power_on = _InitPowerOn_8188EU;
2183 pHalFunc->hal_power_off = hal_poweroff_8188eu;
2184
2185 pHalFunc->hal_init = &rtl8188eu_hal_init;
2186 pHalFunc->hal_deinit = &rtl8188eu_hal_deinit;
2187
2188 pHalFunc->inirp_init = &rtl8188eu_inirp_init;
2189 pHalFunc->inirp_deinit = &rtl8188eu_inirp_deinit;
2190
2191 pHalFunc->init_xmit_priv = &rtl8188eu_init_xmit_priv;
2192 pHalFunc->free_xmit_priv = &rtl8188eu_free_xmit_priv;
2193
2194 pHalFunc->init_recv_priv = &rtl8188eu_init_recv_priv;
2195 pHalFunc->free_recv_priv = &rtl8188eu_free_recv_priv;
2196 #ifdef CONFIG_RTW_SW_LED
2197 pHalFunc->InitSwLeds = &rtl8188eu_InitSwLeds;
2198 pHalFunc->DeInitSwLeds = &rtl8188eu_DeInitSwLeds;
2199 #endif/* CONFIG_RTW_SW_LED */
2200
2201 pHalFunc->init_default_value = &rtl8188eu_init_default_value;
2202 pHalFunc->intf_chip_configure = &rtl8188eu_interface_configure;
2203 pHalFunc->read_adapter_info = &ReadAdapterInfo8188EU;
2204 pHalFunc->set_hw_reg_handler = &SetHwReg8188EU;
2205 pHalFunc->GetHwRegHandler = &GetHwReg8188EU;
2206 pHalFunc->get_hal_def_var_handler = &GetHalDefVar8188EUsb;
2207 pHalFunc->SetHalDefVarHandler = &SetHalDefVar8188EUsb;
2208
2209 pHalFunc->SetBeaconRelatedRegistersHandler = &SetBeaconRelatedRegisters8188E;
2210
2211 pHalFunc->hal_xmit = &rtl8188eu_hal_xmit;
2212 pHalFunc->mgnt_xmit = &rtl8188eu_mgnt_xmit;
2213 pHalFunc->hal_xmitframe_enqueue = &rtl8188eu_hal_xmitframe_enqueue;
2214
2215
2216 #ifdef CONFIG_HOSTAPD_MLME
2217 pHalFunc->hostap_mgnt_xmit_entry = &rtl8188eu_hostap_mgnt_xmit_entry;
2218 #endif
2219 pHalFunc->interface_ps_func = &rtl8188eu_ps_func;
2220
2221 #ifdef CONFIG_XMIT_THREAD_MODE
2222 pHalFunc->xmit_thread_handler = &rtl8188eu_xmit_buf_handler;
2223 #endif
2224 #ifdef CONFIG_SUPPORT_USB_INT
2225 pHalFunc->interrupt_handler = interrupt_handler_8188eu;
2226 #endif
2227 rtl8188e_set_hal_ops(pHalFunc);
2228
2229 }
2230