xref: /OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rockchip_debugger.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1 /*
2  * (C) Copyright 2018 Rockchip Electronics Co., Ltd
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6 
7 #include <asm/io.h>
8 #include <common.h>
9 #include <irq-generic.h>
10 #include <rk_timer_irq.h>
11 
12 /*
13  * Currently, we support a timer timeout to generate a IRQ to dump cpu context.
14  */
15 #define ROCKCHIP_DEBUGGER_TIMEOUT	5	/* seconds */
16 
rockchip_debugger_isr(int irq,void * data)17 static void rockchip_debugger_isr(int irq, void *data)
18 {
19 	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
20 }
21 
rockchip_debugger_init(void)22 int rockchip_debugger_init(void)
23 {
24 	uint32_t load_count0, load_count1;
25 	uint64_t delay_c = ROCKCHIP_DEBUGGER_TIMEOUT * COUNTER_FREQUENCY;
26 
27 	if (!delay_c)
28 		return 0;
29 
30 	printf("Enable rockchip debugger\n");
31 
32 	/* Disable first */
33 	writel(0, TIMER_BASE + TIMER_CTRL);
34 
35 	/* Config */
36 	load_count0 = (uint32_t)(delay_c);
37 	load_count1 = (uint32_t)(delay_c >> 32);
38 	writel(load_count0, TIMER_BASE + TIMER_LOAD_COUNT0);
39 	writel(load_count1, TIMER_BASE + TIMER_LOAD_COUNT1);
40 	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
41 	writel(TIMER_EN | TIMER_INT_EN, TIMER_BASE + TIMER_CTRL);
42 
43 	/* Request irq */
44 	irq_install_handler(TIMER_IRQ, rockchip_debugger_isr, NULL);
45 	irq_handler_enable(TIMER_IRQ);
46 
47 	return 0;
48 }
49