1 // SPDX-License-Identifier: GPL-2.0
2
3 /* Copyright (c) 2018 Rockchip Electronics Co. Ltd. */
4
5 #include <asm/cacheflush.h>
6 #include <linux/clk.h>
7 #include <linux/dma-mapping.h>
8 #include <linux/interrupt.h>
9 #include <linux/iopoll.h>
10 #include <linux/irq.h>
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/platform_device.h>
14 #include <linux/sched.h>
15 #include <linux/slab.h>
16 #ifdef CONFIG_OF
17 #include <linux/of.h>
18 #endif
19
20 #include "sfc.h"
21 #include "rkflash_api.h"
22 #include "rkflash_blk.h"
23
24 #define RKSFC_VERSION_AND_DATE "rksfc_base v1.1 2016-01-08"
25 #define RKSFC_CLK_MAX_RATE (150 * 1000 * 1000)
26 #define RKSFC_DLL_THRESHOLD_RATE (50 * 1000 * 1000)
27
28 struct rksfc_info {
29 void __iomem *reg_base;
30 int irq;
31 int clk_rate;
32 struct clk *clk; /* sfc clk*/
33 struct clk *ahb_clk; /* ahb clk gate*/
34 u16 dll_cells;
35 };
36
37 static struct rksfc_info g_sfc_info;
38 static struct device *g_sfc_dev;
39 static struct completion sfc_irq_complete;
40
rksfc_dma_map_single(unsigned long ptr,int size,int dir)41 unsigned long rksfc_dma_map_single(unsigned long ptr, int size, int dir)
42 {
43 return dma_map_single(g_sfc_dev, (void *)ptr, size
44 , dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
45 }
46
rksfc_dma_unmap_single(unsigned long ptr,int size,int dir)47 void rksfc_dma_unmap_single(unsigned long ptr, int size, int dir)
48 {
49 dma_unmap_single(g_sfc_dev, (dma_addr_t)ptr, size
50 , dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
51 }
52
rksfc_interrupt(int irq,void * dev_id)53 static irqreturn_t rksfc_interrupt(int irq, void *dev_id)
54 {
55 sfc_clean_irq();
56 complete(&sfc_irq_complete);
57 return IRQ_HANDLED;
58 }
59
rksfc_irq_flag_init(void)60 void rksfc_irq_flag_init(void)
61 {
62 init_completion(&sfc_irq_complete);
63 }
64
rksfc_wait_for_irq_completed(void)65 void rksfc_wait_for_irq_completed(void)
66 {
67 wait_for_completion_timeout(&sfc_irq_complete,
68 msecs_to_jiffies(10));
69 }
70
rksfc_irq_config(int mode,void * pfun)71 static int rksfc_irq_config(int mode, void *pfun)
72 {
73 int ret = 0;
74 int irq = g_sfc_info.irq;
75
76 if (mode)
77 ret = request_irq(irq, pfun, 0, "rksfc",
78 g_sfc_info.reg_base);
79 else
80 free_irq(irq, NULL);
81 return ret;
82 }
83
rksfc_irq_init(void)84 static int rksfc_irq_init(void)
85 {
86 init_completion(&sfc_irq_complete);
87 rksfc_irq_config(1, rksfc_interrupt);
88 return 0;
89 }
90
rksfc_irq_deinit(void)91 static int rksfc_irq_deinit(void)
92 {
93 rksfc_irq_config(0, rksfc_interrupt);
94 return 0;
95 }
96
rksfc_delay_lines_tuning(void)97 static void rksfc_delay_lines_tuning(void)
98 {
99 u8 id[3], id_temp[3];
100 struct rk_sfc_op op;
101 u16 cell_max = (u16)sfc_get_max_dll_cells();
102 u16 right, left = 0;
103 u16 step = SFC_DLL_TRANING_STEP;
104 bool dll_valid = false;
105
106 op.sfcmd.d32 = 0;
107 op.sfcmd.b.cmd = 0x9F;
108 op.sfctrl.d32 = 0;
109
110 clk_set_rate(g_sfc_info.clk, RKSFC_DLL_THRESHOLD_RATE);
111 sfc_request(&op, 0, id, 3);
112 if ((0xFF == id[0] && 0xFF == id[1]) ||
113 (0x00 == id[0] && 0x00 == id[1])) {
114 dev_dbg(g_sfc_dev, "no dev, dll by pass\n");
115 clk_set_rate(g_sfc_info.clk, g_sfc_info.clk_rate);
116
117 return;
118 }
119
120 clk_set_rate(g_sfc_info.clk, g_sfc_info.clk_rate);
121 for (right = 0; right <= cell_max; right += step) {
122 int ret;
123
124 sfc_set_delay_lines(right);
125 sfc_request(&op, 0, id_temp, 3);
126 dev_dbg(g_sfc_dev, "dll read flash id:%x %x %x\n",
127 id_temp[0], id_temp[1], id_temp[2]);
128
129 ret = memcmp(&id, &id_temp, 3);
130 if (dll_valid && ret) {
131 right -= step;
132
133 break;
134 }
135 if (!dll_valid && !ret)
136 left = right;
137
138 if (!ret)
139 dll_valid = true;
140
141 /* Add cell_max to loop */
142 if (right == cell_max)
143 break;
144 if (right + step > cell_max)
145 right = cell_max - step;
146 }
147
148 if (dll_valid && (right - left) >= SFC_DLL_TRANING_VALID_WINDOW) {
149 if (left == 0 && right < cell_max)
150 g_sfc_info.dll_cells = left + (right - left) * 2 / 5;
151 else
152 g_sfc_info.dll_cells = left + (right - left) / 2;
153 } else {
154 g_sfc_info.dll_cells = 0;
155 }
156
157 if (g_sfc_info.dll_cells) {
158 dev_dbg(g_sfc_dev, "%d %d %d dll training success in %dMHz max_cells=%u sfc_ver=%d\n",
159 left, right, g_sfc_info.dll_cells, g_sfc_info.clk_rate,
160 sfc_get_max_dll_cells(), sfc_get_version());
161 sfc_set_delay_lines((u16)g_sfc_info.dll_cells);
162 } else {
163 dev_err(g_sfc_dev, "%d %d dll training failed in %dMHz, reduce the frequency\n",
164 left, right, g_sfc_info.clk_rate);
165 sfc_set_delay_lines(0);
166 clk_set_rate(g_sfc_info.clk, RKSFC_DLL_THRESHOLD_RATE);
167 g_sfc_info.clk_rate = clk_get_rate(g_sfc_info.clk);
168 }
169 }
170
rksfc_probe(struct platform_device * pdev)171 static int rksfc_probe(struct platform_device *pdev)
172 {
173 int irq;
174 struct resource *mem;
175 void __iomem *membase;
176 int dev_result = -1;
177 #ifdef CONFIG_ROCKCHIP_THUNDER_BOOT
178 u32 status;
179 #endif
180
181 g_sfc_dev = &pdev->dev;
182 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
183 membase = devm_ioremap_resource(&pdev->dev, mem);
184 if (!membase) {
185 dev_err(&pdev->dev, "no reg resource?\n");
186 return -1;
187 }
188
189 irq = platform_get_irq(pdev, 0);
190 if (irq < 0) {
191 dev_err(&pdev->dev, "no irq resource?\n");
192 return irq;
193 }
194
195 g_sfc_info.irq = irq;
196 g_sfc_info.reg_base = membase;
197 g_sfc_info.ahb_clk = devm_clk_get(&pdev->dev, "hclk_sfc");
198 g_sfc_info.clk = devm_clk_get(&pdev->dev, "clk_sfc");
199 if (unlikely(IS_ERR(g_sfc_info.clk)) ||
200 unlikely(IS_ERR(g_sfc_info.ahb_clk))) {
201 dev_err(&pdev->dev, "%s get clk error\n", __func__);
202 return -1;
203 }
204 clk_prepare_enable(g_sfc_info.ahb_clk);
205 g_sfc_info.clk_rate = clk_get_rate(g_sfc_info.clk);
206 if (g_sfc_info.clk_rate > RKSFC_CLK_MAX_RATE) {
207 clk_set_rate(g_sfc_info.clk, RKSFC_CLK_MAX_RATE);
208 g_sfc_info.clk_rate = clk_get_rate(g_sfc_info.clk);
209 }
210 clk_prepare_enable(g_sfc_info.clk);
211 dev_info(&pdev->dev,
212 "%s clk rate = %d\n",
213 __func__,
214 g_sfc_info.clk_rate);
215 rksfc_irq_init();
216 #ifdef CONFIG_ROCKCHIP_THUNDER_BOOT
217 if (readl_poll_timeout(membase + SFC_SR, status,
218 !(status & SFC_BUSY), 10,
219 500 * USEC_PER_MSEC))
220 dev_err(g_sfc_dev, "Wait for SFC idle timeout!\n");
221 #endif
222
223 sfc_init(g_sfc_info.reg_base);
224 if (sfc_get_version() >= SFC_VER_4 && g_sfc_info.clk_rate > RKSFC_DLL_THRESHOLD_RATE)
225 rksfc_delay_lines_tuning();
226 else if (sfc_get_version() >= SFC_VER_4)
227 sfc_set_delay_lines(0);
228
229 #ifdef CONFIG_RK_SFC_NOR
230 dev_result = rkflash_dev_init(g_sfc_info.reg_base, FLASH_TYPE_SFC_NOR, &sfc_nor_ops);
231 #endif
232 #ifdef CONFIG_RK_SFC_NAND
233 if (dev_result)
234 dev_result = rkflash_dev_init(g_sfc_info.reg_base, FLASH_TYPE_SFC_NAND, &sfc_nand_ops);
235 #endif
236
237 if (dev_result)
238 return dev_result;
239
240 return dma_set_mask(g_sfc_dev, DMA_BIT_MASK(32));
241 }
242
rksfc_suspend(struct device * dev)243 static int __maybe_unused rksfc_suspend(struct device *dev)
244 {
245 return rkflash_dev_suspend();
246 }
247
rksfc_resume(struct device * dev)248 static int __maybe_unused rksfc_resume(struct device *dev)
249 {
250 if (g_sfc_info.dll_cells)
251 sfc_set_delay_lines(g_sfc_info.dll_cells);
252 return rkflash_dev_resume(g_sfc_info.reg_base);
253 }
254
255 static SIMPLE_DEV_PM_OPS(rksfc_pmops,
256 rksfc_suspend,
257 rksfc_resume);
258
rksfc_shutdown(struct platform_device * pdev)259 static void rksfc_shutdown(struct platform_device *pdev)
260 {
261 rkflash_dev_shutdown();
262 }
263
264 #ifdef CONFIG_OF
265 static const struct of_device_id of_rksfc_match[] = {
266 {.compatible = "rockchip,sfc"},
267 {}
268 };
269 #endif
270
271 static struct platform_driver rksfc_driver = {
272 .probe = rksfc_probe,
273 .shutdown = rksfc_shutdown,
274 .driver = {
275 .name = "rksfc",
276 #ifdef CONFIG_OF
277 .of_match_table = of_rksfc_match,
278 #endif
279 .pm = &rksfc_pmops,
280 },
281 };
282
rksfc_driver_exit(void)283 static void __exit rksfc_driver_exit(void)
284 {
285 rkflash_dev_exit();
286 rksfc_irq_deinit();
287 platform_driver_unregister(&rksfc_driver);
288 }
289
rksfc_driver_init(void)290 static int __init rksfc_driver_init(void)
291 {
292 int ret = 0;
293
294 pr_err("%s\n", RKSFC_VERSION_AND_DATE);
295 ret = platform_driver_register(&rksfc_driver);
296 return ret;
297 }
298
299 module_init(rksfc_driver_init);
300 module_exit(rksfc_driver_exit);
301 MODULE_ALIAS("rksfc");
302