1 /* 2 * rk_aiq_types_awb_algo_int.h 3 4 * for rockchip v2.0.0 5 * 6 * Copyright (c) 2019 Rockchip Corporation 7 * 8 * Licensed under the Apache License, Version 2.0 (the "License"); 9 * you may not use this file except in compliance with the License. 10 * You may obtain a copy of the License at 11 * 12 * http://www.apache.org/licenses/LICENSE-2.0 13 * 14 * Unless required by applicable law or agreed to in writing, software 15 * distributed under the License is distributed on an "AS IS" BASIS, 16 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 17 * See the License for the specific language governing permissions and 18 * limitations under the License. 19 * 20 */ 21 /* for rockchip v2.0.0*/ 22 23 #ifndef __RK_AIQ_TYPE_AWB_ALGO_INT_H__ 24 #define __RK_AIQ_TYPE_AWB_ALGO_INT_H__ 25 26 #include "awb/rk_aiq_types_awb_algo.h" 27 #include "RkAiqCalibDbTypes.h" 28 #include "awb_head.h" 29 #include "awb_uapi_head.h" 30 #define RK_UAPI_AWB_CT_GRID_NUM 15 31 #define RK_UAPI_AWB_CT_LUT_NUM 8 32 typedef enum rk_aiq_wb_scene_e { 33 RK_AIQ_WBCT_INCANDESCENT = 0, 34 RK_AIQ_WBCT_FLUORESCENT, 35 RK_AIQ_WBCT_WARM_FLUORESCENT, 36 RK_AIQ_WBCT_DAYLIGHT, 37 RK_AIQ_WBCT_CLOUDY_DAYLIGHT, 38 RK_AIQ_WBCT_TWILIGHT, 39 RK_AIQ_WBCT_SHADE 40 } rk_aiq_wb_scene_t; 41 42 typedef struct rk_aiq_wb_cct_s { 43 float CCT; 44 float CCRI; 45 } rk_aiq_wb_cct_t; 46 47 typedef struct color_tempture_info_s { 48 bool valid; 49 float CCT; 50 float CCRI; 51 } color_tempture_info_t; 52 53 typedef struct awb_measure_blk_res_fl_s { 54 float R;//mean r value and normalize to 0~1 55 float G; 56 float B; 57 } awb_measure_blk_res_fl_t; 58 59 typedef enum rk_aiq_wb_mwb_mode_e { 60 RK_AIQ_MWB_MODE_INVAILD = 0, 61 RK_AIQ_MWB_MODE_CCT = 1, /**< run manual white balance by cct*/ 62 RK_AIQ_MWB_MODE_WBGAIN = 2, /**< run manual white balance by wbgain*/ 63 RK_AIQ_MWB_MODE_SCENE = 3, /**< run manual white balance by scene selection*/ 64 } rk_aiq_wb_mwb_mode_t; 65 66 typedef struct rk_aiq_wb_mwb_attrib_s { 67 rk_aiq_uapi_sync_t sync; 68 69 rk_aiq_wb_mwb_mode_t mode; 70 union MWBPara_u { 71 rk_aiq_wb_gain_t gain; 72 rk_aiq_wb_scene_t scene; 73 rk_aiq_wb_cct_t cct; 74 } para; 75 } rk_aiq_wb_mwb_attrib_t; 76 77 78 typedef enum rk_aiq_wb_awb_alg_method_s { 79 RK_AIQ_AWB_ALG_TYPE_INVAILD = 0, 80 RK_AIQ_AWB_ALG_TYPE_GLOABL = 1, 81 RK_AIQ_AWB_ALG_TYPE_GRAYWORD = 2, 82 //add more 83 } rk_aiq_wb_awb_alg_method_t; 84 85 typedef enum hdr_frame_choose_mode_e { 86 hdr_frame_choose_mode_manual = 0, 87 hdr_frame_choose_mode_auto 88 } hdr_frame_choose_mode_t; 89 90 typedef struct rk_aiq_wb_awb_cct_lut_cfg_lv_s { 91 float lv; 92 int ct_grid_num; 93 int cri_grid_num; 94 float ct_range[2];//min,max, equal distance sapmle 95 float cri_range[2];//min,max 96 float ct_lut_out[CALD_AWB_CT_GRID_NUM_MAX * CALD_AWB_CRI_GRID_NUM_MAX]; 97 float cri_lut_out[CALD_AWB_CT_GRID_NUM_MAX * CALD_AWB_CRI_GRID_NUM_MAX]; 98 } rk_aiq_wb_awb_cct_lut_cfg_lv_t; 99 100 typedef struct rk_aiq_wb_awb_attrib_s { 101 rk_aiq_wb_awb_alg_method_t algMethod; 102 CalibDb_Awb_tolerance_t tolerance;//wb gain diff th for awb gain update, set 0 to disable this function 103 CalibDb_Awb_runinterval_t runInterval; 104 bool cagaEn; 105 bool wbGainAdjustEn; 106 int cct_lut_cfg_num; 107 rk_aiq_wb_awb_cct_lut_cfg_lv_t cct_lut_cfg[CALD_AWB_CT_LV_NUM_MAX]; 108 bool wbGainClipEn; 109 bool wbGainDaylightClipEn; 110 CalibDb_Awb_Cct_Clip_Cfg_t cct_clip_cfg; 111 hdr_frame_choose_mode_t hdrFrameChooseMode; 112 unsigned char hdrFrameChoose; 113 CalibDb_StatWindow_t measeureWindow; 114 CalibDb_Awb_gain_offset_cfg_t wbGainOffset; 115 } rk_aiq_wb_awb_attrib_t; 116 117 typedef enum rk_aiq_wb_op_mode_s { 118 RK_AIQ_WB_MODE_MANUAL = 0, /**< run manual white balance */ 119 RK_AIQ_WB_MODE_AUTO = 1, /**< run auto white balance */ 120 RK_AIQ_WB_MODE_MAX 121 } rk_aiq_wb_op_mode_t; 122 123 typedef struct rk_aiq_uapiV2_wb_opMode_s { 124 rk_aiq_uapi_sync_t sync; 125 126 rk_aiq_wb_op_mode_t mode; 127 } rk_aiq_uapiV2_wb_opMode_t; 128 129 typedef struct rk_aiq_wb_attrib_s { 130 bool byPass; 131 rk_aiq_wb_op_mode_t mode; 132 rk_aiq_wb_mwb_attrib_t stManual; 133 rk_aiq_wb_awb_attrib_t stAuto; 134 } rk_aiq_wb_attrib_t; 135 136 typedef struct rk_aiq_wb_querry_info_s { 137 rk_aiq_wb_gain_t gain;//effective gain 138 rk_aiq_wb_cct_t cctGloabl; 139 bool awbConverged; 140 uint32_t LVValue; 141 rk_aiq_wb_gain_t stat_gain_glb; 142 rk_aiq_wb_gain_t stat_gain_blk; 143 } rk_aiq_wb_querry_info_t; 144 145 typedef enum rk_aiq_wb_lock_state_s { 146 RK_AIQ_WB_LOCK_INVALID = 0, /**< initialization value */ 147 RK_AIQ_WB_LOCKED, 148 RK_AIQ_WB_UNLOCKED, 149 RK_AIQ_WB_LOCK_MAX 150 } rk_aiq_wb_lock_state_t; 151 152 typedef enum awb_hardware_version_e 153 { 154 AWB_HARDWARE_V200 = 0, 155 AWB_HARDWARE_V201 = 1, 156 AWB_HARDWARE_V32 = 2, 157 AWB_HARDWARE_VMAX 158 } awb_hardware_version_t; 159 160 typedef enum { 161 AWB_CHANNEL_R = 0, 162 AWB_CHANNEL_GR, 163 AWB_CHANNEL_GB, 164 AWB_CHANNEL_B, 165 AWB_CHANNEL_MAX 166 } awb_channel_t; 167 168 typedef struct rk_aiq_uapiV2_wb_awb_wbGainAdjustLut_s { 169 // M4_NUMBER_DESC("lumaValue", "f32", M4_RANGE(0, 255000), "0", M4_DIGIT(0)) 170 float lumaValue; 171 // M4_NUMBER_DESC("ct_grid_num", "s32", M4_RANGE(0, 32), "0", M4_DIGIT(0)) 172 int ct_grid_num; 173 // M4_NUMBER_DESC("cri_grid_num", "s32", M4_RANGE(0, 32), "0", M4_DIGIT(0)) 174 int cri_grid_num; 175 // M4_ARRAY_DESC("ct_in_range", "f32", M4_SIZE(1,2), M4_RANGE(0,10000), "0", M4_DIGIT(0), M4_DYNAMIC(0)) 176 float ct_in_range[2];//min,max, equal distance sapmle 177 // M4_ARRAY_DESC("cri_in_range", "f32", M4_SIZE(1,2), M4_RANGE(-2,2), "0", M4_DIGIT(4), M4_DYNAMIC(0)) 178 float cri_in_range[2];//min,max 179 // M4_ARRAY_DESC("ct_lut_out", "f32", M4_SIZE(9,7), M4_RANGE(0,10000), "0", M4_DIGIT(0), M4_DYNAMIC(0)) 180 float *ct_lut_out;//size is ct_grid_num*cri_grid_num 181 // M4_ARRAY_DESC("cri_lut_out", "f32", M4_SIZE(9,7), M4_RANGE(-2,2), "0", M4_DIGIT(4), M4_DYNAMIC(0)) 182 float *cri_lut_out; 183 } rk_aiq_uapiV2_wb_awb_wbGainAdjustLut_t; 184 185 typedef struct rk_aiq_uapiV2_wb_awb_wbGainAdjust_s { 186 rk_aiq_uapi_sync_t sync; 187 188 // M4_BOOL_DESC("enable", "1") 189 bool enable; 190 // M4_STRUCT_LIST_DESC("lutAll", M4_SIZE(1,8), "normal_ui_style") 191 rk_aiq_uapiV2_wb_awb_wbGainAdjustLut_t *lutAll; 192 int lutAll_len; 193 } rk_aiq_uapiV2_wb_awb_wbGainAdjust_t; 194 195 typedef struct rk_aiq_uapiV2_wb_awb_wbGainOffset_s{ 196 rk_aiq_uapi_sync_t sync; 197 198 CalibDbV2_Awb_gain_offset_cfg_t gainOffset; 199 }rk_aiq_uapiV2_wb_awb_wbGainOffset_t; 200 201 202 typedef struct rk_aiq_uapiV2_wb_awb_mulWindow_s { 203 rk_aiq_uapi_sync_t sync; 204 205 CalibDbV2_Awb_Mul_Win_t multiWindw; 206 } rk_aiq_uapiV2_wb_awb_mulWindow_t; 207 208 209 typedef struct rk_aiq_uapiV2_wbV21_awb_attrib_s { 210 rk_aiq_uapiV2_wb_awb_wbGainAdjust_t wbGainAdjust; 211 CalibDbV2_Awb_gain_offset_cfg_t wbGainOffset; 212 } rk_aiq_uapiV2_wbV21_awb_attrib_t,rk_aiq_uapiV2_wbV30_awb_attrib_t; 213 214 typedef struct rk_aiq_uapiV2_wbV20_awb_attrib_s { 215 rk_aiq_uapiV2_wb_awb_wbGainAdjust_t wbGainAdjust; 216 CalibDbV2_Awb_gain_offset_cfg_t wbGainOffset; 217 CalibDbV2_Awb_Mul_Win_t multiWindow; 218 } rk_aiq_uapiV2_wbV20_awb_attrib_t; 219 220 typedef struct rk_aiq_uapiV2_wbV21_attrib_s { 221 rk_aiq_uapi_sync_t sync; 222 223 bool byPass; 224 rk_aiq_wb_op_mode_t mode; 225 rk_aiq_wb_mwb_attrib_t stManual; 226 rk_aiq_uapiV2_wbV30_awb_attrib_t stAuto; 227 } rk_aiq_uapiV2_wbV21_attrib_t; 228 229 typedef struct rk_aiq_uapiV2_wbV20_attrib_s { 230 bool byPass; 231 rk_aiq_wb_op_mode_t mode; 232 rk_aiq_wb_mwb_attrib_t stManual; 233 rk_aiq_uapiV2_wbV20_awb_attrib_t stAuto; 234 } rk_aiq_uapiV2_wbV20_attrib_t; 235 236 typedef rk_aiq_uapiV2_wbV21_attrib_t rk_aiq_uapiV2_wbV30_attrib_t; 237 238 typedef struct rk_aiq_uapiV2_wbV32_awb_mulWindow_s { 239 rk_aiq_uapi_sync_t sync; 240 bool enable; 241 float window[4][4];//percent 242 } rk_aiq_uapiV2_wbV32_awb_mulWindow_t; 243 244 typedef struct rk_aiq_uapiV2_wb_awb_cctClipCfg_s { 245 bool enable; 246 float cct[RK_UAPI_AWB_CT_GRID_NUM]; 247 int cct_len; 248 float cri_bound_up[RK_UAPI_AWB_CT_GRID_NUM]; 249 float cri_bound_low[RK_UAPI_AWB_CT_GRID_NUM]; 250 } rk_aiq_uapiV2_wb_awb_cctClipCfg_t; 251 252 typedef struct rk_aiq_uapiV2_wbV32_awb_gainAdjust_s { 253 bool enable; 254 CalibDbV2_Awb_Ctrl_Dat_Selt_t ctrlDataSelt; 255 CalibDbV2_Awb_Gain_Adj_Dat_Sl_t adjDataSelt; 256 CalibDbV2_Awb_Cct_Lut_Cfg_Lv2_t lutAll[RK_UAPI_AWB_CT_LUT_NUM]; 257 int lutAll_len; 258 } rk_aiq_uapiV2_wbV32_awb_gainAdjust_t; 259 260 typedef struct rk_aiq_uapiV2_wb_awb_dampFactor_s { 261 float dFStep; 262 float dFMin; 263 float dFMax; 264 } rk_aiq_uapiV2_wb_awb_dampFactor_t; 265 266 typedef struct rk_aiq_uapiV2_wbV32_awb_attrib_s { 267 rk_aiq_wb_awb_alg_method_t algMtdTp; 268 bool algMtdTp_valid; 269 rk_aiq_uapiV2_wb_awb_dampFactor_t dampFactor; 270 bool dampFactor_valid; 271 CalibDbV2_Awb_gain_offset_cfg_t wbGainOffset; 272 bool wbGainOffset_valid; 273 rk_aiq_uapiV2_wbV32_awb_mulWindow_t multiWindow; 274 bool multiWindow_valid; 275 CalibDbV2_Awb_DaylgtClip_Cfg_t wbGainDaylightClip; 276 bool wbGainDaylightClip_valid; 277 rk_aiq_uapiV2_wb_awb_cctClipCfg_t wbGainClip; 278 bool wbGainClip_valid; 279 rk_aiq_uapiV2_wbV32_awb_gainAdjust_t wbGainAdjust; 280 bool wbGainAdjust_valid; 281 282 } rk_aiq_uapiV2_wbV32_awb_attrib_t; 283 284 typedef struct rk_aiq_uapiV2_wbV32_attrib_t { 285 rk_aiq_uapi_sync_t sync; 286 287 bool byPass; 288 rk_aiq_wb_op_mode_t mode; 289 rk_aiq_wb_mwb_attrib_t stManual; 290 rk_aiq_uapiV2_wbV32_awb_attrib_t stAuto; 291 } rk_aiq_uapiV2_wbV32_attrib_t; 292 293 typedef struct rk_aiq_uapiV2_awb_wrtIn_attr_s { 294 rk_aiq_uapi_sync_t sync; 295 bool en; 296 int mode; 297 char path[100]; 298 int call_cnt; 299 } rk_aiq_uapiV2_awb_wrtIn_attr_t; 300 301 typedef struct rk_aiq_uapiV2_awb_ffwbgain_attr_s{ 302 rk_aiq_uapi_sync_t sync; 303 rk_aiq_wb_gain_t wggain; 304 }rk_aiq_uapiV2_awb_ffwbgain_attr_t; 305 306 #endif 307 308