1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * MFD core driver for Rockchip RK806
4 *
5 * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
6 *
7 * Author: Xu Shengfei <xsf@rock-chips.com>
8 */
9
10 #include <linux/interrupt.h>
11 #include <linux/mfd/core.h>
12 #include <linux/mfd/rk806.h>
13 #include <linux/module.h>
14 #include <linux/of_device.h>
15 #include <linux/of_gpio.h>
16 #include <linux/spi/spi.h>
17
18 #define TSD_TEMP_140 0x00
19 #define TSD_TEMP_160 0x01
20 #define VB_LO_ACT_SD 0x00
21 #define VB_LO_ACT_INT 0x01
22
23 static const struct reg_field rk806_reg_fields[] = {
24 [POWER_EN0] = REG_FIELD(0x00, 0, 7),
25 [POWER_EN1] = REG_FIELD(0x01, 0, 7),
26 [POWER_EN2] = REG_FIELD(0x02, 0, 7),
27 [POWER_EN3] = REG_FIELD(0x03, 0, 7),
28 [POWER_EN4] = REG_FIELD(0x04, 0, 7),
29 [POWER_EN5] = REG_FIELD(0x05, 0, 7),
30
31 [BUCK4_EN_MASK] = REG_FIELD(0x00, 7, 7),
32 [BUCK3_EN_MASK] = REG_FIELD(0x00, 6, 6),
33 [BUCK2_EN_MASK] = REG_FIELD(0x00, 5, 5),
34 [BUCK1_EN_MASK] = REG_FIELD(0x00, 4, 4),
35 [BUCK4_EN] = REG_FIELD(0X00, 3, 3),
36 [BUCK3_EN] = REG_FIELD(0X00, 2, 2),
37 [BUCK2_EN] = REG_FIELD(0X00, 1, 1),
38 [BUCK1_EN] = REG_FIELD(0X00, 0, 0),
39 [BUCK8_EN_MASK] = REG_FIELD(0x01, 7, 7),
40 [BUCK7_EN_MASK] = REG_FIELD(0x01, 6, 6),
41 [BUCK6_EN_MASK] = REG_FIELD(0x01, 5, 5),
42 [BUCK5_EN_MASK] = REG_FIELD(0x01, 4, 4),
43 [BUCK8_EN] = REG_FIELD(0x01, 3, 3),
44 [BUCK7_EN] = REG_FIELD(0x01, 2, 2),
45 [BUCK6_EN] = REG_FIELD(0x01, 1, 1),
46 [BUCK5_EN] = REG_FIELD(0x01, 0, 0),
47 [BUCK10_EN_MASK] = REG_FIELD(0x02, 5, 5),
48 [BUCK9_EN_MASK] = REG_FIELD(0x02, 4, 4),
49 [BUCK10_EN] = REG_FIELD(0x02, 1, 1),
50 [BUCK9_EN] = REG_FIELD(0x02, 0, 0),
51 [NLDO4_EN_MASK] = REG_FIELD(0x03, 7, 7),
52 [NLDO3_EN_MASK] = REG_FIELD(0x03, 6, 6),
53 [NLDO2_EN_MASK] = REG_FIELD(0x03, 5, 5),
54 [NLDO1_EN_MASK] = REG_FIELD(0x03, 4, 4),
55 [NLDO4_EN] = REG_FIELD(0x03, 3, 3),
56 [NLDO3_EN] = REG_FIELD(0x03, 2, 2),
57 [NLDO2_EN] = REG_FIELD(0x03, 1, 1),
58 [NLDO1_EN] = REG_FIELD(0x03, 0, 0),
59
60 [PLDO3_EN_MASK] = REG_FIELD(0x04, 7, 7),
61 [PLDO2_EN_MASK] = REG_FIELD(0x04, 6, 6),
62 [PLDO1_EN_MASK] = REG_FIELD(0x04, 5, 5),
63 [PLDO6_EN_MASK] = REG_FIELD(0x04, 4, 4),
64 [PLDO3_EN] = REG_FIELD(0x04, 3, 3),
65 [PLDO2_EN] = REG_FIELD(0x04, 2, 2),
66 [PLDO1_EN] = REG_FIELD(0x04, 1, 1),
67 [PLDO6_EN] = REG_FIELD(0x04, 0, 0),
68
69 [NLDO5_EN_MASK] = REG_FIELD(0x05, 6, 6),
70 [PLDO5_EN_MASK] = REG_FIELD(0x05, 5, 5),
71 [PLDO4_EN_MASK] = REG_FIELD(0x05, 4, 4),
72 [NLDO5_EN] = REG_FIELD(0x05, 2, 2),
73 [PLDO5_EN] = REG_FIELD(0x05, 1, 1),
74 [PLDO4_EN] = REG_FIELD(0x05, 0, 0),
75
76 [BUCK8_SLP_EN] = REG_FIELD(0x06, 7, 7),
77 [BUCK7_SLP_EN] = REG_FIELD(0x06, 6, 6),
78 [BUCK6_SLP_EN] = REG_FIELD(0x06, 5, 5),
79 [BUCK5_SLP_EN] = REG_FIELD(0x06, 4, 4),
80 [BUCK4_SLP_EN] = REG_FIELD(0x06, 3, 3),
81 [BUCK3_SLP_EN] = REG_FIELD(0x06, 2, 2),
82 [BUCK2_SLP_EN] = REG_FIELD(0x06, 1, 1),
83 [BUCK1_SLP_EN] = REG_FIELD(0x06, 0, 0),
84
85 [BUCK10_SLP_EN] = REG_FIELD(0x07, 7, 7),
86 [BUCK9_SLP_EN] = REG_FIELD(0x07, 6, 6),
87 [NLDO5_SLP_EN] = REG_FIELD(0x07, 4, 4),
88 [NLDO4_SLP_EN] = REG_FIELD(0x07, 3, 3),
89 [NLDO3_SLP_EN] = REG_FIELD(0x07, 2, 2),
90 [NLDO2_SLP_EN] = REG_FIELD(0x07, 1, 1),
91 [NLDO1_SLP_EN] = REG_FIELD(0x07, 0, 0),
92
93 [PLDO5_SLP_EN] = REG_FIELD(0x08, 5, 5),
94 [PLDO4_SLP_EN] = REG_FIELD(0x08, 4, 4),
95 [PLDO3_SLP_EN] = REG_FIELD(0x08, 3, 3),
96 [PLDO2_SLP_EN] = REG_FIELD(0x08, 2, 2),
97 [PLDO1_SLP_EN] = REG_FIELD(0x08, 1, 1),
98 [PLDO6_SLP_EN] = REG_FIELD(0x08, 0, 0),
99
100 [BUCK1_RATE] = REG_FIELD(0x10, 6, 7),
101 [BUCK2_RATE] = REG_FIELD(0x11, 6, 7),
102 [BUCK3_RATE] = REG_FIELD(0x12, 6, 7),
103 [BUCK4_RATE] = REG_FIELD(0x13, 6, 7),
104 [BUCK5_RATE] = REG_FIELD(0x14, 6, 7),
105 [BUCK6_RATE] = REG_FIELD(0x15, 6, 7),
106 [BUCK7_RATE] = REG_FIELD(0x16, 6, 7),
107 [BUCK8_RATE] = REG_FIELD(0x17, 6, 7),
108 [BUCK9_RATE] = REG_FIELD(0x18, 6, 7),
109 [BUCK10_RATE] = REG_FIELD(0x19, 6, 7),
110
111 [BUCK1_ON_VSEL] = REG_FIELD(0x1A, 0, 7),
112 [BUCK2_ON_VSEL] = REG_FIELD(0x1B, 0, 7),
113 [BUCK3_ON_VSEL] = REG_FIELD(0x1C, 0, 7),
114 [BUCK4_ON_VSEL] = REG_FIELD(0x1D, 0, 7),
115 [BUCK5_ON_VSEL] = REG_FIELD(0x1E, 0, 7),
116 [BUCK6_ON_VSEL] = REG_FIELD(0x1F, 0, 7),
117 [BUCK7_ON_VSEL] = REG_FIELD(0x20, 0, 7),
118 [BUCK8_ON_VSEL] = REG_FIELD(0x21, 0, 7),
119 [BUCK9_ON_VSEL] = REG_FIELD(0x22, 0, 7),
120 [BUCK10_ON_VSEL] = REG_FIELD(0x23, 0, 7),
121
122 [BUCK1_SLP_VSEL] = REG_FIELD(0x24, 0, 7),
123 [BUCK2_SLP_VSEL] = REG_FIELD(0x25, 0, 7),
124 [BUCK3_SLP_VSEL] = REG_FIELD(0x26, 0, 7),
125 [BUCK4_SLP_VSEL] = REG_FIELD(0x27, 0, 7),
126 [BUCK5_SLP_VSEL] = REG_FIELD(0x28, 0, 7),
127 [BUCK6_SLP_VSEL] = REG_FIELD(0x29, 0, 7),
128 [BUCK7_SLP_VSEL] = REG_FIELD(0x2A, 0, 7),
129 [BUCK8_SLP_VSEL] = REG_FIELD(0x2B, 0, 7),
130 [BUCK9_SLP_VSEL] = REG_FIELD(0x2C, 0, 7),
131 [BUCK10_SLP_VSEL] = REG_FIELD(0x2D, 0, 7),
132
133 [NLDO1_ON_VSEL] = REG_FIELD(0x43, 0, 7),
134 [NLDO2_ON_VSEL] = REG_FIELD(0x44, 0, 7),
135 [NLDO3_ON_VSEL] = REG_FIELD(0x45, 0, 7),
136 [NLDO4_ON_VSEL] = REG_FIELD(0x46, 0, 7),
137 [NLDO5_ON_VSEL] = REG_FIELD(0x47, 0, 7),
138 [NLDO1_SLP_VSEL] = REG_FIELD(0x48, 0, 7),
139 [NLDO2_SLP_VSEL] = REG_FIELD(0x49, 0, 7),
140 [NLDO3_SLP_VSEL] = REG_FIELD(0x4A, 0, 7),
141 [NLDO4_SLP_VSEL] = REG_FIELD(0x4B, 0, 7),
142 [NLDO5_SLP_VSEL] = REG_FIELD(0x4C, 0, 7),
143
144 [PLDO1_ON_VSEL] = REG_FIELD(0x4E, 0, 7),
145 [PLDO2_ON_VSEL] = REG_FIELD(0x4F, 0, 7),
146 [PLDO3_ON_VSEL] = REG_FIELD(0x50, 0, 7),
147 [PLDO4_ON_VSEL] = REG_FIELD(0x51, 0, 7),
148 [PLDO5_ON_VSEL] = REG_FIELD(0x52, 0, 7),
149 [PLDO6_ON_VSEL] = REG_FIELD(0x53, 0, 7),
150
151 [PLDO1_SLP_VSEL] = REG_FIELD(0x54, 0, 7),
152 [PLDO2_SLP_VSEL] = REG_FIELD(0x55, 0, 7),
153 [PLDO3_SLP_VSEL] = REG_FIELD(0x56, 0, 7),
154 [PLDO4_SLP_VSEL] = REG_FIELD(0x57, 0, 7),
155 [PLDO5_SLP_VSEL] = REG_FIELD(0x58, 0, 7),
156 [PLDO6_SLP_VSEL] = REG_FIELD(0x59, 0, 7),
157
158 [CHIP_NAME_H] = REG_FIELD(0x5A, 0, 7),
159 [CHIP_NAME_L] = REG_FIELD(0x5B, 4, 7),
160 [CHIP_VER] = REG_FIELD(0x5B, 0, 3),
161 [OTP_VER] = REG_FIELD(0x5C, 0, 3),
162 /* SYS_STS */
163 [PWRON_STS] = REG_FIELD(0x5D, 7, 7),
164 [VDC_STS] = REG_FIELD(0x5D, 6, 6),
165 [VB_UV_STSS] = REG_FIELD(0x5D, 5, 5),
166 [VB_LO_STS] = REG_FIELD(0x5D, 4, 4),
167 [HOTDIE_STS] = REG_FIELD(0x5D, 3, 3),
168 [TSD_STS] = REG_FIELD(0x5D, 2, 2),
169 [VB_OV_STS] = REG_FIELD(0x5D, 0, 0),
170 /* SYS_CFG0 */
171 [VB_UV_DLY] = REG_FIELD(0x5E, 7, 7),
172 [VB_UV_SEL] = REG_FIELD(0x5E, 4, 6),
173 [VB_LO_ACT] = REG_FIELD(0x5E, 3, 3),
174 [VB_LO_SEL] = REG_FIELD(0x5E, 0, 2),
175 /* SYS_CFG1 */
176 [ABNORDET_EN] = REG_FIELD(0x5F, 7, 7),
177 [TSD_TEMP] = REG_FIELD(0x5F, 6, 6),
178 [HOTDIE_TMP] = REG_FIELD(0x5F, 4, 5),
179 [SYS_OV_SD_EN] = REG_FIELD(0x5F, 3, 3),
180 [SYS_OV_SD_DLY_SEL] = REG_FIELD(0x5F, 2, 2),
181 [DLY_ABN_SHORT] = REG_FIELD(0x5F, 0, 1),
182 /* SYS_OPTION */
183 [VCCXDET_DIS] = REG_FIELD(0x61, 4, 5),
184 [OSC_TC] = REG_FIELD(0x61, 2, 3),
185 [ENB2_2M] = REG_FIELD(0x61, 1, 1),
186 [ENB_32K] = REG_FIELD(0x61, 0, 0),
187 /* SLEEP_CONFIG0 */
188 [PWRCTRL2_POL] = REG_FIELD(0x62, 7, 7),
189 [PWRCTRL2_FUN] = REG_FIELD(0x62, 4, 6),
190 [PWRCTRL1_POL] = REG_FIELD(0x62, 3, 3),
191 [PWRCTRL1_FUN] = REG_FIELD(0x62, 0, 2),
192 /* SLEEP_CONFIG1 */
193 [PWRCTRL3_POL] = REG_FIELD(0x63, 3, 3),
194 [PWRCTRL3_FUN] = REG_FIELD(0x63, 0, 2),
195 /* SLEEP_VSEL_CTR_SEL0 */
196 [BUCK4_VSEL_CTR_SEL] = REG_FIELD(0x65, 4, 5),
197 [BUCK3_VSEL_CTR_SEL] = REG_FIELD(0x65, 0, 1),
198 [BUCK2_VSEL_CTR_SEL] = REG_FIELD(0x64, 4, 5),
199 [BUCK1_VSEL_CTR_SEL] = REG_FIELD(0x64, 0, 1),
200 /* SLEEP_VSEL_CTR_SEL1 */
201 [BUCK8_VSEL_CTR_SEL] = REG_FIELD(0x67, 4, 5),
202 [BUCK7_VSEL_CTR_SEL] = REG_FIELD(0x67, 0, 1),
203 [BUCK6_VSEL_CTR_SEL] = REG_FIELD(0x66, 4, 5),
204 [BUCK5_VSEL_CTR_SEL] = REG_FIELD(0x66, 0, 1),
205 /* SLEEP_VSEL_CTR_SEL2 */
206 [NLDO2_VSEL_CTR_SEL] = REG_FIELD(0x69, 4, 5),
207 [NLDO1_VSEL_CTR_SEL] = REG_FIELD(0x69, 0, 1),
208 [BUCK10_VSEL_CTR_SEL] = REG_FIELD(0x68, 4, 5),
209 [BUCK9_VSEL_CTR_SEL] = REG_FIELD(0x68, 0, 1),
210 /* SLEEP_VSEL_CTR_SEL3 */
211 [NLDO5_VSEL_CTR_SEL] = REG_FIELD(0x6b, 0, 1),
212 [NLDO4_VSEL_CTR_SEL] = REG_FIELD(0x6a, 4, 5),
213 [NLDO3_VSEL_CTR_SEL] = REG_FIELD(0x6a, 0, 1),
214 /* SLEEP_VSEL_CTR_SEL4 */
215 [PLDO4_VSEL_CTR_SEL] = REG_FIELD(0x6d, 4, 5),
216 [PLDO3_VSEL_CTR_SEL] = REG_FIELD(0x6d, 0, 0),
217 [PLDO2_VSEL_CTR_SEL] = REG_FIELD(0x6c, 4, 5),
218 [PLDO1_VSEL_CTR_SEL] = REG_FIELD(0x6c, 0, 1),
219 /* SLEEP_VSEL_CTR_SEL5 */
220 [PLDO6_VSEL_CTR_SEL] = REG_FIELD(0x6e, 4, 5),
221 [PLDO5_VSEL_CTR_SEL] = REG_FIELD(0x6e, 0, 1),
222 /* DVS_CTRL_SEL0 */
223 [BUCK4_DVS_CTR_SEL] = REG_FIELD(0x65, 6, 7),
224 [BUCK3_DVS_CTR_SEL] = REG_FIELD(0x65, 2, 3),
225 [BUCK2_DVS_CTR_SEL] = REG_FIELD(0x64, 6, 7),
226 [BUCK1_DVS_CTR_SEL] = REG_FIELD(0x64, 2, 3),
227 /* DVS_CTRL_SEL1*/
228 [BUCK8_DVS_CTR_SEL] = REG_FIELD(0x67, 6, 7),
229 [BUCK7_DVS_CTR_SEL] = REG_FIELD(0x67, 2, 3),
230 [BUCK6_DVS_CTR_SEL] = REG_FIELD(0x66, 6, 7),
231 [BUCK5_DVS_CTR_SEL] = REG_FIELD(0x66, 2, 3),
232 /* DVS_CTRL_SEL2 */
233 [NLDO2_DVS_CTR_SEL] = REG_FIELD(0x69, 6, 7),
234 [NLDO1_DVS_CTR_SEL] = REG_FIELD(0x69, 2, 3),
235 [BUCK10_DVS_CTR_SEL] = REG_FIELD(0x68, 6, 7),
236 [BUCK9_DVS_CTR_SEL] = REG_FIELD(0x68, 2, 3),
237 /* DVS_CTRL_SEL3 */
238 [NLDO5_DVS_CTR_SEL] = REG_FIELD(0x6b, 2, 3),
239 [NLDO4_DVS_CTR_SEL] = REG_FIELD(0x6a, 6, 7),
240 [NLDO3_DVS_CTR_SEL] = REG_FIELD(0x6a, 2, 3),
241 /* DVS_CTRL_SEL4 */
242 [PLDO4_DVS_CTR_SEL] = REG_FIELD(0x6d, 6, 7),
243 [PLDO3_DVS_CTR_SEL] = REG_FIELD(0x6d, 2, 3),
244 [PLDO2_DVS_CTR_SEL] = REG_FIELD(0x6c, 6, 7),
245 [PLDO1_DVS_CTR_SEL] = REG_FIELD(0x6c, 2, 3),
246 /* DVS_CTRL_SEL5 */
247 [PLDO6_DVS_CTR_SEL] = REG_FIELD(0x6e, 6, 7),
248 [PLDO5_DVS_CTR_SEL] = REG_FIELD(0x6e, 2, 3),
249 /* DVS_START_CTRL */
250 [DVS_START3] = REG_FIELD(0x70, 2, 2),
251 [DVS_START2] = REG_FIELD(0x70, 1, 1),
252 [DVS_START1] = REG_FIELD(0x70, 0, 0),
253 /* SLEEP_GPIO */
254 [SLP3_DATA] = REG_FIELD(0x71, 6, 6),
255 [SLP2_DATA] = REG_FIELD(0x71, 5, 5),
256 [SLP1_DATA] = REG_FIELD(0x71, 4, 4),
257 [SLP3_DR] = REG_FIELD(0x71, 2, 2),
258 [SLP2_DR] = REG_FIELD(0x71, 1, 1),
259 [SLP1_DR] = REG_FIELD(0x71, 0, 0),
260 /* SYS_CFG3 */
261 [RST_FUN] = REG_FIELD(0x72, 6, 7),
262 [DEV_RST] = REG_FIELD(0x72, 5, 5),
263 [DEV_SLP] = REG_FIELD(0x72, 4, 4),
264 [SLAVE_RESTART_FUN] = REG_FIELD(0x72, 1, 1),
265 [DEV_OFF] = REG_FIELD(0x72, 0, 0),
266 [WDT_CLR] = REG_FIELD(0x73, 4, 4),
267 [WDT_EN] = REG_FIELD(0x73, 3, 3),
268 [WDT_SET] = REG_FIELD(0x73, 0, 3),
269 [ON_SOURCE] = REG_FIELD(0x74, 0, 7),
270 [OFF_SOURCE] = REG_FIELD(0x75, 0, 7),
271 /* PWRON_KEY */
272 [PWRON_ON_TIME] = REG_FIELD(0x76, 7, 7),
273 [PWRON_LP_ACT] = REG_FIELD(0x76, 6, 6),
274 [PWRON_LP_OFF_TIME] = REG_FIELD(0x76, 4, 5),
275 [PWRON_LP_TM_SEL] = REG_FIELD(0x76, 2, 3),
276 [PWRON_DB_SEL] = REG_FIELD(0x76, 0, 1),
277
278 /* GPIO_INT_CONFIG */
279 [INT_FUNCTION] = REG_FIELD(0x7b, 2, 2),
280 [INT_POL] = REG_FIELD(0x7b, 1, 1),
281 [INT_FC_EN] = REG_FIELD(0x7b, 0, 0),
282 [BUCK9_RATE2] = REG_FIELD(0xEA, 0, 0),
283 [BUCK10_RATE2] = REG_FIELD(0xEA, 1, 1),
284 [LDO_RATE] = REG_FIELD(0xEA, 3, 5),
285 [BUCK1_RATE2] = REG_FIELD(0xEB, 0, 0),
286 [BUCK2_RATE2] = REG_FIELD(0xEB, 1, 1),
287 [BUCK3_RATE2] = REG_FIELD(0xEB, 2, 2),
288 [BUCK4_RATE2] = REG_FIELD(0xEB, 3, 3),
289 [BUCK5_RATE2] = REG_FIELD(0xEB, 4, 4),
290 [BUCK6_RATE2] = REG_FIELD(0xEB, 5, 5),
291 [BUCK7_RATE2] = REG_FIELD(0xEB, 6, 6),
292 [BUCK8_RATE2] = REG_FIELD(0xEB, 7, 7),
293 };
294
295 static struct resource rk806_pwrkey_resources[] = {
296 DEFINE_RES_IRQ(RK806_IRQ_PWRON_FALL),
297 DEFINE_RES_IRQ(RK806_IRQ_PWRON_RISE),
298 };
299
300 static const struct mfd_cell rk806_cells[] = {
301 { .name = "rk806-pinctrl", },
302 {
303 .name = "rk805-pwrkey",
304 .num_resources = ARRAY_SIZE(rk806_pwrkey_resources),
305 .resources = &rk806_pwrkey_resources[0],
306 },
307 { .name = "rk806-regulator", },
308
309 };
310
311 static const struct regmap_irq rk806_irqs[] = {
312 /* INT_STS0 IRQs */
313 REGMAP_IRQ_REG(RK806_IRQ_PWRON_FALL, 0, RK806_INT_STS_PWRON_FALL),
314 REGMAP_IRQ_REG(RK806_IRQ_PWRON_RISE, 0, RK806_INT_STS_PWRON_RISE),
315 REGMAP_IRQ_REG(RK806_IRQ_PWRON, 0, RK806_INT_STS_PWRON),
316 REGMAP_IRQ_REG(RK806_IRQ_PWRON_LP, 0, RK806_INT_STS_PWRON_LP),
317 REGMAP_IRQ_REG(RK806_IRQ_HOTDIE, 0, RK806_INT_STS_HOTDIE),
318 REGMAP_IRQ_REG(RK806_IRQ_VDC_RISE, 0, RK806_INT_STS_VDC_RISE),
319 REGMAP_IRQ_REG(RK806_IRQ_VDC_FALL, 0, RK806_INT_STS_VDC_FALL),
320 REGMAP_IRQ_REG(RK806_IRQ_VB_LO, 0, RK806_INT_STS_VB_LO),
321 /* INT_STS1 IRQs */
322 REGMAP_IRQ_REG(RK806_IRQ_REV0, 1, RK806_INT_STS_REV0),
323 REGMAP_IRQ_REG(RK806_IRQ_REV1, 1, RK806_INT_STS_REV1),
324 REGMAP_IRQ_REG(RK806_IRQ_REV2, 1, RK806_INT_STS_REV2),
325 REGMAP_IRQ_REG(RK806_IRQ_CRC_ERROR, 1, RK806_INT_STS_CRC_ERROR),
326 REGMAP_IRQ_REG(RK806_IRQ_SLP3_GPIO, 1, RK806_INT_STS_SLP3_GPIO),
327 REGMAP_IRQ_REG(RK806_IRQ_SLP2_GPIO, 1, RK806_INT_STS_SLP2_GPIO),
328 REGMAP_IRQ_REG(RK806_IRQ_SLP1_GPIO, 1, RK806_INT_STS_SLP1_GPIO),
329 REGMAP_IRQ_REG(RK806_IRQ_WDT, 1, RK806_INT_STS_WDT),
330 };
331
332 static struct regmap_irq_chip rk806_irq_chip = {
333 .name = "rk806",
334 .irqs = rk806_irqs,
335 .num_irqs = ARRAY_SIZE(rk806_irqs),
336 .num_regs = 2,
337 .irq_reg_stride = 2,
338 .mask_base = RK806_INT_MSK0,
339 .status_base = RK806_INT_STS0,
340 .ack_base = RK806_INT_STS0,
341 .init_ack_masked = true,
342 };
343
344 static const struct regmap_range rk806_yes_ranges[] = {
345 /* regmap_reg_range(RK806_INT_STS0, RK806_GPIO_INT_CONFIG), */
346 regmap_reg_range(RK806_POWER_EN0, RK806_POWER_EN5),
347 regmap_reg_range(0x70, 0x7a),
348 };
349
350 static const struct regmap_access_table rk806_volatile_table = {
351 .yes_ranges = rk806_yes_ranges,
352 .n_yes_ranges = ARRAY_SIZE(rk806_yes_ranges),
353 };
354
355 const struct regmap_config rk806_regmap_config_spi = {
356 .reg_bits = 8,
357 .val_bits = 8,
358 .cache_type = REGCACHE_RBTREE,
359 .volatile_table = &rk806_volatile_table,
360 };
361 EXPORT_SYMBOL_GPL(rk806_regmap_config_spi);
362
363 static struct kobject *rk806_kobj[2];
364 static struct rk806 *rk806_master;
365 static struct rk806 *rk806_slaver;
366
rk806_master_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)367 static ssize_t rk806_master_store(struct device *dev,
368 struct device_attribute *attr,
369 const char *buf,
370 size_t count)
371 {
372 u32 input[2], addr, data;
373 struct rk806 *rk806;
374 char cmd;
375 int ret;
376
377 ret = sscanf(buf, "%c ", &cmd);
378 if (ret != 1) {
379 pr_err("Unknown command\n");
380 goto out;
381 }
382
383 rk806 = rk806_master;
384 if (!rk806) {
385 pr_err("error! rk806 master is NULL\n");
386 return 0;
387 }
388
389 switch (cmd) {
390 case 'w':
391 ret = sscanf(buf, "%c %x %x", &cmd, &input[0], &input[1]);
392 if (ret != 3) {
393 pr_err("error! cmd format: echo w [addr] [value]\n");
394 goto out;
395 };
396
397 addr = input[0] & 0xff;
398 data = input[1] & 0xff;
399 pr_info("cmd : %c %x %x\n\n", cmd, input[0], input[1]);
400
401 regmap_write(rk806->regmap, addr, data);
402 regmap_read(rk806->regmap, addr, &data);
403 pr_info("new: %x %x\n", addr, data);
404 break;
405 case 'r':
406 ret = sscanf(buf, "%c %x ", &cmd, &input[0]);
407 if (ret != 2) {
408 pr_err("error! cmd format: echo r [addr]\n");
409 goto out;
410 };
411
412 pr_info("cmd : %c %x\n\n", cmd, input[0]);
413 addr = input[0] & 0xff;
414
415 regmap_read(rk806->regmap, addr, &data);
416 pr_info("%x %x\n", input[0], data);
417 break;
418 default:
419 pr_err("Unknown command\n");
420 break;
421 }
422
423 out:
424 return count;
425 }
426
rk806_slaver_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)427 static ssize_t rk806_slaver_store(struct device *dev,
428 struct device_attribute *attr,
429 const char *buf,
430 size_t count)
431 {
432 u32 input[2], addr, data;
433 struct rk806 *rk806;
434 char cmd;
435 int ret;
436
437 ret = sscanf(buf, "%c ", &cmd);
438 if (ret != 1) {
439 pr_err("Unknown command\n");
440 goto out;
441 }
442
443 rk806 = rk806_slaver;
444 if (!rk806) {
445 pr_err("error! rk806 slaver is NULL\n");
446 return 0;
447 }
448
449 switch (cmd) {
450 case 'w':
451 ret = sscanf(buf, "%c %x %x", &cmd, &input[0], &input[1]);
452 if (ret != 3) {
453 pr_err("error! cmd format: echo w [addr] [value]\n");
454 goto out;
455 };
456
457 addr = input[0] & 0xff;
458 data = input[1] & 0xff;
459 pr_info("cmd : %c %x %x\n\n", cmd, input[0], input[1]);
460
461 regmap_write(rk806->regmap, addr, data);
462 regmap_read(rk806->regmap, addr, &data);
463 pr_info("new: %x %x\n", addr, data);
464 break;
465 case 'r':
466 ret = sscanf(buf, "%c %x ", &cmd, &input[0]);
467 if (ret != 2) {
468 pr_err("error! cmd format: echo r [addr]\n");
469 goto out;
470 };
471 pr_info("cmd : %c %x\n\n", cmd, input[0]);
472
473 addr = input[0] & 0xff;
474 regmap_read(rk806->regmap, addr, &data);
475 pr_info("%x %x\n", input[0], data);
476 break;
477 default:
478 pr_err("Unknown command\n");
479 break;
480 }
481
482 out:
483 return count;
484 }
485
486 static struct device_attribute rk806_master_attrs =
487 __ATTR(debug, 0200, NULL, rk806_master_store);
488
489 static struct device_attribute rk806_slaver_attrs =
490 __ATTR(debug, 0200, NULL, rk806_slaver_store);
491
rk806_field_read(struct rk806 * rk806,enum rk806_fields field_id)492 int rk806_field_read(struct rk806 *rk806,
493 enum rk806_fields field_id)
494 {
495 int ret;
496 int val;
497
498 ret = regmap_field_read(rk806->rmap_fields[field_id], &val);
499 if (ret < 0)
500 return ret;
501
502 return val;
503 }
504 EXPORT_SYMBOL_GPL(rk806_field_read);
505
rk806_field_write(struct rk806 * rk806,enum rk806_fields field_id,unsigned int val)506 int rk806_field_write(struct rk806 *rk806,
507 enum rk806_fields field_id,
508 unsigned int val)
509 {
510 return regmap_field_write(rk806->rmap_fields[field_id], val);
511 }
512 EXPORT_SYMBOL_GPL(rk806_field_write);
513
rk806_irq_init(struct rk806 * rk806)514 static void rk806_irq_init(struct rk806 *rk806)
515 {
516 /* INT pin polarity active low */
517 rk806_field_write(rk806, INT_POL, RK806_INT_POL_LOW);
518 }
519
rk806_pinctrl_init(struct rk806 * rk806)520 static int rk806_pinctrl_init(struct rk806 *rk806)
521 {
522 struct device *dev = rk806->dev;
523
524 rk806->pins = devm_kzalloc(dev,
525 sizeof(struct rk806_pin_info),
526 GFP_KERNEL);
527 if (!rk806->pins)
528 return -ENOMEM;
529
530 rk806->pins->p = devm_pinctrl_get(dev);
531 if (IS_ERR(rk806->pins->p)) {
532 rk806->pins->p = NULL;
533 dev_err(dev, "no pinctrl handle\n");
534 return 0;
535 }
536
537 rk806->pins->default_st = pinctrl_lookup_state(rk806->pins->p,
538 PINCTRL_STATE_DEFAULT);
539
540 if (IS_ERR(rk806->pins->default_st))
541 dev_err(dev, "no default pinctrl state\n");
542
543 rk806->pins->power_off = pinctrl_lookup_state(rk806->pins->p,
544 "pmic-power-off");
545 if (IS_ERR(rk806->pins->power_off)) {
546 rk806->pins->power_off = NULL;
547 dev_err(dev, "no power-off pinctrl state\n");
548 }
549
550 rk806->pins->sleep = pinctrl_lookup_state(rk806->pins->p,
551 "pmic-sleep");
552 if (IS_ERR(rk806->pins->sleep)) {
553 rk806->pins->sleep = NULL;
554 dev_err(dev, "no sleep-setting state\n");
555 }
556
557 rk806->pins->reset = pinctrl_lookup_state(rk806->pins->p,
558 "pmic-reset");
559 if (IS_ERR(rk806->pins->reset)) {
560 rk806->pins->reset = NULL;
561 dev_err(dev, "no reset-setting pinctrl state\n");
562 }
563
564 rk806->pins->dvs = pinctrl_lookup_state(rk806->pins->p,
565 "pmic-dvs");
566 if (IS_ERR(rk806->pins->dvs)) {
567 rk806->pins->dvs = NULL;
568 dev_err(dev, "no dvs-setting pinctrl state\n");
569 }
570
571 return 0;
572 }
573
rk806_vb_low_irq(int irq,void * rk806)574 static irqreturn_t rk806_vb_low_irq(int irq, void *rk806)
575 {
576 return IRQ_HANDLED;
577 }
578
rk806_low_power_irqs(struct rk806 * rk806)579 static int rk806_low_power_irqs(struct rk806 *rk806)
580 {
581 struct rk806_platform_data *pdata;
582 int ret, vb_lo_irq;
583
584 pdata = rk806->pdata;
585
586 if (!pdata->low_voltage_threshold)
587 return 0;
588
589 rk806_field_write(rk806, VB_LO_ACT, VB_LO_ACT_INT);
590
591 rk806_field_write(rk806, VB_LO_SEL,
592 (pdata->low_voltage_threshold - 2800) / 100);
593
594 vb_lo_irq = regmap_irq_get_virq(rk806->irq_data, RK806_IRQ_VB_LO);
595 if (vb_lo_irq < 0) {
596 dev_err(rk806->dev, "vb_lo_irq request failed!\n");
597 return vb_lo_irq;
598 }
599
600 ret = devm_request_threaded_irq(rk806->dev, vb_lo_irq,
601 NULL,
602 rk806_vb_low_irq,
603 IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
604 "rk806_vb_low", rk806);
605 if (ret) {
606 dev_err(rk806->dev, "vb_lo_irq request failed!\n");
607 return ret;
608 }
609
610 rk806->vb_lo_irq = vb_lo_irq;
611 disable_irq(rk806->vb_lo_irq);
612 enable_irq_wake(vb_lo_irq);
613
614 return 0;
615 }
616
rk806_parse_dt(struct rk806 * rk806)617 static int rk806_parse_dt(struct rk806 *rk806)
618 {
619 struct rk806_platform_data *pdata;
620 struct device *dev = rk806->dev;
621 int rst_fun;
622 int ret;
623
624 pdata = rk806->pdata;
625
626 pdata->shutdown_voltage_threshold = 2700;
627 pdata->shutdown_temperture_threshold = 160;
628 pdata->hotdie_temperture_threshold = 115;
629 pdata->force_shutdown_enable = 1;
630
631 ret = device_property_read_u32(dev,
632 "low_voltage_threshold",
633 &pdata->low_voltage_threshold);
634 if (ret < 0) {
635 pdata->low_voltage_threshold = 0;
636 dev_info(dev, "low_voltage_threshold missing!\n");
637 } else {
638 if ((pdata->low_voltage_threshold > 3500) ||
639 (pdata->low_voltage_threshold < 2800)) {
640 dev_err(dev, "low_voltage_threshold out [2800 3500]!\n");
641 pdata->low_voltage_threshold = 2800;
642 }
643 }
644 ret = device_property_read_u32(dev,
645 "shutdown_voltage_threshold",
646 &pdata->shutdown_voltage_threshold);
647 if (ret < 0) {
648 pdata->force_shutdown_enable = 0;
649 dev_info(dev, "shutdown_voltage_threshold missing!\n");
650 }
651
652 if ((pdata->shutdown_voltage_threshold > 3400) ||
653 (pdata->shutdown_voltage_threshold < 2700)) {
654 dev_err(dev, "shutdown_voltage_threshold out [2700 3400]!\n");
655 pdata->shutdown_voltage_threshold = 2700;
656 }
657
658 ret = device_property_read_u32(dev,
659 "shutdown_temperture_threshold",
660 &pdata->shutdown_temperture_threshold);
661 if (ret < 0)
662 dev_info(dev, "shutdown_temperture_threshold missing!\n");
663
664 ret = device_property_read_u32(dev,
665 "hotdie_temperture_threshold",
666 &pdata->hotdie_temperture_threshold);
667 if (ret < 0)
668 dev_info(dev, "hotdie_temperture_threshold missing!\n");
669
670 ret = device_property_read_u32(dev, "pmic-reset-func", &rst_fun);
671 if (ret < 0) {
672 dev_info(dev, "pmic-reset-func missing!\n");
673 rk806_field_write(rk806, RST_FUN, 0x00);
674 } else
675 rk806_field_write(rk806, RST_FUN, rst_fun);
676
677 /* PWRON_ON_TIME: 0:500mS; 1:20mS */
678 if (device_property_read_bool(dev, "pwron-on-time-500ms"))
679 rk806_field_write(rk806, PWRON_ON_TIME, 0x00);
680
681 return 0;
682 }
683
rk806_init(struct rk806 * rk806)684 static int rk806_init(struct rk806 *rk806)
685 {
686 struct rk806_platform_data *pdata;
687 int vb_uv_sel;
688
689 pdata = rk806->pdata;
690
691 if (pdata->force_shutdown_enable) {
692 if (pdata->shutdown_voltage_threshold <= 2700)
693 vb_uv_sel = VB_UV_SEL_2700;
694 else
695 vb_uv_sel = (pdata->shutdown_voltage_threshold - 2700) / 100;
696
697 rk806_field_write(rk806, VB_UV_SEL, vb_uv_sel);
698 }
699
700 if (pdata->hotdie_temperture_threshold >= 160)
701 rk806_field_write(rk806, TSD_TEMP, TSD_TEMP_160);
702
703 /* When the slave chip goes through a shutdown process, it will automatically trigger a restart */
704 rk806_field_write(rk806, SLAVE_RESTART_FUN, 0x01);
705 /* Digital output 2MHz clock force enable */
706 rk806_field_write(rk806, ENB2_2M, 0x01);
707
708 rk806_low_power_irqs(rk806);
709
710 return 0;
711 }
712
rk806_device_init(struct rk806 * rk806)713 int rk806_device_init(struct rk806 *rk806)
714 {
715 struct device_node *np = rk806->dev->of_node;
716 struct rk806_platform_data *pdata;
717 int name_h, name_l, chip_ver, otp_ver;
718 int on_source, off_source;
719 int ret;
720 int i;
721
722 pdata = devm_kzalloc(rk806->dev, sizeof(*pdata), GFP_KERNEL);
723 if (!pdata)
724 return -ENOMEM;
725
726 rk806->pdata = pdata;
727
728 for (i = 0; i < ARRAY_SIZE(rk806_reg_fields); i++) {
729 const struct reg_field *reg_fields = rk806_reg_fields;
730
731 rk806->rmap_fields[i] =
732 devm_regmap_field_alloc(rk806->dev,
733 rk806->regmap,
734 reg_fields[i]);
735 if (IS_ERR(rk806->rmap_fields[i])) {
736 dev_err(rk806->dev, "cannot allocate regmap field\n");
737 return PTR_ERR(rk806->rmap_fields[i]);
738 }
739 }
740
741 name_h = rk806_field_read(rk806, CHIP_NAME_H);
742 name_l = rk806_field_read(rk806, CHIP_NAME_L);
743 chip_ver = rk806_field_read(rk806, CHIP_VER);
744 otp_ver = rk806_field_read(rk806, OTP_VER);
745 dev_info(rk806->dev, "chip id: RK%x%x,ver:0x%x, 0x%x\n",
746 name_h, name_l, chip_ver, otp_ver);
747 if (chip_ver == VERSION_AB)
748 rk806_field_write(rk806, ABNORDET_EN, 0x01);
749
750 on_source = rk806_field_read(rk806, ON_SOURCE);
751 off_source = rk806_field_read(rk806, OFF_SOURCE);
752 dev_info(rk806->dev, "ON: 0x%x OFF:0x%x\n", on_source, off_source);
753
754 rk806_parse_dt(rk806);
755
756 rk806_irq_init(rk806);
757 ret = devm_regmap_add_irq_chip(rk806->dev,
758 rk806->regmap,
759 rk806->irq,
760 IRQF_ONESHOT | IRQF_SHARED,
761 0,
762 &rk806_irq_chip,
763 &rk806->irq_data);
764 if (ret) {
765 dev_err(rk806->dev, "Failed to add IRQ chip: err = %d\n", ret);
766 return ret;
767 }
768
769 ret = devm_mfd_add_devices(rk806->dev,
770 PLATFORM_DEVID_AUTO,
771 rk806_cells,
772 ARRAY_SIZE(rk806_cells),
773 NULL,
774 0,
775 regmap_irq_get_domain(rk806->irq_data));
776 if (ret < 0) {
777 dev_err(rk806->dev, "mfd_add_devices failed: %d\n", ret);
778 return ret;
779 }
780
781 rk806_pinctrl_init(rk806);
782 rk806_init(rk806);
783
784 if (strcmp(np->name, "rk806slave")) {
785 rk806_kobj[0] = kobject_create_and_add(np->name, NULL);
786 if (rk806_kobj[0]) {
787 ret = sysfs_create_file(rk806_kobj[0], &rk806_master_attrs.attr);
788 if (ret)
789 dev_err(rk806->dev, "create %s sysfs error\n", np->name);
790 else
791 rk806_master = rk806;
792 }
793 } else {
794 rk806_kobj[1] = kobject_create_and_add(np->name, NULL);
795 if (rk806_kobj[1]) {
796 ret = sysfs_create_file(rk806_kobj[1], &rk806_slaver_attrs.attr);
797 if (ret)
798 dev_err(rk806->dev, "create %s sysfs error\n", np->name);
799 else
800 rk806_slaver = rk806;
801 }
802 }
803
804 return 0;
805 }
806 EXPORT_SYMBOL_GPL(rk806_device_init);
807
rk806_device_exit(struct rk806 * rk806)808 int rk806_device_exit(struct rk806 *rk806)
809 {
810 struct device_node *np = rk806->dev->of_node;
811
812 if (strcmp(np->name, "rk806slave")) {
813 if (rk806_kobj[0]) {
814 sysfs_remove_file(rk806_kobj[0], &rk806_master_attrs.attr);
815 kobject_put(rk806_kobj[0]);
816 }
817 } else {
818 if (rk806_kobj[1]) {
819 sysfs_remove_file(rk806_kobj[1], &rk806_slaver_attrs.attr);
820 kobject_put(rk806_kobj[1]);
821 }
822 }
823
824 return 0;
825 }
826 EXPORT_SYMBOL_GPL(rk806_device_exit);
827
828 MODULE_AUTHOR("Xu Shengfei <xsf@rock-chips.com>");
829 MODULE_DESCRIPTION("rk806 MFD Driver");
830 MODULE_LICENSE("GPL v2");
831