1 /*
2 * Copyright 2016 Rockchip Electronics Co. LTD
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #define MODULE_TAG "rc_model_v2"
18
19 #include <math.h>
20 #include <string.h>
21
22 #include "mpp_env.h"
23 #include "mpp_mem.h"
24 #include "mpp_common.h"
25
26 #include "rc_debug.h"
27 #include "rc_ctx.h"
28 #include "rc_model_v2.h"
29
30 #define I_WINDOW_LEN 2
31 #define P_WINDOW1_LEN 5
32 #define P_WINDOW2_LEN 8
33
34 static const RK_S32 max_i_delta_qp[51] = {
35 640, 640, 640, 640, 640, 640, 640, 640, 640, 640, 640, 640, 640, 640,
36 576, 576, 512, 512, 448, 448, 384, 384, 320, 320, 320, 256, 256, 256,
37 192, 192, 192, 192, 192, 128, 128, 128, 128, 128, 128, 64, 64, 64,
38 64, 64, 64, 0, 0, 0, 0, 0, 0,
39 };
40
41 RK_S32 tab_lnx[64] = {
42 -1216, -972, -830, -729, -651, -587, -533, -486,
43 -445, -408, -374, -344, -316, -290, -265, -243,
44 -221, -201, -182, -164, -147, -131, -115, -100,
45 -86, -72, -59, -46, -34, -22, -11, 0,
46 10, 21, 31, 41, 50, 60, 69, 78,
47 86, 95, 87, 103, 111, 119, 127, 134,
48 142, 149, 156, 163, 170, 177, 183, 190,
49 196, 202, 208, 214, 220, 226, 232, 237,
50 };
51
52 RK_S32 mean_qp2scale[16] = {
53 14, 15, 16, 18, 20, 22, 25, 28,
54 32, 36, 40, 44, 50, 56, 64, 72
55 };
56 const RK_S8 max_ip_qp_dealt[8] = {
57 7, 7, 6, 6, 5, 5, 4, 4
58 };
59 RK_U32 bit2percent[100] = {
60 99, 99, 99, 99, 99, 99, 99, 99, 99, 99,
61 99, 95, 90, 85, 80, 75, 72, 69, 66, 64,
62 62, 59, 58, 57, 56, 55, 54, 53, 52, 51,
63 50, 49, 48, 47, 47, 46, 46, 45, 45, 44,
64 44, 43, 43, 43, 42, 42, 42, 41, 41, 41,
65 40, 40, 40, 39, 39, 39, 38, 38, 38, 37,
66 37, 37, 37, 37, 37, 37, 36, 36, 36, 36,
67 36, 36, 36, 35, 35, 35, 34, 34, 34, 34,
68 34, 33, 33, 33, 33, 33, 33, 33, 33, 33,
69 32, 32, 32, 32, 32, 32, 32, 32, 32, 32,
70 };
71
72 RK_S8 intra_qp_map[8] = {
73 0, 0, 1, 1, 2, 2, 2, 2,
74 };
75
bits_model_param_deinit(RcModelV2Ctx * ctx)76 MPP_RET bits_model_param_deinit(RcModelV2Ctx *ctx)
77 {
78 rc_dbg_func("enter %p\n", ctx);
79
80 if (ctx->i_bit != NULL) {
81 mpp_data_deinit_v2(ctx->i_bit);
82 ctx->i_bit = NULL;
83 }
84
85 if (ctx->p_bit != NULL) {
86 mpp_data_deinit_v2(ctx->p_bit);
87 ctx->p_bit = NULL;
88 }
89
90 if (ctx->vi_bit != NULL) {
91 mpp_data_deinit_v2(ctx->vi_bit);
92 ctx->vi_bit = NULL;
93 }
94
95 if (ctx->pre_p_bit != NULL) {
96 mpp_data_deinit_v2(ctx->pre_p_bit);
97 ctx->pre_p_bit = NULL;
98 }
99
100 if (ctx->pre_i_bit != NULL) {
101 mpp_data_deinit_v2(ctx->pre_i_bit);
102 ctx->pre_i_bit = NULL;
103 }
104
105 if (ctx->pre_i_mean_qp != NULL) {
106 mpp_data_deinit_v2(ctx->pre_i_mean_qp);
107 ctx->pre_i_mean_qp = NULL;
108 }
109
110 if (ctx->madi != NULL) {
111 mpp_data_deinit_v2(ctx->madi);
112 ctx->madi = NULL;
113 }
114 if (ctx->madp != NULL) {
115 mpp_data_deinit_v2(ctx->madp);
116 ctx->madp = NULL;
117 }
118
119 if (ctx->stat_rate != NULL) {
120 mpp_data_deinit_v2(ctx->stat_rate);
121 ctx->stat_rate = NULL;
122 }
123
124 if (ctx->stat_bits != NULL) {
125 mpp_data_deinit_v2(ctx->stat_bits);
126 ctx->stat_bits = NULL;
127 }
128 if (ctx->gop_bits != NULL) {
129 mpp_data_deinit_v2(ctx->gop_bits);
130 ctx->gop_bits = NULL;
131 }
132 rc_dbg_func("leave %p\n", ctx);
133 return MPP_OK;
134 }
135
bits_model_param_init(RcModelV2Ctx * ctx)136 MPP_RET bits_model_param_init(RcModelV2Ctx *ctx)
137 {
138 RK_S32 gop_len = ctx->usr_cfg.igop;
139 RcFpsCfg *fps = &ctx->usr_cfg.fps;
140 RK_U32 stat_len = fps->fps_out_num * ctx->usr_cfg.stats_time / fps->fps_out_denorm;
141 stat_len = stat_len ? stat_len : 1;
142
143 bits_model_param_deinit(ctx);
144 mpp_data_init_v2(&ctx->i_bit, I_WINDOW_LEN, 0);
145 if (ctx->i_bit == NULL) {
146 mpp_err("i_bit init fail");
147 return MPP_ERR_MALLOC;
148 }
149
150 mpp_data_init_v2(&ctx->vi_bit, I_WINDOW_LEN, 0);
151 if (ctx->vi_bit == NULL) {
152 mpp_err("vi_bit init fail");
153 return MPP_ERR_MALLOC;
154 }
155 mpp_data_init_v2(&ctx->p_bit, P_WINDOW1_LEN, 0);
156 if (ctx->p_bit == NULL) {
157 mpp_err("p_bit init fail");
158 return MPP_ERR_MALLOC;
159 }
160
161 mpp_data_init_v2(&ctx->pre_p_bit, P_WINDOW2_LEN, 0);
162 if (ctx->pre_p_bit == NULL) {
163 mpp_err("pre_p_bit init fail");
164 return MPP_ERR_MALLOC;
165 }
166
167 mpp_data_init_v2(&ctx->pre_i_bit, I_WINDOW_LEN, 0);
168 if (ctx->pre_i_bit == NULL) {
169 mpp_err("pre_i_bit init fail");
170 return MPP_ERR_MALLOC;
171 }
172
173 mpp_data_init_v2(&ctx->pre_i_mean_qp, I_WINDOW_LEN, -1);
174 if (ctx->pre_i_mean_qp == NULL) {
175 mpp_err("pre_i_mean_qp init fail");
176 return MPP_ERR_MALLOC;
177 }
178 mpp_data_init_v2(&ctx->madi, P_WINDOW2_LEN, 0);
179 if (ctx->madi == NULL) {
180 mpp_err("madi init fail");
181 return MPP_ERR_MALLOC;
182 }
183 mpp_data_init_v2(&ctx->madp, P_WINDOW2_LEN, 0);
184 if (ctx->madp == NULL) {
185 mpp_err("madp init fail");
186 return MPP_ERR_MALLOC;
187 }
188 mpp_data_init_v2(&ctx->stat_rate, fps->fps_out_num, 0);
189 if (ctx->stat_rate == NULL) {
190 mpp_err("stat_rate init fail fps_out_num %d", fps->fps_out_num);
191 return MPP_ERR_MALLOC;
192 }
193
194 mpp_data_init_v2(&ctx->stat_bits, stat_len, ctx->bit_per_frame);
195 if (ctx->stat_bits == NULL) {
196 mpp_err("stat_bits init fail stat_len %d", stat_len);
197 return MPP_ERR_MALLOC;
198 }
199
200 mpp_data_init_v2(&ctx->gop_bits, gop_len, 0);
201 if (ctx->gop_bits == NULL) {
202 mpp_err("gop_bits init fail gop_len %d", gop_len);
203 return MPP_ERR_MALLOC;
204 }
205
206 if (ctx->usr_cfg.refresh_len) {
207 mpp_data_init_v2(&ctx->i_refresh_bit, ctx->usr_cfg.refresh_len, 0);
208 if (ctx->i_refresh_bit == NULL) {
209 mpp_err("i_refresh_bit init fail refresh_len %d", ctx->usr_cfg.refresh_len);
210 return MPP_ERR_MALLOC;
211 }
212 }
213 return MPP_OK;
214 }
215
bits_frm_init(RcModelV2Ctx * ctx)216 void bits_frm_init(RcModelV2Ctx *ctx)
217 {
218 RcCfg *usr_cfg = &ctx->usr_cfg;
219 RK_U32 gop_len = usr_cfg->igop;
220 RK_U32 p_bit = 0;
221 RK_U32 refresh_bit = 0;
222
223 rc_dbg_func("enter %p\n", ctx);
224
225 switch (usr_cfg->gop_mode) {
226 case NORMAL_P: {
227 ctx->i_scale = ctx->usr_cfg.init_ip_ratio;
228 ctx->p_scale = 16;
229 if (gop_len <= 1)
230 p_bit = ctx->gop_total_bits * 16;
231 else
232 p_bit = ctx->gop_total_bits * 16 / (ctx->i_scale + ctx->p_scale * (gop_len - 1));
233 mpp_data_reset_v2(ctx->p_bit, p_bit);
234 ctx->p_sumbits = 5 * p_bit;
235 mpp_data_reset_v2(ctx->i_bit, p_bit * ctx->i_scale / 16);
236 ctx->i_sumbits = 2 * p_bit * ctx->i_scale / 16;
237 if (usr_cfg->refresh_len) {
238 ctx->i_refresh_scale = ctx->i_scale / usr_cfg->refresh_len + ctx->p_scale;
239 refresh_bit = ctx->gop_total_bits * 16 / (ctx->i_refresh_scale * usr_cfg->refresh_len
240 + ctx->p_scale * (gop_len - usr_cfg->refresh_len));
241 mpp_data_reset_v2(ctx->i_refresh_bit, refresh_bit);
242 ctx->i_refresh_sumbits = usr_cfg->refresh_len * refresh_bit;
243 }
244 } break;
245 case SMART_P: {
246 RK_U32 vi_num = 0;
247 mpp_assert(usr_cfg->vgop > 1);
248 ctx->i_scale = 320;
249 ctx->p_scale = 16;
250 ctx->vi_scale = 32;
251 vi_num = gop_len / usr_cfg->vgop;
252 if (vi_num > 0) {
253 vi_num = vi_num - 1;
254 }
255 p_bit = ctx->gop_total_bits * 16 / (ctx->i_scale + ctx->vi_scale * vi_num + ctx->p_scale * (gop_len - vi_num));
256 mpp_data_reset_v2(ctx->p_bit, p_bit);
257 ctx->p_sumbits = 5 * p_bit;
258
259 mpp_data_reset_v2(ctx->i_bit, p_bit * ctx->i_scale / 16);
260 ctx->i_sumbits = 2 * p_bit * ctx->i_scale / 16;
261
262 mpp_data_reset_v2(ctx->vi_bit, p_bit * ctx->vi_scale / 16);
263 ctx->vi_sumbits = 2 * p_bit * ctx->vi_scale / 16;
264 } break;
265 default:
266 break;
267 }
268 rc_dbg_rc("p_sumbits %d i_sumbits %d vi_sumbits %d\n", ctx->p_sumbits, ctx->i_sumbits, ctx->vi_sumbits);
269 rc_dbg_func("leave %p\n", ctx);
270 }
271
moving_judge_update(RcModelV2Ctx * ctx,EncRcTaskInfo * cfg)272 RK_S32 moving_judge_update(RcModelV2Ctx *ctx, EncRcTaskInfo *cfg)
273 {
274 switch (cfg->frame_type) {
275 case INTRA_FRAME: {
276 mpp_data_update_v2(ctx->pre_i_bit, cfg->bit_real);
277 mpp_data_update_v2(ctx->pre_i_mean_qp, cfg->quality_real);
278 } break;
279
280 case INTER_P_FRAME: {
281 mpp_data_update_v2(ctx->pre_p_bit, cfg->bit_real);
282 mpp_data_update_v2(ctx->madp, cfg->madp);
283 } break;
284
285 default:
286 break;
287 }
288 return 0;
289 }
290
bit_statics_update(RcModelV2Ctx * ctx,RK_U32 real_bit)291 void bit_statics_update(RcModelV2Ctx *ctx, RK_U32 real_bit)
292 {
293 RK_S32 mean_pbits, mean_ibits;
294 RcCfg *usr_cfg = &ctx->usr_cfg;
295 RK_U32 gop_len = usr_cfg->igop;
296
297 mpp_data_update_v2(ctx->gop_bits, real_bit);
298 mean_pbits = mpp_data_mean_v2(ctx->pre_p_bit);
299 mean_ibits = mpp_data_mean_v2(ctx->pre_i_bit);
300 ctx->real_gbits = mpp_data_sum_v2(ctx->gop_bits);
301 ctx->avg_gbits = (gop_len - 1) * (RK_S64)mean_pbits + mean_ibits;
302 }
303
bits_model_preset(RcModelV2Ctx * ctx,EncRcTaskInfo * info)304 MPP_RET bits_model_preset(RcModelV2Ctx *ctx, EncRcTaskInfo *info)
305 {
306 RcCfg *usr_cfg = &ctx->usr_cfg;
307 RK_S32 preset_bit = info->bit_target;
308 RK_S32 water_level = 0;
309
310 mpp_data_preset_v2(ctx->stat_rate, preset_bit != 0);
311 mpp_data_preset_v2(ctx->stat_bits, preset_bit);
312
313 ctx->ins_bps = mpp_data_sum_v2(ctx->stat_bits) / usr_cfg->stats_time;
314 if (preset_bit + ctx->stat_watl > ctx->watl_thrd)
315 water_level = ctx->watl_thrd - ctx->bit_per_frame;
316 else
317 water_level = preset_bit + ctx->stat_watl - ctx->bit_per_frame;
318
319 if (water_level < 0) {
320 water_level = 0;
321 }
322 ctx->stat_watl = water_level;
323 switch (info->frame_type) {
324 case INTRA_FRAME : {
325 mpp_data_preset_v2(ctx->i_bit, preset_bit);
326 ctx->i_sumbits = mpp_data_sum_v2(ctx->i_bit);
327 ctx->i_scale = 80 * ctx->i_sumbits / (2 * ctx->p_sumbits);
328 rc_dbg_rc("i_sumbits %d p_sumbits %d i_scale %d\n",
329 ctx->i_sumbits, ctx->p_sumbits, ctx->i_scale);
330 } break;
331 case INTER_P_FRAME : {
332 mpp_data_preset_v2(ctx->p_bit, preset_bit);
333 ctx->p_sumbits = mpp_data_sum_v2(ctx->p_bit);
334
335 /* Avoid div zero when P frame successive drop */
336 if (!ctx->p_sumbits)
337 ctx->p_sumbits = 1;
338
339 ctx->p_scale = 16;
340 } break;
341 case INTER_VI_FRAME : {
342 mpp_data_preset_v2(ctx->vi_bit, preset_bit);
343 ctx->vi_sumbits = mpp_data_sum_v2(ctx->vi_bit);
344 ctx->vi_scale = 80 * ctx->vi_sumbits / (2 * ctx->p_sumbits);
345 /* NOTE: vi_scale may be set to zero. So we should limit the range */
346 ctx->vi_scale = mpp_clip(ctx->vi_scale, 16, 320);
347 } break;
348 case INTRA_RFH_FRAME: {
349 mpp_data_update_v2(ctx->i_refresh_bit, preset_bit);
350 mpp_data_update_v2(ctx->madi, info->madi);
351 ctx->i_refresh_sumbits = mpp_data_sum_v2(ctx->i_refresh_bit);
352 ctx->i_refresh_scale = 80 * ctx->i_refresh_sumbits / (usr_cfg->refresh_len * ctx->p_sumbits);
353 ctx->i_refresh_scale = mpp_clip(ctx->i_refresh_scale, 16, 64);
354 } break;
355 default : {
356 } break;
357 }
358 return MPP_OK;
359 }
360
bits_model_update(RcModelV2Ctx * ctx,EncRcTaskInfo * cfg)361 MPP_RET bits_model_update(RcModelV2Ctx *ctx, EncRcTaskInfo *cfg)
362 {
363 RcCfg *usr_cfg = &ctx->usr_cfg;
364 RK_S32 real_bit = cfg->bit_real;
365 RK_U32 madi = cfg->madi;
366 RK_S32 water_level = 0;
367
368 rc_dbg_func("enter %p\n", ctx);
369
370 mpp_data_update_v2(ctx->stat_rate, real_bit != 0);
371 mpp_data_update_v2(ctx->stat_bits, real_bit);
372
373 ctx->ins_bps = mpp_data_sum_v2(ctx->stat_bits) / usr_cfg->stats_time;
374 if (real_bit + ctx->stat_watl > ctx->watl_thrd)
375 water_level = ctx->watl_thrd - ctx->bit_per_frame;
376 else
377 water_level = real_bit + ctx->stat_watl - ctx->bit_per_frame;
378
379 if (water_level < 0)
380 water_level = 0;
381
382 ctx->stat_watl = water_level;
383
384 switch (cfg->frame_type) {
385 case INTRA_FRAME : {
386 mpp_data_update_v2(ctx->i_bit, real_bit);
387 ctx->i_sumbits = mpp_data_sum_v2(ctx->i_bit);
388 ctx->i_scale = 80 * ctx->i_sumbits / (2 * ctx->p_sumbits);
389 rc_dbg_rc("i_sumbits %d p_sumbits %d i_scale %d\n",
390 ctx->i_sumbits, ctx->p_sumbits, ctx->i_scale);
391 } break;
392 case INTER_P_FRAME : {
393 mpp_data_update_v2(ctx->p_bit, real_bit);
394 mpp_data_update_v2(ctx->madi, madi);
395 ctx->p_sumbits = mpp_data_sum_v2(ctx->p_bit);
396
397 /* Avoid div zero when P frame successive drop */
398 if (!ctx->p_sumbits)
399 ctx->p_sumbits = 1;
400
401 ctx->p_scale = 16;
402 } break;
403 case INTER_VI_FRAME: {
404 mpp_data_update_v2(ctx->vi_bit, real_bit);
405 ctx->vi_sumbits = mpp_data_sum_v2(ctx->vi_bit);
406 ctx->vi_scale = 80 * ctx->vi_sumbits / (2 * ctx->p_sumbits);
407 /* NOTE: vi_scale may be set to zero. So we should limit the range */
408 ctx->vi_scale = mpp_clip(ctx->vi_scale, 16, 320);
409 } break;
410 case INTRA_RFH_FRAME: {
411 mpp_data_update_v2(ctx->i_refresh_bit, real_bit);
412 mpp_data_update_v2(ctx->madi, madi);
413 ctx->i_refresh_sumbits = mpp_data_sum_v2(ctx->i_refresh_bit);
414 ctx->i_refresh_scale = 80 * ctx->i_refresh_sumbits / (usr_cfg->refresh_len * ctx->p_sumbits);
415 ctx->i_refresh_scale = mpp_clip(ctx->i_refresh_scale, 16, 64);
416 } break;
417 default : {
418 } break;
419 }
420
421 rc_dbg_func("leave %p\n", ctx);
422 return MPP_OK;
423 }
424
bits_model_alloc(RcModelV2Ctx * ctx,EncRcTaskInfo * cfg,RK_S64 total_bits)425 MPP_RET bits_model_alloc(RcModelV2Ctx *ctx, EncRcTaskInfo *cfg, RK_S64 total_bits)
426 {
427 RcCfg *usr_cfg = &ctx->usr_cfg;
428 RK_U32 max_i_prop = usr_cfg->max_i_bit_prop * 16;
429 RK_S32 gop_len = usr_cfg->igop;
430 RK_S32 i_scale = ctx->i_scale;
431 RK_S32 vi_scale = ctx->vi_scale;
432 RK_S32 alloc_bits = 0;
433 RK_S32 super_bit_thr = 0x7fffffff;
434
435 ctx->i_scale = 80 * ctx->i_sumbits / (2 * ctx->p_sumbits);
436 i_scale = ctx->i_scale;
437
438 rc_dbg_func("enter %p\n", ctx);
439 rc_dbg_rc("frame_type %d max_i_prop %d i_scale %d total_bits %lld\n",
440 cfg->frame_type, max_i_prop, i_scale, total_bits);
441 if (usr_cfg->super_cfg.super_mode) {
442 super_bit_thr = usr_cfg->super_cfg.super_p_thd;
443 }
444 if (usr_cfg->gop_mode == SMART_P) {
445 RK_U32 vi_num = 0;
446 mpp_assert(usr_cfg->vgop > 1);
447 vi_num = gop_len / usr_cfg->vgop;
448 if (vi_num > 0) {
449 vi_num = vi_num - 1;
450 }
451 switch (cfg->frame_type) {
452 case INTRA_FRAME: {
453 i_scale = mpp_clip(i_scale, 16, 16000);
454 total_bits = total_bits * i_scale;
455 if (usr_cfg->super_cfg.super_mode) {
456 super_bit_thr = usr_cfg->super_cfg.super_i_thd;
457 }
458 } break;
459 case INTER_P_FRAME: {
460 i_scale = mpp_clip(i_scale, 16, max_i_prop);
461 total_bits = total_bits * 16;
462 } break;
463 case INTER_VI_FRAME: {
464 i_scale = mpp_clip(i_scale, 16, max_i_prop);
465 total_bits = total_bits * vi_scale;
466 } break;
467 default:
468 break;
469 }
470
471 alloc_bits = total_bits / (i_scale + 16 * (gop_len - vi_num) + vi_num * vi_scale);
472
473 if (!alloc_bits) {
474 mpp_log_f("found zero alloc bits\n");
475 mpp_log_f("total_bits %lld, i_scale %d, gop_len %d, vi_num %d, vi_scale %d",
476 total_bits, i_scale, gop_len, vi_num, vi_scale);
477 mpp_log_f("gop_total_bits %lld, i_sumbits %d, p_sumbits %d, vgop %d igop %d",
478 ctx->gop_total_bits, ctx->i_sumbits, ctx->p_sumbits, usr_cfg->vgop, usr_cfg->igop);
479 }
480 } else {
481 switch (cfg->frame_type) {
482 case INTRA_FRAME: {
483 i_scale = mpp_clip(i_scale, 16, 16000);
484 total_bits = total_bits * i_scale;
485 if (usr_cfg->super_cfg.super_mode) {
486 super_bit_thr = usr_cfg->super_cfg.super_i_thd;
487 }
488 } break;
489
490 case INTER_P_FRAME: {
491 i_scale = mpp_clip(i_scale, 16, max_i_prop);
492 total_bits = total_bits * 16;
493 } break;
494 case INTRA_RFH_FRAME: {
495 i_scale = mpp_clip(i_scale, 16, max_i_prop);
496 total_bits = total_bits * ctx->i_refresh_scale;
497 rc_dbg_rc("ctx->i_refresh_scale = %d", ctx->i_refresh_scale);
498 } break;
499 default:
500 break;
501 }
502 if (gop_len > 1) {
503 if (!usr_cfg->refresh_len || cfg->frame_type == INTRA_FRAME)
504 alloc_bits = total_bits / (i_scale + 16 * (gop_len - 1));
505 else
506 alloc_bits = total_bits /
507 (ctx->i_refresh_scale * usr_cfg->refresh_len +
508 16 * (gop_len - usr_cfg->refresh_len));
509 } else {
510 alloc_bits = total_bits / i_scale;
511 }
512 }
513 rc_dbg_rc("i_scale %d, total_bits %lld", i_scale, total_bits);
514 if (alloc_bits > super_bit_thr &&
515 (usr_cfg->super_cfg.rc_priority == MPP_ENC_RC_BY_FRM_SIZE_FIRST)) {
516 alloc_bits = super_bit_thr - (super_bit_thr >> 4);
517 rc_dbg_rc("alloc bits max then super_bit_thr %d", super_bit_thr);
518 }
519
520 ctx->cur_super_thd = super_bit_thr;
521 cfg->bit_target = alloc_bits;
522
523 mpp_assert(alloc_bits);
524
525 rc_dbg_func("leave %p\n", ctx);
526 return MPP_OK;
527 }
528
calc_next_i_ratio(RcModelV2Ctx * ctx)529 MPP_RET calc_next_i_ratio(RcModelV2Ctx *ctx)
530 {
531 RcCfg *usr_cfg = &ctx->usr_cfg;
532 RK_S32 max_i_prop = usr_cfg->max_i_bit_prop * 16;
533 RK_S32 gop_len = usr_cfg->igop;
534 RK_S32 pre_qp = ctx->pre_i_qp;
535 RK_S32 bits_alloc;
536
537 rc_dbg_func("enter %p\n", ctx);
538 if (gop_len > 1) {
539 bits_alloc = ctx->gop_total_bits * max_i_prop / (max_i_prop + 16 * (gop_len - 1));
540 } else {
541 bits_alloc = ctx->gop_total_bits * max_i_prop / max_i_prop;
542 }
543
544 if (ctx->pre_real_bits > bits_alloc || ctx->next_i_ratio) {
545 RK_S32 ratio = ((ctx->pre_real_bits - bits_alloc) << 8) / bits_alloc;
546
547 ratio = mpp_clip(ratio, -256, 256);
548 ratio = ctx->next_i_ratio + ratio;
549 if (ratio >= 0) {
550 if (ratio > max_i_delta_qp[pre_qp])
551 ratio = max_i_delta_qp[pre_qp];
552 } else {
553 ratio = 0;
554 }
555 ctx->next_i_ratio = ratio;
556 rc_dbg_rc("ctx->next_i_ratio %d", ctx->next_i_ratio);
557 }
558
559 rc_dbg_func("leave %p\n", ctx);
560 return MPP_OK;
561
562 }
563
calc_debreath_qp(RcModelV2Ctx * ctx)564 MPP_RET calc_debreath_qp(RcModelV2Ctx *ctx)
565 {
566 rc_dbg_func("enter %p\n", ctx);
567 RcDebreathCfg *debreath_cfg = &ctx->usr_cfg.debreath_cfg;
568 RK_S32 qp_start_sum = 0;
569 RK_S32 new_start_qp = 0;
570 RK_U8 idx2 = MPP_MIN(ctx->pre_iblk4_prop >> 5, (RK_S32)sizeof(intra_qp_map) - 1);
571
572 static RK_S8 strength_map[36] = {
573 0, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 4,
574 5, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8,
575 9, 9, 9, 10, 10, 10, 11, 11, 11, 12, 12, 12
576 };
577
578 qp_start_sum = MPP_MIN(ctx->gop_qp_sum / ctx->gop_frm_cnt, (RK_S32)sizeof(strength_map) - 1);
579
580 rc_dbg_qp("i start_qp %d, qp_start_sum = %d, intra_lv4_prop %d",
581 ctx->start_qp, qp_start_sum, ctx->pre_iblk4_prop);
582
583 RK_S32 dealt_qp = strength_map[debreath_cfg->strength] - intra_qp_map[idx2];
584 if (qp_start_sum > dealt_qp)
585 new_start_qp = qp_start_sum - dealt_qp;
586 else
587 new_start_qp = qp_start_sum;
588
589 ctx->start_qp = mpp_clip(new_start_qp, ctx->usr_cfg.min_i_quality, ctx->usr_cfg.max_i_quality);
590
591 rc_dbg_func("leave %p\n", ctx);
592 return MPP_OK;
593 }
594
calc_cbr_ratio(void * ctx,EncRcTaskInfo * cfg)595 MPP_RET calc_cbr_ratio(void *ctx, EncRcTaskInfo *cfg)
596 {
597 RcModelV2Ctx *p = (RcModelV2Ctx *)ctx;
598 RK_S32 target_bps = p->target_bps;
599 RK_S32 ins_bps = p->ins_bps;
600 RK_S32 pre_target_bits = p->pre_target_bits;
601 RK_S32 pre_real_bits = p->pre_real_bits;
602 RK_S32 pre_ins_bps = p->last_inst_bps;
603 RK_S32 idx1, idx2;
604 RK_S32 bit_diff_ratio, ins_ratio, bps_ratio, wl_ratio;
605 RK_S32 fluc_l = 3;
606
607 rc_dbg_func("enter %p\n", p);
608
609 rc_dbg_bps("%10s|%10s|%10s|%10s|%10s|%8s", "r_bits", "t_bits", "ins_bps", "p_ins_bps", "target_bps", "watl");
610 rc_dbg_bps("%10d %10d %10d %10d %10d %8d", pre_real_bits, pre_target_bits, ins_bps, pre_ins_bps, target_bps, p->stat_watl >> 10);
611
612 bits_model_alloc(p, cfg, p->gop_total_bits);
613
614 mpp_assert(target_bps > 0);
615
616 if (pre_target_bits > pre_real_bits)
617 bit_diff_ratio = 52 * (pre_real_bits - pre_target_bits) / pre_target_bits;
618 else
619 bit_diff_ratio = 64 * (pre_real_bits - pre_target_bits) / pre_target_bits;
620
621 idx1 = (ins_bps << 5) / target_bps;
622 idx2 = (pre_ins_bps << 5) / target_bps;
623
624 idx1 = mpp_clip(idx1, 0, 63);
625 idx2 = mpp_clip(idx2, 0, 63);
626 ins_ratio = tab_lnx[idx1] - tab_lnx[idx2]; // %3
627
628 /*ins_bps is increase and pre_ins > target_bps*15/16 will raise up ins_ratio to decrease bit
629 *ins_bps is decresase and pre_ins < target_bps*17/16 will decrease ins_ratio to increase bit
630 */
631
632 if (ins_bps > pre_ins_bps && target_bps - pre_ins_bps < (target_bps >> 4)) { // %6
633 ins_ratio = 6 * ins_ratio;
634 } else if ( ins_bps < pre_ins_bps && pre_ins_bps - target_bps < (target_bps >> 4)) {
635 ins_ratio = 4 * ins_ratio;
636 } else {
637 ins_ratio = 0;
638 }
639
640 bit_diff_ratio = mpp_clip(bit_diff_ratio, -128, 256);
641
642 ins_ratio = mpp_clip(ins_ratio, -128, 256);
643
644 bps_ratio = (ins_bps - target_bps) * fluc_l / (target_bps >> 4);
645 wl_ratio = 4 * (p->stat_watl - p->watl_base) * fluc_l / p->watl_base;
646 bps_ratio = mpp_clip(bps_ratio, -32, 32);
647 wl_ratio = mpp_clip(wl_ratio, -16, 32);
648 p->next_ratio = bit_diff_ratio + ins_ratio + bps_ratio + wl_ratio;
649
650 rc_dbg_qp("%10s|%10s|%10s|%10s|%10s|%10s", "diff_ratio", "ins_ratio", "bps_ratio",
651 "wl_ratio", "next_ratio", "cur_qp_s");
652 rc_dbg_qp("%10d %10d %10d %10d %10d|%10d", bit_diff_ratio, ins_ratio - bit_diff_ratio,
653 bps_ratio, wl_ratio, p->next_ratio, p->cur_scale_qp);
654
655 rc_dbg_func("leave %p\n", p);
656 return MPP_OK;
657 }
658
reenc_calc_super_frm_ratio(void * ctx,EncRcTaskInfo * cfg)659 MPP_RET reenc_calc_super_frm_ratio(void *ctx, EncRcTaskInfo *cfg)
660 {
661 RcModelV2Ctx *p = (RcModelV2Ctx *)ctx;
662
663 rc_dbg_func("enter %p\n", p);
664 p->next_ratio = 160 * (4 * (cfg->bit_real - p->cur_super_thd) / cfg->bit_target);
665 p->next_ratio = mpp_clip(p->next_ratio, 128, 640);
666 rc_dbg_func("leave %p\n", p);
667 return MPP_OK;
668 }
669
reenc_calc_cbr_ratio(void * ctx,EncRcTaskInfo * cfg)670 MPP_RET reenc_calc_cbr_ratio(void *ctx, EncRcTaskInfo *cfg)
671 {
672 RcModelV2Ctx *p = (RcModelV2Ctx *)ctx;
673 RcCfg *usr_cfg = &p->usr_cfg;
674 RK_S32 stat_time = usr_cfg->stats_time;
675 RK_S32 pre_ins_bps = mpp_data_sum_v2(p->stat_bits) / stat_time;
676 RK_S32 ins_bps = (pre_ins_bps * stat_time - mpp_data_get_pre_val_v2(p->stat_bits, -1) + cfg->bit_real) / stat_time;
677 RK_S32 real_bit = cfg->bit_real;
678 RK_S32 target_bit = cfg->bit_target;
679 RK_S32 target_bps = p->target_bps;
680 RK_S32 water_level = 0;
681 RK_S32 idx1, idx2;
682 RK_S32 bit_diff_ratio, ins_ratio, bps_ratio, wl_ratio;
683 RK_S32 mb_w = MPP_ALIGN(usr_cfg->width, 16) / 16;
684 RK_S32 mb_h = MPP_ALIGN(usr_cfg->height, 16) / 16;
685
686 rc_dbg_func("enter %p\n", p);
687
688 if (p->cur_super_thd <= cfg->bit_real &&
689 usr_cfg->super_cfg.rc_priority == MPP_ENC_RC_BY_FRM_SIZE_FIRST) {
690 return reenc_calc_super_frm_ratio(ctx, cfg);
691 }
692
693 if (real_bit + p->stat_watl > p->watl_thrd)
694 water_level = p->watl_thrd - p->bit_per_frame;
695 else
696 water_level = real_bit + p->stat_watl - p->bit_per_frame;
697
698 if (water_level < 0) {
699 water_level = 0;
700 }
701
702 if (target_bit > real_bit)
703 bit_diff_ratio = 32 * (real_bit - target_bit) / real_bit;
704 else
705 bit_diff_ratio = 32 * (real_bit - target_bit) / target_bit;
706
707 idx1 = ins_bps / (target_bps >> 5);
708 idx2 = pre_ins_bps / (target_bps >> 5);
709
710 idx1 = mpp_clip(idx1, 0, 63);
711 idx2 = mpp_clip(idx2, 0, 63);
712 ins_ratio = tab_lnx[idx1] - tab_lnx[idx2];
713
714 bps_ratio = 96 * (ins_bps - target_bps) / target_bps;
715 wl_ratio = 32 * (water_level - p->watl_base) / p->watl_base;
716 if (pre_ins_bps < ins_bps && target_bps != pre_ins_bps) {
717 ins_ratio = 6 * ins_ratio;
718 ins_ratio = mpp_clip(ins_ratio, -192, 256);
719 } else {
720 if (cfg->frame_type == INTRA_FRAME) {
721 ins_ratio = 3 * ins_ratio;
722 ins_ratio = mpp_clip(ins_ratio, -192, 256);
723 } else {
724 ins_ratio = 0;
725 }
726 }
727
728 bit_diff_ratio = mpp_clip(bit_diff_ratio, -128, 256);
729 bps_ratio = mpp_clip(bps_ratio, -32, 32);
730 wl_ratio = mpp_clip(wl_ratio, -32, 32);
731 p->next_ratio = bit_diff_ratio + ins_ratio + bps_ratio + wl_ratio;
732 if (cfg->frame_type == INTRA_FRAME && (cfg->madi > 0)) {
733 RK_U32 tar_bpp = target_bit / (mb_w * mb_h);
734 float lnb_t = log(tar_bpp);
735 float c = 6.7204, a = -0.1435, b = 0.0438;
736 float start_qp = (p->cur_scale_qp >> 6);
737 int qp_c = ((lnb_t - cfg->madi * b - c) / a + 14);
738 if (qp_c > start_qp)
739 p->next_ratio = (qp_c << 6) - p->cur_scale_qp;
740 }
741 rc_dbg_rc("cbr target_bit %d real_bit %d reenc next ratio %d", target_bit, real_bit, p->next_ratio);
742 rc_dbg_func("leave %p\n", p);
743 return MPP_OK;
744 }
745
rc_hier_calc_dealt_qp(RcModelV2Ctx * p,EncRcTaskInfo * info)746 void rc_hier_calc_dealt_qp(RcModelV2Ctx *p, EncRcTaskInfo *info)
747 {
748 RcHierQPCfg *hier_qp_cfg = &p->usr_cfg.hier_qp_cfg;
749
750 if (!hier_qp_cfg->hier_qp_en)
751 return;
752
753 if (info->frame_type == INTRA_FRAME || info->frame_type == INTER_VI_FRAME) {
754 p->hier_frm_cnt[3] = 0;
755 p->hier_frm_cnt[2] = 0;
756 p->hier_frm_cnt[1] = 0;
757 p->hier_frm_cnt[0] = 0;
758 p->qp_layer_id = 0;
759 } else {
760 if (p->hier_frm_cnt[3] < hier_qp_cfg->hier_frame_num[3]) {
761 p->hier_frm_cnt[3]++;
762 p->qp_layer_id = 4;
763 } else if (p->hier_frm_cnt[2] < hier_qp_cfg->hier_frame_num[2]) {
764 p->hier_frm_cnt[2]++;
765 p->hier_frm_cnt[3] = 0;
766 p->qp_layer_id = 3;
767 } else if (p->hier_frm_cnt[1] < hier_qp_cfg->hier_frame_num[1]) {
768 p->hier_frm_cnt[1]++;
769 p->hier_frm_cnt[3] = 0;
770 p->hier_frm_cnt[2] = 0;
771 p->qp_layer_id = 2;
772 } else if (p->hier_frm_cnt[0] < hier_qp_cfg->hier_frame_num[0]) {
773 p->hier_frm_cnt[0]++;
774 p->hier_frm_cnt[3] = 0;
775 p->hier_frm_cnt[2] = 0;
776 p->hier_frm_cnt[1] = 0;
777 p->qp_layer_id = 1;
778 } else {
779 p->hier_frm_cnt[3] = 0;
780 p->hier_frm_cnt[2] = 0;
781 p->hier_frm_cnt[1] = 0;
782 p->hier_frm_cnt[0] = 0;
783 p->qp_layer_id = 0;
784 }
785 }
786
787 return;
788 }
789
calc_vbr_ratio(void * ctx,EncRcTaskInfo * cfg)790 MPP_RET calc_vbr_ratio(void *ctx, EncRcTaskInfo *cfg)
791 {
792 RcModelV2Ctx *p = (RcModelV2Ctx *)ctx;
793 RcCfg *usr_cfg = &p->usr_cfg;
794 RK_S32 bps_change = p->target_bps;
795 RK_S32 max_bps_target = usr_cfg->bps_max;
796 RK_S32 ins_bps = p->ins_bps;
797 RK_S32 pre_target_bits = p->pre_target_bits;
798 RK_S32 pre_real_bits = p->pre_real_bits;
799 RK_S32 pre_ins_bps = p->last_inst_bps;
800
801 RK_S32 idx1, idx2;
802 RK_S32 bit_diff_ratio, ins_ratio, bps_ratio;
803
804 rc_dbg_func("enter %p\n", p);
805
806 bits_model_alloc(p, cfg, p->gop_total_bits);
807 if (pre_target_bits > pre_real_bits)
808 bit_diff_ratio = 32 * (pre_real_bits - pre_target_bits) / pre_target_bits;
809 else
810 bit_diff_ratio = 64 * (pre_real_bits - pre_target_bits) / pre_target_bits;
811
812 idx1 = ins_bps / (max_bps_target >> 5);
813 idx2 = pre_ins_bps / (max_bps_target >> 5);
814
815 idx1 = mpp_clip(idx1, 0, 63);
816 idx2 = mpp_clip(idx2, 0, 63);
817 ins_ratio = tab_lnx[idx1] - tab_lnx[idx2];
818
819 rc_dbg_bps("%10s|%10s|%10s|%10s|%10s|%10s", "r_bits", "t_bits", "ins_bps", "p_ins_bps",
820 "bps_ch", "max_bps");
821 rc_dbg_bps("%10d %10d %10d %10d %10d %10d", pre_real_bits, pre_target_bits, ins_bps,
822 pre_ins_bps, bps_change, max_bps_target);
823
824
825 if (ins_bps > bps_change && ins_bps > pre_ins_bps) {
826 ins_ratio = 6 * ins_ratio;
827 } else if (ins_bps <= pre_ins_bps && bps_change > pre_ins_bps) {
828 ins_ratio = 3 * ins_ratio;
829 } else {
830 ins_ratio = 0;
831 }
832
833 bit_diff_ratio = mpp_clip(bit_diff_ratio, -128, 256);
834 ins_ratio = mpp_clip(ins_ratio, -128, 256);
835 bps_ratio = 3 * (ins_bps - bps_change) / (max_bps_target >> 4);
836 bps_ratio = mpp_clip(bps_ratio, -16, 32);
837 if (p->i_scale > 640) {
838 bit_diff_ratio = mpp_clip(bit_diff_ratio, -16, 32);
839 ins_ratio = mpp_clip(ins_ratio, -16, 32);
840 }
841
842 p->next_ratio = bit_diff_ratio + ins_ratio + bps_ratio;
843
844 rc_dbg_qp("%10s|%10s|%10s|%10s|%10s", "diff_ratio", "ins_ratio", "bps_ratio", "next_ratio", "cur_qp_s");
845 rc_dbg_qp("%10d %10d %10d %10d|%10d", bit_diff_ratio, ins_ratio, bps_ratio, p->next_ratio, p->cur_scale_qp);
846 rc_dbg_func("leave %p\n", p);
847 return MPP_OK;
848 }
849
reenc_calc_vbr_ratio(void * ctx,EncRcTaskInfo * cfg)850 MPP_RET reenc_calc_vbr_ratio(void *ctx, EncRcTaskInfo *cfg)
851 {
852
853 RcModelV2Ctx *p = (RcModelV2Ctx *)ctx;
854 RcCfg *usr_cfg = &p->usr_cfg;
855 RK_S32 stat_time = usr_cfg->stats_time;
856 RK_S32 pre_ins_bps = mpp_data_sum_v2(p->stat_bits) / stat_time;
857 RK_S32 ins_bps = (pre_ins_bps * stat_time - mpp_data_get_pre_val_v2(p->stat_bits, -1) + cfg->bit_real) / stat_time;
858 RK_S32 bps_change = p->target_bps;
859 RK_S32 max_bps_target = usr_cfg->bps_max;
860
861 RK_S32 real_bit = cfg->bit_real;
862 RK_S32 target_bit = cfg->bit_target;
863 RK_S32 idx1, idx2;
864 RK_S32 bit_diff_ratio, ins_ratio, bps_ratio;
865
866 rc_dbg_func("enter %p\n", p);
867
868 if (p->cur_super_thd <= cfg->bit_real &&
869 usr_cfg->super_cfg.rc_priority == MPP_ENC_RC_BY_FRM_SIZE_FIRST) {
870 return reenc_calc_super_frm_ratio(ctx, cfg);
871 }
872
873 if (target_bit <= real_bit)
874 bit_diff_ratio = 32 * (real_bit - target_bit) / target_bit;
875 else
876 bit_diff_ratio = 32 * (real_bit - target_bit) / real_bit;
877
878 idx1 = ins_bps / (max_bps_target >> 5);
879 idx2 = pre_ins_bps / (max_bps_target >> 5);
880 idx1 = mpp_clip(idx1, 0, 63);
881 idx2 = mpp_clip(idx2, 0, 63);
882 if (pre_ins_bps < ins_bps && bps_change < ins_bps) {
883 ins_ratio = 6 * (tab_lnx[idx1] - tab_lnx[idx2]);
884 ins_ratio = mpp_clip(ins_ratio, -192, 256);
885 } else {
886 ins_ratio = 0;
887 }
888
889 bps_ratio = 96 * (ins_bps - bps_change) / bps_change;
890 bit_diff_ratio = mpp_clip(bit_diff_ratio, -128, 256);
891 bps_ratio = mpp_clip(bps_ratio, -32, 32);
892
893 p->next_ratio = bit_diff_ratio + ins_ratio + bps_ratio;
894 rc_dbg_rc("vbr reenc next ratio %d", p->next_ratio);
895 rc_dbg_func("leave %p\n", p);
896 return MPP_OK;
897 }
898
moving_ratio_calc(RcModelV2Ctx * ctx)899 RK_S32 moving_ratio_calc(RcModelV2Ctx *ctx)
900 {
901 RK_S32 motion_sensitivity = ctx->motion_sensitivity;
902 RK_S32 scale = 0, i;
903 RK_S32 total_bit = 0, pbit_sum = 0;
904 RK_S32 madi_sum = 0, madp_sum = 0;
905 RK_S32 percent = 0;
906
907 for (i = 0; i < 2; i++) {
908 RK_S32 pre_I_bit = mpp_data_get_pre_val_v2(ctx->pre_i_bit, i);
909 RK_S32 pre_mean_qp = mpp_data_get_pre_val_v2(ctx->pre_i_mean_qp, i);
910 if (pre_mean_qp == -1) {
911 scale = 32;
912 } else {
913 RK_S32 index = pre_mean_qp + 8 - ctx->pre_mean_qp;
914 if (index >= 0) {
915 index = mpp_clip(index, 0 , 15);
916 scale = mean_qp2scale[index];
917 } else {
918 scale = 14;
919 }
920 }
921 total_bit += (scale * pre_I_bit >> 5);
922 rc_dbg_rc("pre_mean_qp = %d, ctx->pre_mean_qp %d", pre_mean_qp, ctx->pre_mean_qp);
923 rc_dbg_rc("scale = %d, pre_I_bit %d", scale, pre_I_bit);
924 }
925
926 pbit_sum = mpp_data_sum_v2(ctx->pre_p_bit);
927 madi_sum = mpp_data_sum_v2(ctx->madi);
928 madp_sum = mpp_data_sum_v2(ctx->madp);
929 rc_dbg_rc("pbit_sum %d,madi_sum = %d, madp_sum = %d", pbit_sum, madi_sum, madp_sum);
930 if ( pbit_sum == 0 || total_bit == 0) {
931 percent = 255;
932 } else {
933 RK_S32 index = (total_bit << 6) / pbit_sum;
934 index = mpp_clip(index >> 4, 1, 99);
935 percent = (bit2percent[index] << 8) / 100;
936 }
937 rc_dbg_rc("means qp percent %d min_still_percent %d", percent, ctx->min_still_percent);
938 RK_S32 percent_a = (ctx->min_still_percent - 30) << 8;
939 RK_S32 percent_b = 100 - ctx->min_still_percent;
940
941 percent = (percent_a + percent * percent_b) / 70;
942 rc_dbg_rc("percent_a = %d percent_b %d", percent_a, percent_b);
943 RK_S32 mv_percnt = (ctx->prev_md_prop * 100) >> 8;
944 RK_S32 mv_ratio = (percent_a + 7680 + mv_percnt * percent_b) / 100;
945 rc_dbg_rc("mv_ratio = %d", mv_ratio);
946 RK_S32 mad_ratio = 256;
947 if (madi_sum) {
948 mad_ratio = 20 * madp_sum / madi_sum;
949 mad_ratio = mpp_clip(mad_ratio, 5, 100);
950 rc_dbg_rc("mad_ratio = %d", mad_ratio);
951 mad_ratio = (mad_ratio << 8) / 100;
952 }
953 mad_ratio = (percent_a + 7680 + percent_b * mad_ratio) / 100;
954
955 RK_S32 moving_ratio = (percent + 1 + (mv_ratio * motion_sensitivity + (100 - motion_sensitivity) * mad_ratio) / 100) >> 1;
956 rc_dbg_rc("moving_ratio = %d, motion_sensitivity = %d", moving_ratio, motion_sensitivity);
957 rc_dbg_rc("percent %d mad_ratio %d hr_ratio %d, moving_ratio %d", percent, mad_ratio, mv_ratio, moving_ratio);
958 return moving_ratio;
959 }
960
calc_avbr_ratio(void * ctx,EncRcTaskInfo * cfg)961 MPP_RET calc_avbr_ratio(void *ctx, EncRcTaskInfo *cfg)
962 {
963 RcModelV2Ctx *p = (RcModelV2Ctx *)ctx;
964 RcCfg *usr_cfg = &p->usr_cfg;
965 RK_S32 bps_change = p->target_bps;
966 RK_S32 max_bps_target = usr_cfg->bps_max;
967 RK_S32 ins_bps = p->ins_bps;
968 RK_S32 pre_target_bits = p->pre_target_bits;
969 RK_S32 pre_real_bits = p->pre_real_bits;
970 RK_S32 pre_ins_bps = p->last_inst_bps;
971 RK_S32 idx1, idx2;
972 RK_S32 bit_diff_ratio, ins_ratio, agop_dratio, rgop_dratio;
973 RK_S32 moving_ratio = 0, moving_percent;
974 RK_S32 gop_bits = 0, gop_kbits = 0;
975 RK_S32 i_ratio, max_bps;
976 RK_S32 qratio, final_qratio;
977
978 rc_dbg_func("enter %p\n", p);
979
980 moving_ratio = moving_ratio_calc(p);
981 if (p->moving_ratio - 2 >= moving_ratio)
982 moving_ratio = p->moving_ratio - 2;
983
984 if (p->moving_ratio > moving_ratio && (p->max_still_qp << 6) <= p->scale_qp) {
985 p->moving_ratio = mpp_clip(p->moving_ratio + 1, 1, 255);
986 } else {
987 p->moving_ratio = moving_ratio;
988 }
989 rc_dbg_rc("final moving_ratio = %d", moving_ratio);
990
991 if (moving_ratio <= 0)
992 moving_ratio = 1;
993
994 gop_bits = moving_ratio * p->gop_total_bits >> 8;
995 gop_kbits = gop_bits >> 10;
996 if (gop_kbits < 1)
997 gop_kbits = 1;
998
999 bits_model_alloc(p, cfg, gop_bits);
1000 bps_change = moving_ratio * bps_change >> 8;
1001 if (moving_ratio < 0) {
1002 moving_ratio += 255;
1003 }
1004 moving_percent = 100 * moving_ratio >> 8;
1005
1006 rc_dbg_bps("%10s|%10s|%10s|%10s|%10s", "m_ratio", "r_bits", "t_bits", "ins_bps", "p_ins_bps");
1007 rc_dbg_bps("%10d %10d %10d %10d %10d", p->moving_ratio, pre_real_bits, pre_target_bits, ins_bps, pre_ins_bps);
1008
1009 if (pre_target_bits > pre_real_bits)
1010 bit_diff_ratio = 32 * (pre_real_bits - pre_target_bits) / pre_target_bits;
1011 else
1012 bit_diff_ratio = 64 * (pre_real_bits - pre_target_bits) / pre_target_bits * moving_percent;
1013
1014 i_ratio = mpp_clip(p->pre_i_scale >> 4, 10, 200);
1015 idx1 = ins_bps / (max_bps_target >> 5);
1016 idx2 = pre_ins_bps / (max_bps_target >> 5);
1017 idx1 = mpp_clip(idx1, 0, 63);
1018 idx2 = mpp_clip(idx2, 0, 63);
1019 ins_ratio = tab_lnx[idx2] - tab_lnx[idx1];
1020 max_bps = bps_change;
1021
1022 if (max_bps < pre_ins_bps) {
1023 max_bps = pre_ins_bps;
1024 }
1025
1026 if (ins_bps > max_bps) {
1027 ins_ratio = 6 * ins_ratio;
1028 } else if (ins_bps < pre_ins_bps && bps_change > pre_ins_bps) {
1029 ins_ratio = 3 * ins_ratio;
1030 } else {
1031 ins_ratio = 0;
1032 }
1033
1034 ins_ratio = mpp_clip(ins_ratio >> 2, -128, 256);
1035 bit_diff_ratio = mpp_clip(10 * bit_diff_ratio / i_ratio, -128, 256);
1036 rgop_dratio = mpp_clip(24 * ((p->real_gbits - gop_bits) >> 10) / gop_kbits, -1, 1);
1037 agop_dratio = mpp_clip(48 * ((p->avg_gbits - gop_bits) >> 10) / gop_kbits , -1, 1);
1038 if (p->pre_i_scale > 640) {
1039 bit_diff_ratio = mpp_clip(bit_diff_ratio, -16, 32);
1040 ins_ratio = mpp_clip(ins_ratio, -16, 32);
1041 }
1042 qratio = 0;
1043 final_qratio = ins_ratio + bit_diff_ratio + agop_dratio + rgop_dratio;
1044 if (max_bps_target >= ins_bps) {
1045 if (final_qratio > 0) {
1046 if (p->scale_qp >= (p->max_still_qp << 6)) {
1047 final_qratio = ins_ratio + agop_dratio + rgop_dratio;
1048 qratio = -6;
1049 }
1050 }
1051 }
1052 p->next_ratio = qratio + final_qratio;
1053
1054 rc_dbg_qp("%10s|%10s|%10s|%10s|%10s|%10s|%10s", "diff_ratio", "ins_ratio", "rg_ratio",
1055 "ag_ratio", "qratio", "next_ratio", "cur_qp_s");
1056 rc_dbg_qp("%10d %10d %10d %10d %10d %10d %10d", bit_diff_ratio, ins_ratio, rgop_dratio,
1057 agop_dratio, qratio, p->next_ratio, p->cur_scale_qp);
1058 rc_dbg_func("leave %p\n", p);
1059 return MPP_OK;
1060 }
1061
bits_model_init(RcModelV2Ctx * ctx)1062 MPP_RET bits_model_init(RcModelV2Ctx *ctx)
1063 {
1064 RcCfg *usr_cfg = &ctx->usr_cfg;
1065 RK_S32 gop_len = ctx->usr_cfg.igop;
1066 RcFpsCfg *fps = &ctx->usr_cfg.fps;
1067 RK_S64 gop_bits = 0;
1068 RK_U32 target_bps;
1069
1070 rc_dbg_func("enter %p\n", ctx);
1071
1072 usr_cfg->min_i_bit_prop = mpp_clip(usr_cfg->min_i_bit_prop, 10, 100);
1073 usr_cfg->max_i_bit_prop = mpp_clip(usr_cfg->max_i_bit_prop,
1074 usr_cfg->min_i_bit_prop, 100);
1075 usr_cfg->init_ip_ratio = mpp_clip(usr_cfg->init_ip_ratio, 160, 640);
1076
1077 rc_dbg_rc("min_i_bit_prop %d max_i_bit_prop %d, init_ip_ratio %d",
1078 usr_cfg->min_i_bit_prop, usr_cfg->max_i_bit_prop, usr_cfg->init_ip_ratio);
1079
1080 if (!gop_len) {
1081 rc_dbg_rc("infinte gop, set default for rc bit calc\n");
1082 usr_cfg->igop = gop_len = 500;
1083 } else if (gop_len == 1) {
1084 rc_dbg_rc("all intra gop \n");
1085 usr_cfg->init_ip_ratio = 16;
1086
1087 /* disable debreath on all intra case */
1088 if (usr_cfg->debreath_cfg.enable)
1089 usr_cfg->debreath_cfg.enable = 0;
1090
1091 usr_cfg->igop = gop_len = 500;
1092 } else {
1093 usr_cfg->igop = gop_len = mpp_clip(usr_cfg->igop, usr_cfg->igop, 500);
1094 }
1095 ctx->max_still_qp = 35;
1096 ctx->motion_sensitivity = 90;
1097
1098 ctx->first_frm_flg = 1;
1099 ctx->gop_frm_cnt = 0;
1100 ctx->gop_qp_sum = 0;
1101
1102 target_bps = ctx->usr_cfg.bps_max;
1103 ctx->re_calc_ratio = reenc_calc_vbr_ratio;
1104 switch (ctx->usr_cfg.mode) {
1105 case RC_CBR: {
1106 ctx->calc_ratio = calc_cbr_ratio;
1107 ctx->re_calc_ratio = reenc_calc_cbr_ratio;
1108 target_bps = ctx->usr_cfg.bps_target;
1109 } break;
1110 case RC_VBR: {
1111 ctx->calc_ratio = calc_vbr_ratio;
1112 } break;
1113 case RC_FIXQP: {
1114 return MPP_OK;
1115 }
1116 case RC_AVBR: {
1117 ctx->calc_ratio = calc_avbr_ratio;
1118 if (usr_cfg->bps_min && usr_cfg->bps_max) {
1119 ctx->min_still_percent = (RK_S64)usr_cfg->bps_min * 100 / usr_cfg->bps_max;
1120 } else {
1121 ctx->min_still_percent = 25;
1122 }
1123 rc_dbg_rc("min_still_percent %d", ctx->min_still_percent);
1124 } break;
1125 default:
1126 mpp_log("rc mode set error");
1127 break;
1128 }
1129
1130 ctx->target_bps = ctx->usr_cfg.bps_target;
1131
1132 if (gop_len >= 1)
1133 gop_bits = (RK_S64)gop_len * target_bps * fps->fps_out_denorm;
1134 else
1135 gop_bits = (RK_S64)fps->fps_out_num * target_bps * fps->fps_out_denorm;
1136
1137 ctx->gop_total_bits = gop_bits / fps->fps_out_num;
1138 ctx->bit_per_frame = target_bps * fps->fps_out_denorm / fps->fps_out_num;
1139 ctx->watl_thrd = 3 * target_bps;
1140 ctx->stat_watl = ctx->watl_thrd >> 3;
1141 ctx->watl_base = ctx->stat_watl;
1142
1143 rc_dbg_rc("gop %d total bit %lld per_frame %d statistics time %d second\n",
1144 ctx->usr_cfg.igop, ctx->gop_total_bits, ctx->bit_per_frame,
1145 ctx->usr_cfg.stats_time);
1146
1147 if (bits_model_param_init(ctx)) {
1148 return MPP_NOK;
1149 }
1150
1151 bits_frm_init(ctx);
1152 rc_dbg_func("leave %p\n", ctx);
1153 return MPP_OK;
1154 }
1155
bits_mode_reset(RcModelV2Ctx * ctx)1156 MPP_RET bits_mode_reset(RcModelV2Ctx *ctx)
1157 {
1158 rc_dbg_func("enter %p\n", ctx);
1159 (void) ctx;
1160 rc_dbg_func("leave %p\n", ctx);
1161 return MPP_OK;
1162 }
1163
check_super_frame(RcModelV2Ctx * ctx,EncRcTaskInfo * cfg)1164 MPP_RET check_super_frame(RcModelV2Ctx *ctx, EncRcTaskInfo *cfg)
1165 {
1166 MPP_RET ret = MPP_OK;
1167 RK_S32 frame_type = cfg->frame_type;
1168 RK_U32 bits_thr = 0;
1169 RcCfg *usr_cfg = &ctx->usr_cfg;
1170
1171 rc_dbg_func("enter %p\n", ctx);
1172 if (usr_cfg->super_cfg.super_mode) {
1173 bits_thr = usr_cfg->super_cfg.super_p_thd;
1174 if (frame_type == INTRA_FRAME) {
1175 bits_thr = usr_cfg->super_cfg.super_i_thd;
1176 }
1177
1178 if ((RK_U32)cfg->bit_real >= bits_thr) {
1179 if (usr_cfg->super_cfg.super_mode == MPP_ENC_RC_SUPER_FRM_DROP) {
1180 rc_dbg_rc("super frame drop current frame");
1181 usr_cfg->drop_mode = MPP_ENC_RC_DROP_FRM_NORMAL;
1182 usr_cfg->drop_gap = 0;
1183 }
1184 ret = MPP_NOK;
1185 }
1186 }
1187 rc_dbg_func("leave %p\n", ctx);
1188 return ret;
1189 }
1190
check_re_enc(RcModelV2Ctx * ctx,EncRcTaskInfo * cfg)1191 MPP_RET check_re_enc(RcModelV2Ctx *ctx, EncRcTaskInfo *cfg)
1192 {
1193 RcCfg *usr_cfg = &ctx->usr_cfg;
1194 RK_S32 frame_type = cfg->frame_type;
1195 RK_S32 bit_thr = 0;
1196 RK_S32 stat_time = usr_cfg->stats_time;
1197 RK_S32 last_ins_bps = mpp_data_sum_v2(ctx->stat_bits) / stat_time;
1198 RK_S32 ins_bps = (last_ins_bps * stat_time - mpp_data_get_pre_val_v2(ctx->stat_bits, -1)
1199 + cfg->bit_real) / stat_time;
1200 RK_S32 target_bps;
1201 RK_S32 ret = MPP_OK;
1202
1203 rc_dbg_func("enter %p\n", ctx);
1204 rc_dbg_rc("reenc check target_bps %d last_ins_bps %d ins_bps %d",
1205 usr_cfg->bps_target, last_ins_bps, ins_bps);
1206
1207 if (ctx->reenc_cnt >= usr_cfg->max_reencode_times)
1208 return MPP_OK;
1209
1210 if (check_super_frame(ctx, cfg))
1211 return MPP_NOK;
1212
1213 if (usr_cfg->debreath_cfg.enable && !ctx->first_frm_flg)
1214 return MPP_OK;
1215
1216 rc_dbg_drop("drop mode %d frame_type %d\n", usr_cfg->drop_mode, frame_type);
1217 if (usr_cfg->drop_mode && frame_type == INTER_P_FRAME) {
1218 bit_thr = (RK_S32)(usr_cfg->bps_max * (100 + usr_cfg->drop_thd) / (float)100);
1219 rc_dbg_drop("drop mode %d check max_bps %d bit_thr %d ins_bps %d",
1220 usr_cfg->drop_mode, usr_cfg->bps_target, bit_thr, ins_bps);
1221 return (ins_bps > bit_thr) ? MPP_NOK : MPP_OK;
1222 }
1223
1224 switch (frame_type) {
1225 case INTRA_FRAME:
1226 bit_thr = 3 * cfg->bit_target / 2;
1227 break;
1228 case INTER_P_FRAME:
1229 bit_thr = 3 * cfg->bit_target;
1230 break;
1231 default:
1232 break;
1233 }
1234
1235 if (cfg->bit_real > bit_thr) {
1236 if (usr_cfg->mode == RC_CBR) {
1237 target_bps = usr_cfg->bps_target;
1238 if (target_bps / 20 < ins_bps - last_ins_bps &&
1239 (target_bps + target_bps / 10 < ins_bps
1240 || target_bps - target_bps / 10 > ins_bps)) {
1241 ret = MPP_NOK;
1242 }
1243 } else {
1244 target_bps = usr_cfg->bps_max;
1245 if ((target_bps - (target_bps >> 3) < ins_bps) &&
1246 (target_bps / 20 < ins_bps - last_ins_bps)) {
1247 ret = MPP_NOK;
1248 }
1249 }
1250 }
1251
1252 rc_dbg_func("leave %p ret %d\n", ctx, ret);
1253 return ret;
1254 }
1255
1256
rc_model_v2_init(void * ctx,RcCfg * cfg)1257 MPP_RET rc_model_v2_init(void *ctx, RcCfg *cfg)
1258 {
1259 RcModelV2Ctx *p = (RcModelV2Ctx*)ctx;
1260
1261 rc_dbg_func("enter %p\n", ctx);
1262
1263 memcpy(&p->usr_cfg, cfg, sizeof(RcCfg));
1264 bits_model_init(p);
1265
1266 rc_dbg_func("leave %p\n", ctx);
1267 return MPP_OK;
1268 }
1269
rc_model_v2_deinit(void * ctx)1270 MPP_RET rc_model_v2_deinit(void *ctx)
1271 {
1272 RcModelV2Ctx *p = (RcModelV2Ctx *)ctx;
1273
1274 rc_dbg_func("enter %p\n", ctx);
1275 bits_model_param_deinit(p);
1276
1277 rc_dbg_func("leave %p\n", ctx);
1278 return MPP_OK;
1279 }
1280
rc_model_v2_start(void * ctx,EncRcTask * task)1281 MPP_RET rc_model_v2_start(void *ctx, EncRcTask *task)
1282 {
1283 RcModelV2Ctx *p = (RcModelV2Ctx*)ctx;
1284 EncFrmStatus *frm = &task->frm;
1285 EncRcTaskInfo *info = &task->info;
1286 RcCfg *usr_cfg = &p->usr_cfg;
1287
1288 rc_dbg_func("enter %p\n", ctx);
1289
1290 if (usr_cfg->mode == RC_FIXQP) {
1291 if (usr_cfg->init_quality <= 0) {
1292 mpp_log("invalid fix %d qp found set default qp 26\n",
1293 usr_cfg->init_quality);
1294 usr_cfg->init_quality = 26;
1295 }
1296
1297 if (usr_cfg->max_quality <= 0)
1298 usr_cfg->max_quality = usr_cfg->init_quality;
1299 if (usr_cfg->min_quality <= 0)
1300 usr_cfg->min_quality = usr_cfg->init_quality;
1301 if (usr_cfg->max_i_quality <= 0)
1302 usr_cfg->max_i_quality = usr_cfg->max_quality;
1303 if (usr_cfg->min_i_quality <= 0)
1304 usr_cfg->min_i_quality = usr_cfg->min_quality;
1305
1306 if (frm->is_intra) {
1307 info->quality_max = usr_cfg->max_i_quality;
1308 info->quality_min = usr_cfg->min_i_quality;
1309 info->quality_target = usr_cfg->init_quality;
1310 } else {
1311 info->quality_max = usr_cfg->max_quality;
1312 info->quality_min = usr_cfg->min_quality;
1313 info->quality_target = usr_cfg->init_quality;
1314 }
1315
1316 rc_dbg_rc("seq_idx %d intra %d\n", frm->seq_idx, frm->is_intra);
1317 rc_dbg_rc("bitrate [%d : %d : %d]\n", info->bit_min, info->bit_target, info->bit_max);
1318 rc_dbg_rc("quality [%d : %d : %d]\n", info->quality_min, info->quality_target, info->quality_max);
1319
1320 return MPP_OK;
1321 }
1322
1323 info->frame_type = (frm->is_intra) ? (INTRA_FRAME) : (INTER_P_FRAME);
1324
1325 if (frm->ref_mode == REF_TO_PREV_INTRA)
1326 info->frame_type = INTER_VI_FRAME;
1327
1328 if (frm->is_i_refresh)
1329 info->frame_type = INTRA_RFH_FRAME;
1330
1331 p->next_ratio = 0;
1332 if (p->last_frame_type == INTRA_FRAME) {
1333 calc_next_i_ratio(p);
1334 }
1335
1336 if (!p->first_frm_flg) {
1337 if (p->calc_ratio)
1338 p->calc_ratio(p, info);
1339 } else {
1340 bits_model_alloc(p, info, p->gop_total_bits);
1341 /* quality determination */
1342 info->quality_target = (usr_cfg->init_quality <= 0) ? -1 : usr_cfg->init_quality;
1343 }
1344
1345 if (frm->is_intra) {
1346 info->quality_max = usr_cfg->max_i_quality;
1347 info->quality_min = usr_cfg->min_i_quality;
1348 } else {
1349 info->quality_max = usr_cfg->max_quality;
1350 info->quality_min = usr_cfg->min_quality;
1351 }
1352
1353 bits_model_preset(p, info);
1354
1355 rc_dbg_rc("seq_idx %d intra %d\n", frm->seq_idx, frm->is_intra);
1356 rc_dbg_rc("bitrate [%d : %d : %d]\n", info->bit_min, info->bit_target, info->bit_max);
1357 rc_dbg_rc("quality [%d : %d : %d]\n", info->quality_min, info->quality_target, info->quality_max);
1358
1359 p->reenc_cnt = 0;
1360 p->last_frame_type = info->frame_type;
1361
1362 rc_dbg_func("leave %p\n", ctx);
1363
1364 return MPP_OK;
1365 }
1366
cal_first_i_start_qp(RK_S32 target_bit,RK_U32 total_mb)1367 static RK_S32 cal_first_i_start_qp(RK_S32 target_bit, RK_U32 total_mb)
1368 {
1369 static RK_U32 mb_num[9] = {
1370 0, 200, 700, 1200,
1371 2000, 4000, 8000, 16000,
1372 20000
1373 };
1374
1375 static RK_U32 tab_bit[9] = {
1376 3780, 3570, 3150, 2940,
1377 2730, 3780, 2100, 1680,
1378 2100
1379 };
1380
1381 static RK_U8 qscale2qp[96] = {
1382 15, 15, 15, 15, 15, 16, 18, 20, 21, 22, 23, 24,
1383 25, 25, 26, 27, 28, 28, 29, 29, 30, 30, 30, 31,
1384 31, 32, 32, 33, 33, 33, 34, 34, 34, 34, 35, 35,
1385 35, 36, 36, 36, 36, 36, 37, 37, 37, 37, 38, 38,
1386 38, 38, 38, 39, 39, 39, 39, 39, 39, 40, 40, 40,
1387 40, 41, 41, 41, 41, 41, 41, 41, 42, 42, 42, 42,
1388 42, 42, 42, 42, 43, 43, 43, 43, 43, 43, 43, 43,
1389 44, 44, 44, 44, 44, 44, 44, 44, 45, 45, 45, 45,
1390 };
1391
1392 RK_S32 cnt = 0;
1393 RK_S32 index;
1394 RK_S32 i;
1395
1396 for (i = 0; i < 8; i++) {
1397 if (mb_num[i] > total_mb)
1398 break;
1399 cnt++;
1400 }
1401
1402 index = (total_mb * tab_bit[cnt] - 350) / target_bit; // qscale
1403 index = mpp_clip(index, 4, 95);
1404
1405 return qscale2qp[index];
1406 }
1407
rc_model_v2_hal_start(void * ctx,EncRcTask * task)1408 MPP_RET rc_model_v2_hal_start(void *ctx, EncRcTask *task)
1409 {
1410 RcModelV2Ctx *p = (RcModelV2Ctx *)ctx;
1411 EncFrmStatus *frm = &task->frm;
1412 EncRcTaskInfo *info = &task->info;
1413 EncRcForceCfg *force = &task->force;
1414 RcCfg *usr_cfg = &p->usr_cfg;
1415 RK_S32 mb_w = MPP_ALIGN(usr_cfg->width, 16) / 16;
1416 RK_S32 mb_h = MPP_ALIGN(usr_cfg->height, 16) / 16;
1417 RK_S32 bit_min = info->bit_min;
1418 RK_S32 bit_max = info->bit_max;
1419 RK_S32 bit_target = info->bit_target;
1420 RK_S32 quality_min = info->quality_min;
1421 RK_S32 quality_max = info->quality_max;
1422 RK_S32 quality_target = info->quality_target;
1423
1424 rc_dbg_func("enter p %p task %p\n", p, task);
1425
1426 rc_dbg_rc("seq_idx %d intra %d\n", frm->seq_idx, frm->is_intra);
1427
1428 if (force->force_flag & ENC_RC_FORCE_QP) {
1429 RK_S32 qp = force->force_qp;
1430 info->quality_target = qp;
1431 info->quality_max = qp;
1432 info->quality_min = qp;
1433 return MPP_OK;
1434 }
1435
1436 if (usr_cfg->mode == RC_FIXQP)
1437 return MPP_OK;
1438
1439 /* setup quality parameters */
1440 if (p->first_frm_flg && frm->is_intra) {
1441 RK_S32 i_quality_delta = usr_cfg->i_quality_delta;
1442
1443 if (info->quality_target < 0) {
1444 if (info->bit_target) {
1445 info->quality_target = cal_first_i_start_qp(info->bit_target, mb_w * mb_h);
1446 } else {
1447 mpp_log("init qp not set on fix qp mode, use default qp\n");
1448 info->quality_target = 26;
1449 }
1450 }
1451
1452 if (p->reenc_cnt) {
1453 p->cur_scale_qp += p->next_ratio;
1454 p->start_qp = (p->cur_scale_qp >> 6) - i_quality_delta;
1455 } else {
1456 p->start_qp = info->quality_target;
1457 p->cur_scale_qp = (info->quality_target + i_quality_delta) << 6;
1458 }
1459
1460 rc_dbg_rc("qp: start %2d cur_scale %d next_ratio %d reenc %d\n",
1461 p->start_qp, p->cur_scale_qp, p->next_ratio, p->reenc_cnt);
1462
1463 p->cur_scale_qp = mpp_clip(p->cur_scale_qp, (info->quality_min << 6), (info->quality_max << 6));
1464 } else {
1465 RK_S32 qp_scale = p->cur_scale_qp + p->next_ratio;
1466 RK_S32 start_qp = 0;
1467
1468 if (frm->is_intra && !frm->is_i_refresh) {
1469 RK_S32 i_quality_delta = usr_cfg->i_quality_delta;
1470
1471 qp_scale = mpp_clip(qp_scale, (info->quality_min << 6), (info->quality_max << 6));
1472 start_qp = ((p->pre_i_qp + ((qp_scale + p->next_i_ratio) >> 6)) >> 1);
1473
1474 if (i_quality_delta) {
1475 RK_U32 index = mpp_clip(mpp_data_mean_v2(p->madi) / 4, 0, 7);
1476 RK_S32 max_ip_delta = max_ip_qp_dealt[index];
1477
1478 if (i_quality_delta > max_ip_delta)
1479 i_quality_delta = max_ip_delta;
1480
1481 rc_dbg_rc("qp prev %d:%d curr %d - %d (max %d) -> %d reenc %d\n",
1482 p->pre_i_qp, qp_scale >> 6, start_qp,
1483 usr_cfg->i_quality_delta, max_ip_delta,
1484 start_qp - i_quality_delta, p->reenc_cnt);
1485
1486 if (!p->reenc_cnt) {
1487 start_qp -= i_quality_delta;
1488 }
1489 }
1490
1491 start_qp = mpp_clip(start_qp, info->quality_min, info->quality_max);
1492 p->start_qp = start_qp;
1493
1494 if (!p->reenc_cnt) {
1495 p->cur_scale_qp = qp_scale;
1496 if (p->usr_cfg.debreath_cfg.enable) {
1497 calc_debreath_qp(ctx);
1498 }
1499 } else {
1500 p->cur_scale_qp = qp_scale;
1501 }
1502
1503 p->gop_frm_cnt = 0;
1504 p->gop_qp_sum = 0;
1505 } else {
1506 qp_scale = mpp_clip(qp_scale, (info->quality_min << 6), (info->quality_max << 6));
1507 p->cur_scale_qp = qp_scale;
1508 rc_dbg_rc("qp %d -> %d\n", p->start_qp, qp_scale >> 6);
1509 p->start_qp = qp_scale >> 6;
1510 if (frm->ref_mode == REF_TO_PREV_INTRA && usr_cfg->vi_quality_delta) {
1511 rc_dbg_rc("qp %d -> %d (vi)\n", p->start_qp, p->start_qp - usr_cfg->vi_quality_delta);
1512 p->start_qp -= usr_cfg->vi_quality_delta;
1513 }
1514 }
1515 }
1516
1517 if (usr_cfg->hier_qp_cfg.hier_qp_en && !p->reenc_cnt) {
1518 rc_hier_calc_dealt_qp(p, info);
1519 if (p->qp_layer_id) {
1520 RK_S32 hier_qp_delta = usr_cfg->hier_qp_cfg.hier_qp_delta[p->qp_layer_id - 1];
1521
1522 p->start_qp -= hier_qp_delta;
1523 rc_dbg_qp("hier_qp: layer %d delta %d", p->qp_layer_id, hier_qp_delta);
1524 }
1525 }
1526
1527 p->start_qp = mpp_clip(p->start_qp, info->quality_min, info->quality_max);
1528 info->quality_target = p->start_qp;
1529
1530 rc_dbg_rc("bitrate [%d : %d : %d] -> [%d : %d : %d]\n",
1531 bit_min, bit_target, bit_max,
1532 info->bit_min, info->bit_target, info->bit_max);
1533 rc_dbg_rc("quality [%d : %d : %d] -> [%d : %d : %d]\n",
1534 quality_min, quality_target, quality_max,
1535 info->quality_min, info->quality_target, info->quality_max);
1536 rc_dbg_func("leave %p\n", p);
1537 return MPP_OK;
1538 }
1539
rc_model_v2_hal_end(void * ctx,EncRcTask * task)1540 MPP_RET rc_model_v2_hal_end(void *ctx, EncRcTask *task)
1541 {
1542 RcModelV2Ctx *p = (RcModelV2Ctx *)ctx;
1543 EncFrmStatus *frm = &task->frm;
1544
1545 rc_dbg_func("enter ctx %p task %p\n", ctx, task);
1546
1547 if (frm->is_intra)
1548 p->pre_i_qp = p->cur_scale_qp >> 6;
1549 else
1550 p->pre_p_qp = p->cur_scale_qp >> 6;
1551
1552 rc_dbg_func("leave %p\n", ctx);
1553 return MPP_OK;
1554 }
1555
rc_model_v2_check_reenc(void * ctx,EncRcTask * task)1556 MPP_RET rc_model_v2_check_reenc(void *ctx, EncRcTask *task)
1557 {
1558 RcModelV2Ctx *p = (RcModelV2Ctx *)ctx;
1559 EncRcTaskInfo *cfg = (EncRcTaskInfo *)&task->info;
1560 EncFrmStatus *frm = &task->frm;
1561 RcCfg *usr_cfg = &p->usr_cfg;
1562
1563 rc_dbg_func("enter ctx %p cfg %p\n", ctx, cfg);
1564
1565 frm->reencode = 0;
1566
1567 if ((usr_cfg->mode == RC_FIXQP) ||
1568 (task->force.force_flag & ENC_RC_FORCE_QP) ||
1569 p->on_drop || p->on_pskip)
1570 return MPP_OK;
1571
1572 if (check_re_enc(p, cfg)) {
1573 MppEncRcDropFrmMode drop_mode = usr_cfg->drop_mode;
1574
1575 if (frm->is_intra)
1576 drop_mode = MPP_ENC_RC_DROP_FRM_DISABLED;
1577
1578 if (usr_cfg->drop_gap && p->drop_cnt >= usr_cfg->drop_gap)
1579 drop_mode = MPP_ENC_RC_DROP_FRM_DISABLED;
1580
1581 rc_dbg_drop("reenc drop_mode %d drop_cnt %d\n", drop_mode, p->drop_cnt);
1582
1583 switch (drop_mode) {
1584 case MPP_ENC_RC_DROP_FRM_NORMAL : {
1585 frm->drop = 1;
1586 frm->reencode = 1;
1587 p->on_drop = 1;
1588 p->drop_cnt++;
1589 rc_dbg_drop("drop\n");
1590 } break;
1591 case MPP_ENC_RC_DROP_FRM_PSKIP : {
1592 frm->force_pskip = 1;
1593 frm->reencode = 1;
1594 p->on_pskip = 1;
1595 p->drop_cnt++;
1596 rc_dbg_drop("force_pskip\n");
1597 } break;
1598 case MPP_ENC_RC_DROP_FRM_DISABLED :
1599 default : {
1600 if (p->re_calc_ratio)
1601 p->re_calc_ratio(p, cfg);
1602
1603 if (p->next_ratio != 0 && cfg->quality_target < cfg->quality_max) {
1604 p->reenc_cnt++;
1605 frm->reencode = 1;
1606 }
1607 p->drop_cnt = 0;
1608 } break;
1609 }
1610 }
1611
1612 return MPP_OK;
1613 }
1614
rc_model_v2_end(void * ctx,EncRcTask * task)1615 MPP_RET rc_model_v2_end(void *ctx, EncRcTask *task)
1616 {
1617 RcModelV2Ctx *p = (RcModelV2Ctx *)ctx;
1618 EncRcTaskInfo *cfg = (EncRcTaskInfo *)&task->info;
1619 RcCfg *usr_cfg = &p->usr_cfg;
1620
1621 rc_dbg_func("enter ctx %p cfg %p\n", ctx, cfg);
1622
1623 rc_dbg_rc("bits_mode_update real_bit %d", cfg->bit_real);
1624
1625 if (usr_cfg->mode == RC_FIXQP)
1626 goto DONE;
1627
1628 p->last_inst_bps = p->ins_bps;
1629 p->first_frm_flg = 0;
1630
1631 bits_model_update(p, cfg);
1632 if (usr_cfg->mode == RC_AVBR) {
1633 moving_judge_update(p, cfg);
1634 bit_statics_update(p, cfg->bit_real);
1635 }
1636
1637 p->gop_frm_cnt++;
1638 p->gop_qp_sum += p->start_qp;
1639
1640 p->pre_mean_qp = cfg->quality_real;
1641 p->pre_iblk4_prop = cfg->iblk4_prop;
1642 p->scale_qp = p->cur_scale_qp;
1643 p->prev_md_prop = 0;
1644 p->pre_target_bits = cfg->bit_target;
1645 p->pre_real_bits = cfg->bit_real;
1646
1647 p->on_drop = 0;
1648 p->on_pskip = 0;
1649
1650 DONE:
1651 rc_dbg_func("leave %p\n", ctx);
1652 return MPP_OK;
1653 }
1654