1 /* 2 * Copyright 2020 Rockchip Electronics Co. LTD 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #ifndef __MPP_ENC_IMPL_H__ 18 #define __MPP_ENC_IMPL_H__ 19 20 #include "enc_impl.h" 21 #include "mpp_enc_hal.h" 22 #include "mpp_enc_ref.h" 23 #include "mpp_enc_refs.h" 24 #include "mpp_device.h" 25 26 #include "rc.h" 27 #include "hal_info.h" 28 29 #define HDR_ADDED_MASK 0xe 30 31 typedef union MppEncHeaderStatus_u { 32 RK_U32 val; 33 struct { 34 RK_U32 ready : 1; 35 36 RK_U32 added_by_ctrl : 1; 37 RK_U32 added_by_mode : 1; 38 RK_U32 added_by_change : 1; 39 }; 40 } MppEncHeaderStatus; 41 42 typedef struct RcApiStatus_t { 43 RK_U32 rc_api_inited : 1; 44 RK_U32 rc_api_updated : 1; 45 RK_U32 rc_api_user_cfg : 1; 46 } RcApiStatus; 47 48 typedef struct MppEncImpl_t { 49 MppCodingType coding; 50 EncImpl impl; 51 MppEncHal enc_hal; 52 53 /* device from hal */ 54 MppDev dev; 55 HalInfo hal_info; 56 RK_S64 time_base; 57 RK_S64 time_end; 58 RK_S32 frame_count; 59 RK_S32 hal_info_updated; 60 61 /* 62 * Rate control plugin parameters 63 */ 64 RcApiStatus rc_status; 65 RK_S32 rc_api_updated; 66 RK_S32 rc_cfg_updated; 67 RcApiBrief rc_brief; 68 RcCtx rc_ctx; 69 70 /* 71 * thread input / output context 72 */ 73 MppThread *thread_enc; 74 void *mpp; 75 76 MppPort input; 77 MppPort output; 78 MppTask task_in; 79 MppTask task_out; 80 MppFrame frame; 81 MppPacket packet; 82 RK_U32 low_delay_part_mode; 83 RK_U32 low_delay_output; 84 /* output callback for slice output */ 85 MppCbCtx output_cb; 86 87 /* base task information */ 88 HalTaskGroup tasks; 89 HalTaskHnd hnd; 90 EncAsyncTaskInfo *async; 91 RK_U32 task_idx; 92 RK_S64 task_pts; 93 MppBuffer frm_buf; 94 MppBuffer pkt_buf; 95 MppBuffer md_info; 96 97 // internal status and protection 98 Mutex lock; 99 RK_U32 reset_flag; 100 sem_t enc_reset; 101 102 RK_U32 wait_count; 103 RK_U32 work_count; 104 RK_U32 status_flag; 105 RK_U32 notify_flag; 106 RK_U32 enc_failed_drop; 107 108 /* control process */ 109 RK_U32 cmd_send; 110 RK_U32 cmd_recv; 111 MpiCmd cmd; 112 void *param; 113 MPP_RET *cmd_ret; 114 sem_t cmd_start; 115 sem_t cmd_done; 116 117 // legacy support for MPP_ENC_GET_EXTRA_INFO 118 MppPacket hdr_pkt; 119 void *hdr_buf; 120 RK_U32 hdr_len; 121 MppEncHeaderStatus hdr_status; 122 MppEncHeaderMode hdr_mode; 123 MppEncSeiMode sei_mode; 124 125 /* information for debug prefix */ 126 const char *version_info; 127 RK_S32 version_length; 128 char *rc_cfg_info; 129 RK_S32 rc_cfg_pos; 130 RK_S32 rc_cfg_length; 131 RK_S32 rc_cfg_size; 132 133 /* cpb parameters */ 134 MppEncRefs refs; 135 MppEncRefFrmUsrCfg frm_cfg; 136 137 /* two-pass deflicker parameters */ 138 RK_U32 support_hw_deflicker; 139 EncRcTaskInfo rc_info_prev; 140 141 /* Encoder configure set */ 142 MppEncCfgSet cfg; 143 } MppEncImpl; 144 145 #ifdef __cplusplus 146 extern "C" { 147 #endif 148 149 void *mpp_enc_thread(void *data); 150 void *mpp_enc_async_thread(void *data); 151 MPP_RET mpp_enc_callback(const char *caller, void *ctx, RK_S32 cmd, void *param); 152 153 #ifdef __cplusplus 154 } 155 #endif 156 157 #endif /*__MPP_ENC_IMPL_H__*/ 158