1 /* 2 * Copyright 2015 Rockchip Electronics Co. LTD 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #ifndef __H265E_SLICE_H__ 18 #define __H265E_SLICE_H__ 19 20 #include "rk_type.h" 21 #include "mpp_err.h" 22 #include "mpp_list.h" 23 #include "h265e_dpb.h" 24 #include "h265_syntax.h" 25 #include "h265e_enctropy.h" 26 #include "h265e_context_table.h" 27 28 #define MIN_PU_SIZE 4 29 #define MIN_TU_SIZE 4 30 #define MAX_NUM_SPU_W (64 / MIN_PU_SIZE) // maximum number of SPU in horizontal line 31 32 /* 33 * For H.265 encoder slice header process. 34 * Remove some syntax that encoder not supported. 35 * Field, mbaff, B slice are not supported yet. 36 */ 37 typedef struct H265eDpbFrm_t H265eDpbFrm; 38 39 typedef struct DataCu_t { 40 RK_U8 m_cuSize[256]; 41 RK_U8 m_cuDepth[256]; 42 RK_U32 pixelX; 43 RK_U32 pixelY; 44 RK_U32 cur_addr; 45 RK_U32 tile_start_x; 46 RK_U32 tile_end_x; 47 RK_U32 tile_end_y; 48 } DataCu; 49 50 typedef struct TileInfo_t { 51 RK_U32 tile_start_x; 52 RK_U32 tile_end_x; 53 RK_U32 tile_start_y; 54 RK_U32 tile_end_y; 55 RK_U32 mb_total; 56 RK_U32 ctu_addr; 57 } TileInfo; 58 59 typedef struct H265eReferencePictureSet_e { 60 RK_S32 m_deltaRIdxMinus1; 61 RK_S32 m_deltaRPS; 62 RK_S32 m_numRefIdc; 63 RK_S32 m_refIdc[MAX_REFS + 1]; 64 65 // Parameters for long term references 66 RK_U32 check_lt_msb[MAX_REFS]; 67 RK_S32 m_pocLSBLT[MAX_REFS]; 68 RK_S32 m_deltaPOCMSBCycleLT[MAX_REFS]; 69 RK_U32 m_deltaPocMSBPresentFlag[MAX_REFS]; 70 71 RK_S32 m_numberOfPictures; 72 RK_S32 num_negative_pic; 73 RK_S32 num_positive_pic; 74 RK_S32 delta_poc[MAX_REFS]; 75 RK_U32 m_used[MAX_REFS]; 76 RK_U32 m_ref[MAX_REFS]; 77 RK_S32 poc[MAX_REFS]; 78 RK_S32 m_RealPoc[MAX_REFS]; 79 80 RK_U32 m_interRPSPrediction; 81 RK_S32 num_long_term_pic; // Zero when disabled 82 } H265eReferencePictureSet; 83 84 typedef struct H265eRPSList_e { 85 RK_S32 m_numberOfReferencePictureSets; 86 H265eReferencePictureSet *m_referencePictureSets; 87 } H265eRPSList; 88 89 typedef struct H265eRefPicListModification_e { 90 RK_U32 m_refPicListModificationFlagL0; 91 RK_U32 m_refPicListModificationFlagL1; 92 RK_U32 m_RefPicSetIdxL0[REF_PIC_LIST_NUM_IDX]; 93 RK_U32 m_RefPicSetIdxL1[REF_PIC_LIST_NUM_IDX]; 94 } H265eRefPicListModification; 95 96 typedef struct ProfileTierLevel_e { 97 RK_S32 m_profileSpace; 98 RK_S32 m_tierFlag; 99 RK_S32 m_profileIdc; 100 RK_S32 m_profileCompatibilityFlag[32]; 101 RK_S32 m_levelIdc; 102 RK_S32 m_progressiveSourceFlag; 103 RK_S32 m_interlacedSourceFlag; 104 RK_S32 m_nonPackedConstraintFlag; 105 RK_S32 m_frameOnlyConstraintFlag; 106 RK_S32 m_max12bitConstraintFlag; 107 RK_S32 m_max10bitConstraintFlag; 108 RK_S32 m_max8bitConstraintFlag; 109 RK_S32 m_max422chromaConstraintFlag; 110 RK_S32 m_max420chromaConstraintFlag; 111 RK_S32 m_maxMonochromaConstraintFlag; 112 RK_S32 m_intraConstraintFlag; 113 RK_S32 m_onePictureConstraintFlag; 114 RK_S32 m_lowerBitRateConstraintFlag; 115 } ProfileTierLevel; 116 117 typedef struct H265ePTL_e { 118 ProfileTierLevel m_generalPTL; 119 ProfileTierLevel m_subLayerPTL[6]; // max. value of max_sub_layers_minus1 is 6 120 RK_S32 m_subLayerProfilePresentFlag[6]; 121 RK_S32 m_subLayerLevelPresentFlag[6]; 122 } H265ePTL; 123 124 typedef struct TimeingInfo_e { 125 RK_U32 m_timingInfoPresentFlag; 126 RK_U32 m_numUnitsInTick; 127 RK_U32 m_timeScale; 128 RK_U32 m_pocProportionalToTimingFlag; 129 RK_U32 m_numTicksPocDiffOneMinus1; 130 } TimingInfo; 131 132 typedef struct H265HrdSubLayerInfo_e { 133 RK_U32 fixedPicRateFlag; 134 RK_U32 fixedPicRateWithinCvsFlag; 135 RK_U32 picDurationInTcMinus1; 136 RK_U32 lowDelayHrdFlag; 137 RK_U32 cpbCntMinus1; 138 RK_U32 bitRateValueMinus1[MAX_CPB_CNT][2]; 139 RK_U32 cpbSizeValue[MAX_CPB_CNT][2]; 140 RK_U32 ducpbSizeValue[MAX_CPB_CNT][2]; 141 RK_U32 cbrFlag[MAX_CPB_CNT][2]; 142 RK_U32 duBitRateValue[MAX_CPB_CNT][2]; 143 } H265eHrdSubLayerInfo; 144 145 typedef struct H265eHrdParameters_e { 146 RK_U32 m_nalHrdParametersPresentFlag; 147 RK_U32 m_vclHrdParametersPresentFlag; 148 RK_U32 m_subPicHrdParamsPresentFlag; 149 RK_U32 m_tickDivisorMinus2; 150 RK_U32 m_duCpbRemovalDelayLengthMinus1; 151 RK_U32 m_subPicCpbParamsInPicTimingSEIFlag; 152 RK_U32 m_dpbOutputDelayDuLengthMinus1; 153 RK_U32 m_bitRateScale; 154 RK_U32 m_cpbSizeScale; 155 RK_U32 m_ducpbSizeScale; 156 RK_U32 m_initialCpbRemovalDelayLengthMinus1; 157 RK_U32 m_cpbRemovalDelayLengthMinus1; 158 RK_U32 m_dpbOutputDelayLengthMinus1; 159 H265eHrdSubLayerInfo m_HRD[MAX_SUB_LAYERS]; 160 } H265eHrdParameters; 161 162 typedef struct H265eVps_e { 163 RK_S32 m_VPSId; 164 RK_U32 m_maxTLayers; 165 RK_U32 m_maxLayers; 166 RK_U32 m_bTemporalIdNestingFlag; 167 168 RK_U32 m_numReorderPics[MAX_SUB_LAYERS]; 169 RK_U32 m_maxDecPicBuffering[MAX_SUB_LAYERS]; 170 RK_U32 m_maxLatencyIncrease[MAX_SUB_LAYERS]; // Really max latency increase plus 1 (value 0 expresses no limit) 171 172 RK_U32 m_numHrdParameters; 173 RK_U32 m_maxNuhReservedZeroLayerId; 174 H265eHrdParameters *m_hrdParameters; 175 RK_U32 *m_hrdOpSetIdx; 176 RK_U32 *m_cprmsPresentFlag; 177 RK_U32 m_numOpSets; 178 RK_U32 m_layerIdIncludedFlag[MAX_VPS_OP_SETS_PLUS1][MAX_VPS_NUH_RESERVED_ZERO_LAYER_ID_PLUS1]; 179 180 H265ePTL m_ptl; 181 TimingInfo m_timingInfo; 182 } H265eVps; 183 184 typedef struct H265eCropInfo_e { 185 RK_U32 m_enabledFlag; 186 RK_S32 m_winLeftOffset; 187 RK_S32 m_winRightOffset; 188 RK_S32 m_winTopOffset; 189 RK_S32 m_winBottomOffset; 190 } H265eCropInfo; 191 192 typedef struct H265eVuiInfo_e { 193 RK_U32 m_aspectRatioInfoPresentFlag; 194 RK_S32 m_aspectRatioIdc; 195 RK_S32 m_sarWidth; 196 RK_S32 m_sarHeight; 197 RK_U32 m_overscanInfoPresentFlag; 198 RK_U32 m_overscanAppropriateFlag; 199 RK_U32 m_videoSignalTypePresentFlag; 200 RK_S32 m_videoFormat; 201 RK_U32 m_videoFullRangeFlag; 202 RK_U32 m_colourDescriptionPresentFlag; 203 RK_S32 m_colourPrimaries; 204 RK_S32 m_transferCharacteristics; 205 RK_S32 m_matrixCoefficients; 206 RK_U32 m_chromaLocInfoPresentFlag; 207 RK_S32 m_chromaSampleLocTypeTopField; 208 RK_S32 m_chromaSampleLocTypeBottomField; 209 RK_U32 m_neutralChromaIndicationFlag; 210 RK_U32 m_fieldSeqFlag; 211 212 H265eCropInfo m_defaultDisplayWindow; 213 RK_U32 m_frameFieldInfoPresentFlag; 214 RK_U32 m_hrdParametersPresentFlag; 215 RK_U32 m_bitstreamRestrictionFlag; 216 RK_U32 m_tilesFixedStructureFlag; 217 RK_U32 m_motionVectorsOverPicBoundariesFlag; 218 RK_U32 m_restrictedRefPicListsFlag; 219 RK_S32 m_minSpatialSegmentationIdc; 220 RK_S32 m_maxBytesPerPicDenom; 221 RK_S32 m_maxBitsPerMinCuDenom; 222 RK_S32 m_log2MaxMvLengthHorizontal; 223 RK_S32 m_log2MaxMvLengthVertical; 224 H265eHrdParameters m_hrdParameters; 225 TimingInfo m_timingInfo; 226 } H265eVuiInfo; 227 228 typedef struct H265eSps_e { 229 230 RK_S32 m_SPSId; 231 RK_S32 m_VPSId; 232 RK_S32 m_chromaFormatIdc; 233 RK_U32 m_colorPlaneFlag; 234 RK_U32 m_maxTLayers; // maximum number of temporal layers 235 236 // Structure 237 RK_U32 m_picWidthInLumaSamples; 238 RK_U32 m_picHeightInLumaSamples; 239 240 RK_S32 m_log2MinCodingBlockSize; 241 RK_S32 m_log2DiffMaxMinCodingBlockSize; 242 RK_U32 m_maxCUSize; 243 RK_U32 m_maxCUDepth; 244 RK_U32 m_addCUDepth; 245 246 H265eCropInfo m_conformanceWindow; 247 248 H265eRPSList m_RPSList; 249 RK_U32 m_bLongTermRefsPresent; 250 RK_U32 m_TMVPFlagsPresent; 251 RK_S32 m_numReorderPics[MAX_SUB_LAYERS]; 252 253 // Tool list 254 RK_U32 m_quadtreeTULog2MaxSize; 255 RK_U32 m_quadtreeTULog2MinSize; 256 RK_U32 m_quadtreeTUMaxDepthInter; 257 RK_U32 m_quadtreeTUMaxDepthIntra; 258 RK_U32 m_usePCM; 259 RK_U32 m_pcmLog2MaxSize; 260 RK_U32 m_pcmLog2MinSize; 261 RK_U32 m_useAMP; 262 263 // Parameter 264 RK_S32 m_bitDepthY; 265 RK_S32 m_bitDepthC; 266 RK_S32 m_qpBDOffsetY; 267 RK_S32 m_qpBDOffsetC; 268 269 RK_U32 m_useLossless; 270 271 RK_U32 m_pcmBitDepthLuma; 272 RK_U32 m_pcmBitDepthChroma; 273 RK_U32 m_bPCMFilterDisableFlag; 274 275 RK_U32 m_bitsForPOC; 276 RK_U32 m_numLongTermRefPicSPS; 277 RK_U32 m_ltRefPicPocLsbSps[33]; 278 RK_U32 m_usedByCurrPicLtSPSFlag[33]; 279 280 // Max physical transform size 281 RK_U32 m_maxTrSize; 282 283 RK_S32 m_iAMPAcc[MAX_CU_DEPTH]; 284 RK_U32 m_bUseSAO; 285 286 RK_U32 m_bTemporalIdNestingFlag; // temporal_id_nesting_flag 287 288 RK_U32 m_scalingListEnabledFlag; //TODO: replaced with scaling_list_mode 289 RK_U32 m_scalingListPresentFlag; 290 RK_U32 m_maxDecPicBuffering[MAX_SUB_LAYERS]; 291 292 RK_U32 m_maxLatencyIncrease[MAX_SUB_LAYERS]; // Really max latency increase plus 1 (value 0 expresses no limit) 293 294 RK_U32 m_useDF; 295 RK_U32 m_useStrongIntraSmoothing; 296 297 RK_S32 m_vuiParametersPresentFlag; 298 H265eVuiInfo vui; 299 H265ePTL *m_ptl; 300 RK_U32 zscan2raster[MAX_NUM_SPU_W * MAX_NUM_SPU_W]; 301 RK_U32 raster2zscan[MAX_NUM_SPU_W * MAX_NUM_SPU_W]; 302 RK_U32 raster2pelx[MAX_NUM_SPU_W * MAX_NUM_SPU_W]; 303 RK_U32 raster2pely[MAX_NUM_SPU_W * MAX_NUM_SPU_W]; 304 } H265eSps; 305 306 typedef struct H265ePps_e { 307 RK_U32 m_PPSId; // pic_parameter_set_id 308 RK_U32 m_SPSId; // seq_parameter_set_id 309 RK_S32 m_picInitQPMinus26; 310 RK_U32 m_useDQP; 311 RK_U32 m_bConstrainedIntraPred; // constrained_intra_pred_flag 312 RK_U32 m_bSliceChromaQpFlag; // slicelevel_chroma_qp_flag 313 314 // access channel 315 H265eSps *m_sps; 316 RK_U32 m_maxCuDQPDepth; 317 RK_U32 m_minCuDQPSize; 318 319 RK_S32 m_chromaCbQpOffset; 320 RK_S32 m_chromaCrQpOffset; 321 322 RK_U32 m_numRefIdxL0DefaultActive; 323 RK_U32 m_numRefIdxL1DefaultActive; 324 325 RK_U32 m_bUseWeightPred; // Use of Weighting Prediction (P_SLICE) 326 RK_U32 m_useWeightedBiPred; // Use of Weighting Bi-Prediction (B_SLICE) 327 RK_U32 m_outputFlagPresentFlag; // Indicates the presence of output_flag in slice header 328 329 RK_U32 m_transquantBypassEnableFlag; // Indicates presence of cu_transquant_bypass_flag in CUs. 330 RK_U32 m_useTransformSkip; 331 RK_U32 m_entropyCodingSyncEnabledFlag; //!< Indicates the presence of wavefronts 332 333 334 RK_S32 m_signHideFlag; 335 RK_S32 m_tiles_enabled_flag; 336 RK_U32 m_bTileUniformSpacing; 337 RK_S32 m_nNumTileColumnsMinus1; 338 RK_S32 m_nTileColumnWidthArray[33]; 339 RK_S32 m_nNumTileRowsMinus1; 340 RK_S32 m_nTileRowHeightArray[128]; 341 RK_U32 m_loopFilterAcrossTilesEnabledFlag; 342 343 RK_U32 m_cabacInitPresentFlag; 344 RK_U32 m_encCABACTableIdx; // Used to transmit table selection across slices 345 346 RK_U32 m_sliceHeaderExtensionPresentFlag; 347 RK_U32 m_deblockingFilterControlPresentFlag; 348 RK_U32 m_LFCrossSliceBoundaryFlag; 349 RK_U32 m_deblockingFilterOverrideEnabledFlag; 350 RK_U32 m_picDisableDeblockingFilterFlag; 351 RK_S32 m_deblockingFilterBetaOffsetDiv2; //< beta offset for deblocking filter 352 RK_S32 m_deblockingFilterTcOffsetDiv2; //< tc offset for deblocking filter 353 RK_U32 m_scalingListPresentFlag; 354 355 // TComScalingList* m_scalingList; //!< ScalingList class pointer 356 RK_U32 m_listsModificationPresentFlag; 357 RK_U32 m_log2ParallelMergeLevelMinus2; 358 RK_S32 m_numExtraSliceHeaderBits; 359 } H265ePps; 360 361 typedef struct H265eSlice_e { 362 363 RK_U32 m_saoEnabledFlag; 364 RK_U32 m_saoEnabledFlagChroma; ///< SAO Cb&Cr enabled flag 365 RK_S32 m_ppsId; ///< picture parameter set ID 366 RK_U32 m_picOutputFlag; ///< pic_output_flag 367 RK_S32 poc; 368 RK_S32 gop_idx; 369 RK_S32 last_idr; 370 371 H265eReferencePictureSet *m_rps; 372 H265eReferencePictureSet m_localRPS; 373 RK_S32 m_bdIdx; 374 H265eRefPicListModification m_RefPicListModification; 375 H265eContextModel_t m_contextModels[MAX_OFF_CTX_MOD]; 376 H265eCabacCtx m_cabac; 377 378 enum NALUnitType m_nalUnitType; ///< Nal unit type for the slice 379 SliceType m_sliceType; 380 381 RK_S32 temporal_id; 382 RK_U32 m_IsGenB; 383 RK_S32 m_sliceQp; 384 RK_U32 m_dependentSliceSegmentFlag; 385 RK_U32 m_deblockingFilterDisable; 386 RK_U32 m_deblockingFilterOverrideFlag; //< offsets for deblocking filter inherit from PPS 387 RK_S32 m_deblockingFilterBetaOffsetDiv2; //< beta offset for deblocking filter 388 RK_S32 m_deblockingFilterTcOffsetDiv2; //< tc offset for deblocking filter 389 RK_S32 m_numRefIdx[2]; // for multiple reference of current slice 390 391 RK_U32 m_bCheckLDC; 392 393 // Data 394 RK_S32 m_sliceQpDelta; 395 RK_S32 m_sliceQpDeltaCb; 396 RK_S32 m_sliceQpDeltaCr; 397 H265eDpbFrm *m_refPicList[2][MAX_REFS + 1]; 398 RK_S32 m_refPOCList[2][MAX_REFS + 1]; 399 RK_U32 m_bIsUsedAsLongTerm[2][MAX_REFS + 1]; 400 401 // referenced slice? 402 RK_U32 is_referenced; 403 404 // access channel 405 H265eSps* m_sps; 406 H265ePps* m_pps; 407 H265eVps* m_vps; 408 RK_U32 m_colFromL0Flag; // collocated picture from List0 flag 409 410 RK_U32 m_colRefIdx; 411 RK_U32 m_maxNumMergeCand; 412 413 RK_U32 m_sliceCurEndCUAddr; 414 RK_U32 m_nextSlice; 415 RK_U32 m_sliceBits; 416 RK_U32 m_sliceSegmentBits; 417 RK_U32 m_bFinalized; 418 419 RK_U32 m_tileOffstForMultES; 420 421 RK_U32* m_substreamSizes; 422 423 // TComScalingList* m_scalingList; //!< pointer of quantization matrix 424 RK_U32 m_cabacInitFlag; 425 426 RK_U32 m_bLMvdL1Zero; 427 RK_S32 m_numEntryPointOffsets; 428 RK_U32 m_temporalLayerNonReferenceFlag; 429 RK_U32 m_LFCrossSliceBoundaryFlag; 430 RK_U32 m_enableTMVPFlag; 431 432 RK_U32 slice_reserved_flag; 433 RK_U32 no_output_of_prior_pics_flag; 434 RK_U32 slice_header_extension_length; 435 RK_U32 ref_pic_list_modification_flag_l0; 436 RK_U32 lst_entry_l0; 437 RK_U32 tot_poc_num; 438 RK_U32 num_long_term_sps; 439 RK_U32 num_long_term_pics; 440 } H265eSlice; 441 442 #ifdef __cplusplus 443 extern "C" { 444 #endif 445 446 void h265e_slice_set_ref_list(H265eDpbFrm *frame_list, H265eSlice *slice); 447 void h265e_slice_set_ref_poc_list(H265eSlice *slice); 448 void h265e_slice_init(void *ctx, EncFrmStatus curr); 449 RK_S32 h265e_code_slice_skip_frame(void *ctx, H265eSlice *slice, RK_U8 *buf, RK_S32 len); 450 H265eDpbFrm* get_lt_ref_pic(H265eDpbFrm *frame_list, H265eSlice *slice, RK_S32 poc, RK_U32 pocHasMsb); 451 452 #ifdef __cplusplus 453 } 454 #endif 455 456 #endif /* __H265E_SLICE_H__ */ 457