1 /******************************************************************************
2 *
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 *
19 ******************************************************************************/
20
21 //============================================================
22 // include files
23 //============================================================
24 #include "mp_precomp.h"
25 #include "phydm_precomp.h"
26
27 #if (defined(CONFIG_RA_DBG_CMD))
28 VOID
odm_RA_ParaAdjust_Send_H2C(IN PVOID pDM_VOID)29 odm_RA_ParaAdjust_Send_H2C(
30 IN PVOID pDM_VOID
31 )
32 {
33
34 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
35 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
36 u1Byte H2C_Parameter[6] = {0};
37
38 H2C_Parameter[0] = RA_FIRST_MACID;
39
40 if (pRA_Table->RA_Para_feedback_req) { /*H2C_Parameter[5]=1 ; ask FW for all RA parameters*/
41 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[H2C] Ask FW for RA parameter\n"));
42 H2C_Parameter[5] |= BIT1; /*ask FW to report RA parameters*/
43 H2C_Parameter[1] = pRA_Table->para_idx; /*pRA_Table->para_idx;*/
44 pRA_Table->RA_Para_feedback_req = 0;
45 } else {
46 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[H2C] Send H2C to FW for modifying RA parameter\n"));
47
48 H2C_Parameter[1] = pRA_Table->para_idx;
49 H2C_Parameter[2] = pRA_Table->rate_idx;
50 /* [8 bit]*/
51 if (pRA_Table->para_idx == RADBG_RTY_PENALTY || pRA_Table->para_idx == RADBG_RATE_UP_RTY_RATIO || pRA_Table->para_idx == RADBG_RATE_DOWN_RTY_RATIO) {
52 H2C_Parameter[3] = pRA_Table->value;
53 H2C_Parameter[4] = 0;
54 }
55 /* [16 bit]*/
56 else {
57 H2C_Parameter[3] = (u1Byte)(((pRA_Table->value_16) & 0xf0) >> 4); /*byte1*/
58 H2C_Parameter[4] = (u1Byte)((pRA_Table->value_16) & 0x0f); /*byte0*/
59 }
60 }
61 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[1] = 0x%x\n", H2C_Parameter[1]));
62 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[2] = 0x%x\n", H2C_Parameter[2]));
63 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[3] = 0x%x\n", H2C_Parameter[3]));
64 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[4] = 0x%x\n", H2C_Parameter[4]));
65 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[5] = 0x%x\n", H2C_Parameter[5]));
66
67 ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RA_PARA_ADJUST, 6, H2C_Parameter);
68
69 }
70
71
72 VOID
odm_RA_ParaAdjust(IN PVOID pDM_VOID)73 odm_RA_ParaAdjust(
74 IN PVOID pDM_VOID
75 )
76 {
77 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
78 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
79 u1Byte rate_idx = pRA_Table->rate_idx;
80 u1Byte value = pRA_Table->value;
81 u1Byte Pre_value = 0xff;
82
83 if (pRA_Table->para_idx == RADBG_RTY_PENALTY) {
84 Pre_value = pRA_Table->RTY_P[rate_idx];
85 pRA_Table->RTY_P[rate_idx] = value;
86 pRA_Table->RTY_P_modify_note[rate_idx] = 1;
87 } else if (pRA_Table->para_idx == RADBG_N_HIGH) {
88
89 } else if (pRA_Table->para_idx == RADBG_N_LOW) {
90
91 } else if (pRA_Table->para_idx == RADBG_RATE_UP_RTY_RATIO) {
92 Pre_value = pRA_Table->RATE_UP_RTY_RATIO[rate_idx];
93 pRA_Table->RATE_UP_RTY_RATIO[rate_idx] = value;
94 pRA_Table->RATE_UP_RTY_RATIO_modify_note[rate_idx] = 1;
95 } else if (pRA_Table->para_idx == RADBG_RATE_DOWN_RTY_RATIO) {
96 Pre_value = pRA_Table->RATE_DOWN_RTY_RATIO[rate_idx];
97 pRA_Table->RATE_DOWN_RTY_RATIO[rate_idx] = value;
98 pRA_Table->RATE_DOWN_RTY_RATIO_modify_note[rate_idx] = 1;
99 }
100 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("Change RA Papa[%d], Rate[ %d ], ((%d)) -> ((%d))\n", pRA_Table->para_idx, rate_idx, Pre_value, value));
101 odm_RA_ParaAdjust_Send_H2C(pDM_Odm);
102 }
103
104 VOID
phydm_ra_print_msg(IN PVOID pDM_VOID,IN u1Byte * value,IN u1Byte * value_default,IN u1Byte * modify_note)105 phydm_ra_print_msg(
106 IN PVOID pDM_VOID,
107 IN u1Byte *value,
108 IN u1Byte *value_default,
109 IN u1Byte *modify_note
110 )
111 {
112 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
113 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
114 u4Byte i;
115
116 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate index| |Current-value| |Default-value| |Modify?|\n"));
117 for (i = 0 ; i <= (pRA_Table->rate_length); i++) {
118 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
119 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [ %d ] %20d %25d %20s\n", i, value[i], value_default[i], ((modify_note[i] == 1) ? "V" : " . ")));
120 #else
121 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [ %d ] %10d %14d %14s\n", i, value[i], value_default[i], ((modify_note[i] == 1) ? "V" : " . ")));
122 #endif
123 }
124
125 }
126
127 VOID
odm_RA_debug(IN PVOID pDM_VOID,IN u4Byte * const dm_value)128 odm_RA_debug(
129 IN PVOID pDM_VOID,
130 IN u4Byte *const dm_value
131 )
132 {
133 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
134 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
135
136 pRA_Table->is_ra_dbg_init = FALSE;
137
138 if (dm_value[0] == 100) { /*1 Print RA Parameters*/
139 u1Byte default_pointer_value;
140 u1Byte *pvalue;
141 u1Byte *pvalue_default;
142 u1Byte *pmodify_note;
143
144 pvalue = pvalue_default = pmodify_note = &default_pointer_value;
145
146 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("\n------------------------------------------------------------------------------------\n"));
147
148 if (dm_value[1] == RADBG_RTY_PENALTY) { /* [1]*/
149 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [1] RTY_PENALTY\n"));
150 pvalue = &(pRA_Table->RTY_P[0]);
151 pvalue_default = &(pRA_Table->RTY_P_default[0]);
152 pmodify_note = (u1Byte *)&(pRA_Table->RTY_P_modify_note[0]);
153 } else if (dm_value[1] == RADBG_N_HIGH) { /* [2]*/
154 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [2] N_HIGH\n"));
155
156 } else if (dm_value[1] == RADBG_N_LOW) { /*[3]*/
157 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [3] N_LOW\n"));
158
159 } else if (dm_value[1] == RADBG_RATE_UP_RTY_RATIO) { /* [8]*/
160 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [8] RATE_UP_RTY_RATIO\n"));
161 pvalue = &(pRA_Table->RATE_UP_RTY_RATIO[0]);
162 pvalue_default = &(pRA_Table->RATE_UP_RTY_RATIO_default[0]);
163 pmodify_note = (u1Byte *)&(pRA_Table->RATE_UP_RTY_RATIO_modify_note[0]);
164 } else if (dm_value[1] == RADBG_RATE_DOWN_RTY_RATIO) { /* [9]*/
165 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [9] RATE_DOWN_RTY_RATIO\n"));
166 pvalue = &(pRA_Table->RATE_DOWN_RTY_RATIO[0]);
167 pvalue_default = &(pRA_Table->RATE_DOWN_RTY_RATIO_default[0]);
168 pmodify_note = (u1Byte *)&(pRA_Table->RATE_DOWN_RTY_RATIO_modify_note[0]);
169 }
170
171 phydm_ra_print_msg(pDM_Odm, pvalue, pvalue_default, pmodify_note);
172 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("\n------------------------------------------------------------------------------------\n\n"));
173
174 } else if (dm_value[0] == 101) {
175 pRA_Table->para_idx = (u1Byte)dm_value[1];
176
177 pRA_Table->RA_Para_feedback_req = 1;
178 odm_RA_ParaAdjust_Send_H2C(pDM_Odm);
179 } else {
180 pRA_Table->para_idx = (u1Byte)dm_value[0];
181 pRA_Table->rate_idx = (u1Byte)dm_value[1];
182 pRA_Table->value = (u1Byte)dm_value[2];
183
184 odm_RA_ParaAdjust(pDM_Odm);
185 }
186 }
187
188 VOID
odm_RA_ParaAdjust_init(IN PVOID pDM_VOID)189 odm_RA_ParaAdjust_init(
190 IN PVOID pDM_VOID
191 )
192 {
193 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
194 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
195 u1Byte i;
196 u1Byte ra_para_pool_u8[3] = { RADBG_RTY_PENALTY, RADBG_RATE_UP_RTY_RATIO, RADBG_RATE_DOWN_RTY_RATIO};
197 u1Byte RateSize_HT_1ss = 20, RateSize_HT_2ss = 28, RateSize_HT_3ss = 36; /*4+8+8+8+8 =36*/
198 u1Byte RateSize_VHT_1ss = 10, RateSize_VHT_2ss = 20, RateSize_VHT_3ss = 30; /*10 + 10 +10 =30*/
199 /*
200 RTY_PENALTY = 1, //u8
201 N_HIGH = 2,
202 N_LOW = 3,
203 RATE_UP_TABLE = 4,
204 RATE_DOWN_TABLE = 5,
205 TRYING_NECESSARY = 6,
206 DROPING_NECESSARY = 7,
207 RATE_UP_RTY_RATIO = 8, //u8
208 RATE_DOWN_RTY_RATIO= 9, //u8
209 ALL_PARA = 0xff
210
211 */
212 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("odm_RA_ParaAdjust_init\n"));
213
214 if (pDM_Odm->SupportICType & (ODM_RTL8188F | ODM_RTL8195A | ODM_RTL8703B | ODM_RTL8723B | ODM_RTL8188E | ODM_RTL8723D))
215 pRA_Table->rate_length = RateSize_HT_1ss;
216 else if (pDM_Odm->SupportICType & (ODM_RTL8192E | ODM_RTL8197F))
217 pRA_Table->rate_length = RateSize_HT_2ss;
218 else if (pDM_Odm->SupportICType & (ODM_RTL8821 | ODM_RTL8881A | ODM_RTL8821C))
219 pRA_Table->rate_length = RateSize_HT_1ss + RateSize_VHT_1ss;
220 else if (pDM_Odm->SupportICType & (ODM_RTL8812 | ODM_RTL8822B))
221 pRA_Table->rate_length = RateSize_HT_2ss + RateSize_VHT_2ss;
222 else if (pDM_Odm->SupportICType == ODM_RTL8814A)
223 pRA_Table->rate_length = RateSize_HT_3ss + RateSize_VHT_3ss;
224 else
225 pRA_Table->rate_length = RateSize_HT_1ss;
226
227 pRA_Table->is_ra_dbg_init = TRUE;
228 for (i = 0; i < 3; i++) {
229 pRA_Table->RA_Para_feedback_req = 1;
230 pRA_Table->para_idx = ra_para_pool_u8[i];
231 odm_RA_ParaAdjust_Send_H2C(pDM_Odm);
232 }
233 }
234
235 #else
236
237 VOID
phydm_RA_debug_PCR(IN PVOID pDM_VOID,IN u4Byte * const dm_value,IN u4Byte * _used,OUT char * output,IN u4Byte * _out_len)238 phydm_RA_debug_PCR(
239 IN PVOID pDM_VOID,
240 IN u4Byte *const dm_value,
241 IN u4Byte *_used,
242 OUT char *output,
243 IN u4Byte *_out_len
244 )
245 {
246 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
247 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
248 u4Byte used = *_used;
249 u4Byte out_len = *_out_len;
250
251 if (dm_value[0] == 100) {
252 PHYDM_SNPRINTF((output+used, out_len-used, "[Get] PCR RA_threshold_offset = (( %s%d ))\n", ((pRA_Table->RA_threshold_offset == 0) ? " " : ((pRA_Table->RA_offset_direction) ? "+" : "-")), pRA_Table->RA_threshold_offset));
253 /**/
254 } else if (dm_value[0] == 0) {
255 pRA_Table->RA_offset_direction = 0;
256 pRA_Table->RA_threshold_offset = (u1Byte)dm_value[1];
257 PHYDM_SNPRINTF((output+used, out_len-used, "[Set] PCR RA_threshold_offset = (( -%d ))\n", pRA_Table->RA_threshold_offset));
258 } else if (dm_value[0] == 1) {
259 pRA_Table->RA_offset_direction = 1;
260 pRA_Table->RA_threshold_offset = (u1Byte)dm_value[1];
261 PHYDM_SNPRINTF((output+used, out_len-used, "[Set] PCR RA_threshold_offset = (( +%d ))\n", pRA_Table->RA_threshold_offset));
262 } else {
263 PHYDM_SNPRINTF((output+used, out_len-used, "[Set] Error\n"));
264 /**/
265 }
266
267 }
268
269 #endif /*#if (defined(CONFIG_RA_DBG_CMD))*/
270
271 VOID
ODM_C2HRaParaReportHandler(IN PVOID pDM_VOID,IN pu1Byte CmdBuf,IN u1Byte CmdLen)272 ODM_C2HRaParaReportHandler(
273 IN PVOID pDM_VOID,
274 IN pu1Byte CmdBuf,
275 IN u1Byte CmdLen
276 )
277 {
278 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
279 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
280
281 u1Byte para_idx = CmdBuf[0]; /*Retry Penalty, NH, NL*/
282 u1Byte RateTypeStart = CmdBuf[1];
283 u1Byte RateTypeLength = CmdLen - 2;
284 u1Byte i;
285
286
287 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[ From FW C2H RA Para ] CmdBuf[0]= (( %d ))\n", CmdBuf[0]));
288
289 #if (defined(CONFIG_RA_DBG_CMD))
290 if (para_idx == RADBG_RTY_PENALTY) {
291 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |RTY Penality Index|\n"));
292
293 for (i = 0 ; i < (RateTypeLength) ; i++) {
294 if (pRA_Table->is_ra_dbg_init)
295 pRA_Table->RTY_P_default[RateTypeStart + i] = CmdBuf[2 + i];
296
297 pRA_Table->RTY_P[RateTypeStart + i] = CmdBuf[2 + i];
298 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("%8d %15d \n", (RateTypeStart + i), pRA_Table->RTY_P[RateTypeStart + i]));
299 }
300
301 } else if (para_idx == RADBG_N_HIGH) {
302 /**/
303 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |N-High|\n"));
304
305
306 } else if (para_idx == RADBG_N_LOW) {
307 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |N-Low|\n"));
308 /**/
309 }
310 else if (para_idx == RADBG_RATE_UP_RTY_RATIO) {
311 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |Rate Up RTY Ratio|\n"));
312
313 for (i = 0; i < (RateTypeLength); i++) {
314 if (pRA_Table->is_ra_dbg_init)
315 pRA_Table->RATE_UP_RTY_RATIO_default[RateTypeStart + i] = CmdBuf[2 + i];
316
317 pRA_Table->RATE_UP_RTY_RATIO[RateTypeStart + i] = CmdBuf[2 + i];
318 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("%8d %15d\n", (RateTypeStart + i), pRA_Table->RATE_UP_RTY_RATIO[RateTypeStart + i]));
319 }
320 } else if (para_idx == RADBG_RATE_DOWN_RTY_RATIO) {
321 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |Rate Down RTY Ratio|\n"));
322
323 for (i = 0; i < (RateTypeLength); i++) {
324 if (pRA_Table->is_ra_dbg_init)
325 pRA_Table->RATE_DOWN_RTY_RATIO_default[RateTypeStart + i] = CmdBuf[2 + i];
326
327 pRA_Table->RATE_DOWN_RTY_RATIO[RateTypeStart + i] = CmdBuf[2 + i];
328 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("%8d %15d\n", (RateTypeStart + i), pRA_Table->RATE_DOWN_RTY_RATIO[RateTypeStart + i]));
329 }
330 } else
331 #endif
332 if (para_idx == RADBG_DEBUG_MONITOR1) {
333 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("-------------------------------\n"));
334 if (pDM_Odm->SupportICType & PHYDM_IC_3081_SERIES) {
335
336 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d\n", "RSSI =", CmdBuf[1]));
337 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x\n", "Rate =", CmdBuf[2] & 0x7f));
338 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d\n", "SGI =", (CmdBuf[2] & 0x80) >> 7));
339 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d\n", "BW =", CmdBuf[3]));
340 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d\n", "BW_max =", CmdBuf[4]));
341 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x\n", "multi_rate0 =", CmdBuf[5]));
342 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x\n", "multi_rate1 =", CmdBuf[6]));
343 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d\n", "DISRA =", CmdBuf[7]));
344 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d\n", "VHT_EN =", CmdBuf[8]));
345 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d\n", "SGI_support =", CmdBuf[9]));
346 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d\n", "try_ness =", CmdBuf[10]));
347 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x\n", "pre_rate =", CmdBuf[11]));
348 } else {
349 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d\n", "RSSI =", CmdBuf[1]));
350 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %x\n", "BW =", CmdBuf[2]));
351 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d\n", "DISRA =", CmdBuf[3]));
352 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d\n", "VHT_EN =", CmdBuf[4]));
353 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d\n", "Hightest Rate =", CmdBuf[5]));
354 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x\n", "Lowest Rate =", CmdBuf[6]));
355 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x\n", "SGI_support =", CmdBuf[7]));
356 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d\n", "Rate_ID =", CmdBuf[8]));;
357 }
358 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("-------------------------------\n"));
359 } else if (para_idx == RADBG_DEBUG_MONITOR2) {
360 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("-------------------------------\n"));
361 if (pDM_Odm->SupportICType & PHYDM_IC_3081_SERIES) {
362 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d\n", "RateID =", CmdBuf[1]));
363 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x\n", "highest_rate =", CmdBuf[2]));
364 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x\n", "lowest_rate =", CmdBuf[3]));
365
366 for (i = 4; i <= 11; i++)
367 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("RAMASK = 0x%x\n", CmdBuf[i]));
368 } else {
369 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %x%x %x%x %x%x %x%x\n", "RA Mask:",
370 CmdBuf[8], CmdBuf[7], CmdBuf[6], CmdBuf[5], CmdBuf[4], CmdBuf[3], CmdBuf[2], CmdBuf[1]));
371 }
372 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("-------------------------------\n"));
373 } else if (para_idx == RADBG_DEBUG_MONITOR3) {
374
375 for (i = 0; i < (CmdLen - 1); i++)
376 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("content[%d] = %d\n", i, CmdBuf[1 + i]));
377 } else if (para_idx == RADBG_DEBUG_MONITOR4)
378 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s {%d.%d}\n", "RA Version =", CmdBuf[1], CmdBuf[2]));
379 else if (para_idx == RADBG_DEBUG_MONITOR5) {
380 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x\n", "Current rate =", CmdBuf[1]));
381 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d\n", "Retry ratio =", CmdBuf[2]));
382 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d\n", "Rate down ratio =", CmdBuf[3]));
383 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x\n", "highest rate =", CmdBuf[4]));
384 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s {0x%x 0x%x}\n", "Muti-try =", CmdBuf[5], CmdBuf[6]));
385 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x%x%x%x%x\n", "RA mask =", CmdBuf[11], CmdBuf[10], CmdBuf[9], CmdBuf[8], CmdBuf[7]));
386 }
387 }
388
389 VOID
phydm_ra_dynamic_retry_count(IN PVOID pDM_VOID)390 phydm_ra_dynamic_retry_count(
391 IN PVOID pDM_VOID
392 )
393 {
394 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
395 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
396 PSTA_INFO_T pEntry;
397 u1Byte i, retry_offset;
398 u4Byte ma_rx_tp;
399
400 if (!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_ARFR)) {
401 return;
402 }
403
404 /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("pDM_Odm->pre_b_noisy = %d\n", pDM_Odm->pre_b_noisy ));*/
405 if (pDM_Odm->pre_b_noisy != pDM_Odm->NoisyDecision) {
406
407 if (pDM_Odm->NoisyDecision) {
408 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("->Noisy Env. RA fallback value\n"));
409 ODM_SetMACReg(pDM_Odm, 0x430, bMaskDWord, 0x0);
410 ODM_SetMACReg(pDM_Odm, 0x434, bMaskDWord, 0x04030201);
411 } else {
412 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("->Clean Env. RA fallback value\n"));
413 ODM_SetMACReg(pDM_Odm, 0x430, bMaskDWord, 0x01000000);
414 ODM_SetMACReg(pDM_Odm, 0x434, bMaskDWord, 0x06050402);
415 }
416 pDM_Odm->pre_b_noisy = pDM_Odm->NoisyDecision;
417 }
418 }
419
420 #if (defined(CONFIG_RA_DYNAMIC_RTY_LIMIT))
421
422 VOID
phydm_retry_limit_table_bound(IN PVOID pDM_VOID,IN u1Byte * retry_limit,IN u1Byte offset)423 phydm_retry_limit_table_bound(
424 IN PVOID pDM_VOID,
425 IN u1Byte *retry_limit,
426 IN u1Byte offset
427 )
428 {
429 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
430 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
431
432 if (*retry_limit > offset) {
433
434 *retry_limit -= offset;
435
436 if (*retry_limit < pRA_Table->retrylimit_low)
437 *retry_limit = pRA_Table->retrylimit_low;
438 else if (*retry_limit > pRA_Table->retrylimit_high)
439 *retry_limit = pRA_Table->retrylimit_high;
440 } else
441 *retry_limit = pRA_Table->retrylimit_low;
442 }
443
444 VOID
phydm_reset_retry_limit_table(IN PVOID pDM_VOID)445 phydm_reset_retry_limit_table(
446 IN PVOID pDM_VOID
447 )
448 {
449 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
450 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
451 u1Byte i;
452
453 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) /*support all IC platform*/
454
455 #else
456 #if ((RTL8192E_SUPPORT == 1) || (RTL8723B_SUPPORT == 1) || (RTL8188E_SUPPORT == 1))
457 u1Byte per_rate_retrylimit_table_20M[ODM_RATEMCS15+1] = {
458 1, 1, 2, 4, /*CCK*/
459 2, 2, 4, 6, 8, 12, 16, 18, /*OFDM*/
460 2, 4, 6, 8, 12, 18, 20, 22, /*20M HT-1SS*/
461 2, 4, 6, 8, 12, 18, 20, 22 /*20M HT-2SS*/
462 };
463 u1Byte per_rate_retrylimit_table_40M[ODM_RATEMCS15+1] = {
464 1, 1, 2, 4, /*CCK*/
465 2, 2, 4, 6, 8, 12, 16, 18, /*OFDM*/
466 4, 8, 12, 16, 24, 32, 32, 32, /*40M HT-1SS*/
467 4, 8, 12, 16, 24, 32, 32, 32 /*40M HT-2SS*/
468 };
469
470 #elif (RTL8821A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1)
471
472 #elif (RTL8812A_SUPPORT == 1)
473
474 #elif(RTL8814A_SUPPORT == 1)
475
476 #else
477
478 #endif
479 #endif
480
481 memcpy(&(pRA_Table->per_rate_retrylimit_20M[0]), &(per_rate_retrylimit_table_20M[0]), ODM_NUM_RATE_IDX);
482 memcpy(&(pRA_Table->per_rate_retrylimit_40M[0]), &(per_rate_retrylimit_table_40M[0]), ODM_NUM_RATE_IDX);
483
484 for (i = 0; i < ODM_NUM_RATE_IDX; i++) {
485 phydm_retry_limit_table_bound(pDM_Odm, &(pRA_Table->per_rate_retrylimit_20M[i]), 0);
486 phydm_retry_limit_table_bound(pDM_Odm, &(pRA_Table->per_rate_retrylimit_40M[i]), 0);
487 }
488 }
489
490 VOID
phydm_ra_dynamic_retry_limit_init(IN PVOID pDM_VOID)491 phydm_ra_dynamic_retry_limit_init(
492 IN PVOID pDM_VOID
493 )
494 {
495 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
496 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
497
498 pRA_Table->retry_descend_num = RA_RETRY_DESCEND_NUM;
499 pRA_Table->retrylimit_low = RA_RETRY_LIMIT_LOW;
500 pRA_Table->retrylimit_high = RA_RETRY_LIMIT_HIGH;
501
502 phydm_reset_retry_limit_table(pDM_Odm);
503
504 }
505
506 #endif
507
508 VOID
phydm_ra_dynamic_retry_limit(IN PVOID pDM_VOID)509 phydm_ra_dynamic_retry_limit(
510 IN PVOID pDM_VOID
511 )
512 {
513 #if (defined(CONFIG_RA_DYNAMIC_RTY_LIMIT))
514 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
515 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
516 PSTA_INFO_T pEntry;
517 u1Byte i, retry_offset;
518 u4Byte ma_rx_tp;
519
520
521 if (pDM_Odm->pre_number_active_client == pDM_Odm->number_active_client) {
522
523 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" pre_number_active_client == number_active_client\n"));
524 return;
525
526 } else {
527 if (pDM_Odm->number_active_client == 1) {
528 phydm_reset_retry_limit_table(pDM_Odm);
529 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("one client only->reset to default value\n"));
530 } else {
531
532 retry_offset = pDM_Odm->number_active_client * pRA_Table->retry_descend_num;
533
534 for (i = 0; i < ODM_NUM_RATE_IDX; i++) {
535
536 phydm_retry_limit_table_bound(pDM_Odm, &(pRA_Table->per_rate_retrylimit_20M[i]), retry_offset);
537 phydm_retry_limit_table_bound(pDM_Odm, &(pRA_Table->per_rate_retrylimit_40M[i]), retry_offset);
538 }
539 }
540 }
541 #endif
542 }
543
544 #if (defined(CONFIG_RA_DYNAMIC_RATE_ID))
545 VOID
phydm_ra_dynamic_rate_id_on_assoc(IN PVOID pDM_VOID,IN u1Byte wireless_mode,IN u1Byte init_rate_id)546 phydm_ra_dynamic_rate_id_on_assoc(
547 IN PVOID pDM_VOID,
548 IN u1Byte wireless_mode,
549 IN u1Byte init_rate_id
550 )
551 {
552 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
553
554 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[ON ASSOC] rf_mode = ((0x%x)), wireless_mode = ((0x%x)), init_rate_id = ((0x%x))\n", pDM_Odm->RFType, wireless_mode, init_rate_id));
555
556 if ((pDM_Odm->RFType == ODM_2T2R) | (pDM_Odm->RFType == ODM_2T2R_GREEN) | (pDM_Odm->RFType == ODM_2T3R) | (pDM_Odm->RFType == ODM_2T4R)) {
557
558 if ((pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8192E)) &&
559 (wireless_mode & (ODM_WM_N24G | ODM_WM_N5G))
560 ){
561 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[ON ASSOC] set N-2SS ARFR5 table\n"));
562 ODM_SetMACReg(pDM_Odm, 0x4a4, bMaskDWord, 0xfc1ffff); /*N-2SS, ARFR5, rate_id = 0xe*/
563 ODM_SetMACReg(pDM_Odm, 0x4a8, bMaskDWord, 0x0); /*N-2SS, ARFR5, rate_id = 0xe*/
564 } else if ((pDM_Odm->SupportICType & (ODM_RTL8812)) &&
565 (wireless_mode & (ODM_WM_AC_5G | ODM_WM_AC_24G | ODM_WM_AC_ONLY))
566 ){
567 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[ON ASSOC] set AC-2SS ARFR0 table\n"));
568 ODM_SetMACReg(pDM_Odm, 0x444, bMaskDWord, 0x0fff); /*AC-2SS, ARFR0, rate_id = 0x9*/
569 ODM_SetMACReg(pDM_Odm, 0x448, bMaskDWord, 0xff01f000); /*AC-2SS, ARFR0, rate_id = 0x9*/
570 }
571 }
572
573 }
574
575 VOID
phydm_ra_dynamic_rate_id_init(IN PVOID pDM_VOID)576 phydm_ra_dynamic_rate_id_init(
577 IN PVOID pDM_VOID
578 )
579 {
580 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
581
582 if (pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8192E)) {
583
584 ODM_SetMACReg(pDM_Odm, 0x4a4, bMaskDWord, 0xfc1ffff); /*N-2SS, ARFR5, rate_id = 0xe*/
585 ODM_SetMACReg(pDM_Odm, 0x4a8, bMaskDWord, 0x0); /*N-2SS, ARFR5, rate_id = 0xe*/
586
587 ODM_SetMACReg(pDM_Odm, 0x444, bMaskDWord, 0x0fff); /*AC-2SS, ARFR0, rate_id = 0x9*/
588 ODM_SetMACReg(pDM_Odm, 0x448, bMaskDWord, 0xff01f000); /*AC-2SS, ARFR0, rate_id = 0x9*/
589 }
590 }
591
592 VOID
phydm_update_rate_id(IN PVOID pDM_VOID,IN u1Byte rate,IN u1Byte platform_macid)593 phydm_update_rate_id(
594 IN PVOID pDM_VOID,
595 IN u1Byte rate,
596 IN u1Byte platform_macid
597 )
598 {
599 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
600 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
601 u1Byte current_tx_ss;
602 u1Byte rate_idx = rate & 0x7f; /*remove bit7 SGI*/
603 u1Byte wireless_mode;
604 u1Byte phydm_macid;
605 PSTA_INFO_T pEntry;
606
607
608 #if 0
609 if (rate_idx >= ODM_RATEVHTSS2MCS0) {
610 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate[%d]: (( VHT2SS-MCS%d ))\n", platform_macid, (rate_idx-ODM_RATEVHTSS2MCS0)));
611 /*dummy for SD4 check patch*/
612 } else if (rate_idx >= ODM_RATEVHTSS1MCS0) {
613 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate[%d]: (( VHT1SS-MCS%d ))\n", platform_macid, (rate_idx-ODM_RATEVHTSS1MCS0)));
614 /*dummy for SD4 check patch*/
615 } else if (rate_idx >= ODM_RATEMCS0) {
616 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate[%d]: (( HT-MCS%d ))\n", platform_macid, (rate_idx-ODM_RATEMCS0)));
617 /*dummy for SD4 check patch*/
618 } else {
619 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate[%d]: (( HT-MCS%d ))\n", platform_macid, rate_idx));
620 /*dummy for SD4 check patch*/
621 }
622 #endif
623
624 phydm_macid = pDM_Odm->platform2phydm_macid_table[platform_macid];
625 pEntry = pDM_Odm->pODM_StaInfo[phydm_macid];
626
627 if (IS_STA_VALID(pEntry)) {
628 wireless_mode = pEntry->WirelessMode;
629
630 if ((pDM_Odm->RFType == ODM_2T2R) | (pDM_Odm->RFType == ODM_2T2R_GREEN) | (pDM_Odm->RFType == ODM_2T3R) | (pDM_Odm->RFType == ODM_2T4R)) {
631
632 pEntry->ratr_idx = pEntry->ratr_idx_init;
633 if (wireless_mode & (ODM_WM_N24G | ODM_WM_N5G)) { /*N mode*/
634 if (rate_idx >= ODM_RATEMCS8 && rate_idx <= ODM_RATEMCS15) { /*2SS mode*/
635
636 pEntry->ratr_idx = ARFR_5_RATE_ID;
637 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("ARFR_5\n"));
638 }
639 } else if (wireless_mode & (ODM_WM_AC_5G | ODM_WM_AC_24G | ODM_WM_AC_ONLY)) {/*AC mode*/
640 if (rate_idx >= ODM_RATEVHTSS2MCS0 && rate_idx <= ODM_RATEVHTSS2MCS9) {/*2SS mode*/
641
642 pEntry->ratr_idx = ARFR_0_RATE_ID;
643 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("ARFR_0\n"));
644 }
645 }
646 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("UPdate_RateID[%d]: (( 0x%x ))\n", platform_macid, pEntry->ratr_idx));
647 }
648 }
649
650 }
651 #endif
652
653 VOID
phydm_print_rate(IN PVOID pDM_VOID,IN u1Byte rate,IN u4Byte dbg_component)654 phydm_print_rate(
655 IN PVOID pDM_VOID,
656 IN u1Byte rate,
657 IN u4Byte dbg_component
658 )
659 {
660 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
661 u1Byte legacy_table[12] = {1, 2, 5, 11, 6, 9, 12, 18, 24, 36, 48, 54};
662 u1Byte rate_idx = rate & 0x7f; /*remove bit7 SGI*/
663 u1Byte vht_en = (rate_idx >= ODM_RATEVHTSS1MCS0) ? 1 : 0;
664 u1Byte b_sgi = (rate & 0x80)>>7;
665
666 ODM_RT_TRACE_F(pDM_Odm, dbg_component, ODM_DBG_LOUD, ("( %s%s%s%s%d%s%s)\n",
667 ((rate_idx >= ODM_RATEVHTSS1MCS0) && (rate_idx <= ODM_RATEVHTSS1MCS9)) ? "VHT 1ss " : "",
668 ((rate_idx >= ODM_RATEVHTSS2MCS0) && (rate_idx <= ODM_RATEVHTSS2MCS9)) ? "VHT 2ss " : "",
669 ((rate_idx >= ODM_RATEVHTSS3MCS0) && (rate_idx <= ODM_RATEVHTSS3MCS9)) ? "VHT 3ss " : "",
670 (rate_idx >= ODM_RATEMCS0) ? "MCS " : "",
671 (vht_en) ? ((rate_idx - ODM_RATEVHTSS1MCS0)%10) : ((rate_idx >= ODM_RATEMCS0) ? (rate_idx - ODM_RATEMCS0) : ((rate_idx <= ODM_RATE54M)?legacy_table[rate_idx]:0)),
672 (b_sgi) ? "-S" : " ",
673 (rate_idx >= ODM_RATEMCS0) ? "" : "M"));
674 }
675
676 VOID
phydm_c2h_ra_report_handler(IN PVOID pDM_VOID,IN pu1Byte CmdBuf,IN u1Byte CmdLen)677 phydm_c2h_ra_report_handler(
678 IN PVOID pDM_VOID,
679 IN pu1Byte CmdBuf,
680 IN u1Byte CmdLen
681 )
682 {
683 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
684 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
685 u1Byte legacy_table[12] = {1,2,5,11,6,9,12,18,24,36,48,54};
686 u1Byte macid = CmdBuf[1];
687 u1Byte rate = CmdBuf[0];
688 u1Byte rate_idx = rate & 0x7f; /*remove bit7 SGI*/
689 u1Byte pre_rate = pRA_Table->link_tx_rate[macid];
690 u1Byte rate_order;
691 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
692 PADAPTER Adapter = pDM_Odm->Adapter;
693
694 GET_HAL_DATA(Adapter)->CurrentRARate = HwRateToMRate(rate_idx);
695 #endif
696
697
698 if (CmdLen >= 4) {
699 if (CmdBuf[3] == 0) {
700 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("TX Init-Rate Update[%d]:", macid));
701 /**/
702 } else if (CmdBuf[3] == 0xff) {
703 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("FW Level: Fix rate[%d]:", macid));
704 /**/
705 } else if (CmdBuf[3] == 1) {
706 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Try Success[%d]:", macid));
707 /**/
708 } else if (CmdBuf[3] == 2) {
709 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Try Fail & Try Again[%d]:", macid));
710 /**/
711 } else if (CmdBuf[3] == 3) {
712 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate Back[%d]:", macid));
713 /**/
714 } else if (CmdBuf[3] == 4) {
715 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("start rate by RSSI[%d]:", macid));
716 /**/
717 } else if (CmdBuf[3] == 5) {
718 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Try rate[%d]:", macid));
719 /**/
720 }
721 } else {
722 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Tx Rate Update[%d]:", macid));
723 /**/
724 }
725
726 /*phydm_print_rate(pDM_Odm, pre_rate_idx, ODM_COMP_RATE_ADAPTIVE);*/
727 /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, (">\n",macid );*/
728 phydm_print_rate(pDM_Odm, rate, ODM_COMP_RATE_ADAPTIVE);
729
730 pRA_Table->link_tx_rate[macid] = rate;
731
732 /*trigger power training*/
733 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
734
735 rate_order = phydm_rate_order_compute(pDM_Odm, rate_idx);
736
737 if ((pDM_Odm->bOneEntryOnly) ||
738 ((rate_order > pRA_Table->highest_client_tx_order) && (pRA_Table->power_tracking_flag == 1))
739 ) {
740 phydm_update_pwr_track(pDM_Odm, rate_idx);
741 pRA_Table->power_tracking_flag = 0;
742 }
743
744 #endif
745
746 /*trigger dynamic rate ID*/
747 #if (defined(CONFIG_RA_DYNAMIC_RATE_ID))
748 if (pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8192E))
749 phydm_update_rate_id(pDM_Odm, rate, macid);
750 #endif
751
752 }
753
754 VOID
odm_RSSIMonitorInit(IN PVOID pDM_VOID)755 odm_RSSIMonitorInit(
756 IN PVOID pDM_VOID
757 )
758 {
759 #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
760 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
761 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
762 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
763 PADAPTER Adapter = pDM_Odm->Adapter;
764 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
765
766 pRA_Table->PT_collision_pre = TRUE; /*used in ODM_DynamicARFBSelect(WIN only)*/
767
768 pHalData->UndecoratedSmoothedPWDB = -1;
769 pHalData->ra_rpt_linked = FALSE;
770 #endif
771
772 pRA_Table->firstconnect = FALSE;
773
774
775 #endif
776 }
777
778 VOID
ODM_RAPostActionOnAssoc(IN PVOID pDM_VOID)779 ODM_RAPostActionOnAssoc(
780 IN PVOID pDM_VOID
781 )
782 {
783 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
784 /*
785 pDM_Odm->H2C_RARpt_connect = 1;
786 odm_RSSIMonitorCheck(pDM_Odm);
787 pDM_Odm->H2C_RARpt_connect = 0;
788 */
789 }
790
791 VOID
phydm_initRaInfo(IN PVOID pDM_VOID)792 phydm_initRaInfo(
793 IN PVOID pDM_VOID
794 )
795 {
796 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
797
798 #if (RTL8822B_SUPPORT == 1)
799 if (pDM_Odm->SupportICType == ODM_RTL8822B) {
800 u4Byte ret_value;
801
802 ret_value = ODM_GetBBReg(pDM_Odm, 0x4c8, bMaskByte2);
803 ODM_SetBBReg(pDM_Odm, 0x4cc, bMaskByte3, (ret_value - 1));
804 }
805 #endif
806 }
807
808 VOID
odm_RSSIMonitorCheckMP(IN PVOID pDM_VOID)809 odm_RSSIMonitorCheckMP(
810 IN PVOID pDM_VOID
811 )
812 {
813 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
814 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
815 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
816 u1Byte H2C_Parameter[H2C_0X42_LENGTH] = {0};
817 u4Byte i;
818 BOOLEAN bExtRAInfo = TRUE;
819 u1Byte cmdlen = H2C_0X42_LENGTH;
820 u1Byte TxBF_EN = 0, stbc_en = 0;
821
822 PADAPTER Adapter = pDM_Odm->Adapter;
823 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
824 PSTA_INFO_T pEntry = NULL;
825 s4Byte tmpEntryMaxPWDB = 0, tmpEntryMinPWDB = 0xff;
826 PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
827 PMGNT_INFO pDefaultMgntInfo = &Adapter->MgntInfo;
828 u8Byte curTxOkCnt = 0, curRxOkCnt = 0;
829 #if (BEAMFORMING_SUPPORT == 1)
830 #ifndef BEAMFORMING_VERSION_1
831 BEAMFORMING_CAP Beamform_cap = BEAMFORMING_CAP_NONE;
832 #endif
833 #endif
834 PADAPTER pLoopAdapter = GetDefaultAdapter(Adapter);
835
836 if (pDM_Odm->SupportICType == ODM_RTL8188E) {
837 bExtRAInfo = FALSE;
838 cmdlen = 3;
839 }
840
841 while (pLoopAdapter) {
842
843 if (pLoopAdapter != NULL) {
844 pMgntInfo = &pLoopAdapter->MgntInfo;
845 curTxOkCnt = pLoopAdapter->TxStats.NumTxBytesUnicast - pMgntInfo->lastTxOkCnt;
846 curRxOkCnt = pLoopAdapter->RxStats.NumRxBytesUnicast - pMgntInfo->lastRxOkCnt;
847 pMgntInfo->lastTxOkCnt = curTxOkCnt;
848 pMgntInfo->lastRxOkCnt = curRxOkCnt;
849 }
850
851 for (i = 0; i < ASSOCIATE_ENTRY_NUM; i++) {
852
853 if (IsAPModeExist(pLoopAdapter)) {
854 if (GetFirstExtAdapter(pLoopAdapter) != NULL &&
855 GetFirstExtAdapter(pLoopAdapter) == pLoopAdapter)
856 pEntry = AsocEntry_EnumStation(pLoopAdapter, i);
857 else if (GetFirstGOPort(pLoopAdapter) != NULL &&
858 IsFirstGoAdapter(pLoopAdapter))
859 pEntry = AsocEntry_EnumStation(pLoopAdapter, i);
860 } else {
861 if (GetDefaultAdapter(pLoopAdapter) == pLoopAdapter)
862 pEntry = AsocEntry_EnumStation(pLoopAdapter, i);
863 }
864
865 if (pEntry != NULL) {
866 if (pEntry->bAssociated) {
867
868 RT_DISP_ADDR(FDM, DM_PWDB, ("pEntry->MacAddr ="), pEntry->MacAddr);
869 RT_DISP(FDM, DM_PWDB, ("pEntry->rssi = 0x%x(%d)\n",
870 pEntry->rssi_stat.UndecoratedSmoothedPWDB, pEntry->rssi_stat.UndecoratedSmoothedPWDB));
871
872 //2 BF_en
873 #if (BEAMFORMING_SUPPORT == 1)
874 #ifndef BEAMFORMING_VERSION_1
875 Beamform_cap = phydm_Beamforming_GetEntryBeamCapByMacId(pDM_Odm, pEntry->AssociatedMacId);
876 if (Beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU))
877 TxBF_EN = 1;
878 #else
879 if(Beamform_GetSupportBeamformerCap(GetDefaultAdapter(Adapter), pEntry))
880 TxBF_EN = 1;
881 #endif
882 #endif
883 //2 STBC_en
884 if ((IS_WIRELESS_MODE_AC(Adapter) && TEST_FLAG(pEntry->VHTInfo.STBC, STBC_VHT_ENABLE_TX)) ||
885 TEST_FLAG(pEntry->HTInfo.STBC, STBC_HT_ENABLE_TX))
886 stbc_en = 1;
887
888 if (pEntry->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB)
889 tmpEntryMinPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
890 if (pEntry->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB)
891 tmpEntryMaxPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
892
893 H2C_Parameter[4] = (pRA_Table->RA_threshold_offset & 0x7f) | (pRA_Table->RA_offset_direction<<8);
894 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RA_threshold_offset = (( %s%d ))\n", ((pRA_Table->RA_threshold_offset == 0) ? " " : ((pRA_Table->RA_offset_direction) ? "+" : "-")),pRA_Table->RA_threshold_offset));
895
896 if (bExtRAInfo) {
897 if (curRxOkCnt > (curTxOkCnt * 6))
898 H2C_Parameter[3] |= RAINFO_BE_RX_STATE;
899
900 if (TxBF_EN)
901 H2C_Parameter[3] |= RAINFO_BF_STATE;
902 else {
903 if (stbc_en)
904 H2C_Parameter[3] |= RAINFO_STBC_STATE;
905 }
906
907 if (pDM_Odm->NoisyDecision)
908 H2C_Parameter[3] |= RAINFO_NOISY_STATE;
909 else
910 H2C_Parameter[3] &= (~RAINFO_NOISY_STATE);
911 #if 1
912 if (pDM_Odm->H2C_RARpt_connect) {
913 H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE;
914 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("H2C_RARpt_connect = (( %d ))\n", pDM_Odm->H2C_RARpt_connect));
915 }
916 #else
917
918 if (pEntry->rssi_stat.ra_rpt_linked == FALSE) {
919 H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE;
920 pEntry->rssi_stat.ra_rpt_linked = TRUE;
921
922 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("RA First Link, RSSI[%d] = ((%d))\n",
923 pEntry->AssociatedMacId, pEntry->rssi_stat.UndecoratedSmoothedPWDB));
924 }
925 #endif
926 }
927
928 H2C_Parameter[2] = (u1Byte)(pEntry->rssi_stat.UndecoratedSmoothedPWDB & 0xFF);
929 //H2C_Parameter[1] = 0x20; // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1
930 H2C_Parameter[0] = (pEntry->AssociatedMacId);
931
932 ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter);
933 }
934 } else
935 break;
936 }
937
938 pLoopAdapter = GetNextExtAdapter(pLoopAdapter);
939 }
940
941
942 /*Default port*/
943 if (tmpEntryMaxPWDB != 0) { // If associated entry is found
944 pHalData->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB;
945 RT_DISP(FDM, DM_PWDB, ("EntryMaxPWDB = 0x%x(%d)\n", tmpEntryMaxPWDB, tmpEntryMaxPWDB));
946 } else
947 pHalData->EntryMaxUndecoratedSmoothedPWDB = 0;
948
949 if (tmpEntryMinPWDB != 0xff) { // If associated entry is found
950 pHalData->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB;
951 RT_DISP(FDM, DM_PWDB, ("EntryMinPWDB = 0x%x(%d)\n", tmpEntryMinPWDB, tmpEntryMinPWDB));
952
953 } else
954 pHalData->EntryMinUndecoratedSmoothedPWDB = 0;
955
956 /* Default porti sent RSSI to FW */
957 if (pHalData->bUseRAMask) {
958 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("1 RA First Link, RSSI[%d] = ((%d)) , ra_rpt_linked = ((%d))\n",
959 WIN_DEFAULT_PORT_MACID, pHalData->UndecoratedSmoothedPWDB, pHalData->ra_rpt_linked));
960 if (pHalData->UndecoratedSmoothedPWDB > 0) {
961
962 PRT_HIGH_THROUGHPUT pHTInfo = GET_HT_INFO(pDefaultMgntInfo);
963 PRT_VERY_HIGH_THROUGHPUT pVHTInfo = GET_VHT_INFO(pDefaultMgntInfo);
964
965 /* BF_en*/
966 #if (BEAMFORMING_SUPPORT == 1)
967 #ifndef BEAMFORMING_VERSION_1
968 Beamform_cap = phydm_Beamforming_GetEntryBeamCapByMacId(pDM_Odm, pDefaultMgntInfo->mMacId);
969
970 if (Beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU))
971 TxBF_EN = 1;
972 #else
973 if(Beamform_GetSupportBeamformerCap(GetDefaultAdapter(Adapter), NULL))
974 TxBF_EN = 1;
975 #endif
976 #endif
977
978 /* STBC_en*/
979 if ((IS_WIRELESS_MODE_AC(Adapter) && TEST_FLAG(pVHTInfo->VhtCurStbc, STBC_VHT_ENABLE_TX)) ||
980 TEST_FLAG(pHTInfo->HtCurStbc, STBC_HT_ENABLE_TX))
981 stbc_en = 1;
982
983 H2C_Parameter[4] = (pRA_Table->RA_threshold_offset & 0x7f) | (pRA_Table->RA_offset_direction<<8);
984 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RA_threshold_offset = (( %s%d ))\n", ((pRA_Table->RA_threshold_offset == 0) ? " " : ((pRA_Table->RA_offset_direction) ? "+" : "-")), pRA_Table->RA_threshold_offset));
985
986 if (bExtRAInfo) {
987 if (TxBF_EN)
988 H2C_Parameter[3] |= RAINFO_BF_STATE;
989 else {
990 if (stbc_en)
991 H2C_Parameter[3] |= RAINFO_STBC_STATE;
992 }
993
994 #if 1
995 if (pDM_Odm->H2C_RARpt_connect) {
996 H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE;
997 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("H2C_RARpt_connect = (( %d ))\n", pDM_Odm->H2C_RARpt_connect));
998 }
999 #else
1000 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("2 RA First Link, RSSI[%d] = ((%d)) , ra_rpt_linked = ((%d))\n",
1001 WIN_DEFAULT_PORT_MACID, pHalData->UndecoratedSmoothedPWDB, pHalData->ra_rpt_linked));
1002
1003 if (pHalData->ra_rpt_linked == FALSE) {
1004
1005 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("3 RA First Link, RSSI[%d] = ((%d)) , ra_rpt_linked = ((%d))\n",
1006 WIN_DEFAULT_PORT_MACID, pHalData->UndecoratedSmoothedPWDB, pHalData->ra_rpt_linked));
1007
1008 H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE;
1009 pHalData->ra_rpt_linked = TRUE;
1010
1011
1012 }
1013 #endif
1014
1015 if (pDM_Odm->NoisyDecision == 1) {
1016 H2C_Parameter[3] |= RAINFO_NOISY_STATE;
1017 ODM_RT_TRACE(pDM_Odm, ODM_COMP_NOISY_DETECT, ODM_DBG_LOUD, ("[RSSIMonitorCheckMP] Send H2C to FW\n"));
1018 } else
1019 H2C_Parameter[3] &= (~RAINFO_NOISY_STATE);
1020
1021 ODM_RT_TRACE(pDM_Odm, ODM_COMP_NOISY_DETECT, ODM_DBG_LOUD, ("[RSSIMonitorCheckMP] H2C_Parameter=%x\n", H2C_Parameter[3]));
1022 }
1023
1024 H2C_Parameter[2] = (u1Byte)(pHalData->UndecoratedSmoothedPWDB & 0xFF);
1025 /*H2C_Parameter[1] = 0x20;*/ /* fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1*/
1026 H2C_Parameter[0] = WIN_DEFAULT_PORT_MACID; /* fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1*/
1027
1028 ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter);
1029 }
1030
1031 // BT 3.0 HS mode Rssi
1032 if (pDM_Odm->bBtHsOperation) {
1033 H2C_Parameter[2] = pDM_Odm->btHsRssi;
1034 //H2C_Parameter[1] = 0x0;
1035 H2C_Parameter[0] = WIN_BT_PORT_MACID;
1036
1037 ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter);
1038 }
1039 } else
1040 PlatformEFIOWrite1Byte(Adapter, 0x4fe, (u1Byte)pHalData->UndecoratedSmoothedPWDB);
1041
1042 if ((pDM_Odm->SupportICType == ODM_RTL8812) || (pDM_Odm->SupportICType == ODM_RTL8192E))
1043 odm_RSSIDumpToRegister(pDM_Odm);
1044
1045
1046 {
1047 PADAPTER pLoopAdapter = GetDefaultAdapter(Adapter);
1048 BOOLEAN default_pointer_value, *pbLink_temp = &default_pointer_value;
1049 s4Byte GlobalRSSI_min = 0xFF, LocalRSSI_Min;
1050 BOOLEAN bLink = FALSE;
1051
1052 while (pLoopAdapter) {
1053 LocalRSSI_Min = phydm_FindMinimumRSSI(pDM_Odm, pLoopAdapter, pbLink_temp);
1054 //DbgPrint("pHalData->bLinked=%d, LocalRSSI_Min=%d\n", pHalData->bLinked, LocalRSSI_Min);
1055
1056 if (*pbLink_temp)
1057 bLink = TRUE;
1058
1059 if ((LocalRSSI_Min < GlobalRSSI_min) && (*pbLink_temp))
1060 GlobalRSSI_min = LocalRSSI_Min;
1061
1062 pLoopAdapter = GetNextExtAdapter(pLoopAdapter);
1063 }
1064
1065 pHalData->bLinked = bLink;
1066 ODM_CmnInfoUpdate(&pHalData->DM_OutSrc , ODM_CMNINFO_LINK, (u8Byte)bLink);
1067
1068 if (bLink)
1069 ODM_CmnInfoUpdate(&pHalData->DM_OutSrc, ODM_CMNINFO_RSSI_MIN, (u8Byte)GlobalRSSI_min);
1070 else
1071 ODM_CmnInfoUpdate(&pHalData->DM_OutSrc, ODM_CMNINFO_RSSI_MIN, 0);
1072
1073 }
1074
1075 #endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1076 }
1077
1078 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
1079 /*H2C_RSSI_REPORT*/
phydm_rssi_report(PDM_ODM_T pDM_Odm,u8 mac_id)1080 s8 phydm_rssi_report(PDM_ODM_T pDM_Odm, u8 mac_id)
1081 {
1082 PADAPTER Adapter = pDM_Odm->Adapter;
1083 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter);
1084 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1085 u8 H2C_Parameter[4] = {0};
1086 u8 UL_DL_STATE = 0, STBC_TX = 0, TxBF_EN = 0;
1087 u8 cmdlen = 4, first_connect = _FALSE;
1088 u64 curTxOkCnt = 0, curRxOkCnt = 0;
1089 PSTA_INFO_T pEntry = pDM_Odm->pODM_StaInfo[mac_id];
1090
1091 if (!IS_STA_VALID(pEntry))
1092 return _FAIL;
1093
1094 if (mac_id != pEntry->mac_id) {
1095 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("%s mac_id:%u:%u invalid\n", __func__, mac_id, pEntry->mac_id));
1096 rtw_warn_on(1);
1097 return _FAIL;
1098 }
1099
1100 if (IS_MCAST(pEntry->hwaddr)) /*if(psta->mac_id ==1)*/
1101 return _FAIL;
1102
1103 if (pEntry->rssi_stat.UndecoratedSmoothedPWDB == (-1)) {
1104 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("%s mac_id:%u, mac:"MAC_FMT", rssi == -1\n", __func__, pEntry->mac_id, MAC_ARG(pEntry->hwaddr)));
1105 return _FAIL;
1106 }
1107
1108 curTxOkCnt = pdvobjpriv->traffic_stat.cur_tx_bytes;
1109 curRxOkCnt = pdvobjpriv->traffic_stat.cur_rx_bytes;
1110 if (curRxOkCnt > (curTxOkCnt * 6))
1111 UL_DL_STATE = 1;
1112 else
1113 UL_DL_STATE = 0;
1114
1115 #ifdef CONFIG_BEAMFORMING
1116 {
1117 #if (BEAMFORMING_SUPPORT == 1)
1118 BEAMFORMING_CAP Beamform_cap = phydm_Beamforming_GetEntryBeamCapByMacId(pDM_Odm, pEntry->mac_id);
1119 #else/*for drv beamforming*/
1120 BEAMFORMING_CAP Beamform_cap = beamforming_get_entry_beam_cap_by_mac_id(&Adapter->mlmepriv, pEntry->mac_id);
1121 #endif
1122
1123 if (Beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU))
1124 TxBF_EN = 1;
1125 else
1126 TxBF_EN = 0;
1127 }
1128 #endif /*#ifdef CONFIG_BEAMFORMING*/
1129
1130 if (TxBF_EN)
1131 STBC_TX = 0;
1132 else {
1133 #ifdef CONFIG_80211AC_VHT
1134 if (IsSupportedVHT(pEntry->wireless_mode))
1135 STBC_TX = TEST_FLAG(pEntry->vhtpriv.stbc_cap, STBC_VHT_ENABLE_TX);
1136 else
1137 #endif
1138 STBC_TX = TEST_FLAG(pEntry->htpriv.stbc_cap, STBC_HT_ENABLE_TX);
1139 }
1140
1141 H2C_Parameter[0] = (u8)(pEntry->mac_id & 0xFF);
1142 H2C_Parameter[2] = pEntry->rssi_stat.UndecoratedSmoothedPWDB & 0x7F;
1143
1144 if (UL_DL_STATE)
1145 H2C_Parameter[3] |= RAINFO_BE_RX_STATE;
1146
1147 if (TxBF_EN)
1148 H2C_Parameter[3] |= RAINFO_BF_STATE;
1149 if (STBC_TX)
1150 H2C_Parameter[3] |= RAINFO_STBC_STATE;
1151 if (pDM_Odm->NoisyDecision)
1152 H2C_Parameter[3] |= RAINFO_NOISY_STATE;
1153
1154 if ((pEntry->ra_rpt_linked == _FALSE) && (pEntry->rssi_stat.bsend_rssi == RA_RSSI_STATE_SEND)) {
1155 H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE;
1156 pEntry->ra_rpt_linked = _TRUE;
1157 pEntry->rssi_stat.bsend_rssi = RA_RSSI_STATE_HOLD;
1158 first_connect = _TRUE;
1159 }
1160
1161 #if 1
1162 if (first_connect) {
1163 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("%s mac_id:%u, mac:"MAC_FMT", rssi:%d\n", __func__,
1164 pEntry->mac_id, MAC_ARG(pEntry->hwaddr), pEntry->rssi_stat.UndecoratedSmoothedPWDB));
1165
1166 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("%s RAINFO - TP:%s, TxBF:%s, STBC:%s, Noisy:%s, Firstcont:%s\n", __func__,
1167 (UL_DL_STATE) ? "DL" : "UL", (TxBF_EN) ? "EN" : "DIS", (STBC_TX) ? "EN" : "DIS",
1168 (pDM_Odm->NoisyDecision) ? "True" : "False", (first_connect) ? "True" : "False"));
1169 }
1170 #endif
1171
1172 if (pHalData->fw_ractrl == _TRUE) {
1173 #if (RTL8188E_SUPPORT == 1)
1174 if (pDM_Odm->SupportICType == ODM_RTL8188E)
1175 cmdlen = 3;
1176 #endif
1177 ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter);
1178 } else {
1179 #if ((RTL8188E_SUPPORT == 1) && (RATE_ADAPTIVE_SUPPORT == 1))
1180 if (pDM_Odm->SupportICType == ODM_RTL8188E)
1181 ODM_RA_SetRSSI_8188E(pDM_Odm, (u8)(pEntry->mac_id & 0xFF), pEntry->rssi_stat.UndecoratedSmoothedPWDB & 0x7F);
1182 #endif
1183 }
1184 return _SUCCESS;
1185 }
1186
phydm_ra_rssi_rpt_wk_hdl(PVOID pContext)1187 void phydm_ra_rssi_rpt_wk_hdl(PVOID pContext)
1188 {
1189 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pContext;
1190 int i;
1191 u8 mac_id = 0xFF;
1192 PSTA_INFO_T pEntry = NULL;
1193
1194 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
1195 pEntry = pDM_Odm->pODM_StaInfo[i];
1196 if (IS_STA_VALID(pEntry)) {
1197 if (IS_MCAST(pEntry->hwaddr)) /*if(psta->mac_id ==1)*/
1198 continue;
1199 if (pEntry->ra_rpt_linked == _FALSE) {
1200 mac_id = i;
1201 break;
1202 }
1203 }
1204 }
1205 if (mac_id != 0xFF)
1206 phydm_rssi_report(pDM_Odm, mac_id);
1207 }
phydm_ra_rssi_rpt_wk(PVOID pContext)1208 void phydm_ra_rssi_rpt_wk(PVOID pContext)
1209 {
1210 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pContext;
1211
1212 rtw_run_in_thread_cmd(pDM_Odm->Adapter, phydm_ra_rssi_rpt_wk_hdl, pDM_Odm);
1213 }
1214 #endif
1215
1216 VOID
odm_RSSIMonitorCheckCE(IN PVOID pDM_VOID)1217 odm_RSSIMonitorCheckCE(
1218 IN PVOID pDM_VOID
1219 )
1220 {
1221 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
1222 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1223 PADAPTER Adapter = pDM_Odm->Adapter;
1224 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1225 PSTA_INFO_T pEntry;
1226 int i;
1227 int tmpEntryMaxPWDB = 0, tmpEntryMinPWDB = 0xff;
1228 u8 sta_cnt = 0;
1229
1230 if (pDM_Odm->bLinked != _TRUE)
1231 return;
1232
1233 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
1234 pEntry = pDM_Odm->pODM_StaInfo[i];
1235 if (IS_STA_VALID(pEntry)) {
1236 if (IS_MCAST(pEntry->hwaddr)) /*if(psta->mac_id ==1)*/
1237 continue;
1238
1239 if (pEntry->rssi_stat.UndecoratedSmoothedPWDB == (-1))
1240 continue;
1241
1242 if (pEntry->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB)
1243 tmpEntryMinPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
1244
1245 if (pEntry->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB)
1246 tmpEntryMaxPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
1247
1248 if (phydm_rssi_report(pDM_Odm, i))
1249 sta_cnt++;
1250 }
1251 }
1252
1253 if (tmpEntryMaxPWDB != 0) // If associated entry is found
1254 pHalData->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB;
1255 else
1256 pHalData->EntryMaxUndecoratedSmoothedPWDB = 0;
1257
1258 if (tmpEntryMinPWDB != 0xff) // If associated entry is found
1259 pHalData->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB;
1260 else
1261 pHalData->EntryMinUndecoratedSmoothedPWDB = 0;
1262
1263 FindMinimumRSSI(Adapter);//get pdmpriv->MinUndecoratedPWDBForDM
1264
1265 pDM_Odm->RSSI_Min = pHalData->MinUndecoratedPWDBForDM;
1266 //ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM);
1267 #endif//if (DM_ODM_SUPPORT_TYPE == ODM_CE)
1268 }
1269
1270
1271 VOID
odm_RSSIMonitorCheckAP(IN PVOID pDM_VOID)1272 odm_RSSIMonitorCheckAP(
1273 IN PVOID pDM_VOID
1274 )
1275 {
1276 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
1277 #if (RTL8812A_SUPPORT || RTL8881A_SUPPORT || RTL8192E_SUPPORT || RTL8814A_SUPPORT || RTL8197F_SUPPORT)
1278
1279 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1280 u1Byte H2C_Parameter[H2C_0X42_LENGTH] = {0};
1281 u4Byte i;
1282 BOOLEAN bExtRAInfo = TRUE;
1283 u1Byte cmdlen = H2C_0X42_LENGTH;
1284 u1Byte TxBF_EN = 0, stbc_en = 0;
1285
1286 prtl8192cd_priv priv = pDM_Odm->priv;
1287 PSTA_INFO_T pstat;
1288 BOOLEAN act_bfer = FALSE;
1289
1290 #if (BEAMFORMING_SUPPORT == 1)
1291 u1Byte Idx=0xff;
1292 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
1293 pBDC_T pDM_BdcTable = &pDM_Odm->DM_BdcTable;
1294 pDM_BdcTable->num_Txbfee_Client = 0;
1295 pDM_BdcTable->num_Txbfer_Client = 0;
1296 #endif
1297 #endif
1298 if (!pDM_Odm->H2C_RARpt_connect && (priv->up_time % 2))
1299 return;
1300
1301 if (pDM_Odm->SupportICType == ODM_RTL8188E) {
1302 bExtRAInfo = FALSE;
1303 cmdlen = 3;
1304 }
1305
1306 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
1307 pstat = pDM_Odm->pODM_StaInfo[i];
1308
1309 if (IS_STA_VALID(pstat)) {
1310 if (pstat->sta_in_firmware != 1)
1311 continue;
1312
1313 //2 BF_en
1314 #if (BEAMFORMING_SUPPORT == 1)
1315 BEAMFORMING_CAP Beamform_cap = Beamforming_GetEntryBeamCapByMacId(priv, pstat->aid);
1316 PRT_BEAMFORMING_ENTRY pEntry = Beamforming_GetEntryByMacId(priv, pstat->aid, &Idx);
1317
1318 if (Beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU)) {
1319
1320 if (pEntry->Sounding_En)
1321 TxBF_EN = 1;
1322 else
1323 TxBF_EN = 0;
1324
1325 act_bfer = TRUE;
1326 }
1327
1328 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY)) /*BDC*/
1329 if (act_bfer == TRUE) {
1330 pDM_BdcTable->w_BFee_Client[i] = 1; //AP act as BFer
1331 pDM_BdcTable->num_Txbfee_Client++;
1332 } else {
1333 pDM_BdcTable->w_BFee_Client[i] = 0; //AP act as BFer
1334 }
1335
1336 if ((Beamform_cap & BEAMFORMEE_CAP_HT_EXPLICIT) || (Beamform_cap & BEAMFORMEE_CAP_VHT_SU)) {
1337 pDM_BdcTable->w_BFer_Client[i] = 1; //AP act as BFee
1338 pDM_BdcTable->num_Txbfer_Client++;
1339 } else {
1340 pDM_BdcTable->w_BFer_Client[i] = 0; //AP act as BFer
1341 }
1342 #endif
1343 #endif
1344
1345 //2 STBC_en
1346 if ((priv->pmib->dot11nConfigEntry.dot11nSTBC) &&
1347 ((pstat->ht_cap_buf.ht_cap_info & cpu_to_le16(_HTCAP_RX_STBC_CAP_))
1348 #ifdef RTK_AC_SUPPORT
1349 || (pstat->vht_cap_buf.vht_cap_info & cpu_to_le32(_VHTCAP_RX_STBC_CAP_))
1350 #endif
1351 ))
1352 stbc_en = 1;
1353
1354 //2 RAINFO
1355
1356 if (bExtRAInfo) {
1357 if ((pstat->rx_avarage) > ((pstat->tx_avarage) * 6))
1358 H2C_Parameter[3] |= RAINFO_BE_RX_STATE;
1359
1360 if (TxBF_EN)
1361 H2C_Parameter[3] |= RAINFO_BF_STATE;
1362 else {
1363 if (stbc_en)
1364 H2C_Parameter[3] |= RAINFO_STBC_STATE;
1365 }
1366
1367 if (pDM_Odm->NoisyDecision)
1368 H2C_Parameter[3] |= RAINFO_NOISY_STATE;
1369 else
1370 H2C_Parameter[3] &= (~RAINFO_NOISY_STATE);
1371
1372 if (pstat->H2C_rssi_rpt) {
1373 H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE;
1374 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[RA Init] set Init rate by RSSI, STA %d\n", pstat->aid));
1375 }
1376
1377 /*ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[RAINFO] H2C_Para[3] = %x\n",H2C_Parameter[3]));*/
1378 }
1379
1380 H2C_Parameter[2] = (u1Byte)(pstat->rssi & 0xFF);
1381 H2C_Parameter[0] = REMAP_AID(pstat);
1382
1383 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("H2C_Parameter[3]=%d\n", H2C_Parameter[3]));
1384
1385 //ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[RSSI] H2C_Para[2] = %x, \n",H2C_Parameter[2]));
1386 //ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[MACID] H2C_Para[0] = %x, \n",H2C_Parameter[0]));
1387
1388 ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter);
1389
1390 }
1391 }
1392
1393 #endif
1394 #endif
1395
1396 }
1397
1398 VOID
odm_RSSIMonitorCheck(IN PVOID pDM_VOID)1399 odm_RSSIMonitorCheck(
1400 IN PVOID pDM_VOID
1401 )
1402 {
1403 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1404
1405 if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR))
1406 return;
1407
1408 switch (pDM_Odm->SupportPlatform) {
1409 case ODM_WIN:
1410 odm_RSSIMonitorCheckMP(pDM_Odm);
1411 break;
1412
1413 case ODM_CE:
1414 odm_RSSIMonitorCheckCE(pDM_Odm);
1415 break;
1416
1417 case ODM_AP:
1418 odm_RSSIMonitorCheckAP(pDM_Odm);
1419 break;
1420
1421 default:
1422 break;
1423 }
1424
1425 }
1426
1427 VOID
odm_RateAdaptiveMaskInit(IN PVOID pDM_VOID)1428 odm_RateAdaptiveMaskInit(
1429 IN PVOID pDM_VOID
1430 )
1431 {
1432 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1433 PODM_RATE_ADAPTIVE pOdmRA = &pDM_Odm->RateAdaptive;
1434
1435 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1436 PMGNT_INFO pMgntInfo = &pDM_Odm->Adapter->MgntInfo;
1437 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pDM_Odm->Adapter);
1438
1439 pMgntInfo->Ratr_State = DM_RATR_STA_INIT;
1440
1441 if (pMgntInfo->DM_Type == DM_Type_ByDriver)
1442 pHalData->bUseRAMask = TRUE;
1443 else
1444 pHalData->bUseRAMask = FALSE;
1445
1446 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
1447 pOdmRA->Type = DM_Type_ByDriver;
1448 if (pOdmRA->Type == DM_Type_ByDriver)
1449 pDM_Odm->bUseRAMask = _TRUE;
1450 else
1451 pDM_Odm->bUseRAMask = _FALSE;
1452 #endif
1453
1454 pOdmRA->RATRState = DM_RATR_STA_INIT;
1455
1456 #if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
1457 if (pDM_Odm->SupportICType == ODM_RTL8812)
1458 pOdmRA->LdpcThres = 50;
1459 else
1460 pOdmRA->LdpcThres = 35;
1461
1462 pOdmRA->RtsThres = 35;
1463
1464 #elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
1465 pOdmRA->LdpcThres = 35;
1466 pOdmRA->bUseLdpc = FALSE;
1467
1468 #else
1469 pOdmRA->UltraLowRSSIThresh = 9;
1470
1471 #endif
1472
1473 pOdmRA->HighRSSIThresh = 50;
1474 #if (DM_ODM_SUPPORT_TYPE == ODM_AP) && \
1475 ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))
1476 pOdmRA->LowRSSIThresh = 23;
1477 #else
1478 pOdmRA->LowRSSIThresh = 20;
1479 #endif
1480 }
1481 /*-----------------------------------------------------------------------------
1482 * Function: odm_RefreshRateAdaptiveMask()
1483 *
1484 * Overview: Update rate table mask according to rssi
1485 *
1486 * Input: NONE
1487 *
1488 * Output: NONE
1489 *
1490 * Return: NONE
1491 *
1492 * Revised History:
1493 * When Who Remark
1494 * 05/27/2009 hpfan Create Version 0.
1495 *
1496 *---------------------------------------------------------------------------*/
1497 VOID
odm_RefreshRateAdaptiveMask(IN PVOID pDM_VOID)1498 odm_RefreshRateAdaptiveMask(
1499 IN PVOID pDM_VOID
1500 )
1501 {
1502 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1503
1504 if (!pDM_Odm->bLinked)
1505 return;
1506
1507 if (!(pDM_Odm->SupportAbility & ODM_BB_RA_MASK)) {
1508 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("odm_RefreshRateAdaptiveMask(): Return cos not supported\n"));
1509 return;
1510 }
1511 //
1512 // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate
1513 // at the same time. In the stage2/3, we need to prive universal interface and merge all
1514 // HW dynamic mechanism.
1515 //
1516 switch (pDM_Odm->SupportPlatform) {
1517 case ODM_WIN:
1518 odm_RefreshRateAdaptiveMaskMP(pDM_Odm);
1519 break;
1520
1521 case ODM_CE:
1522 odm_RefreshRateAdaptiveMaskCE(pDM_Odm);
1523 break;
1524
1525 case ODM_AP:
1526 odm_RefreshRateAdaptiveMaskAPADSL(pDM_Odm);
1527 break;
1528 }
1529
1530 }
1531
1532 u1Byte
phydm_trans_platform_bw(IN PVOID pDM_VOID,IN u1Byte BW)1533 phydm_trans_platform_bw(
1534 IN PVOID pDM_VOID,
1535 IN u1Byte BW
1536 )
1537 {
1538 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1539 if (BW == CHANNEL_WIDTH_20)
1540 BW = PHYDM_BW_20;
1541
1542 else if (BW == CHANNEL_WIDTH_40)
1543 BW = PHYDM_BW_40;
1544
1545 else if (BW == CHANNEL_WIDTH_80)
1546 BW = PHYDM_BW_80;
1547
1548 else if (BW == CHANNEL_WIDTH_160)
1549 BW = PHYDM_BW_160;
1550
1551 else if (BW == CHANNEL_WIDTH_80_80)
1552 BW = PHYDM_BW_80_80;
1553
1554 #elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
1555
1556 if (BW == HT_CHANNEL_WIDTH_20)
1557 BW = PHYDM_BW_20;
1558
1559 else if (BW == HT_CHANNEL_WIDTH_20_40)
1560 BW = PHYDM_BW_40;
1561
1562 else if (BW == HT_CHANNEL_WIDTH_80)
1563 BW = PHYDM_BW_80;
1564
1565 else if (BW == HT_CHANNEL_WIDTH_160)
1566 BW = PHYDM_BW_160;
1567
1568 else if (BW == HT_CHANNEL_WIDTH_10)
1569 BW = PHYDM_BW_10;
1570
1571 else if (BW == HT_CHANNEL_WIDTH_5)
1572 BW = PHYDM_BW_5;
1573
1574 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
1575
1576 if (BW == CHANNEL_WIDTH_20)
1577 BW = PHYDM_BW_20;
1578
1579 else if (BW == CHANNEL_WIDTH_40)
1580 BW = PHYDM_BW_40;
1581
1582 else if (BW == CHANNEL_WIDTH_80)
1583 BW = PHYDM_BW_80;
1584
1585 else if (BW == CHANNEL_WIDTH_160)
1586 BW = PHYDM_BW_160;
1587
1588 else if (BW == CHANNEL_WIDTH_80_80)
1589 BW = PHYDM_BW_80_80;
1590 #endif
1591
1592 return BW;
1593
1594 }
1595
1596 u1Byte
phydm_trans_platform_rf_type(IN PVOID pDM_VOID,IN u1Byte RfType)1597 phydm_trans_platform_rf_type(
1598 IN PVOID pDM_VOID,
1599 IN u1Byte RfType
1600 )
1601 {
1602 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1603 if (RfType == RF_1T2R)
1604 RfType = PHYDM_RF_1T2R;
1605
1606 else if (RfType == RF_2T4R)
1607 RfType = PHYDM_RF_2T4R;
1608
1609 else if (RfType == RF_2T2R)
1610 RfType = PHYDM_RF_2T2R;
1611
1612 else if (RfType == RF_1T1R)
1613 RfType = PHYDM_RF_1T1R;
1614
1615 else if (RfType == RF_2T2R_GREEN)
1616 RfType = PHYDM_RF_2T2R_GREEN;
1617
1618 else if (RfType == RF_3T3R)
1619 RfType = PHYDM_RF_3T3R;
1620
1621 else if (RfType == RF_4T4R)
1622 RfType = PHYDM_RF_4T4R;
1623
1624 else if (RfType == RF_2T3R)
1625 RfType = PHYDM_RF_1T2R;
1626
1627 else if (RfType == RF_3T4R)
1628 RfType = PHYDM_RF_3T4R;
1629
1630 #elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
1631
1632 if (RfType == MIMO_1T2R)
1633 RfType = PHYDM_RF_1T2R;
1634
1635 else if (RfType == MIMO_2T4R)
1636 RfType = PHYDM_RF_2T4R;
1637
1638 else if (RfType == MIMO_2T2R)
1639 RfType = PHYDM_RF_2T2R;
1640
1641 else if (RfType == MIMO_1T1R)
1642 RfType = PHYDM_RF_1T1R;
1643
1644 else if (RfType == MIMO_3T3R)
1645 RfType = PHYDM_RF_3T3R;
1646
1647 else if (RfType == MIMO_4T4R)
1648 RfType = PHYDM_RF_4T4R;
1649
1650 else if (RfType == MIMO_2T3R)
1651 RfType = PHYDM_RF_1T2R;
1652
1653 else if (RfType == MIMO_3T4R)
1654 RfType = PHYDM_RF_3T4R;
1655
1656 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
1657
1658 if (RfType == RF_1T2R)
1659 RfType = PHYDM_RF_1T2R;
1660
1661 else if (RfType == RF_2T4R)
1662 RfType = PHYDM_RF_2T4R;
1663
1664 else if (RfType == RF_2T2R)
1665 RfType = PHYDM_RF_2T2R;
1666
1667 else if (RfType == RF_1T1R)
1668 RfType = PHYDM_RF_1T1R;
1669
1670 else if (RfType == RF_2T2R_GREEN)
1671 RfType = PHYDM_RF_2T2R_GREEN;
1672
1673 else if (RfType == RF_3T3R)
1674 RfType = PHYDM_RF_3T3R;
1675
1676 else if (RfType == RF_4T4R)
1677 RfType = PHYDM_RF_4T4R;
1678
1679 else if (RfType == RF_2T3R)
1680 RfType = PHYDM_RF_1T2R;
1681
1682 else if (RfType == RF_3T4R)
1683 RfType = PHYDM_RF_3T4R;
1684
1685 #endif
1686
1687 return RfType;
1688
1689 }
1690
1691 u4Byte
phydm_trans_platform_wireless_mode(IN PVOID pDM_VOID,IN u4Byte wireless_mode)1692 phydm_trans_platform_wireless_mode(
1693 IN PVOID pDM_VOID,
1694 IN u4Byte wireless_mode
1695 )
1696 {
1697 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1698
1699 #elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
1700
1701 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
1702
1703 if (wireless_mode == WIRELESS_11A)
1704 wireless_mode = PHYDM_WIRELESS_MODE_A;
1705
1706 else if (wireless_mode == WIRELESS_11B)
1707 wireless_mode = PHYDM_WIRELESS_MODE_B;
1708
1709 else if ((wireless_mode == WIRELESS_11G) || (wireless_mode == WIRELESS_11BG))
1710 wireless_mode = PHYDM_WIRELESS_MODE_G;
1711
1712 else if (wireless_mode == WIRELESS_AUTO)
1713 wireless_mode = PHYDM_WIRELESS_MODE_AUTO;
1714
1715 else if ((wireless_mode == WIRELESS_11_24N) || (wireless_mode == WIRELESS_11G_24N) || (wireless_mode == WIRELESS_11B_24N) ||
1716 (wireless_mode == WIRELESS_11BG_24N) || (wireless_mode == WIRELESS_MODE_24G) || (wireless_mode == WIRELESS_11ABGN) || (wireless_mode == WIRELESS_11AGN))
1717 wireless_mode = PHYDM_WIRELESS_MODE_N_24G;
1718
1719 else if ((wireless_mode == WIRELESS_11_5N) || (wireless_mode == WIRELESS_11A_5N))
1720 wireless_mode = PHYDM_WIRELESS_MODE_N_5G;
1721
1722 else if ((wireless_mode == WIRELESS_11AC) || (wireless_mode == WIRELESS_11_5AC) || (wireless_mode == WIRELESS_MODE_5G))
1723 wireless_mode = PHYDM_WIRELESS_MODE_AC_5G;
1724
1725 else if (wireless_mode == WIRELESS_11_24AC)
1726 wireless_mode = PHYDM_WIRELESS_MODE_AC_24G;
1727
1728 else if (wireless_mode == WIRELESS_11AC)
1729 wireless_mode = PHYDM_WIRELESS_MODE_AC_ONLY;
1730
1731 else if (wireless_mode == WIRELESS_MODE_MAX)
1732 wireless_mode = PHYDM_WIRELESS_MODE_MAX;
1733 else
1734 wireless_mode = PHYDM_WIRELESS_MODE_UNKNOWN;
1735 #endif
1736
1737 return wireless_mode;
1738
1739 }
1740
1741 u1Byte
phydm_vht_en_mapping(IN PVOID pDM_VOID,IN u4Byte WirelessMode)1742 phydm_vht_en_mapping(
1743 IN PVOID pDM_VOID,
1744 IN u4Byte WirelessMode
1745 )
1746 {
1747 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1748 u1Byte vht_en_out = 0;
1749
1750 if ((WirelessMode == PHYDM_WIRELESS_MODE_AC_5G) ||
1751 (WirelessMode == PHYDM_WIRELESS_MODE_AC_24G) ||
1752 (WirelessMode == PHYDM_WIRELESS_MODE_AC_ONLY)
1753 ) {
1754 vht_en_out = 1;
1755 /**/
1756 }
1757
1758 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("WirelessMode= (( 0x%x )), VHT_EN= (( %d ))\n", WirelessMode, vht_en_out));
1759 return vht_en_out;
1760 }
1761
1762 u1Byte
phydm_rate_id_mapping(IN PVOID pDM_VOID,IN u4Byte WirelessMode,IN u1Byte RfType,IN u1Byte bw)1763 phydm_rate_id_mapping(
1764 IN PVOID pDM_VOID,
1765 IN u4Byte WirelessMode,
1766 IN u1Byte RfType,
1767 IN u1Byte bw
1768 )
1769 {
1770 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1771 u1Byte rate_id_idx = 0;
1772 u1Byte phydm_BW;
1773 u1Byte phydm_RfType;
1774
1775 phydm_BW = phydm_trans_platform_bw(pDM_Odm, bw);
1776 phydm_RfType = phydm_trans_platform_rf_type(pDM_Odm, RfType);
1777 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
1778 WirelessMode = phydm_trans_platform_wireless_mode(pDM_Odm, WirelessMode);
1779 #endif
1780
1781 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("wirelessMode= (( 0x%x )), RfType = (( 0x%x )), BW = (( 0x%x ))\n",
1782 WirelessMode, phydm_RfType, phydm_BW));
1783
1784
1785 switch (WirelessMode) {
1786
1787 case PHYDM_WIRELESS_MODE_N_24G:
1788 {
1789
1790 if (phydm_BW == PHYDM_BW_40) {
1791
1792 if (phydm_RfType == PHYDM_RF_1T1R)
1793 rate_id_idx = PHYDM_BGN_40M_1SS;
1794 else if (phydm_RfType == PHYDM_RF_2T2R)
1795 rate_id_idx = PHYDM_BGN_40M_2SS;
1796 else
1797 rate_id_idx = PHYDM_ARFR5_N_3SS;
1798
1799 } else {
1800
1801 if (phydm_RfType == PHYDM_RF_1T1R)
1802 rate_id_idx = PHYDM_BGN_20M_1SS;
1803 else if (phydm_RfType == PHYDM_RF_2T2R)
1804 rate_id_idx = PHYDM_BGN_20M_2SS;
1805 else
1806 rate_id_idx = PHYDM_ARFR5_N_3SS;
1807 }
1808 }
1809 break;
1810
1811 case PHYDM_WIRELESS_MODE_N_5G:
1812 {
1813 if (phydm_RfType == PHYDM_RF_1T1R)
1814 rate_id_idx = PHYDM_GN_N1SS;
1815 else if (phydm_RfType == PHYDM_RF_2T2R)
1816 rate_id_idx = PHYDM_GN_N2SS;
1817 else
1818 rate_id_idx = PHYDM_ARFR5_N_3SS;
1819 }
1820
1821 break;
1822
1823 case PHYDM_WIRELESS_MODE_G:
1824 rate_id_idx = PHYDM_BG;
1825 break;
1826
1827 case PHYDM_WIRELESS_MODE_A:
1828 rate_id_idx = PHYDM_G;
1829 break;
1830
1831 case PHYDM_WIRELESS_MODE_B:
1832 rate_id_idx = PHYDM_B_20M;
1833 break;
1834
1835
1836 case PHYDM_WIRELESS_MODE_AC_5G:
1837 case PHYDM_WIRELESS_MODE_AC_ONLY:
1838 {
1839 if (phydm_RfType == PHYDM_RF_1T1R)
1840 rate_id_idx = PHYDM_ARFR1_AC_1SS;
1841 else if (phydm_RfType == PHYDM_RF_2T2R)
1842 rate_id_idx = PHYDM_ARFR0_AC_2SS;
1843 else
1844 rate_id_idx = PHYDM_ARFR4_AC_3SS;
1845 }
1846 break;
1847
1848 case PHYDM_WIRELESS_MODE_AC_24G:
1849 {
1850 /*Becareful to set "Lowest rate" while using PHYDM_ARFR4_AC_3SS in 2.4G/5G*/
1851 if (phydm_BW >= PHYDM_BW_80) {
1852 if (phydm_RfType == PHYDM_RF_1T1R)
1853 rate_id_idx = PHYDM_ARFR1_AC_1SS;
1854 else if (phydm_RfType == PHYDM_RF_2T2R)
1855 rate_id_idx = PHYDM_ARFR0_AC_2SS;
1856 else
1857 rate_id_idx = PHYDM_ARFR4_AC_3SS;
1858 } else {
1859
1860 if (phydm_RfType == PHYDM_RF_1T1R)
1861 rate_id_idx = PHYDM_ARFR2_AC_2G_1SS;
1862 else if (phydm_RfType == PHYDM_RF_2T2R)
1863 rate_id_idx = PHYDM_ARFR3_AC_2G_2SS;
1864 else
1865 rate_id_idx = PHYDM_ARFR4_AC_3SS;
1866 }
1867 }
1868 break;
1869
1870 default:
1871 rate_id_idx = 0;
1872 break;
1873 }
1874
1875 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RA Rate ID = (( 0x%d ))\n", rate_id_idx));
1876
1877 return rate_id_idx;
1878 }
1879
1880 VOID
phydm_UpdateHalRAMask(IN PVOID pDM_VOID,IN u4Byte wirelessMode,IN u1Byte RfType,IN u1Byte BW,IN u1Byte MimoPs_enable,IN u1Byte disable_cck_rate,IN u4Byte * ratr_bitmap_msb_in,IN u4Byte * ratr_bitmap_lsb_in,IN u1Byte tx_rate_level)1881 phydm_UpdateHalRAMask(
1882 IN PVOID pDM_VOID,
1883 IN u4Byte wirelessMode,
1884 IN u1Byte RfType,
1885 IN u1Byte BW,
1886 IN u1Byte MimoPs_enable,
1887 IN u1Byte disable_cck_rate,
1888 IN u4Byte *ratr_bitmap_msb_in,
1889 IN u4Byte *ratr_bitmap_lsb_in,
1890 IN u1Byte tx_rate_level
1891 )
1892 {
1893 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1894 u4Byte mask_rate_threshold;
1895 u1Byte phydm_RfType;
1896 u1Byte phydm_BW;
1897 u4Byte ratr_bitmap = *ratr_bitmap_lsb_in, ratr_bitmap_msb = *ratr_bitmap_msb_in;
1898 /*PODM_RATE_ADAPTIVE pRA = &(pDM_Odm->RateAdaptive);*/
1899
1900 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
1901 wirelessMode = phydm_trans_platform_wireless_mode(pDM_Odm, wirelessMode);
1902 #endif
1903
1904 phydm_RfType = phydm_trans_platform_rf_type(pDM_Odm, RfType);
1905 phydm_BW = phydm_trans_platform_bw(pDM_Odm, BW);
1906
1907 /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("phydm_RfType = (( %x )), RfType = (( %x ))\n", phydm_RfType, RfType));*/
1908 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Platfoem original RA Mask = (( 0x %x | %x ))\n", ratr_bitmap_msb, ratr_bitmap));
1909
1910 switch (wirelessMode) {
1911
1912 case PHYDM_WIRELESS_MODE_B:
1913 {
1914 ratr_bitmap &= 0x0000000f;
1915 }
1916 break;
1917
1918 case PHYDM_WIRELESS_MODE_G:
1919 {
1920 ratr_bitmap &= 0x00000ff5;
1921 }
1922 break;
1923
1924 case PHYDM_WIRELESS_MODE_A:
1925 {
1926 ratr_bitmap &= 0x00000ff0;
1927 }
1928 break;
1929
1930 case PHYDM_WIRELESS_MODE_N_24G:
1931 case PHYDM_WIRELESS_MODE_N_5G:
1932 {
1933 if (MimoPs_enable)
1934 phydm_RfType = PHYDM_RF_1T1R;
1935
1936 if (phydm_RfType == PHYDM_RF_1T1R) {
1937
1938 if (phydm_BW == PHYDM_BW_40)
1939 ratr_bitmap &= 0x000ff015;
1940 else
1941 ratr_bitmap &= 0x000ff005;
1942 } else if (phydm_RfType == PHYDM_RF_2T2R || phydm_RfType == PHYDM_RF_2T4R || phydm_RfType == PHYDM_RF_2T3R) {
1943
1944 if (phydm_BW == PHYDM_BW_40)
1945 ratr_bitmap &= 0x0ffff015;
1946 else
1947 ratr_bitmap &= 0x0ffff005;
1948 } else { /*3T*/
1949
1950 ratr_bitmap &= 0xfffff015;
1951 ratr_bitmap_msb &= 0xf;
1952 }
1953 }
1954 break;
1955
1956 case PHYDM_WIRELESS_MODE_AC_24G:
1957 {
1958 if (phydm_RfType == PHYDM_RF_1T1R)
1959 ratr_bitmap &= 0x003ff015;
1960 else if (phydm_RfType == PHYDM_RF_2T2R || phydm_RfType == PHYDM_RF_2T4R || phydm_RfType == PHYDM_RF_2T3R)
1961 ratr_bitmap &= 0xfffff015;
1962 else {/*3T*/
1963
1964 ratr_bitmap &= 0xfffff010;
1965 ratr_bitmap_msb &= 0x3ff;
1966 }
1967
1968 if (phydm_BW == PHYDM_BW_20) {/* AC 20MHz doesn't support MCS9 */
1969 ratr_bitmap &= 0x7fdfffff;
1970 ratr_bitmap_msb &= 0x1ff;
1971 }
1972 }
1973 break;
1974
1975 case PHYDM_WIRELESS_MODE_AC_5G:
1976 {
1977 if (phydm_RfType == PHYDM_RF_1T1R)
1978 ratr_bitmap &= 0x003ff010;
1979 else if (phydm_RfType == PHYDM_RF_2T2R || phydm_RfType == PHYDM_RF_2T4R || phydm_RfType == PHYDM_RF_2T3R)
1980 ratr_bitmap &= 0xfffff010;
1981 else {/*3T*/
1982
1983 ratr_bitmap &= 0xfffff010;
1984 ratr_bitmap_msb &= 0x3ff;
1985 }
1986
1987 if (phydm_BW == PHYDM_BW_20) {/* AC 20MHz doesn't support MCS9 */
1988 ratr_bitmap &= 0x7fdfffff;
1989 ratr_bitmap_msb &= 0x1ff;
1990 }
1991 }
1992 break;
1993
1994 default:
1995 break;
1996 }
1997
1998 if (wirelessMode != PHYDM_WIRELESS_MODE_B) {
1999
2000 if (tx_rate_level == 0)
2001 ratr_bitmap &= 0xffffffff;
2002 else if (tx_rate_level == 1)
2003 ratr_bitmap &= 0xfffffff0;
2004 else if (tx_rate_level == 2)
2005 ratr_bitmap &= 0xffffefe0;
2006 else if (tx_rate_level == 3)
2007 ratr_bitmap &= 0xffffcfc0;
2008 else if (tx_rate_level == 4)
2009 ratr_bitmap &= 0xffff8f80;
2010 else if (tx_rate_level >= 5)
2011 ratr_bitmap &= 0xffff0f00;
2012
2013 }
2014
2015 if (disable_cck_rate)
2016 ratr_bitmap &= 0xfffffff0;
2017
2018 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("wirelessMode= (( 0x%x )), RfType = (( 0x%x )), BW = (( 0x%x )), MimoPs_en = (( %d )), tx_rate_level= (( 0x%d ))\n",
2019 wirelessMode, phydm_RfType, phydm_BW, MimoPs_enable, tx_rate_level));
2020
2021 /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("111 Phydm modified RA Mask = (( 0x %x | %x ))\n", ratr_bitmap_msb, ratr_bitmap));*/
2022
2023 *ratr_bitmap_lsb_in = ratr_bitmap;
2024 *ratr_bitmap_msb_in = ratr_bitmap_msb;
2025 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Phydm modified RA Mask = (( 0x %x | %x ))\n", *ratr_bitmap_msb_in, *ratr_bitmap_lsb_in));
2026
2027 }
2028
2029 u1Byte
phydm_RA_level_decision(IN PVOID pDM_VOID,IN u4Byte rssi,IN u1Byte Ratr_State)2030 phydm_RA_level_decision(
2031 IN PVOID pDM_VOID,
2032 IN u4Byte rssi,
2033 IN u1Byte Ratr_State
2034 )
2035 {
2036 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2037 u1Byte ra_lowest_rate;
2038 u1Byte ra_rate_floor_table[RA_FLOOR_TABLE_SIZE] = {20, 34, 38, 42, 46, 50, 100}; /*MCS0 ~ MCS4 , VHT1SS MCS0 ~ MCS4 , G 6M~24M*/
2039 u1Byte new_Ratr_State = 0;
2040 u1Byte i;
2041
2042 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("curr RA level = ((%d)), Rate_floor_table ori [ %d , %d, %d , %d, %d, %d]\n", Ratr_State,
2043 ra_rate_floor_table[0], ra_rate_floor_table[1], ra_rate_floor_table[2], ra_rate_floor_table[3], ra_rate_floor_table[4], ra_rate_floor_table[5]));
2044
2045 for (i = 0; i < RA_FLOOR_TABLE_SIZE; i++) {
2046
2047 if (i >= (Ratr_State))
2048 ra_rate_floor_table[i] += RA_FLOOR_UP_GAP;
2049 }
2050
2051 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI = ((%d)), Rate_floor_table_mod [ %d , %d, %d , %d, %d, %d]\n",
2052 rssi, ra_rate_floor_table[0], ra_rate_floor_table[1], ra_rate_floor_table[2], ra_rate_floor_table[3], ra_rate_floor_table[4], ra_rate_floor_table[5]));
2053
2054 for (i = 0; i < RA_FLOOR_TABLE_SIZE; i++) {
2055
2056 if (rssi < ra_rate_floor_table[i]) {
2057 new_Ratr_State = i;
2058 break;
2059 }
2060 }
2061
2062
2063
2064 return new_Ratr_State;
2065
2066 }
2067
2068 VOID
odm_RefreshRateAdaptiveMaskMP(IN PVOID pDM_VOID)2069 odm_RefreshRateAdaptiveMaskMP(
2070 IN PVOID pDM_VOID
2071 )
2072 {
2073 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2074 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2075 PADAPTER pAdapter = pDM_Odm->Adapter;
2076 PADAPTER pTargetAdapter = NULL;
2077 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
2078 PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(pAdapter);
2079 u4Byte i;
2080 PSTA_INFO_T pEntry;
2081 u1Byte Ratr_State_new;
2082
2083 if (pAdapter->bDriverStopped) {
2084 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n"));
2085 return;
2086 }
2087
2088 if (!pHalData->bUseRAMask) {
2089 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n"));
2090 return;
2091 }
2092
2093 // if default port is connected, update RA table for default port (infrastructure mode only)
2094 if (pMgntInfo->mAssoc && (!ACTING_AS_AP(pAdapter))) {
2095 odm_RefreshLdpcRtsMP(pAdapter, pDM_Odm, pMgntInfo->mMacId, pMgntInfo->IOTPeer, pHalData->UndecoratedSmoothedPWDB);
2096 /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Infrasture Mode\n"));*/
2097
2098 #if RA_MASK_PHYDMLIZE_WIN
2099 Ratr_State_new = phydm_RA_level_decision(pDM_Odm, pHalData->UndecoratedSmoothedPWDB, pMgntInfo->Ratr_State);
2100
2101 if (pMgntInfo->Ratr_State != Ratr_State_new) {
2102
2103 ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr :"), pMgntInfo->Bssid);
2104 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Update RA Level: ((%x)) -> ((%x)), RSSI = ((%d))\n\n",
2105 pMgntInfo->Ratr_State, Ratr_State_new, pHalData->UndecoratedSmoothedPWDB));
2106
2107 pMgntInfo->Ratr_State = Ratr_State_new;
2108 pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pMgntInfo->mMacId, NULL, Ratr_State_new);
2109 } else {
2110 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Stay in RA level = (( %d ))\n\n", Ratr_State_new));
2111 /**/
2112 }
2113
2114 #else
2115 if (ODM_RAStateCheck(pDM_Odm, pHalData->UndecoratedSmoothedPWDB, pMgntInfo->bSetTXPowerTrainingByOid, &pMgntInfo->Ratr_State)) {
2116 ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr : "), pMgntInfo->Bssid);
2117 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pHalData->UndecoratedSmoothedPWDB, pMgntInfo->Ratr_State));
2118 pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pMgntInfo->mMacId, NULL, pMgntInfo->Ratr_State);
2119 } else if (pDM_Odm->bChangeState) {
2120 ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr : "), pMgntInfo->Bssid);
2121 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training State, bDisablePowerTraining = %d\n", pDM_Odm->bDisablePowerTraining));
2122 pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pMgntInfo->mMacId, NULL, pMgntInfo->Ratr_State);
2123 }
2124 #endif
2125 }
2126
2127 //
2128 // The following part configure AP/VWifi/IBSS rate adaptive mask.
2129 //
2130
2131 if (pMgntInfo->mIbss) // Target: AP/IBSS peer.
2132 pTargetAdapter = GetDefaultAdapter(pAdapter);
2133 else
2134 pTargetAdapter = GetFirstAPAdapter(pAdapter);
2135
2136 // if extension port (softap) is started, updaet RA table for more than one clients associate
2137 if (pTargetAdapter != NULL) {
2138 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
2139
2140 pEntry = AsocEntry_EnumStation(pTargetAdapter, i);
2141
2142 if (IS_STA_VALID(pEntry)) {
2143
2144 odm_RefreshLdpcRtsMP(pAdapter, pDM_Odm, pEntry->AssociatedMacId, pEntry->IOTPeer, pEntry->rssi_stat.UndecoratedSmoothedPWDB);
2145
2146 #if RA_MASK_PHYDMLIZE_WIN
2147 Ratr_State_new = phydm_RA_level_decision(pDM_Odm, pEntry->rssi_stat.UndecoratedSmoothedPWDB, pEntry->Ratr_State);
2148
2149 if (pEntry->Ratr_State != Ratr_State_new) {
2150
2151 ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr :"), pEntry->MacAddr);
2152 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Update Tx RA Level: ((%x)) -> ((%x)), RSSI = ((%d))\n",
2153 pEntry->Ratr_State, Ratr_State_new, pEntry->rssi_stat.UndecoratedSmoothedPWDB));
2154
2155 pEntry->Ratr_State = Ratr_State_new;
2156 pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pEntry->AssociatedMacId, NULL, Ratr_State_new);
2157 } else {
2158 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Stay in RA level = (( %d ))\n\n", Ratr_State_new));
2159 /**/
2160 }
2161
2162
2163 #else
2164
2165 if (ODM_RAStateCheck(pDM_Odm, pEntry->rssi_stat.UndecoratedSmoothedPWDB, pMgntInfo->bSetTXPowerTrainingByOid, &pEntry->Ratr_State)) {
2166 ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target STA addr : "), pEntry->MacAddr);
2167 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pEntry->rssi_stat.UndecoratedSmoothedPWDB, pEntry->Ratr_State));
2168 pAdapter->HalFunc.UpdateHalRAMaskHandler(pTargetAdapter, pEntry->AssociatedMacId, pEntry, pEntry->Ratr_State);
2169 } else if (pDM_Odm->bChangeState) {
2170 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training State, bDisablePowerTraining = %d\n", pDM_Odm->bDisablePowerTraining));
2171 pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pMgntInfo->mMacId, NULL, pMgntInfo->Ratr_State);
2172 }
2173 #endif
2174
2175 }
2176 }
2177 }
2178
2179 #if RA_MASK_PHYDMLIZE_WIN
2180
2181 #else
2182 if (pMgntInfo->bSetTXPowerTrainingByOid)
2183 pMgntInfo->bSetTXPowerTrainingByOid = FALSE;
2184 #endif
2185 #endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2186 }
2187
2188
2189 VOID
odm_RefreshRateAdaptiveMaskCE(IN PVOID pDM_VOID)2190 odm_RefreshRateAdaptiveMaskCE(
2191 IN PVOID pDM_VOID
2192 )
2193 {
2194 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
2195 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2196 PADAPTER pAdapter = pDM_Odm->Adapter;
2197 PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive;
2198 u4Byte i;
2199 PSTA_INFO_T pEntry;
2200 u1Byte Ratr_State_new;
2201
2202 if (RTW_CANNOT_RUN(pAdapter)) {
2203 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n"));
2204 return;
2205 }
2206
2207 if (!pDM_Odm->bUseRAMask) {
2208 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n"));
2209 return;
2210 }
2211
2212 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
2213
2214 pEntry = pDM_Odm->pODM_StaInfo[i];
2215
2216 if (IS_STA_VALID(pEntry)) {
2217
2218 if (IS_MCAST(pEntry->hwaddr))
2219 continue;
2220
2221 #if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1))
2222 if ((pDM_Odm->SupportICType == ODM_RTL8812) || (pDM_Odm->SupportICType == ODM_RTL8821)) {
2223 if (pEntry->rssi_stat.UndecoratedSmoothedPWDB < pRA->LdpcThres) {
2224 pRA->bUseLdpc = TRUE;
2225 pRA->bLowerRtsRate = TRUE;
2226 if ((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A))
2227 Set_RA_LDPC_8812(pEntry, TRUE);
2228 //DbgPrint("RSSI=%d, bUseLdpc = TRUE\n", pHalData->UndecoratedSmoothedPWDB);
2229 } else if (pEntry->rssi_stat.UndecoratedSmoothedPWDB > (pRA->LdpcThres - 5)) {
2230 pRA->bUseLdpc = FALSE;
2231 pRA->bLowerRtsRate = FALSE;
2232 if ((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A))
2233 Set_RA_LDPC_8812(pEntry, FALSE);
2234 //DbgPrint("RSSI=%d, bUseLdpc = FALSE\n", pHalData->UndecoratedSmoothedPWDB);
2235 }
2236 }
2237 #endif
2238
2239 #if RA_MASK_PHYDMLIZE_CE
2240 Ratr_State_new = phydm_RA_level_decision(pDM_Odm, pEntry->rssi_stat.UndecoratedSmoothedPWDB, pEntry->rssi_level);
2241
2242 if (pEntry->rssi_level != Ratr_State_new) {
2243
2244 /*ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr :"), pstat->hwaddr);*/
2245 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Update Tx RA Level: ((%x)) -> ((%x)), RSSI = ((%d))\n",
2246 pEntry->rssi_level, Ratr_State_new, pEntry->rssi_stat.UndecoratedSmoothedPWDB));
2247
2248 pEntry->rssi_level = Ratr_State_new;
2249 rtw_hal_update_ra_mask(pEntry, pEntry->rssi_level);
2250 } else {
2251 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Stay in RA level = (( %d ))\n\n", Ratr_State_new));
2252 /**/
2253 }
2254 #else
2255 if (TRUE == ODM_RAStateCheck(pDM_Odm, pEntry->rssi_stat.UndecoratedSmoothedPWDB, FALSE , &pEntry->rssi_level)) {
2256 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pEntry->rssi_stat.UndecoratedSmoothedPWDB, pEntry->rssi_level));
2257 //printk("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level);
2258 rtw_hal_update_ra_mask(pEntry, pEntry->rssi_level);
2259 } else if (pDM_Odm->bChangeState) {
2260 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training State, bDisablePowerTraining = %d\n", pDM_Odm->bDisablePowerTraining));
2261 rtw_hal_update_ra_mask(pEntry, pEntry->rssi_level);
2262 }
2263 #endif
2264
2265 }
2266 }
2267
2268 #endif
2269 }
2270
2271 VOID
odm_RefreshRateAdaptiveMaskAPADSL(IN PVOID pDM_VOID)2272 odm_RefreshRateAdaptiveMaskAPADSL(
2273 IN PVOID pDM_VOID
2274 )
2275 {
2276 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
2277 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2278 struct rtl8192cd_priv *priv = pDM_Odm->priv;
2279 struct aid_obj *aidarray;
2280 u4Byte i;
2281 PSTA_INFO_T pEntry;
2282 u1Byte Ratr_State_new;
2283
2284 if (priv->up_time % 2)
2285 return;
2286
2287 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
2288 pEntry = pDM_Odm->pODM_StaInfo[i];
2289
2290 if (IS_STA_VALID(pEntry)) {
2291
2292 #if defined(UNIVERSAL_REPEATER) || defined(MBSSID)
2293 aidarray = container_of(pEntry, struct aid_obj, station);
2294 priv = aidarray->priv;
2295 #endif
2296
2297 if (!priv->pmib->dot11StationConfigEntry.autoRate)
2298 continue;
2299
2300 #if RA_MASK_PHYDMLIZE_AP
2301 Ratr_State_new = phydm_RA_level_decision(pDM_Odm, (u4Byte)pEntry->rssi, pEntry->rssi_level);
2302
2303 if (pEntry->rssi_level != Ratr_State_new) {
2304
2305 ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr :"), pEntry->hwaddr);
2306 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Update Tx RA Level: ((%x)) -> ((%x)), RSSI = ((%d))\n", pEntry->rssi_level, Ratr_State_new, pEntry->rssi));
2307
2308 pEntry->rssi_level = Ratr_State_new;
2309 phydm_gen_ramask_h2c_AP(pDM_Odm, priv, pEntry, pEntry->rssi_level);
2310 } else {
2311 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Stay in RA level = (( %d ))\n\n", Ratr_State_new));
2312 /**/
2313 }
2314
2315 #else
2316 if (ODM_RAStateCheck(pDM_Odm, (s4Byte)pEntry->rssi, FALSE, &pEntry->rssi_level)) {
2317 ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target STA addr : "), pEntry->hwaddr);
2318 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pEntry->rssi, pEntry->rssi_level));
2319
2320 #ifdef CONFIG_WLAN_HAL
2321 if (IS_HAL_CHIP(priv)) {
2322 #ifdef WDS
2323 /*if(!(pstat->state & WIFI_WDS))*/ /*if WDS donot setting*/
2324 #endif
2325 GET_HAL_INTERFACE(priv)->UpdateHalRAMaskHandler(priv, pEntry, pEntry->rssi_level);
2326 } else
2327 #endif
2328
2329 #ifdef CONFIG_RTL_8812_SUPPORT
2330 if (GET_CHIP_VER(priv) == VERSION_8812E)
2331 UpdateHalRAMask8812(priv, pEntry, 3);
2332 else
2333 #endif
2334 {
2335 #ifdef CONFIG_RTL_88E_SUPPORT
2336 if (GET_CHIP_VER(priv) == VERSION_8188E) {
2337 #ifdef TXREPORT
2338 add_RATid(priv, pEntry);
2339 #endif
2340 }
2341 #endif
2342
2343
2344 }
2345 }
2346 #endif /*#ifdef RA_MASK_PHYDMLIZE*/
2347
2348 }
2349 }
2350 #endif /*#if (DM_ODM_SUPPORT_TYPE & ODM_AP)*/
2351 }
2352
2353 VOID
odm_RefreshBasicRateMask(IN PVOID pDM_VOID)2354 odm_RefreshBasicRateMask(
2355 IN PVOID pDM_VOID
2356 )
2357 {
2358 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2359 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2360 PADAPTER Adapter = pDM_Odm->Adapter;
2361 static u1Byte Stage = 0;
2362 u1Byte CurStage = 0;
2363 OCTET_STRING osRateSet;
2364 PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(Adapter);
2365 u1Byte RateSet[5] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M, MGN_6M};
2366
2367 if (pDM_Odm->SupportICType != ODM_RTL8812 && pDM_Odm->SupportICType != ODM_RTL8821)
2368 return;
2369
2370 if (pDM_Odm->bLinked == FALSE) // unlink Default port information
2371 CurStage = 0;
2372 else if (pDM_Odm->RSSI_Min < 40) // link RSSI < 40%
2373 CurStage = 1;
2374 else if (pDM_Odm->RSSI_Min > 45) // link RSSI > 45%
2375 CurStage = 3;
2376 else
2377 CurStage = 2; // link 25% <= RSSI <= 30%
2378
2379 if (CurStage != Stage) {
2380 if (CurStage == 1) {
2381 FillOctetString(osRateSet, RateSet, 5);
2382 FilterSupportRate(pMgntInfo->mBrates, &osRateSet, FALSE);
2383 Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_BASIC_RATE, (pu1Byte)&osRateSet);
2384 } else if (CurStage == 3 && (Stage == 1 || Stage == 2))
2385 Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_BASIC_RATE, (pu1Byte)(&pMgntInfo->mBrates));
2386 }
2387
2388 Stage = CurStage;
2389 #endif
2390 }
2391
2392 u1Byte
phydm_rate_order_compute(IN PVOID pDM_VOID,IN u1Byte rate_idx)2393 phydm_rate_order_compute(
2394 IN PVOID pDM_VOID,
2395 IN u1Byte rate_idx
2396 )
2397 {
2398 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2399 u1Byte rate_order = 0;
2400
2401 if (rate_idx >= ODM_RATEVHTSS4MCS0) {
2402
2403 rate_idx -= ODM_RATEVHTSS4MCS0;
2404 /**/
2405 } else if (rate_idx >= ODM_RATEVHTSS3MCS0) {
2406
2407 rate_idx -= ODM_RATEVHTSS3MCS0;
2408 /**/
2409 } else if (rate_idx >= ODM_RATEVHTSS2MCS0) {
2410
2411 rate_idx -= ODM_RATEVHTSS2MCS0;
2412 /**/
2413 } else if (rate_idx >= ODM_RATEVHTSS1MCS0) {
2414
2415 rate_idx -= ODM_RATEVHTSS1MCS0;
2416 /**/
2417 } else if (rate_idx >= ODM_RATEMCS24) {
2418
2419 rate_idx -= ODM_RATEMCS24;
2420 /**/
2421 } else if (rate_idx >= ODM_RATEMCS16) {
2422
2423 rate_idx -= ODM_RATEMCS16;
2424 /**/
2425 } else if (rate_idx >= ODM_RATEMCS8) {
2426
2427 rate_idx -= ODM_RATEMCS8;
2428 /**/
2429 }
2430 rate_order = rate_idx;
2431
2432 return rate_order;
2433
2434 }
2435
2436 VOID
phydm_ra_common_info_update(IN PVOID pDM_VOID)2437 phydm_ra_common_info_update(
2438 IN PVOID pDM_VOID
2439 )
2440 {
2441 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2442 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
2443 u2Byte macid;
2444 u1Byte rate_order_tmp;
2445 u1Byte cnt = 0;
2446
2447 pRA_Table->highest_client_tx_order = 0;
2448 pRA_Table->power_tracking_flag = 1;
2449
2450 if (pDM_Odm->number_linked_client != 0) {
2451 for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) {
2452
2453 rate_order_tmp = phydm_rate_order_compute(pDM_Odm, ((pRA_Table->link_tx_rate[macid]) & 0x7f));
2454
2455 if (rate_order_tmp >= (pRA_Table->highest_client_tx_order)) {
2456 pRA_Table->highest_client_tx_order = rate_order_tmp;
2457 pRA_Table->highest_client_tx_rate_order = macid;
2458 }
2459
2460 cnt++;
2461
2462 if (cnt == pDM_Odm->number_linked_client)
2463 break;
2464 }
2465 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("MACID[%d], Highest Tx order Update for power traking: %d\n", (pRA_Table->highest_client_tx_rate_order), (pRA_Table->highest_client_tx_order)));
2466 }
2467 }
2468
2469 VOID
phydm_ra_info_watchdog(IN PVOID pDM_VOID)2470 phydm_ra_info_watchdog(
2471 IN PVOID pDM_VOID
2472 )
2473 {
2474 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2475
2476 phydm_ra_common_info_update(pDM_Odm);
2477 phydm_ra_dynamic_retry_limit(pDM_Odm);
2478 phydm_ra_dynamic_retry_count(pDM_Odm);
2479 odm_RefreshRateAdaptiveMask(pDM_Odm);
2480 odm_RefreshBasicRateMask(pDM_Odm);
2481 }
2482
2483 VOID
phydm_ra_info_init(IN PVOID pDM_VOID)2484 phydm_ra_info_init(
2485 IN PVOID pDM_VOID
2486 )
2487 {
2488 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2489 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
2490
2491 pRA_Table->highest_client_tx_rate_order = 0;
2492 pRA_Table->highest_client_tx_order = 0;
2493 pRA_Table->RA_threshold_offset = 0;
2494 pRA_Table->RA_offset_direction = 0;
2495
2496 #if (defined(CONFIG_RA_DYNAMIC_RTY_LIMIT))
2497 phydm_ra_dynamic_retry_limit_init(pDM_Odm);
2498 #endif
2499
2500 #if (defined(CONFIG_RA_DYNAMIC_RATE_ID))
2501 phydm_ra_dynamic_rate_id_init(pDM_Odm);
2502 #endif
2503 #if (defined(CONFIG_RA_DBG_CMD))
2504 odm_RA_ParaAdjust_init(pDM_Odm);
2505 #endif
2506
2507 }
2508
2509
2510 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
2511 u1Byte
odm_Find_RTS_Rate(IN PVOID pDM_VOID,IN u1Byte Tx_Rate,IN BOOLEAN bErpProtect)2512 odm_Find_RTS_Rate(
2513 IN PVOID pDM_VOID,
2514 IN u1Byte Tx_Rate,
2515 IN BOOLEAN bErpProtect
2516 )
2517 {
2518 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2519 u1Byte RTS_Ini_Rate = ODM_RATE6M;
2520
2521 if (bErpProtect) /* use CCK rate as RTS*/
2522 RTS_Ini_Rate = ODM_RATE1M;
2523 else {
2524 switch (Tx_Rate) {
2525 case ODM_RATEVHTSS3MCS9:
2526 case ODM_RATEVHTSS3MCS8:
2527 case ODM_RATEVHTSS3MCS7:
2528 case ODM_RATEVHTSS3MCS6:
2529 case ODM_RATEVHTSS3MCS5:
2530 case ODM_RATEVHTSS3MCS4:
2531 case ODM_RATEVHTSS3MCS3:
2532 case ODM_RATEVHTSS2MCS9:
2533 case ODM_RATEVHTSS2MCS8:
2534 case ODM_RATEVHTSS2MCS7:
2535 case ODM_RATEVHTSS2MCS6:
2536 case ODM_RATEVHTSS2MCS5:
2537 case ODM_RATEVHTSS2MCS4:
2538 case ODM_RATEVHTSS2MCS3:
2539 case ODM_RATEVHTSS1MCS9:
2540 case ODM_RATEVHTSS1MCS8:
2541 case ODM_RATEVHTSS1MCS7:
2542 case ODM_RATEVHTSS1MCS6:
2543 case ODM_RATEVHTSS1MCS5:
2544 case ODM_RATEVHTSS1MCS4:
2545 case ODM_RATEVHTSS1MCS3:
2546 case ODM_RATEMCS15:
2547 case ODM_RATEMCS14:
2548 case ODM_RATEMCS13:
2549 case ODM_RATEMCS12:
2550 case ODM_RATEMCS11:
2551 case ODM_RATEMCS7:
2552 case ODM_RATEMCS6:
2553 case ODM_RATEMCS5:
2554 case ODM_RATEMCS4:
2555 case ODM_RATEMCS3:
2556 case ODM_RATE54M:
2557 case ODM_RATE48M:
2558 case ODM_RATE36M:
2559 case ODM_RATE24M:
2560 RTS_Ini_Rate = ODM_RATE24M;
2561 break;
2562 case ODM_RATEVHTSS3MCS2:
2563 case ODM_RATEVHTSS3MCS1:
2564 case ODM_RATEVHTSS2MCS2:
2565 case ODM_RATEVHTSS2MCS1:
2566 case ODM_RATEVHTSS1MCS2:
2567 case ODM_RATEVHTSS1MCS1:
2568 case ODM_RATEMCS10:
2569 case ODM_RATEMCS9:
2570 case ODM_RATEMCS2:
2571 case ODM_RATEMCS1:
2572 case ODM_RATE18M:
2573 case ODM_RATE12M:
2574 RTS_Ini_Rate = ODM_RATE12M;
2575 break;
2576 case ODM_RATEVHTSS3MCS0:
2577 case ODM_RATEVHTSS2MCS0:
2578 case ODM_RATEVHTSS1MCS0:
2579 case ODM_RATEMCS8:
2580 case ODM_RATEMCS0:
2581 case ODM_RATE9M:
2582 case ODM_RATE6M:
2583 RTS_Ini_Rate = ODM_RATE6M;
2584 break;
2585 case ODM_RATE11M:
2586 case ODM_RATE5_5M:
2587 case ODM_RATE2M:
2588 case ODM_RATE1M:
2589 RTS_Ini_Rate = ODM_RATE1M;
2590 break;
2591 default:
2592 RTS_Ini_Rate = ODM_RATE6M;
2593 break;
2594 }
2595 }
2596
2597 if (*pDM_Odm->pBandType == 1) {
2598 if (RTS_Ini_Rate < ODM_RATE6M)
2599 RTS_Ini_Rate = ODM_RATE6M;
2600 }
2601 return RTS_Ini_Rate;
2602
2603 }
2604
2605 VOID
odm_Set_RA_DM_ARFB_by_Noisy(IN PDM_ODM_T pDM_Odm)2606 odm_Set_RA_DM_ARFB_by_Noisy(
2607 IN PDM_ODM_T pDM_Odm
2608 )
2609 {
2610 #if 0
2611
2612 /*DbgPrint("DM_ARFB ====>\n");*/
2613 if (pDM_Odm->bNoisyState) {
2614 ODM_Write4Byte(pDM_Odm, 0x430, 0x00000000);
2615 ODM_Write4Byte(pDM_Odm, 0x434, 0x05040200);
2616 /*DbgPrint("DM_ARFB ====> Noisy State\n");*/
2617 } else {
2618 ODM_Write4Byte(pDM_Odm, 0x430, 0x02010000);
2619 ODM_Write4Byte(pDM_Odm, 0x434, 0x07050403);
2620 /*DbgPrint("DM_ARFB ====> Clean State\n");*/
2621 }
2622 #endif
2623 }
2624
2625 VOID
ODM_UpdateNoisyState(IN PVOID pDM_VOID,IN BOOLEAN bNoisyStateFromC2H)2626 ODM_UpdateNoisyState(
2627 IN PVOID pDM_VOID,
2628 IN BOOLEAN bNoisyStateFromC2H
2629 )
2630 {
2631 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2632
2633 /*DbgPrint("Get C2H Command! NoisyState=0x%x\n ", bNoisyStateFromC2H);*/
2634 if (pDM_Odm->SupportICType == ODM_RTL8821 || pDM_Odm->SupportICType == ODM_RTL8812 ||
2635 pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8723D)
2636 pDM_Odm->bNoisyState = bNoisyStateFromC2H;
2637 odm_Set_RA_DM_ARFB_by_Noisy(pDM_Odm);
2638 };
2639
2640 VOID
phydm_update_pwr_track(IN PVOID pDM_VOID,IN u1Byte Rate)2641 phydm_update_pwr_track(
2642 IN PVOID pDM_VOID,
2643 IN u1Byte Rate
2644 )
2645 {
2646 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2647 u1Byte pathIdx = 0;
2648
2649 ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Pwr Track Get Rate=0x%x\n", Rate));
2650
2651 pDM_Odm->TxRate = Rate;
2652
2653 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2654 #if DEV_BUS_TYPE == RT_PCI_INTERFACE
2655 #if USE_WORKITEM
2656 PlatformScheduleWorkItem(&pDM_Odm->RaRptWorkitem);
2657 #else
2658 if (pDM_Odm->SupportICType == ODM_RTL8821) {
2659 #if (RTL8821A_SUPPORT == 1)
2660 ODM_TxPwrTrackSetPwr8821A(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
2661 #endif
2662 } else if (pDM_Odm->SupportICType == ODM_RTL8812) {
2663 for (pathIdx = ODM_RF_PATH_A; pathIdx < MAX_PATH_NUM_8812A; pathIdx++) {
2664 #if (RTL8812A_SUPPORT == 1)
2665 ODM_TxPwrTrackSetPwr8812A(pDM_Odm, MIX_MODE, pathIdx, 0);
2666 #endif
2667 }
2668 } else if (pDM_Odm->SupportICType == ODM_RTL8723B) {
2669 #if (RTL8723B_SUPPORT == 1)
2670 ODM_TxPwrTrackSetPwr_8723B(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
2671 #endif
2672 } else if (pDM_Odm->SupportICType == ODM_RTL8192E) {
2673 for (pathIdx = ODM_RF_PATH_A; pathIdx < MAX_PATH_NUM_8192E; pathIdx++) {
2674 #if (RTL8192E_SUPPORT == 1)
2675 ODM_TxPwrTrackSetPwr92E(pDM_Odm, MIX_MODE, pathIdx, 0);
2676 #endif
2677 }
2678 } else if (pDM_Odm->SupportICType == ODM_RTL8188E) {
2679 #if (RTL8188E_SUPPORT == 1)
2680 ODM_TxPwrTrackSetPwr88E(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
2681 #endif
2682 }
2683 #endif
2684 #else
2685 PlatformScheduleWorkItem(&pDM_Odm->RaRptWorkitem);
2686 #endif
2687 #endif
2688
2689 }
2690
2691 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2692
2693 s4Byte
phydm_FindMinimumRSSI(IN PDM_ODM_T pDM_Odm,IN PADAPTER pAdapter,IN OUT BOOLEAN * pbLink_temp)2694 phydm_FindMinimumRSSI(
2695 IN PDM_ODM_T pDM_Odm,
2696 IN PADAPTER pAdapter,
2697 IN OUT BOOLEAN *pbLink_temp
2698
2699 )
2700 {
2701 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
2702 PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo);
2703 BOOLEAN act_as_ap = ACTING_AS_AP(pAdapter);
2704
2705 /* 1.Determine the minimum RSSI */
2706 if ((!pMgntInfo->bMediaConnect) ||
2707 (act_as_ap && (pHalData->EntryMinUndecoratedSmoothedPWDB == 0))) {/* We should check AP mode and Entry info.into consideration, revised by Roger, 2013.10.18*/
2708
2709 pHalData->MinUndecoratedPWDBForDM = 0;
2710 *pbLink_temp = FALSE;
2711
2712 } else
2713 *pbLink_temp = TRUE;
2714
2715
2716 if (pMgntInfo->bMediaConnect) { /* Default port*/
2717
2718 if (act_as_ap || pMgntInfo->mIbss) {
2719 pHalData->MinUndecoratedPWDBForDM = pHalData->EntryMinUndecoratedSmoothedPWDB;
2720 /**/
2721 } else {
2722 pHalData->MinUndecoratedPWDBForDM = pHalData->UndecoratedSmoothedPWDB;
2723 /**/
2724 }
2725 } else { /* associated entry pwdb*/
2726 pHalData->MinUndecoratedPWDBForDM = pHalData->EntryMinUndecoratedSmoothedPWDB;
2727 /**/
2728 }
2729
2730 return pHalData->MinUndecoratedPWDBForDM;
2731 }
2732
2733 VOID
ODM_UpdateInitRateWorkItemCallback(IN PVOID pContext)2734 ODM_UpdateInitRateWorkItemCallback(
2735 IN PVOID pContext
2736 )
2737 {
2738 PADAPTER Adapter = (PADAPTER)pContext;
2739 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
2740 PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
2741 u1Byte p = 0;
2742
2743 if (pDM_Odm->SupportICType == ODM_RTL8821) {
2744 ODM_TxPwrTrackSetPwr8821A(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
2745 /**/
2746 } else if (pDM_Odm->SupportICType == ODM_RTL8812) {
2747 for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8812A; p++) { /*DOn't know how to include &c*/
2748
2749 ODM_TxPwrTrackSetPwr8812A(pDM_Odm, MIX_MODE, p, 0);
2750 /**/
2751 }
2752 } else if (pDM_Odm->SupportICType == ODM_RTL8723B) {
2753 ODM_TxPwrTrackSetPwr_8723B(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
2754 /**/
2755 } else if (pDM_Odm->SupportICType == ODM_RTL8192E) {
2756 for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8192E; p++) { /*DOn't know how to include &c*/
2757 ODM_TxPwrTrackSetPwr92E(pDM_Odm, MIX_MODE, p, 0);
2758 /**/
2759 }
2760 } else if (pDM_Odm->SupportICType == ODM_RTL8188E) {
2761 ODM_TxPwrTrackSetPwr88E(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
2762 /**/
2763 }
2764 }
2765
2766 VOID
odm_RSSIDumpToRegister(IN PVOID pDM_VOID)2767 odm_RSSIDumpToRegister(
2768 IN PVOID pDM_VOID
2769 )
2770 {
2771 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2772 PADAPTER Adapter = pDM_Odm->Adapter;
2773
2774 if (pDM_Odm->SupportICType == ODM_RTL8812) {
2775 PlatformEFIOWrite1Byte(Adapter, rA_RSSIDump_Jaguar, Adapter->RxStats.RxRSSIPercentage[0]);
2776 PlatformEFIOWrite1Byte(Adapter, rB_RSSIDump_Jaguar, Adapter->RxStats.RxRSSIPercentage[1]);
2777
2778 /* Rx EVM*/
2779 PlatformEFIOWrite1Byte(Adapter, rS1_RXevmDump_Jaguar, Adapter->RxStats.RxEVMdbm[0]);
2780 PlatformEFIOWrite1Byte(Adapter, rS2_RXevmDump_Jaguar, Adapter->RxStats.RxEVMdbm[1]);
2781
2782 /* Rx SNR*/
2783 PlatformEFIOWrite1Byte(Adapter, rA_RXsnrDump_Jaguar, (u1Byte)(Adapter->RxStats.RxSNRdB[0]));
2784 PlatformEFIOWrite1Byte(Adapter, rB_RXsnrDump_Jaguar, (u1Byte)(Adapter->RxStats.RxSNRdB[1]));
2785
2786 /* Rx Cfo_Short*/
2787 PlatformEFIOWrite2Byte(Adapter, rA_CfoShortDump_Jaguar, Adapter->RxStats.RxCfoShort[0]);
2788 PlatformEFIOWrite2Byte(Adapter, rB_CfoShortDump_Jaguar, Adapter->RxStats.RxCfoShort[1]);
2789
2790 /* Rx Cfo_Tail*/
2791 PlatformEFIOWrite2Byte(Adapter, rA_CfoLongDump_Jaguar, Adapter->RxStats.RxCfoTail[0]);
2792 PlatformEFIOWrite2Byte(Adapter, rB_CfoLongDump_Jaguar, Adapter->RxStats.RxCfoTail[1]);
2793 } else if (pDM_Odm->SupportICType == ODM_RTL8192E) {
2794 PlatformEFIOWrite1Byte(Adapter, rA_RSSIDump_92E, Adapter->RxStats.RxRSSIPercentage[0]);
2795 PlatformEFIOWrite1Byte(Adapter, rB_RSSIDump_92E, Adapter->RxStats.RxRSSIPercentage[1]);
2796 /* Rx EVM*/
2797 PlatformEFIOWrite1Byte(Adapter, rS1_RXevmDump_92E, Adapter->RxStats.RxEVMdbm[0]);
2798 PlatformEFIOWrite1Byte(Adapter, rS2_RXevmDump_92E, Adapter->RxStats.RxEVMdbm[1]);
2799 /* Rx SNR*/
2800 PlatformEFIOWrite1Byte(Adapter, rA_RXsnrDump_92E, (u1Byte)(Adapter->RxStats.RxSNRdB[0]));
2801 PlatformEFIOWrite1Byte(Adapter, rB_RXsnrDump_92E, (u1Byte)(Adapter->RxStats.RxSNRdB[1]));
2802 /* Rx Cfo_Short*/
2803 PlatformEFIOWrite2Byte(Adapter, rA_CfoShortDump_92E, Adapter->RxStats.RxCfoShort[0]);
2804 PlatformEFIOWrite2Byte(Adapter, rB_CfoShortDump_92E, Adapter->RxStats.RxCfoShort[1]);
2805 /* Rx Cfo_Tail*/
2806 PlatformEFIOWrite2Byte(Adapter, rA_CfoLongDump_92E, Adapter->RxStats.RxCfoTail[0]);
2807 PlatformEFIOWrite2Byte(Adapter, rB_CfoLongDump_92E, Adapter->RxStats.RxCfoTail[1]);
2808 }
2809 }
2810
2811 VOID
odm_RefreshLdpcRtsMP(IN PADAPTER pAdapter,IN PDM_ODM_T pDM_Odm,IN u1Byte mMacId,IN u1Byte IOTPeer,IN s4Byte UndecoratedSmoothedPWDB)2812 odm_RefreshLdpcRtsMP(
2813 IN PADAPTER pAdapter,
2814 IN PDM_ODM_T pDM_Odm,
2815 IN u1Byte mMacId,
2816 IN u1Byte IOTPeer,
2817 IN s4Byte UndecoratedSmoothedPWDB
2818 )
2819 {
2820 BOOLEAN bCtlLdpc = FALSE;
2821 PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive;
2822
2823 if (pDM_Odm->SupportICType != ODM_RTL8821 && pDM_Odm->SupportICType != ODM_RTL8812)
2824 return;
2825
2826 if ((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A))
2827 bCtlLdpc = TRUE;
2828 else if (pDM_Odm->SupportICType == ODM_RTL8812 &&
2829 IOTPeer == HT_IOT_PEER_REALTEK_JAGUAR_CCUTAP)
2830 bCtlLdpc = TRUE;
2831
2832 if (bCtlLdpc) {
2833 if (UndecoratedSmoothedPWDB < (pRA->LdpcThres - 5))
2834 MgntSet_TX_LDPC(pAdapter, mMacId, TRUE);
2835 else if (UndecoratedSmoothedPWDB > pRA->LdpcThres)
2836 MgntSet_TX_LDPC(pAdapter, mMacId, FALSE);
2837 }
2838
2839 if (UndecoratedSmoothedPWDB < (pRA->RtsThres - 5))
2840 pRA->bLowerRtsRate = TRUE;
2841 else if (UndecoratedSmoothedPWDB > pRA->RtsThres)
2842 pRA->bLowerRtsRate = FALSE;
2843 }
2844
2845 #if 0
2846 VOID
2847 ODM_DynamicARFBSelect(
2848 IN PVOID pDM_VOID,
2849 IN u1Byte rate,
2850 IN BOOLEAN Collision_State
2851 )
2852 {
2853 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2854 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
2855
2856 if (pDM_Odm->SupportICType != ODM_RTL8192E)
2857 return;
2858
2859 if (Collision_State == pRA_Table->PT_collision_pre)
2860 return;
2861
2862 if (rate >= DESC_RATEMCS8 && rate <= DESC_RATEMCS12) {
2863 if (Collision_State == 1) {
2864 if (rate == DESC_RATEMCS12) {
2865
2866 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0);
2867 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060501);
2868 } else if (rate == DESC_RATEMCS11) {
2869
2870 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0);
2871 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07070605);
2872 } else if (rate == DESC_RATEMCS10) {
2873
2874 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0);
2875 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08080706);
2876 } else if (rate == DESC_RATEMCS9) {
2877
2878 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0);
2879 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08080707);
2880 } else {
2881
2882 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0);
2883 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09090808);
2884 }
2885 } else { /* Collision_State == 0*/
2886 if (rate == DESC_RATEMCS12) {
2887
2888 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x05010000);
2889 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080706);
2890 } else if (rate == DESC_RATEMCS11) {
2891
2892 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x06050000);
2893 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080807);
2894 } else if (rate == DESC_RATEMCS10) {
2895
2896 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x07060000);
2897 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0a090908);
2898 } else if (rate == DESC_RATEMCS9) {
2899
2900 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x07070000);
2901 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0a090808);
2902 } else {
2903
2904 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x08080000);
2905 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0b0a0909);
2906 }
2907 }
2908 } else { /* MCS13~MCS15, 1SS, G-mode*/
2909 if (Collision_State == 1) {
2910 if (rate == DESC_RATEMCS15) {
2911
2912 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000);
2913 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x05040302);
2914 } else if (rate == DESC_RATEMCS14) {
2915
2916 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000);
2917 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x06050302);
2918 } else if (rate == DESC_RATEMCS13) {
2919
2920 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000);
2921 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060502);
2922 } else {
2923
2924 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000);
2925 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x06050402);
2926 }
2927 } else { // Collision_State == 0
2928 if (rate == DESC_RATEMCS15) {
2929
2930 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x03020000);
2931 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060504);
2932 } else if (rate == DESC_RATEMCS14) {
2933
2934 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x03020000);
2935 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08070605);
2936 } else if (rate == DESC_RATEMCS13) {
2937
2938 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x05020000);
2939 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080706);
2940 } else {
2941
2942 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x04020000);
2943 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08070605);
2944 }
2945 }
2946 }
2947 pRA_Table->PT_collision_pre = Collision_State;
2948 }
2949 #endif
2950
2951 VOID
ODM_RateAdaptiveStateApInit(IN PVOID PADAPTER_VOID,IN PRT_WLAN_STA pEntry)2952 ODM_RateAdaptiveStateApInit(
2953 IN PVOID PADAPTER_VOID,
2954 IN PRT_WLAN_STA pEntry
2955 )
2956 {
2957 PADAPTER Adapter = (PADAPTER)PADAPTER_VOID;
2958 pEntry->Ratr_State = DM_RATR_STA_INIT;
2959 }
2960 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/
2961
2962 static void
FindMinimumRSSI(IN PADAPTER pAdapter)2963 FindMinimumRSSI(
2964 IN PADAPTER pAdapter
2965 )
2966 {
2967 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
2968 PDM_ODM_T pDM_Odm = &(pHalData->odmpriv);
2969
2970 /*Determine the minimum RSSI*/
2971
2972 if ((pDM_Odm->bLinked != _TRUE) &&
2973 (pHalData->EntryMinUndecoratedSmoothedPWDB == 0)) {
2974 pHalData->MinUndecoratedPWDBForDM = 0;
2975 /*ODM_RT_TRACE(pDM_Odm,COMP_BB_POWERSAVING, DBG_LOUD, ("Not connected to any\n"));*/
2976 } else
2977 pHalData->MinUndecoratedPWDBForDM = pHalData->EntryMinUndecoratedSmoothedPWDB;
2978
2979 /*DBG_8192C("%s=>MinUndecoratedPWDBForDM(%d)\n",__FUNCTION__,pdmpriv->MinUndecoratedPWDBForDM);*/
2980 /*ODM_RT_TRACE(pDM_Odm,COMP_DIG, DBG_LOUD, ("MinUndecoratedPWDBForDM =%d\n",pHalData->MinUndecoratedPWDBForDM));*/
2981 }
2982
2983 u8Byte
PhyDM_Get_Rate_Bitmap_Ex(IN PVOID pDM_VOID,IN u4Byte macid,IN u8Byte ra_mask,IN u1Byte rssi_level,OUT u8Byte * dm_RA_Mask,OUT u1Byte * dm_RteID)2984 PhyDM_Get_Rate_Bitmap_Ex(
2985 IN PVOID pDM_VOID,
2986 IN u4Byte macid,
2987 IN u8Byte ra_mask,
2988 IN u1Byte rssi_level,
2989 OUT u8Byte *dm_RA_Mask,
2990 OUT u1Byte *dm_RteID
2991 )
2992 {
2993 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2994 PSTA_INFO_T pEntry;
2995 u8Byte rate_bitmap = 0;
2996 u1Byte WirelessMode;
2997
2998 pEntry = pDM_Odm->pODM_StaInfo[macid];
2999 if (!IS_STA_VALID(pEntry))
3000 return ra_mask;
3001 WirelessMode = pEntry->wireless_mode;
3002 switch (WirelessMode) {
3003 case ODM_WM_B:
3004 if (ra_mask & 0x000000000000000c) /* 11M or 5.5M enable */
3005 rate_bitmap = 0x000000000000000d;
3006 else
3007 rate_bitmap = 0x000000000000000f;
3008 break;
3009
3010 case (ODM_WM_G):
3011 case (ODM_WM_A):
3012 if (rssi_level == DM_RATR_STA_HIGH)
3013 rate_bitmap = 0x0000000000000f00;
3014 else
3015 rate_bitmap = 0x0000000000000ff0;
3016 break;
3017
3018 case (ODM_WM_B|ODM_WM_G):
3019 if (rssi_level == DM_RATR_STA_HIGH)
3020 rate_bitmap = 0x0000000000000f00;
3021 else if (rssi_level == DM_RATR_STA_MIDDLE)
3022 rate_bitmap = 0x0000000000000ff0;
3023 else
3024 rate_bitmap = 0x0000000000000ff5;
3025 break;
3026
3027 case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G):
3028 case (ODM_WM_B|ODM_WM_N24G):
3029 case (ODM_WM_G|ODM_WM_N24G):
3030 case (ODM_WM_A|ODM_WM_N5G): {
3031 if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R) {
3032 if (rssi_level == DM_RATR_STA_HIGH)
3033 rate_bitmap = 0x00000000000f0000;
3034 else if (rssi_level == DM_RATR_STA_MIDDLE)
3035 rate_bitmap = 0x00000000000ff000;
3036 else {
3037 if (*(pDM_Odm->pBandWidth) == ODM_BW40M)
3038 rate_bitmap = 0x00000000000ff015;
3039 else
3040 rate_bitmap = 0x00000000000ff005;
3041 }
3042 } else if (pDM_Odm->RFType == ODM_2T2R || pDM_Odm->RFType == ODM_2T3R || pDM_Odm->RFType == ODM_2T4R) {
3043 if (rssi_level == DM_RATR_STA_HIGH)
3044 rate_bitmap = 0x000000000f8f0000;
3045 else if (rssi_level == DM_RATR_STA_MIDDLE)
3046 rate_bitmap = 0x000000000f8ff000;
3047 else {
3048 if (*(pDM_Odm->pBandWidth) == ODM_BW40M)
3049 rate_bitmap = 0x000000000f8ff015;
3050 else
3051 rate_bitmap = 0x000000000f8ff005;
3052 }
3053 } else {
3054 if (rssi_level == DM_RATR_STA_HIGH)
3055 rate_bitmap = 0x0000000f0f0f0000;
3056 else if (rssi_level == DM_RATR_STA_MIDDLE)
3057 rate_bitmap = 0x0000000fcfcfe000;
3058 else {
3059 if (*(pDM_Odm->pBandWidth) == ODM_BW40M)
3060 rate_bitmap = 0x0000000ffffff015;
3061 else
3062 rate_bitmap = 0x0000000ffffff005;
3063 }
3064 }
3065 }
3066 break;
3067
3068 case (ODM_WM_AC|ODM_WM_G):
3069 if (rssi_level == 1)
3070 rate_bitmap = 0x00000000fc3f0000;
3071 else if (rssi_level == 2)
3072 rate_bitmap = 0x00000000fffff000;
3073 else
3074 rate_bitmap = 0x00000000ffffffff;
3075 break;
3076
3077 case (ODM_WM_AC|ODM_WM_A):
3078
3079 if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R) {
3080 if (rssi_level == 1) /* add by Gary for ac-series */
3081 rate_bitmap = 0x00000000003f8000;
3082 else if (rssi_level == 2)
3083 rate_bitmap = 0x00000000003fe000;
3084 else
3085 rate_bitmap = 0x00000000003ff010;
3086 } else if (pDM_Odm->RFType == ODM_2T2R || pDM_Odm->RFType == ODM_2T3R || pDM_Odm->RFType == ODM_2T4R) {
3087 if (rssi_level == 1) /* add by Gary for ac-series */
3088 rate_bitmap = 0x00000000fe3f8000; /* VHT 2SS MCS3~9 */
3089 else if (rssi_level == 2)
3090 rate_bitmap = 0x00000000fffff000; /* VHT 2SS MCS0~9 */
3091 else
3092 rate_bitmap = 0x00000000fffff010; /* All */
3093 } else {
3094 if (rssi_level == 1) /* add by Gary for ac-series */
3095 rate_bitmap = 0x000003f8fe3f8000ULL; /* VHT 3SS MCS3~9 */
3096 else if (rssi_level == 2)
3097 rate_bitmap = 0x000003fffffff000ULL; /* VHT3SS MCS0~9 */
3098 else
3099 rate_bitmap = 0x000003fffffff010ULL; /* All */
3100 }
3101 break;
3102
3103 default:
3104 if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R)
3105 rate_bitmap = 0x00000000000fffff;
3106 else if (pDM_Odm->RFType == ODM_2T2R || pDM_Odm->RFType == ODM_2T3R || pDM_Odm->RFType == ODM_2T4R)
3107 rate_bitmap = 0x000000000fffffff;
3108 else
3109 rate_bitmap = 0x0000003fffffffffULL;
3110 break;
3111
3112 }
3113 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%016llx\n", rssi_level, WirelessMode, rate_bitmap));
3114
3115 return (ra_mask & rate_bitmap);
3116 }
3117
3118
3119 u4Byte
ODM_Get_Rate_Bitmap(IN PVOID pDM_VOID,IN u4Byte macid,IN u4Byte ra_mask,IN u1Byte rssi_level)3120 ODM_Get_Rate_Bitmap(
3121 IN PVOID pDM_VOID,
3122 IN u4Byte macid,
3123 IN u4Byte ra_mask,
3124 IN u1Byte rssi_level
3125 )
3126 {
3127 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
3128 PSTA_INFO_T pEntry;
3129 u4Byte rate_bitmap = 0;
3130 u1Byte WirelessMode;
3131 //u1Byte WirelessMode =*(pDM_Odm->pWirelessMode);
3132
3133
3134 pEntry = pDM_Odm->pODM_StaInfo[macid];
3135 if (!IS_STA_VALID(pEntry))
3136 return ra_mask;
3137
3138 WirelessMode = pEntry->wireless_mode;
3139
3140 switch (WirelessMode) {
3141 case ODM_WM_B:
3142 if (ra_mask & 0x0000000c) //11M or 5.5M enable
3143 rate_bitmap = 0x0000000d;
3144 else
3145 rate_bitmap = 0x0000000f;
3146 break;
3147
3148 case (ODM_WM_G):
3149 case (ODM_WM_A):
3150 if (rssi_level == DM_RATR_STA_HIGH)
3151 rate_bitmap = 0x00000f00;
3152 else
3153 rate_bitmap = 0x00000ff0;
3154 break;
3155
3156 case (ODM_WM_B|ODM_WM_G):
3157 if (rssi_level == DM_RATR_STA_HIGH)
3158 rate_bitmap = 0x00000f00;
3159 else if (rssi_level == DM_RATR_STA_MIDDLE)
3160 rate_bitmap = 0x00000ff0;
3161 else
3162 rate_bitmap = 0x00000ff5;
3163 break;
3164
3165 case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G) :
3166 case (ODM_WM_B|ODM_WM_N24G) :
3167 case (ODM_WM_G|ODM_WM_N24G) :
3168 case (ODM_WM_A|ODM_WM_N5G) : {
3169 if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R) {
3170 if (rssi_level == DM_RATR_STA_HIGH)
3171 rate_bitmap = 0x000f0000;
3172 else if (rssi_level == DM_RATR_STA_MIDDLE)
3173 rate_bitmap = 0x000ff000;
3174 else {
3175 if (*(pDM_Odm->pBandWidth) == ODM_BW40M)
3176 rate_bitmap = 0x000ff015;
3177 else
3178 rate_bitmap = 0x000ff005;
3179 }
3180 } else {
3181 if (rssi_level == DM_RATR_STA_HIGH)
3182 rate_bitmap = 0x0f8f0000;
3183 else if (rssi_level == DM_RATR_STA_MIDDLE)
3184 rate_bitmap = 0x0f8ff000;
3185 else {
3186 if (*(pDM_Odm->pBandWidth) == ODM_BW40M)
3187 rate_bitmap = 0x0f8ff015;
3188 else
3189 rate_bitmap = 0x0f8ff005;
3190 }
3191 }
3192 }
3193 break;
3194
3195 case (ODM_WM_AC|ODM_WM_G):
3196 if (rssi_level == 1)
3197 rate_bitmap = 0xfc3f0000;
3198 else if (rssi_level == 2)
3199 rate_bitmap = 0xfffff000;
3200 else
3201 rate_bitmap = 0xffffffff;
3202 break;
3203
3204 case (ODM_WM_AC|ODM_WM_A):
3205
3206 if (pDM_Odm->RFType == RF_1T1R) {
3207 if (rssi_level == 1) // add by Gary for ac-series
3208 rate_bitmap = 0x003f8000;
3209 else if (rssi_level == 2)
3210 rate_bitmap = 0x003ff000;
3211 else
3212 rate_bitmap = 0x003ff010;
3213 } else {
3214 if (rssi_level == 1) // add by Gary for ac-series
3215 rate_bitmap = 0xfe3f8000; // VHT 2SS MCS3~9
3216 else if (rssi_level == 2)
3217 rate_bitmap = 0xfffff000; // VHT 2SS MCS0~9
3218 else
3219 rate_bitmap = 0xfffff010; // All
3220 }
3221 break;
3222
3223 default:
3224 if (pDM_Odm->RFType == RF_1T2R)
3225 rate_bitmap = 0x000fffff;
3226 else
3227 rate_bitmap = 0x0fffffff;
3228 break;
3229
3230 }
3231
3232 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("%s ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x\n", __func__, rssi_level, WirelessMode, rate_bitmap));
3233 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x\n", rssi_level, WirelessMode, rate_bitmap));
3234
3235 return (ra_mask & rate_bitmap);
3236
3237 }
3238
3239 #endif //#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
3240
3241 #elif (DM_ODM_SUPPORT_TYPE & (ODM_AP))
3242
3243 VOID
phydm_gen_ramask_h2c_AP(IN PVOID pDM_VOID,IN struct rtl8192cd_priv * priv,IN PSTA_INFO_T * pEntry,IN u1Byte rssi_level)3244 phydm_gen_ramask_h2c_AP(
3245 IN PVOID pDM_VOID,
3246 IN struct rtl8192cd_priv *priv,
3247 IN PSTA_INFO_T *pEntry,
3248 IN u1Byte rssi_level
3249 )
3250 {
3251 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
3252
3253 if (pDM_Odm->SupportICType & (ODM_RTL8192E | ODM_RTL8881A)) {
3254
3255 #ifdef CONFIG_WLAN_HAL
3256 GET_HAL_INTERFACE(priv)->UpdateHalRAMaskHandler(priv, pEntry, rssi_level);
3257 #endif
3258
3259 } else if (pDM_Odm->SupportICType == ODM_RTL8812) {
3260
3261 #if (RTL8812A_SUPPORT == 1)
3262 UpdateHalRAMask8812(priv, pEntry, rssi_level);
3263 /**/
3264 #endif
3265 } else if (pDM_Odm->SupportICType == ODM_RTL8188E) {
3266
3267 #if (RTL8188E_SUPPORT == 1)
3268 #ifdef TXREPORT
3269 add_RATid(priv, pEntry);
3270 /**/
3271 #endif
3272 #endif
3273 }
3274 }
3275
3276
3277 #endif /*#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN| ODM_CE))*/
3278
3279
3280 /* RA_MASK_PHYDMLIZE, will delete it later*/
3281
3282 #if (RA_MASK_PHYDMLIZE_CE || RA_MASK_PHYDMLIZE_AP || RA_MASK_PHYDMLIZE_WIN)
3283
3284 BOOLEAN
ODM_RAStateCheck(IN PVOID pDM_VOID,IN s4Byte RSSI,IN BOOLEAN bForceUpdate,OUT pu1Byte pRATRState)3285 ODM_RAStateCheck(
3286 IN PVOID pDM_VOID,
3287 IN s4Byte RSSI,
3288 IN BOOLEAN bForceUpdate,
3289 OUT pu1Byte pRATRState
3290 )
3291 {
3292 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
3293 PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive;
3294 const u1Byte GoUpGap = 5;
3295 u1Byte HighRSSIThreshForRA = pRA->HighRSSIThresh;
3296 u1Byte LowRSSIThreshForRA = pRA->LowRSSIThresh;
3297 u1Byte RATRState;
3298
3299 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI= (( %d )), Current_RSSI_level = (( %d ))\n", RSSI, *pRATRState));
3300 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("[Ori RA RSSI Thresh] High= (( %d )), Low = (( %d ))\n", HighRSSIThreshForRA, LowRSSIThreshForRA));
3301 /* Threshold Adjustment:*/
3302 /* when RSSI state trends to go up one or two levels, make sure RSSI is high enough.*/
3303 /* Here GoUpGap is added to solve the boundary's level alternation issue.*/
3304 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
3305 u1Byte UltraLowRSSIThreshForRA = pRA->UltraLowRSSIThresh;
3306
3307 if (pDM_Odm->SupportICType == ODM_RTL8881A)
3308 LowRSSIThreshForRA = 30; /* for LDPC / BCC switch*/
3309 #endif
3310
3311 switch (*pRATRState) {
3312 case DM_RATR_STA_INIT:
3313 case DM_RATR_STA_HIGH:
3314 break;
3315
3316 case DM_RATR_STA_MIDDLE:
3317 HighRSSIThreshForRA += GoUpGap;
3318 break;
3319
3320 case DM_RATR_STA_LOW:
3321 HighRSSIThreshForRA += GoUpGap;
3322 LowRSSIThreshForRA += GoUpGap;
3323 break;
3324
3325 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
3326 case DM_RATR_STA_ULTRA_LOW:
3327 HighRSSIThreshForRA += GoUpGap;
3328 LowRSSIThreshForRA += GoUpGap;
3329 UltraLowRSSIThreshForRA += GoUpGap;
3330 break;
3331 #endif
3332
3333 default:
3334 ODM_RT_ASSERT(pDM_Odm, FALSE, ("wrong rssi level setting %d !", *pRATRState));
3335 break;
3336 }
3337
3338 /* Decide RATRState by RSSI.*/
3339 if (RSSI > HighRSSIThreshForRA)
3340 RATRState = DM_RATR_STA_HIGH;
3341 else if (RSSI > LowRSSIThreshForRA)
3342 RATRState = DM_RATR_STA_MIDDLE;
3343
3344 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
3345 else if (RSSI > UltraLowRSSIThreshForRA)
3346 RATRState = DM_RATR_STA_LOW;
3347 else
3348 RATRState = DM_RATR_STA_ULTRA_LOW;
3349 #else
3350 else
3351 RATRState = DM_RATR_STA_LOW;
3352 #endif
3353 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("[Mod RA RSSI Thresh] High= (( %d )), Low = (( %d ))\n", HighRSSIThreshForRA, LowRSSIThreshForRA));
3354 /*printk("==>%s,RATRState:0x%02x ,RSSI:%d\n",__FUNCTION__,RATRState,RSSI);*/
3355
3356 if (*pRATRState != RATRState || bForceUpdate) {
3357 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("[RSSI Level Update] %d -> %d\n", *pRATRState, RATRState));
3358 *pRATRState = RATRState;
3359 return TRUE;
3360 }
3361
3362 return FALSE;
3363 }
3364
3365 #endif
3366
3367
3368