1 /******************************************************************************
2 *
3 * Copyright(c) 2007 - 2017 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25
26 #include "mp_precomp.h"
27 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
28 #if RT_PLATFORM == PLATFORM_MACOSX
29 #include "phydm_precomp.h"
30 #else
31 #include "../phydm_precomp.h"
32 #endif
33 #else
34 #include "../../phydm_precomp.h"
35 #endif
36
37 #if (RTL8822B_SUPPORT == 1)
halrf_rf_lna_setting_8822b(struct dm_struct * dm_void,enum halrf_lna_set type)38 void halrf_rf_lna_setting_8822b(struct dm_struct *dm_void,
39 enum halrf_lna_set type)
40 {
41 struct dm_struct *dm = (struct dm_struct *)dm_void;
42 u8 path = 0x0;
43
44 for (path = 0x0; path < 2; path++)
45 if (type == HALRF_LNA_DISABLE) {
46 /*S0*/
47 odm_set_rf_reg(dm, (enum rf_path)path, RF_0xef, BIT(19),
48 0x1);
49 odm_set_rf_reg(dm, (enum rf_path)path, RF_0x33,
50 RFREGOFFSETMASK, 0x00003);
51 odm_set_rf_reg(dm, (enum rf_path)path, RF_0x3e,
52 RFREGOFFSETMASK, 0x00064);
53 odm_set_rf_reg(dm, (enum rf_path)path, RF_0x3f,
54 RFREGOFFSETMASK, 0x0afce);
55 odm_set_rf_reg(dm, (enum rf_path)path, RF_0xef, BIT(19),
56 0x0);
57 } else if (type == HALRF_LNA_ENABLE) {
58 /*S0*/
59 odm_set_rf_reg(dm, (enum rf_path)path, RF_0xef, BIT(19),
60 0x1);
61 odm_set_rf_reg(dm, (enum rf_path)path, RF_0x33,
62 RFREGOFFSETMASK, 0x00003);
63 odm_set_rf_reg(dm, (enum rf_path)path, RF_0x3e,
64 RFREGOFFSETMASK, 0x00064);
65 odm_set_rf_reg(dm, (enum rf_path)path, RF_0x3f,
66 RFREGOFFSETMASK, 0x1afce);
67 odm_set_rf_reg(dm, (enum rf_path)path, RF_0xef, BIT(19),
68 0x0);
69 }
70 }
71
get_mix_mode_tx_agc_bb_swing_offset_8822b(void * dm_void,enum pwrtrack_method method,u8 rf_path,u8 tx_power_index_offset)72 boolean get_mix_mode_tx_agc_bb_swing_offset_8822b(void *dm_void,
73 enum pwrtrack_method method,
74 u8 rf_path,
75 u8 tx_power_index_offset)
76 {
77 struct dm_struct *dm = (struct dm_struct *)dm_void;
78 struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
79
80 u8 bb_swing_upper_bound = cali_info->default_ofdm_index + 10;
81 u8 bb_swing_lower_bound = 0;
82
83 s8 tx_agc_index = 0;
84 u8 tx_bb_swing_index = cali_info->default_ofdm_index;
85
86 RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
87 "Path_%d absolute_ofdm_swing[%d]=%d tx_power_idx_offset=%d\n",
88 rf_path, rf_path, cali_info->absolute_ofdm_swing_idx[rf_path],
89 tx_power_index_offset);
90
91 if (tx_power_index_offset > 0XF)
92 tx_power_index_offset = 0XF;
93
94 if (cali_info->absolute_ofdm_swing_idx[rf_path] >= 0 &&
95 cali_info->absolute_ofdm_swing_idx[rf_path] <=
96 tx_power_index_offset) {
97 tx_agc_index = cali_info->absolute_ofdm_swing_idx[rf_path];
98 tx_bb_swing_index = cali_info->default_ofdm_index;
99 } else if (cali_info->absolute_ofdm_swing_idx[rf_path] >
100 tx_power_index_offset) {
101 tx_agc_index = tx_power_index_offset;
102 cali_info->remnant_ofdm_swing_idx[rf_path] =
103 cali_info->absolute_ofdm_swing_idx[rf_path] -
104 tx_power_index_offset;
105 tx_bb_swing_index = cali_info->default_ofdm_index +
106 cali_info->remnant_ofdm_swing_idx[rf_path];
107
108 if (tx_bb_swing_index > bb_swing_upper_bound)
109 tx_bb_swing_index = bb_swing_upper_bound;
110 } else {
111 tx_agc_index = 0;
112
113 if (cali_info->default_ofdm_index >
114 (cali_info->absolute_ofdm_swing_idx[rf_path] * (-1)))
115 tx_bb_swing_index =
116 cali_info->default_ofdm_index +
117 cali_info->absolute_ofdm_swing_idx[rf_path];
118 else
119 tx_bb_swing_index = bb_swing_lower_bound;
120
121 if (tx_bb_swing_index < bb_swing_lower_bound)
122 tx_bb_swing_index = bb_swing_lower_bound;
123 }
124
125 cali_info->absolute_ofdm_swing_idx[rf_path] = tx_agc_index;
126 cali_info->bb_swing_idx_ofdm[rf_path] = tx_bb_swing_index;
127
128 RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
129 "absolute_ofdm[%d]=%d bb_swing_ofdm[%d]=%d tx_pwr_offset=%d\n",
130 rf_path, cali_info->absolute_ofdm_swing_idx[rf_path],
131 rf_path, cali_info->bb_swing_idx_ofdm[rf_path],
132 tx_power_index_offset);
133
134 return true;
135 }
136
odm_pwrtrack_method_set_pwr8822b(void * dm_void,enum pwrtrack_method method,u8 rf_path,u8 tx_pwr_idx_offset)137 void odm_pwrtrack_method_set_pwr8822b(void *dm_void,
138 enum pwrtrack_method method,
139 u8 rf_path, u8 tx_pwr_idx_offset)
140 {
141 struct dm_struct *dm = (struct dm_struct *)dm_void;
142 struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
143 u32 tmp_reg1, tmp_reg2, tmp_reg3;
144 u8 bb_swing_idx_ofdm = cali_info->bb_swing_idx_ofdm[rf_path];
145
146 /*use for mp driver clean power tracking status*/
147 if (method == BBSWING) {
148 if (rf_path == RF_PATH_A) {
149 tmp_reg1 = R_0xc94;
150 tmp_reg2 = REG_A_TX_SCALE_JAGUAR;
151 } else if (rf_path == RF_PATH_B) {
152 tmp_reg1 = R_0xe94;
153 tmp_reg2 = REG_B_TX_SCALE_JAGUAR;
154 } else {
155 return;
156 }
157
158 odm_set_bb_reg(dm, tmp_reg1,
159 BIT(29) | BIT(28) | BIT(27) | BIT(26) | BIT(25),
160 cali_info->absolute_ofdm_swing_idx[rf_path]);
161 odm_set_bb_reg(dm, tmp_reg2, 0xFFE00000,
162 tx_scaling_table_jaguar[bb_swing_idx_ofdm]);
163
164 } else if (method == MIX_MODE) {
165 if (rf_path == RF_PATH_A) {
166 tmp_reg1 = R_0xc94;
167 tmp_reg2 = REG_A_TX_SCALE_JAGUAR;
168 tmp_reg3 = 0xc1c;
169 } else if (rf_path == RF_PATH_B) {
170 tmp_reg1 = R_0xe94;
171 tmp_reg2 = REG_B_TX_SCALE_JAGUAR;
172 tmp_reg3 = 0xe1c;
173 } else {
174 return;
175 }
176
177 get_mix_mode_tx_agc_bb_swing_offset_8822b(dm,
178 method,
179 rf_path,
180 tx_pwr_idx_offset);
181 bb_swing_idx_ofdm = cali_info->bb_swing_idx_ofdm[rf_path];
182 odm_set_bb_reg(dm, tmp_reg1,
183 BIT(29) | BIT(28) | BIT(27) | BIT(26) | BIT(25),
184 cali_info->absolute_ofdm_swing_idx[rf_path]);
185 odm_set_bb_reg(dm, tmp_reg2, 0xFFE00000,
186 tx_scaling_table_jaguar[bb_swing_idx_ofdm]);
187
188 RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
189 "TXAGC(%x)=0x%x BBSw(%x)=0x%x BBSwIdx=%d rf_path=%d\n",
190 tmp_reg1,
191 odm_get_bb_reg(dm, tmp_reg1,
192 BIT(29) | BIT(28) | BIT(27) |
193 BIT(26) | BIT(25)),
194 tmp_reg3, odm_get_bb_reg(dm, tmp_reg3, 0xFFE00000),
195 cali_info->bb_swing_idx_ofdm[rf_path], rf_path);
196 }
197 }
198
odm_tx_pwr_track_set_pwr8822b(void * dm_void,enum pwrtrack_method method,u8 rf_path,u8 channel_mapped_index)199 void odm_tx_pwr_track_set_pwr8822b(void *dm_void, enum pwrtrack_method method,
200 u8 rf_path, u8 channel_mapped_index)
201 {
202 #if 0
203 struct dm_struct *dm = (struct dm_struct *)dm_void;
204 void *adapter = dm->adapter;
205 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
206 struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
207 u8 channel = *dm->channel;
208 u8 band_width = hal_data->current_channel_bw;
209 u8 tx_power_index = 0;
210 u8 tx_rate = 0xFF;
211 enum rt_status status = RT_STATUS_SUCCESS;
212
213 PHALMAC_PWR_TRACKING_OPTION p_pwr_tracking_opt = &(cali_info->HALMAC_PWR_TRACKING_INFO);
214
215 if (*dm->mp_mode == true) {
216 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
217 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
218 #if (MP_DRIVER == 1)
219 PMPT_CONTEXT p_mpt_ctx = &(adapter->mpt_ctx);
220
221 tx_rate = mpt_to_mgnt_rate(p_mpt_ctx->mpt_rate_index);
222 #endif
223 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
224 PMPT_CONTEXT p_mpt_ctx = &(adapter->mppriv.mpt_ctx);
225
226 tx_rate = mpt_to_mgnt_rate(p_mpt_ctx->mpt_rate_index);
227 #endif
228 #endif
229 } else {
230 u16 rate = *(dm->forced_data_rate);
231
232 if (!rate) { /*auto rate*/
233 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
234 tx_rate = ((PADAPTER)adapter)->HalFunc.GetHwRateFromMRateHandler(dm->tx_rate);
235 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
236 if (dm->number_linked_client != 0)
237 tx_rate = hw_rate_to_m_rate(dm->tx_rate);
238 #endif
239 } else /*force rate*/
240 tx_rate = (u8) rate;
241 }
242
243 RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Call:%s tx_rate=0x%X\n", __func__,
244 tx_rate);
245
246 tx_power_index = phy_get_tx_power_index(adapter, (enum rf_path) rf_path, tx_rate, band_width, channel);
247
248 RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
249 "type=%d tx_power_index=%d cali_info->absolute_ofdm_swing_idx=%d cali_info->default_ofdm_index=%d rf_path=%d\n",
250 method, tx_power_index,
251 cali_info->absolute_ofdm_swing_idx[rf_path],
252 cali_info->default_ofdm_index, rf_path);
253
254 p_pwr_tracking_opt->type = method;
255 p_pwr_tracking_opt->bbswing_index = cali_info->default_ofdm_index;
256 p_pwr_tracking_opt->pwr_tracking_para[rf_path].enable = 1;
257 p_pwr_tracking_opt->pwr_tracking_para[rf_path].tx_pwr_index = tx_power_index;
258 p_pwr_tracking_opt->pwr_tracking_para[rf_path].pwr_tracking_offset_value = cali_info->absolute_ofdm_swing_idx[rf_path];
259 p_pwr_tracking_opt->pwr_tracking_para[rf_path].tssi_value = 0;
260
261
262 if (rf_path == (MAX_PATH_NUM_8822B - 1)) {
263 status = hal_mac_send_power_tracking_info(&GET_HAL_MAC_INFO(adapter), p_pwr_tracking_opt);
264
265 if (status == RT_STATUS_SUCCESS) {
266 RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
267 "path A 0xC94=0x%X 0xC1C=0x%X\n",
268 odm_get_bb_reg(dm, R_0xc94,
269 BIT(29) | BIT(28) | BIT(27) | BIT(26) | BIT(25)),
270 odm_get_bb_reg(dm, R_0xc1c, 0xFFE00000));
271 RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
272 "path B 0xE94=0x%X 0xE1C=0x%X\n",
273 odm_get_bb_reg(dm, R_0xe94,
274 BIT(29) | BIT(28) | BIT(27) | BIT(26) | BIT(25)),
275 odm_get_bb_reg(dm, R_0xe1c, 0xFFE00000));
276 } else {
277 RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
278 "Power Tracking to FW Fail ret code = %d\n",
279 status);
280 }
281 }
282
283 #endif
284 struct dm_struct *dm = (struct dm_struct *)dm_void;
285 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
286 struct _ADAPTER *adapter = dm->adapter;
287 #endif
288 struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
289 struct _hal_rf_ *rf = &dm->rf_table;
290 u8 tx_pwr_idx_offset = 0;
291 u8 tx_pwr_idx = 0;
292 u8 mpt_rate_index = 0;
293 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
294 u8 channel = *dm->channel;
295 u8 band_width = *dm->band_width;
296 u8 tx_rate = 0xFF;
297
298 if (*dm->mp_mode == 1) {
299 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
300 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
301 #if (MP_DRIVER == 1)
302 PMPT_CONTEXT p_mpt_ctx = &adapter->MptCtx;
303
304 tx_rate = MptToMgntRate(p_mpt_ctx->MptRateIndex);
305 #endif
306 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
307 #ifdef CONFIG_MP_INCLUDED
308 if (rf->mp_rate_index)
309 mpt_rate_index = *rf->mp_rate_index;
310
311 tx_rate = mpt_to_mgnt_rate(mpt_rate_index);
312 #endif
313 #endif
314 #endif
315 } else {
316 u16 rate = *dm->forced_data_rate;
317
318 if (!rate) { /*auto rate*/
319 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
320 struct _ADAPTER *adapter = dm->adapter;
321
322 tx_rate = ((PADAPTER)adapter)->HalFunc.GetHwRateFromMRateHandler(dm->tx_rate);
323 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
324 tx_rate = dm->tx_rate;
325 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
326 if (dm->number_linked_client != 0)
327 tx_rate = hw_rate_to_m_rate(dm->tx_rate);
328 else
329 tx_rate = rf->p_rate_index;
330 #endif
331 } else { /*force rate*/
332 tx_rate = (u8)rate;
333 }
334 }
335
336 RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Call:%s tx_rate=0x%X\n", __func__,
337 tx_rate);
338 #endif
339
340 RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
341 "pRF->default_ofdm_index=%d pRF->default_cck_index=%d\n",
342 cali_info->default_ofdm_index, cali_info->default_cck_index);
343
344 RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
345 "absolute_ofdm_swing_idx=%d remnant_ofdm_swing_idx=%d path=%d\n",
346 cali_info->absolute_ofdm_swing_idx[rf_path],
347 cali_info->remnant_ofdm_swing_idx[rf_path], rf_path);
348
349 RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
350 "absolute_cck_swing_idx=%d remnant_cck_swing_idx=%d path=%d\n",
351 cali_info->absolute_cck_swing_idx[rf_path],
352 cali_info->remnant_cck_swing_idx, rf_path);
353
354 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
355 tx_pwr_idx = odm_get_tx_power_index(dm, (enum rf_path)rf_path, tx_rate, (enum channel_width)band_width, channel);
356 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
357 tx_pwr_idx = odm_get_tx_power_index(dm, (enum rf_path)rf_path,
358 tx_rate, band_width, channel);
359 #else
360 /*0x04(TX_AGC_OFDM_6M)*/
361 tx_pwr_idx = config_phydm_read_txagc_8822b(dm, rf_path, 0x04);
362 #endif
363
364 if (tx_pwr_idx >= 63)
365 tx_pwr_idx = 63;
366
367 tx_pwr_idx_offset = 63 - tx_pwr_idx;
368
369 RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
370 "tx_power_index=%d tx_power_index_offset=%d rf_path=%d\n",
371 tx_pwr_idx, tx_pwr_idx_offset, rf_path);
372
373 odm_pwrtrack_method_set_pwr8822b(dm, method, rf_path,
374 tx_pwr_idx_offset);
375 }
376
get_delta_swing_table_8822b(void * dm_void,u8 ** temperature_up_a,u8 ** temperature_down_a,u8 ** temperature_up_b,u8 ** temperature_down_b,u8 ** temperature_up_cck_a,u8 ** temperature_down_cck_a,u8 ** temperature_up_cck_b,u8 ** temperature_down_cck_b)377 void get_delta_swing_table_8822b(void *dm_void,
378 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
379 u8 **temperature_up_a, u8 **temperature_down_a,
380 u8 **temperature_up_b, u8 **temperature_down_b,
381 u8 **temperature_up_cck_a,
382 u8 **temperature_down_cck_a,
383 u8 **temperature_up_cck_b,
384 u8 **temperature_down_cck_b)
385 #else
386 u8 **temperature_up_a,
387 u8 **temperature_down_a,
388 u8 **temperature_up_b,
389 u8 **temperature_down_b)
390 #endif
391 {
392 struct dm_struct *dm = (struct dm_struct *)dm_void;
393 struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
394 u8 channel = *dm->channel;
395
396 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
397 *temperature_up_cck_a = cali_info->delta_swing_table_idx_2g_cck_a_p;
398 *temperature_down_cck_a = cali_info->delta_swing_table_idx_2g_cck_a_n;
399 *temperature_up_cck_b = cali_info->delta_swing_table_idx_2g_cck_b_p;
400 *temperature_down_cck_b = cali_info->delta_swing_table_idx_2g_cck_b_n;
401 #endif
402 *temperature_up_a = cali_info->delta_swing_table_idx_2ga_p;
403 *temperature_down_a = cali_info->delta_swing_table_idx_2ga_n;
404 *temperature_up_b = cali_info->delta_swing_table_idx_2gb_p;
405 *temperature_down_b = cali_info->delta_swing_table_idx_2gb_n;
406
407 if (channel >= 36 && channel <= 64) {
408 *temperature_up_a = cali_info->delta_swing_table_idx_5ga_p[0];
409 *temperature_down_a = cali_info->delta_swing_table_idx_5ga_n[0];
410 *temperature_up_b = cali_info->delta_swing_table_idx_5gb_p[0];
411 *temperature_down_b = cali_info->delta_swing_table_idx_5gb_n[0];
412 } else if (channel >= 100 && channel <= 144) {
413 *temperature_up_a = cali_info->delta_swing_table_idx_5ga_p[1];
414 *temperature_down_a = cali_info->delta_swing_table_idx_5ga_n[1];
415 *temperature_up_b = cali_info->delta_swing_table_idx_5gb_p[1];
416 *temperature_down_b = cali_info->delta_swing_table_idx_5gb_n[1];
417 } else if (channel >= 149 && channel <= 177) {
418 *temperature_up_a = cali_info->delta_swing_table_idx_5ga_p[2];
419 *temperature_down_a = cali_info->delta_swing_table_idx_5ga_n[2];
420 *temperature_up_b = cali_info->delta_swing_table_idx_5gb_p[2];
421 *temperature_down_b = cali_info->delta_swing_table_idx_5gb_n[2];
422 }
423 }
424
aac_check_8822b(struct dm_struct * dm)425 void aac_check_8822b(struct dm_struct *dm)
426 {
427 struct _hal_rf_ *rf = &dm->rf_table;
428 u32 temp;
429
430 if (!rf->aac_checked) {
431 RF_DBG(dm, DBG_RF_LCK, "[LCK]AAC check for 8822b\n");
432 temp = odm_get_rf_reg(dm, RF_PATH_A, 0xc9, 0xf8);
433 if (temp < 4 || temp > 7) {
434 odm_set_rf_reg(dm, RF_PATH_A, 0xca, BIT(19), 0x0);
435 odm_set_rf_reg(dm, RF_PATH_A, 0xb2, 0x7c000, 0x6);
436 }
437 rf->aac_checked = true;
438 }
439 }
440
_phy_lc_calibrate_8822b(struct dm_struct * dm)441 void _phy_lc_calibrate_8822b(struct dm_struct *dm)
442 {
443 u32 lc_cal = 0, cnt = 0, tmp0xc00, tmp0xe00;
444
445 aac_check_8822b(dm);
446 RF_DBG(dm, DBG_RF_IQK, "[LCK]LCK start!!!!!!!\n");
447 tmp0xc00 = odm_read_4byte(dm, 0xc00);
448 tmp0xe00 = odm_read_4byte(dm, 0xe00);
449 odm_write_4byte(dm, 0xc00, 0x4);
450 odm_write_4byte(dm, 0xe00, 0x4);
451 odm_set_rf_reg(dm, RF_PATH_A, RF_0x0, RFREGOFFSETMASK, 0x10000);
452 odm_set_rf_reg(dm, RF_PATH_B, RF_0x0, RFREGOFFSETMASK, 0x10000);
453 /*backup RF0x18*/
454 lc_cal = odm_get_rf_reg(dm, RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK);
455 /*disable RTK*/
456 odm_set_rf_reg(dm, RF_PATH_A, RF_0xc4, RFREGOFFSETMASK, 0x01402);
457 /*Start LCK*/
458 odm_set_rf_reg(dm, RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK,
459 lc_cal | 0x08000);
460 ODM_delay_ms(100);
461 for (cnt = 0; cnt < 100; cnt++) {
462 if (odm_get_rf_reg(dm, RF_PATH_A, RF_CHNLBW, 0x8000) != 0x1)
463 break;
464 ODM_delay_ms(10);
465 }
466 /*Recover channel number*/
467 odm_set_rf_reg(dm, RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK, lc_cal);
468 /*enable RTK*/
469 odm_set_rf_reg(dm, RF_PATH_A, RF_0xc4, RFREGOFFSETMASK, 0x81402);
470 /**restore*/
471 odm_write_4byte(dm, 0xc00, tmp0xc00);
472 odm_write_4byte(dm, 0xe00, tmp0xe00);
473 odm_set_rf_reg(dm, RF_PATH_A, RF_0x0, RFREGOFFSETMASK, 0x3ffff);
474 odm_set_rf_reg(dm, RF_PATH_B, RF_0x0, RFREGOFFSETMASK, 0x3ffff);
475 RF_DBG(dm, DBG_RF_IQK, "[LCK]LCK end!!!!!!!\n");
476 }
477
478 /*LCK VERSION:0x2*/
phy_lc_calibrate_8822b(void * dm_void)479 void phy_lc_calibrate_8822b(void *dm_void)
480 {
481 struct dm_struct *dm = (struct dm_struct *)dm_void;
482
483 _phy_lc_calibrate_8822b(dm);
484 }
485
configure_txpower_track_8822b(struct txpwrtrack_cfg * config)486 void configure_txpower_track_8822b(struct txpwrtrack_cfg *config)
487 {
488 config->swing_table_size_cck = TXSCALE_TABLE_SIZE;
489 config->swing_table_size_ofdm = TXSCALE_TABLE_SIZE;
490 config->threshold_iqk = IQK_THRESHOLD;
491 config->threshold_dpk = DPK_THRESHOLD;
492 config->average_thermal_num = AVG_THERMAL_NUM_8822B;
493 config->rf_path_count = MAX_PATH_NUM_8822B;
494 config->thermal_reg_addr = RF_T_METER_8822B;
495
496 config->odm_tx_pwr_track_set_pwr = odm_tx_pwr_track_set_pwr8822b;
497 config->do_iqk = do_iqk_8822b;
498 config->phy_lc_calibrate = halrf_lck_trigger;
499
500 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
501 config->get_delta_all_swing_table = get_delta_swing_table_8822b;
502 #else
503 config->get_delta_swing_table = get_delta_swing_table_8822b;
504 #endif
505 }
506
507 #if ((DM_ODM_SUPPORT_TYPE & ODM_AP) || (DM_ODM_SUPPORT_TYPE == ODM_CE))
phy_set_rf_path_switch_8822b(struct dm_struct * dm,boolean is_main)508 void phy_set_rf_path_switch_8822b(struct dm_struct *dm, boolean is_main)
509 #else
510 void phy_set_rf_path_switch_8822b(void *adapter, boolean is_main)
511 #endif
512 {
513 #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
514 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
515 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
516 struct dm_struct *dm = &hal_data->DM_OutSrc;
517 #endif
518 #endif
519 /*BY SY Request */
520 odm_set_bb_reg(dm, R_0x4c, (BIT(24) | BIT(23)), 0x2);
521
522 odm_set_bb_reg(dm, R_0x974, 0xff, 0xff);
523
524 #if 0
525 /*odm_set_bb_reg(dm, R_0x1991, 0x3, 0x0);*/
526 #endif
527 odm_set_bb_reg(dm, R_0x1990, (BIT(9) | BIT(8)), 0x0);
528
529 #if 0
530 /*odm_set_bb_reg(dm, R_0xcbe, 0x8, 0x0);*/
531 #endif
532 odm_set_bb_reg(dm, R_0xcbc, BIT(19), 0x0);
533
534 odm_set_bb_reg(dm, R_0xcb4, 0xff, 0x77);
535
536 odm_set_bb_reg(dm, R_0x70, MASKBYTE3, 0x0e);
537 odm_set_bb_reg(dm, R_0x1704, MASKDWORD, 0x0000ff00);
538 odm_set_bb_reg(dm, R_0x1700, MASKDWORD, 0xc00f0038);
539
540 if (dm->rfe_type != 0x12) {
541 if (is_main) {
542 #if 0
543 /*odm_set_bb_reg(dm, R_0xcbd, 0x3, 0x2); WiFi*/
544 #endif
545 odm_set_bb_reg(dm, R_0xcbc, (BIT(9) | BIT(8)), 0x2); /*WiFi*/
546 } else {
547 #if 0
548 /*odm_set_bb_reg(dm, R_0xcbd, 0x3, 0x1); BT*/
549 #endif
550 odm_set_bb_reg(dm, R_0xcbc, (BIT(9) | BIT(8)), 0x1); /*BT*/
551 }
552 }
553 }
554
555 #if ((DM_ODM_SUPPORT_TYPE & ODM_AP) || (DM_ODM_SUPPORT_TYPE == ODM_CE))
_phy_query_rf_path_switch_8822b(struct dm_struct * dm)556 boolean _phy_query_rf_path_switch_8822b(struct dm_struct *dm)
557 #else
558 boolean _phy_query_rf_path_switch_8822b(void *adapter)
559 #endif
560 {
561 #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
562 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
563 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
564 struct dm_struct *dm = &hal_data->DM_OutSrc;
565 #endif
566 #endif
567 if (odm_get_bb_reg(dm, R_0xcbc, (BIT(9) | BIT(8))) == 0x2) /*WiFi*/
568 return true;
569 else
570 return false;
571 }
572
573 #if ((DM_ODM_SUPPORT_TYPE & ODM_AP) || (DM_ODM_SUPPORT_TYPE == ODM_CE))
phy_query_rf_path_switch_8822b(struct dm_struct * dm)574 boolean phy_query_rf_path_switch_8822b(struct dm_struct *dm)
575 #else
576 boolean phy_query_rf_path_switch_8822b(void *adapter)
577 #endif
578 {
579 #if DISABLE_BB_RF
580 return true;
581 #endif
582 #if ((DM_ODM_SUPPORT_TYPE & ODM_AP) || (DM_ODM_SUPPORT_TYPE == ODM_CE))
583 return _phy_query_rf_path_switch_8822b(dm);
584 #else
585 return _phy_query_rf_path_switch_8822b(adapter);
586 #endif
587 }
588
589 #endif /*(RTL8822B_SUPPORT == 0)*/
590