1 // SPDX-License-Identifier: GPL-2.0
2 /********************************************************************************
3 *
4 * Copyright (C) 2017 NEXTCHIP Inc. All rights reserved.
5 * Module : video_auto_detect.c
6 * Description :
7 * Author :
8 * Date :
9 * Version : Version 1.0
10 *
11 ********************************************************************************
12 * History :
13 *
14 *
15 ********************************************************************************/
16 #include <linux/string.h>
17 #include <linux/delay.h>
18 #include "nvp6158_common.h"
19 #include "nvp6158_video_auto_detect.h"
20 #include "nvp6158_video.h"
21
22 #define ACC_GAIN_NORMAL 0
23 #define ACC_GAIN_DEBUG 1
24
25 extern int nvp6158_chip_id[4];
26 extern unsigned int nvp6158_iic_addr[4];
27
28 NC_VIVO_CH_FORMATDEF nvp6158_arrVfcType[0x100] = {
29 /* 0x00 */ AHD20_SD_H960_2EX_Btype_NT, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
30 /* 0x10 */ AHD20_SD_H960_2EX_Btype_PAL,0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
31 /* 0x20 */ AHD20_720P_30P_EX_Btype, AHD20_720P_25P_EX_Btype, AHD20_720P_60P, AHD20_720P_50P,0,
32 /* 0x25 */ TVI_HD_30P_EX, TVI_HD_25P_EX, TVI_HD_60P, TVI_HD_50P, TVI_HD_B_30P_EX, TVI_HD_B_25P_EX,
33 /* 0x2B */ CVI_HD_30P_EX, CVI_HD_25P_EX, CVI_HD_60P, CVI_HD_50P,0,
34 /* 0x30 */ AHD20_1080P_30P, AHD20_1080P_25P, 0,TVI_FHD_30P, TVI_FHD_25P,CVI_FHD_30P, CVI_FHD_25P, 0, 0, 0, 0, 0, 0, 0, 0, 0,
35 /* 0x40 */ AHD30_3M_30P, AHD30_3M_25P, AHD30_3M_18P, 0,TVI_3M_18P, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, TVI_4M_15P,
36 /* 0x50 */ AHD30_4M_30P, AHD30_4M_25P, AHD30_4M_15P, 0,CVI_4M_30P, CVI_4M_25P, 0,TVI_4M_30P, TVI_4M_25P, TVI_4M_15P, 0, 0, 0, 0, 0, 0,
37 /* 0x60 */ AHD30_8M_X_30P, AHD30_8M_X_25P, 0,0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
38 /* 0x70 */ AHD30_5M_20P, AHD30_5M_12_5P, AHD30_5_3M_20P, TVI_5M_12_5P, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
39 /* 0x80 */ AHD30_8M_15P, AHD30_8M_7_5P, AHD30_8M_12_5P, CVI_8M_15P, CVI_8M_12_5P, TVI_8M_15P, TVI_8M_12_5P, 0, 0, 0, 0, 0, 0, 0, 0, 0,
40 /* 0x90 */ AHD30_6M_18P, AHD30_6M_20P, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
41 /* 0xA0 */
42 };
43
44 NC_VIVO_CH_FORMATDEF nvp6158_arrVfcType_ahd[0x100] = {
45 /* 0x00 */ AHD20_SD_H960_2EX_Btype_NT, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
46 /* 0x10 */ AHD20_SD_H960_2EX_Btype_PAL,0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
47 /* 0x20 */ AHD20_720P_30P_EX_Btype, AHD20_720P_25P_EX_Btype, AHD20_720P_60P, AHD20_720P_50P,0,
48 /* 0x25 */ 0, 0, 0, 0, 0, 0,
49 /* 0x2B */ AHD20_720P_30P_EX_Btype, AHD20_720P_25P_EX_Btype, AHD20_720P_60P, AHD20_720P_50P,0,
50 /* 0x30 */ AHD20_1080P_30P, AHD20_1080P_25P, 0,0, 0,AHD20_1080P_30P, AHD20_1080P_25P, 0, 0, 0, 0, 0, 0, 0, 0, 0,
51 /* 0x40 */ AHD30_3M_30P, AHD30_3M_25P, AHD30_3M_18P, 0,0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
52 /* 0x50 */ AHD30_4M_30P, AHD30_4M_25P, AHD30_4M_15P, 0,0, 0, 0,0, 0, 0, 0, 0, 0, 0, 0, 0,
53 /* 0x60 */ AHD30_8M_X_30P, AHD30_8M_X_25P, 0,0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
54 /* 0x70 */ AHD30_5M_20P, AHD30_5M_12_5P, AHD30_5_3M_20P, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
55 /* 0x80 */ AHD30_8M_15P, AHD30_8M_7_5P, AHD30_8M_12_5P, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
56 /* 0x90 */ AHD30_6M_18P, AHD30_6M_20P, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
57 /* 0xA0 */
58 };
59
60 NC_VIVO_CH_FORMATDEF nvp6158_arrVfcType_cvi[0x100] = {
61 /* 0x00 */ AHD20_SD_H960_2EX_Btype_NT, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
62 /* 0x10 */ AHD20_SD_H960_2EX_Btype_PAL,0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
63 /* 0x20 */ CVI_HD_30P_EX, CVI_HD_25P_EX, CVI_HD_60P, CVI_HD_50P,0,
64 /* 0x25 */ 0, 0, 0, 0, 0, 0,
65 /* 0x2B */ CVI_HD_30P_EX, CVI_HD_25P_EX, CVI_HD_60P, CVI_HD_50P,0,
66 /* 0x30 */ CVI_FHD_30P, CVI_FHD_25P, 0,0, 0,CVI_FHD_30P, CVI_FHD_25P, 0, 0, 0, 0, 0, 0, 0, 0, 0,
67 /* 0x40 */ 0, 0, 0, 0,0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
68 /* 0x50 */ 0, 0, 0, 0,CVI_4M_30P, CVI_4M_25P, 0,0, 0, 0, 0, 0, 0, 0, 0, 0,
69 /* 0x60 */ 0, 0, 0,0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
70 /* 0x70 */ CVI_5M_20P, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
71 /* 0x80 */ 0, 0, 0, CVI_8M_15P, CVI_8M_12_5P, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
72 /* 0x90 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
73 /* 0xA0 */
74 };
75
76 NC_VIVO_CH_FORMATDEF nvp6158_arrVfcType_tvi[0x100] = {
77 /* 0x00 */ AHD20_SD_H960_2EX_Btype_NT, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
78 /* 0x10 */ AHD20_SD_H960_2EX_Btype_PAL,0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
79 /* 0x20 */ 0, 0, 0, 0, 0,
80 /* 0x25 */ TVI_HD_30P_EX, TVI_HD_25P_EX, TVI_HD_60P, TVI_HD_50P, TVI_HD_B_30P_EX, TVI_HD_B_25P_EX,
81 /* 0x2B */ TVI_4M_15P, 0, 0, 0,0,
82 /* 0x30 */ 0, 0, 0,TVI_FHD_30P, TVI_FHD_25P,0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
83 /* 0x40 */ 0, 0, 0, 0,TVI_3M_18P, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, TVI_4M_15P,
84 /* 0x50 */ 0, 0, 0, 0, 0, 0, 0, TVI_4M_30P, TVI_4M_25P, TVI_4M_15P, 0, 0, 0, 0, 0, 0,
85 /* 0x60 */ 0, 0, 0,0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
86 /* 0x70 */ TVI_5M_20P, 0, 0, TVI_5M_12_5P, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
87 /* 0x80 */ 0, 0, 0, TVI_8M_15P, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
88 /* 0x90 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
89 /* 0xA0 */
90 };
91
92 NC_VIVO_CH_FORMATDEF nvp6158_arrVfcType_raptor4[0x100] = {
93 /* 0x00 */ AHD20_SD_H960_2EX_Btype_NT,
94 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
95 /* 0x10 */ AHD20_SD_H960_2EX_Btype_PAL,
96 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
97 /* 0x20 */ AHD20_720P_30P_EX_Btype, AHD20_720P_25P_EX_Btype, AHD20_720P_60P, AHD20_720P_50P,
98 0,
99 /* 0x25 */ TVI_HD_30P_EX, TVI_HD_25P_EX, TVI_HD_60P, TVI_HD_50P, TVI_HD_B_30P_EX, TVI_HD_B_25P_EX,
100 /* 0x2B */ CVI_HD_30P_EX, CVI_HD_25P_EX, CVI_HD_60P, CVI_HD_50P,
101 0,
102 /* 0x30 */ AHD20_1080P_30P, AHD20_1080P_25P,
103 0,
104 /* 0x33 */ TVI_FHD_30P, TVI_FHD_25P,
105 /* 0x35 */ CVI_FHD_30P, CVI_FHD_25P,
106 0,
107 /* 0x38 */ AHD20_1080P_60P, AHD20_1080P_50P,
108 /* 0x3A */ TVI_FHD_60P, TVI_FHD_50P,
109 /* 0x3C */ AHD20_1080P_15P_EX, AHD20_1080P_12_5P_EX,
110 0, 0,
111 /* 0x40 */ AHD30_3M_30P, AHD30_3M_25P, AHD30_3M_18P,
112 0,
113 /* 0x44 */ TVI_3M_18P,
114 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
115 /* 0x50 */ AHD30_4M_30P, AHD30_4M_25P, AHD30_4M_15P,
116 0,
117 /* 0x54 */ CVI_4M_30P, CVI_4M_25P,
118 0,
119 /* 0x57 */ TVI_4M_30P, TVI_4M_25P, TVI_4M_15P,
120 0, 0, 0, 0, 0, 0,
121 /* 0x60 */ AHD30_8M_X_30P, AHD30_8M_X_25P, 0,
122 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
123 /* 0x70 */ AHD30_5M_20P, AHD30_5M_12_5P, AHD30_5_3M_20P,
124 /* 0x73 */ TVI_5M_12_5P, TVI_5M_20P,
125 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
126 /* 0x80 */ AHD30_8M_15P, AHD30_8M_7_5P, AHD30_8M_12_5P, CVI_8M_15P, CVI_8M_12_5P, TVI_8M_15P, TVI_8M_12_5P,
127 0, 0, 0, 0, 0, 0, 0, 0, 0,
128 /* 0x90 */ AHD30_6M_18P, AHD30_6M_20P,
129 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
130 /* 0xA0 */ AHD20_960P_30P, AHD20_960P_25P, AHD20_960P_60P, AHD20_960P_50P,
131 };
132
133 //unsigned char current_fmt[16] = {NVP6158_DET_MODE_AUTO, NVP6158_DET_MODE_AUTO, NVP6158_DET_MODE_AUTO, NVP6158_DET_MODE_AUTO};
134 extern unsigned char nvp6158_det_mode[16];
NVP6158_NC_VD_AUTO_VFCtoFMTDEF(unsigned char ch,unsigned char VFC)135 NC_VIVO_CH_FORMATDEF NVP6158_NC_VD_AUTO_VFCtoFMTDEF(unsigned char ch, unsigned char VFC)
136 {
137 if((nvp6158_chip_id[ch/4] == NVP6168C_R0_ID) ||
138 (nvp6158_chip_id[ch/4] == NVP6168_R0_ID)) {
139 return nvp6158_arrVfcType_raptor4[VFC];
140 } else {
141 if(nvp6158_det_mode[ch] == NVP6158_DET_MODE_AUTO)
142 return nvp6158_arrVfcType[VFC];
143 else if(nvp6158_det_mode[ch] == NVP6158_DET_MODE_CVI)
144 return nvp6158_arrVfcType_cvi[VFC];
145 else if(nvp6158_det_mode[ch] == NVP6158_DET_MODE_TVI)
146 return nvp6158_arrVfcType_tvi[VFC];
147 else
148 return nvp6158_arrVfcType_ahd[VFC];
149 }
150 }
151
_nvp6158_video_input_auto_detect_vafe_set(video_input_auto_detect * vin_auto_det)152 static void _nvp6158_video_input_auto_detect_vafe_set(video_input_auto_detect *vin_auto_det)
153 {
154 unsigned char val_1x7A;
155 unsigned char val_5678x00;
156 unsigned char val_5678x01;
157 unsigned char val_5678x58;
158 unsigned char val_5678x59;
159 unsigned char val_5678x5B;
160 unsigned char val_5678x5C;
161
162 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xFF, 0x01);
163 val_1x7A = gpio_i2c_read(nvp6158_iic_addr[vin_auto_det->devnum], 0x7A);
164 val_1x7A |= (1 << vin_auto_det->ch);
165 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x7A, val_1x7A);
166
167 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xFF, 0x00);
168 //B0 0x00/1/2/3 gain[4], powerdown[0]
169 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x00 + vin_auto_det->ch,
170 ((vin_auto_det->vafe.gain & 0x01) << 4) | (vin_auto_det->vafe.powerdown & 0x01));
171
172 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xFF, 0x01);
173 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x84 + vin_auto_det->ch, 0x00);
174
175 ///////////////////////////////////////////////////////////////////////////////////////////////////////////
176
177 //B5/6/7/8
178 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xFF, 0x05 + vin_auto_det->ch);
179
180 //B5/6/7/8 0x01 spd[2], lpf_back_band[1:0]
181 val_5678x00 = gpio_i2c_read(nvp6158_iic_addr[vin_auto_det->devnum], 0x00);
182 val_5678x00 &= ~(0xF << 4);
183 val_5678x00 |= vin_auto_det->vafe.spd << 4;
184
185 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x00, val_5678x00);
186
187 val_5678x01 = ((vin_auto_det->vafe.ctrlreg << 6) | (vin_auto_det->vafe.ctrlibs << 4) |
188 (vin_auto_det->vafe.adcspd << 2) | (vin_auto_det->vafe.clplevel));
189 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x01, val_5678x01 );
190
191 //B5/6/7/8 0x58 eq_band[7:4], lpf_front_band[1:0]
192 val_5678x58 = ((vin_auto_det->vafe.eq_band << 4) | (vin_auto_det->vafe.lpf_front_band));
193 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x58, val_5678x58);
194
195 //B5/6/7/8 0x5B ref_vol[1:0]
196 val_5678x59 = ((vin_auto_det->vafe.clpmode << 7) | (vin_auto_det->vafe.f_lpf_bypass << 4) |
197 (vin_auto_det->vafe.clproff << 3) | (vin_auto_det->vafe.b_lpf_bypass));
198 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x59, val_5678x59);
199
200 val_5678x5B = ((vin_auto_det->vafe.duty << 4) | (vin_auto_det->vafe.ref_vol));
201 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x5B, val_5678x5B);
202
203 val_5678x5C = ((vin_auto_det->vafe.lpf_back_band << 4) |
204 (vin_auto_det->vafe.clk_sel << 3) | (vin_auto_det->vafe.eq_gainsel));
205 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x5C, val_5678x5C);
206 }
207
nvp6158_video_input_manual_mode_set(video_input_manual_mode * vin_manual_det)208 void nvp6158_video_input_manual_mode_set(video_input_manual_mode *vin_manual_det)
209 {
210 unsigned char val_0x30;
211 unsigned char val_0x31;
212 unsigned char val_0x32;
213
214 unsigned char val_1x7A;
215
216 unsigned char val_9x44;
217 //B13 0x30 AUTO_FMT_SET_EN_2[3:0], AUTO_FMT_SET_EN [3:0]
218 //B13 0x31 AUTO_FMT_SET_EN_4[3:0], AUTO_FMT_SET_EN_3 [3:0]
219 //B13 0x32 [ RESERVED ], NOVIDEO_VFC_INIT_EN[3:0]
220
221 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0xFF, 0x01);
222 val_1x7A = gpio_i2c_read(nvp6158_iic_addr[vin_manual_det->dev_num], 0x7A);
223 val_1x7A &= ~(1 << vin_manual_det->ch);
224 val_1x7A |= (1 << vin_manual_det->ch);
225 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0x7A, val_1x7A);
226
227 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0xFF, 0x00);
228 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0x23 + (vin_manual_det->ch*4), 0x41);
229
230 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0xFF, 0x13);
231 val_0x30 = gpio_i2c_read(nvp6158_iic_addr[vin_manual_det->dev_num], 0x30);
232 val_0x31 = gpio_i2c_read(nvp6158_iic_addr[vin_manual_det->dev_num], 0x31);
233 val_0x32 = gpio_i2c_read(nvp6158_iic_addr[vin_manual_det->dev_num], 0x32);
234
235 val_0x30 &= (~(1 << (vin_manual_det->ch + 4)) & (~(1 << vin_manual_det->ch)));
236 val_0x31 &= (~(1 << (vin_manual_det->ch + 4)) & (~(1 << vin_manual_det->ch)));
237 val_0x32 &= (~(1 << vin_manual_det->ch));
238
239 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0x30, val_0x30);
240 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0x31, val_0x31);
241 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0x32, val_0x32);
242
243 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0xFF, 0x05 + vin_manual_det->ch);
244 //B5/6/7/8 0xB9 HAFC_LPF_SEL[7:6] GAIN1[5:4] GAIN2[3:0]
245 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0xB9, 0xB2);
246
247
248 // EXT PN VALUE Disable
249 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0xFF,0x09);
250 val_9x44 = gpio_i2c_read(nvp6158_iic_addr[vin_manual_det->dev_num], 0x44);
251 val_9x44 &= ~(1 << vin_manual_det->ch);
252 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0x44, val_9x44);
253 }
254
nvp6168_video_input_manual_mode_set(video_input_manual_mode * vin_manual_det)255 void nvp6168_video_input_manual_mode_set(video_input_manual_mode *vin_manual_det)
256 {
257 unsigned char val_1x7A;
258 unsigned char val_9x44;
259
260 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0xFF, 0x01);
261 val_1x7A = gpio_i2c_read(nvp6158_iic_addr[vin_manual_det->dev_num], 0x7A);
262 val_1x7A &= ~(1 << vin_manual_det->ch);
263 val_1x7A |= (1 << vin_manual_det->ch);
264 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0x7A, val_1x7A);
265
266 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0xFF, 0x13);
267 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0x30, 0x00);
268 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0x70, 0x00);
269
270 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0xFF, 0x05 + vin_manual_det->ch);
271 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0xB9, 0x72);
272
273 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0xFF, 0x09);
274 val_9x44 = gpio_i2c_read(nvp6158_iic_addr[vin_manual_det->dev_num], 0x44);
275 val_9x44 &= ~(1 << vin_manual_det->ch);
276 gpio_i2c_write(nvp6158_iic_addr[vin_manual_det->dev_num], 0x44, val_9x44);
277 }
278
nvp6158_video_input_auto_detect_set(video_input_auto_detect * vin_auto_det)279 void nvp6158_video_input_auto_detect_set(video_input_auto_detect *vin_auto_det)
280 {
281 unsigned char val_0x30;
282 unsigned char val_0x31;
283 unsigned char val_0x32;
284
285 vin_auto_det->vafe.powerdown = 0x00;
286 vin_auto_det->vafe.gain = 0x01;
287 vin_auto_det->vafe.spd = 0x0d;
288 vin_auto_det->vafe.ctrlreg = 0x01;
289 vin_auto_det->vafe.ctrlibs = 0x02;
290 vin_auto_det->vafe.adcspd = 0x00;
291 vin_auto_det->vafe.clplevel = 0x02;
292 vin_auto_det->vafe.eq_band = 0x00;
293 vin_auto_det->vafe.lpf_front_band = 0x07;
294 vin_auto_det->vafe.clpmode = 0x00;
295 vin_auto_det->vafe.f_lpf_bypass = 0x01;
296 vin_auto_det->vafe.clproff = 0x00;
297 vin_auto_det->vafe.b_lpf_bypass = 0x00;
298 vin_auto_det->vafe.duty = 0x04;
299 vin_auto_det->vafe.ref_vol = 0x03;
300 vin_auto_det->vafe.lpf_back_band = 0x07;
301 vin_auto_det->vafe.clk_sel = 0x01;
302 vin_auto_det->vafe.eq_gainsel = 0x07;
303
304 vin_auto_det->d_cmp = 0x3f;
305 vin_auto_det->slice_level = 0x5a;
306 vin_auto_det->stable_mode_1 = 0x04;
307 vin_auto_det->stable_mode_2 = 0x00;
308 vin_auto_det->novid_det = 0x41;
309
310 _nvp6158_video_input_auto_detect_vafe_set(vin_auto_det);
311
312 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xFF, 0x05 + vin_auto_det->ch);
313
314 //B5/6/7/8 0x03 Digital Clamp
315 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x03, vin_auto_det->d_cmp);
316 //B5/6/7/8 0x08 Slice Level
317 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x08, vin_auto_det->slice_level);
318 //B5/6/7/8 0xB9 HAFC_LPF_SEL[7:6] GAIN1[5:4] GAIN2[3:0]
319 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xB9, 0x72);
320
321 //B5/6/7/8 0xCA ADV_V_DELAY_AD[4] ADV_V_DELAY_ON[0]
322 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xCA, 0x10);
323
324 //B13 0x30 AUTO_FMT_SET_EN_2[3:0], AUTO_FMT_SET_EN [3:0]
325 //B13 0x31 AUTO_FMT_SET_EN_4[3:0], AUTO_FMT_SET_EN_3 [3:0]
326 //B13 0x32 [ RESERVED ], NOVIDEO_VFC_INIT_EN[3:0]
327
328 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xFF, 0x13);
329 val_0x30 = gpio_i2c_read(nvp6158_iic_addr[vin_auto_det->devnum], 0x30);
330 val_0x31 = gpio_i2c_read(nvp6158_iic_addr[vin_auto_det->devnum], 0x31);
331 val_0x32 = gpio_i2c_read(nvp6158_iic_addr[vin_auto_det->devnum], 0x32);
332 val_0x30 |= ((1 << (vin_auto_det->ch + 4)) | (1 << vin_auto_det->ch));
333 val_0x31 |= ((1 << (vin_auto_det->ch + 4)) | (1 << vin_auto_det->ch));
334 val_0x32 |= ((1 << vin_auto_det->ch) & 0xF);
335 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x30, val_0x30);
336 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x31, val_0x31);
337 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x32, val_0x32);
338 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x36, 0x0A);
339 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x37, 0x82);
340
341 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xFF, 0x00);
342 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x81+vin_auto_det->ch, 0x0A);
343 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x85+vin_auto_det->ch, 0x02);
344
345 ////////////////////////////////////////////////////////////////////////////////////////////////////////////
346
347 //B13
348 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xFF, 0x13);
349 //B13 0x00 Stable Mode set
350 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x00, vin_auto_det->stable_mode_1);
351 //B13 0x01 Stable Mode Set
352 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x01, ((vin_auto_det->stable_mode_2) & 0x3));
353 //B13 0x40 VFC_EQ_BAND_SEL[7:4] VFC_LPF_F_SEL[1:0]
354 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x40, 0x07);
355 //B13 0x41 VFC_REF_VTG
356 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x41, 0x01);
357 //B13 0x42 VFC_D_CMP_SET
358 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x42, 0x3F);
359 //B13 0x43 VFC_SLICE_VALUE
360 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x43, 0x5A);
361 //B13 0x44 VFC_SLICE_MD2
362 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x44, 0x30);
363 //B13 0x45 VFC_CONTROL_MODES
364 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x45, 0xEE);
365 //B13 0x46 VFC_GDF_FIX_COEFF
366 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x46, 0xC6);
367 //B13 0x47 VFC_DFE_REF_SEL_OLD[4] VFC_DFE_REF_SEL_NEW[0]
368 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x47, 0x00);
369 //B13 0x48 VFC_D_BLK_CNT_NEW[[7:4] VFC_HAFC_BYPASS_NEW[1] VFC_UPDN_SEL[0]
370 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x48, 0x80);
371 //B13 0x49 VFC_OLD_WPD_ON[4] VFC_NEW_WPD_ON[0]
372 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x49, 0x00);
373 //B13 0x4A VFC_D_CMP_FZ_OLD[4] VFC_D_CMP_FZ_NEW[1]
374 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x4A, 0x11);
375 //B13 0x4B VFC_AUTO_GNOS_MODE
376 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x4B, 0x7F);
377 //B13 0x4C VFC_AUTO_SYNC_MODE
378 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x4C, 0x00);
379 //B13 0x4D VFC_HAFC_BYPASS[7] ??? [6:0]
380 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x4D, 0xB9);
381 //B13 0x4E VFC_VAFE_B_LPF_SEL[6:4] VFC_VAFE_CKSEL[3] VFC_VAFE_EQ_GAIN_SEL[2:0]
382 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x4E, 0x78);
383 //B13 0x4F VFC_VAFE_CTRL_RES[7:6] VFC_VAFE_IBS_CTRL[5:4] VFC_VAFE_SPD[2] VFC_VAFE_CLP_LEVEL[1:0]
384 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x4F, 0x62);
385
386 //B0 0x23/0x27/0x2B/0x2F No Video Detect
387 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xFF, 0x0);
388 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x23 + ((vin_auto_det->ch) * 4), vin_auto_det->novid_det);
389
390 /* clock set */
391 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xFF, 0x1);
392 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x84 + vin_auto_det->ch, 0x00);
393 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x8c + vin_auto_det->ch, 0x55);
394
395 }
396
nvp6168_video_input_auto_detect_set(video_input_auto_detect * vin_auto_det)397 void nvp6168_video_input_auto_detect_set(video_input_auto_detect *vin_auto_det)
398 {
399 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xFF, 0x13);
400
401 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x12, 0x04);
402 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x2E, 0x10);
403 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x30, 0x7f);
404 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x31, 0xff);
405 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x32, 0xff);
406 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x33, 0xff);
407 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x77, 0xff);
408 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x3a, 0xff);
409 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x3b, 0xff);
410 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x3c, 0xff);
411 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x3d, 0xff);
412 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x3e, 0xff);
413 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x3f, 0xff);
414 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x70, 0xf0);
415 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x72, 0x05);
416 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x7A, 0x10);
417 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x61, 0x0A);
418 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x62, 0x02);
419 //gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x60, 0x01);
420 //gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x60, 0x00);
421 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x07, 0x47);
422 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x59, 0x24);
423
424 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x01, 0x0c);
425 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x2f, 0xc8);
426
427 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x73, 0x23);
428
429 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xff, 0x09 );
430 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x96, 0x03);
431 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xB6, 0x03);
432 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xD6, 0x03);
433 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xF6, 0x03);
434 }
435
nvp6158_video_input_vfc_read(video_input_vfc * vin_vfc)436 void nvp6158_video_input_vfc_read(video_input_vfc *vin_vfc)
437 {
438 gpio_i2c_write(nvp6158_iic_addr[vin_vfc->devnum], 0xFF, 0x13);
439 vin_vfc->vfc = gpio_i2c_read(nvp6158_iic_addr[vin_vfc->devnum], 0xF0 + vin_vfc->ch);
440 }
441
nvp6168_video_input_vfc_read(video_input_vfc * vin_vfc)442 void nvp6168_video_input_vfc_read(video_input_vfc *vin_vfc)
443 {
444 gpio_i2c_write(nvp6158_iic_addr[vin_vfc->devnum], 0xFF, 0x05 + vin_vfc->ch);
445 vin_vfc->vfc = gpio_i2c_read(nvp6158_iic_addr[vin_vfc->devnum], 0xF0);
446 }
447
nvp6158_video_input_novid_read(video_input_novid * vin_novid)448 void nvp6158_video_input_novid_read(video_input_novid *vin_novid)
449 {
450 unsigned char val_0xA8;
451
452 gpio_i2c_write(nvp6158_iic_addr[vin_novid->devnum], 0xFF, 0x00);
453 val_0xA8 = gpio_i2c_read(nvp6158_iic_addr[vin_novid->devnum], 0xA8);
454
455 vin_novid->novid = (((val_0xA8 >> vin_novid->ch) & 0x1)) ;
456 }
457
458
nvp6158_video_input_no_video_set(video_input_novid * auto_novid)459 void nvp6158_video_input_no_video_set(video_input_novid *auto_novid)
460 {
461 unsigned char val_13x30;
462 unsigned char val_13x31;
463 unsigned char val_13x32;
464 unsigned char val_9x44;
465 unsigned char val_1x7A;
466
467 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xFF, 0x00);
468 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x21 + (auto_novid->ch * 4), 0x82);
469 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x23 + (auto_novid->ch * 4), 0x41);
470
471 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xFF, 0x09);
472 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x80 + (auto_novid->ch * 0x20), 0x00);
473 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x81 + (auto_novid->ch * 0x20), 0x00);
474
475 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xFF, 0x0A+auto_novid->ch/2);
476 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x3D + ((auto_novid->ch%2) * 0x80), 0x00);
477 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x3C + ((auto_novid->ch%2) * 0x80), 0x00);
478
479 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xFF, 0x05 + auto_novid->ch);
480 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x2C, 0x00);
481 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x01, 0x62);
482
483 /* Before 08/28 */
484 //gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x58, 0x07);
485 //gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x5C, 0x78);
486 /* After 08/28 */
487 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x47, 0xEE);
488 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x50, 0xc6); //recovery to std value.
489 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x58, 0x47);
490 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x5C, 0x7f);
491 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x6E, 0x00); //VBLK default setting
492 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x6F, 0x00);
493 /* Low-Poass Filter (LPF) Bypass Enable Bank5/6/7/8 0x59 */
494 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x59, 0x10);
495
496 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xB8, 0xB9);
497 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xB9, 0xB2);
498
499 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xFF, 0x13);
500 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x43, 0x5a);
501
502 val_13x30 = gpio_i2c_read(nvp6158_iic_addr[auto_novid->devnum], 0x30);
503 val_13x31 = gpio_i2c_read(nvp6158_iic_addr[auto_novid->devnum], 0x31);
504 val_13x32 = gpio_i2c_read(nvp6158_iic_addr[auto_novid->devnum], 0x32);
505 val_13x30 |= ((1 << (auto_novid->ch + 4)) | (1 << auto_novid->ch));
506 val_13x31 |= ((1 << (auto_novid->ch + 4)) | (1 << auto_novid->ch));
507 val_13x32 |= ((1 << auto_novid->ch) & 0xF);
508 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x30, val_13x30);
509 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x31, val_13x31);
510 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x32, val_13x32);
511
512 /* disable Bank11 0x00, if before setting format TVI 5M 20P when onvideo */
513 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xFF, 0x11);
514 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x00 + ( auto_novid->ch * 0x20 ), 0x00);
515
516 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xFF, 0x09);
517 val_9x44 = gpio_i2c_read(nvp6158_iic_addr[auto_novid->devnum], 0x44);
518 val_9x44 |= (1 << auto_novid->ch);
519 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x50 + (auto_novid->ch*4) , 0x30);
520 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x51 + (auto_novid->ch*4) , 0x6F);
521 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x52 + (auto_novid->ch*4) , 0x67);
522 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x53 + (auto_novid->ch*4) , 0x48);
523 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x44 , val_9x44);
524
525 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xFF, 0x00);
526 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x81+auto_novid->ch, 0x0A);
527 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x85+auto_novid->ch, 0x02);
528 /* clock set */
529 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xFF, 0x01);
530 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x84 + auto_novid->ch, 0x00);
531 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x8c + auto_novid->ch, 0x55);
532 val_1x7A = gpio_i2c_read(nvp6158_iic_addr[auto_novid->devnum], 0x7A);
533 val_1x7A |= (1 << auto_novid->ch);
534 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x7A, val_1x7A);
535 }
536
nvp6168_video_input_no_video_set(video_input_novid * auto_novid)537 void nvp6168_video_input_no_video_set(video_input_novid *auto_novid)
538 {
539 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xFF, 0x00);
540 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x21 + (auto_novid->ch * 4), 0x82);
541 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x23 + (auto_novid->ch * 4), 0x41);
542
543 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xFF, 0x09);
544 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x80 + (auto_novid->ch * 0x20), 0x00);
545 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x81 + (auto_novid->ch * 0x20), 0x00);
546
547 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xff, (auto_novid->ch < 2 ? 0x0a : 0x0b) );
548 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x3d + (auto_novid->ch%2 * 0x80), 0x00);
549 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x3c + (auto_novid->ch%2 * 0x80), 0x00);
550
551 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xFF, 0x05 + auto_novid->ch);
552 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x01, 0x62);
553 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x2C, 0x00);
554 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x50, 0xc6);
555 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x58, 0x47);
556 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x59, 0x10);
557 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x5C, 0x7f);
558 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xB8, 0xB8);
559 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xB9, 0x72);
560 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x6E, 0x00); //VBLK default setting
561 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x6F, 0x00);
562
563 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0xFF, 0x11);
564 gpio_i2c_write(nvp6158_iic_addr[auto_novid->devnum], 0x00 + ( auto_novid->ch * 0x20 ), 0x00);
565 }
566
nvp6158_video_input_cable_dist_read(video_input_cable_dist * vin_cable_dist)567 void nvp6158_video_input_cable_dist_read(video_input_cable_dist *vin_cable_dist)
568 {
569 gpio_i2c_write(nvp6158_iic_addr[vin_cable_dist->devnum], 0xFF, 0x13);
570
571 //B13 0xA0 [3:0] Cable Distance Value
572 vin_cable_dist->dist = gpio_i2c_read(nvp6158_iic_addr[vin_cable_dist->devnum], 0xA0 + vin_cable_dist->ch ) & 0xF;
573 }
574
575
576
nvp6158_video_input_sam_val_read(video_input_sam_val * vin_sam_val)577 void nvp6158_video_input_sam_val_read(video_input_sam_val *vin_sam_val )
578 {
579 unsigned char val1, val2;
580
581 // Channel Change Sequence
582 gpio_i2c_write(nvp6158_iic_addr[vin_sam_val->devnum], 0xFF, 0x13);
583 gpio_i2c_write(nvp6158_iic_addr[vin_sam_val->devnum], 0x2B, vin_sam_val->ch);
584
585 gpio_i2c_write(nvp6158_iic_addr[vin_sam_val->devnum], 0xFF, 0x13); /* + vin_sam_val->ch ); */
586 //B13 0xC9 [7:0] SAM Value
587 val1 = gpio_i2c_read(nvp6158_iic_addr[vin_sam_val->devnum], 0xC9) ;
588 //B13 0xC8 [9:8] SAM Value
589 val2 = gpio_i2c_read(nvp6158_iic_addr[vin_sam_val->devnum], 0xC8) & 0x3;
590
591 vin_sam_val->sam_val = ((val2 << 8) | val1);
592 }
593
nvp6158_video_input_hsync_accum_read(video_input_hsync_accum * vin_hsync_accum)594 void nvp6158_video_input_hsync_accum_read(video_input_hsync_accum *vin_hsync_accum )
595 {
596 unsigned char val01, val02, val03, val04;
597 unsigned char val11, val12, val13, val14;
598
599 unsigned char h_lock;
600 unsigned int val_1;
601 unsigned int val_2;
602 unsigned int val_result;
603
604 gpio_i2c_write(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xFF, 0x00);
605 h_lock = (gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xE2) >> vin_hsync_accum->ch) & 0x1;
606
607 vin_hsync_accum->h_lock = h_lock;
608
609 gpio_i2c_write(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xFF, 0x13);
610 gpio_i2c_write(nvp6158_iic_addr[vin_hsync_accum->devnum], 0x2B, vin_hsync_accum->ch);
611
612
613 gpio_i2c_write(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xFF, 0x13); /* + vin_sam_val->ch */
614
615 //B13 0xB4 [ 7:0] Hsync Accumulation Value
616 val01 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD0); // 170214 0xB4 -> 0xD0 Fix
617 //B13 0xB5 [15:8] Hsync Accumulation Value
618 val02 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD1); // 170214 0xB5 -> 0xD1 Fix
619 //B13 0xB6 [23:16] Hsync Accumulation Value
620 val03 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD2); // 170214 0xB6 -> 0xD2 Fix
621 //B13 0xB7 [31:24] Hsync Accumulation Value
622 val04 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD3); // 170214 0xB7 -> 0xD3 Fix
623
624 //B13 0xB4 [ 7:0] Hsync Accumulation Value
625 val11 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD4); // 170214 0xB8 -> 0xD4 Fix
626 //B13 0xB5 [15:8] Hsync Accumulation Value
627 val12 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD5); // 170214 0xB9 -> 0xD5 Fix
628 //B13 0xB6 [23:16] Hsync Accumulation Value
629 val13 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD6); // 170214 0xBA -> 0xD6 Fix
630 //B13 0xB7 [31:24] Hsync Accumulation Value
631 val14 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD7); // 170214 0xBB -> 0xD7 Fix
632
633 val_1 = ((val04 << 24) | (val03 << 16) | (val02 << 8) | val01);
634 val_2 = ((val14 << 24) | (val13 << 16) | (val12 << 8) | val11);
635
636 val_result = val_1 - val_2;
637
638 vin_hsync_accum->hsync_accum_val1 = val_1;
639 vin_hsync_accum->hsync_accum_val2 = val_2;
640 vin_hsync_accum->hsync_accum_result = val_result;
641 }
642
nvp6168_get_eq_read_cnt(unsigned char devnum,unsigned char ch)643 static int nvp6168_get_eq_read_cnt(unsigned char devnum, unsigned char ch)
644 {
645 unsigned char vfc;
646 int ret = 50;
647
648 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05 + ch);
649 vfc = gpio_i2c_read(nvp6158_iic_addr[devnum], 0xF0);
650
651 switch(vfc)
652 {
653 // 25fps, 3frame=120ms
654 case 0x10 :
655 case 0x21 :
656 case 0x26 :
657 case 0x2A :
658 case 0x2C :
659 case 0x31 :
660 case 0x34 :
661 case 0x36 :
662 case 0x41 :
663 case 0x51 :
664 case 0x55 :
665 case 0x58 :
666 case 0x61 :
667 case 0xA1 :
668 case 0xA5 :
669 ret = 24;
670 break;
671
672 // 30fps, 3frame=100ms
673 case 0x00 :
674 case 0x20 :
675 case 0x25 :
676 case 0x29 :
677 case 0x2B :
678 case 0x30 :
679 case 0x33 :
680 case 0x35 :
681 case 0x40 :
682 case 0x50 :
683 case 0x54 :
684 case 0x57 :
685 case 0x60 :
686 case 0xA0 :
687 case 0xA4 :
688 ret = 20;
689 break;
690
691 // 50fps, 3frame=60ms
692 case 0x23 :
693 case 0x28 :
694 case 0x2E :
695 case 0x39 :
696 case 0x3B :
697 case 0xA3 :
698 case 0xA7 :
699 ret = 12;
700 break;
701
702 // 60fps, 3frame=50ms
703 case 0x22 :
704 case 0x27 :
705 case 0x2D :
706 case 0x38 :
707 case 0x3A :
708 case 0xA2 :
709 case 0xA6 :
710 ret = 10;
711 break;
712
713 // 20fps, 3frame=150ms
714 case 0x70 :
715 case 0x72 :
716 case 0x74 :
717 ret = 30;
718 break;
719
720 // 18fps, 3frame=167ms
721 case 0x42 :
722 case 0x44 :
723 case 0x90 :
724 ret = 34;
725 break;
726
727 // 15fps, 3frame=200ms
728 case 0x3C :
729 case 0x52 :
730 case 0x59 :
731 case 0x80 :
732 case 0x83 :
733 case 0x85 :
734 ret = 40;
735 break;
736
737 // 12.5fps, 3frame=240ms
738 case 0x3D :
739 case 0x71 :
740 case 0x73 :
741 case 0x82 :
742 case 0x84 :
743 case 0x86 :
744 ret = 48;
745 break;
746
747 // 7.5fps, 3frame=400ms
748 case 0x81 :
749 ret = 80;
750 break;
751
752 default :
753 break;
754 }
755
756 return ret;
757 }
758
nvp6168_video_input_hsync_accum_read(video_input_hsync_accum * vin_hsync_accum)759 void nvp6168_video_input_hsync_accum_read(video_input_hsync_accum *vin_hsync_accum )
760 {
761 unsigned char val01, val02, val03, val04;
762 unsigned char val11, val12, val13, val14;
763
764 unsigned int val_1 = 0;
765 unsigned int val_2 = 0;
766 unsigned int val_result;
767
768 static unsigned int pre_val_1;
769 static unsigned int pre_val_2;
770
771 unsigned char rst_reg = 1<<vin_hsync_accum->ch;
772 unsigned char vfc, video_loss;
773 int read_cnt=0, total_cnt;
774 video_input_novid s_auto_novid;
775
776 total_cnt = nvp6168_get_eq_read_cnt(vin_hsync_accum->devnum, vin_hsync_accum->ch);
777
778 gpio_i2c_write(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xFF, 0x13);
779 gpio_i2c_write(nvp6158_iic_addr[vin_hsync_accum->devnum], 0x2B, vin_hsync_accum->ch);
780
781 while(read_cnt < total_cnt) {
782 gpio_i2c_write(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xFF, 0x00);
783 video_loss = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xA8);
784 video_loss = (((video_loss >> vin_hsync_accum->ch) & 0x1)) ;
785
786 gpio_i2c_write(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xFF, 0x05 + vin_hsync_accum->ch);
787 vfc = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xF0);
788
789 if((video_loss == 1) && (vfc == 0xFF)) {
790 printk("[%s] CH:%d, video_loss:%02X, vfc:0x%X \r\n", __func__,
791 vin_hsync_accum->ch, video_loss, vfc);
792 vin_hsync_accum->hsync_accum_val1 = 0;
793 vin_hsync_accum->hsync_accum_val2 = 0;
794 vin_hsync_accum->hsync_accum_result = 0xffffffff;
795 s_auto_novid.ch = vin_hsync_accum->ch;
796 s_auto_novid.devnum = vin_hsync_accum->devnum;
797 nvp6168_video_input_no_video_set(&s_auto_novid);
798 return;
799 }
800
801 gpio_i2c_write(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xFF, 0x13);
802 //B13 0xB4 [ 7:0] Hsync Accumulation Value
803 val01 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD0); // 170214 0xB4 -> 0xD0 Fix
804 //B13 0xB5 [15:8] Hsync Accumulation Value
805 val02 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD1); // 170214 0xB5 -> 0xD1 Fix
806 //B13 0xB6 [23:16] Hsync Accumulation Value
807 val03 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD2); // 170214 0xB6 -> 0xD2 Fix
808 //B13 0xB7 [31:24] Hsync Accumulation Value
809 val04 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD3); // 170214 0xB7 -> 0xD3 Fix
810
811 //B13 0xB4 [ 7:0] Hsync Accumulation Value
812 val11 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD4); // 170214 0xB8 -> 0xD4 Fix
813 //B13 0xB5 [15:8] Hsync Accumulation Value
814 val12 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD5); // 170214 0xB9 -> 0xD5 Fix
815 //B13 0xB6 [23:16] Hsync Accumulation Value
816 val13 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD6); // 170214 0xBA -> 0xD6 Fix
817 //B13 0xB7 [31:24] Hsync Accumulation Value
818 val14 = gpio_i2c_read(nvp6158_iic_addr[vin_hsync_accum->devnum], 0xD7); // 170214 0xBB -> 0xD7 Fix
819
820 val_1 = ((val04 << 24) | (val03 << 16) | (val02 << 8) | val01);
821 val_2 = ((val14 << 24) | (val13 << 16) | (val12 << 8) | val11);
822
823 //printk("[%s] CH:%d, video_loss:%02X, vfc:0x%X val1:%08X / val2:%08X \r\n", __func__, vin_hsync_accum->ch, video_loss, vfc, val_1, val_2);
824
825 if((val_1 != 0) && (val_2 != 0)) {
826 if((pre_val_1 != val_1) || (pre_val_2 != val_2)) {
827 gpio_i2c_write(nvp6158_iic_addr[vin_hsync_accum->devnum], 0x7A, rst_reg);
828 gpio_i2c_write(nvp6158_iic_addr[vin_hsync_accum->devnum], 0x7A, 0x10);
829 pre_val_1 = val_1;
830 pre_val_2 = val_2;
831 break;
832 }
833 }
834 msleep(10);
835 read_cnt++;
836 }
837 val_result = val_1 - val_2;
838
839 vin_hsync_accum->hsync_accum_val1 = val_1;
840 vin_hsync_accum->hsync_accum_val2 = val_2;
841 vin_hsync_accum->hsync_accum_result = val_result;
842 }
843
nvp6158_video_input_agc_val_read(video_input_agc_val * vin_agc_val)844 void nvp6158_video_input_agc_val_read(video_input_agc_val *vin_agc_val)
845 {
846 unsigned char agc_lock;
847
848 gpio_i2c_write(nvp6158_iic_addr[vin_agc_val->devnum], 0xFF, 0x00);
849 agc_lock = (gpio_i2c_read(nvp6158_iic_addr[vin_agc_val->devnum], 0xE0) >> vin_agc_val->ch) & 0x1;
850
851 vin_agc_val->agc_lock = agc_lock;
852
853 gpio_i2c_write(nvp6158_iic_addr[vin_agc_val->devnum], 0xFF, 0x13);
854 gpio_i2c_write(nvp6158_iic_addr[vin_agc_val->devnum], 0x2B, vin_agc_val->ch);
855
856 gpio_i2c_write(nvp6158_iic_addr[vin_agc_val->devnum], 0xFF, 0x13); /* + vin_sam_val->ch ); */
857
858 //B13 0xB8 [ 7:0] Hsync Accumulation Value
859 vin_agc_val->agc_val = gpio_i2c_read(nvp6158_iic_addr[vin_agc_val->devnum], 0xC4); // 170213 0xA9 -> 0xC5 // 170310 0xC5 -> 0xC4
860 }
861
nvp6158_video_input_fsc_val_read(video_input_fsc_val * vin_fsc_val)862 void nvp6158_video_input_fsc_val_read(video_input_fsc_val *vin_fsc_val)
863 {
864 unsigned char val01, val02, val03, val04;
865 unsigned char val11, val12, val13, val14;
866 unsigned char val21, val22, val23, val24;
867
868 unsigned int val_1, val_2, val_final;
869
870 // Channel Change Sequence
871 gpio_i2c_write(nvp6158_iic_addr[vin_fsc_val->devnum], 0xFF, 0x13);
872 gpio_i2c_write(nvp6158_iic_addr[vin_fsc_val->devnum], 0x2B, vin_fsc_val->ch);
873
874 gpio_i2c_write(nvp6158_iic_addr[vin_fsc_val->devnum], 0xFF, 0x13);
875
876 //B13 0xB4 [ 7:0] r_fsc_line_diff_sts
877 val01 = gpio_i2c_read(nvp6158_iic_addr[vin_fsc_val->devnum], 0xB4);
878 //B13 0xB5 [15:8] r_fsc_line_diff_sts
879 val02 = gpio_i2c_read(nvp6158_iic_addr[vin_fsc_val->devnum], 0xB5);
880 //B13 0xB6 [23:16] r_fsc_line_diff_sts
881 val03 = gpio_i2c_read(nvp6158_iic_addr[vin_fsc_val->devnum], 0xB6);
882 //B13 0xB7 [31:24] r_fsc_line_diff_sts
883 val04 = gpio_i2c_read(nvp6158_iic_addr[vin_fsc_val->devnum], 0xB7);
884
885 //B13 0xB4 [ 7:0] r_fsc_line2_diff_sts
886 val11 = gpio_i2c_read(nvp6158_iic_addr[vin_fsc_val->devnum], 0xB8);
887 //B13 0xB5 [15:8] r_fsc_line2_diff_sts
888 val12 = gpio_i2c_read(nvp6158_iic_addr[vin_fsc_val->devnum], 0xB9);
889 //B13 0xB6 [23:16] r_fsc_line2_diff_sts
890 val13 = gpio_i2c_read(nvp6158_iic_addr[vin_fsc_val->devnum], 0xBA);
891 //B13 0xB7 [31:24] r_fsc_line2_diff_sts
892 val14 = gpio_i2c_read(nvp6158_iic_addr[vin_fsc_val->devnum], 0xBB);
893
894 //B13 0xB4 [ 7:0] r_fsc_line_diff_final
895 val21 = gpio_i2c_read(nvp6158_iic_addr[vin_fsc_val->devnum], 0xBC);
896 //B13 0xB5 [15:8] r_fsc_line_diff_final
897 val22 = gpio_i2c_read(nvp6158_iic_addr[vin_fsc_val->devnum], 0xBD);
898 //B13 0xB6 [23:16] r_fsc_line_diff_final
899 val23 = gpio_i2c_read(nvp6158_iic_addr[vin_fsc_val->devnum], 0xBE);
900 //B13 0xB7 [31:24] r_fsc_line_diff_final
901 val24 = gpio_i2c_read(nvp6158_iic_addr[vin_fsc_val->devnum], 0xBF);
902
903
904 val_1 = ((val04 << 24) | (val03 << 16) | (val02 << 8) | val01);
905 val_2 = ((val14 << 24) | (val13 << 16) | (val12 << 8) | val11);
906 val_final = ((val24 << 24) | (val23 << 16) | (val22 << 8) | val21);
907
908 vin_fsc_val->fsc_val1 = val_1;
909 vin_fsc_val->fsc_val2 = val_2;
910 vin_fsc_val->fsc_final = val_final;
911 }
912
913 // 170420 RAPTOR3 DR2 DEMO ONLY
nvp6158_video_input_aeq_val_set(video_input_aeq_set * vin_aeq_val)914 void nvp6158_video_input_aeq_val_set(video_input_aeq_set *vin_aeq_val) // 170214 aeq value set
915 {
916 // if(vin_aeq_val->aeq_val == 0x00)
917 // {
918 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0xFF, 0x05 + vin_aeq_val->ch);
919 //
920 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x58, 0x03);
921 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x59, 0x00);
922 // }
923 //
924 // else if(vin_aeq_val->aeq_val == 0x02)
925 // {
926 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0xFF, 0x05 + vin_aeq_val->ch);
927 //
928 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x58, 0xD3);
929 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x59, 0x11);
930 // }
931
932 }
933
934 // 170420 RAPTOR3 DR2 DEMO ONLY
nvp6158_video_input_deq_val_set(video_input_deq_set * vin_deq_val)935 void nvp6158_video_input_deq_val_set(video_input_deq_set *vin_deq_val) // 170214 deq value set
936 {
937 // B9 0x80/0xA0/0xC0/0xE0 [3:0]
938 // if(vin_deq_val->deq_val == 0x00)
939 // {
940 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0xFF, 0x09);
941 //
942 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x80 + ((vin_deq_val->ch)*0x20), 0x00);
943 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x84 + ((vin_deq_val->ch)*0x20), 0x21);
944 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x85 + ((vin_deq_val->ch)*0x20), 0x60);
945 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x86 + ((vin_deq_val->ch)*0x20), 0xF6);
946 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x87 + ((vin_deq_val->ch)*0x20), 0x20);
947 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x88 + ((vin_deq_val->ch)*0x20), 0x00);
948 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x89 + ((vin_deq_val->ch)*0x20), 0xDC);
949 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x8a + ((vin_deq_val->ch)*0x20), 0x02);
950 //
951 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0xFF, 0x00);
952 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x30, 0x18);
953 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x3C, 0x90);
954 // }
955 // else if(vin_deq_val->deq_val == 0x02)
956 // {
957 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0xFF, 0x09);
958 //
959 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x80 + ((vin_deq_val->ch)*0x20), 0xA7);
960 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x84 + ((vin_deq_val->ch)*0x20), 0x21);
961 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x85 + ((vin_deq_val->ch)*0x20), 0x60);
962 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x86 + ((vin_deq_val->ch)*0x20), 0xF6);
963 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x87 + ((vin_deq_val->ch)*0x20), 0x20);
964 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x88 + ((vin_deq_val->ch)*0x20), 0x00);
965 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x89 + ((vin_deq_val->ch)*0x20), 0xDC);
966 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x8a + ((vin_deq_val->ch)*0x20), 0x02);
967 //
968 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0xFF, 0x00);
969 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x30, 0x16);
970 // }
971
972 // val = gpio_i2c_read(nvp6158_iic_addr[chip_num], 0x80 + ((vin_deq_val->ch)*0x20));
973 // val = (vin_deq_val->deq_val & 0xF) | val;
974 //
975 // gpio_i2c_write(nvp6158_iic_addr[chip_num], 0x80 + ((vin_deq_val->ch)*0x20), val);
976 }
977
nvp6158_video_input_acc_gain_val_read(video_input_acc_gain_val * vin_acc_gain)978 void nvp6158_video_input_acc_gain_val_read(video_input_acc_gain_val *vin_acc_gain) // 170215 acc gain read
979 {
980 unsigned char val1, val2;
981
982 if(vin_acc_gain->func_sel == ACC_GAIN_NORMAL) {
983
984 gpio_i2c_write(nvp6158_iic_addr[vin_acc_gain->devnum], 0xFF, 0x05 + vin_acc_gain->ch);
985
986 val1 = gpio_i2c_read(nvp6158_iic_addr[vin_acc_gain->devnum],0xE2) & 0x7; // B5 0xE2 acc gain [10:8]
987 val2 = gpio_i2c_read(nvp6158_iic_addr[vin_acc_gain->devnum],0xE3); // B5 0xE3 acc gain [7:0]
988 } else if(vin_acc_gain->func_sel == ACC_GAIN_DEBUG) { // DEBUG
989 gpio_i2c_write(nvp6158_iic_addr[vin_acc_gain->devnum], 0xFF, 0x00);
990 val1 = 0;
991 val2 = gpio_i2c_read(nvp6158_iic_addr[vin_acc_gain->devnum],0xD8 + vin_acc_gain->ch); // B13 0xC6 acc gain [9:8]
992 } else {
993 gpio_i2c_write(nvp6158_iic_addr[vin_acc_gain->devnum], 0xFF, 0x05);
994
995 val1 = gpio_i2c_read(nvp6158_iic_addr[vin_acc_gain->devnum],0xE2) & 0x7; // B5 0xE2 acc gain [10:8]
996 val2 = gpio_i2c_read(nvp6158_iic_addr[vin_acc_gain->devnum],0xE3); // B5 0xE3 acc gain [7:0]
997 }
998
999 vin_acc_gain->acc_gain_val = val1 << 8 | val2;
1000 }
1001
nvp6158_video_output_data_out_mode_set(video_output_data_out_mode * vo_data_out_mode)1002 void nvp6158_video_output_data_out_mode_set(video_output_data_out_mode *vo_data_out_mode)
1003 {
1004 unsigned char temp_val = 0x0;
1005
1006 // Show/Hide mode is using register Bank 0 0x7A, 7B
1007 // CH2 CH1 CH4 CH3
1008 // 0x7A [7 : 4][3 : 0] 0x7B [7 : 4][3 : 0]
1009 gpio_i2c_write(nvp6158_iic_addr[vo_data_out_mode->devnum], 0xFF, 0x00);
1010
1011 switch(vo_data_out_mode -> ch) {
1012 case CH1 :
1013 case CH2 : temp_val = gpio_i2c_read(nvp6158_iic_addr[vo_data_out_mode->devnum], 0x7A);
1014 break;
1015 case CH3 :
1016 case CH4 : temp_val = gpio_i2c_read(nvp6158_iic_addr[vo_data_out_mode->devnum], 0x7B);
1017 break;
1018 }
1019
1020 switch(vo_data_out_mode -> ch) {
1021 case CH1 :
1022 case CH3 : temp_val = ((temp_val & 0xF0) | (vo_data_out_mode -> set_val & 0xF));
1023 break;
1024 case CH2 :
1025 case CH4 : temp_val = ((temp_val & 0x0F) | ((vo_data_out_mode -> set_val & 0xF) << 4));
1026 break;
1027 }
1028
1029 // printk("[%s:%s] : %s >>>> temp_val [ %x ]\n", __FILE__, __LINE__, __FUNCTION__,temp_val);
1030 switch(vo_data_out_mode -> ch) {
1031 case CH1 :
1032 case CH2 : gpio_i2c_write(nvp6158_iic_addr[vo_data_out_mode->devnum], 0x7A, temp_val);
1033 break;
1034 case CH3 :
1035 case CH4 : gpio_i2c_write(nvp6158_iic_addr[vo_data_out_mode->devnum], 0x7B, temp_val);
1036 break;
1037 }
1038 }
1039
1040
__nvp6158_IsOver3MRTVideoFormat(decoder_dev_ch_info_s * decoder_info)1041 unsigned char __nvp6158_IsOver3MRTVideoFormat( decoder_dev_ch_info_s *decoder_info )
1042 {
1043 unsigned char ret = 0; //
1044
1045 if((decoder_info->fmt_def == AHD30_3M_30P) ||
1046 (decoder_info->fmt_def == AHD30_3M_25P) ||
1047 (decoder_info->fmt_def == AHD30_4M_30P) ||
1048 (decoder_info->fmt_def == AHD30_4M_25P) ||
1049 (decoder_info->fmt_def == AHD30_5M_20P) ||
1050 (decoder_info->fmt_def == AHD30_5_3M_20P) ||
1051 (decoder_info->fmt_def == AHD30_6M_18P) ||
1052 (decoder_info->fmt_def == AHD30_6M_20P) ||
1053 (decoder_info->fmt_def == AHD30_8M_12_5P) ||
1054 (decoder_info->fmt_def == AHD30_8M_15P) ||
1055 (decoder_info->fmt_def == TVI_4M_30P) ||
1056 (decoder_info->fmt_def == TVI_4M_25P) ||
1057 (decoder_info->fmt_def == TVI_5M_20P) ||
1058 (decoder_info->fmt_def == TVI_8M_12_5P) ||
1059 (decoder_info->fmt_def == TVI_8M_15P) ||
1060 (decoder_info->fmt_def == CVI_4M_25P) ||
1061 (decoder_info->fmt_def == CVI_4M_30P) ||
1062 (decoder_info->fmt_def == CVI_5M_20P) ||
1063 (decoder_info->fmt_def == CVI_8M_15P) ||
1064 (decoder_info->fmt_def == CVI_8M_12_5P)) {
1065 ret = 1;
1066 }
1067 return ret; // 0:Over 3M RT, 1:other formation
1068 }
1069
1070 unsigned char nvp6158_s_only_onetime_run[32] = {0, };
nvp6158_video_input_onvideo_set(decoder_dev_ch_info_s * decoder_info)1071 void nvp6158_video_input_onvideo_set(decoder_dev_ch_info_s *decoder_info)
1072 {
1073 unsigned char format_3M_RT;
1074
1075 printk("onvideo_set dev_num[%x] ch_num[%x] fmt_def[%d]",
1076 decoder_info->devnum, decoder_info->ch, decoder_info->fmt_def);
1077
1078 /* after 09/12 */
1079 format_3M_RT = __nvp6158_IsOver3MRTVideoFormat(decoder_info);
1080
1081 if(format_3M_RT) {
1082 /* DECI_FILTER_ON */
1083 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0xFF, 0x05 + decoder_info->ch);
1084 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0x50, 0x76);
1085 } else {
1086 /* DECI_FILTER_OFF */
1087 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0xFF, 0x05 + decoder_info->ch);
1088 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0x50, 0xc6);
1089 }
1090
1091
1092 if(decoder_info->fmt_def == CVI_HD_30P || decoder_info->fmt_def == CVI_HD_30P_EX ||
1093 decoder_info->fmt_def == AHD20_720P_30P || decoder_info->fmt_def == AHD20_720P_30P_EX ||
1094 decoder_info->fmt_def == AHD20_720P_30P_EX_Btype) {
1095 //meant to remove pre-connection issue. 07.31
1096 if( nvp6158_s_only_onetime_run[decoder_info->ch + 4 * decoder_info->devnum] == 0) {
1097 nvp6158_video_input_vafe_reset(decoder_info);
1098 nvp6158_s_only_onetime_run[decoder_info->ch + 4 * decoder_info->devnum] = 1;
1099 }
1100 } else {
1101 if( nvp6158_s_only_onetime_run[decoder_info->ch + 4 * decoder_info->devnum] == 0) {
1102 nvp6158_s_only_onetime_run[decoder_info->ch + 4 * decoder_info->devnum] = 1;
1103 }
1104 }
1105 }
1106
nvp6168_video_input_onvideo_set(decoder_dev_ch_info_s * decoder_info)1107 void nvp6168_video_input_onvideo_set(decoder_dev_ch_info_s *decoder_info)
1108 {
1109 // unsigned char format_3M_RT;
1110 unsigned char ch = decoder_info->ch % 4;
1111 unsigned char devnum = decoder_info->devnum;
1112 unsigned char val_9x44;
1113 #ifndef _NVP6168_USE_MANUAL_MODE_
1114 unsigned char set_done=0xF0;
1115 #endif
1116 printk("onvideo_set dev_num[%x] ch_num[%x] fmt_def[%d]",
1117 decoder_info->devnum, decoder_info->ch, decoder_info->fmt_def);
1118
1119 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x09);
1120 val_9x44 = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x44);
1121 val_9x44 &= ~(1 << ch);
1122 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x44, val_9x44);
1123
1124 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x50 + (ch*4) , 0x30);
1125 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x51 + (ch*4) , 0x6F);
1126 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x52 + (ch*4) , 0x67);
1127 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x53 + (ch*4) , 0x48);
1128
1129 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x11);
1130 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x00 + (ch*0x20), 0x00);
1131 #ifndef _NVP6168_USE_MANUAL_MODE_
1132 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1133 set_done |= gpio_i2c_read(nvp6158_iic_addr[devnum], 0x70);
1134 set_done |= (1<<ch);
1135 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x70, set_done);
1136
1137 set_done = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x71);
1138 set_done |= (1<<ch);
1139 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x71, set_done);
1140 #endif
1141 }
1142
nvp6158_video_input_onvideo_check_data(video_input_vfc * vin_vfc)1143 void nvp6158_video_input_onvideo_check_data(video_input_vfc *vin_vfc)
1144 {
1145 unsigned char val_5678xF0;
1146 gpio_i2c_write(nvp6158_iic_addr[vin_vfc->devnum], 0xFF, 0x05 + vin_vfc->ch);
1147 val_5678xF0 = gpio_i2c_read(nvp6158_iic_addr[vin_vfc->devnum], 0xF0);
1148 vin_vfc->vfc = val_5678xF0;
1149 }
1150
nvp6158_video_input_auto_ch_sw_rst(decoder_dev_ch_info_s * decoder_info)1151 void nvp6158_video_input_auto_ch_sw_rst(decoder_dev_ch_info_s *decoder_info)
1152 {
1153 unsigned char val_1x97;
1154 //Software Reset
1155 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0xFF,0x01);
1156 val_1x97 = gpio_i2c_read(nvp6158_iic_addr[decoder_info->devnum], 0x97);
1157 val_1x97 &= ~(1 << decoder_info->ch);
1158 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0x97, val_1x97);
1159 msleep(10);
1160 val_1x97 = gpio_i2c_read(nvp6158_iic_addr[decoder_info->devnum], 0x97);
1161 val_1x97 |= (1 << decoder_info->ch);
1162 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0x97, val_1x97);
1163
1164 printk("[DRV] Decoder CH[%d] Software Reset done\n",decoder_info->ch);
1165 }
1166
nvp6158_video_input_vafe_reset(decoder_dev_ch_info_s * decoder_info)1167 void nvp6158_video_input_vafe_reset(decoder_dev_ch_info_s *decoder_info)
1168 {
1169 unsigned char val_0x00;
1170 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0xFF, 0x00);
1171 val_0x00 = gpio_i2c_read(nvp6158_iic_addr[decoder_info->devnum], 0x00 + decoder_info->ch);
1172 _SET_BIT(val_0x00, 0);
1173 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0x00 + decoder_info->ch, val_0x00);
1174 msleep(10);
1175 _CLE_BIT(val_0x00, 0);
1176 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0x00 + decoder_info->ch, val_0x00);
1177 printk("[DRV] AFE CH:[%d] Reset done\n", decoder_info->ch);
1178 }
1179
nvp6158_video_input_manual_agc_stable_endi(decoder_dev_ch_info_s * decoder_info,int endi)1180 void nvp6158_video_input_manual_agc_stable_endi(decoder_dev_ch_info_s *decoder_info, int endi)
1181 {
1182 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0xFF, 0x05+decoder_info->ch);
1183 if( endi == 1 ) {
1184 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0x82, 0xff);
1185 printk("[DRV] MANUAL AGC STABLE ENABLE CH:[%d]\n", decoder_info->ch);
1186 } else {
1187 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0x82, 0x00);
1188 printk("[DRV] MANUAL AGC STABLE ENABLE CH:[%d]\n", decoder_info->ch);
1189 }
1190 }
1191
nvp6158_video_input_vafe_control(decoder_dev_ch_info_s * decoder_info,int cmd)1192 void nvp6158_video_input_vafe_control(decoder_dev_ch_info_s *decoder_info, int cmd)
1193 {
1194 unsigned char val_0x00;
1195
1196 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0xFF, 0x00);
1197
1198 if(cmd == 0) {
1199 val_0x00 = gpio_i2c_read(nvp6158_iic_addr[decoder_info->devnum], 0x00 + decoder_info->ch);
1200 _SET_BIT(val_0x00, 0);
1201 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0x00 + decoder_info->ch, val_0x00);
1202
1203 printk("[DRV] [Ch:%d] AFE Power Down ... \n", decoder_info->ch);
1204
1205 msleep(10);
1206 } else if(cmd == 1) {
1207 val_0x00 = gpio_i2c_read(nvp6158_iic_addr[decoder_info->devnum], 0x00 + decoder_info->ch);
1208 _CLE_BIT(val_0x00, 0);
1209 gpio_i2c_write(nvp6158_iic_addr[decoder_info->devnum], 0x00 + decoder_info->ch, val_0x00);
1210
1211 printk("[DRV] [Ch:%d] AFE Power Up ... \n", decoder_info->ch);
1212
1213 msleep(10);
1214 }
1215 }
1216
__nvp6158_s_max_min_exclude_avg_func(unsigned int * input_arry,int cnt)1217 static __maybe_unused unsigned int __nvp6158_s_max_min_exclude_avg_func(unsigned int* input_arry, int cnt)
1218 {
1219 unsigned int max, min, sum = 0, result = 0;
1220 unsigned int ii;
1221
1222 max = input_arry[0];
1223 min = input_arry[0];
1224
1225 for(ii = 0; ii < cnt; ii++) {
1226 max = max > input_arry[ii] ? max : input_arry[ii];
1227 min = min > input_arry[ii] ? input_arry[ii] : min;
1228
1229 sum += input_arry[ii];
1230 }
1231
1232 result = sum - (max + min);
1233
1234 if(result == 0) {
1235 return 0;
1236 } else {
1237 result /= ( cnt - 2 );
1238 }
1239
1240 return result;
1241 }
1242
__nvp6158_s_distinguish_5M_ahd_tvi_func(unsigned int * input_arry,int cnt)1243 static unsigned int __nvp6158_s_distinguish_5M_ahd_tvi_func(unsigned int* input_arry, int cnt)
1244 {
1245 unsigned int chk1, chk2;
1246 unsigned int max, max_idx = 0;
1247 unsigned int calc_array[10][10] = { {0, 0}, };
1248 unsigned int need_update = 0;
1249 unsigned int find_idx = 0;
1250 unsigned int ii, ij;
1251 unsigned int inner_idx = 0;
1252
1253 chk1 = input_arry[0];
1254
1255 for(ii = 0; ii < cnt; ii++) {
1256 chk2 = input_arry[ii];
1257
1258 if( chk1 == chk2) {
1259 calc_array[0][inner_idx] += 1;
1260 calc_array[1][inner_idx] = chk1;
1261 } else if( chk1 != chk2 ) {
1262 for(ij = 0; ij < ii; ij++) {
1263 if( calc_array[1][ij] == chk2 ) {
1264 find_idx = ij;
1265 calc_array[0][find_idx] += 1;
1266 calc_array[1][find_idx] = chk2;
1267 need_update = 0;
1268 break;
1269 }
1270 need_update = 1;
1271 }
1272
1273 if(need_update) {
1274 inner_idx += 1;
1275 calc_array[0][inner_idx] += 1;
1276 calc_array[1][inner_idx] = chk2;
1277 }
1278 }
1279 chk1 = chk2;
1280 }
1281
1282 max = calc_array[0][0];
1283
1284 for(ii = 0; ii < cnt; ii++) {
1285 if( max < calc_array[0][ii] ) {
1286 max_idx = ii;
1287 max = calc_array[0][ii];
1288 }
1289 }
1290
1291
1292 for(ii = 0; ii < cnt; ii++) {
1293 printk("[DRV] [ idx %d ] [ num %d ] [ val %x ]\n", ii, calc_array[0][ii], calc_array[1][ii]);
1294 }
1295
1296 printk("[DRV] [ max_idx : %d ]\n", max_idx);
1297 printk("[DRV] [ inner_idx : %d ]\n", inner_idx);
1298
1299 return calc_array[1][max_idx];
1300 }
1301
1302
nvp6158_video_input_ahd_tvi_distinguish(decoder_dev_ch_info_s * decoder_info)1303 void nvp6158_video_input_ahd_tvi_distinguish(decoder_dev_ch_info_s *decoder_info)
1304 {
1305 unsigned char ch = decoder_info->ch;
1306 unsigned char devnum = decoder_info->devnum;
1307 unsigned char fmtdef = decoder_info->fmt_def;
1308 unsigned char ii;
1309 unsigned int check_point;
1310
1311 unsigned char check_time = 10;
1312
1313
1314 #if 1
1315 unsigned int B5xF5_F4[10];
1316
1317 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05 + ch);
1318
1319 for(ii = 0; ii < check_time; ii++) {
1320 msleep(100);
1321 B5xF5_F4[ii] = ( gpio_i2c_read(nvp6158_iic_addr[devnum], 0xF5) << 8 ) |
1322 gpio_i2c_read(nvp6158_iic_addr[devnum], 0xF4);
1323 printk("[DRV] [Ch:%d] %d time B5xF3_F4 : %x \n", ch, ii, B5xF5_F4[ii]);
1324 }
1325
1326 check_point = __nvp6158_s_distinguish_5M_ahd_tvi_func( B5xF5_F4, check_time );
1327
1328 if( fmtdef == AHD30_5M_20P ) {
1329 if( ( check_point & 0xfff ) == 0x7c2) {
1330 decoder_info->fmt_def = TVI_5M_20P;
1331 printk("[DRV] [Ch:%d] Get Format : AHD 5M 20P, Change Format : TVI 5M 20P\n", decoder_info->ch);
1332 } else if( ( check_point & 0xfff ) == 0x7c4) {
1333 decoder_info->fmt_def = CVI_5M_20P;
1334 printk("[DRV] [Ch:%d] Get Format : AHD 5M 20P, Change Format : CVI 5M 20P\n", decoder_info->ch);
1335 } else {
1336
1337 printk("[DRV] [Ch:%d] Get Format : AHD 5M 20P, Not Change Format\n", decoder_info->ch);
1338 }
1339 } else if( fmtdef == 0x2B) {
1340 if( ( check_point & 0xfff ) >= 0x673) {
1341 decoder_info->fmt_def = TVI_4M_15P;
1342 printk("[DRV] [Ch:%d] Get Format : AHD 4M15P #0P, Change Format : TVI 4M 15P\n", decoder_info->ch);
1343 }
1344 } else {
1345 decoder_info->fmt_def = fmtdef;
1346 }
1347
1348
1349 #else
1350 unsigned int B5xE8_E9[10] = {0, };
1351 unsigned int B5xEA_EB[10] = {0, };
1352
1353 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05 + ch);
1354
1355
1356 for(ii = 0; ii < check_time; ii++)
1357 {
1358 msleep(10);
1359 B5xE8_E9[ii] = ( gpio_i2c_read(nvp6158_iic_addr[devnum], 0xE8) << 8 ) | gpio_i2c_read(nvp6158_iic_addr[devnum], 0xE9);
1360 B5xEA_EB[ii] = ( gpio_i2c_read(nvp6158_iic_addr[devnum], 0xEA) << 8 ) | gpio_i2c_read(nvp6158_iic_addr[devnum], 0xEB);
1361 printk("[DRV] [Ch:%d] %d time 0xE8_0xE9 : %x \n", decoder_info->ch, ii, B5xE8_E9[ii]);
1362 printk("[DRV] [Ch:%d] %d time 0xEA_0xEB : %x \n", decoder_info->ch, ii, B5xEA_EB[ii]);
1363 }
1364
1365 check_point1 = __nvp6158_s_max_min_exclude_avg_func( B5xE8_E9, check_time );
1366 check_point2 = __nvp6158_s_max_min_exclude_avg_func( B5xEA_EB, check_time );
1367
1368 printk("[DRV] [Ch:%d] AVG 0xE8_0xE9 : %x \n", decoder_info->ch, check_point1);
1369 printk("[DRV] [Ch:%d] AVG 0xEA_0xEB : %x \n", decoder_info->ch, check_point2);
1370
1371 if( ( check_point1 < 0x30 ) && ( check_point2 < 0x30 ) )
1372 {
1373 if( fmtdef == AHD30_5M_20P )
1374 {
1375 decoder_info->fmt_def = TVI_5M_20P;
1376
1377 printk("[DRV] [Ch:%d] Get Format : AHD 5M 20P, Change Format : TVI 5M 20P\n", decoder_info->ch);
1378 }
1379 else if( fmtdef == AHD30_3M_30P ) /* Not Yet Support , only add item */
1380 {
1381 decoder_info->fmt_def = TVI_4M_15P;
1382
1383 printk("[DRV] [Ch:%d] Get Format : AHD 3M #0P, Change Format : TVI 4M 15P\n", decoder_info->ch);
1384 }
1385 else
1386 {
1387 decoder_info->fmt_def = fmtdef;
1388 }
1389 }
1390 else
1391 {
1392 decoder_info->fmt_def = fmtdef;
1393 }
1394 #endif
1395 }
1396
nvp6168_video_input_cvi_tvi_5M20p_distinguish(decoder_dev_ch_info_s * decoder_info)1397 void nvp6168_video_input_cvi_tvi_5M20p_distinguish(decoder_dev_ch_info_s *decoder_info)
1398 {
1399 unsigned char ch = decoder_info->ch;
1400 unsigned char devnum = decoder_info->devnum;
1401 // unsigned char fmtdef = decoder_info->fmt_def;
1402 unsigned char ii;
1403 unsigned int check_point;
1404
1405 unsigned char check_time = 10;
1406
1407
1408 unsigned int B5xF5_F4[10];
1409
1410 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05 + ch);
1411
1412 for(ii = 0; ii < check_time; ii++) {
1413 msleep(100);
1414 B5xF5_F4[ii] = ( gpio_i2c_read(nvp6158_iic_addr[devnum], 0xF5) << 8 ) |
1415 gpio_i2c_read(nvp6158_iic_addr[devnum], 0xF4);
1416 printk("[DRV] [Ch:%d] %d time B5xF3_F4 : %x \n", ch, ii, B5xF5_F4[ii]);
1417 }
1418
1419 check_point = __nvp6158_s_distinguish_5M_ahd_tvi_func( B5xF5_F4, check_time );
1420
1421 if( ( check_point & 0xfff ) == 0x7c4) {
1422 decoder_info->fmt_def = CVI_5M_20P;
1423 printk("[DRV] [Ch:%d] Get Format : AHD 5M 20P, Change Format : CVI 5M 20P\n", decoder_info->ch);
1424 } else {
1425
1426 decoder_info->fmt_def = TVI_5M_20P;
1427 printk("[DRV] [Ch:%d] Get Format : AHD 5M 20P, Change Format : TVI 5M 20P\n", decoder_info->ch);
1428 }
1429
1430 }
1431
1432
__nvp6158_s_distinguish_8M_cvi_tvi_func(unsigned int * input_arry,int cnt)1433 static unsigned int __nvp6158_s_distinguish_8M_cvi_tvi_func(unsigned int* input_arry, int cnt)
1434 {
1435 unsigned int chk1, chk2;
1436 unsigned int max, max_idx = 0;
1437 unsigned int calc_array[10][10] = { {0, 0}, };
1438 unsigned int need_update = 0;
1439 unsigned int find_idx = 0;
1440 unsigned int ii, ij;
1441 unsigned int inner_idx = 0;
1442
1443 chk1 = input_arry[0];
1444
1445 for(ii = 0; ii < cnt; ii++) {
1446 chk2 = input_arry[ii];
1447
1448 if( chk1 == chk2) {
1449 calc_array[0][inner_idx] += 1;
1450 calc_array[1][inner_idx] = chk1;
1451 } else if( chk1 != chk2 ) {
1452 for(ij = 0; ij < ii; ij++) {
1453 if( calc_array[1][ij] == chk2 ) {
1454 find_idx = ij;
1455 calc_array[0][find_idx] += 1;
1456 calc_array[1][find_idx] = chk2;
1457 need_update = 0;
1458 break;
1459 }
1460 need_update = 1;
1461 }
1462
1463 if(need_update) {
1464 inner_idx += 1;
1465 calc_array[0][inner_idx] += 1;
1466 calc_array[1][inner_idx] = chk2;
1467 }
1468 }
1469 chk1 = chk2;
1470 }
1471
1472 max = calc_array[0][0];
1473
1474 for(ii = 0; ii < cnt; ii++) {
1475 if( max < calc_array[0][ii] ) {
1476 max_idx = ii;
1477 max = calc_array[0][ii];
1478 }
1479 }
1480
1481
1482 for(ii = 0; ii < cnt; ii++) {
1483 printk("[DRV] [ idx %d ] [ num %d ] [ val %x ]\n", ii, calc_array[0][ii], calc_array[1][ii]);
1484 }
1485
1486 printk("[DRV] [ max_idx : %d ]\n", max_idx);
1487 printk("[DRV] [ inner_idx : %d ]\n", inner_idx);
1488
1489 return calc_array[1][max_idx];
1490 }
1491
1492
nvp6158_video_input_cvi_tvi_distinguish(decoder_dev_ch_info_s * decoder_info)1493 int nvp6158_video_input_cvi_tvi_distinguish(decoder_dev_ch_info_s *decoder_info)
1494 {
1495 unsigned char ch = decoder_info->ch;
1496 unsigned char devnum = decoder_info->devnum;
1497 unsigned char fmtdef = decoder_info->fmt_def;
1498 unsigned char ii;
1499 unsigned int check_point;
1500
1501 unsigned char check_time = 10;
1502
1503 unsigned int B13xAB[10], B13xAB_zerocnt=0;
1504
1505 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1506 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x2B, ch % 4 );
1507
1508 for(ii = 0; ii < check_time; ii++) {
1509 msleep(100);
1510 B13xAB[ii] = gpio_i2c_read(nvp6158_iic_addr[devnum], 0xAB);
1511 if(B13xAB[ii] == 0) {
1512 B13xAB_zerocnt ++;
1513 }
1514 printk("[DRV] [Ch:%d] %d time B13xAB : %x \n", ch, ii, B13xAB[ii]);
1515 }
1516
1517 if(B13xAB_zerocnt > 2)
1518 return -1;
1519
1520 check_point = __nvp6158_s_distinguish_8M_cvi_tvi_func( B13xAB, check_time );
1521
1522 if( fmtdef == CVI_8M_15P || fmtdef == CVI_8M_12_5P ) {
1523 if( ( check_point & 0xff ) > 0x1A ) {
1524 if( fmtdef == CVI_8M_12_5P ) {
1525 decoder_info->fmt_def = TVI_8M_12_5P;
1526 printk("[DRV] [Ch:%d] Get Format : CVI 8M 12_5P, Change Format : TVI 8M 12_5P\n", decoder_info->ch);
1527 } else {
1528 decoder_info->fmt_def = TVI_8M_15P;
1529 printk("[DRV] [Ch:%d] Get Format : CVI 8M 15P, Change Format : TVI 8M 15P\n", decoder_info->ch);
1530 }
1531 } else {
1532 printk("[DRV] [Ch:%d] Get Format : CVI 8M, Not Change Format\n", decoder_info->ch);
1533 }
1534 } else {
1535 decoder_info->fmt_def = fmtdef;
1536 }
1537 return 0;
1538 }
1539
__nvp6158_s_distinguish_ahd_nrt_func(unsigned int * input_arry,int cnt)1540 static unsigned int __nvp6158_s_distinguish_ahd_nrt_func(unsigned int* input_arry, int cnt)
1541 {
1542 unsigned int chk1, chk2;
1543 unsigned int max, max_idx = 0;
1544 unsigned int calc_array[10][10] = { {0, 0}, };
1545 unsigned int need_update = 0;
1546 unsigned int find_idx = 0;
1547 unsigned int ii, ij;
1548 unsigned int inner_idx = 0;
1549
1550 chk1 = input_arry[0];
1551
1552 for(ii = 0; ii < cnt; ii++) {
1553 chk2 = input_arry[ii];
1554
1555 if( chk1 == chk2) {
1556 calc_array[0][inner_idx] += 1;
1557 calc_array[1][inner_idx] = chk1;
1558 } else if( chk1 != chk2 ) {
1559 for(ij = 0; ij < ii; ij++) {
1560 if( calc_array[1][ij] == chk2 ) {
1561 find_idx = ij;
1562 calc_array[0][find_idx] += 1;
1563 calc_array[1][find_idx] = chk2;
1564 need_update = 0;
1565 break;
1566 }
1567 need_update = 1;
1568 }
1569
1570 if(need_update) {
1571 inner_idx += 1;
1572 calc_array[0][inner_idx] += 1;
1573 calc_array[1][inner_idx] = chk2;
1574 }
1575 }
1576 chk1 = chk2;
1577 }
1578
1579 max = calc_array[0][0];
1580
1581 for(ii = 0; ii < cnt; ii++) {
1582 if( max < calc_array[0][ii] ) {
1583 max_idx = ii;
1584 max = calc_array[0][ii];
1585 }
1586 }
1587
1588
1589 for(ii = 0; ii < cnt; ii++) {
1590 printk("[DRV] [ idx %d ] [ num %d ] [ val %x ]\n", ii, calc_array[0][ii], calc_array[1][ii]);
1591 }
1592
1593 printk("[DRV] [ max_idx : %d ]\n", max_idx);
1594 printk("[DRV] [ inner_idx : %d ]\n", inner_idx);
1595
1596 return calc_array[1][max_idx];
1597 }
1598
1599
nvp6158_video_input_ahd_nrt_distinguish(decoder_dev_ch_info_s * decoder_info)1600 void nvp6158_video_input_ahd_nrt_distinguish(decoder_dev_ch_info_s *decoder_info)
1601 {
1602 unsigned char ch = decoder_info->ch;
1603 unsigned char devnum = decoder_info->devnum;
1604 unsigned char ii;
1605 unsigned int check_point;
1606
1607 unsigned char check_time = 10;
1608
1609 unsigned int B5xF3[10];
1610
1611 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05 + ch);
1612
1613 for(ii = 0; ii < check_time; ii++) {
1614 msleep(30);
1615 B5xF3[ii] = gpio_i2c_read(nvp6158_iic_addr[devnum], 0xF3);
1616 printk("[DRV] [Ch:%d] %d time B5xF3 : %x \n", ch, ii, B5xF3[ii]);
1617 }
1618
1619 check_point = __nvp6158_s_distinguish_ahd_nrt_func( B5xF3, check_time );
1620
1621 if( ( check_point & 0xff ) == 0x14 ) {
1622 decoder_info->fmt_def = AHD20_1080P_12_5P_EX;
1623 printk("[DRV] [Ch:%d] Get Format : AHD 1080P 12.5P\n", decoder_info->ch);
1624 } else if( ( check_point & 0xff ) == 0x11 ) {
1625 decoder_info->fmt_def = AHD20_1080P_15P_EX;
1626 printk("[DRV] [Ch:%d] Get Format : AHD 1080P 15P\n", decoder_info->ch);
1627 } else {
1628 decoder_info->fmt_def = NC_VIVO_CH_FORMATDEF_UNKNOWN;
1629 printk("[DRV] [Ch:%d] Get Format : Unknown Format \n", decoder_info->ch);
1630 }
1631 }
1632
__nvp6158_s_distinguish_2M_cvi_ahd_func(unsigned int * input_arry,int cnt)1633 static unsigned int __nvp6158_s_distinguish_2M_cvi_ahd_func(unsigned int* input_arry, int cnt)
1634 {
1635 unsigned int chk1, chk2;
1636 unsigned int max, max_idx = 0;
1637 unsigned int calc_array[10][10] = { {0, 0}, };
1638 unsigned int need_update = 0;
1639 unsigned int find_idx = 0;
1640 unsigned int ii, ij;
1641 unsigned int inner_idx = 0;
1642
1643 chk1 = input_arry[0];
1644
1645 for(ii = 0; ii < cnt; ii++) {
1646 chk2 = input_arry[ii];
1647
1648 if( chk1 == chk2) {
1649 calc_array[0][inner_idx] += 1;
1650 calc_array[1][inner_idx] = chk1;
1651 } else if( chk1 != chk2 ) {
1652 for(ij = 0; ij < ii; ij++) {
1653 if( calc_array[1][ij] == chk2 ) {
1654 find_idx = ij;
1655 calc_array[0][find_idx] += 1;
1656 calc_array[1][find_idx] = chk2;
1657 need_update = 0;
1658 break;
1659 }
1660 need_update = 1;
1661 }
1662
1663 if(need_update) {
1664 inner_idx += 1;
1665 calc_array[0][inner_idx] += 1;
1666 calc_array[1][inner_idx] = chk2;
1667 }
1668 }
1669
1670 chk1 = chk2;
1671 }
1672
1673 max = calc_array[0][0];
1674
1675 for(ii = 0; ii < cnt; ii++) {
1676 if( max < calc_array[0][ii] ) {
1677 max_idx = ii;
1678 max = calc_array[0][ii];
1679 }
1680 }
1681
1682
1683 for(ii = 0; ii < cnt; ii++) {
1684 printk("[DRV] [ idx %d ] [ num %d ] [ val %x ]\n", ii, calc_array[0][ii], calc_array[1][ii]);
1685 }
1686
1687 printk("[DRV] [ max_idx : %d ]\n", max_idx);
1688 printk("[DRV] [ inner_idx : %d ]\n", inner_idx);
1689
1690 return calc_array[1][max_idx];
1691 }
1692
1693
nvp6158_video_input_cvi_ahd_1080p_distinguish(decoder_dev_ch_info_s * decoder_info)1694 void nvp6158_video_input_cvi_ahd_1080p_distinguish(decoder_dev_ch_info_s *decoder_info)
1695 {
1696 unsigned char ch = decoder_info->ch;
1697 unsigned char devnum = decoder_info->devnum;
1698 unsigned char fmtdef = decoder_info->fmt_def;
1699 unsigned char ii;
1700 unsigned int check_point;
1701
1702 unsigned char check_time = 10;
1703
1704 unsigned int B13xAB[10];
1705
1706 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1707 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x2B, ch % 4 );
1708
1709 for(ii = 0; ii < check_time; ii++) {
1710 msleep(100);
1711 B13xAB[ii] = gpio_i2c_read(nvp6158_iic_addr[devnum], 0xAB);
1712 printk("[DRV] [Ch:%d] %d time B13xAB : %x \n", ch, ii, B13xAB[ii]);
1713 }
1714
1715 check_point = __nvp6158_s_distinguish_2M_cvi_ahd_func( B13xAB, check_time );
1716
1717 if( fmtdef == CVI_FHD_25P ) {
1718 if( ( check_point & 0xff ) <= 0x09 ) {
1719
1720 decoder_info->fmt_def = AHD20_1080P_25P;
1721 printk("[DRV] [Ch:%d] Get Format : CVI 2M 25P, Change Format : AHD 2M 25P\n", decoder_info->ch);
1722 } else {
1723 printk("[DRV] [Ch:%d] Get Format : CVI 2M, Not Change Format\n", decoder_info->ch);
1724 }
1725 } else {
1726 decoder_info->fmt_def = fmtdef;
1727 }
1728 }
1729
1730
1731