1 // SPDX-License-Identifier: GPL-2.0
2 /********************************************************************************
3 *
4 * Copyright (C) 2017 NEXTCHIP Inc. All rights reserved.
5 * Module : video_auto_detect.c
6 * Description :
7 * Author :
8 * Date :
9 * Version : Version 1.0
10 *
11 ********************************************************************************
12 * History :
13 *
14 *
15 ********************************************************************************/
16 #include <linux/string.h>
17 #include <linux/delay.h>
18 #include "nvp6158_common.h"
19 #include "nvp6158_video_eq.h"
20 #include "nvp6158_video_eq_table.h"
21 #include "nvp6168_eq_table.h"
22 #include "nvp6158_audio.h"
23 #include "nvp6158_video_auto_detect.h"
24
25 extern unsigned int nvp6158_iic_addr[4];
26 extern int nvp6158_chip_id[4];
27
28 /*******************************************************************************
29 * Description : get eq stage(manual)
30 * Argurments : Ch(channel), pDistance(distance structure)
31 * Return value : distance( eq stage)
32 * Modify :
33 * warning :
34 *******************************************************************************/
NVP6158_NC_VD_MANUAL_CABLE_DISTANCE_Get(unsigned char Ch,video_input_cable_dist * pDistance)35 CABLE_DISTANCE NVP6158_NC_VD_MANUAL_CABLE_DISTANCE_Get (unsigned char Ch, video_input_cable_dist *pDistance)
36 {
37 unsigned char sGetDistCnt = 0;
38 unsigned char sGetDist[10] = {0, };
39 unsigned char sMaxGetDistVal;
40 unsigned char sMaxDistVal;
41 unsigned char ii;
42 int sMaxDistCnt;
43
44 if((nvp6158_chip_id[Ch/4] == NVP6168C_R0_ID) || (nvp6158_chip_id[Ch/4] == NVP6168_R0_ID))
45 {
46 sMaxDistCnt = 3;
47 }
48 else
49 {
50 sMaxDistCnt = 10;
51 }
52
53 /* Get Distance 10 Times */
54 while(sGetDistCnt < sMaxDistCnt)
55 {
56 msleep(1);
57
58 //NC_VD_MANUAL_CABLE_DISTANCE_Read(pDistance);
59 if((nvp6158_chip_id[Ch/4] == NVP6168C_R0_ID) || (nvp6158_chip_id[Ch/4] == NVP6168_R0_ID))
60 nvp6168_video_input_cable_manualdist_read(pDistance);
61 else
62 nvp6158_video_input_cable_manualdist_read(pDistance);
63
64 sGetDist[ pDistance->dist ]++;
65
66 sGetDistCnt++;
67 }
68
69 sMaxDistVal = sGetDist[0];
70 sMaxGetDistVal = 0;
71
72 for(ii = 1; ii < 6; ii++)
73 {
74 if( sMaxDistVal < sGetDist[ii] )
75 {
76 sMaxDistVal = sGetDist[ii];
77 sMaxGetDistVal = ii;
78 }
79 }
80
81
82 printk("TESTING... Get Distance Value : ");
83 for(ii = 0; ii < 6; ii++)
84 printk("[ stage: %d _ get_value: %d ]\n", ii, sGetDist[ii]);
85
86 printk(" Distance distinguish result : [%d]\n", sMaxGetDistVal);
87 // return (CABLE_DISTANCE)pDistance->Dist;
88 return sMaxGetDistVal;
89 }
90
91 //0:video on; 1: video loss
nvp6158_IsChAlive(video_equalizer_info_s * ps_eq_info)92 static int nvp6158_IsChAlive(video_equalizer_info_s *ps_eq_info)
93 {
94 unsigned char vloss;
95 unsigned char vloss_ch;
96
97 gpio_i2c_write(nvp6158_iic_addr[ps_eq_info->devnum], 0xFF, 0x00);
98 vloss = gpio_i2c_read(nvp6158_iic_addr[ps_eq_info->devnum], 0xA8);
99 vloss_ch = ((vloss>>ps_eq_info->Ch)&0x01);
100 return vloss_ch;
101 }
102
103 /**************************************************************************************
104 * @desc
105 * Function to read cable distance for EQ setting according to cable distance.(manual)
106 *
107 * @param_in (unsigned char)Ch Video Channel
108 *
109 * @return (CABLE_DISTANCE) 0 Short ( < 2M )
110 * @return 1 100M
111 * @return 2 200M
112 * @return 3 300M
113 * @return 4 400M
114 * @return 5 500M
115 ***************************************************************************************/
116 //CABLE_DISTANCE NC_APP_VD_MANUAL_CABLE_DISTANCE_Get(unsigned char Ch, NC_VIVO_CH_FORMATDEF FmtDef )
nvp6158_get_eq_dist(video_equalizer_info_s * ps_eq_info)117 CABLE_DISTANCE nvp6158_get_eq_dist(video_equalizer_info_s *ps_eq_info)
118 {
119 unsigned int Waiting_AGC_Stable_cnt = 0;
120 unsigned char oChannel = 0;
121 CABLE_DISTANCE Distance=0;
122 unsigned char oMaxTimeCnt = 20;
123
124 video_input_hsync_accum Hsync_Accumulation;
125 video_input_sam_val SAM;
126 video_input_agc_val AGC;
127 NC_VD_AUTO_CABLE_DIST_STR Cable_Distance;
128 video_input_cable_dist sManualDistance;
129
130 unsigned char oDevAddr = 0x00;
131 unsigned int AGC_Stable_Check = 0;
132
133 oChannel = ps_eq_info->Ch;
134 oDevAddr = ps_eq_info->devnum;
135
136 SAM.ch = oChannel;
137 SAM.devnum = oDevAddr;
138 Hsync_Accumulation.ch = oChannel;
139 Hsync_Accumulation.devnum = oDevAddr;
140 AGC.ch = oChannel;
141 AGC.devnum = oDevAddr;
142 Cable_Distance.Ch = oChannel;
143 Cable_Distance.devnum = oDevAddr;
144 if(nvp6158_chip_id[oChannel/4]==NVP6158_R0_ID || nvp6158_chip_id[oChannel/4]==NVP6158C_R0_ID)
145 {
146 while(1)
147 {
148 if(0==nvp6158_IsChAlive(ps_eq_info)) //when camera disconnect during eq caculation.
149 {
150 Distance = 0;
151 ps_eq_info->distance = Distance;
152 return Distance;
153 }
154 msleep(300);
155
156 //NC_VD_AUTO_SAM_Get(oChannel, &SAM);
157 nvp6158_video_input_sam_val_read(&SAM);
158 //NC_VD_AUTO_HSYNC_Get(oChannel, &Hsync_Accumulation);
159 nvp6158_video_input_hsync_accum_read(&Hsync_Accumulation);
160 //NC_VD_AUTO_AGC_Get(oChannel, &AGC);
161 nvp6158_video_input_agc_val_read(&AGC);
162 //NC_VD_AUTO_ACC_GAIN_Get(Ch, ACC_GAIN_NORMAL);
163 //nvp6158_video_input_acc_gain_val_read();
164
165 //AGC_Stable_Check = NC_APP_VD_AGC_STABLE_Check(&Hsync_Accumulation, &AGC, &SAM);
166 AGC_Stable_Check = ((Hsync_Accumulation.hsync_accum_result!=0)&&(SAM.sam_val!=0));
167
168 if(AGC_Stable_Check || Waiting_AGC_Stable_cnt >= oMaxTimeCnt)
169 {
170 /* temp by edward */
171 msleep(500);
172 //NC_VD_AUTO_HSYNC_Get(oChannel, &Hsync_Accumulation);
173 nvp6158_video_input_hsync_accum_read(&Hsync_Accumulation);
174 //NC_VD_AUTO_AGC_Get(oChannel, &AGC);
175 nvp6158_video_input_agc_val_read(&AGC);
176 //NC_VD_AUTO_SAM_Get(oChannel, &SAM);
177 nvp6158_video_input_sam_val_read(&SAM);
178
179 printk("CH:[%d] Hsync 1 : %08x\n", oChannel, Hsync_Accumulation.hsync_accum_val1);
180 printk("CH:[%d] Hsync 2 : %08x\n", oChannel, Hsync_Accumulation.hsync_accum_val2);
181 printk("CH:[%d] Hsync Result : %08x\n", oChannel, Hsync_Accumulation.hsync_accum_result);
182
183 printk("CH:[%d] Waiting for AGC Stable >>> %d\n", oChannel, Waiting_AGC_Stable_cnt + 1);
184
185 if(Waiting_AGC_Stable_cnt >= oMaxTimeCnt)
186 {
187 printk("CH:[%d] AGC Stable Fail\n", oChannel);
188 }
189 else
190 {
191 printk("CH:[%d] AGC Stable Success.\n", oChannel);
192 }
193 Waiting_AGC_Stable_cnt = 0;
194 break;
195 }
196
197 Waiting_AGC_Stable_cnt++;
198 }
199 }
200 /* convert vfc to formatDefine for APP and save videoloss information */
201 sManualDistance.ch = oChannel;
202 sManualDistance.FmtDef = ps_eq_info->FmtDef;
203 sManualDistance.devnum = oDevAddr;
204 sManualDistance.cabletype = 0; // Now, we use coaxial cable(0:coax, 1:utp, 2:reserved1, 3:reserved2
205
206 Distance = NVP6158_NC_VD_MANUAL_CABLE_DISTANCE_Get(oChannel, &sManualDistance);
207 ps_eq_info->distance = Distance;
208 return Distance;
209 }
210
__nvp6158_video_cable_manualdistance(unsigned char cabletype,video_input_hsync_accum * pvin_hsync_accum,video_input_acc_gain_val * pvin_acc_val,nvp6158_video_equalizer_distance_table_s * pdistance_value)211 unsigned char __nvp6158_video_cable_manualdistance( unsigned char cabletype, video_input_hsync_accum *pvin_hsync_accum, video_input_acc_gain_val *pvin_acc_val, nvp6158_video_equalizer_distance_table_s *pdistance_value )
212 {
213 int i = 0;
214 unsigned char distance = 0; /* default : short(0) */
215
216 /* for coaxial */
217 if( cabletype == 0 )
218 {
219 for( i = 0; i < 6; i++ )
220 {
221 if( (pvin_hsync_accum->hsync_accum_result > pdistance_value->hsync_stage.hsync_stage[i]) )
222 {
223 distance = i;
224 break;
225 }
226
227 }
228 if( i == 6 )
229 {
230 distance = 5;
231 }
232 }
233
234 if( pvin_hsync_accum->hsync_accum_result == 0 )
235 {
236 distance = 0; /* set default value(short:0) */
237 }
238
239 printk(">>>>> DRV[%s:%d] CH:%d, distance:%d\n", __func__, __LINE__, pvin_hsync_accum->ch, distance );
240
241 return distance;
242 }
243
__nvp6158_eq_base_set_value(video_equalizer_info_s * pvin_eq_set,video_equalizer_base_s * pbase)244 void __nvp6158_eq_base_set_value( video_equalizer_info_s *pvin_eq_set, video_equalizer_base_s *pbase )
245 {
246 unsigned char devnum = pvin_eq_set->devnum;
247 unsigned char ch = pvin_eq_set->Ch;
248 unsigned char dist = pvin_eq_set->distance;
249
250 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05 + ch );
251 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x01, pbase->eq_bypass[dist] );
252 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x58, pbase->eq_band_sel[dist] );
253 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5C, pbase->eq_gain_sel[dist] );
254
255 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xff, (ch < 2 ? 0x0a : 0x0b) );
256 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x3d + (ch%2 * 0x80), pbase->deq_a_on[dist] );
257 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x3c + (ch%2 * 0x80), pbase->deq_a_sel[dist] );
258
259 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x09 );
260 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x80 + (ch * 0x20), pbase->deq_b_sel[dist] );
261
262 #if 0 //test
263 printk("ch[%d]: BASE, dist:%d, eq_bypass[%02x]\n", ch, dist, pbase->eq_bypass[dist] );
264 printk("ch[%d]: BASE, dist:%d, eq_band_sel[%02x]\n", ch, dist, pbase->eq_band_sel[dist] );
265 printk("ch[%d]: BASE, dist:%d, eq_gain_sel[%02x]\n", ch, dist, pbase->eq_gain_sel[dist] );
266 printk("ch[%d]: BASE, dist:%d, deq_a_on[%02x]\n", ch, dist, pbase->deq_a_on[dist] );
267 printk("ch[%d]: BASE, dist:%d, deq_a_sel[%02x]\n", ch, dist, pbase->deq_a_sel[dist] );
268 printk("ch[%d]: BASE, dist:%d, deq_b_sel[%02x]\n", ch, dist, pbase->deq_b_sel[dist] );
269 #endif
270 }
271
__nvp6158_eq_coeff_set_value(video_equalizer_info_s * pvin_eq_set,video_equalizer_coeff_s * pcoeff)272 void __nvp6158_eq_coeff_set_value( video_equalizer_info_s *pvin_eq_set, video_equalizer_coeff_s *pcoeff )
273 {
274 unsigned char devnum = pvin_eq_set->devnum;
275 unsigned char ch = pvin_eq_set->Ch;
276 unsigned char dist = pvin_eq_set->distance;
277
278 // unsigned char val_0x30;
279 // unsigned char val_0x31;
280 // unsigned char val_0x32;
281
282 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xff, (ch < 2 ? 0x0a : 0x0b) );
283 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + (ch%2 * 0x80), pcoeff->deqA_01[dist] );
284 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x31 + (ch%2 * 0x80), pcoeff->deqA_02[dist] );
285 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x32 + (ch%2 * 0x80), pcoeff->deqA_03[dist] );
286 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x33 + (ch%2 * 0x80), pcoeff->deqA_04[dist] );
287 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + (ch%2 * 0x80), pcoeff->deqA_05[dist] );
288 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x35 + (ch%2 * 0x80), pcoeff->deqA_06[dist] );
289 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x36 + (ch%2 * 0x80), pcoeff->deqA_07[dist] );
290 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x37 + (ch%2 * 0x80), pcoeff->deqA_08[dist] );
291 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x38 + (ch%2 * 0x80), pcoeff->deqA_09[dist] );
292 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x39 + (ch%2 * 0x80), pcoeff->deqA_10[dist] );
293 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x3a + (ch%2 * 0x80), pcoeff->deqA_11[dist] );
294 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x3b + (ch%2 * 0x80), pcoeff->deqA_12[dist] );
295
296 #if 0
297 printk("ch[%d]: COEFF, dist:%d, deqA_01[%02x]\n", ch, dist, pcoeff->deqA_01[dist] );
298 printk("ch[%d]: COEFF, dist:%d, deqA_02[%02x]\n", ch, dist, pcoeff->deqA_02[dist] );
299 printk("ch[%d]: COEFF, dist:%d, deqA_03[%02x]\n", ch, dist, pcoeff->deqA_03[dist] );
300 printk("ch[%d]: COEFF, dist:%d, deqA_04[%02x]\n", ch, dist, pcoeff->deqA_04[dist] );
301 printk("ch[%d]: COEFF, dist:%d, deqA_05[%02x]\n", ch, dist, pcoeff->deqA_05[dist] );
302 printk("ch[%d]: COEFF, dist:%d, deqA_06[%02x]\n", ch, dist, pcoeff->deqA_06[dist] );
303 printk("ch[%d]: COEFF, dist:%d, deqA_07[%02x]\n", ch, dist, pcoeff->deqA_07[dist] );
304 printk("ch[%d]: COEFF, dist:%d, deqA_08[%02x]\n", ch, dist, pcoeff->deqA_08[dist] );
305 printk("ch[%d]: COEFF, dist:%d, deqA_09[%02x]\n", ch, dist, pcoeff->deqA_09[dist] );
306 printk("ch[%d]: COEFF, dist:%d, deqA_10[%02x]\n", ch, dist, pcoeff->deqA_10[dist] );
307 printk("ch[%d]: COEFF, dist:%d, deqA_11[%02x]\n", ch, dist, pcoeff->deqA_11[dist] );
308 printk("ch[%d]: COEFF, dist:%d, deqA_12[%02x]\n", ch, dist, pcoeff->deqA_12[dist] );
309 #endif
310 }
311
__nvp6158_eq_color_set_value(video_equalizer_info_s * pvin_eq_set,video_equalizer_color_s * pcolor)312 void __nvp6158_eq_color_set_value( video_equalizer_info_s *pvin_eq_set, video_equalizer_color_s *pcolor )
313 {
314 unsigned char devnum = pvin_eq_set->devnum;
315 unsigned char ch = pvin_eq_set->Ch;
316 unsigned char dist = pvin_eq_set->distance;
317
318 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xff, 0x00 );
319 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x10 + ch, pcolor->contrast[dist] );
320 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x18 + ch, pcolor->h_peaking[dist] );
321 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x21 + ch*4, pcolor->c_filter[dist] );
322
323 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x40 + ch, pcolor->hue[dist] );
324 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x44 + ch, pcolor->u_gain[dist] );
325 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x48 + ch, pcolor->v_gain[dist] );
326 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x4C + ch, pcolor->u_offset[dist] );
327 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x50 + ch, pcolor->v_offset[dist] );
328
329 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xff, 0x05 + ch);
330 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x20, pcolor->black_level[dist] );
331 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x27, pcolor->acc_ref[dist] );
332 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x28, pcolor->cti_delay[dist] );
333 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x2b, pcolor->sub_saturation[dist] );
334
335 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x24, pcolor->burst_dec_a[dist] );
336 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5f, pcolor->burst_dec_b[dist] );
337 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xd1, pcolor->burst_dec_c[dist] );
338
339 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xd5, pcolor->c_option[dist] );
340
341 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xff, (ch < 2 ? 0x0a : 0x0b) );
342 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x25 + (ch%2 * 0x80), pcolor->y_filter_b[dist] );
343 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x27 + (ch%2 * 0x80), pcolor->y_filter_b_sel[dist] );
344
345 if( pvin_eq_set->FmtDef == TVI_8M_15P || pvin_eq_set->FmtDef == TVI_8M_12_5P )
346 {
347 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xff, 0x00 );
348
349 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0c + ch, 0xf0 );
350 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x3c + ch, 0xB8 );
351 }
352 else
353 {
354 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xff, 0x00 );
355
356 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0c + ch, 0x00 );
357 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x3c + ch, 0x80 );
358 }
359
360 #if 0
361 printk("ch[%d]: COLOR, dist:%d, contrast[%02x]\n", ch, dist, pcolor->contrast[dist] );
362 printk("ch[%d]: COLOR, dist:%d, h_peaking[%02x]\n", ch, dist, pcolor->h_peaking[dist] );
363 printk("ch[%d]: COLOR, dist:%d, c_filter[%02x]\n", ch, dist, pcolor->c_filter[dist] );
364
365 printk("ch[%d]: COLOR, dist:%d, hue[%02x]\n", ch, dist, pcolor->hue[dist] );
366 printk("ch[%d]: COLOR, dist:%d, u_gain[%02x]\n", ch, dist, pcolor->u_gain[dist] );
367 printk("ch[%d]: COLOR, dist:%d, v_gain[%02x]\n", ch, dist, pcolor->v_gain[dist] );
368 printk("ch[%d]: COLOR, dist:%d, u_offset[%02x]\n", ch, dist, pcolor->u_offset[dist] );
369 printk("ch[%d]: COLOR, dist:%d, v_offset[%02x]\n", ch, dist, pcolor->v_offset[dist] );
370
371 printk("ch[%d]: COLOR, dist:%d, black_level[%02x]\n", ch, dist, pcolor->black_level[dist] );
372 printk("ch[%d]: COLOR, dist:%d, cti_delay[%02x]\n", ch, dist, pcolor->cti_delay[dist] );
373 printk("ch[%d]: COLOR, dist:%d, sub_saturation[%02x]\n", ch, dist, pcolor->sub_saturation[dist] );
374
375 printk("ch[%d]: COLOR, dist:%d, burst_dec_a[%02x]\n", ch, dist, pcolor->burst_dec_a[dist] );
376 printk("ch[%d]: COLOR, dist:%d, burst_dec_b[%02x]\n", ch, dist, pcolor->burst_dec_b[dist] );
377 printk("ch[%d]: COLOR, dist:%d, burst_dec_c[%02x]\n", ch, dist, pcolor->burst_dec_c[dist] );
378
379 printk("ch[%d]: COLOR, dist:%d, c_option[%02x]\n", ch, dist, pcolor->c_option[dist] );
380 #endif
381 }
382
__nvp6158_eq_timing_a_set_value(video_equalizer_info_s * pvin_eq_set,video_equalizer_timing_a_s * ptiming_a)383 void __nvp6158_eq_timing_a_set_value(video_equalizer_info_s * pvin_eq_set, video_equalizer_timing_a_s * ptiming_a)
384 {
385 unsigned char devnum = pvin_eq_set->devnum;
386 unsigned char ch = pvin_eq_set->Ch;
387 unsigned char dist = pvin_eq_set->distance;
388
389 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00 );
390 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x58 + ch, ptiming_a->h_delay_a[dist] );
391 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x89 + ch, ptiming_a->h_delay_b[dist] );
392 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x8e + ch, ptiming_a->h_delay_c[dist] );
393 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xa0 + ch, ptiming_a->y_delay[dist] );
394
395 #if 0
396 printk("ch[%d]: TIMING_A, dist:%d, h_delay_a[%02x]\n", ch, dist, ptiming_a->h_delay_a[dist] );
397 printk("ch[%d]: TIMING_A, dist:%d, h_delay_b[%02x]\n", ch, dist, ptiming_a->h_delay_b[dist] );
398 printk("ch[%d]: TIMING_A, dist:%d, h_delay_c[%02x]\n", ch, dist, ptiming_a->h_delay_c[dist] );
399 printk("ch[%d]: TIMING_A, dist:%d, y_delay[%02x]\n", ch, dist, ptiming_a->y_delay[dist] );
400 #endif
401 }
402
__nvp6158_eq_clk_set_value(video_equalizer_info_s * pvin_eq_set,video_equalizer_clk_s * pclk)403 void __nvp6158_eq_clk_set_value( video_equalizer_info_s *pvin_eq_set, video_equalizer_clk_s *pclk )
404 {
405 unsigned char devnum = pvin_eq_set->devnum;
406 unsigned char ch = pvin_eq_set->Ch;
407 unsigned char dist = pvin_eq_set->distance;
408
409 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x01 );
410 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x84 + ch, pclk->clk_adc[dist] );
411 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x8C + ch, pclk->clk_dec[dist] );
412 }
__nvp6158_eq_timing_b_set_value(video_equalizer_info_s * pvin_eq_set,video_equalizer_timing_b_s * ptiming_b)413 void __nvp6158_eq_timing_b_set_value( video_equalizer_info_s *pvin_eq_set, video_equalizer_timing_b_s *ptiming_b )
414 {
415 unsigned char devnum = pvin_eq_set->devnum;
416 unsigned char ch = pvin_eq_set->Ch;
417 unsigned char dist = pvin_eq_set->distance;
418
419 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xff, 0x09 );
420 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x96 + (ch * 0x20), ptiming_b->h_scaler1[dist] );
421 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x97 + (ch * 0x20), ptiming_b->h_scaler2[dist] );
422 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x98 + (ch * 0x20), ptiming_b->h_scaler3[dist] );
423 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x99 + (ch * 0x20), ptiming_b->h_scaler4[dist] );
424 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x9A + (ch * 0x20), ptiming_b->h_scaler5[dist] );
425 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x9B + (ch * 0x20), ptiming_b->h_scaler6[dist] );
426 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x9C + (ch * 0x20), ptiming_b->h_scaler7[dist] );
427 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x9D + (ch * 0x20), ptiming_b->h_scaler8[dist] );
428 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x9E + (ch * 0x20), ptiming_b->h_scaler9[dist] );
429
430 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x40 + ch , ptiming_b->pn_auto[dist] );
431
432 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xff, 0x05 + ch );
433 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x90, ptiming_b->comb_mode[dist] );
434 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xb9, ptiming_b->h_pll_op_a[dist] );
435 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x57, ptiming_b->mem_path[dist] );
436 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x25, ptiming_b->fsc_lock_speed[dist] );
437
438
439 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xff, 0x00 );
440 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x81 + ch, ptiming_b->format_set1[dist] );
441 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x85 + ch, ptiming_b->format_set2[dist] );
442 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x64 + ch, ptiming_b->v_delay[dist] );
443
444 #if 0
445 printk("ch[%d]: TIMING_B, dist:%d, h_scaler1[%02x]\n", ch, dist, ptiming_b->h_scaler1[dist] );
446 printk("ch[%d]: TIMING_B, dist:%d, h_scaler2[%02x]\n", ch, dist, ptiming_b->h_scaler2[dist] );
447 printk("ch[%d]: TIMING_B, dist:%d, h_scaler3[%02x]\n", ch, dist, ptiming_b->h_scaler3[dist] );
448 printk("ch[%d]: TIMING_B, dist:%d, h_scaler4[%02x]\n", ch, dist, ptiming_b->h_scaler4[dist] );
449
450 printk("ch[%d]: TIMING_B, dist:%d, pn_auto[%02x]\n", ch, dist, ptiming_b->pn_auto[dist] );
451 printk("ch[%d]: TIMING_B, dist:%d, comb_mode[%02x]\n", ch, dist, ptiming_b->comb_mode[dist] );
452 printk("ch[%d]: TIMING_B, dist:%d, h_pll_op_a[%02x]\n", ch, dist, ptiming_b->h_pll_op_a[dist] );
453 printk("ch[%d]: TIMING_B, dist:%d, mem_path[%02x]\n", ch, dist, ptiming_b->mem_path[dist] );
454 printk("ch[%d]: TIMING_B, dist:%d, format_set1[%02x]\n", ch, dist, ptiming_b->format_set1[dist] );
455 printk("ch[%d]: TIMING_B, dist:%d, format_set2[%02x]\n", ch, dist, ptiming_b->format_set2[dist] );
456 printk("ch[%d]: TIMING_B, dist:%d, v_delay[%02x]\n", ch, dist, ptiming_b->v_delay[dist] );
457 #endif
458
459 }
460
__nvp6158_get_acc_gain(unsigned char ch,unsigned char devnum)461 unsigned int __nvp6158_get_acc_gain(unsigned char ch, unsigned char devnum)
462 {
463 unsigned int acc_gain_status;
464
465 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF,0x05+ch%4);
466 acc_gain_status = gpio_i2c_read(nvp6158_iic_addr[devnum],0xE2);
467 acc_gain_status <<= 8;
468 acc_gain_status |= gpio_i2c_read(nvp6158_iic_addr[devnum],0xE3);
469
470 return acc_gain_status;
471 }
472
__nvp6158_get_yplus_slope(unsigned char ch,unsigned char devnum)473 unsigned int __nvp6158_get_yplus_slope(unsigned char ch, unsigned char devnum)
474 {
475 unsigned int y_plus_slp_status;
476
477 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF,0x05+ch%4);
478 y_plus_slp_status = gpio_i2c_read(nvp6158_iic_addr[devnum],0xE8)&0x07;
479 y_plus_slp_status <<= 8;
480 y_plus_slp_status |= gpio_i2c_read(nvp6158_iic_addr[devnum],0xE9);
481
482 return y_plus_slp_status;
483 }
484
__nvp6158_get_yminus_slope(unsigned char ch,unsigned char devnum)485 unsigned int __nvp6158_get_yminus_slope(unsigned char ch, unsigned char devnum)
486 {
487 unsigned int y_minus_slp_status;
488
489 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF,0x05+ch%4);
490 y_minus_slp_status = gpio_i2c_read(nvp6158_iic_addr[devnum],0xEA)&0x07;
491 y_minus_slp_status <<= 8;
492 y_minus_slp_status |= gpio_i2c_read(nvp6158_iic_addr[devnum],0xEB);
493
494 return y_minus_slp_status;
495 }
496
__nvp6158_get_sync_width(unsigned char ch,unsigned char devnum)497 unsigned int __nvp6158_get_sync_width( unsigned char ch, unsigned char devnum )
498 {
499 unsigned char reg_B0_E0 = 0;
500 unsigned char agc_stable = 0;
501 unsigned int sync_width = 0;
502 unsigned int check_timeout = 0;
503
504 while(agc_stable == 0)
505 {
506 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
507 reg_B0_E0 = gpio_i2c_read(nvp6158_iic_addr[devnum], 0xE0 )&0xF;
508 agc_stable = reg_B0_E0 & (0x01 << (ch%4));
509
510 if( check_timeout++ > 100 )
511 {
512 printk(">>>>> DRV[%s:%d] CH:%d, TimeOut, AGC_stable[%x] check[%x] in get sync width\n", __func__, __LINE__, ch, reg_B0_E0, agc_stable );
513 break;
514 }
515 msleep(1);
516 }
517
518 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+(ch%4));
519 sync_width = gpio_i2c_read(nvp6158_iic_addr[devnum], 0xC4)&0x0F;
520 sync_width <<=8;
521 sync_width |= gpio_i2c_read(nvp6158_iic_addr[devnum], 0xC5);
522 sync_width = sync_width & 0x0FFF;
523 printk(">>>>> DRV[%s:%d] CH:%d, sync_width:0x%x\n", __func__, __LINE__, ch, sync_width );
524
525 return sync_width;
526 }
527
nvp6158_video_input_cable_measure_way(unsigned char ch,unsigned char devnum)528 int nvp6158_video_input_cable_measure_way( unsigned char ch, unsigned char devnum )
529 {
530 unsigned int acc_gain;
531 unsigned int y_slope;
532 unsigned char y_plus_slope;
533 unsigned char y_minus_slope;
534 unsigned int sync_width;
535
536 acc_gain = __nvp6158_get_acc_gain(ch, devnum);
537 y_plus_slope = __nvp6158_get_yplus_slope(ch, devnum);
538 y_minus_slope = __nvp6158_get_yminus_slope(ch, devnum);
539 y_slope = y_plus_slope + y_minus_slope;
540 sync_width = __nvp6158_get_sync_width(ch, devnum);
541
542 printk(">>>>> DRV[%s:%d] CH:%d, accgain=0x%x(%d), yslope=0x%x(%d), syncwidth=0x%x(%d)\n", \
543 __func__, __LINE__, ch, acc_gain, acc_gain, y_slope, y_slope, sync_width, sync_width );
544
545 return 0;
546 }
547
nvp6158_video_input_cable_manualdist_read(video_input_cable_dist * vin_cable_dist)548 void nvp6158_video_input_cable_manualdist_read(video_input_cable_dist *vin_cable_dist )
549 {
550 video_input_acc_gain_val vin_acc;
551 video_input_hsync_accum vin_hsync_accum;
552
553 /* cable type => 0:coaxial, 1:utp, 2:reserved1, 3:reserved2 */
554 nvp6158_video_equalizer_distance_table_s distance_value = (nvp6158_video_equalizer_distance_table_s)equalizer_distance_fmtdef[vin_cable_dist->FmtDef];
555
556 if( vin_cable_dist->FmtDef >= AHD20_SD_H960_NT && vin_cable_dist->FmtDef <= AHD20_SD_H960_2EX_Btype_PAL )
557 {
558 /* CVBS Resolution not need distance distinguish, because cvbs format has low color frequency */
559 vin_cable_dist->dist = 0;
560 }
561 else if(distance_value.hsync_stage.hsync_stage[0] != 0)
562 {
563 /* get hsync*/
564 vin_hsync_accum.ch = vin_cable_dist->ch;
565 vin_hsync_accum.devnum = vin_cable_dist->devnum;
566 nvp6158_video_input_hsync_accum_read(&vin_hsync_accum);
567
568 /* get acc */
569 vin_acc.ch = vin_cable_dist->ch;
570 vin_acc.devnum = vin_cable_dist->devnum;
571 vin_acc.func_sel = 0;
572 /* 1 is ACC_GAIN_DEBUG
573 0 is ACC_GAIN_NORMAL */
574 nvp6158_video_input_acc_gain_val_read(&vin_acc);
575
576 /* measure eq */
577 nvp6158_video_input_cable_measure_way(vin_cable_dist->ch, vin_cable_dist->devnum);
578
579 /* decision distance using hsync and distance table */
580 vin_cable_dist->dist = __nvp6158_video_cable_manualdistance( vin_cable_dist->cabletype, &vin_hsync_accum, &vin_acc, &distance_value );
581
582
583 printk(">>>>> DRV, CH:%d, hsync : %08x\n", vin_cable_dist->ch, vin_hsync_accum.hsync_accum_result);
584 printk(">>>>> DRV, CH:%d, eq stage:%d\n", vin_cable_dist->ch, vin_cable_dist->dist);
585 }
586 else
587 {
588 vin_cable_dist->dist = 0;
589
590 printk(">>>>> DRV, CH:%d, This Format Not support Yet [%d] eq stage:%d\n", vin_cable_dist->ch, vin_cable_dist->FmtDef ,vin_cable_dist->dist);
591
592 }
593 }
594
nvp6168_video_input_cable_manualdist_read(video_input_cable_dist * vin_cable_dist)595 void nvp6168_video_input_cable_manualdist_read(video_input_cable_dist *vin_cable_dist )
596 {
597 video_input_hsync_accum vin_hsync_accum;
598 nvp6158_video_equalizer_distance_table_s distance_value = (nvp6158_video_equalizer_distance_table_s)nvp6168_equalizer_distance_fmtdef[vin_cable_dist->FmtDef];
599
600 if( vin_cable_dist->FmtDef >= AHD20_SD_H960_NT && vin_cable_dist->FmtDef <= AHD20_SD_H960_2EX_Btype_PAL )
601 {
602 /* CVBS Resolution not need distance distinguish, because cvbs format has low color frequency */
603 vin_cable_dist->dist = 0;
604 return;
605 }
606
607 /* get hsync*/
608 vin_hsync_accum.ch = vin_cable_dist->ch;
609 vin_hsync_accum.devnum = vin_cable_dist->devnum;
610 nvp6168_video_input_hsync_accum_read(&vin_hsync_accum );
611
612 if(((vin_hsync_accum.hsync_accum_val1|vin_hsync_accum.hsync_accum_val2) == 0) &&
613 (vin_hsync_accum.hsync_accum_result == 0xffffffff))
614 {
615 vin_cable_dist->dist = 0xFF;
616 return;
617 }
618
619 /* decision distance using hsync and distance table */
620 vin_cable_dist->dist = __nvp6158_video_cable_manualdistance( vin_cable_dist->cabletype, &vin_hsync_accum, 0, &distance_value );
621
622 if(vin_cable_dist->dist > 5)
623 vin_cable_dist->dist = 5;
624
625 printk(">>>>> DRV, CH:%d, hsync : %08x\n", vin_cable_dist->ch, vin_hsync_accum.hsync_accum_result);
626 printk(">>>>> DRV, CH:%d, eq stage:%d\n", vin_cable_dist->ch, vin_cable_dist->dist);
627 }
nvp6158_set_equalizer(video_equalizer_info_s * pvin_eq_set)628 int nvp6158_set_equalizer(video_equalizer_info_s *pvin_eq_set)
629 {
630 int ii;
631 unsigned char val_13x30;
632 unsigned char val_13x31;
633 unsigned char val_13x32;
634 unsigned char val_0x54;
635 //unsigned char val_5678x69;
636 unsigned char val_9x44;
637
638 unsigned char ch = pvin_eq_set->Ch;
639 unsigned char devnum = pvin_eq_set->devnum;
640 video_equalizer_value_table_s eq_value;
641
642 /* cable type => 0:coaxial, 1:utp, 2:reserved1, 3:reserved2 */
643 //video_equalizer_value_table_s eq_value = (video_equalizer_value_table_s)nvp6158_equalizer_value_fmtdef[pvin_eq_set->FmtDef];
644 memset(&eq_value, 0xFF,sizeof(video_equalizer_value_table_s));
645 memcpy(&eq_value,&nvp6158_equalizer_value_fmtdef[pvin_eq_set->FmtDef],sizeof(video_equalizer_value_table_s));
646 if(0xFF == eq_value.eq_base.eq_band_sel[pvin_eq_set->distance] || 0x00 == eq_value.eq_base.eq_bypass[pvin_eq_set->distance]) //if 5x58==0xFF it's not a valid value.
647 {
648 printk(">>>>>>DRV %s not supported video format[%2x]\n\n\n", __func__, pvin_eq_set->FmtDef);
649 /* Auto Mode ON */
650 gpio_i2c_write(nvp6158_iic_addr[pvin_eq_set->devnum], 0xff, 0x13 );
651 val_13x30 = gpio_i2c_read(nvp6158_iic_addr[pvin_eq_set->devnum], 0x30);
652 val_13x30 |= (0x11 << pvin_eq_set->Ch);
653 gpio_i2c_write(nvp6158_iic_addr[pvin_eq_set->devnum], 0x30, val_13x30 );
654
655 val_13x31 = gpio_i2c_read(nvp6158_iic_addr[pvin_eq_set->devnum], 0x31);
656 val_13x31 |= (0x11 << pvin_eq_set->Ch);
657 gpio_i2c_write(nvp6158_iic_addr[pvin_eq_set->devnum], 0x31, val_13x31 );
658
659 val_13x32 = gpio_i2c_read(nvp6158_iic_addr[pvin_eq_set->devnum], 0x32);
660 val_13x32 |= (0x01 << pvin_eq_set->Ch);
661 gpio_i2c_write(nvp6158_iic_addr[pvin_eq_set->devnum], 0x32, val_13x32 );
662 return -1;
663 }
664 /* for verification by edward */
665
666 if(pvin_eq_set->FmtDef == AHD20_720P_30P_EX_Btype || pvin_eq_set->FmtDef == AHD20_720P_25P_EX_Btype ||
667 pvin_eq_set->FmtDef == AHD20_720P_30P || pvin_eq_set->FmtDef == AHD20_720P_25P ||
668 pvin_eq_set->FmtDef == CVI_HD_30P_EX || pvin_eq_set->FmtDef == CVI_HD_25P_EX ||
669 pvin_eq_set->FmtDef == CVI_HD_30P || pvin_eq_set->FmtDef == CVI_HD_25P ||
670 pvin_eq_set->FmtDef == TVI_HD_30P || pvin_eq_set->FmtDef == TVI_HD_25P ||
671 pvin_eq_set->FmtDef == TVI_HD_30P_EX || pvin_eq_set->FmtDef == TVI_HD_25P_EX ||
672 pvin_eq_set->FmtDef == TVI_HD_B_30P || pvin_eq_set->FmtDef == TVI_HD_B_25P ||
673 pvin_eq_set->FmtDef == TVI_HD_B_30P_EX || pvin_eq_set->FmtDef == TVI_HD_B_25P_EX
674 )
675 {
676 printk("DRV >> This Format Support Maximum EQ Stage 10\n");
677 printk("DRV >> Now Select EQ Stage %d\n", pvin_eq_set->distance);
678 }
679 else
680 {
681 if(pvin_eq_set->distance > 5)
682 {
683 printk("DRV >> This Format Only Support Maximum EQ Stage 5\n");
684 printk("DRV >> Now Select EQ Stage %d\n", pvin_eq_set->distance);
685 pvin_eq_set->distance = 5;
686 }
687 }
688
689 /* set eq value */
690 __nvp6158_eq_base_set_value( pvin_eq_set, &eq_value.eq_base );
691 __nvp6158_eq_coeff_set_value( pvin_eq_set, &eq_value.eq_coeff );
692 __nvp6158_eq_color_set_value( pvin_eq_set, &eq_value.eq_color);
693 __nvp6158_eq_timing_a_set_value( pvin_eq_set, &eq_value.eq_timing_a );
694 __nvp6158_eq_clk_set_value( pvin_eq_set, &eq_value.eq_clk );
695 __nvp6158_eq_timing_b_set_value( pvin_eq_set, &eq_value.eq_timing_b );
696
697 if( pvin_eq_set->FmtDef >= AHD20_SD_H960_NT && pvin_eq_set->FmtDef <= AHD20_SD_H960_2EX_Btype_PAL )
698 {
699 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xff, 0x00);
700 if((pvin_eq_set->FmtDef >= AHD20_SD_H960_NT)&&(pvin_eq_set->FmtDef <= AHD20_SD_H960_EX_PAL))
701 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00); /* line_mem_mode disable */
702 else
703 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x01); /* line_mem_mode Enable */
704
705 if( (pvin_eq_set->FmtDef%2) == 0 ) //NTSC
706 {
707 val_0x54 = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x54);
708 val_0x54 &= ~((0x1 << (ch+4)));
709 val_0x54 |= ((0x1 << (ch+4)));
710 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x54, val_0x54); /* Enable FLD_INV for CVBS NT format */
711
712 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x08 + ch, 0xa0);
713 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0xd0); /* Set V_Delay */
714 }
715 else //if( pvin_eq_set->FmtDef == AHD20_SD_H960_2EX_Btype_PAL )
716 {
717 val_0x54 = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x54);
718 val_0x54 &= ~((0x1 << (ch+4)));
719 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x54, val_0x54); /* Disable FLD_INV for CVBS PAL format */
720
721 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x08 + ch, 0xdd);
722 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0xbf); /* Set V_Delay */
723
724 }
725
726 gpio_i2c_write( nvp6158_iic_addr[devnum], 0xff, 0x05 + ch );
727 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x2C, 0x08);
728 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x47, 0x04);
729 if((pvin_eq_set->FmtDef >= AHD20_SD_H960_NT)&&(pvin_eq_set->FmtDef <= AHD20_SD_H960_EX_PAL))
730 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x64, 0x00 ); /* disable Mem_Path */
731 else
732 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x64, 0x01 ); /* Enable Mem_Path */
733 }
734 else
735 {
736 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xff, 0x00);
737 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00); /* line_mem_mode Disable */
738 val_0x54 = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x54);
739 val_0x54 &= ~((0x1 << (ch+4)));
740 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x54, val_0x54); /* Disable FLD_INV */
741
742 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x08 + ch, 0x00);
743 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x80); /* Recovery V_Delay */
744
745 gpio_i2c_write( nvp6158_iic_addr[devnum], 0xff, 0x05 + ch );
746 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x2C, 0x00);
747 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x47, 0xEE);
748 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x64, 0x00 ); /* Disable Mem_Path */
749
750 if(pvin_eq_set->FmtDef == TVI_4M_15P )
751 {
752 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x6E, 0x10 ); //VBLK setting
753 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x6F, 0x7e );
754 }
755 else
756 {
757 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x6E, 0x00 ); //VBLK default setting
758 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x6F, 0x00 );
759 }
760 }
761
762 /* Auto Mode Off */
763 gpio_i2c_write(nvp6158_iic_addr[pvin_eq_set->devnum], 0xff, 0x13 );
764 val_13x30 = gpio_i2c_read(nvp6158_iic_addr[pvin_eq_set->devnum], 0x30);
765 val_13x30 &= ~(0x11 << pvin_eq_set->Ch);
766 gpio_i2c_write(nvp6158_iic_addr[pvin_eq_set->devnum], 0x30, val_13x30 );
767
768 val_13x31 = gpio_i2c_read(nvp6158_iic_addr[pvin_eq_set->devnum], 0x31);
769 val_13x31 &= ~(0x11 << pvin_eq_set->Ch);
770 gpio_i2c_write(nvp6158_iic_addr[pvin_eq_set->devnum], 0x31, val_13x31 );
771
772 val_13x32 = gpio_i2c_read(nvp6158_iic_addr[pvin_eq_set->devnum], 0x32);
773 val_13x32 &= ~(0x01 << pvin_eq_set->Ch);
774 gpio_i2c_write(nvp6158_iic_addr[pvin_eq_set->devnum], 0x32, val_13x32 );
775
776 gpio_i2c_write(nvp6158_iic_addr[pvin_eq_set->devnum], 0xff, 0x05 + ch);
777 gpio_i2c_write(nvp6158_iic_addr[pvin_eq_set->devnum], 0x59, 0x00 );
778
779 gpio_i2c_write(nvp6158_iic_addr[pvin_eq_set->devnum], 0xff, 0x00 );
780 gpio_i2c_write(nvp6158_iic_addr[pvin_eq_set->devnum], 0x23 + (pvin_eq_set->Ch * 4), 0x41);
781
782 for(ii=0;ii<0x16;ii++)
783 {
784 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x11);
785 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x00 + ( ch * 0x20 ) + ii, 0x00); //first set bank11 to default values.
786 }
787
788 if( pvin_eq_set->FmtDef == TVI_5M_20P || pvin_eq_set->FmtDef == TVI_5M_12_5P ||
789 pvin_eq_set->FmtDef == TVI_4M_30P || pvin_eq_set->FmtDef == TVI_4M_25P ||
790 pvin_eq_set->FmtDef == TVI_8M_15P || pvin_eq_set->FmtDef == TVI_8M_12_5P ||
791 pvin_eq_set->FmtDef == TVI_4M_15P )
792
793 {
794 if(pvin_eq_set->FmtDef != TVI_4M_15P)
795 {
796 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF,0x09);
797 val_9x44 = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x44);
798 val_9x44 &= ~(1 << ch);
799 val_9x44 |= (1 << ch);
800 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x44 , val_9x44);
801 }
802
803 if( pvin_eq_set->FmtDef == TVI_5M_20P)
804 {
805 /* TVI 5M 20P PN Value Set */
806 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x50 + ( ch * 4 ) , 0x36);
807 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x51 + ( ch * 4 ) , 0x40);
808 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x52 + ( ch * 4 ) , 0xa7);
809 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x53 + ( ch * 4 ) , 0x74);
810
811 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x11);
812 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x02 + ( ch * 0x20 ), 0xdb);
813 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x03 + ( ch * 0x20 ), 0x0a);
814 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05 + ( ch * 0x20 ), 0x0e);
815 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x06 + ( ch * 0x20 ), 0xa6);
816 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x08 + ( ch * 0x20 ), 0x96);
817 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0a + ( ch * 0x20 ), 0x07);
818 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0b + ( ch * 0x20 ), 0x98);
819 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0c + ( ch * 0x20 ), 0x07);
820 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0d + ( ch * 0x20 ), 0xbc);
821 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x11 + ( ch * 0x20 ), 0xa0);
822 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x13 + ( ch * 0x20 ), 0xfa);
823 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x15 + ( ch * 0x20 ), 0x65);
824 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x00 + ( ch * 0x20 ), 0x0f);
825 }
826 else if( pvin_eq_set->FmtDef == TVI_4M_15P)
827 {
828 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x11);
829 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x02 + ( ch * 0x20 ), 0xd0);
830 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x03 + ( ch * 0x20 ), 0x0a);
831 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05 + ( ch * 0x20 ), 0x97);
832 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x06 + ( ch * 0x20 ), 0x70);
833 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x08 + ( ch * 0x20 ), 0x78);
834 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0a + ( ch * 0x20 ), 0x05);
835 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0b + ( ch * 0x20 ), 0xa0);
836 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0c + ( ch * 0x20 ), 0x06);
837 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0d + ( ch * 0x20 ), 0x71);
838 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x11 + ( ch * 0x20 ), 0x50);
839 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x13 + ( ch * 0x20 ), 0x96);
840 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x15 + ( ch * 0x20 ), 0x30);
841 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x00 + ( ch * 0x20 ), 0x0f);
842 }
843 else if( pvin_eq_set->FmtDef == TVI_5M_12_5P)
844 {
845 /* TVI 5M 12_5P PN Value Set */
846 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x50 + ( ch * 4 ) , 0x8b);
847 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x51 + ( ch * 4 ) , 0xae);
848 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x52 + ( ch * 4 ) , 0xbb);
849 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x53 + ( ch * 4 ) , 0x48);
850 }
851 else if( pvin_eq_set->FmtDef == TVI_4M_30P || pvin_eq_set->FmtDef == TVI_4M_25P )
852 {
853 /* TVI 4M 30P PN Value Set */
854 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x50 + ( ch * 4 ) , 0x9e);
855 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x51 + ( ch * 4 ) , 0x48);
856 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x52 + ( ch * 4 ) , 0x59);
857 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x53 + ( ch * 4 ) , 0x74);
858 }
859 else if( pvin_eq_set->FmtDef == TVI_8M_15P || pvin_eq_set->FmtDef == TVI_8M_12_5P )
860 {
861 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x50 + ( ch * 4 ) , 0x73);
862 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x51 + ( ch * 4 ) , 0x76);
863 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x52 + ( ch * 4 ) , 0x58);
864 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x53 + ( ch * 4 ) , 0x74);
865
866 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x11);
867
868 if( pvin_eq_set->FmtDef == TVI_8M_12_5P )
869 {
870 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x02 + ( ch * 0x20 ), 0x9b);
871 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x03 + ( ch * 0x20 ), 0x0f);
872 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05 + ( ch * 0x20 ), 0x14);
873 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x06 + ( ch * 0x20 ), 0xa0);
874 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x08 + ( ch * 0x20 ), 0x80);
875 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0a + ( ch * 0x20 ), 0x08);
876 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0b + ( ch * 0x20 ), 0x70);
877 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0c + ( ch * 0x20 ), 0x08);
878 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0d + ( ch * 0x20 ), 0xca);
879 // gpio_i2c_write(nvp6158_iic_addr[devnum], 0x11 + ( ch * 0x20 ), 0xa0);
880 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x12 + ( ch * 0x20 ), 0x01);
881 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x13 + ( ch * 0x20 ), 0xcc);
882 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x15 + ( ch * 0x20 ), 0x3c);
883 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x00 + ( ch * 0x20 ), 0x0d);
884
885
886 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch%4);
887 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x25, 0xda);
888 msleep(100);
889 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x2a, 0xd4);
890 msleep(40);
891 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x2a, 0xd2);
892 printk("TVI_8M_12_5P adopted test\n");
893 }
894 else
895 {
896 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x02 + ( ch * 0x20 ), 0x9b);
897 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x03 + ( ch * 0x20 ), 0x0f);
898 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05 + ( ch * 0x20 ), 0x11);
899 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x06 + ( ch * 0x20 ), 0x30);
900 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x08 + ( ch * 0x20 ), 0x80);
901 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0a + ( ch * 0x20 ), 0x08);
902 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0b + ( ch * 0x20 ), 0x70);
903 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0c + ( ch * 0x20 ), 0x08);
904 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0d + ( ch * 0x20 ), 0xca);
905 // gpio_i2c_write(nvp6158_iic_addr[devnum], 0x11 + ( ch * 0x20 ), 0xa0);
906 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x12 + ( ch * 0x20 ), 0x01);
907 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x13 + ( ch * 0x20 ), 0xcc);
908 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x15 + ( ch * 0x20 ), 0x3c);
909 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x00 + ( ch * 0x20 ), 0x0d);
910 }
911
912 }
913
914 }
915 else
916 {
917 if( pvin_eq_set->FmtDef == CVI_5M_20P)
918 {
919 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x11);
920
921 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x01 + ( ch * 0x20 ), 0x01);
922 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x02 + ( ch * 0x20 ), 0x30);
923 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x03 + ( ch * 0x20 ), 0x0a);
924 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x04 + ( ch * 0x20 ), 0x20);
925 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05 + ( ch * 0x20 ), 0x0e);
926 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x06 + ( ch * 0x20 ), 0xa6);
927 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x07 + ( ch * 0x20 ), 0x00);
928 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x08 + ( ch * 0x20 ), 0x96);
929 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0a + ( ch * 0x20 ), 0x07);
930 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0b + ( ch * 0x20 ), 0x98);
931 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0c + ( ch * 0x20 ), 0x07);
932 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0d + ( ch * 0x20 ), 0xbc);
933 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0e + ( ch * 0x20 ), 0x07);
934 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0f + ( ch * 0x20 ), 0xad);
935 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x10 + ( ch * 0x20 ), 0x00);
936 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x11 + ( ch * 0x20 ), 0xfa);
937 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x12 + ( ch * 0x20 ), 0x01);
938 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x13 + ( ch * 0x20 ), 0x22);
939 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x14 + ( ch * 0x20 ), 0x00);
940 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x15 + ( ch * 0x20 ), 0x6e);
941 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x00 + ( ch * 0x20 ), 0x0f);
942 }
943 else
944 {
945 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x11);
946 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x04 + ( ch * 0x20 ), 0x00);
947 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x00 + ( ch * 0x20 ), 0x00);
948 }
949
950 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF,0x09);
951 val_9x44 = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x44);
952 val_9x44 &= ~(1 << ch);
953 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x44 , val_9x44);
954 }
955
956 if( pvin_eq_set->FmtDef == AHD20_1080P_15P_EX || pvin_eq_set->FmtDef == AHD20_1080P_12_5P_EX )
957 {
958 unsigned char val_1x7a = 0x00;
959 unsigned char val_11x00 = 0x00;
960
961 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF,0x01);
962 val_1x7a = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x7a);
963 val_1x7a &= ~(0x1 << ch);
964 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7A, val_1x7a);
965 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF,0x11);
966 val_11x00 = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x00 + (ch*0x20));
967 val_11x00 |= 0x10;
968 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x00 + (ch * 0x20) , val_11x00);
969 }
970 else
971 {
972 unsigned char val_11x00 = 0x00;
973 unsigned char val_1x7a = 0x00;
974
975 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF,0x01);
976 val_1x7a = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x7a);
977 val_1x7a |= (0x1 << ch);
978 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7A, val_1x7a);
979 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF,0x11);
980 val_11x00 = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x00 + (ch*0x20));
981 val_11x00 &= ~0x10;
982 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x00 + (ch * 0x20) , val_11x00);
983 }
984 return 0;
985 }
986
__nvp6168_set_eq_ext_val(video_equalizer_info_s * pvin_eq_set)987 void __nvp6168_set_eq_ext_val(video_equalizer_info_s *pvin_eq_set)
988 {
989 int devnum = pvin_eq_set->devnum;
990 int ch = pvin_eq_set->Ch;
991 unsigned char tmp_val;
992
993 // 0x54 : FIELD_INV
994 // 0x69 : SD_FREQ - always 0
995 // 0x22 : COLOR_OFF/C_KILL
996 // 0x30 : Y_DELAY_1
997 // 0x5C : V_DELAY_1
998 // 5x05 : About AGC
999 // 5x7B : SD:0x00, Others:0x11
1000 // 13x74/75 : HSYNC_FALLING MIN/MAX
1001 // 13x76/77 : HSYNC_RISING MIN/MAX
1002 // 13x78/79 : SHORT-HSYNC_FALLING MIN/MAX
1003
1004 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1005 tmp_val = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x54);
1006 tmp_val &= ~(0x01<<(ch+4));
1007 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x54, tmp_val);
1008
1009 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1010 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x69, 0x00);
1011
1012 switch(pvin_eq_set->FmtDef)
1013 {
1014 // CVBS
1015 case AHD20_SD_H960_2EX_Btype_NT :
1016 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1017 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1018 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x10);
1019 tmp_val = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x54);
1020 tmp_val |= 0x01<<(ch+4);
1021 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x54, tmp_val);
1022 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0xD0);
1023 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1024 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1025 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x00);
1026 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1027 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1028 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1029 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1030 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1031 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1032 break;
1033 case AHD20_SD_H960_2EX_Btype_PAL :
1034 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1035 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1036 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x10);
1037 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0xBF);
1038 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1039 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1040 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x00);
1041 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1042 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1043 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1044 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1045 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1046 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1047 break;
1048
1049 // AHD
1050 case AHD20_720P_30P_EX_Btype :
1051 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1052 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1053 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x12);
1054 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1055 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1056 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1057 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1058 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1059 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1060 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1061 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1062 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1063 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1064 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1065 break;
1066 case AHD20_720P_25P_EX_Btype :
1067 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1068 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1069 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x12);
1070 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1071 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1072 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1073 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1074 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1075 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1076 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1077 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1078 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1079 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1080 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1081 break;
1082 case AHD20_1080P_30P :
1083 case AHD20_1080P_15P_EX :
1084 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1085 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1086 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1087 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1088 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1089 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1090 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1091 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1092 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1093 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1094 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1095 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1096 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1097 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1098 break;
1099 case AHD20_1080P_25P :
1100 case AHD20_1080P_12_5P_EX :
1101 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1102 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1103 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1104 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1105 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1106 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1107 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1108 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1109 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1110 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1111 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1112 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1113 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1114 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1115 break;
1116 case AHD20_1080P_60P :
1117 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1118 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1119 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1120 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1121 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1122 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1123 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1124 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1125 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1126 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1127 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1128 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1129 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x78, 0x00);
1130 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1131 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1132 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x79, 0xff);
1133 break;
1134 case AHD20_1080P_50P :
1135 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1136 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1137 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1138 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1139 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1140 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1141 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1142 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1143 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1144 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1145 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1146 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1147 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x78, 0x00);
1148 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1149 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1150 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x79, 0xff);
1151 break;
1152 case AHD30_4M_30P :
1153 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1154 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1155 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1156 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1157 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1158 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1159 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1160 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1161 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1162 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1163 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1164 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1165 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1166 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1167 break;
1168 case AHD30_4M_25P :
1169 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1170 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1171 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1172 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1173 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1174 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1175 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1176 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1177 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1178 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1179 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1180 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1181 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1182 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1183 break;
1184 case AHD30_4M_15P :
1185 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1186 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1187 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x16);
1188 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1189 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1190 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1191 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1192 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1193 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1194 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1195 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1196 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1197 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1198 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1199 break;
1200 case AHD30_3M_30P :
1201 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1202 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1203 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1204 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1205 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1206 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1207 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1208 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1209 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1210 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1211 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1212 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1213 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1214 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1215 break;
1216 case AHD30_3M_25P :
1217 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1218 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1219 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1220 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1221 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1222 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1223 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1224 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1225 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1226 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1227 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1228 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1229 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1230 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1231 break;
1232 case AHD30_3M_18P :
1233 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1234 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1235 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x16);
1236 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1237 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1238 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1239 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1240 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1241 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1242 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1243 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1244 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1245 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1246 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1247 break;
1248 case AHD30_5M_12_5P :
1249 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1250 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1251 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x16);
1252 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1253 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1254 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1255 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1256 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1257 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1258 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1259 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1260 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1261 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1262 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1263 break;
1264 case AHD30_5M_20P :
1265 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1266 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1267 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1268 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1269 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1270 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1271 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1272 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1273 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1274 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1275 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1276 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1277 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1278 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1279 break;
1280 case AHD30_5_3M_20P :
1281 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1282 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1283 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1284 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1285 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1286 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1287 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1288 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1289 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1290 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1291 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1292 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1293 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1294 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1295 break;
1296 case AHD30_8M_12_5P :
1297 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1298 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1299 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1300 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1301 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1302 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1303 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1304 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1305 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1306 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1307 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1308 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1309 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1310 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1311 break;
1312 case AHD30_8M_15P :
1313 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1314 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1315 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1316 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1317 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1318 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1319 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1320 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1321 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1322 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1323 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1324 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1325 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x78, 0x00);
1326 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1327 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1328 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x79, 0xff);
1329 break;
1330 case AHD20_960P_30P :
1331 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1332 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1333 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1334 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1335 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1336 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1337 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1338 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1339 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1340 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1341 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1342 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1343 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1344 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1345 break;
1346 case AHD20_960P_25P :
1347 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1348 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1349 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1350 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1351 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1352 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1353 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1354 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1355 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1356 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1357 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1358 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1359 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1360 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1361 break;
1362 case AHD20_960P_60P :
1363 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1364 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1365 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1366 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1367 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1368 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1369 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1370 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1371 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1372 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1373 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1374 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1375 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x78, 0x00);
1376 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1377 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1378 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x79, 0xff);
1379 break;
1380 case AHD20_960P_50P :
1381 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1382 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1383 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1384 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1385 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1386 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1387 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1388 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1389 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1390 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1391 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1392 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1393 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x78, 0x00);
1394 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1395 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1396 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x79, 0xff);
1397 break;
1398
1399 // TVI
1400 case TVI_FHD_30P :
1401 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1402 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1403 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1404 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1405 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1406 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1407 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1408 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1409 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1410 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1411 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1412 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1413 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x78, 0x00);
1414 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1415 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1416 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x79, 0xff);
1417 break;
1418 case TVI_FHD_25P :
1419 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1420 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1421 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1422 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1423 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1424 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1425 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1426 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1427 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1428 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1429 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1430 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1431 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x78, 0x00);
1432 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1433 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1434 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x79, 0xff);
1435 break;
1436 case TVI_HD_30P_EX :
1437 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1438 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1439 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1440 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1441 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1442 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1443 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1444 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1445 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1446 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1447 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1448 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1449 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x78, 0x00);
1450 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1451 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1452 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x79, 0xff);
1453 break;
1454 case TVI_HD_25P_EX :
1455 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1456 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1457 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1458 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1459 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1460 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1461 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1462 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1463 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1464 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1465 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1466 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1467 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x78, 0x00);
1468 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1469 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1470 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x79, 0xff);
1471 break;
1472 case TVI_HD_B_30P_EX :
1473 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1474 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1475 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x16);
1476 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1477 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1478 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1479 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1480 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1481 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1482 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1483 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1484 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1485 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x78, 0x00);
1486 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1487 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1488 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x79, 0xff);
1489 break;
1490 case TVI_HD_B_25P_EX :
1491 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1492 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1493 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x16);
1494 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1495 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1496 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1497 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1498 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1499 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1500 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1501 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1502 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1503 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x78, 0x00);
1504 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1505 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1506 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x79, 0xff);
1507 break;
1508 case TVI_HD_60P :
1509 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1510 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1511 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x16);
1512 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1513 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1514 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1515 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1516 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1517 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1518 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1519 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1520 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1521 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x78, 0x00);
1522 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1523 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1524 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x79, 0xff);
1525 break;
1526 case TVI_HD_50P :
1527 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1528 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1529 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x16);
1530 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1531 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1532 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1533 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1534 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1535 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1536 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1537 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1538 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1539 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x78, 0x00);
1540 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1541 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1542 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x79, 0xff);
1543 break;
1544 case TVI_3M_18P :
1545 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1546 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1547 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x16);
1548 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1549 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1550 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1551 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1552 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1553 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1554 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1555 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1556 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1557 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x78, 0x00);
1558 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1559 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1560 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x79, 0xff);
1561 break;
1562 case TVI_5M_12_5P :
1563 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1564 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1565 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x16);
1566 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1567 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1568 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1569 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1570 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1571 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1572 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1573 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1574 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1575 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x78, 0x00);
1576 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1577 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1578 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x79, 0xff);
1579 break;
1580 case TVI_5M_20P :
1581 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1582 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1583 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1584 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1585 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1586 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1587 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1588 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1589 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1590 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1591 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1592 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1593 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x78, 0x00);
1594 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1595 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1596 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x79, 0xff);
1597 break;
1598 case TVI_4M_30P :
1599 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1600 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1601 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1602 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1603 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1604 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1605 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1606 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1607 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1608 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1609 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1610 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1611 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x78, 0x00);
1612 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1613 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1614 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x79, 0xff);
1615 break;
1616 case TVI_4M_25P :
1617 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1618 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1619 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1620 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1621 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1622 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1623 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1624 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1625 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1626 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1627 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1628 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1629 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x78, 0x00);
1630 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1631 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1632 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x79, 0xff);
1633 break;
1634 case TVI_4M_15P :
1635 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1636 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1637 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x16);
1638 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1639 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1640 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1641 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1642 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1643 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1644 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1645 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1646 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1647 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x78, 0x00);
1648 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1649 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1650 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x79, 0xff);
1651 break;
1652 case TVI_8M_15P :
1653 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1654 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1655 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1656 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1657 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1658 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1659 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1660 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1661 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1662 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1663 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1664 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1665 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x78, 0x00);
1666 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1667 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1668 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x79, 0xff);
1669 break;
1670 case TVI_8M_12_5P :
1671 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1672 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1673 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1674 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1675 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1676 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1677 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1678 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1679 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1680 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1681 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1682 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1683 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x78, 0x00);
1684 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1685 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1686 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x79, 0xff);
1687 break;
1688
1689 // CVI
1690 case CVI_FHD_30P :
1691 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1692 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1693 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1694 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1695 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1696 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1697 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1698 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1699 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1700 break;
1701 case CVI_FHD_25P :
1702 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1703 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1704 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1705 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1706 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1707 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1708 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1709 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1710 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1711 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1712 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1713 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1714 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1715 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1716 break;
1717 case CVI_HD_60P :
1718 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1719 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1720 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1721 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1722 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1723 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1724 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1725 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1726 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1727 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1728 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1729 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1730 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1731 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1732 break;
1733 case CVI_HD_50P :
1734 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1735 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1736 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1737 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1738 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1739 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1740 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1741 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1742 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1743 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1744 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1745 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1746 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1747 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1748 break;
1749 case CVI_HD_30P_EX :
1750 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1751 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1752 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x16);
1753 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1754 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1755 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1756 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1757 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1758 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1759 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1760 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1761 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1762 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1763 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1764 break;
1765 case CVI_HD_25P_EX :
1766 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1767 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1768 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x16);
1769 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1770 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1771 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1772 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1773 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1774 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1775 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1776 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1777 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1778 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1779 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1780 break;
1781 case CVI_4M_30P :
1782 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1783 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1784 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1785 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1786 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1787 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1788 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1789 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1790 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1791 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1792 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1793 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1794 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1795 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1796 break;
1797 case CVI_4M_25P :
1798 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1799 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1800 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1801 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1802 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1803 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1804 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1805 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1806 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1807 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1808 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1809 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1810 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1811 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1812 break;
1813 case CVI_8M_15P :
1814 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1815 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1816 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1817 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1818 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1819 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1820 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1821 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1822 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1823 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1824 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1825 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1826 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1827 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1828 break;
1829 case CVI_8M_12_5P :
1830 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00);
1831 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02);
1832 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17);
1833 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x34 + ch, 0x00);
1834 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5c + ch, 0x00);
1835 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch);
1836 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05, 0x24);
1837 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7B, 0x11);
1838 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB5, 0x80);
1839 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1840 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x74, 0x00);
1841 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x76, 0x00);
1842 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff);
1843 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff);
1844 break;
1845
1846 case AHD20_SD_H960_NT :
1847 case AHD20_SD_H960_PAL :
1848 case AHD20_SD_SH720_NT :
1849 case AHD20_SD_SH720_PAL :
1850 case AHD20_SD_H1280_NT :
1851 case AHD20_SD_H1280_PAL :
1852 case AHD20_SD_H1440_NT :
1853 case AHD20_SD_H1440_PAL :
1854 case AHD20_SD_H960_EX_NT :
1855 case AHD20_SD_H960_EX_PAL :
1856 case AHD20_SD_H960_2EX_NT :
1857 case AHD20_SD_H960_2EX_PAL :
1858 case AHD20_720P_60P :
1859 case AHD20_720P_50P :
1860 case AHD20_720P_30P :
1861 case AHD20_720P_25P :
1862 case AHD20_720P_30P_EX :
1863 case AHD20_720P_25P_EX :
1864 case AHD30_6M_18P :
1865 case AHD30_6M_20P :
1866 case AHD30_8M_X_30P :
1867 case AHD30_8M_X_25P :
1868 case AHD30_8M_7_5P :
1869 case TVI_HD_30P :
1870 case TVI_HD_25P :
1871 case TVI_HD_B_30P :
1872 case TVI_HD_B_25P :
1873 case CVI_HD_30P :
1874 case CVI_HD_25P :
1875 case TVI_FHD_60P :
1876 #if 0
1877 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1878 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x78, 0x00);
1879 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x79, 0xff);
1880 #endif
1881 case TVI_FHD_50P :
1882 #if 0
1883 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x13);
1884 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x78, 0x00);
1885 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x79, 0xff);
1886 #endif
1887
1888 default :
1889 break;
1890 }
1891 }
1892
nvp6168_set_equalizer(video_equalizer_info_s * pvin_eq_set)1893 int nvp6168_set_equalizer(video_equalizer_info_s *pvin_eq_set)
1894 {
1895 unsigned char val_9x44, ii;
1896 unsigned char ch = pvin_eq_set->Ch;
1897 unsigned char devnum = pvin_eq_set->devnum;
1898
1899 decoder_dev_ch_info_s pDecoder_info;
1900
1901 video_equalizer_value_table_s eq_value;// = (video_equalizer_value_table_s)nvp6168_equalizer_value_fmtdef[pvin_eq_set->FmtDef];
1902
1903 /* cable type => 0:coaxial, 1:utp, 2:reserved1, 3:reserved2 */
1904 //video_equalizer_value_table_s eq_value = (video_equalizer_value_table_s)nvp6158_equalizer_value_fmtdef[pvin_eq_set->FmtDef];
1905 memset(&eq_value, 0xFF,sizeof(video_equalizer_value_table_s));
1906 memcpy(&eq_value,&nvp6168_equalizer_value_fmtdef[pvin_eq_set->FmtDef],sizeof(video_equalizer_value_table_s));
1907 if(0xFF == eq_value.eq_base.eq_band_sel[pvin_eq_set->distance] || 0x00 == eq_value.eq_base.eq_bypass[pvin_eq_set->distance]) //if 5x58==0xFF it's not a valid value.
1908 {
1909 printk("func[%s] eq_value[fmt:%d] not found\n", __func__, pvin_eq_set->FmtDef);
1910 return -1;
1911 }
1912
1913 /* set eq value */
1914 __nvp6158_eq_base_set_value( pvin_eq_set, &eq_value.eq_base );
1915 __nvp6158_eq_coeff_set_value( pvin_eq_set, &eq_value.eq_coeff );
1916 __nvp6158_eq_color_set_value( pvin_eq_set, &eq_value.eq_color);
1917 __nvp6158_eq_timing_a_set_value( pvin_eq_set, &eq_value.eq_timing_a );
1918 __nvp6158_eq_clk_set_value( pvin_eq_set, &eq_value.eq_clk );
1919 __nvp6158_eq_timing_b_set_value( pvin_eq_set, &eq_value.eq_timing_b );
1920
1921 __nvp6168_set_eq_ext_val(pvin_eq_set);
1922
1923 if(nvp6158_audio_in_type_get() == NC_AD_AOC)
1924 {
1925 pDecoder_info.ch = ch;
1926 pDecoder_info.devnum = devnum;
1927 pDecoder_info.fmt_def = pvin_eq_set->FmtDef;
1928
1929 nvp6158_audio_set_aoc_format(&pDecoder_info);
1930 }
1931
1932 for(ii=0;ii<0x16;ii++)
1933 {
1934 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x11);
1935 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x00 + ( ch * 0x20 ) + ii, 0x00); //first set bank11 to default values.
1936 }
1937
1938
1939 if( pvin_eq_set->FmtDef == CVI_5M_20P)
1940 {
1941 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x11);
1942
1943 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x01 + ( ch * 0x20 ), 0x01);
1944 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x02 + ( ch * 0x20 ), 0x30);
1945 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x03 + ( ch * 0x20 ), 0x0a);
1946 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x04 + ( ch * 0x20 ), 0x20);
1947 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05 + ( ch * 0x20 ), 0x0e);
1948 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x06 + ( ch * 0x20 ), 0xa6);
1949 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x07 + ( ch * 0x20 ), 0x00);
1950 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x08 + ( ch * 0x20 ), 0x96);
1951 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0a + ( ch * 0x20 ), 0x07);
1952 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0b + ( ch * 0x20 ), 0x98);
1953 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0c + ( ch * 0x20 ), 0x07);
1954 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0d + ( ch * 0x20 ), 0xbc);
1955 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0e + ( ch * 0x20 ), 0x07);
1956 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0f + ( ch * 0x20 ), 0xad);
1957 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x10 + ( ch * 0x20 ), 0x00);
1958 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x11 + ( ch * 0x20 ), 0xfa);
1959 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x12 + ( ch * 0x20 ), 0x01);
1960 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x13 + ( ch * 0x20 ), 0x22);
1961 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x14 + ( ch * 0x20 ), 0x00);
1962 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x15 + ( ch * 0x20 ), 0x6e);
1963 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x00 + ( ch * 0x20 ), 0x0f);
1964 }
1965 else if(pvin_eq_set->FmtDef == AHD20_1080P_15P_EX || pvin_eq_set->FmtDef == AHD20_1080P_12_5P_EX)
1966 {
1967 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x11);
1968 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x00 + ( ch * 0x20 ), 0x10);
1969 }
1970
1971 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF,0x09);
1972 val_9x44 = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x44);
1973 val_9x44 &= ~(1 << ch);
1974 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x44 , val_9x44);
1975
1976 if(pvin_eq_set->FmtDef == TVI_4M_15P )
1977 {
1978 gpio_i2c_write( nvp6158_iic_addr[devnum], 0xFF, 0x05 + ch );
1979 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x6E, 0x10 ); //VBLK setting
1980 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x6F, 0x7e );
1981 }
1982 else
1983 {
1984 gpio_i2c_write( nvp6158_iic_addr[devnum], 0xFF, 0x05 + ch );
1985 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x6E, 0x00 ); //VBLK default setting
1986 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x6F, 0x00 );
1987 }
1988
1989 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05 + ch);
1990 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xB8, 0x39);
1991
1992 return 0;
1993 }
1994
1995