1 /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
2 /*
3 * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
4 *
5 * author:
6 * Alpha Lin, alpha.lin@rock-chips.com
7 * Randy Li, randy.li@rock-chips.com
8 * Ding Wei, leo.ding@rock-chips.com
9 *
10 */
11 #ifndef __ROCKCHIP_MPP_COMMON_H__
12 #define __ROCKCHIP_MPP_COMMON_H__
13
14 #include <linux/cdev.h>
15 #include <linux/clk.h>
16 #include <linux/dma-buf.h>
17 #include <linux/kfifo.h>
18 #include <linux/types.h>
19 #include <linux/time.h>
20 #include <linux/workqueue.h>
21 #include <linux/kthread.h>
22 #include <linux/reset.h>
23 #include <linux/irqreturn.h>
24 #include <linux/poll.h>
25 #include <linux/platform_device.h>
26 #include <soc/rockchip/pm_domains.h>
27
28 #define MHZ (1000 * 1000)
29 #define MPP_WORK_TIMEOUT_DELAY (500)
30
31 #define MPP_MAX_MSG_NUM (16)
32 #define MPP_MAX_REG_TRANS_NUM (60)
33 #define MPP_MAX_TASK_CAPACITY (16)
34 /* define flags for mpp_request */
35 #define MPP_FLAGS_MULTI_MSG (0x00000001)
36 #define MPP_FLAGS_LAST_MSG (0x00000002)
37 #define MPP_FLAGS_REG_FD_NO_TRANS (0x00000004)
38 #define MPP_FLAGS_SCL_FD_NO_TRANS (0x00000008)
39 #define MPP_FLAGS_REG_NO_OFFSET (0x00000010)
40 #define MPP_FLAGS_SECURE_MODE (0x00010000)
41
42 /* grf mask for get value */
43 #define MPP_GRF_VAL_MASK (0xFFFF)
44
45 /* max 4 cores supported */
46 #define MPP_MAX_CORE_NUM (4)
47
48 /**
49 * Device type: classified by hardware feature
50 */
51 enum MPP_DEVICE_TYPE {
52 MPP_DEVICE_VDPU1 = 0, /* 0x00000001 */
53 MPP_DEVICE_VDPU2 = 1, /* 0x00000002 */
54 MPP_DEVICE_VDPU1_PP = 2, /* 0x00000004 */
55 MPP_DEVICE_VDPU2_PP = 3, /* 0x00000008 */
56 MPP_DEVICE_AV1DEC = 4, /* 0x00000010 */
57
58 MPP_DEVICE_HEVC_DEC = 8, /* 0x00000100 */
59 MPP_DEVICE_RKVDEC = 9, /* 0x00000200 */
60 MPP_DEVICE_AVSPLUS_DEC = 12, /* 0x00001000 */
61 MPP_DEVICE_RKJPEGD = 13, /* 0x00002000 */
62
63 MPP_DEVICE_RKVENC = 16, /* 0x00010000 */
64 MPP_DEVICE_VEPU1 = 17, /* 0x00020000 */
65 MPP_DEVICE_VEPU2 = 18, /* 0x00040000 */
66 MPP_DEVICE_VEPU2_JPEG = 19, /* 0x00080000 */
67 MPP_DEVICE_VEPU22 = 24, /* 0x01000000 */
68
69 MPP_DEVICE_IEP2 = 28, /* 0x10000000 */
70 MPP_DEVICE_VDPP = 29, /* 0x20000000 */
71 MPP_DEVICE_BUTT,
72 };
73
74 /**
75 * Driver type: classified by driver
76 */
77 enum MPP_DRIVER_TYPE {
78 MPP_DRIVER_NULL = 0,
79 MPP_DRIVER_VDPU1,
80 MPP_DRIVER_VEPU1,
81 MPP_DRIVER_VDPU2,
82 MPP_DRIVER_VEPU2,
83 MPP_DRIVER_VEPU22,
84 MPP_DRIVER_RKVDEC,
85 MPP_DRIVER_RKVENC,
86 MPP_DRIVER_IEP,
87 MPP_DRIVER_IEP2,
88 MPP_DRIVER_JPGDEC,
89 MPP_DRIVER_RKVDEC2,
90 MPP_DRIVER_RKVENC2,
91 MPP_DRIVER_AV1DEC,
92 MPP_DRIVER_VDPP,
93 MPP_DRIVER_BUTT,
94 };
95
96 /**
97 * Command type: keep the same as user space
98 */
99 enum MPP_DEV_COMMAND_TYPE {
100 MPP_CMD_QUERY_BASE = 0,
101 MPP_CMD_QUERY_HW_SUPPORT = MPP_CMD_QUERY_BASE + 0,
102 MPP_CMD_QUERY_HW_ID = MPP_CMD_QUERY_BASE + 1,
103 MPP_CMD_QUERY_CMD_SUPPORT = MPP_CMD_QUERY_BASE + 2,
104 MPP_CMD_QUERY_BUTT,
105
106 MPP_CMD_INIT_BASE = 0x100,
107 MPP_CMD_INIT_CLIENT_TYPE = MPP_CMD_INIT_BASE + 0,
108 MPP_CMD_INIT_DRIVER_DATA = MPP_CMD_INIT_BASE + 1,
109 MPP_CMD_INIT_TRANS_TABLE = MPP_CMD_INIT_BASE + 2,
110 MPP_CMD_INIT_BUTT,
111
112 MPP_CMD_SEND_BASE = 0x200,
113 MPP_CMD_SET_REG_WRITE = MPP_CMD_SEND_BASE + 0,
114 MPP_CMD_SET_REG_READ = MPP_CMD_SEND_BASE + 1,
115 MPP_CMD_SET_REG_ADDR_OFFSET = MPP_CMD_SEND_BASE + 2,
116 MPP_CMD_SET_RCB_INFO = MPP_CMD_SEND_BASE + 3,
117 MPP_CMD_SET_SESSION_FD = MPP_CMD_SEND_BASE + 4,
118 MPP_CMD_SEND_BUTT,
119
120 MPP_CMD_POLL_BASE = 0x300,
121 MPP_CMD_POLL_HW_FINISH = MPP_CMD_POLL_BASE + 0,
122 MPP_CMD_POLL_HW_IRQ = MPP_CMD_POLL_BASE + 1,
123 MPP_CMD_POLL_BUTT,
124
125 MPP_CMD_CONTROL_BASE = 0x400,
126 MPP_CMD_RESET_SESSION = MPP_CMD_CONTROL_BASE + 0,
127 MPP_CMD_TRANS_FD_TO_IOVA = MPP_CMD_CONTROL_BASE + 1,
128 MPP_CMD_RELEASE_FD = MPP_CMD_CONTROL_BASE + 2,
129 MPP_CMD_SEND_CODEC_INFO = MPP_CMD_CONTROL_BASE + 3,
130 MPP_CMD_CONTROL_BUTT,
131
132 MPP_CMD_BUTT,
133 };
134
135 enum MPP_CLOCK_MODE {
136 CLK_MODE_BASE = 0,
137 CLK_MODE_DEFAULT = CLK_MODE_BASE,
138 CLK_MODE_DEBUG,
139 CLK_MODE_REDUCE,
140 CLK_MODE_NORMAL,
141 CLK_MODE_ADVANCED,
142 CLK_MODE_BUTT,
143 };
144
145 enum MPP_RESET_TYPE {
146 RST_TYPE_BASE = 0,
147 RST_TYPE_A = RST_TYPE_BASE,
148 RST_TYPE_H,
149 RST_TYPE_NIU_A,
150 RST_TYPE_NIU_H,
151 RST_TYPE_CORE,
152 RST_TYPE_CABAC,
153 RST_TYPE_HEVC_CABAC,
154 RST_TYPE_BUTT,
155 };
156
157 enum ENC_INFO_TYPE {
158 ENC_INFO_BASE = 0,
159 ENC_INFO_WIDTH,
160 ENC_INFO_HEIGHT,
161 ENC_INFO_FORMAT,
162 ENC_INFO_FPS_IN,
163 ENC_INFO_FPS_OUT,
164 ENC_INFO_RC_MODE,
165 ENC_INFO_BITRATE,
166 ENC_INFO_GOP_SIZE,
167 ENC_INFO_FPS_CALC,
168 ENC_INFO_PROFILE,
169
170 ENC_INFO_BUTT,
171 };
172
173 enum DEC_INFO_TYPE {
174 DEC_INFO_BASE = 0,
175 DEC_INFO_WIDTH,
176 DEC_INFO_HEIGHT,
177 DEC_INFO_FORMAT,
178 DEC_INFO_BITDEPTH,
179 DEC_INFO_FPS,
180
181 DEC_INFO_BUTT,
182 };
183
184 enum CODEC_INFO_FLAGS {
185 CODEC_INFO_FLAG_NULL = 0,
186 CODEC_INFO_FLAG_NUMBER,
187 CODEC_INFO_FLAG_STRING,
188
189 CODEC_INFO_FLAG_BUTT,
190 };
191
192 struct mpp_task;
193 struct mpp_session;
194 struct mpp_dma_session;
195 struct mpp_taskqueue;
196 struct iommu_domain;
197
198 /* data common struct for parse out */
199 struct mpp_request {
200 __u32 cmd;
201 __u32 flags;
202 __u32 size;
203 __u32 offset;
204 void __user *data;
205 };
206
207 /* struct use to collect task set and poll message */
208 struct mpp_task_msgs {
209 /* for ioctl msgs bat process */
210 struct list_head list;
211 struct list_head list_session;
212
213 struct mpp_session *session;
214 struct mpp_taskqueue *queue;
215 struct mpp_task *task;
216 struct mpp_dev *mpp;
217
218 /* for fd reference */
219 int ext_fd;
220 struct fd f;
221
222 u32 flags;
223 u32 req_cnt;
224 u32 set_cnt;
225 u32 poll_cnt;
226
227 struct mpp_request reqs[MPP_MAX_MSG_NUM];
228 struct mpp_request *poll_req;
229 };
230
231 struct mpp_grf_info {
232 u32 offset;
233 u32 val;
234 struct regmap *grf;
235 };
236
237 /**
238 * struct for hardware info
239 */
240 struct mpp_hw_info {
241 /* register number */
242 u32 reg_num;
243 /* hardware id */
244 int reg_id;
245 u32 hw_id;
246 /* start index of register */
247 u32 reg_start;
248 /* end index of register */
249 u32 reg_end;
250 /* register of enable hardware */
251 int reg_en;
252 void *link_info;
253 };
254
255 struct mpp_trans_info {
256 const int count;
257 const u16 * const table;
258 };
259
260 struct reg_offset_elem {
261 u32 index;
262 u32 offset;
263 };
264
265 struct reg_offset_info {
266 u32 cnt;
267 struct reg_offset_elem elem[MPP_MAX_REG_TRANS_NUM];
268 };
269
270 struct codec_info_elem {
271 __u32 type;
272 __u32 flag;
273 __u64 data;
274 };
275
276 struct mpp_clk_info {
277 struct clk *clk;
278
279 /* debug rate, from debug */
280 u32 debug_rate_hz;
281 /* normal rate, from dtsi */
282 u32 normal_rate_hz;
283 /* high performance rate, from dtsi */
284 u32 advanced_rate_hz;
285
286 u32 default_rate_hz;
287 u32 reduce_rate_hz;
288 /* record last used rate */
289 u32 used_rate_hz;
290 u32 real_rate_hz;
291 };
292
293 struct mpp_dev_var {
294 enum MPP_DEVICE_TYPE device_type;
295
296 /* info for each hardware */
297 struct mpp_hw_info *hw_info;
298 struct mpp_trans_info *trans_info;
299 struct mpp_hw_ops *hw_ops;
300 struct mpp_dev_ops *dev_ops;
301 };
302
303 struct mpp_mem_region {
304 struct list_head reg_link;
305 /* address for iommu */
306 dma_addr_t iova;
307 unsigned long len;
308 u32 reg_idx;
309 void *hdl;
310 int fd;
311 /* whether is dup import entity */
312 bool is_dup;
313 };
314
315
316 struct mpp_dev {
317 struct device *dev;
318 const struct mpp_dev_var *var;
319 struct mpp_hw_ops *hw_ops;
320 struct mpp_dev_ops *dev_ops;
321
322 /* per-device work for attached taskqueue */
323 struct kthread_work work;
324 /* the flag for get/get/reduce freq */
325 bool auto_freq_en;
326 /* the flag for pmu idle request before device reset */
327 bool skip_idle;
328
329 /*
330 * The task capacity is the task queue length that hardware can accept.
331 * Default 1 means normal hardware can only accept one task at once.
332 */
333 u32 task_capacity;
334 /*
335 * The message capacity is the max message parallel process capacity.
336 * Default 1 means normal hardware can only accept one message at one
337 * shot ioctl.
338 * Multi-core hardware can accept more message at one shot ioctl.
339 */
340 u32 msgs_cap;
341
342 int irq;
343 bool is_irq_startup;
344 u32 irq_status;
345
346 void __iomem *reg_base;
347 struct mpp_grf_info *grf_info;
348 struct mpp_iommu_info *iommu_info;
349 int (*fault_handler)(struct iommu_domain *iommu, struct device *iommu_dev,
350 unsigned long iova, int status, void *arg);
351 resource_size_t io_base;
352
353 atomic_t reset_request;
354 atomic_t session_index;
355 atomic_t task_count;
356 atomic_t task_index;
357 /* current task in running */
358 struct mpp_task *cur_task;
359 /* set session max buffers */
360 u32 session_max_buffers;
361 struct mpp_taskqueue *queue;
362 struct mpp_reset_group *reset_group;
363 /* point to MPP Service */
364 struct mpp_service *srv;
365
366 /* multi-core data */
367 struct list_head queue_link;
368 s32 core_id;
369
370 /* common per-device procfs */
371 u32 disable;
372 u32 timing_check;
373 };
374
375 struct mpp_session {
376 enum MPP_DEVICE_TYPE device_type;
377 u32 index;
378 /* the session related device private data */
379 struct mpp_service *srv;
380 struct mpp_dev *mpp;
381 struct mpp_dma_session *dma;
382
383 /* lock for session task pending list */
384 struct mutex pending_lock;
385 /* task pending list in session */
386 struct list_head pending_list;
387
388 pid_t pid;
389 atomic_t task_count;
390 atomic_t release_request;
391 /* trans info set by user */
392 int trans_count;
393 u16 trans_table[MPP_MAX_REG_TRANS_NUM];
394 u32 msg_flags;
395 /* link to mpp_service session_list */
396 struct list_head service_link;
397 /* link to mpp_workqueue session_attach / session_detach */
398 struct list_head session_link;
399 /* private data */
400 void *priv;
401
402 /*
403 * session handler from mpp_dev_ops
404 * process_task - handle messages of sending task
405 * wait_result - handle messages of polling task
406 * deinit - handle session deinit
407 */
408 int (*process_task)(struct mpp_session *session,
409 struct mpp_task_msgs *msgs);
410 int (*wait_result)(struct mpp_session *session,
411 struct mpp_task_msgs *msgs);
412 void (*deinit)(struct mpp_session *session);
413
414 /* max message count */
415 int msgs_cnt;
416 struct list_head list_msgs;
417 struct list_head list_msgs_idle;
418 spinlock_t lock_msgs;
419 };
420
421 /* task state in work thread */
422 enum mpp_task_state {
423 TASK_STATE_PENDING = 0,
424 TASK_STATE_RUNNING = 1,
425 TASK_STATE_START = 2,
426 TASK_STATE_HANDLE = 3,
427 TASK_STATE_IRQ = 4,
428 TASK_STATE_FINISH = 5,
429 TASK_STATE_TIMEOUT = 6,
430 TASK_STATE_DONE = 7,
431
432 TASK_STATE_PREPARE = 8,
433 TASK_STATE_ABORT = 9,
434 TASK_STATE_ABORT_READY = 10,
435 TASK_STATE_PROC_DONE = 11,
436
437 /* timing debug state */
438 TASK_TIMING_CREATE = 16,
439 TASK_TIMING_CREATE_END = 17,
440 TASK_TIMING_PENDING = 18,
441 TASK_TIMING_RUN = 19,
442 TASK_TIMING_TO_SCHED = 20,
443 TASK_TIMING_RUN_END = 21,
444 TASK_TIMING_IRQ = 22,
445 TASK_TIMING_TO_CANCEL = 23,
446 TASK_TIMING_ISR = 24,
447 TASK_TIMING_FINISH = 25,
448 };
449
450 /* The context for the a task */
451 struct mpp_task {
452 /* context belong to */
453 struct mpp_session *session;
454
455 /* link to pending list in session */
456 struct list_head pending_link;
457 /* link to done list in session */
458 struct list_head done_link;
459 /* link to list in taskqueue */
460 struct list_head queue_link;
461 /* The DMA buffer used in this task */
462 struct list_head mem_region_list;
463 u32 mem_count;
464 struct mpp_mem_region mem_regions[MPP_MAX_REG_TRANS_NUM];
465
466 /* state in the taskqueue */
467 unsigned long state;
468 atomic_t abort_request;
469 /* delayed work for hardware timeout */
470 struct delayed_work timeout_work;
471 struct kref ref;
472
473 /* record context running start time */
474 ktime_t start;
475 ktime_t part;
476
477 /* debug timing */
478 ktime_t on_create;
479 ktime_t on_create_end;
480 ktime_t on_pending;
481 ktime_t on_run;
482 ktime_t on_sched_timeout;
483 ktime_t on_run_end;
484 ktime_t on_irq;
485 ktime_t on_cancel_timeout;
486 ktime_t on_isr;
487 ktime_t on_finish;
488
489 /* hardware info for current task */
490 struct mpp_hw_info *hw_info;
491 u32 task_index;
492 u32 task_id;
493 u32 *reg;
494 /* event for session wait thread */
495 wait_queue_head_t wait;
496
497 /* for multi-core */
498 struct mpp_dev *mpp;
499 s32 core_id;
500 /* hw cycles */
501 u32 hw_cycles;
502 };
503
504 struct mpp_taskqueue {
505 /* kworker for attached taskqueue */
506 struct kthread_worker worker;
507 /* task for work queue */
508 struct task_struct *kworker_task;
509
510 /* lock for session attach and session_detach */
511 struct mutex session_lock;
512 /* link to session session_link for attached sessions */
513 struct list_head session_attach;
514 /* link to session session_link for detached sessions */
515 struct list_head session_detach;
516 atomic_t detach_count;
517
518 atomic_t task_id;
519 /* lock for pending list */
520 struct mutex pending_lock;
521 struct list_head pending_list;
522 /* lock for running list */
523 spinlock_t running_lock;
524 struct list_head running_list;
525
526 /* point to MPP Service */
527 struct mpp_service *srv;
528 /* lock for mmu list */
529 struct mutex mmu_lock;
530 struct list_head mmu_list;
531 /* lock for dev list */
532 struct mutex dev_lock;
533 struct list_head dev_list;
534 /*
535 * task_capacity in taskqueue is the minimum task capacity of the
536 * device task capacity which is attached to the taskqueue
537 */
538 u32 task_capacity;
539
540 /* multi-core task distribution */
541 atomic_t reset_request;
542 struct mpp_dev *cores[MPP_MAX_CORE_NUM];
543 unsigned long core_idle;
544 u32 core_id_max;
545 u32 core_count;
546 unsigned long dev_active_flags;
547 u32 iommu_fault;
548 };
549
550 struct mpp_reset_group {
551 /* the flag for whether use rw_sem */
552 u32 rw_sem_on;
553 struct rw_semaphore rw_sem;
554 struct reset_control *resets[RST_TYPE_BUTT];
555 /* for set rw_sem */
556 struct mpp_taskqueue *queue;
557 };
558
559 struct mpp_service {
560 struct class *cls;
561 struct device *dev;
562 dev_t dev_id;
563 struct cdev mpp_cdev;
564 struct device *child_dev;
565 #ifdef CONFIG_ROCKCHIP_MPP_PROC_FS
566 struct proc_dir_entry *procfs;
567 #endif
568 unsigned long hw_support;
569 atomic_t shutdown_request;
570 /* follows for device probe */
571 struct mpp_grf_info grf_infos[MPP_DRIVER_BUTT];
572 struct platform_driver *sub_drivers[MPP_DRIVER_BUTT];
573 /* follows for attach service */
574 struct mpp_dev *sub_devices[MPP_DEVICE_BUTT];
575 u32 taskqueue_cnt;
576 struct mpp_taskqueue *task_queues[MPP_DEVICE_BUTT];
577 u32 reset_group_cnt;
578 struct mpp_reset_group *reset_groups[MPP_DEVICE_BUTT];
579
580 /* lock for session list */
581 struct mutex session_lock;
582 struct list_head session_list;
583 u32 session_count;
584
585 /* global timing record flag */
586 u32 timing_en;
587 };
588
589 /*
590 * struct mpp_hw_ops - context specific operations for device
591 * @init Do something when hardware probe.
592 * @exit Do something when hardware remove.
593 * @clk_on Enable clocks.
594 * @clk_off Disable clocks.
595 * @get_freq Get special freq for setting.
596 * @set_freq Set freq to hardware.
597 * @reduce_freq Reduce freq when hardware is not running.
598 * @reset When error, reset hardware.
599 */
600 struct mpp_hw_ops {
601 int (*init)(struct mpp_dev *mpp);
602 int (*exit)(struct mpp_dev *mpp);
603 int (*clk_on)(struct mpp_dev *mpp);
604 int (*clk_off)(struct mpp_dev *mpp);
605 int (*get_freq)(struct mpp_dev *mpp,
606 struct mpp_task *mpp_task);
607 int (*set_freq)(struct mpp_dev *mpp,
608 struct mpp_task *mpp_task);
609 int (*reduce_freq)(struct mpp_dev *mpp);
610 int (*reset)(struct mpp_dev *mpp);
611 int (*set_grf)(struct mpp_dev *mpp);
612 };
613
614 /*
615 * struct mpp_dev_ops - context specific operations for task
616 * @alloc_task Alloc and set task.
617 * @prepare Check HW status for determining run next task or not.
618 * @run Start a single {en,de}coding run. Set registers to hardware.
619 * @irq Deal with hardware interrupt top-half.
620 * @isr Deal with hardware interrupt bottom-half.
621 * @finish Read back processing results and additional data from hardware.
622 * @result Read status to userspace.
623 * @free_task Release the resource allocate which alloc.
624 * @ioctl Special cammand from userspace.
625 * @init_session extra initialization on session init.
626 * @free_session extra cleanup on session deinit.
627 * @dump_session information dump for session.
628 * @dump_dev information dump for hardware device.
629 */
630 struct mpp_dev_ops {
631 int (*process_task)(struct mpp_session *session,
632 struct mpp_task_msgs *msgs);
633 int (*wait_result)(struct mpp_session *session,
634 struct mpp_task_msgs *msgs);
635 void (*deinit)(struct mpp_session *session);
636 void (*task_worker)(struct kthread_work *work_s);
637
638 void *(*alloc_task)(struct mpp_session *session,
639 struct mpp_task_msgs *msgs);
640 void *(*prepare)(struct mpp_dev *mpp, struct mpp_task *task);
641 int (*run)(struct mpp_dev *mpp, struct mpp_task *task);
642 int (*irq)(struct mpp_dev *mpp);
643 int (*isr)(struct mpp_dev *mpp);
644 int (*finish)(struct mpp_dev *mpp, struct mpp_task *task);
645 int (*result)(struct mpp_dev *mpp, struct mpp_task *task,
646 struct mpp_task_msgs *msgs);
647 int (*free_task)(struct mpp_session *session,
648 struct mpp_task *task);
649 int (*ioctl)(struct mpp_session *session, struct mpp_request *req);
650 int (*init_session)(struct mpp_session *session);
651 int (*free_session)(struct mpp_session *session);
652 int (*dump_session)(struct mpp_session *session, struct seq_file *seq);
653 int (*dump_dev)(struct mpp_dev *mpp);
654 };
655
656 struct mpp_taskqueue *mpp_taskqueue_init(struct device *dev);
657
658 struct mpp_mem_region *
659 mpp_task_attach_fd(struct mpp_task *task, int fd);
660 int mpp_translate_reg_address(struct mpp_session *session,
661 struct mpp_task *task, int fmt,
662 u32 *reg, struct reg_offset_info *off_inf);
663
664 int mpp_check_req(struct mpp_request *req, int base,
665 int max_size, u32 off_s, u32 off_e);
666 int mpp_extract_reg_offset_info(struct reg_offset_info *off_inf,
667 struct mpp_request *req);
668 int mpp_query_reg_offset_info(struct reg_offset_info *off_inf,
669 u32 index);
670 int mpp_translate_reg_offset_info(struct mpp_task *task,
671 struct reg_offset_info *off_inf,
672 u32 *reg);
673 int mpp_task_init(struct mpp_session *session,
674 struct mpp_task *task);
675 int mpp_task_finish(struct mpp_session *session,
676 struct mpp_task *task);
677 void mpp_task_run_begin(struct mpp_task *task, u32 timing_en, u32 timeout);
678 void mpp_task_run_end(struct mpp_task *task, u32 timing_en);
679 int mpp_task_finalize(struct mpp_session *session,
680 struct mpp_task *task);
681 int mpp_task_dump_mem_region(struct mpp_dev *mpp,
682 struct mpp_task *task);
683 int mpp_task_dump_reg(struct mpp_dev *mpp,
684 struct mpp_task *task);
685 int mpp_task_dump_hw_reg(struct mpp_dev *mpp);
686 void mpp_task_dump_timing(struct mpp_task *task, s64 time_diff);
687
688 void mpp_reg_show(struct mpp_dev *mpp, u32 offset);
689 void mpp_reg_show_range(struct mpp_dev *mpp, u32 start, u32 end);
690 void mpp_free_task(struct kref *ref);
691
692 void mpp_session_deinit(struct mpp_session *session);
693 void mpp_session_cleanup_detach(struct mpp_taskqueue *queue,
694 struct kthread_work *work);
695
696 int mpp_taskqueue_pending_to_run(struct mpp_taskqueue *queue, struct mpp_task *task);
697
698 int mpp_dev_probe(struct mpp_dev *mpp,
699 struct platform_device *pdev);
700 int mpp_dev_remove(struct mpp_dev *mpp);
701 void mpp_dev_shutdown(struct platform_device *pdev);
702 int mpp_dev_register_srv(struct mpp_dev *mpp, struct mpp_service *srv);
703
704 int mpp_power_on(struct mpp_dev *mpp);
705 int mpp_power_off(struct mpp_dev *mpp);
706 int mpp_dev_reset(struct mpp_dev *mpp);
707
708 irqreturn_t mpp_dev_irq(int irq, void *param);
709 irqreturn_t mpp_dev_isr_sched(int irq, void *param);
710
711 struct reset_control *mpp_reset_control_get(struct mpp_dev *mpp,
712 enum MPP_RESET_TYPE type,
713 const char *name);
714
715 u32 mpp_get_grf(struct mpp_grf_info *grf_info);
716 bool mpp_grf_is_changed(struct mpp_grf_info *grf_info);
717 int mpp_set_grf(struct mpp_grf_info *grf_info);
718
719 int mpp_time_record(struct mpp_task *task);
720 int mpp_time_diff(struct mpp_task *task);
721 int mpp_time_diff_with_hw_time(struct mpp_task *task, u32 clk_hz);
722 int mpp_time_part_diff(struct mpp_task *task);
723
724 int mpp_write_req(struct mpp_dev *mpp, u32 *regs,
725 u32 start_idx, u32 end_idx, u32 en_idx);
726 int mpp_read_req(struct mpp_dev *mpp, u32 *regs,
727 u32 start_idx, u32 end_idx);
728
729 int mpp_get_clk_info(struct mpp_dev *mpp,
730 struct mpp_clk_info *clk_info,
731 const char *name);
732 int mpp_set_clk_info_rate_hz(struct mpp_clk_info *clk_info,
733 enum MPP_CLOCK_MODE mode,
734 unsigned long val);
735 unsigned long mpp_get_clk_info_rate_hz(struct mpp_clk_info *clk_info,
736 enum MPP_CLOCK_MODE mode);
737 int mpp_clk_set_rate(struct mpp_clk_info *clk_info,
738 enum MPP_CLOCK_MODE mode);
739
mpp_write(struct mpp_dev * mpp,u32 reg,u32 val)740 static inline int mpp_write(struct mpp_dev *mpp, u32 reg, u32 val)
741 {
742 int idx = reg / sizeof(u32);
743
744 mpp_debug(DEBUG_SET_REG,
745 "write reg[%03d]: %04x: 0x%08x\n", idx, reg, val);
746 writel(val, mpp->reg_base + reg);
747
748 return 0;
749 }
750
mpp_write_relaxed(struct mpp_dev * mpp,u32 reg,u32 val)751 static inline int mpp_write_relaxed(struct mpp_dev *mpp, u32 reg, u32 val)
752 {
753 int idx = reg / sizeof(u32);
754
755 mpp_debug(DEBUG_SET_REG,
756 "write reg[%03d]: %04x: 0x%08x\n", idx, reg, val);
757 writel_relaxed(val, mpp->reg_base + reg);
758
759 return 0;
760 }
761
mpp_read(struct mpp_dev * mpp,u32 reg)762 static inline u32 mpp_read(struct mpp_dev *mpp, u32 reg)
763 {
764 u32 val = 0;
765 int idx = reg / sizeof(u32);
766
767 val = readl(mpp->reg_base + reg);
768 mpp_debug(DEBUG_GET_REG,
769 "read reg[%03d]: %04x: 0x%08x\n", idx, reg, val);
770
771 return val;
772 }
773
mpp_read_relaxed(struct mpp_dev * mpp,u32 reg)774 static inline u32 mpp_read_relaxed(struct mpp_dev *mpp, u32 reg)
775 {
776 u32 val = 0;
777 int idx = reg / sizeof(u32);
778
779 val = readl_relaxed(mpp->reg_base + reg);
780 mpp_debug(DEBUG_GET_REG,
781 "read reg[%03d] %04x: 0x%08x\n", idx, reg, val);
782
783 return val;
784 }
785
mpp_safe_reset(struct reset_control * rst)786 static inline int mpp_safe_reset(struct reset_control *rst)
787 {
788 if (rst)
789 reset_control_assert(rst);
790
791 return 0;
792 }
793
mpp_safe_unreset(struct reset_control * rst)794 static inline int mpp_safe_unreset(struct reset_control *rst)
795 {
796 if (rst)
797 reset_control_deassert(rst);
798
799 return 0;
800 }
801
mpp_clk_safe_enable(struct clk * clk)802 static inline int mpp_clk_safe_enable(struct clk *clk)
803 {
804 if (clk)
805 clk_prepare_enable(clk);
806
807 return 0;
808 }
809
mpp_clk_safe_disable(struct clk * clk)810 static inline int mpp_clk_safe_disable(struct clk *clk)
811 {
812 if (clk)
813 clk_disable_unprepare(clk);
814
815 return 0;
816 }
817
mpp_reset_down_read(struct mpp_reset_group * group)818 static inline int mpp_reset_down_read(struct mpp_reset_group *group)
819 {
820 if (group && group->rw_sem_on)
821 down_read(&group->rw_sem);
822
823 return 0;
824 }
825
mpp_reset_up_read(struct mpp_reset_group * group)826 static inline int mpp_reset_up_read(struct mpp_reset_group *group)
827 {
828 if (group && group->rw_sem_on)
829 up_read(&group->rw_sem);
830
831 return 0;
832 }
833
mpp_reset_down_write(struct mpp_reset_group * group)834 static inline int mpp_reset_down_write(struct mpp_reset_group *group)
835 {
836 if (group && group->rw_sem_on)
837 down_write(&group->rw_sem);
838
839 return 0;
840 }
841
mpp_reset_up_write(struct mpp_reset_group * group)842 static inline int mpp_reset_up_write(struct mpp_reset_group *group)
843 {
844 if (group && group->rw_sem_on)
845 up_write(&group->rw_sem);
846
847 return 0;
848 }
849
mpp_pmu_idle_request(struct mpp_dev * mpp,bool idle)850 static inline int mpp_pmu_idle_request(struct mpp_dev *mpp, bool idle)
851 {
852 if (mpp->skip_idle)
853 return 0;
854
855 return rockchip_pmu_idle_request(mpp->dev, idle);
856 }
857
858 static inline struct mpp_dev *
mpp_get_task_used_device(const struct mpp_task * task,const struct mpp_session * session)859 mpp_get_task_used_device(const struct mpp_task *task,
860 const struct mpp_session *session)
861 {
862 return task->mpp ? task->mpp : session->mpp;
863 }
864
865 #ifdef CONFIG_ROCKCHIP_MPP_PROC_FS
866 struct proc_dir_entry *
867 mpp_procfs_create_u32(const char *name, umode_t mode,
868 struct proc_dir_entry *parent, void *data);
869 void mpp_procfs_create_common(struct proc_dir_entry *parent, struct mpp_dev *mpp);
870 #else
871 static inline struct proc_dir_entry *
mpp_procfs_create_u32(const char * name,umode_t mode,struct proc_dir_entry * parent,void * data)872 mpp_procfs_create_u32(const char *name, umode_t mode,
873 struct proc_dir_entry *parent, void *data)
874 {
875 return 0;
876 }
mpp_procfs_create_common(struct proc_dir_entry * parent,struct mpp_dev * mpp)877 void mpp_procfs_create_common(struct proc_dir_entry *parent, struct mpp_dev *mpp)
878 {
879 }
880 #endif
881
882 #ifdef CONFIG_ROCKCHIP_MPP_PROC_FS
883 extern const char *mpp_device_name[MPP_DEVICE_BUTT];
884 extern const char *enc_info_item_name[ENC_INFO_BUTT];
885 #endif
886
887 extern const struct file_operations rockchip_mpp_fops;
888
889 extern struct platform_driver rockchip_rkvdec_driver;
890 extern struct platform_driver rockchip_rkvenc_driver;
891 extern struct platform_driver rockchip_vdpu1_driver;
892 extern struct platform_driver rockchip_vepu1_driver;
893 extern struct platform_driver rockchip_vdpu2_driver;
894 extern struct platform_driver rockchip_vepu2_driver;
895 extern struct platform_driver rockchip_vepu22_driver;
896 extern struct platform_driver rockchip_iep2_driver;
897 extern struct platform_driver rockchip_jpgdec_driver;
898 extern struct platform_driver rockchip_rkvdec2_driver;
899 extern struct platform_driver rockchip_rkvenc2_driver;
900 extern struct platform_driver rockchip_av1dec_driver;
901 extern struct platform_driver rockchip_av1_iommu_driver;
902
903 extern int av1dec_driver_register(struct platform_driver *drv);
904 extern void av1dec_driver_unregister(struct platform_driver *drv);
905 extern struct bus_type av1dec_bus;
906 extern struct platform_driver rockchip_vdpp_driver;
907
908 #endif
909