1 /*
2 * Copyright 2018 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26 #include "mod_info_packet.h"
27 #include "core_types.h"
28 #include "dc_types.h"
29 #include "mod_shared.h"
30 #include "mod_freesync.h"
31 #include "dc.h"
32
33 enum vsc_packet_revision {
34 vsc_packet_undefined = 0,
35 //01h = VSC SDP supports only 3D stereo.
36 vsc_packet_rev1 = 1,
37 //02h = 3D stereo + PSR.
38 vsc_packet_rev2 = 2,
39 //03h = 3D stereo + PSR2.
40 vsc_packet_rev3 = 3,
41 //04h = 3D stereo + PSR/PSR2 + Y-coordinate.
42 vsc_packet_rev4 = 4,
43 //05h = 3D stereo + PSR/PSR2 + Y-coordinate + Pixel Encoding/Colorimetry Format
44 vsc_packet_rev5 = 5,
45 };
46
47 #define HDMI_INFOFRAME_TYPE_VENDOR 0x81
48 #define HF_VSIF_VERSION 1
49
50 // VTEM Byte Offset
51 #define VTEM_PB0 0
52 #define VTEM_PB1 1
53 #define VTEM_PB2 2
54 #define VTEM_PB3 3
55 #define VTEM_PB4 4
56 #define VTEM_PB5 5
57 #define VTEM_PB6 6
58
59 #define VTEM_MD0 7
60 #define VTEM_MD1 8
61 #define VTEM_MD2 9
62 #define VTEM_MD3 10
63
64
65 // VTEM Byte Masks
66 //PB0
67 #define MASK_VTEM_PB0__RESERVED0 0x01
68 #define MASK_VTEM_PB0__SYNC 0x02
69 #define MASK_VTEM_PB0__VFR 0x04
70 #define MASK_VTEM_PB0__AFR 0x08
71 #define MASK_VTEM_PB0__DS_TYPE 0x30
72 //0: Periodic pseudo-static EM Data Set
73 //1: Periodic dynamic EM Data Set
74 //2: Unique EM Data Set
75 //3: Reserved
76 #define MASK_VTEM_PB0__END 0x40
77 #define MASK_VTEM_PB0__NEW 0x80
78
79 //PB1
80 #define MASK_VTEM_PB1__RESERVED1 0xFF
81
82 //PB2
83 #define MASK_VTEM_PB2__ORGANIZATION_ID 0xFF
84 //0: This is a Vendor Specific EM Data Set
85 //1: This EM Data Set is defined by This Specification (HDMI 2.1 r102.clean)
86 //2: This EM Data Set is defined by CTA-861-G
87 //3: This EM Data Set is defined by VESA
88 //PB3
89 #define MASK_VTEM_PB3__DATA_SET_TAG_MSB 0xFF
90 //PB4
91 #define MASK_VTEM_PB4__DATA_SET_TAG_LSB 0xFF
92 //PB5
93 #define MASK_VTEM_PB5__DATA_SET_LENGTH_MSB 0xFF
94 //PB6
95 #define MASK_VTEM_PB6__DATA_SET_LENGTH_LSB 0xFF
96
97
98
99 //PB7-27 (20 bytes):
100 //PB7 = MD0
101 #define MASK_VTEM_MD0__VRR_EN 0x01
102 #define MASK_VTEM_MD0__M_CONST 0x02
103 #define MASK_VTEM_MD0__QMS_EN 0x04
104 #define MASK_VTEM_MD0__RESERVED2 0x08
105 #define MASK_VTEM_MD0__FVA_FACTOR_M1 0xF0
106
107 //MD1
108 #define MASK_VTEM_MD1__BASE_VFRONT 0xFF
109
110 //MD2
111 #define MASK_VTEM_MD2__BASE_REFRESH_RATE_98 0x03
112 #define MASK_VTEM_MD2__RB 0x04
113 #define MASK_VTEM_MD2__NEXT_TFR 0xF8
114
115 //MD3
116 #define MASK_VTEM_MD3__BASE_REFRESH_RATE_07 0xFF
117
118 enum ColorimetryRGBDP {
119 ColorimetryRGB_DP_sRGB = 0,
120 ColorimetryRGB_DP_AdobeRGB = 3,
121 ColorimetryRGB_DP_P3 = 4,
122 ColorimetryRGB_DP_CustomColorProfile = 5,
123 ColorimetryRGB_DP_ITU_R_BT2020RGB = 6,
124 };
125 enum ColorimetryYCCDP {
126 ColorimetryYCC_DP_ITU601 = 0,
127 ColorimetryYCC_DP_ITU709 = 1,
128 ColorimetryYCC_DP_AdobeYCC = 5,
129 ColorimetryYCC_DP_ITU2020YCC = 6,
130 ColorimetryYCC_DP_ITU2020YCbCr = 7,
131 };
132
mod_build_vsc_infopacket(const struct dc_stream_state * stream,struct dc_info_packet * info_packet)133 void mod_build_vsc_infopacket(const struct dc_stream_state *stream,
134 struct dc_info_packet *info_packet)
135 {
136 unsigned int vsc_packet_revision = vsc_packet_undefined;
137 unsigned int i;
138 unsigned int pixelEncoding = 0;
139 unsigned int colorimetryFormat = 0;
140 bool stereo3dSupport = false;
141
142 if (stream->timing.timing_3d_format != TIMING_3D_FORMAT_NONE && stream->view_format != VIEW_3D_FORMAT_NONE) {
143 vsc_packet_revision = vsc_packet_rev1;
144 stereo3dSupport = true;
145 }
146
147 /*VSC packet set to 2 when DP revision >= 1.2*/
148 if (stream->link->psr_settings.psr_version != DC_PSR_VERSION_UNSUPPORTED)
149 vsc_packet_revision = vsc_packet_rev2;
150
151 /* Update to revision 5 for extended colorimetry support */
152 if (stream->use_vsc_sdp_for_colorimetry)
153 vsc_packet_revision = vsc_packet_rev5;
154
155 /* VSC packet not needed based on the features
156 * supported by this DP display
157 */
158 if (vsc_packet_revision == vsc_packet_undefined)
159 return;
160
161 if (vsc_packet_revision == vsc_packet_rev2) {
162 /* Secondary-data Packet ID = 0*/
163 info_packet->hb0 = 0x00;
164 /* 07h - Packet Type Value indicating Video
165 * Stream Configuration packet
166 */
167 info_packet->hb1 = 0x07;
168 /* 02h = VSC SDP supporting 3D stereo and PSR
169 * (applies to eDP v1.3 or higher).
170 */
171 info_packet->hb2 = 0x02;
172 /* 08h = VSC packet supporting 3D stereo + PSR
173 * (HB2 = 02h).
174 */
175 info_packet->hb3 = 0x08;
176
177 for (i = 0; i < 28; i++)
178 info_packet->sb[i] = 0;
179
180 info_packet->valid = true;
181 }
182
183 if (vsc_packet_revision == vsc_packet_rev1) {
184
185 info_packet->hb0 = 0x00; // Secondary-data Packet ID = 0
186 info_packet->hb1 = 0x07; // 07h = Packet Type Value indicating Video Stream Configuration packet
187 info_packet->hb2 = 0x01; // 01h = Revision number. VSC SDP supporting 3D stereo only
188 info_packet->hb3 = 0x01; // 01h = VSC SDP supporting 3D stereo only (HB2 = 01h).
189
190 info_packet->valid = true;
191 }
192
193 if (stereo3dSupport) {
194 /* ==============================================================================================================|
195 * A. STEREO 3D
196 * ==============================================================================================================|
197 * VSC Payload (1 byte) From DP1.2 spec
198 *
199 * Bits 3:0 (Stereo Interface Method Code) | Bits 7:4 (Stereo Interface Method Specific Parameter)
200 * -----------------------------------------------------------------------------------------------------
201 * 0 = Non Stereo Video | Must be set to 0x0
202 * -----------------------------------------------------------------------------------------------------
203 * 1 = Frame/Field Sequential | 0x0: L + R view indication based on MISC1 bit 2:1
204 * | 0x1: Right when Stereo Signal = 1
205 * | 0x2: Left when Stereo Signal = 1
206 * | (others reserved)
207 * -----------------------------------------------------------------------------------------------------
208 * 2 = Stacked Frame | 0x0: Left view is on top and right view on bottom
209 * | (others reserved)
210 * -----------------------------------------------------------------------------------------------------
211 * 3 = Pixel Interleaved | 0x0: horiz interleaved, right view pixels on even lines
212 * | 0x1: horiz interleaved, right view pixels on odd lines
213 * | 0x2: checker board, start with left view pixel
214 * | 0x3: vertical interleaved, start with left view pixels
215 * | 0x4: vertical interleaved, start with right view pixels
216 * | (others reserved)
217 * -----------------------------------------------------------------------------------------------------
218 * 4 = Side-by-side | 0x0: left half represents left eye view
219 * | 0x1: left half represents right eye view
220 */
221 switch (stream->timing.timing_3d_format) {
222 case TIMING_3D_FORMAT_HW_FRAME_PACKING:
223 case TIMING_3D_FORMAT_SW_FRAME_PACKING:
224 case TIMING_3D_FORMAT_TOP_AND_BOTTOM:
225 case TIMING_3D_FORMAT_TB_SW_PACKED:
226 info_packet->sb[0] = 0x02; // Stacked Frame, Left view is on top and right view on bottom.
227 break;
228 case TIMING_3D_FORMAT_DP_HDMI_INBAND_FA:
229 case TIMING_3D_FORMAT_INBAND_FA:
230 info_packet->sb[0] = 0x01; // Frame/Field Sequential, L + R view indication based on MISC1 bit 2:1
231 break;
232 case TIMING_3D_FORMAT_SIDE_BY_SIDE:
233 case TIMING_3D_FORMAT_SBS_SW_PACKED:
234 info_packet->sb[0] = 0x04; // Side-by-side
235 break;
236 default:
237 info_packet->sb[0] = 0x00; // No Stereo Video, Shall be cleared to 0x0.
238 break;
239 }
240
241 }
242
243 /* 05h = VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/Colorimetry Format indication.
244 * Added in DP1.3, a DP Source device is allowed to indicate the pixel encoding/colorimetry
245 * format to the DP Sink device with VSC SDP only when the DP Sink device supports it
246 * (i.e., VSC_SDP_EXTENSION_FOR_COLORIMETRY_SUPPORTED bit in the DPRX_FEATURE_ENUMERATION_LIST
247 * register (DPCD Address 02210h, bit 3) is set to 1).
248 * (Requires VSC_SDP_EXTENSION_FOR_COLORIMETRY_SUPPORTED bit set to 1 in DPCD 02210h. This
249 * DPCD register is exposed in the new Extended Receiver Capability field for DPCD Rev. 1.4
250 * (and higher). When MISC1. bit 6. is Set to 1, a Source device uses a VSC SDP to indicate
251 * the Pixel Encoding/Colorimetry Format and that a Sink device must ignore MISC1, bit 7, and
252 * MISC0, bits 7:1 (MISC1, bit 7. and MISC0, bits 7:1 become "don't care").)
253 */
254 if (vsc_packet_revision == vsc_packet_rev5) {
255 /* Secondary-data Packet ID = 0 */
256 info_packet->hb0 = 0x00;
257 /* 07h - Packet Type Value indicating Video Stream Configuration packet */
258 info_packet->hb1 = 0x07;
259 /* 05h = VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/Colorimetry Format indication. */
260 info_packet->hb2 = 0x05;
261 /* 13h = VSC SDP supporting 3D stereo, + PSR2, + Pixel Encoding/Colorimetry Format indication (HB2 = 05h). */
262 info_packet->hb3 = 0x13;
263
264 info_packet->valid = true;
265
266 /* Set VSC SDP fields for pixel encoding and colorimetry format from DP 1.3 specs
267 * Data Bytes DB 18~16
268 * Bits 3:0 (Colorimetry Format) | Bits 7:4 (Pixel Encoding)
269 * ----------------------------------------------------------------------------------------------------
270 * 0x0 = sRGB | 0 = RGB
271 * 0x1 = RGB Wide Gamut Fixed Point
272 * 0x2 = RGB Wide Gamut Floating Point
273 * 0x3 = AdobeRGB
274 * 0x4 = DCI-P3
275 * 0x5 = CustomColorProfile
276 * (others reserved)
277 * ----------------------------------------------------------------------------------------------------
278 * 0x0 = ITU-R BT.601 | 1 = YCbCr444
279 * 0x1 = ITU-R BT.709
280 * 0x2 = xvYCC601
281 * 0x3 = xvYCC709
282 * 0x4 = sYCC601
283 * 0x5 = AdobeYCC601
284 * 0x6 = ITU-R BT.2020 Y'cC'bcC'rc
285 * 0x7 = ITU-R BT.2020 Y'C'bC'r
286 * (others reserved)
287 * ----------------------------------------------------------------------------------------------------
288 * 0x0 = ITU-R BT.601 | 2 = YCbCr422
289 * 0x1 = ITU-R BT.709
290 * 0x2 = xvYCC601
291 * 0x3 = xvYCC709
292 * 0x4 = sYCC601
293 * 0x5 = AdobeYCC601
294 * 0x6 = ITU-R BT.2020 Y'cC'bcC'rc
295 * 0x7 = ITU-R BT.2020 Y'C'bC'r
296 * (others reserved)
297 * ----------------------------------------------------------------------------------------------------
298 * 0x0 = ITU-R BT.601 | 3 = YCbCr420
299 * 0x1 = ITU-R BT.709
300 * 0x2 = xvYCC601
301 * 0x3 = xvYCC709
302 * 0x4 = sYCC601
303 * 0x5 = AdobeYCC601
304 * 0x6 = ITU-R BT.2020 Y'cC'bcC'rc
305 * 0x7 = ITU-R BT.2020 Y'C'bC'r
306 * (others reserved)
307 * ----------------------------------------------------------------------------------------------------
308 * 0x0 =DICOM Part14 Grayscale | 4 = Yonly
309 * Display Function
310 * (others reserved)
311 */
312
313 /* Set Pixel Encoding */
314 switch (stream->timing.pixel_encoding) {
315 case PIXEL_ENCODING_RGB:
316 pixelEncoding = 0x0; /* RGB = 0h */
317 break;
318 case PIXEL_ENCODING_YCBCR444:
319 pixelEncoding = 0x1; /* YCbCr444 = 1h */
320 break;
321 case PIXEL_ENCODING_YCBCR422:
322 pixelEncoding = 0x2; /* YCbCr422 = 2h */
323 break;
324 case PIXEL_ENCODING_YCBCR420:
325 pixelEncoding = 0x3; /* YCbCr420 = 3h */
326 break;
327 default:
328 pixelEncoding = 0x0; /* default RGB = 0h */
329 break;
330 }
331
332 /* Set Colorimetry format based on pixel encoding */
333 switch (stream->timing.pixel_encoding) {
334 case PIXEL_ENCODING_RGB:
335 if ((stream->output_color_space == COLOR_SPACE_SRGB) ||
336 (stream->output_color_space == COLOR_SPACE_SRGB_LIMITED))
337 colorimetryFormat = ColorimetryRGB_DP_sRGB;
338 else if (stream->output_color_space == COLOR_SPACE_ADOBERGB)
339 colorimetryFormat = ColorimetryRGB_DP_AdobeRGB;
340 else if ((stream->output_color_space == COLOR_SPACE_2020_RGB_FULLRANGE) ||
341 (stream->output_color_space == COLOR_SPACE_2020_RGB_LIMITEDRANGE))
342 colorimetryFormat = ColorimetryRGB_DP_ITU_R_BT2020RGB;
343 break;
344
345 case PIXEL_ENCODING_YCBCR444:
346 case PIXEL_ENCODING_YCBCR422:
347 case PIXEL_ENCODING_YCBCR420:
348 /* Note: xvYCC probably not supported correctly here on DP since colorspace translation
349 * loses distinction between BT601 vs xvYCC601 in translation
350 */
351 if (stream->output_color_space == COLOR_SPACE_YCBCR601)
352 colorimetryFormat = ColorimetryYCC_DP_ITU601;
353 else if (stream->output_color_space == COLOR_SPACE_YCBCR709)
354 colorimetryFormat = ColorimetryYCC_DP_ITU709;
355 else if (stream->output_color_space == COLOR_SPACE_ADOBERGB)
356 colorimetryFormat = ColorimetryYCC_DP_AdobeYCC;
357 else if (stream->output_color_space == COLOR_SPACE_2020_YCBCR)
358 colorimetryFormat = ColorimetryYCC_DP_ITU2020YCbCr;
359 break;
360
361 default:
362 colorimetryFormat = ColorimetryRGB_DP_sRGB;
363 break;
364 }
365
366 info_packet->sb[16] = (pixelEncoding << 4) | colorimetryFormat;
367
368 /* Set color depth */
369 switch (stream->timing.display_color_depth) {
370 case COLOR_DEPTH_666:
371 /* NOTE: This is actually not valid for YCbCr pixel encoding to have 6 bpc
372 * as of DP1.4 spec, but value of 0 probably reserved here for potential future use.
373 */
374 info_packet->sb[17] = 0;
375 break;
376 case COLOR_DEPTH_888:
377 info_packet->sb[17] = 1;
378 break;
379 case COLOR_DEPTH_101010:
380 info_packet->sb[17] = 2;
381 break;
382 case COLOR_DEPTH_121212:
383 info_packet->sb[17] = 3;
384 break;
385 /*case COLOR_DEPTH_141414: -- NO SUCH FORMAT IN DP SPEC */
386 case COLOR_DEPTH_161616:
387 info_packet->sb[17] = 4;
388 break;
389 default:
390 info_packet->sb[17] = 0;
391 break;
392 }
393
394 /* all YCbCr are always limited range */
395 if ((stream->output_color_space == COLOR_SPACE_SRGB_LIMITED) ||
396 (stream->output_color_space == COLOR_SPACE_2020_RGB_LIMITEDRANGE) ||
397 (pixelEncoding != 0x0)) {
398 info_packet->sb[17] |= 0x80; /* DB17 bit 7 set to 1 for CEA timing. */
399 }
400
401 /* Content Type (Bits 2:0)
402 * 0 = Not defined.
403 * 1 = Graphics.
404 * 2 = Photo.
405 * 3 = Video.
406 * 4 = Game.
407 */
408 info_packet->sb[18] = 0;
409 }
410 }
411
412 /**
413 *****************************************************************************
414 * Function: mod_build_hf_vsif_infopacket
415 *
416 * @brief
417 * Prepare HDMI Vendor Specific info frame.
418 * Follows HDMI Spec to build up Vendor Specific info frame
419 *
420 * @param [in] stream: contains data we may need to construct VSIF (i.e. timing_3d_format, etc.)
421 * @param [out] info_packet: output structure where to store VSIF
422 *****************************************************************************
423 */
mod_build_hf_vsif_infopacket(const struct dc_stream_state * stream,struct dc_info_packet * info_packet)424 void mod_build_hf_vsif_infopacket(const struct dc_stream_state *stream,
425 struct dc_info_packet *info_packet)
426 {
427 unsigned int length = 5;
428 bool hdmi_vic_mode = false;
429 uint8_t checksum = 0;
430 uint32_t i = 0;
431 enum dc_timing_3d_format format;
432
433 info_packet->valid = false;
434 format = stream->timing.timing_3d_format;
435 if (stream->view_format == VIEW_3D_FORMAT_NONE)
436 format = TIMING_3D_FORMAT_NONE;
437
438 if (stream->timing.hdmi_vic != 0
439 && stream->timing.h_total >= 3840
440 && stream->timing.v_total >= 2160
441 && format == TIMING_3D_FORMAT_NONE)
442 hdmi_vic_mode = true;
443
444 if ((format == TIMING_3D_FORMAT_NONE) && !hdmi_vic_mode)
445 return;
446
447 info_packet->sb[1] = 0x03;
448 info_packet->sb[2] = 0x0C;
449 info_packet->sb[3] = 0x00;
450
451 if (format != TIMING_3D_FORMAT_NONE)
452 info_packet->sb[4] = (2 << 5);
453
454 else if (hdmi_vic_mode)
455 info_packet->sb[4] = (1 << 5);
456
457 switch (format) {
458 case TIMING_3D_FORMAT_HW_FRAME_PACKING:
459 case TIMING_3D_FORMAT_SW_FRAME_PACKING:
460 info_packet->sb[5] = (0x0 << 4);
461 break;
462
463 case TIMING_3D_FORMAT_SIDE_BY_SIDE:
464 case TIMING_3D_FORMAT_SBS_SW_PACKED:
465 info_packet->sb[5] = (0x8 << 4);
466 length = 6;
467 break;
468
469 case TIMING_3D_FORMAT_TOP_AND_BOTTOM:
470 case TIMING_3D_FORMAT_TB_SW_PACKED:
471 info_packet->sb[5] = (0x6 << 4);
472 break;
473
474 default:
475 break;
476 }
477
478 if (hdmi_vic_mode)
479 info_packet->sb[5] = stream->timing.hdmi_vic;
480
481 info_packet->hb0 = HDMI_INFOFRAME_TYPE_VENDOR;
482 info_packet->hb1 = 0x01;
483 info_packet->hb2 = (uint8_t) (length);
484
485 checksum += info_packet->hb0;
486 checksum += info_packet->hb1;
487 checksum += info_packet->hb2;
488
489 for (i = 1; i <= length; i++)
490 checksum += info_packet->sb[i];
491
492 info_packet->sb[0] = (uint8_t) (0x100 - checksum);
493
494 info_packet->valid = true;
495 }
496
497