xref: /rk3399_rockchip-uboot/drivers/video/drm/rockchip_display.c (revision 60e6e79d7a046ddb710e589fd559751760c3b206)
1 /*
2  * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <asm/unaligned.h>
8 #include <boot_rkimg.h>
9 #include <config.h>
10 #include <common.h>
11 #include <errno.h>
12 #include <linux/libfdt.h>
13 #include <fdtdec.h>
14 #include <fdt_support.h>
15 #include <linux/hdmi.h>
16 #include <linux/log2.h>
17 #include <linux/list.h>
18 #include <linux/compat.h>
19 #include <linux/media-bus-format.h>
20 #include <malloc.h>
21 #include <memalign.h>
22 #include <video.h>
23 #include <video_rockchip.h>
24 #include <video_bridge.h>
25 #include <dm/device.h>
26 #include <dm/uclass-internal.h>
27 #include <asm/arch-rockchip/resource_img.h>
28 #include <asm/arch-rockchip/cpu.h>
29 
30 #include "bmp_helper.h"
31 #include "libnsbmp.h"
32 #include "rockchip_display.h"
33 #include "rockchip_crtc.h"
34 #include "rockchip_connector.h"
35 #include "rockchip_bridge.h"
36 #include "rockchip_phy.h"
37 #include "rockchip_panel.h"
38 #include <dm.h>
39 #include <dm/of_access.h>
40 #include <dm/ofnode.h>
41 #include <asm/io.h>
42 
43 #define DRIVER_VERSION	"v1.0.1"
44 
45 /***********************************************************************
46  *  Rockchip UBOOT DRM driver version
47  *
48  *  v1.0.0	: add basic version for rockchip drm driver(hjc)
49  *  v1.0.1	: add much dsi update(hjc)
50  *
51  **********************************************************************/
52 
53 #define RK_BLK_SIZE 512
54 #define BMP_PROCESSED_FLAG 8399
55 #define BYTES_PER_PIXEL sizeof(uint32_t)
56 #define MAX_IMAGE_BYTES (8 * 1024 * 1024)
57 
58 DECLARE_GLOBAL_DATA_PTR;
59 static LIST_HEAD(rockchip_display_list);
60 static LIST_HEAD(logo_cache_list);
61 
62 static unsigned long memory_start;
63 static unsigned long cubic_lut_memory_start;
64 static unsigned long memory_end;
65 static char memory_compatible[32] = "rockchip,drm-logo";
66 static struct base2_info base_parameter;
67 static u32 align_size = PAGE_SIZE;
68 
69 /*
70  * the phy types are used by different connectors in public.
71  * The current version only has inno hdmi phy for hdmi and tve.
72  */
73 enum public_use_phy {
74 	NONE,
75 	INNO_HDMI_PHY
76 };
77 
78 /* save public phy data */
79 struct public_phy_data {
80 	const struct rockchip_phy *phy_drv;
81 	int phy_node;
82 	int public_phy_type;
83 	bool phy_init;
84 };
85 
rockchip_get_output_if_name(u32 output_if,char * name)86 char* rockchip_get_output_if_name(u32 output_if, char *name)
87 {
88 	if (output_if & VOP_OUTPUT_IF_RGB)
89 		strcat(name, " RGB");
90 	if (output_if & VOP_OUTPUT_IF_BT1120)
91 		strcat(name, " BT1120");
92 	if (output_if & VOP_OUTPUT_IF_BT656)
93 		strcat(name, " BT656");
94 	if (output_if & VOP_OUTPUT_IF_LVDS0)
95 		strcat(name, " LVDS0");
96 	if (output_if & VOP_OUTPUT_IF_LVDS1)
97 		strcat(name, " LVDS1");
98 	if (output_if & VOP_OUTPUT_IF_MIPI0)
99 		strcat(name, " MIPI0");
100 	if (output_if & VOP_OUTPUT_IF_MIPI1)
101 		strcat(name, " MIPI1");
102 	if (output_if & VOP_OUTPUT_IF_eDP0)
103 		strcat(name, " eDP0");
104 	if (output_if & VOP_OUTPUT_IF_eDP1)
105 		strcat(name, " eDP1");
106 	if (output_if & VOP_OUTPUT_IF_DP0)
107 		strcat(name, " DP0");
108 	if (output_if & VOP_OUTPUT_IF_DP1)
109 		strcat(name, " DP1");
110 	if (output_if & VOP_OUTPUT_IF_HDMI0)
111 		strcat(name, " HDMI0");
112 	if (output_if & VOP_OUTPUT_IF_HDMI1)
113 		strcat(name, " HDMI1");
114 
115 	return name;
116 }
117 
rockchip_drm_get_cycles_per_pixel(u32 bus_format)118 u32 rockchip_drm_get_cycles_per_pixel(u32 bus_format)
119 {
120 	switch (bus_format) {
121 	case MEDIA_BUS_FMT_RGB565_1X16:
122 	case MEDIA_BUS_FMT_RGB666_1X18:
123 	case MEDIA_BUS_FMT_RGB888_1X24:
124 	case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
125 		return 1;
126 	case MEDIA_BUS_FMT_RGB565_2X8_LE:
127 	case MEDIA_BUS_FMT_BGR565_2X8_LE:
128 		return 2;
129 	case MEDIA_BUS_FMT_RGB666_3X6:
130 	case MEDIA_BUS_FMT_RGB888_3X8:
131 	case MEDIA_BUS_FMT_BGR888_3X8:
132 		return 3;
133 	case MEDIA_BUS_FMT_RGB888_DUMMY_4X8:
134 	case MEDIA_BUS_FMT_BGR888_DUMMY_4X8:
135 		return 4;
136 	default:
137 		return 1;
138 	}
139 }
140 
rockchip_get_baseparameter(void)141 int rockchip_get_baseparameter(void)
142 {
143 	struct blk_desc *dev_desc;
144 	disk_partition_t part_info;
145 	int block_num;
146 	char *baseparameter_buf;
147 	int ret = 0;
148 
149 	dev_desc = rockchip_get_bootdev();
150 	if (!dev_desc) {
151 		printf("%s: Could not find device\n", __func__);
152 		return -ENOENT;
153 	}
154 
155 	if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) {
156 		printf("Could not find baseparameter partition\n");
157 		return -ENOENT;
158 	}
159 
160 	block_num = BLOCK_CNT(sizeof(base_parameter), dev_desc);
161 	baseparameter_buf = memalign(ARCH_DMA_MINALIGN, block_num * dev_desc->blksz);
162 	if (!baseparameter_buf) {
163 		printf("failed to alloc memory for baseparameter buffer\n");
164 		return -ENOMEM;
165 	}
166 
167 	ret = blk_dread(dev_desc, part_info.start, block_num, (void *)baseparameter_buf);
168 	if (ret < 0) {
169 		printf("read baseparameter failed\n");
170 		goto out;
171 	}
172 
173 	memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter));
174 	if (strncasecmp(base_parameter.head_flag, "BASP", 4)) {
175 		printf("warning: bad baseparameter\n");
176 		memset(&base_parameter, 0, sizeof(base_parameter));
177 	}
178 	rockchip_display_make_crc32_table();
179 
180 out:
181 	free(baseparameter_buf);
182 	return ret;
183 }
184 
rockchip_get_disp_info(int type,int id)185 struct base2_disp_info *rockchip_get_disp_info(int type, int id)
186 {
187 	struct base2_disp_info *disp_info;
188 	struct base2_disp_header *disp_header;
189 	int i = 0, offset = -1;
190 	u32 crc_val;
191 	u32 base2_length;
192 	void *base_parameter_addr = (void *)&base_parameter;
193 
194 	for (i = 0; i < 8; i++) {
195 		disp_header = &base_parameter.disp_header[i];
196 		if (disp_header->connector_type == type &&
197 		    disp_header->connector_id == id) {
198 			printf("disp info %d, type:%d, id:%d\n", i, type, id);
199 			offset = disp_header->offset;
200 			break;
201 		}
202 	}
203 
204 	if (offset < 0)
205 		return NULL;
206 	disp_info = base_parameter_addr + offset;
207 	if (disp_info->screen_info[0].type != type ||
208 	    disp_info->screen_info[0].id != id) {
209 		printf("base2_disp_info couldn't be found, screen_info type[%d] or id[%d] mismatched\n",
210 		       disp_info->screen_info[0].type,
211 		       disp_info->screen_info[0].id);
212 		return NULL;
213 	}
214 
215 	if (strncasecmp(disp_info->disp_head_flag, "DISP", 4))
216 		return NULL;
217 
218 	if (base_parameter.major_version == 3 && base_parameter.minor_version == 0) {
219 		crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info,
220 						      sizeof(struct base2_disp_info) - 4);
221 		if (crc_val != disp_info->crc2) {
222 			printf("error: connector type[%d], id[%d] disp info crc2 check error\n",
223 			       type, id);
224 			return NULL;
225 		}
226 	} else {
227 		base2_length = sizeof(struct base2_disp_info) - sizeof(struct csc_info) -
228 			       sizeof(struct acm_data) - 10 * 1024 - 4;
229 		crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info, base2_length - 4);
230 		if (crc_val != disp_info->crc) {
231 			printf("error: connector type[%d], id[%d] disp info crc check error\n",
232 			       type, id);
233 			return NULL;
234 		}
235 	}
236 
237 	return disp_info;
238 }
239 
240 /* check which kind of public phy does connector use */
check_public_use_phy(struct rockchip_connector * conn)241 static int check_public_use_phy(struct rockchip_connector *conn)
242 {
243 	int ret = NONE;
244 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
245 
246 	if (!strncmp(dev_read_name(conn->dev), "tve", 3) ||
247 	    !strncmp(dev_read_name(conn->dev), "hdmi", 4))
248 		ret = INNO_HDMI_PHY;
249 #endif
250 
251 	return ret;
252 }
253 
254 /*
255  * get public phy driver and initialize it.
256  * The current version only has inno hdmi phy for hdmi and tve.
257  */
get_public_phy(struct rockchip_connector * conn,struct public_phy_data * data)258 static int get_public_phy(struct rockchip_connector *conn,
259 			  struct public_phy_data *data)
260 {
261 	struct rockchip_phy *phy;
262 	struct udevice *dev;
263 	int ret = 0;
264 
265 	switch (data->public_phy_type) {
266 	case INNO_HDMI_PHY:
267 #if defined(CONFIG_ROCKCHIP_RK3328)
268 		ret = uclass_get_device_by_name(UCLASS_PHY,
269 						"hdmiphy@ff430000", &dev);
270 #elif defined(CONFIG_ROCKCHIP_RK322X)
271 		ret = uclass_get_device_by_name(UCLASS_PHY,
272 						"hdmi-phy@12030000", &dev);
273 #else
274 		ret = -EINVAL;
275 #endif
276 		if (ret) {
277 			printf("Warn: can't find phy driver\n");
278 			return 0;
279 		}
280 
281 		phy = (struct rockchip_phy *)dev_get_driver_data(dev);
282 		if (!phy) {
283 			printf("failed to get phy driver\n");
284 			return 0;
285 		}
286 
287 		ret = rockchip_phy_init(phy);
288 		if (ret) {
289 			printf("failed to init phy driver\n");
290 			return ret;
291 		}
292 		conn->phy = phy;
293 
294 		debug("inno hdmi phy init success, save it\n");
295 		data->phy_drv = conn->phy;
296 		data->phy_init = true;
297 		return 0;
298 	default:
299 		return -EINVAL;
300 	}
301 }
302 
init_display_buffer(ulong base)303 static void init_display_buffer(ulong base)
304 {
305 	printf("use 0x%lx as drm logo base memory\n", base);
306 	memory_start = ALIGN(base + DRM_ROCKCHIP_FB_SIZE, align_size);
307 	memory_end = memory_start;
308 	cubic_lut_memory_start = ALIGN(memory_start + MEMORY_POOL_SIZE, align_size);
309 }
310 
get_display_buffer(int size)311 void *get_display_buffer(int size)
312 {
313 	unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE);
314 	void *buf;
315 
316 	if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) {
317 		printf("failed to alloc %dbyte memory to display\n", size);
318 		return NULL;
319 	}
320 	buf = (void *)roundup_memory;
321 
322 	memory_end = roundup_memory + size;
323 
324 	return buf;
325 }
326 
get_display_size(void)327 static unsigned long get_display_size(void)
328 {
329 	return memory_end - memory_start;
330 }
331 
get_single_cubic_lut_size(void)332 static unsigned long get_single_cubic_lut_size(void)
333 {
334 	ulong cubic_lut_size;
335 	int cubic_lut_step = CONFIG_ROCKCHIP_CUBIC_LUT_SIZE;
336 
337 	/* This is depend on IC designed */
338 	cubic_lut_size = (cubic_lut_step * cubic_lut_step * cubic_lut_step + 1) / 2 * 16;
339 	cubic_lut_size = roundup(cubic_lut_size, PAGE_SIZE);
340 
341 	return cubic_lut_size;
342 }
343 
get_cubic_lut_offset(int crtc_id)344 static unsigned long get_cubic_lut_offset(int crtc_id)
345 {
346 	return crtc_id * get_single_cubic_lut_size();
347 }
348 
get_cubic_lut_buffer(int crtc_id)349 unsigned long get_cubic_lut_buffer(int crtc_id)
350 {
351 	return cubic_lut_memory_start + crtc_id * get_single_cubic_lut_size();
352 }
353 
get_cubic_memory_size(void)354 static unsigned long get_cubic_memory_size(void)
355 {
356 	/* Max support 4 cubic lut */
357 	return get_single_cubic_lut_size() * 4;
358 }
359 
can_direct_logo(int bpp)360 bool can_direct_logo(int bpp)
361 {
362 	return bpp == 16 || bpp == 32;
363 }
364 
connector_phy_init(struct rockchip_connector * conn,struct public_phy_data * data)365 static int connector_phy_init(struct rockchip_connector *conn,
366 			      struct public_phy_data *data)
367 {
368 	int type;
369 
370 	/* does this connector use public phy with others */
371 	type = check_public_use_phy(conn);
372 	if (type == INNO_HDMI_PHY) {
373 		/* there is no public phy was initialized */
374 		if (!data->phy_init) {
375 			debug("start get public phy\n");
376 			data->public_phy_type = type;
377 			if (get_public_phy(conn, data)) {
378 				printf("can't find correct public phy type\n");
379 				free(data);
380 				return -EINVAL;
381 			}
382 			return 0;
383 		}
384 
385 		/* if this phy has been initialized, get it directly */
386 		conn->phy = (struct rockchip_phy *)data->phy_drv;
387 		return 0;
388 	}
389 
390 	return 0;
391 }
392 
rockchip_ofnode_get_display_mode(ofnode node,struct drm_display_mode * mode,u32 * bus_flags)393 int rockchip_ofnode_get_display_mode(ofnode node, struct drm_display_mode *mode, u32 *bus_flags)
394 {
395 	int hactive, vactive, pixelclock;
396 	int hfront_porch, hback_porch, hsync_len;
397 	int vfront_porch, vback_porch, vsync_len;
398 	int val, flags = 0;
399 
400 #define FDT_GET_BOOL(val, name) \
401 	val = ofnode_read_bool(node, name);
402 
403 #define FDT_GET_INT(val, name) \
404 	val = ofnode_read_s32_default(node, name, -1); \
405 	if (val < 0) { \
406 		printf("Can't get %s\n", name); \
407 		return -ENXIO; \
408 	}
409 
410 #define FDT_GET_INT_DEFAULT(val, name, default) \
411 	val = ofnode_read_s32_default(node, name, default);
412 
413 	FDT_GET_INT(hactive, "hactive");
414 	FDT_GET_INT(vactive, "vactive");
415 	FDT_GET_INT(pixelclock, "clock-frequency");
416 	FDT_GET_INT(hsync_len, "hsync-len");
417 	FDT_GET_INT(hfront_porch, "hfront-porch");
418 	FDT_GET_INT(hback_porch, "hback-porch");
419 	FDT_GET_INT(vsync_len, "vsync-len");
420 	FDT_GET_INT(vfront_porch, "vfront-porch");
421 	FDT_GET_INT(vback_porch, "vback-porch");
422 	FDT_GET_INT(val, "hsync-active");
423 	flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
424 	FDT_GET_INT(val, "vsync-active");
425 	flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
426 
427 	FDT_GET_BOOL(val, "interlaced");
428 	flags |= val ? DRM_MODE_FLAG_INTERLACE : 0;
429 	FDT_GET_BOOL(val, "doublescan");
430 	flags |= val ? DRM_MODE_FLAG_DBLSCAN : 0;
431 	FDT_GET_BOOL(val, "doubleclk");
432 	flags |= val ? DRM_MODE_FLAG_DBLCLK : 0;
433 
434 	FDT_GET_INT(val, "de-active");
435 	*bus_flags |= val ? DRM_BUS_FLAG_DE_HIGH : DRM_BUS_FLAG_DE_LOW;
436 	FDT_GET_INT(val, "pixelclk-active");
437 	*bus_flags |= val ? DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE : DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE;
438 
439 	FDT_GET_INT_DEFAULT(val, "screen-rotate", 0);
440 	if (val == DRM_MODE_FLAG_XMIRROR) {
441 		flags |= DRM_MODE_FLAG_XMIRROR;
442 	} else if (val == DRM_MODE_FLAG_YMIRROR) {
443 		flags |= DRM_MODE_FLAG_YMIRROR;
444 	} else if (val == DRM_MODE_FLAG_XYMIRROR) {
445 		flags |= DRM_MODE_FLAG_XMIRROR;
446 		flags |= DRM_MODE_FLAG_YMIRROR;
447 	}
448 	mode->hdisplay = hactive;
449 	mode->hsync_start = mode->hdisplay + hfront_porch;
450 	mode->hsync_end = mode->hsync_start + hsync_len;
451 	mode->htotal = mode->hsync_end + hback_porch;
452 
453 	mode->vdisplay = vactive;
454 	mode->vsync_start = mode->vdisplay + vfront_porch;
455 	mode->vsync_end = mode->vsync_start + vsync_len;
456 	mode->vtotal = mode->vsync_end + vback_porch;
457 
458 	mode->clock = pixelclock / 1000;
459 	mode->flags = flags;
460 	mode->vrefresh = drm_mode_vrefresh(mode);
461 
462 	return 0;
463 }
464 
display_get_force_timing_from_dts(ofnode node,struct drm_display_mode * mode,u32 * bus_flags)465 static int display_get_force_timing_from_dts(ofnode node,
466 					     struct drm_display_mode *mode,
467 					     u32 *bus_flags)
468 {
469 	int ret = 0;
470 
471 	ret = rockchip_ofnode_get_display_mode(node, mode, bus_flags);
472 
473 	if (ret) {
474 		mode->clock = 74250;
475 		mode->flags = 0x5;
476 		mode->hdisplay = 1280;
477 		mode->hsync_start = 1390;
478 		mode->hsync_end = 1430;
479 		mode->htotal = 1650;
480 		mode->hskew = 0;
481 		mode->vdisplay = 720;
482 		mode->vsync_start = 725;
483 		mode->vsync_end = 730;
484 		mode->vtotal = 750;
485 		mode->vrefresh = 60;
486 		mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9;
487 		mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
488 	}
489 
490 	printf("route node %s force_timing, use %dx%dp%d as default mode\n",
491 	       ret ? "undefine" : "define", mode->hdisplay, mode->vdisplay,
492 	       mode->vscan);
493 
494 	return 0;
495 }
496 
display_get_timing_from_dts(struct rockchip_panel * panel,struct drm_display_mode * mode,u32 * bus_flags)497 static int display_get_timing_from_dts(struct rockchip_panel *panel,
498 				       struct drm_display_mode *mode,
499 				       u32 *bus_flags)
500 {
501 	struct ofnode_phandle_args args;
502 	ofnode dt, timing, mcu_panel;
503 	int ret;
504 
505 	mcu_panel = dev_read_subnode(panel->dev, "mcu-panel");
506 	dt = dev_read_subnode(panel->dev, "display-timings");
507 	if (ofnode_valid(dt)) {
508 		ret = ofnode_parse_phandle_with_args(dt, "native-mode", NULL,
509 						     0, 0, &args);
510 		if (ret)
511 			return ret;
512 
513 		timing = args.node;
514 	} else if (ofnode_valid(mcu_panel)) {
515 		dt = ofnode_find_subnode(mcu_panel, "display-timings");
516 		ret = ofnode_parse_phandle_with_args(dt, "native-mode", NULL,
517 						     0, 0, &args);
518 		if (ret)
519 			return ret;
520 
521 		timing = args.node;
522 	} else {
523 		timing = dev_read_subnode(panel->dev, "panel-timing");
524 	}
525 
526 	if (!ofnode_valid(timing)) {
527 		printf("failed to get display timings from DT\n");
528 		return -ENXIO;
529 	}
530 
531 	rockchip_ofnode_get_display_mode(timing, mode, bus_flags);
532 
533 	return 0;
534 }
535 
display_get_timing(struct display_state * state)536 static int display_get_timing(struct display_state *state)
537 {
538 	struct connector_state *conn_state = &state->conn_state;
539 	struct drm_display_mode *mode = &conn_state->mode;
540 	const struct drm_display_mode *m;
541 	struct rockchip_panel *panel = conn_state->connector->panel;
542 
543 	if (panel->funcs->get_mode)
544 		return panel->funcs->get_mode(panel, mode);
545 
546 	if (dev_of_valid(panel->dev) &&
547 	    !display_get_timing_from_dts(panel, mode, &conn_state->bus_flags)) {
548 		printf("Using display timing dts\n");
549 		return 0;
550 	}
551 
552 	if (panel->data) {
553 		m = (const struct drm_display_mode *)panel->data;
554 		memcpy(mode, m, sizeof(*m));
555 		printf("Using display timing from compatible panel driver\n");
556 		return 0;
557 	}
558 
559 	return -ENODEV;
560 }
561 
display_pre_init(void)562 static int display_pre_init(void)
563 {
564 	struct display_state *state;
565 	int ret = 0;
566 
567 	list_for_each_entry(state, &rockchip_display_list, head) {
568 		struct connector_state *conn_state = &state->conn_state;
569 		struct crtc_state *crtc_state = &state->crtc_state;
570 		struct rockchip_crtc *crtc = crtc_state->crtc;
571 
572 		ret = rockchip_connector_pre_init(state);
573 		if (ret)
574 			printf("pre init conn error\n");
575 
576 		crtc->vps[crtc_state->crtc_id].output_type = conn_state->type;
577 	}
578 	return ret;
579 }
580 
display_use_force_mode(struct display_state * state)581 static int display_use_force_mode(struct display_state *state)
582 {
583 	struct connector_state *conn_state = &state->conn_state;
584 	struct drm_display_mode *mode = &conn_state->mode;
585 
586 	conn_state->bpc = 8;
587 	memcpy(mode, &state->force_mode, sizeof(struct drm_display_mode));
588 	conn_state->bus_format = state->force_bus_format;
589 
590 	return 0;
591 }
592 
display_get_edid_mode(struct display_state * state)593 static int display_get_edid_mode(struct display_state *state)
594 {
595 	int ret = 0;
596 	struct connector_state *conn_state = &state->conn_state;
597 	struct drm_display_mode *mode = &conn_state->mode;
598 	int bpc;
599 
600 	ret = edid_get_drm_mode(conn_state->edid, sizeof(conn_state->edid), mode, &bpc);
601 	if (!ret) {
602 		conn_state->bpc = bpc;
603 		edid_print_info((void *)&conn_state->edid);
604 	} else {
605 		conn_state->bpc = 8;
606 		mode->clock = 74250;
607 		mode->flags = 0x5;
608 		mode->hdisplay = 1280;
609 		mode->hsync_start = 1390;
610 		mode->hsync_end = 1430;
611 		mode->htotal = 1650;
612 		mode->hskew = 0;
613 		mode->vdisplay = 720;
614 		mode->vsync_start = 725;
615 		mode->vsync_end = 730;
616 		mode->vtotal = 750;
617 		mode->vrefresh = 60;
618 		mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9;
619 		mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
620 
621 		printf("error: %s get mode from edid failed, use 720p60 as default mode\n",
622 		       state->conn_state.connector->dev->name);
623 	}
624 
625 	return ret;
626 }
627 
display_mode_valid(struct display_state * state)628 static int display_mode_valid(struct display_state *state)
629 {
630 	struct connector_state *conn_state = &state->conn_state;
631 	struct rockchip_connector *conn = conn_state->connector;
632 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
633 	struct crtc_state *crtc_state = &state->crtc_state;
634 	const struct rockchip_crtc *crtc = crtc_state->crtc;
635 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
636 	int ret;
637 
638 	if (conn_funcs->mode_valid && state->enabled_at_spl == false) {
639 		ret = conn_funcs->mode_valid(conn, state);
640 		if (ret)
641 			return ret;
642 	}
643 
644 	if (crtc_funcs->mode_valid) {
645 		ret = crtc_funcs->mode_valid(state);
646 		if (ret)
647 			return ret;
648 	}
649 
650 	return 0;
651 }
652 
display_mode_fixup(struct display_state * state)653 static int display_mode_fixup(struct display_state *state)
654 {
655 	struct crtc_state *crtc_state = &state->crtc_state;
656 	const struct rockchip_crtc *crtc = crtc_state->crtc;
657 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
658 	int ret;
659 
660 	if (crtc_funcs->mode_fixup) {
661 		ret = crtc_funcs->mode_fixup(state);
662 		if (ret)
663 			return ret;
664 	}
665 
666 	return 0;
667 }
668 
display_init(struct display_state * state)669 static int display_init(struct display_state *state)
670 {
671 	struct connector_state *conn_state = &state->conn_state;
672 	struct rockchip_connector *conn = conn_state->connector;
673 	struct crtc_state *crtc_state = &state->crtc_state;
674 	struct rockchip_crtc *crtc = crtc_state->crtc;
675 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
676 	struct drm_display_mode *mode = &conn_state->mode;
677 	const char *compatible;
678 	int ret = 0;
679 	static bool __print_once = false;
680 #ifdef CONFIG_SPL_BUILD
681 	struct spl_display_info *spl_disp_info = (struct spl_display_info *)CONFIG_SPL_VIDEO_BUF;
682 #endif
683 	if (!__print_once) {
684 		__print_once = true;
685 		printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION);
686 	}
687 
688 	if (state->is_init)
689 		return 0;
690 
691 	if (!crtc_funcs) {
692 		printf("failed to find crtc functions\n");
693 		return -ENXIO;
694 	}
695 
696 #ifdef CONFIG_SPL_BUILD
697 	if (state->conn_state.type == DRM_MODE_CONNECTOR_HDMIA)
698 		state->enabled_at_spl = spl_disp_info->enabled == 1 ? true : false;
699 	if (state->enabled_at_spl)
700 		printf("HDMI enabled at SPL\n");
701 #endif
702 	if (crtc_state->crtc->active && !crtc_state->ports_node &&
703 	    memcmp(&crtc_state->crtc->active_mode, &conn_state->mode,
704 		   sizeof(struct drm_display_mode))) {
705 		printf("%s has been used for output type: %d, mode: %dx%dp%d\n",
706 			crtc_state->dev->name,
707 			crtc_state->crtc->active_mode.type,
708 			crtc_state->crtc->active_mode.hdisplay,
709 			crtc_state->crtc->active_mode.vdisplay,
710 			crtc_state->crtc->active_mode.vrefresh);
711 		return -ENODEV;
712 	}
713 
714 	if (crtc_funcs->preinit) {
715 		ret = crtc_funcs->preinit(state);
716 		if (ret)
717 			return ret;
718 	}
719 
720 	if (state->enabled_at_spl == false) {
721 		ret = rockchip_connector_init(state);
722 		if (ret)
723 			goto deinit;
724 	}
725 
726 	/*
727 	 * support hotplug, but not connect;
728 	 */
729 #ifdef CONFIG_DRM_ROCKCHIP_TVE
730 	if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) {
731 		printf("hdmi plugin ,skip tve\n");
732 		goto deinit;
733 	}
734 #elif defined(CONFIG_DRM_ROCKCHIP_RK1000)
735 	if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) {
736 		printf("hdmi plugin ,skip tve\n");
737 		goto deinit;
738 	}
739 #endif
740 
741 	ret = rockchip_connector_detect(state);
742 #if defined(CONFIG_DRM_ROCKCHIP_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000)
743 	if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA)
744 		crtc->hdmi_hpd = ret;
745 	if (state->enabled_at_spl)
746 		crtc->hdmi_hpd = true;
747 #endif
748 	if (!ret && !state->force_output)
749 		goto deinit;
750 
751 	ret = 0;
752 	if (state->enabled_at_spl == true) {
753 #ifdef CONFIG_SPL_BUILD
754 		struct drm_display_mode *mode = &conn_state->mode;
755 
756 		memcpy(mode, &spl_disp_info->mode,  sizeof(*mode));
757 		conn_state->bus_format = spl_disp_info->bus_format;
758 
759 		printf("%s get display mode from spl:%dx%d, bus format:0x%x\n",
760 			conn->dev->name, mode->hdisplay, mode->vdisplay, conn_state->bus_format);
761 #endif
762 	} else if (conn->panel) {
763 		ret = display_get_timing(state);
764 		if (!ret)
765 			conn_state->bpc = conn->panel->bpc;
766 #if defined(CONFIG_I2C_EDID)
767 		if (ret < 0 && conn->funcs->get_edid) {
768 			rockchip_panel_prepare(conn->panel);
769 			ret = conn->funcs->get_edid(conn, state);
770 			if (!ret)
771 				display_get_edid_mode(state);
772 		}
773 #endif
774 	} else if (conn->bridge) {
775 		ret = video_bridge_read_edid(conn->bridge->dev,
776 					     conn_state->edid, EDID_SIZE);
777 		if (ret > 0) {
778 #if defined(CONFIG_I2C_EDID)
779 			ret = display_get_edid_mode(state);
780 #endif
781 		} else {
782 			ret = video_bridge_get_timing(conn->bridge->dev);
783 		}
784 	} else if (conn->funcs->get_timing) {
785 		ret = conn->funcs->get_timing(conn, state);
786 	} else if (conn->funcs->get_edid) {
787 		ret = conn->funcs->get_edid(conn, state);
788 #if defined(CONFIG_I2C_EDID)
789 		if (!ret)
790 			display_get_edid_mode(state);
791 #endif
792 	}
793 
794 	if (!ret && conn_state->secondary) {
795 		struct rockchip_connector *connector = conn_state->secondary;
796 
797 		if (connector->panel) {
798 			if (connector->panel->funcs->get_mode) {
799 				struct drm_display_mode *_mode = drm_mode_create();
800 
801 				ret = connector->panel->funcs->get_mode(connector->panel, _mode);
802 				if (!ret && !drm_mode_equal(_mode, mode))
803 					ret = -EINVAL;
804 
805 				drm_mode_destroy(_mode);
806 			}
807 		}
808 	}
809 
810 	if (ret && !state->force_output)
811 		goto deinit;
812 	if (state->force_output)
813 		display_use_force_mode(state);
814 
815 	if (display_mode_valid(state))
816 		goto deinit;
817 
818 	/* rk356x series drive mipi pixdata on posedge */
819 	compatible = dev_read_string(conn->dev, "compatible");
820 	if (compatible && !strcmp(compatible, "rockchip,rk3568-mipi-dsi")) {
821 		conn_state->bus_flags &= ~DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE;
822 		conn_state->bus_flags |= DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE;
823 	}
824 
825 	if (display_mode_fixup(state))
826 		goto deinit;
827 
828 	if (conn->bridge)
829 		rockchip_bridge_mode_set(conn->bridge, &conn_state->mode);
830 
831 	printf("%s: %s detailed mode clock %u kHz, flags[%x]\n"
832 	       "    H: %04d %04d %04d %04d\n"
833 	       "    V: %04d %04d %04d %04d\n"
834 	       "bus_format: %x\n",
835 	       conn->dev->name,
836 	       state->force_output ? "use force output" : "",
837 	       mode->clock, mode->flags,
838 	       mode->hdisplay, mode->hsync_start,
839 	       mode->hsync_end, mode->htotal,
840 	       mode->vdisplay, mode->vsync_start,
841 	       mode->vsync_end, mode->vtotal,
842 	       conn_state->bus_format);
843 
844 	if (crtc_funcs->init && state->enabled_at_spl == false) {
845 		ret = crtc_funcs->init(state);
846 		if (ret)
847 			goto deinit;
848 	}
849 	state->is_init = 1;
850 
851 	crtc_state->crtc->active = true;
852 	memcpy(&crtc_state->crtc->active_mode,
853 	       &conn_state->mode, sizeof(struct drm_display_mode));
854 
855 	return 0;
856 
857 deinit:
858 	rockchip_connector_deinit(state);
859 	return ret;
860 }
861 
display_send_mcu_cmd(struct display_state * state,u32 type,u32 val)862 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val)
863 {
864 	struct crtc_state *crtc_state = &state->crtc_state;
865 	const struct rockchip_crtc *crtc = crtc_state->crtc;
866 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
867 	int ret;
868 
869 	if (!state->is_init)
870 		return -EINVAL;
871 
872 	if (crtc_funcs->send_mcu_cmd) {
873 		ret = crtc_funcs->send_mcu_cmd(state, type, val);
874 		if (ret)
875 			return ret;
876 	}
877 
878 	return 0;
879 }
880 
display_set_plane(struct display_state * state)881 static int display_set_plane(struct display_state *state)
882 {
883 	struct crtc_state *crtc_state = &state->crtc_state;
884 	const struct rockchip_crtc *crtc = crtc_state->crtc;
885 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
886 	int ret;
887 
888 	if (!state->is_init)
889 		return -EINVAL;
890 
891 	if (crtc_funcs->set_plane) {
892 		ret = crtc_funcs->set_plane(state);
893 		if (ret)
894 			return ret;
895 	}
896 
897 	return 0;
898 }
899 
display_enable(struct display_state * state)900 static int display_enable(struct display_state *state)
901 {
902 	struct crtc_state *crtc_state = &state->crtc_state;
903 	const struct rockchip_crtc *crtc = crtc_state->crtc;
904 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
905 
906 	if (!state->is_init)
907 		return -EINVAL;
908 
909 	if (state->is_enable)
910 		return 0;
911 
912 	if (crtc_funcs->prepare)
913 		crtc_funcs->prepare(state);
914 
915 	if (state->enabled_at_spl == false)
916 		rockchip_connector_pre_enable(state);
917 
918 	if (crtc_funcs->enable)
919 		crtc_funcs->enable(state);
920 
921 	if (state->enabled_at_spl == false)
922 		rockchip_connector_enable(state);
923 
924 	if (crtc_funcs->post_enable)
925 		crtc_funcs->post_enable(state);
926 
927 #ifdef CONFIG_DRM_ROCKCHIP_RK628
928 	/*
929 	 * trigger .probe helper of U_BOOT_DRIVER(rk628) in ./rk628/rk628.c
930 	 */
931 	struct udevice * dev;
932 	int phandle, ret;
933 
934 	phandle = ofnode_read_u32_default(state->node, "bridge", -1);
935 	if (phandle < 0)
936 		printf("%s failed to find bridge phandle\n", ofnode_get_name(state->node));
937 
938 	ret = uclass_get_device_by_phandle_id(UCLASS_I2C_GENERIC, phandle, &dev);
939 	if (ret && ret != -ENOENT)
940 		printf("%s:%d failed to get rk628 device ret:%d\n", __func__, __LINE__, ret);
941 
942 #endif
943 
944 	if (crtc_state->soft_te)
945 		crtc_funcs->apply_soft_te(state);
946 
947 	state->is_enable = true;
948 
949 	return 0;
950 }
951 
display_disable(struct display_state * state)952 static int display_disable(struct display_state *state)
953 {
954 	struct crtc_state *crtc_state = &state->crtc_state;
955 	const struct rockchip_crtc *crtc = crtc_state->crtc;
956 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
957 
958 	if (!state->is_init)
959 		return 0;
960 
961 	if (!state->is_enable)
962 		return 0;
963 
964 	rockchip_connector_disable(state);
965 
966 	if (crtc_funcs->disable)
967 		crtc_funcs->disable(state);
968 
969 	rockchip_connector_post_disable(state);
970 
971 	state->is_enable = 0;
972 	state->is_init = 0;
973 
974 	return 0;
975 }
976 
display_check(struct display_state * state)977 static int display_check(struct display_state *state)
978 {
979 	struct connector_state *conn_state = &state->conn_state;
980 	struct rockchip_connector *conn = conn_state->connector;
981 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
982 	struct crtc_state *crtc_state = &state->crtc_state;
983 	const struct rockchip_crtc *crtc = crtc_state->crtc;
984 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
985 	int ret;
986 
987 	if (!state->is_init)
988 		return -EINVAL;
989 
990 	if (conn_funcs->check) {
991 		ret = conn_funcs->check(conn, state);
992 		if (ret)
993 			goto check_fail;
994 	}
995 
996 	if (crtc_funcs->check) {
997 		ret = crtc_funcs->check(state);
998 		if (ret)
999 			goto check_fail;
1000 	}
1001 
1002 	if (crtc_funcs->plane_check) {
1003 		ret = crtc_funcs->plane_check(state);
1004 		if (ret)
1005 			goto check_fail;
1006 	}
1007 
1008 	return 0;
1009 
1010 check_fail:
1011 	state->is_init = false;
1012 	return ret;
1013 }
1014 
display_logo(struct display_state * state)1015 static int display_logo(struct display_state *state)
1016 {
1017 	struct crtc_state *crtc_state = &state->crtc_state;
1018 	struct connector_state *conn_state = &state->conn_state;
1019 	struct overscan *overscan = &conn_state->overscan;
1020 	struct logo_info *logo = &state->logo;
1021 	u32 crtc_x, crtc_y, crtc_w, crtc_h;
1022 	u32 overscan_w, overscan_h;
1023 	int hdisplay, vdisplay, ret;
1024 
1025 	if (state->is_init)
1026 		return 0;
1027 
1028 	ret = display_init(state);
1029 	if (!state->is_init || ret)
1030 		return -ENODEV;
1031 
1032 	switch (logo->bpp) {
1033 	case 16:
1034 		crtc_state->format = ROCKCHIP_FMT_RGB565;
1035 		break;
1036 	case 24:
1037 		crtc_state->format = ROCKCHIP_FMT_RGB888;
1038 		break;
1039 	case 32:
1040 		crtc_state->format = ROCKCHIP_FMT_ARGB8888;
1041 		break;
1042 	default:
1043 		printf("can't support bmp bits[%d]\n", logo->bpp);
1044 		return -EINVAL;
1045 	}
1046 	hdisplay = conn_state->mode.crtc_hdisplay;
1047 	vdisplay = conn_state->mode.vdisplay;
1048 	crtc_state->src_rect.w = logo->width;
1049 	crtc_state->src_rect.h = logo->height;
1050 	crtc_state->src_rect.x = 0;
1051 	crtc_state->src_rect.y = 0;
1052 	crtc_state->ymirror = logo->ymirror;
1053 	crtc_state->rb_swap = 0;
1054 
1055 	crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset;
1056 	crtc_state->xvir = ALIGN(crtc_state->src_rect.w * logo->bpp, 32) >> 5;
1057 
1058 	if (state->logo_mode == ROCKCHIP_DISPLAY_FULLSCREEN) {
1059 		crtc_state->crtc_rect.x = 0;
1060 		crtc_state->crtc_rect.y = 0;
1061 		crtc_state->crtc_rect.w = hdisplay;
1062 		crtc_state->crtc_rect.h = vdisplay;
1063 	} else {
1064 		if (crtc_state->src_rect.w >= hdisplay) {
1065 			crtc_state->crtc_rect.x = 0;
1066 			crtc_state->crtc_rect.w = hdisplay;
1067 		} else {
1068 			crtc_state->crtc_rect.x = (hdisplay - crtc_state->src_rect.w) / 2;
1069 			crtc_state->crtc_rect.w = crtc_state->src_rect.w;
1070 		}
1071 
1072 		if (crtc_state->src_rect.h >= vdisplay) {
1073 			crtc_state->crtc_rect.y = 0;
1074 			crtc_state->crtc_rect.h = vdisplay;
1075 		} else {
1076 			crtc_state->crtc_rect.y = (vdisplay - crtc_state->src_rect.h) / 2;
1077 			crtc_state->crtc_rect.h = crtc_state->src_rect.h;
1078 		}
1079 	}
1080 
1081 	/*
1082 	 * For some platforms, such as RK3576, use the win scale instead
1083 	 * of the post scale to configure overscan parameters, because the
1084 	 * sharp/post scale/split functions are mutually exclusice.
1085 	 */
1086 	if (crtc_state->overscan_by_win_scale) {
1087 		overscan_w = crtc_state->crtc_rect.w * (200 - overscan->left_margin * 2) / 200;
1088 		overscan_h = crtc_state->crtc_rect.h * (200 - overscan->top_margin * 2) / 200;
1089 
1090 		crtc_x = crtc_state->crtc_rect.x + overscan_w / 2;
1091 		crtc_y = crtc_state->crtc_rect.y + overscan_h / 2;
1092 		crtc_w = crtc_state->crtc_rect.w - overscan_w;
1093 		crtc_h = crtc_state->crtc_rect.h - overscan_h;
1094 
1095 		crtc_state->crtc_rect.x = crtc_x;
1096 		crtc_state->crtc_rect.y = crtc_y;
1097 		crtc_state->crtc_rect.w = crtc_w;
1098 		crtc_state->crtc_rect.h = crtc_h;
1099 	}
1100 
1101 	ret = display_check(state);
1102 	if (ret)
1103 		return ret;
1104 
1105 	ret = display_set_plane(state);
1106 	if (ret)
1107 		return ret;
1108 	display_enable(state);
1109 
1110 	return 0;
1111 }
1112 
get_crtc_id(ofnode connect,bool is_ports_node)1113 static int get_crtc_id(ofnode connect, bool is_ports_node)
1114 {
1115 	struct device_node *port_node;
1116 	struct device_node *remote;
1117 	int phandle;
1118 	int val;
1119 
1120 	if (is_ports_node) {
1121 		port_node = of_get_parent(connect.np);
1122 		if (!port_node)
1123 			goto err;
1124 
1125 		val = ofnode_read_u32_default(np_to_ofnode(port_node), "reg", -1);
1126 		if (val < 0)
1127 			goto err;
1128 	} else {
1129 		phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1);
1130 		if (phandle < 0)
1131 			goto err;
1132 
1133 		remote = of_find_node_by_phandle(phandle);
1134 		if (!remote)
1135 			goto err;
1136 
1137 		val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1);
1138 		if (val < 0)
1139 			goto err;
1140 	}
1141 
1142 	return val;
1143 err:
1144 	printf("Can't get crtc id, default set to id = 0\n");
1145 	return 0;
1146 }
1147 
get_crtc_mcu_mode(struct crtc_state * crtc_state,struct device_node * port_node,bool is_ports_node)1148 static int get_crtc_mcu_mode(struct crtc_state *crtc_state, struct device_node *port_node,
1149 			     bool is_ports_node)
1150 {
1151 	ofnode mcu_node, vp_node;
1152 	int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend;
1153 
1154 	if (is_ports_node) {
1155 		vp_node = np_to_ofnode(port_node);
1156 		mcu_node = ofnode_find_subnode(vp_node, "mcu-timing");
1157 		if (!ofnode_valid(mcu_node))
1158 			return -ENODEV;
1159 	} else {
1160 		mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing");
1161 		if (!ofnode_valid(mcu_node))
1162 			return -ENODEV;
1163 	}
1164 
1165 #define FDT_GET_MCU_INT(val, name) \
1166 	do { \
1167 		val = ofnode_read_s32_default(mcu_node, name, -1); \
1168 		if (val < 0) { \
1169 			printf("Can't get %s\n", name); \
1170 			return -ENXIO; \
1171 		} \
1172 	} while (0)
1173 
1174 	FDT_GET_MCU_INT(total_pixel, "mcu-pix-total");
1175 	FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst");
1176 	FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend");
1177 	FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst");
1178 	FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend");
1179 
1180 	crtc_state->mcu_timing.mcu_pix_total = total_pixel;
1181 	crtc_state->mcu_timing.mcu_cs_pst = cs_pst;
1182 	crtc_state->mcu_timing.mcu_cs_pend = cs_pend;
1183 	crtc_state->mcu_timing.mcu_rw_pst = rw_pst;
1184 	crtc_state->mcu_timing.mcu_rw_pend = rw_pend;
1185 
1186 	return 0;
1187 }
1188 
find_or_alloc_logo_cache(const char * bmp,int rotate)1189 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp, int rotate)
1190 {
1191 	struct rockchip_logo_cache *tmp, *logo_cache = NULL;
1192 
1193 	list_for_each_entry(tmp, &logo_cache_list, head) {
1194 		if ((!strcmp(tmp->name, bmp) && rotate == tmp->logo_rotate) ||
1195 		    (soc_is_rk3566() && tmp->logo_rotate)) {
1196 			logo_cache = tmp;
1197 			break;
1198 		}
1199 	}
1200 
1201 	if (!logo_cache) {
1202 		logo_cache = malloc(sizeof(*logo_cache));
1203 		if (!logo_cache) {
1204 			printf("failed to alloc memory for logo cache\n");
1205 			return NULL;
1206 		}
1207 		memset(logo_cache, 0, sizeof(*logo_cache));
1208 		strcpy(logo_cache->name, bmp);
1209 		INIT_LIST_HEAD(&logo_cache->head);
1210 		list_add_tail(&logo_cache->head, &logo_cache_list);
1211 	}
1212 
1213 	return logo_cache;
1214 }
1215 
1216 /* Note: used only for rkfb kernel driver */
load_kernel_bmp_logo(struct logo_info * logo,const char * bmp_name)1217 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name)
1218 {
1219 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
1220 	void *dst = NULL;
1221 	int len, size;
1222 	struct bmp_header *header;
1223 
1224 	if (!logo || !bmp_name)
1225 		return -EINVAL;
1226 
1227 	header = malloc(RK_BLK_SIZE);
1228 	if (!header)
1229 		return -ENOMEM;
1230 
1231 	len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE);
1232 	if (len != RK_BLK_SIZE) {
1233 		free(header);
1234 		return -EINVAL;
1235 	}
1236 	size = get_unaligned_le32(&header->file_size);
1237 	dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2);
1238 	len = rockchip_read_resource_file(dst, bmp_name, 0, size);
1239 	if (len != size) {
1240 		printf("failed to load bmp %s\n", bmp_name);
1241 		free(header);
1242 		return -ENOENT;
1243 	}
1244 
1245 	logo->mem = dst;
1246 #endif
1247 
1248 	return 0;
1249 }
1250 
1251 #ifdef BMP_DECODEER_LEGACY
load_bmp_logo_legacy(struct logo_info * logo,const char * bmp_name)1252 static int load_bmp_logo_legacy(struct logo_info *logo, const char *bmp_name)
1253 {
1254 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
1255 	struct rockchip_logo_cache *logo_cache;
1256 	struct bmp_header *header;
1257 	void *dst = NULL, *pdst;
1258 	int size, len;
1259 	int ret = 0;
1260 	int reserved = 0;
1261 	int dst_size;
1262 
1263 	if (!logo || !bmp_name)
1264 		return -EINVAL;
1265 	logo_cache = find_or_alloc_logo_cache(bmp_name, logo->rotate);
1266 	if (!logo_cache)
1267 		return -ENOMEM;
1268 
1269 	if (logo_cache->logo.mem) {
1270 		memcpy(logo, &logo_cache->logo, sizeof(*logo));
1271 		return 0;
1272 	}
1273 
1274 	header = malloc(RK_BLK_SIZE);
1275 	if (!header)
1276 		return -ENOMEM;
1277 
1278 	len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE);
1279 	if (len != RK_BLK_SIZE) {
1280 		ret = -EINVAL;
1281 		goto free_header;
1282 	}
1283 
1284 	logo->bpp = get_unaligned_le16(&header->bit_count);
1285 	logo->width = get_unaligned_le32(&header->width);
1286 	logo->height = get_unaligned_le32(&header->height);
1287 	dst_size = logo->width * logo->height * logo->bpp >> 3;
1288 	reserved = get_unaligned_le32(&header->reserved);
1289 	if (logo->height < 0)
1290 	    logo->height = -logo->height;
1291 	size = get_unaligned_le32(&header->file_size);
1292 	if (!can_direct_logo(logo->bpp)) {
1293 		if (size > MEMORY_POOL_SIZE) {
1294 			printf("failed to use boot buf as temp bmp buffer\n");
1295 			ret = -ENOMEM;
1296 			goto free_header;
1297 		}
1298 		pdst = get_display_buffer(size);
1299 
1300 	} else {
1301 		pdst = get_display_buffer(size);
1302 		dst = pdst;
1303 	}
1304 
1305 	len = rockchip_read_resource_file(pdst, bmp_name, 0, size);
1306 	if (len != size) {
1307 		printf("failed to load bmp %s\n", bmp_name);
1308 		ret = -ENOENT;
1309 		goto free_header;
1310 	}
1311 
1312 	if (!can_direct_logo(logo->bpp)) {
1313 		/*
1314 		 * TODO: force use 16bpp if bpp less than 16;
1315 		 */
1316 		logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp;
1317 		dst_size = logo->width * logo->height * logo->bpp >> 3;
1318 		dst = get_display_buffer(dst_size);
1319 		if (!dst) {
1320 			ret = -ENOMEM;
1321 			goto free_header;
1322 		}
1323 		if (bmpdecoder(pdst, dst, logo->bpp)) {
1324 			printf("failed to decode bmp %s\n", bmp_name);
1325 			ret = -EINVAL;
1326 			goto free_header;
1327 		}
1328 
1329 		logo->offset = 0;
1330 		logo->ymirror = 0;
1331 	} else {
1332 		logo->offset = get_unaligned_le32(&header->data_offset);
1333 		if (reserved == BMP_PROCESSED_FLAG)
1334 			logo->ymirror = 0;
1335 		else
1336 			logo->ymirror = 1;
1337 	}
1338 	logo->mem = dst;
1339 
1340 	memcpy(&logo_cache->logo, logo, sizeof(*logo));
1341 
1342 	flush_dcache_range((ulong)dst, ALIGN((ulong)dst + dst_size, CONFIG_SYS_CACHELINE_SIZE));
1343 
1344 free_header:
1345 
1346 	free(header);
1347 
1348 	return ret;
1349 #else
1350 	return -EINVAL;
1351 #endif
1352 }
1353 #endif
1354 
bitmap_create(int width,int height,unsigned int state)1355 static void *bitmap_create(int width, int height, unsigned int state)
1356 {
1357 	/* Ensure a stupidly large bitmap is not created */
1358 	if (width > 4096 || height > 4096)
1359 		return NULL;
1360 
1361 	return calloc(width * height, BYTES_PER_PIXEL);
1362 }
1363 
bitmap_get_buffer(void * bitmap)1364 static unsigned char *bitmap_get_buffer(void *bitmap)
1365 {
1366 	return bitmap;
1367 }
1368 
bitmap_destroy(void * bitmap)1369 static void bitmap_destroy(void *bitmap)
1370 {
1371 	free(bitmap);
1372 }
1373 
bmp_copy(void * dst,bmp_image * bmp)1374 static void bmp_copy(void *dst, bmp_image *bmp)
1375 {
1376 	u16 row, col;
1377 	u8 *image;
1378 	u8 *pdst = (u8 *)dst;
1379 
1380 	image = (u8 *)bmp->bitmap;
1381 	for (row = 0; row != bmp->height; row++) {
1382 		for (col = 0; col != bmp->width; col++) {
1383 			size_t z = (row * bmp->width + col) * BYTES_PER_PIXEL;
1384 
1385 			*pdst++ = image[z + 2];
1386 			*pdst++ = image[z + 1];
1387 			*pdst++ = image[z + 0];
1388 			*pdst++ = image[z + 3];
1389 		}
1390 	}
1391 }
1392 
rockchip_logo_rotate(struct logo_info * logo,void * src)1393 static void *rockchip_logo_rotate(struct logo_info *logo, void *src)
1394 {
1395 	void *dst_rotate;
1396 	int width = logo->width;
1397 	int height = logo->height;
1398 	int width_rotate = logo->height & 0x3 ? (logo->height & ~0x3) + 4 : logo->height;
1399 	int height_rotate = logo->width;
1400 	int dst_size = width * height * logo->bpp >> 3;
1401 	int dst_size_rotate = width_rotate * height_rotate * logo->bpp >> 3;
1402 	int bytes_per_pixel = logo->bpp >> 3;
1403 	int padded_width;
1404 	int i, j;
1405 	char *img_data;
1406 
1407 	if (!(logo->rotate == 90 || logo->rotate == 180 || logo->rotate == 270)) {
1408 		printf("Unsupported rotation angle\n");
1409 		return NULL;
1410 	}
1411 
1412 	img_data = (char *)malloc(dst_size);
1413 	if (!img_data) {
1414 		printf("failed to alloc memory for image data\n");
1415 		return NULL;
1416 	}
1417 	memcpy(img_data, src, dst_size);
1418 
1419 	dst_rotate = get_display_buffer(dst_size_rotate);
1420 	if (!dst_rotate)
1421 		return NULL;
1422 	memset(dst_rotate, 0, dst_size_rotate);
1423 
1424 	switch (logo->rotate) {
1425 	case 90:
1426 		logo->width = width_rotate;
1427 		logo->height = height_rotate;
1428 		padded_width = height & 0x3 ? (height & ~0x3) + 4 : height;
1429 		for (i = 0; i < height; i++) {
1430 			for (j = 0; j < width; j++) {
1431 				memcpy(dst_rotate + (j * padded_width * bytes_per_pixel) +
1432 				       (height - i - 1) * bytes_per_pixel,
1433 				       img_data + i * width * bytes_per_pixel + j * bytes_per_pixel,
1434 				       bytes_per_pixel);
1435 			}
1436 		}
1437 		break;
1438 	case 180:
1439 		for (i = 0; i < height; i++) {
1440 			for (j = 0; j < width; j++) {
1441 				memcpy(dst_rotate + (height - i - 1) * width * bytes_per_pixel +
1442 				       (width - j - 1) * bytes_per_pixel,
1443 				       img_data + i * width * bytes_per_pixel + j * bytes_per_pixel,
1444 				       bytes_per_pixel);
1445 			}
1446 		}
1447 		break;
1448 	case 270:
1449 		logo->width = width_rotate;
1450 		logo->height = height_rotate;
1451 		padded_width = height & 0x3 ? (height & ~0x3) + 4 : height;
1452 		for (i = 0; i < height; i++) {
1453 			for (j = 0; j < width; j++) {
1454 				memcpy(dst_rotate + (width - j - 1) * padded_width * bytes_per_pixel +
1455 				       i * bytes_per_pixel,
1456 				       img_data + i * width * bytes_per_pixel + j * bytes_per_pixel,
1457 				       bytes_per_pixel);
1458 			}
1459 		}
1460 		break;
1461 	default:
1462 		break;
1463 	}
1464 
1465 	free(img_data);
1466 
1467 	return dst_rotate;
1468 }
1469 
load_bmp_logo(struct logo_info * logo,const char * bmp_name)1470 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
1471 {
1472 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
1473 	struct rockchip_logo_cache *logo_cache;
1474 	bmp_bitmap_callback_vt bitmap_callbacks = {
1475 		bitmap_create,
1476 		bitmap_destroy,
1477 		bitmap_get_buffer,
1478 	};
1479 	bmp_result code;
1480 	bmp_image bmp;
1481 	void *bmp_data;
1482 	void *dst = NULL;
1483 	void *dst_rotate = NULL;
1484 	int len, dst_size;
1485 	int ret = 0;
1486 
1487 	if (!logo || !bmp_name)
1488 		return -EINVAL;
1489 
1490 	logo_cache = find_or_alloc_logo_cache(bmp_name, logo->rotate);
1491 	if (!logo_cache)
1492 		return -ENOMEM;
1493 
1494 	if (logo_cache->logo.mem) {
1495 		memcpy(logo, &logo_cache->logo, sizeof(*logo));
1496 		return 0;
1497 	}
1498 
1499 	bmp_data = malloc(MAX_IMAGE_BYTES);
1500 	if (!bmp_data) {
1501 		printf("failed to alloc bmp data\n");
1502 		return -ENOMEM;
1503 	}
1504 
1505 	bmp_create(&bmp, &bitmap_callbacks);
1506 
1507 	len = rockchip_read_resource_file(bmp_data, bmp_name, 0, MAX_IMAGE_BYTES);
1508 	if (len < 0) {
1509 		ret = -EINVAL;
1510 		goto free_bmp_data;
1511 	}
1512 
1513 	/* analyse the BMP */
1514 	code = bmp_analyse(&bmp, len, bmp_data);
1515 	if (code != BMP_OK) {
1516 		printf("failed to parse bmp:%s header\n", bmp_name);
1517 		ret = -EINVAL;
1518 		goto free_bmp_data;
1519 	}
1520 
1521 	if (bmp.buffer_size > MAX_IMAGE_BYTES) {
1522 		printf("bmp[%s] data size[%dKB] is over the limitation MAX_IMAGE_BYTES[%dKB]\n",
1523 			bmp_name, bmp.buffer_size / 1024, MAX_IMAGE_BYTES / 1024);
1524 		ret = -EINVAL;
1525 		goto free_bmp_data;
1526 	}
1527 
1528 	/* fix bpp to 32 */
1529 	logo->bpp = 32;
1530 	logo->offset = 0;
1531 	logo->ymirror = 0;
1532 	logo->width = get_unaligned_le32(&bmp.width);
1533 	logo->height = get_unaligned_le32(&bmp.height);
1534 	dst_size = logo->width * logo->height * logo->bpp >> 3;
1535 	/* decode the image to RGBA8888 format */
1536 	code = bmp_decode(&bmp);
1537 	if (code != BMP_OK) {
1538 		/* allow partially decoded images */
1539 		if (code != BMP_INSUFFICIENT_DATA && code != BMP_DATA_ERROR) {
1540 			printf("failed to allocate the buffer of bmp:%s\n", bmp_name);
1541 			ret = -EINVAL;
1542 			goto free_bmp_data;
1543 		}
1544 	}
1545 
1546 	dst = get_display_buffer(dst_size);
1547 	if (!dst) {
1548 		ret = -ENOMEM;
1549 		goto free_bmp_data;
1550 	}
1551 	bmp_copy(dst, &bmp);
1552 
1553 	if (logo->rotate) {
1554 		dst_rotate = rockchip_logo_rotate(logo, dst);
1555 		if (dst_rotate) {
1556 			dst = dst_rotate;
1557 			dst_size = logo->width * logo->height * logo->bpp >> 3;
1558 		}
1559 		printf("logo ratate %d\n", logo->rotate);
1560 	}
1561 	logo->mem = dst;
1562 
1563 	memcpy(&logo_cache->logo, logo, sizeof(*logo));
1564 	logo_cache->logo_rotate = logo->rotate;
1565 
1566 	flush_dcache_range((ulong)dst, ALIGN((ulong)dst + dst_size, CONFIG_SYS_CACHELINE_SIZE));
1567 free_bmp_data:
1568 	/* clean up */
1569 	bmp_finalise(&bmp);
1570 	free(bmp_data);
1571 
1572 	return ret;
1573 #else
1574 	return -EINVAL;
1575 #endif
1576 }
1577 
1578 #ifdef CONFIG_ROCKCHIP_VIDCONSOLE
vidconsole_init(struct udevice * dev,struct display_state * state)1579 static int vidconsole_init(struct udevice *dev, struct display_state *state)
1580 {
1581 	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
1582 	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
1583 	struct crtc_state *crtc_state = &state->crtc_state;
1584 	struct connector_state *conn_state = &state->conn_state;
1585 	struct overscan *overscan = &conn_state->overscan;
1586 	u32 crtc_x, crtc_y, crtc_w, crtc_h;
1587 	u32 overscan_w, overscan_h;
1588 	int ret;
1589 
1590 	switch (DRM_ROCKCHIP_FB_BPP) {
1591 	case 16:
1592 		crtc_state->format = ROCKCHIP_FMT_RGB565;
1593 		break;
1594 	case 24:
1595 		crtc_state->format = ROCKCHIP_FMT_RGB888;
1596 		break;
1597 	case 32:
1598 		crtc_state->format = ROCKCHIP_FMT_ARGB8888;
1599 		break;
1600 	default:
1601 		printf("can't support video console bpp[%d]\n", DRM_ROCKCHIP_FB_BPP);
1602 		return -EINVAL;
1603 	}
1604 
1605 	crtc_state->src_rect.w = uc_priv->xsize;
1606 	crtc_state->src_rect.h = uc_priv->ysize;
1607 	crtc_state->src_rect.x = 0;
1608 	crtc_state->src_rect.y = 0;
1609 	/* the video console mode is fullscreen display */
1610 	crtc_state->crtc_rect.w = conn_state->mode.crtc_hdisplay;
1611 	crtc_state->crtc_rect.h = conn_state->mode.crtc_vdisplay;
1612 	crtc_state->crtc_rect.x = 0;
1613 	crtc_state->crtc_rect.y = 0;
1614 
1615 	crtc_state->dma_addr = (u32)plat->base;
1616 	crtc_state->xvir = ALIGN(crtc_state->src_rect.w * DRM_ROCKCHIP_FB_BPP, 32) >> 5;
1617 
1618 	/*
1619 	 * For some platforms, such as RK3576, use the win scale instead
1620 	 * of the post scale to configure overscan parameters, because the
1621 	 * sharp/post scale/split functions are mutually exclusice.
1622 	 */
1623 	if (crtc_state->overscan_by_win_scale) {
1624 		overscan_w = crtc_state->crtc_rect.w * (200 - overscan->left_margin * 2) / 200;
1625 		overscan_h = crtc_state->crtc_rect.h * (200 - overscan->top_margin * 2) / 200;
1626 
1627 		crtc_x = crtc_state->crtc_rect.x + overscan_w / 2;
1628 		crtc_y = crtc_state->crtc_rect.y + overscan_h / 2;
1629 		crtc_w = crtc_state->crtc_rect.w - overscan_w;
1630 		crtc_h = crtc_state->crtc_rect.h - overscan_h;
1631 
1632 		crtc_state->crtc_rect.x = crtc_x;
1633 		crtc_state->crtc_rect.y = crtc_y;
1634 		crtc_state->crtc_rect.w = crtc_w;
1635 		crtc_state->crtc_rect.h = crtc_h;
1636 	}
1637 
1638 	ret = display_check(state);
1639 	if (ret)
1640 		return ret;
1641 
1642 	ret = display_set_plane(state);
1643 	if (ret)
1644 		return ret;
1645 
1646 	return 0;
1647 }
1648 
rockchip_vidconsole_display(struct udevice * dev)1649 int rockchip_vidconsole_display(struct udevice *dev)
1650 {
1651 	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
1652 	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
1653 	struct display_state *state;
1654 	bool is_init = false;
1655 	u32 fb_size;
1656 	int ret;
1657 
1658 	uc_priv->xsize = U16_MAX;
1659 	uc_priv->ysize = U16_MAX;
1660 	/* convert bpp 32/16/8 to VIDEO_BPP32/VIDEO_BPP16/VIDEO_BPP8 */
1661 	uc_priv->bpix = ilog2(DRM_ROCKCHIP_FB_BPP);
1662 	list_for_each_entry(state, &rockchip_display_list, head) {
1663 		ret = display_init(state);
1664 		is_init |= state->is_init;
1665 		if (!state->is_init)
1666 			continue;
1667 
1668 		/*
1669 		 * The default horizontal resolution of video console is the minimum
1670 		 * &drm_display_mode.crtc_hdisplay of the VPs, and the vertical
1671 		 * resolution is the minimum &drm_display_mode.crtc_vdisplay.
1672 		 */
1673 		if (uc_priv->xsize > state->conn_state.mode.crtc_hdisplay)
1674 			uc_priv->xsize = state->conn_state.mode.crtc_hdisplay;
1675 
1676 		if (uc_priv->ysize > state->conn_state.mode.crtc_vdisplay)
1677 			uc_priv->ysize = state->conn_state.mode.crtc_vdisplay;
1678 
1679 		state->vidcon_fb_addr = plat->base;
1680 	}
1681 	if (!is_init) {
1682 		ret = -ENODEV;
1683 		goto display_deinit;
1684 	}
1685 
1686 	if (CONFIG_ROCKCHIP_VIDCONSOLE_WIDTH > 0 && CONFIG_ROCKCHIP_VIDCONSOLE_HEIGHT > 0) {
1687 		uc_priv->xsize = CONFIG_ROCKCHIP_VIDCONSOLE_WIDTH;
1688 		uc_priv->ysize = CONFIG_ROCKCHIP_VIDCONSOLE_HEIGHT;
1689 	}
1690 
1691 	fb_size = uc_priv->xsize * uc_priv->ysize * VNBYTES(uc_priv->bpix);
1692 	if (fb_size > CONFIG_ROCKCHIP_VIDCONSOLE_MEM_RESERVED_SIZE_MBYTES * 1024 * 1024) {
1693 		printf("video console fb size [%d Bytes] is over reserved [%d Bytes], then back to show uboot logo\n",
1694 		       fb_size, CONFIG_ROCKCHIP_VIDCONSOLE_MEM_RESERVED_SIZE_MBYTES * 1024 * 1024);
1695 		ret = -EINVAL;
1696 		goto display_deinit;
1697 	}
1698 	memset((void *)plat->base, 0, fb_size);
1699 
1700 	list_for_each_entry(state, &rockchip_display_list, head) {
1701 		if (!state->is_init)
1702 			continue;
1703 
1704 		ret = vidconsole_init(dev, state);
1705 		if (ret) {
1706 			printf("failed to init video console, then back to show uboot logo\n");
1707 			goto display_deinit;
1708 		}
1709 	}
1710 
1711 	list_for_each_entry(state, &rockchip_display_list, head) {
1712 		if (!state->is_init)
1713 			continue;
1714 
1715 		display_enable(state);
1716 	}
1717 
1718 	printf("Enable video console mode: resolution[%dx%d] bpp[%d]\n",
1719 	       uc_priv->xsize, uc_priv->ysize, DRM_ROCKCHIP_FB_BPP);
1720 
1721 	return 0;
1722 
1723 display_deinit:
1724 	list_for_each_entry(state, &rockchip_display_list, head) {
1725 		state->is_init = false;
1726 		state->vidcon_fb_addr = 0;
1727 	}
1728 	return ret;
1729 }
1730 #endif
1731 
rockchip_show_bmp(const char * bmp)1732 int rockchip_show_bmp(const char *bmp)
1733 {
1734 	struct display_state *s;
1735 	int ret = 0;
1736 
1737 	if (!bmp) {
1738 		list_for_each_entry(s, &rockchip_display_list, head)
1739 			display_disable(s);
1740 		return -ENOENT;
1741 	}
1742 
1743 	list_for_each_entry(s, &rockchip_display_list, head) {
1744 		s->logo.mode = s->charge_logo_mode;
1745 		if (load_bmp_logo(&s->logo, bmp))
1746 			continue;
1747 		ret = display_logo(s);
1748 	}
1749 
1750 	return ret;
1751 }
1752 
rockchip_show_logo(void)1753 int rockchip_show_logo(void)
1754 {
1755 	struct display_state *s;
1756 	struct display_state *ms = NULL;
1757 	int ret = 0;
1758 	int count = 0;
1759 
1760 	list_for_each_entry(s, &rockchip_display_list, head) {
1761 		s->logo.mode = s->logo_mode;
1762 		s->logo.rotate = s->logo_rotate;
1763 		if (load_bmp_logo(&s->logo, s->ulogo_name)) {
1764 			printf("failed to display uboot logo\n");
1765 		} else {
1766 			ret = display_logo(s);
1767 			if (ret == -EAGAIN)
1768 				ms = s;
1769 		}
1770 		/* Load kernel bmp in rockchip_display_fixup() later */
1771 	}
1772 
1773 	/*
1774 	 * For rk3566, the mirror win must be enabled after the related
1775 	 * source win. If error code is EAGAIN, the mirror win may be
1776 	 * first enabled unexpectedly, and we will move the enabling process
1777 	 * as follows.
1778 	 */
1779 	if (ms) {
1780 		while (count < 5) {
1781 			ret = display_logo(ms);
1782 			if (ret != -EAGAIN)
1783 				break;
1784 			mdelay(10);
1785 			count++;
1786 		}
1787 	}
1788 
1789 	return ret;
1790 }
1791 
rockchip_vop_dump(const char * cmd)1792 int rockchip_vop_dump(const char *cmd)
1793 {
1794 	struct display_state *state;
1795 	struct crtc_state *crtc_state;
1796 	struct rockchip_crtc *crtc;
1797 	const struct rockchip_crtc_funcs *crtc_funcs;
1798 	int ret = -EINVAL;
1799 
1800 	list_for_each_entry(state, &rockchip_display_list, head) {
1801 		if (!state->is_init)
1802 			continue;
1803 		crtc_state = &state->crtc_state;
1804 		crtc = crtc_state->crtc;
1805 		crtc_funcs = crtc->funcs;
1806 
1807 		if (!cmd)
1808 			ret = crtc_funcs->active_regs_dump(state);
1809 		else if (!strcmp(cmd, "a") || !strcmp(cmd, "all"))
1810 			ret = crtc_funcs->regs_dump(state);
1811 		if (!ret)
1812 			break;
1813 	}
1814 
1815 	if (ret)
1816 		ret = CMD_RET_USAGE;
1817 
1818 	return ret;
1819 }
1820 
1821 enum {
1822 	PORT_DIR_IN,
1823 	PORT_DIR_OUT,
1824 };
1825 
rockchip_of_graph_get_port_by_id(ofnode node,int id)1826 const struct device_node *rockchip_of_graph_get_port_by_id(ofnode node, int id)
1827 {
1828 	ofnode ports, port;
1829 	u32 reg;
1830 
1831 	ports = ofnode_find_subnode(node, "ports");
1832 	if (!ofnode_valid(ports))
1833 		return NULL;
1834 
1835 	ofnode_for_each_subnode(port, ports) {
1836 		if (ofnode_read_u32(port, "reg", &reg))
1837 			continue;
1838 
1839 		if (reg == id)
1840 			break;
1841 	}
1842 
1843 	if (reg == id)
1844 		return ofnode_to_np(port);
1845 
1846 	return NULL;
1847 }
1848 
rockchip_of_graph_get_port_parent(ofnode port)1849 static const struct device_node *rockchip_of_graph_get_port_parent(ofnode port)
1850 {
1851 	ofnode parent;
1852 	int is_ports_node;
1853 
1854 	parent = ofnode_get_parent(port);
1855 	is_ports_node = strstr(ofnode_to_np(parent)->full_name, "ports") ? 1 : 0;
1856 	if (is_ports_node)
1857 		parent = ofnode_get_parent(parent);
1858 
1859 	return ofnode_to_np(parent);
1860 }
1861 
1862 const struct device_node *
rockchip_of_graph_get_endpoint_by_regs(ofnode node,int port,int endpoint)1863 rockchip_of_graph_get_endpoint_by_regs(ofnode node, int port, int endpoint)
1864 {
1865 	const struct device_node *port_node;
1866 	ofnode ep;
1867 	u32 reg;
1868 
1869 	port_node = rockchip_of_graph_get_port_by_id(node, port);
1870 	if (!port_node)
1871 		return NULL;
1872 
1873 	ofnode_for_each_subnode(ep, np_to_ofnode(port_node)) {
1874 		if (ofnode_read_u32(ep, "reg", &reg))
1875 			break;
1876 		if (reg == endpoint)
1877 			break;
1878 	}
1879 
1880 	if (!ofnode_valid(ep))
1881 		return NULL;
1882 
1883 	return ofnode_to_np(ep);
1884 }
1885 
1886 static const struct device_node *
rockchip_of_graph_get_remote_node(ofnode node,int port,int endpoint)1887 rockchip_of_graph_get_remote_node(ofnode node, int port, int endpoint)
1888 {
1889 	const struct device_node *ep_node;
1890 	ofnode ep;
1891 	uint phandle;
1892 
1893 	ep_node = rockchip_of_graph_get_endpoint_by_regs(node, port, endpoint);
1894 	if (!ep_node)
1895 		return NULL;
1896 
1897 	if (ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle))
1898 		return NULL;
1899 
1900 	ep = ofnode_get_by_phandle(phandle);
1901 	if (!ofnode_valid(ep))
1902 		return NULL;
1903 
1904 	return ofnode_to_np(ep);
1905 }
1906 
rockchip_of_find_panel(struct udevice * dev,struct rockchip_panel ** panel)1907 static int rockchip_of_find_panel(struct udevice *dev, struct rockchip_panel **panel)
1908 {
1909 	const struct device_node *ep_node, *panel_node;
1910 	ofnode panel_ofnode, port;
1911 	struct udevice *panel_dev;
1912 	int ret = 0;
1913 
1914 	*panel = NULL;
1915 	panel_ofnode = dev_read_subnode(dev, "panel");
1916 	if (ofnode_valid(panel_ofnode) && ofnode_is_available(panel_ofnode)) {
1917 		ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_ofnode,
1918 						  &panel_dev);
1919 		if (!ret)
1920 			goto found;
1921 	}
1922 
1923 	ep_node = rockchip_of_graph_get_remote_node(dev->node, PORT_DIR_OUT, 0);
1924 	if (!ep_node)
1925 		return -ENODEV;
1926 
1927 	port = ofnode_get_parent(np_to_ofnode(ep_node));
1928 	if (!ofnode_valid(port))
1929 		return -ENODEV;
1930 
1931 	panel_node = rockchip_of_graph_get_port_parent(port);
1932 	if (!panel_node)
1933 		return -ENODEV;
1934 
1935 	ret = uclass_get_device_by_ofnode(UCLASS_PANEL, np_to_ofnode(panel_node), &panel_dev);
1936 	if (!ret)
1937 		goto found;
1938 
1939 	return -ENODEV;
1940 
1941 found:
1942 	*panel = (struct rockchip_panel *)dev_get_driver_data(panel_dev);
1943 	return 0;
1944 }
1945 
rockchip_of_find_bridge(struct udevice * dev,struct rockchip_bridge ** bridge)1946 static int rockchip_of_find_bridge(struct udevice *dev, struct rockchip_bridge **bridge)
1947 {
1948 	const struct device_node *ep_node, *bridge_node;
1949 	ofnode port;
1950 	struct udevice *bridge_dev;
1951 	int ret = 0;
1952 
1953 	ep_node = rockchip_of_graph_get_remote_node(dev->node, PORT_DIR_OUT, 0);
1954 	if (!ep_node)
1955 		return -ENODEV;
1956 
1957 	port = ofnode_get_parent(np_to_ofnode(ep_node));
1958 	if (!ofnode_valid(port))
1959 		return -ENODEV;
1960 
1961 	bridge_node = rockchip_of_graph_get_port_parent(port);
1962 	if (!bridge_node)
1963 		return -ENODEV;
1964 
1965 	ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE, np_to_ofnode(bridge_node),
1966 					  &bridge_dev);
1967 	if (!ret)
1968 		goto found;
1969 
1970 	return -ENODEV;
1971 
1972 found:
1973 	*bridge = (struct rockchip_bridge *)dev_get_driver_data(bridge_dev);
1974 	return 0;
1975 }
1976 
rockchip_of_find_panel_or_bridge(struct udevice * dev,struct rockchip_panel ** panel,struct rockchip_bridge ** bridge)1977 static int rockchip_of_find_panel_or_bridge(struct udevice *dev, struct rockchip_panel **panel,
1978 					    struct rockchip_bridge **bridge)
1979 {
1980 	int ret = 0;
1981 
1982 	if (*panel)
1983 		return 0;
1984 
1985 	*panel = NULL;
1986 	*bridge = NULL;
1987 
1988 	if (panel) {
1989 		ret  = rockchip_of_find_panel(dev, panel);
1990 		if (!ret)
1991 			return 0;
1992 	}
1993 
1994 	if (ret) {
1995 		ret = rockchip_of_find_bridge(dev, bridge);
1996 		if (!ret)
1997 			ret = rockchip_of_find_panel_or_bridge((*bridge)->dev, panel,
1998 							       &(*bridge)->next_bridge);
1999 	}
2000 
2001 	return ret;
2002 }
2003 
rockchip_of_find_phy(struct udevice * dev)2004 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev)
2005 {
2006 	struct udevice *phy_dev;
2007 	int ret;
2008 
2009 	ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev);
2010 	if (ret)
2011 		return NULL;
2012 
2013 	return (struct rockchip_phy *)dev_get_driver_data(phy_dev);
2014 }
2015 
rockchip_of_find_connector_device(ofnode endpoint)2016 static struct udevice *rockchip_of_find_connector_device(ofnode endpoint)
2017 {
2018 	ofnode ep, port, ports, conn;
2019 	uint phandle;
2020 	struct udevice *dev;
2021 	int ret;
2022 
2023 	if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle))
2024 		return NULL;
2025 
2026 	ep = ofnode_get_by_phandle(phandle);
2027 	if (!ofnode_valid(ep) || !ofnode_is_available(ep))
2028 		return NULL;
2029 
2030 	port = ofnode_get_parent(ep);
2031 	if (!ofnode_valid(port))
2032 		return NULL;
2033 
2034 	ports = ofnode_get_parent(port);
2035 	if (!ofnode_valid(ports))
2036 		return NULL;
2037 
2038 	conn = ofnode_get_parent(ports);
2039 	if (!ofnode_valid(conn) || !ofnode_is_available(conn))
2040 		return NULL;
2041 
2042 	ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev);
2043 	if (ret)
2044 		return NULL;
2045 
2046 	return dev;
2047 }
2048 
rockchip_of_get_connector(ofnode endpoint)2049 static struct rockchip_connector *rockchip_of_get_connector(ofnode endpoint)
2050 {
2051 	struct rockchip_connector *conn;
2052 	struct udevice *dev;
2053 	int ret;
2054 
2055 	dev = rockchip_of_find_connector_device(endpoint);
2056 	if (!dev) {
2057 		printf("Warn: can't find connect driver\n");
2058 		return NULL;
2059 	}
2060 
2061 	conn = get_rockchip_connector_by_device(dev);
2062 	if (!conn)
2063 		return NULL;
2064 	ret = rockchip_of_find_panel_or_bridge(dev, &conn->panel, &conn->bridge);
2065 	if (ret)
2066 		debug("Warn: no find panel or bridge\n");
2067 
2068 	conn->phy = rockchip_of_find_phy(dev);
2069 
2070 	return conn;
2071 }
2072 
rockchip_get_split_connector(struct rockchip_connector * conn)2073 static struct rockchip_connector *rockchip_get_split_connector(struct rockchip_connector *conn)
2074 {
2075 	char *conn_name;
2076 	struct device_node *split_node;
2077 	struct udevice *split_dev;
2078 	struct rockchip_connector *split_conn;
2079 	int ret;
2080 
2081 	conn->split_mode = ofnode_read_bool(conn->dev->node, "split-mode");
2082 	conn->dual_channel_mode = ofnode_read_bool(conn->dev->node, "dual-channel");
2083 	if (!conn->split_mode && !conn->dual_channel_mode)
2084 		return NULL;
2085 
2086 	switch (conn->type) {
2087 	case DRM_MODE_CONNECTOR_DisplayPort:
2088 		conn_name = "dp";
2089 		break;
2090 	case DRM_MODE_CONNECTOR_eDP:
2091 		conn_name = "edp";
2092 		break;
2093 	case DRM_MODE_CONNECTOR_HDMIA:
2094 		conn_name = "hdmi";
2095 		break;
2096 	case DRM_MODE_CONNECTOR_LVDS:
2097 		conn_name = "lvds";
2098 		break;
2099 	default:
2100 		return NULL;
2101 	}
2102 
2103 	split_node = of_alias_get_dev(conn_name, !conn->id);
2104 	if (!split_node || !of_device_is_available(split_node))
2105 		return NULL;
2106 
2107 	ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, np_to_ofnode(split_node), &split_dev);
2108 	if (ret)
2109 		return NULL;
2110 
2111 	split_conn = get_rockchip_connector_by_device(split_dev);
2112 	if (!split_conn)
2113 		return NULL;
2114 	ret = rockchip_of_find_panel_or_bridge(split_dev, &split_conn->panel, &split_conn->bridge);
2115 	if (ret)
2116 		debug("Warn: no find panel or bridge\n");
2117 
2118 	split_conn->phy = rockchip_of_find_phy(split_dev);
2119 	split_conn->split_mode = conn->split_mode;
2120 	split_conn->dual_channel_mode = conn->dual_channel_mode;
2121 
2122 	return split_conn;
2123 }
2124 
rockchip_get_display_path_status(ofnode endpoint)2125 static bool rockchip_get_display_path_status(ofnode endpoint)
2126 {
2127 	ofnode ep;
2128 	uint phandle;
2129 
2130 	if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle))
2131 		return false;
2132 
2133 	ep = ofnode_get_by_phandle(phandle);
2134 	if (!ofnode_valid(ep) || !ofnode_is_available(ep))
2135 		return false;
2136 
2137 	return true;
2138 }
2139 
2140 #if defined(CONFIG_ROCKCHIP_RK3568)
rockchip_display_fixup_dts(void * blob)2141 static int rockchip_display_fixup_dts(void *blob)
2142 {
2143 	ofnode route_node, route_subnode, conn_ep, conn_port;
2144 	const struct device_node *route_sub_devnode;
2145 	const struct device_node *ep_node, *conn_ep_dev_node;
2146 	u32 phandle;
2147 	int conn_ep_offset;
2148 	const char *route_sub_path, *path;
2149 
2150 	/* Don't go further if new variant after
2151 	 * reading PMUGRF_SOC_CON15
2152 	 */
2153 	if ((readl(0xfdc20100) & GENMASK(15, 14)))
2154 		return 0;
2155 
2156 	route_node = ofnode_path("/display-subsystem/route");
2157 	if (!ofnode_valid(route_node))
2158 		return -EINVAL;
2159 
2160 	ofnode_for_each_subnode(route_subnode, route_node) {
2161 		if (!ofnode_is_available(route_subnode))
2162 			continue;
2163 
2164 		route_sub_devnode = ofnode_to_np(route_subnode);
2165 		route_sub_path = route_sub_devnode->full_name;
2166 		if (!strstr(ofnode_get_name(route_subnode), "dsi") &&
2167 		    !strstr(ofnode_get_name(route_subnode), "edp"))
2168 			return 0;
2169 
2170 		phandle = ofnode_read_u32_default(route_subnode, "connect", -1);
2171 		if (phandle < 0) {
2172 			printf("Warn: can't find connect node's handle\n");
2173 			continue;
2174 		}
2175 
2176 		ep_node = of_find_node_by_phandle(phandle);
2177 		if (!ofnode_valid(np_to_ofnode(ep_node))) {
2178 			printf("Warn: can't find endpoint node from phandle\n");
2179 			continue;
2180 		}
2181 
2182 		ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle);
2183 		conn_ep = ofnode_get_by_phandle(phandle);
2184 		if (!ofnode_valid(conn_ep) || !ofnode_is_available(conn_ep))
2185 			return -ENODEV;
2186 
2187 		conn_port = ofnode_get_parent(conn_ep);
2188 		if (!ofnode_valid(conn_port))
2189 			return -ENODEV;
2190 
2191 		ofnode_for_each_subnode(conn_ep, conn_port) {
2192 			conn_ep_dev_node = ofnode_to_np(conn_ep);
2193 			path = conn_ep_dev_node->full_name;
2194 			ofnode_read_u32(conn_ep, "remote-endpoint", &phandle);
2195 			conn_ep_offset = fdt_path_offset(blob, path);
2196 
2197 			if (!ofnode_is_available(conn_ep) &&
2198 			    strstr(ofnode_get_name(conn_ep), "endpoint@0")) {
2199 				do_fixup_by_path_u32(blob, route_sub_path,
2200 						     "connect", phandle, 1);
2201 				fdt_status_okay(blob, conn_ep_offset);
2202 
2203 			} else if (ofnode_is_available(conn_ep) &&
2204 				   strstr(ofnode_get_name(conn_ep), "endpoint@1")) {
2205 				fdt_status_disabled(blob, conn_ep_offset);
2206 			}
2207 		}
2208 	}
2209 
2210 	return 0;
2211 }
2212 #endif
2213 
2214 
rockchip_get_logo_memory(struct udevice * dev,const void * fdt_blob)2215 static fdt_addr_t rockchip_get_logo_memory(struct udevice *dev, const void *fdt_blob)
2216 {
2217 	int offset, idx;
2218 	fdt_size_t size;
2219 	fdt_addr_t addr;
2220 	const struct device_node *np = ofnode_to_np(dev->node);
2221 	struct device_node *logo_mem_np;
2222 	const char *name;
2223 
2224 	if (fdt_check_header(fdt_blob) != 0)
2225 		return 0;
2226 
2227 	idx = of_property_match_string(np, "memory-region-names", "drm-logo");
2228 	if (idx >= 0)
2229 		logo_mem_np = of_parse_phandle(np, "memory-region", idx);
2230 	else
2231 		logo_mem_np = of_parse_phandle(np, "logo-memory-region", 0);
2232 
2233 	if (!logo_mem_np) {
2234 		printf("Failed to find memory region for drm logo\n");
2235 		return 0;
2236 	}
2237 
2238 	offset = fdt_node_offset_by_phandle(fdt_blob, logo_mem_np->phandle);
2239 	addr = fdtdec_get_addr_size_auto_noparent(fdt_blob, offset, "reg", 0,
2240 						  &size, false);
2241 	if (addr == FDT_ADDR_T_NONE || !size)
2242 		return 0;
2243 
2244 	name = fdt_getprop(fdt_blob, offset, "compatible", NULL);
2245 	memset(memory_compatible, 0, sizeof(memory_compatible));
2246 	strcpy(memory_compatible, name);
2247 
2248 	return addr;
2249 }
2250 
2251 #ifdef CONFIG_MOS_SECONDARY
2252 /**
2253  * For one VOP dual os environment, the secondary OS maybe reboot without display
2254  * disable or SOC global reset, the hardware may be active state, so add this
2255  * reset to avoid unexpected issues.
2256  */
rockchip_display_secondary_reset(ofnode route_node)2257 static void rockchip_display_secondary_reset(ofnode route_node)
2258 {
2259 	struct udevice *crtc_dev;
2260 	struct device_node *port_node, *vop_node, *ep_node, *port_parent_node;
2261 	struct rockchip_crtc *crtc;
2262 	ofnode node;
2263 	int phandle, ret;
2264 	bool is_ports_node = false;
2265 	u32 share_mode, axi_id, plane_mask, vp_mask;
2266 
2267 	ofnode_for_each_subnode(node, route_node) {
2268 		phandle = ofnode_read_u32_default(node, "connect", -1);
2269 		if (phandle < 0) {
2270 			printf("Warn: can't find connect node's handle\n");
2271 			continue;
2272 		}
2273 		ep_node = of_find_node_by_phandle(phandle);
2274 		if (!ofnode_valid(np_to_ofnode(ep_node))) {
2275 			printf("Warn: can't find endpoint node from phandle\n");
2276 			continue;
2277 		}
2278 		port_node = of_get_parent(ep_node);
2279 		if (!ofnode_valid(np_to_ofnode(port_node))) {
2280 			printf("Warn: can't find port node from phandle\n");
2281 			continue;
2282 		}
2283 
2284 		port_parent_node = of_get_parent(port_node);
2285 		if (!ofnode_valid(np_to_ofnode(port_parent_node))) {
2286 			printf("Warn: can't find port parent node from phandle\n");
2287 			continue;
2288 		}
2289 
2290 		is_ports_node = strstr(port_parent_node->full_name, "ports") ? 1 : 0;
2291 		if (is_ports_node) {
2292 			vop_node = of_get_parent(port_parent_node);
2293 			if (!ofnode_valid(np_to_ofnode(vop_node))) {
2294 				printf("Warn: can't find crtc node from phandle\n");
2295 				continue;
2296 			}
2297 		} else {
2298 			vop_node = port_parent_node;
2299 		}
2300 
2301 		ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC,
2302 						  np_to_ofnode(vop_node),
2303 						  &crtc_dev);
2304 		if (ret) {
2305 			printf("Warn: can't find crtc driver %d\n", ret);
2306 			continue;
2307 		}
2308 		crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev);
2309 
2310 		share_mode = ofnode_read_u32_default(np_to_ofnode(vop_node), "rockchip,share-mode-val", 0);
2311 		if (share_mode != ROCKCHIP_VOP2_SHARE_MODE_SECONDARY) {
2312 			printf("error: VOP share mode config error: %d\n", share_mode);
2313 			return;
2314 		}
2315 		axi_id = ofnode_read_u32_default(np_to_ofnode(vop_node), "rockchip,share-mode-axi-id", 0);
2316 		vp_mask = ofnode_read_u32_default(np_to_ofnode(vop_node), "rockchip,share-mode-vp-mask", 0);
2317 		plane_mask = ofnode_read_u32_default(np_to_ofnode(vop_node), "rockchip,share-mode-plane-mask", 0);
2318 
2319 		if (crtc->funcs->reset)
2320 			crtc->funcs->reset(crtc_dev, axi_id, vp_mask, plane_mask);
2321 		/* for VOP2, only need to do reset once */
2322 		return;
2323 	}
2324 }
2325 #endif
2326 
rockchip_display_probe(struct udevice * dev)2327 static int rockchip_display_probe(struct udevice *dev)
2328 {
2329 	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
2330 	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
2331 	const void *blob = gd->fdt_blob;
2332 	int phandle;
2333 	struct udevice *crtc_dev;
2334 	struct rockchip_crtc *crtc;
2335 	struct rockchip_connector *conn, *split_conn;
2336 	struct display_state *s;
2337 	const char *name;
2338 	int ret;
2339 	ofnode node, route_node, timing_node;
2340 	struct device_node *port_node, *vop_node, *ep_node, *port_parent_node;
2341 	struct public_phy_data *data;
2342 	bool is_ports_node = false;
2343 	ulong base = 0;
2344 
2345 #if defined(CONFIG_ROCKCHIP_RK3568)
2346 	rockchip_display_fixup_dts((void *)blob);
2347 #endif
2348 	/* Before relocation we don't need to do anything */
2349 	if (!(gd->flags & GD_FLG_RELOC))
2350 		return 0;
2351 
2352 	data = malloc(sizeof(struct public_phy_data));
2353 	if (!data) {
2354 		printf("failed to alloc phy data\n");
2355 		return -ENOMEM;
2356 	}
2357 	data->phy_init = false;
2358 
2359 	base = rockchip_get_logo_memory(dev, blob);
2360 	if (base)/* Assigned drm_logo memory at dts */
2361 		init_display_buffer(base);
2362 	else
2363 		init_display_buffer(plat->base);
2364 
2365 	route_node = dev_read_subnode(dev, "route");
2366 	if (!ofnode_valid(route_node))
2367 		return -ENODEV;
2368 
2369 #ifdef CONFIG_MOS_SECONDARY
2370 	rockchip_display_secondary_reset(route_node);
2371 #endif
2372 
2373 	ofnode_for_each_subnode(node, route_node) {
2374 		if (!ofnode_is_available(node))
2375 			continue;
2376 		phandle = ofnode_read_u32_default(node, "connect", -1);
2377 		if (phandle < 0) {
2378 			printf("Warn: can't find connect node's handle\n");
2379 			continue;
2380 		}
2381 		ep_node = of_find_node_by_phandle(phandle);
2382 		if (!ofnode_valid(np_to_ofnode(ep_node))) {
2383 			printf("Warn: can't find endpoint node from phandle\n");
2384 			continue;
2385 		}
2386 		port_node = of_get_parent(ep_node);
2387 		if (!ofnode_valid(np_to_ofnode(port_node))) {
2388 			printf("Warn: can't find port node from phandle\n");
2389 			continue;
2390 		}
2391 
2392 		port_parent_node = of_get_parent(port_node);
2393 		if (!ofnode_valid(np_to_ofnode(port_parent_node))) {
2394 			printf("Warn: can't find port parent node from phandle\n");
2395 			continue;
2396 		}
2397 
2398 		is_ports_node = strstr(port_parent_node->full_name, "ports") ? 1 : 0;
2399 		if (is_ports_node) {
2400 			vop_node = of_get_parent(port_parent_node);
2401 			if (!ofnode_valid(np_to_ofnode(vop_node))) {
2402 				printf("Warn: can't find crtc node from phandle\n");
2403 				continue;
2404 			}
2405 		} else {
2406 			vop_node = port_parent_node;
2407 		}
2408 
2409 		ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC,
2410 						  np_to_ofnode(vop_node),
2411 						  &crtc_dev);
2412 		if (ret) {
2413 			printf("Warn: can't find crtc driver %d\n", ret);
2414 			continue;
2415 		}
2416 		crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev);
2417 
2418 		conn = rockchip_of_get_connector(np_to_ofnode(ep_node));
2419 		if (!conn) {
2420 			printf("Warn: can't get connect driver\n");
2421 			continue;
2422 		}
2423 		split_conn = rockchip_get_split_connector(conn);
2424 
2425 		s = malloc(sizeof(*s));
2426 		if (!s)
2427 			continue;
2428 
2429 		memset(s, 0, sizeof(*s));
2430 
2431 		INIT_LIST_HEAD(&s->head);
2432 		ret = ofnode_read_string_index(node, "logo,uboot", 0, &name);
2433 		if (!ret)
2434 			memcpy(s->ulogo_name, name, strlen(name));
2435 		ret = ofnode_read_string_index(node, "logo,kernel", 0, &name);
2436 		if (!ret)
2437 			memcpy(s->klogo_name, name, strlen(name));
2438 		ret = ofnode_read_string_index(node, "logo,mode", 0, &name);
2439 		if (!strcmp(name, "fullscreen"))
2440 			s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
2441 		else
2442 			s->logo_mode = ROCKCHIP_DISPLAY_CENTER;
2443 		ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name);
2444 		if (!strcmp(name, "fullscreen"))
2445 			s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
2446 		else
2447 			s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER;
2448 
2449 		s->logo_rotate = ofnode_read_u32_default(node, "logo,rotate", 0);
2450 
2451 		s->force_output = ofnode_read_bool(node, "force-output");
2452 
2453 		if (s->force_output) {
2454 			timing_node = ofnode_find_subnode(node, "force_timing");
2455 			ret = display_get_force_timing_from_dts(timing_node,
2456 								&s->force_mode,
2457 								&s->conn_state.bus_flags);
2458 			if (ofnode_read_u32(node, "force-bus-format", &s->force_bus_format))
2459 				s->force_bus_format = MEDIA_BUS_FMT_RGB888_1X24;
2460 		}
2461 
2462 		s->blob = blob;
2463 		s->conn_state.connector = conn;
2464 		s->conn_state.secondary = NULL;
2465 		s->conn_state.type = conn->type;
2466 		if (split_conn) {
2467 			s->conn_state.secondary = split_conn;
2468 			s->conn_state.output_flags |= ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE;
2469 			s->conn_state.output_flags |= conn->id ? ROCKCHIP_OUTPUT_DATA_SWAP : 0;
2470 		}
2471 		s->conn_state.overscan.left_margin = 100;
2472 		s->conn_state.overscan.right_margin = 100;
2473 		s->conn_state.overscan.top_margin = 100;
2474 		s->conn_state.overscan.bottom_margin = 100;
2475 		s->crtc_state.node = np_to_ofnode(vop_node);
2476 		s->crtc_state.port_node = port_node;
2477 		s->crtc_state.dev = crtc_dev;
2478 		s->crtc_state.crtc = crtc;
2479 		s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node), is_ports_node);
2480 		s->node = node;
2481 
2482 		if (is_ports_node) { /* only vop2 will get into here */
2483 			ofnode vp_node = np_to_ofnode(port_node);
2484 			static bool get_plane_mask_from_dts;
2485 
2486 			s->crtc_state.ports_node = port_parent_node;
2487 			if (!get_plane_mask_from_dts) {
2488 				ofnode vp_sub_node;
2489 				int vp_id = 0;
2490 				bool vp_enable = false;
2491 
2492 				ofnode_for_each_subnode(vp_node, np_to_ofnode(port_parent_node)) {
2493 					vp_id = ofnode_read_u32_default(vp_node, "reg", 0);
2494 
2495 					s->crtc_state.crtc->vps[vp_id].xmirror_en =
2496 						ofnode_read_bool(vp_node, "xmirror-enable");
2497 
2498 					s->crtc_state.crtc->vps[vp_id].sharp_en =
2499 						!ofnode_read_bool(vp_node, "sharp-disabled");
2500 
2501 					s->crtc_state.crtc->vps[vp_id].primary_plane_id = -1;
2502 
2503 					/*
2504 					 * Cursor plane can be assigned and then fixed up to DTS
2505 					 * without the specific plane mask.
2506 					 */
2507 					s->crtc_state.crtc->vps[vp_id].cursor_plane_id =
2508 						ofnode_read_u32_default(vp_node, "cursor-win-id", -1);
2509 
2510 					s->crtc_state.crtc->vps[vp_id].plane_mask =
2511 						ofnode_read_u32_default(vp_node, "rockchip,plane-mask", 0);
2512 					if (s->crtc_state.crtc->vps[vp_id].plane_mask) {
2513 						s->crtc_state.crtc->assign_plane |= true;
2514 						s->crtc_state.crtc->vps[vp_id].primary_plane_id =
2515 							ofnode_read_u32_default(vp_node, "rockchip,primary-plane", -1);
2516 						printf("get vp%d plane mask:0x%x, primary id:%d, cursor id:%d, from dts\n",
2517 						       vp_id,
2518 						       s->crtc_state.crtc->vps[vp_id].plane_mask,
2519 						       (int8_t)s->crtc_state.crtc->vps[vp_id].primary_plane_id,
2520 						       (int8_t)s->crtc_state.crtc->vps[vp_id].cursor_plane_id);
2521 					}
2522 
2523 					/* To check current vp status */
2524 					vp_enable = false;
2525 					ofnode_for_each_subnode(vp_sub_node, vp_node)
2526 						vp_enable |= rockchip_get_display_path_status(vp_sub_node);
2527 					s->crtc_state.crtc->vps[vp_id].enable = vp_enable;
2528 				}
2529 				get_plane_mask_from_dts = true;
2530 			}
2531 		}
2532 
2533 		get_crtc_mcu_mode(&s->crtc_state, port_node, is_ports_node);
2534 
2535 		ret = ofnode_read_u32_default(s->crtc_state.node,
2536 					      "rockchip,dual-channel-swap", 0);
2537 		s->crtc_state.dual_channel_swap = ret;
2538 
2539 		if (connector_phy_init(conn, data)) {
2540 			printf("Warn: Failed to init phy drivers\n");
2541 			free(s);
2542 			continue;
2543 		}
2544 		list_add_tail(&s->head, &rockchip_display_list);
2545 	}
2546 
2547 	if (list_empty(&rockchip_display_list)) {
2548 		debug("Failed to found available display route\n");
2549 		return -ENODEV;
2550 	}
2551 	rockchip_get_baseparameter();
2552 	display_pre_init();
2553 
2554 	uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH;
2555 	uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT;
2556 	uc_priv->bpix = VIDEO_BPP32;
2557 
2558 #ifdef CONFIG_ROCKCHIP_VIDCONSOLE
2559 	rockchip_vidconsole_display(dev);
2560 	video_set_flush_dcache(dev, true);
2561 #endif
2562 	return 0;
2563 }
2564 
rockchip_display_fixup(void * blob)2565 void rockchip_display_fixup(void *blob)
2566 {
2567 	const struct rockchip_connector_funcs *conn_funcs;
2568 	const struct rockchip_crtc_funcs *crtc_funcs;
2569 	struct rockchip_connector *conn;
2570 	const struct rockchip_crtc *crtc;
2571 	struct display_state *s;
2572 	int offset;
2573 	int ret;
2574 	const struct device_node *np;
2575 	const char *path;
2576 	const char *cacm_header;
2577 	u64 aligned_memory_size;
2578 	ulong vidcon_fb_addr = 0;
2579 	bool is_logo_init = 0;
2580 
2581 	if (fdt_node_offset_by_compatible(blob, 0, memory_compatible) >= 0) {
2582 		list_for_each_entry(s, &rockchip_display_list, head) {
2583 			if (s->is_init) {
2584 				ret = load_bmp_logo(&s->logo, s->klogo_name);
2585 				if (ret < 0) {
2586 					s->is_klogo_valid = false;
2587 					printf("VP%d fail to load kernel logo\n",
2588 					       s->crtc_state.crtc_id);
2589 				} else {
2590 					s->is_klogo_valid = true;
2591 				}
2592 				vidcon_fb_addr = s->vidcon_fb_addr;
2593 			}
2594 			is_logo_init |= s->is_init;
2595 		}
2596 
2597 		if (!is_logo_init) {
2598 			printf("The display is not initialized, skip display fixup\n");
2599 			return;
2600 		}
2601 
2602 		if (!get_display_size())
2603 			return;
2604 
2605 		if (vidcon_fb_addr) {
2606 			aligned_memory_size = (u64)ALIGN(memory_end - vidcon_fb_addr, align_size);
2607 			offset = fdt_update_reserved_memory(blob, memory_compatible,
2608 							    (u64)vidcon_fb_addr,
2609 							    aligned_memory_size);
2610 		} else {
2611 			aligned_memory_size = (u64)ALIGN(get_display_size(), align_size);
2612 			offset = fdt_update_reserved_memory(blob, memory_compatible,
2613 							    (u64)memory_start,
2614 							    aligned_memory_size);
2615 		}
2616 
2617 		if (offset < 0)
2618 			printf("failed to reserve drm-loader-logo memory\n");
2619 
2620 		if (get_cubic_memory_size()) {
2621 			aligned_memory_size = (u64)ALIGN(get_cubic_memory_size(), align_size);
2622 			offset = fdt_update_reserved_memory(blob, "rockchip,drm-cubic-lut",
2623 							    (u64)cubic_lut_memory_start,
2624 							    aligned_memory_size);
2625 			if (offset < 0)
2626 				printf("failed to reserve drm-cubic-lut memory\n");
2627 		}
2628 	} else {
2629 		printf("can't found %s, use rockchip,fb-logo\n", memory_compatible);
2630 		/* Compatible with rkfb display, only need reserve memory */
2631 		offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo",
2632 						    (u64)memory_start,
2633 						    MEMORY_POOL_SIZE);
2634 		if (offset < 0)
2635 			printf("failed to reserve fb-loader-logo memory\n");
2636 		else
2637 			list_for_each_entry(s, &rockchip_display_list, head)
2638 				load_kernel_bmp_logo(&s->logo, s->klogo_name);
2639 		return;
2640 	}
2641 
2642 	list_for_each_entry(s, &rockchip_display_list, head) {
2643 		/*
2644 		 * If plane mask is not set in dts, fixup dts to assign it
2645 		 * whether crtc is initialized or not.
2646 		 */
2647 		if (s->crtc_state.crtc->funcs->fixup_dts && !s->crtc_state.crtc->assign_plane)
2648 			s->crtc_state.crtc->funcs->fixup_dts(s, blob);
2649 
2650 		if (!s->is_init || !s->is_klogo_valid)
2651 			continue;
2652 
2653 		conn = s->conn_state.connector;
2654 		if (!conn)
2655 			continue;
2656 		conn_funcs = conn->funcs;
2657 		if (!conn_funcs) {
2658 			printf("failed to get exist connector\n");
2659 			continue;
2660 		}
2661 
2662 		crtc = s->crtc_state.crtc;
2663 		if (!crtc)
2664 			continue;
2665 
2666 		crtc_funcs = crtc->funcs;
2667 		if (!crtc_funcs) {
2668 			printf("failed to get exist crtc\n");
2669 			continue;
2670 		}
2671 
2672 		np = ofnode_to_np(s->node);
2673 		path = np->full_name;
2674 		fdt_increase_size(blob, 0x400);
2675 #define FDT_SET_U32(name, val) \
2676 		do_fixup_by_path_u32(blob, path, name, val, 1);
2677 
2678 		if (vidcon_fb_addr)
2679 			offset = s->logo.offset + (u32)(unsigned long)s->logo.mem - vidcon_fb_addr;
2680 		else
2681 			offset = s->logo.offset + (u32)(unsigned long)s->logo.mem - memory_start;
2682 		FDT_SET_U32("logo,offset", offset);
2683 		FDT_SET_U32("logo,width", s->logo.width);
2684 		FDT_SET_U32("logo,height", s->logo.height);
2685 		FDT_SET_U32("logo,bpp", s->logo.bpp);
2686 		FDT_SET_U32("logo,ymirror", s->logo.ymirror);
2687 		FDT_SET_U32("video,clock", s->conn_state.mode.clock);
2688 		FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay);
2689 		FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay);
2690 		FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end);
2691 		FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end);
2692 		FDT_SET_U32("video,vrefresh",
2693 			    drm_mode_vrefresh(&s->conn_state.mode));
2694 		FDT_SET_U32("video,flags", s->conn_state.mode.flags);
2695 		FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio);
2696 		FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin);
2697 		FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin);
2698 		FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin);
2699 		FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin);
2700 		FDT_SET_U32("overscan,win_scale", s->crtc_state.overscan_by_win_scale);
2701 
2702 		if (s->conn_state.disp_info) {
2703 			cacm_header = (const char*)&s->conn_state.disp_info->cacm_header;
2704 
2705 			FDT_SET_U32("bcsh,brightness", s->conn_state.disp_info->bcsh_info.brightness);
2706 			FDT_SET_U32("bcsh,contrast", s->conn_state.disp_info->bcsh_info.contrast);
2707 			FDT_SET_U32("bcsh,saturation", s->conn_state.disp_info->bcsh_info.saturation);
2708 			FDT_SET_U32("bcsh,hue", s->conn_state.disp_info->bcsh_info.hue);
2709 
2710 			if (!strncasecmp(cacm_header, "CACM", 4)) {
2711 				FDT_SET_U32("post-csc,hue",
2712 					    s->conn_state.disp_info->csc_info.hue);
2713 				FDT_SET_U32("post-csc,saturation",
2714 					    s->conn_state.disp_info->csc_info.saturation);
2715 				FDT_SET_U32("post-csc,contrast",
2716 					    s->conn_state.disp_info->csc_info.contrast);
2717 				FDT_SET_U32("post-csc,brightness",
2718 					    s->conn_state.disp_info->csc_info.brightness);
2719 				FDT_SET_U32("post-csc,r-gain",
2720 					    s->conn_state.disp_info->csc_info.r_gain);
2721 				FDT_SET_U32("post-csc,g-gain",
2722 					    s->conn_state.disp_info->csc_info.g_gain);
2723 				FDT_SET_U32("post-csc,b-gain",
2724 					    s->conn_state.disp_info->csc_info.b_gain);
2725 				FDT_SET_U32("post-csc,r-offset",
2726 					    s->conn_state.disp_info->csc_info.r_offset);
2727 				FDT_SET_U32("post-csc,g-offset",
2728 					    s->conn_state.disp_info->csc_info.g_offset);
2729 				FDT_SET_U32("post-csc,b-offset",
2730 					    s->conn_state.disp_info->csc_info.b_offset);
2731 				FDT_SET_U32("post-csc,enable",
2732 					    s->conn_state.disp_info->csc_info.csc_enable);
2733 			}
2734 		}
2735 
2736 		if (s->conn_state.disp_info->cubic_lut_data.size &&
2737 		    CONFIG_ROCKCHIP_CUBIC_LUT_SIZE)
2738 			FDT_SET_U32("cubic_lut,offset", get_cubic_lut_offset(s->crtc_state.crtc_id));
2739 
2740 #undef FDT_SET_U32
2741 	}
2742 }
2743 
rockchip_display_bind(struct udevice * dev)2744 int rockchip_display_bind(struct udevice *dev)
2745 {
2746 	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
2747 
2748 	plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE;
2749 
2750 	return 0;
2751 }
2752 
2753 static const struct udevice_id rockchip_display_ids[] = {
2754 	{ .compatible = "rockchip,display-subsystem" },
2755 	{ }
2756 };
2757 
2758 U_BOOT_DRIVER(rockchip_display) = {
2759 	.name	= "rockchip_display",
2760 	.id	= UCLASS_VIDEO,
2761 	.of_match = rockchip_display_ids,
2762 	.bind	= rockchip_display_bind,
2763 	.probe	= rockchip_display_probe,
2764 };
2765 
do_rockchip_logo_show(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])2766 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc,
2767 			char *const argv[])
2768 {
2769 	if (argc != 1)
2770 		return CMD_RET_USAGE;
2771 
2772 	rockchip_show_logo();
2773 
2774 	return 0;
2775 }
2776 
do_rockchip_show_bmp(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])2777 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc,
2778 				char *const argv[])
2779 {
2780 	if (argc != 2)
2781 		return CMD_RET_USAGE;
2782 
2783 	rockchip_show_bmp(argv[1]);
2784 
2785 	return 0;
2786 }
2787 
do_rockchip_vop_dump(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])2788 static int do_rockchip_vop_dump(cmd_tbl_t *cmdtp, int flag, int argc,
2789 				char *const argv[])
2790 {
2791 	int ret;
2792 
2793 	if (argc < 1 || argc > 2)
2794 		return CMD_RET_USAGE;
2795 
2796 	ret = rockchip_vop_dump(argv[1]);
2797 
2798 	return ret;
2799 }
2800 
2801 U_BOOT_CMD(
2802 	rockchip_show_logo, 1, 1, do_rockchip_logo_show,
2803 	"load and display log from resource partition",
2804 	NULL
2805 );
2806 
2807 U_BOOT_CMD(
2808 	rockchip_show_bmp, 2, 1, do_rockchip_show_bmp,
2809 	"load and display bmp from resource partition",
2810 	"    <bmp_name>"
2811 );
2812 
2813 U_BOOT_CMD(
2814 	vop_dump, 2, 1, do_rockchip_vop_dump,
2815 	"dump vop regs",
2816 	" [a/all]"
2817 );
2818