xref: /rockchip-linux_mpp/mpp/codec/dec/h265/h265d_parser.h (revision 437bfbeb9567cca9cd9080e3f6954aa9d6a94f18)
1 /*
2  *
3  * Copyright 2015 Rockchip Electronics Co. LTD
4  *
5  * Licensed under the Apache License, Version 2.0 (the "License");
6  * you may not use this file except in compliance with the License.
7  * You may obtain a copy of the License at
8  *
9  *      http://www.apache.org/licenses/LICENSE-2.0
10  *
11  * Unless required by applicable law or agreed to in writing, software
12  * distributed under the License is distributed on an "AS IS" BASIS,
13  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14  * See the License for the specific language governing permissions and
15  * limitations under the License.
16  */
17 
18 /*
19  * @file        h265d_parser.h
20  * @brief
21  * @author      csy(csy@rock-chips.com)
22 
23  * @version     1.0.0
24  * @history
25  *   2015.7.15 : Create
26  */
27 
28 
29 #ifndef __H265D_PARSER_H__
30 #define __H265D_PARSER_H__
31 
32 #include <limits.h>
33 #include <string.h>
34 
35 #include "mpp_debug.h"
36 #include "mpp_bitread.h"
37 #include "mpp_buf_slot.h"
38 #include "mpp_mem_pool.h"
39 
40 #include "hal_dec_task.h"
41 #include "h265d_codec.h"
42 #include "h265_syntax.h"
43 #include "h2645d_sei.h"
44 
45 extern RK_U32 h265d_debug;
46 
47 #define H265D_DBG_FUNCTION          (0x00000001)
48 #define H265D_DBG_VPS               (0x00000002)
49 #define H265D_DBG_SPS               (0x00000004)
50 #define H265D_DBG_PPS               (0x00000008)
51 #define H265D_DBG_SLICE_HDR         (0x00000010)
52 #define H265D_DBG_SEI               (0x00000020)
53 #define H265D_DBG_GLOBAL            (0x00000040)
54 #define H265D_DBG_REF               (0x00000080)
55 #define H265D_DBG_TIME              (0x00000100)
56 
57 
58 #define h265d_dbg(flag, fmt, ...) _mpp_dbg(h265d_debug, flag, fmt, ## __VA_ARGS__)
59 
60 #define MAX_FRAME_SIZE 2048000
61 
62 typedef struct ShortTermRPS {
63     RK_U32 num_negative_pics;
64     RK_S32 num_delta_pocs;
65     RK_S32 rps_idx_num_delta_pocs;
66     RK_S32 delta_poc[32];
67     RK_U8  used[32];
68 } ShortTermRPS;
69 
70 typedef struct LongTermRPS {
71     RK_S32  poc[32];
72     RK_U8   used[32];
73     RK_U8   nb_refs;
74 } LongTermRPS;
75 
76 typedef struct RefPicList {
77     struct HEVCFrame *ref[MAX_REFS];
78     RK_S32 list[MAX_REFS];
79     RK_S32 isLongTerm[MAX_REFS];
80     RK_S32 nb_refs;
81 } RefPicList;
82 
83 typedef struct RefPicListTab {
84     RefPicList refPicList[2];
85 } RefPicListTab;
86 
87 typedef struct HEVCWindow {
88     RK_S32 left_offset;
89     RK_S32 right_offset;
90     RK_S32 top_offset;
91     RK_S32 bottom_offset;
92 } HEVCWindow;
93 
94 typedef struct VUI {
95     MppRational_t sar;
96 
97     RK_S32 overscan_info_present_flag;
98     RK_S32 overscan_appropriate_flag;
99 
100     RK_S32 video_signal_type_present_flag;
101     RK_S32 video_format;
102     RK_S32 video_full_range_flag;
103     RK_S32 colour_description_present_flag;
104     RK_U8  colour_primaries;
105     RK_U8  transfer_characteristic;
106     RK_U8  matrix_coeffs;
107 
108     RK_S32 chroma_loc_info_present_flag;
109     RK_S32 chroma_sample_loc_type_top_field;
110     RK_S32 chroma_sample_loc_type_bottom_field;
111     RK_S32 neutra_chroma_indication_flag;
112 
113     RK_S32 field_seq_flag;
114     RK_S32 frame_field_info_present_flag;
115 
116     RK_S32 default_display_window_flag;
117     HEVCWindow def_disp_win;
118 
119     RK_S32 vui_timing_info_present_flag;
120     RK_U32 vui_num_units_in_tick;
121     RK_U32 vui_time_scale;
122     RK_S32 vui_poc_proportional_to_timing_flag;
123     RK_S32 vui_num_ticks_poc_diff_one_minus1;
124     RK_S32 vui_hrd_parameters_present_flag;
125 
126     RK_S32 bitstream_restriction_flag;
127     RK_S32 tiles_fixed_structure_flag;
128     RK_S32 motion_vectors_over_pic_boundaries_flag;
129     RK_S32 restricted_ref_pic_lists_flag;
130     RK_S32 min_spatial_segmentation_idc;
131     RK_S32 max_bytes_per_pic_denom;
132     RK_S32 max_bits_per_min_cu_denom;
133     RK_S32 log2_max_mv_length_horizontal;
134     RK_S32 log2_max_mv_length_vertical;
135 } VUI;
136 
137 /* ProfileTierLevel */
138 typedef struct PTLCommon {
139     RK_U8 profile_space;
140     RK_U8 tier_flag;
141     RK_U8 profile_idc;
142     RK_U8 profile_compatibility_flag[32];
143     RK_U8 level_idc;
144 
145     RK_U8 progressive_source_flag;
146     RK_U8 interlaced_source_flag;
147     RK_U8 non_packed_constraint_flag;
148     RK_U8 frame_only_constraint_flag;
149 
150     RK_S32 bit_depth_constraint;
151     H265ChromaFmt chroma_format_constraint;
152     RK_U8 intra_constraint_flag;
153     RK_U8 one_picture_only_constraint_flag;
154     RK_U8 lower_bitrate_constraint_flag;
155 } PTLCommon;
156 
157 typedef struct PTL {
158     PTLCommon general_ptl;
159     PTLCommon sub_layer_ptl[MAX_SUB_LAYERS];
160 
161     RK_U8  sub_layer_profile_present_flag[MAX_SUB_LAYERS];
162     RK_U8  sub_layer_level_present_flag[MAX_SUB_LAYERS];
163 
164     RK_S32 sub_layer_profile_space[MAX_SUB_LAYERS];
165     RK_U8  sub_layer_tier_flag[MAX_SUB_LAYERS];
166     RK_S32 sub_layer_profile_idc[MAX_SUB_LAYERS];
167     RK_U8  sub_layer_profile_compatibility_flags[MAX_SUB_LAYERS][32];
168     RK_S32 sub_layer_level_idc[MAX_SUB_LAYERS];
169 } PTL;
170 
171 typedef struct HEVCVPS {
172     RK_U8  vps_temporal_id_nesting_flag;
173     RK_S32 vps_max_layers;
174     RK_S32 vps_max_sub_layers; ///< vps_max_temporal_layers_minus1 + 1
175 
176     PTL     ptl;
177     RK_S32 vps_sub_layer_ordering_info_present_flag;
178     RK_U32 vps_max_dec_pic_buffering[MAX_SUB_LAYERS];
179     RK_U32 vps_num_reorder_pics[MAX_SUB_LAYERS];
180     RK_U32 vps_max_latency_increase[MAX_SUB_LAYERS];
181     RK_S32 vps_max_layer_id;
182     RK_S32 vps_num_layer_sets; ///< vps_num_layer_sets_minus1 + 1
183     RK_U8  vps_timing_info_present_flag;
184     RK_U32 vps_num_units_in_tick;
185     RK_U32 vps_time_scale;
186     RK_U8  vps_poc_proportional_to_timing_flag;
187     RK_S32 vps_num_ticks_poc_diff_one; ///< vps_num_ticks_poc_diff_one_minus1 + 1
188     RK_S32 vps_num_hrd_parameters;
189 
190     RK_S32 vps_extension_flag;
191 
192 } HEVCVPS;
193 
194 typedef struct ScalingList {
195     /* This is a little wasteful, since sizeID 0 only needs 8 coeffs,
196      * and size ID 3 only has 2 arrays, not 6. */
197     RK_U8 sl[4][6][64];
198     RK_U8 sl_dc[2][6];
199 } ScalingList;
200 
201 typedef struct HEVCSPS {
202     RK_U32 vps_id;
203     RK_U32 sps_id;
204     RK_S32 chroma_format_idc;
205     RK_U8 separate_colour_plane_flag;
206 
207     ///< output (i.e. cropped) values
208     RK_S32 output_width, output_height;
209     HEVCWindow output_window;
210 
211     HEVCWindow pic_conf_win;
212 
213     RK_S32 bit_depth;
214     RK_S32 bit_depth_chroma;///<- zrh add
215     RK_S32 pixel_shift;
216     RK_S32 pix_fmt;
217 
218     RK_U32 log2_max_poc_lsb;
219     RK_S32 pcm_enabled_flag;
220 
221     RK_S32 max_sub_layers;
222     struct {
223         int max_dec_pic_buffering;
224         int num_reorder_pics;
225         int max_latency_increase;
226     } temporal_layer[MAX_SUB_LAYERS];
227 
228     VUI vui;
229     PTL ptl;
230 
231     RK_U8 scaling_list_enable_flag;
232     ScalingList scaling_list;
233 
234     RK_U32 nb_st_rps;
235     ShortTermRPS st_rps[MAX_SHORT_TERM_RPS_COUNT];
236 
237     RK_U8 amp_enabled_flag;
238     RK_U8 sao_enabled;
239 
240     RK_U8 long_term_ref_pics_present_flag;
241     RK_U16 lt_ref_pic_poc_lsb_sps[32];
242     RK_U8 used_by_curr_pic_lt_sps_flag[32];
243     RK_U8 num_long_term_ref_pics_sps;
244 
245     struct {
246         RK_U8  bit_depth;
247         RK_U8  bit_depth_chroma;
248         RK_U32 log2_min_pcm_cb_size;
249         RK_U32 log2_max_pcm_cb_size;
250         RK_U8  loop_filter_disable_flag;
251     } pcm;
252     RK_U8 sps_temporal_mvp_enabled_flag;
253     RK_U8 sps_strong_intra_smoothing_enable_flag;
254 
255     RK_U32 log2_min_cb_size;
256     RK_U32 log2_diff_max_min_coding_block_size;
257     RK_U32 log2_min_tb_size;
258     RK_U32 log2_max_trafo_size;
259     RK_S32 log2_ctb_size;
260     RK_U32 log2_min_pu_size;
261 
262     RK_S32 max_transform_hierarchy_depth_inter;
263     RK_S32 max_transform_hierarchy_depth_intra;
264 
265     // SPS extension
266     RK_S32 sps_extension_flag;
267     RK_S32 sps_range_extension_flag;
268     RK_S32 transform_skip_rotation_enabled_flag;
269     RK_S32 transform_skip_context_enabled_flag;
270     RK_S32 implicit_rdpcm_enabled_flag;
271     RK_S32 explicit_rdpcm_enabled_flag;
272     RK_S32 extended_precision_processing_flag;
273     RK_S32 intra_smoothing_disabled_flag;
274     RK_S32 high_precision_offsets_enabled_flag;
275     RK_S32 persistent_rice_adaptation_enabled_flag;
276     RK_S32 cabac_bypass_alignment_enabled_flag;
277 
278     ///< coded frame dimension in various units
279     RK_S32 width;
280     RK_S32 height;
281     RK_S32 ctb_width;
282     RK_S32 ctb_height;
283     RK_S32 ctb_size;
284     RK_S32 min_cb_width;
285     RK_S32 min_cb_height;
286     RK_S32 min_tb_width;
287     RK_S32 min_tb_height;
288     RK_S32 min_pu_width;
289     RK_S32 min_pu_height;
290 
291     RK_S32 hshift[3];
292     RK_S32 vshift[3];
293 
294     RK_S32 qp_bd_offset;
295 #ifdef SCALED_REF_LAYER_OFFSETS
296     HEVCWindow      scaled_ref_layer_window;
297 #endif
298 #ifdef REF_IDX_MFM
299     RK_S32 set_mfm_enabled_flag;
300 #endif
301 } HEVCSPS;
302 
303 typedef struct HevcPpsBufInfo_t {
304     RK_U32 *column_width;       ///< ColumnWidth
305     RK_U32 *row_height;         ///< RowHeight
306 
307     RK_S32 column_width_size;
308     RK_S32 row_height_size;
309 } HevcPpsBufInfo;
310 
311 typedef struct HEVCPPS {
312     RK_U32 sps_id;
313     RK_U32 pps_id;
314 
315     RK_U8 sign_data_hiding_flag;
316 
317     RK_U8 cabac_init_present_flag;
318 
319     RK_S32 num_ref_idx_l0_default_active; ///< num_ref_idx_l0_default_active_minus1 + 1
320     RK_S32 num_ref_idx_l1_default_active; ///< num_ref_idx_l1_default_active_minus1 + 1
321     RK_S32 pic_init_qp_minus26;
322 
323     RK_U8 constrained_intra_pred_flag;
324     RK_U8 transform_skip_enabled_flag;
325 
326     RK_U8 cu_qp_delta_enabled_flag;
327     RK_S32 diff_cu_qp_delta_depth;
328 
329     RK_S32 cb_qp_offset;
330     RK_S32 cr_qp_offset;
331     RK_U8 pic_slice_level_chroma_qp_offsets_present_flag;
332     RK_U8 weighted_pred_flag;
333     RK_U8 weighted_bipred_flag;
334     RK_U8 output_flag_present_flag;
335     RK_U8 transquant_bypass_enable_flag;
336 
337     RK_U8 dependent_slice_segments_enabled_flag;
338     RK_U8 tiles_enabled_flag;
339     RK_U8 entropy_coding_sync_enabled_flag;
340 
341     RK_S32 num_tile_columns;   ///< num_tile_columns_minus1 + 1
342     RK_S32 num_tile_rows;      ///< num_tile_rows_minus1 + 1
343     RK_U8 uniform_spacing_flag;
344     RK_U8 loop_filter_across_tiles_enabled_flag;
345 
346     RK_U8 seq_loop_filter_across_slices_enabled_flag;
347 
348     RK_U8 deblocking_filter_control_present_flag;
349     RK_U8 deblocking_filter_override_enabled_flag;
350     RK_U8 disable_dbf;
351     RK_S32 beta_offset;    ///< beta_offset_div2 * 2
352     RK_S32 tc_offset;      ///< tc_offset_div2 * 2
353 
354     RK_U8 scaling_list_data_present_flag;
355     ScalingList scaling_list;
356 
357     RK_U8 lists_modification_present_flag;
358     RK_S32 log2_parallel_merge_level; ///< log2_parallel_merge_level_minus2 + 2
359     RK_S32 num_extra_slice_header_bits;
360     RK_U8 slice_header_extension_present_flag;
361 
362     // PPS extension
363     RK_U8 pps_extension_flag;
364     RK_U8 pps_range_extensions_flag;
365     RK_U8 log2_max_transform_skip_block_size;
366     RK_U8 cross_component_prediction_enabled_flag;
367     RK_U8 chroma_qp_offset_list_enabled_flag;
368     RK_U8 diff_cu_chroma_qp_offset_depth;
369     RK_U8 chroma_qp_offset_list_len_minus1;
370     RK_S8 cb_qp_offset_list[6];
371     RK_S8 cr_qp_offset_list[6];
372     RK_U8 log2_sao_offset_scale_luma;
373     RK_U8 log2_sao_offset_scale_chroma;
374 
375     // Inferred parameters
376     HevcPpsBufInfo bufs;
377 } HEVCPPS;
378 
379 typedef struct SliceHeader {
380     RK_U32 pps_id;
381 
382     ///< address (in raster order) of the first block in the current slice segment
383     RK_U32   slice_segment_addr;
384     ///< address (in raster order) of the first block in the current slice
385     RK_U32   slice_addr;
386 
387     SliceType slice_type;
388 
389     RK_S32 pic_order_cnt_lsb;
390 
391     RK_U8 first_slice_in_pic_flag;
392     RK_U8 dependent_slice_segment_flag;
393     RK_U8 pic_output_flag;
394     RK_U8 colour_plane_id;
395 
396     ///< RPS coded in the slice header itself is stored here
397     int short_term_ref_pic_set_sps_flag;
398     int short_term_ref_pic_set_size;
399     ShortTermRPS slice_rps;
400     const ShortTermRPS *short_term_rps;
401     LongTermRPS long_term_rps;
402     RK_U32 list_entry_lx[2][32];
403 
404     RK_U8 rpl_modification_flag[2];
405     RK_U8 no_output_of_prior_pics_flag;
406     RK_U8 slice_temporal_mvp_enabled_flag;
407 
408     RK_U32 nb_refs[2];
409 
410     RK_U8 slice_sample_adaptive_offset_flag[3];
411     RK_U8 mvd_l1_zero_flag;
412 
413     RK_U8 cabac_init_flag;
414     RK_U8 disable_deblocking_filter_flag; ///< slice_header_disable_deblocking_filter_flag
415     RK_U8 slice_loop_filter_across_slices_enabled_flag;
416     RK_U8 collocated_list;
417 
418     RK_U32 collocated_ref_idx;
419 
420     RK_S32 slice_qp_delta;
421     RK_S32 slice_cb_qp_offset;
422     RK_S32 slice_cr_qp_offset;
423 
424     RK_S32 beta_offset;    ///< beta_offset_div2 * 2
425     RK_S32 tc_offset;      ///< tc_offset_div2 * 2
426 
427     RK_U32 max_num_merge_cand; ///< 5 - 5_minus_max_num_merge_cand
428 
429     RK_S32 *entry_point_offset;
430     RK_S32 * offset;
431     RK_S32 * size;
432     RK_S32 num_entry_point_offsets;
433 
434     RK_S8 slice_qp;
435 
436     RK_U8 luma_log2_weight_denom;
437     RK_S16 chroma_log2_weight_denom;
438 
439     RK_S16 luma_weight_l0[16];
440     RK_S16 chroma_weight_l0[16][2];
441     RK_S16 chroma_weight_l1[16][2];
442     RK_S16 luma_weight_l1[16];
443 
444     RK_S16 luma_offset_l0[16];
445     RK_S16 chroma_offset_l0[16][2];
446 
447     RK_S16 luma_offset_l1[16];
448     RK_S16 chroma_offset_l1[16][2];
449 
450 #ifdef REF_IDX_FRAMEWORK
451     RK_S32 inter_layer_pred_enabled_flag;
452 #endif
453 
454 #ifdef JCTVC_M0458_INTERLAYER_RPS_SIG
455     RK_S32     active_num_ILR_ref_idx;        //< Active inter-layer reference pictures
456     RK_S32     inter_layer_pred_layer_idc[MAX_VPS_LAYER_ID_PLUS1];
457 #endif
458 
459     RK_S32 slice_ctb_addr_rs;
460 } SliceHeader;
461 
462 typedef struct CurrentFameInf {
463     HEVCVPS vps[MAX_VPS_COUNT];
464     HEVCSPS sps[MAX_SPS_COUNT];
465     HEVCPPS pps[MAX_PPS_COUNT];
466     SliceHeader sh;
467 } CurrentFameInf_t;
468 
469 typedef struct DBParams {
470     RK_S32 beta_offset;
471     RK_S32 tc_offset;
472 } DBParams;
473 
474 #define HEVC_FRAME_FLAG_OUTPUT    (1 << 0)
475 #define HEVC_FRAME_FLAG_SHORT_REF (1 << 1)
476 #define HEVC_FRAME_FLAG_LONG_REF  (1 << 2)
477 
478 typedef struct HEVCFrame {
479     MppFrame   frame;
480     RefPicList *refPicList;
481     RK_S32 ctb_count;
482     RK_S32 poc;
483     struct HEVCFrame *collocated_ref;
484 
485     HEVCWindow window;
486 
487     /**
488      * A sequence counter, so that old frames are output first
489      * after a POC reset
490      */
491     RK_U16 sequence;
492 
493     /**
494      * A combination of HEVC_FRAME_FLAG_*
495      */
496     RK_U8 flags;
497     RK_S32 slot_index;
498     RK_U8  error_flag;
499 } HEVCFrame;
500 
501 typedef struct HEVCNAL {
502     RK_U8 *rbsp_buffer;
503     RK_S32 rbsp_buffer_size;
504     RK_S32 size;
505     const RK_U8 *data;
506 } HEVCNAL;
507 
508 typedef struct HEVCLocalContext {
509     BitReadCtx_t gb;
510 } HEVCLocalContext;
511 
512 
513 typedef struct REF_PIC_DEC_INFO {
514     RK_U8          dpb_index;
515     RK_U8          is_long_term;
516 } REF_PIC_DEC_INFO;
517 
518 typedef struct HEVCSEIAlternativeTransfer {
519     RK_S32 present;
520     RK_S32 preferred_transfer_characteristics;
521 } HEVCSEIAlternativeTransfer;
522 
523 typedef struct HEVCContext {
524     H265dContext_t *h265dctx;
525 
526     HEVCLocalContext    *HEVClc;
527 
528     MppFrame frame;
529 
530     const HEVCVPS *vps;
531     const HEVCSPS *sps;
532     const HEVCPPS *pps;
533     RK_U8 *vps_list[MAX_VPS_COUNT];
534     RK_U8 *sps_list[MAX_SPS_COUNT];
535     RK_U8 *pps_list[MAX_PPS_COUNT];
536 
537     MppMemPool vps_pool;
538     MppMemPool sps_pool;
539 
540     SliceHeader sh;
541 
542     ///< candidate references for the current frame
543     RefPicList rps[5];
544 
545     enum NALUnitType nal_unit_type;
546     RK_S32 temporal_id;  ///< temporal_id_plus1 - 1
547     HEVCFrame *ref;
548     HEVCFrame DPB[MAX_DPB_SIZE];
549     RK_S32 poc;
550     RK_S32 pocTid0;
551     RK_S32 slice_idx; ///< number of the slice being currently decoded
552     RK_S32 eos;       ///< current packet contains an EOS/EOB NAL
553     RK_S32 max_ra;
554 
555     RK_S32 is_decoded;
556 
557 
558     /** used on BE to byteswap the lines for checksumming */
559     RK_U8  *checksum_buf;
560     RK_S32      checksum_buf_size;
561 
562     /**
563      * Sequence counters for decoded and output frames, so that old
564      * frames are output first after a POC reset
565      */
566     RK_U16 seq_decode;
567     RK_U16 seq_output;
568 
569     RK_S32 wpp_err;
570     RK_S32 skipped_bytes;
571 
572     RK_U8 *data;
573 
574     HEVCNAL *nals;
575     RK_S32 nb_nals;
576     RK_S32 nals_allocated;
577     // type of the first VCL NAL of the current frame
578     enum NALUnitType first_nal_type;
579 
580     RK_U8 context_initialized;
581     RK_U8 is_nalff;       ///< this flag is != 0 if bitstream is encapsulated
582     ///< as a format defined in 14496-15
583     RK_S32 temporal_layer_id;
584     RK_S32 decoder_id;
585     RK_S32 apply_defdispwin;
586 
587     RK_S32 active_seq_parameter_set_id;
588 
589     RK_S32 nal_length_size;    ///< Number of bytes used for nal length (1, 2 or 4)
590     RK_S32 nuh_layer_id;
591 
592     /** frame packing arrangement variables */
593     RK_S32 sei_frame_packing_present;
594     RK_S32 frame_packing_arrangement_type;
595     RK_S32 content_interpretation_type;
596     RK_S32 quincunx_subsampling;
597 
598     RK_S32 picture_struct;
599 
600     /** 1 if the independent slice segment header was successfully parsed */
601     RK_U8 slice_initialized;
602 
603     RK_S32     decode_checksum_sei;
604 
605 
606     RK_U8     scaling_list[81][1360];
607     RK_U8     scaling_list_listen[81];
608     RK_U8     sps_list_of_updated[MAX_SPS_COUNT];///< zrh add
609     RK_U8     pps_list_of_updated[MAX_PPS_COUNT];///< zrh add
610 
611     RK_S32    rps_used[16];
612     RK_S32    nb_rps_used;
613     REF_PIC_DEC_INFO rps_pic_info[600][2][15];      // zrh add
614     RK_U8     lowdelay_flag[600];
615     RK_U8     rps_bit_offset[600];
616     RK_U8     rps_bit_offset_st[600];
617     RK_U8     slice_nb_rps_poc[600];
618 
619     RK_S32    frame_size;
620 
621     RK_S32    framestrid;
622 
623     RK_U32    nb_frame;
624 
625     RK_U8     output_frame_idx;
626 
627     RK_U32    got_frame;
628     RK_U32    extra_has_frame;
629 
630     MppFrameMasteringDisplayMetadata mastering_display;
631     MppFrameContentLightMetadata content_light;
632     MppFrameHdrDynamicMeta *hdr_dynamic_meta;
633     HEVCSEIAlternativeTransfer alternative_transfer;
634 
635     MppBufSlots slots;
636 
637     MppBufSlots packet_slots;
638     HalDecTask *task;
639 
640     MppPacket input_packet;
641     void *hal_pic_private;
642 
643     RK_S64 pts;
644     RK_S64 dts;
645     RK_U8  has_get_eos;
646     RK_U8  miss_ref_flag;
647     RK_U8  pre_pps_id;
648     RK_U8  ps_need_upate;
649     RK_U8  sps_need_upate;
650     RK_U8  rps_need_upate;
651 
652     /*temporary storage for slice_cut_param*/
653     RK_U32  start_bit;
654     RK_U32  end_bit;
655     void   *pre_pps_data;
656     RK_S32  pps_len;
657     RK_S32  pps_buf_size;
658     RK_S32  first_i_fast_play;
659 
660     /* hdr info */
661     RK_U32  is_hdr;
662     RK_U32  hdr_dynamic;
663 
664     RK_U32  deny_flag;
665     RecoveryPoint recovery;
666 } HEVCContext;
667 
668 RK_S32 mpp_hevc_decode_short_term_rps(HEVCContext *s, ShortTermRPS *rps,
669                                       const HEVCSPS *sps, RK_S32 is_slice_header);
670 RK_S32 mpp_hevc_decode_nal_vps(HEVCContext *s);
671 RK_S32 mpp_hevc_decode_nal_sps(HEVCContext *s);
672 RK_S32 mpp_hevc_decode_nal_pps(HEVCContext *s);
673 RK_S32 mpp_hevc_decode_nal_sei(HEVCContext *s);
674 
675 RK_S32 mpp_hevc_extract_rbsp(HEVCContext *s, const RK_U8 *src, RK_S32 length,
676                              HEVCNAL *nal);
677 
678 
679 /**
680  * Mark all frames in DPB as unused for reference.
681  */
682 void mpp_hevc_clear_refs(HEVCContext *s);
683 
684 /**
685  * Drop all frames currently in DPB.
686  */
687 void mpp_hevc_flush_dpb(HEVCContext *s);
688 
689 /**
690  * Compute POC of the current frame and return it.
691  */
692 int mpp_hevc_compute_poc(HEVCContext *s, RK_S32 poc_lsb);
693 
694 
695 /**
696  * Construct the reference picture sets for the current frame.
697  */
698 RK_S32 mpp_hevc_frame_rps(HEVCContext *s);
699 
700 /**
701  * Construct the reference picture list(s) for the current slice.
702  */
703 RK_S32 mpp_hevc_slice_rpl(HEVCContext *s);
704 
705 /**
706  * Get the number of candidate references for the current frame.
707  */
708 RK_S32 mpp_hevc_frame_nb_refs(HEVCContext *s);
709 RK_S32 mpp_hevc_set_new_ref(HEVCContext *s, MppFrame *frame, RK_S32 poc);
710 
711 /**
712  * Find next frame in output order and put a reference to it in frame.
713  * @return 1 if a frame was output, 0 otherwise
714  */
715 void mpp_hevc_unref_frame(HEVCContext *s, HEVCFrame *frame, RK_S32 flags);
716 
717 void mpp_hevc_pps_free(RK_U8 *data);
718 
719 void mpp_hevc_fill_dynamic_meta(HEVCContext *s, const RK_U8 *data, RK_U32 size, RK_U32 hdr_fmt);
720 
721 #endif /* __H265D_PAESER_H__ */
722