1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __REG_INFO_H__ 3 #define __REG_INFO_H__ 4 5 6 //#include "chip_register.h" 7 8 //#include "rga_struct.h" 9 #include "rga.h" 10 11 #ifndef MIN 12 #define MIN(X, Y) ((X)<(Y)?(X):(Y)) 13 #endif 14 15 #ifndef MAX 16 #define MAX(X, Y) ((X)>(Y)?(X):(Y)) 17 #endif 18 19 #ifndef ABS 20 #define ABS(X) (((X) < 0) ? (-(X)) : (X)) 21 #endif 22 23 #ifndef CLIP 24 #define CLIP(x, a, b) ((x) < (a)) ? (a) : (((x) > (b)) ? (b) : (x)) 25 #endif 26 27 //RGA register map 28 29 //General Registers 30 #define rRGA_SYS_CTRL (*(volatile uint32_t *)(RGA_BASE + RGA_SYS_CTRL)) 31 #define rRGA_CMD_CTRL (*(volatile uint32_t *)(RGA_BASE + RGA_CMD_CTRL)) 32 #define rRGA_CMD_ADDR (*(volatile uint32_t *)(RGA_BASE + RGA_CMD_ADDR)) 33 #define rRGA_STATUS (*(volatile uint32_t *)(RGA_BASE + RGA_STATUS)) 34 #define rRGA_INT (*(volatile uint32_t *)(RGA_BASE + RGA_INT)) 35 #define rRGA_AXI_ID (*(volatile uint32_t *)(RGA_BASE + RGA_AXI_ID)) 36 #define rRGA_MMU_STA_CTRL (*(volatile uint32_t *)(RGA_BASE + RGA_MMU_STA_CTRL)) 37 #define rRGA_MMU_STA (*(volatile uint32_t *)(RGA_BASE + RGA_MMU_STA)) 38 39 //Command code start 40 #define rRGA_MODE_CTRL (*(volatile uint32_t *)(RGA_BASE + RGA_MODE_CTRL)) 41 42 //Source Image Registers 43 #define rRGA_SRC_Y_MST (*(volatile uint32_t *)(RGA_BASE + RGA_SRC_Y_MST)) 44 #define rRGA_SRC_CB_MST (*(volatile uint32_t *)(RGA_BASE + RGA_SRC_CB_MST)) 45 #define rRGA_MASK_READ_MST (*(volatile uint32_t *)(RGA_BASE + RGA_MASK_READ_MST)) //repeat 46 #define rRGA_SRC_CR_MST (*(volatile uint32_t *)(RGA_BASE + RGA_SRC_CR_MST)) 47 #define rRGA_SRC_VIR_INFO (*(volatile uint32_t *)(RGA_BASE + RGA_SRC_VIR_INFO)) 48 #define rRGA_SRC_ACT_INFO (*(volatile uint32_t *)(RGA_BASE + RGA_SRC_ACT_INFO)) 49 #define rRGA_SRC_X_PARA (*(volatile uint32_t *)(RGA_BASE + RGA_SRC_X_PARA)) 50 #define rRGA_SRC_Y_PARA (*(volatile uint32_t *)(RGA_BASE + RGA_SRC_Y_PARA)) 51 #define rRGA_SRC_TILE_XINFO (*(volatile uint32_t *)(RGA_BASE + RGA_SRC_TILE_XINFO)) 52 #define rRGA_SRC_TILE_YINFO (*(volatile uint32_t *)(RGA_BASE + RGA_SRC_TILE_YINFO)) 53 #define rRGA_SRC_TILE_H_INCR (*(volatile uint32_t *)(RGA_BASE + RGA_SRC_TILE_H_INCR)) 54 #define rRGA_SRC_TILE_V_INCR (*(volatile uint32_t *)(RGA_BASE + RGA_SRC_TILE_V_INCR)) 55 #define rRGA_SRC_TILE_OFFSETX (*(volatile uint32_t *)(RGA_BASE + RGA_SRC_TILE_OFFSETX)) 56 #define rRGA_SRC_TILE_OFFSETY (*(volatile uint32_t *)(RGA_BASE + RGA_SRC_TILE_OFFSETY)) 57 #define rRGA_SRC_BG_COLOR (*(volatile uint32_t *)(RGA_BASE + RGA_SRC_BG_COLOR)) 58 #define rRGA_SRC_FG_COLOR (*(volatile uint32_t *)(RGA_BASE + RGA_SRC_FG_COLOR)) 59 #define rRGA_LINE_DRAWING_COLOR (*(volatile uint32_t *)(RGA_BASE + RGA_LINE_DRAWING_COLOR)) //repeat 60 #define rRGA_SRC_TR_COLOR0 (*(volatile uint32_t *)(RGA_BASE + RGA_SRC_TR_COLOR0)) 61 #define rRGA_CP_GR_A (*(volatile uint32_t *)(RGA_BASE + RGA_CP_GR_A)) //repeat 62 #define rRGA_SRC_TR_COLOR1 (*(volatile uint32_t *)(RGA_BASE + RGA_SRC_TR_COLOR1)) 63 #define rRGA_CP_GR_B (*(volatile uint32_t *)(RGA_BASE + RGA_CP_GR_B)) //repeat 64 65 #define rRGA_LINE_DRAW (*(volatile uint32_t *)(RGA_BASE + RGA_LINE_DRAW)) 66 #define rRGA_PAT_START_POINT (*(volatile uint32_t *)(RGA_BASE + RGA_PAT_START_POINT)) //repeat 67 68 //Destination Image Registers 69 #define rRGA_DST_MST (*(volatile uint32_t *)(RGA_BASE + RGA_DST_MST)) 70 #define rRGA_LUT_MST (*(volatile uint32_t *)(RGA_BASE + RGA_LUT_MST)) //repeat 71 #define rRGA_PAT_MST (*(volatile uint32_t *)(RGA_BASE + RGA_PAT_MST)) //repeat 72 #define rRGA_LINE_DRAWING_MST (*(volatile uint32_t *)(RGA_BASE + RGA_LINE_DRAWING_MST)) //repeat 73 74 #define rRGA_DST_VIR_INFO (*(volatile uint32_t *)(RGA_BASE + RGA_DST_VIR_INFO)) 75 76 #define rRGA_DST_CTR_INFO (*(volatile uint32_t *)(RGA_BASE + RGA_DST_CTR_INFO)) 77 #define rRGA_LINE_DRAW_XY_INFO (*(volatile uint32_t *)(RGA_BASE + RGA_LINE_DRAW_XY_INFO)) //repeat 78 79 //Alpha/ROP Registers 80 #define rRGA_ALPHA_CON (*(volatile uint32_t *)(RGA_BASE + RGA_ALPHA_CON)) 81 #define rRGA_FADING_CON (*(volatile uint32_t *)(RGA_BASE + RGA_FADING_CON)) 82 83 #define rRGA_PAT_CON (*(volatile uint32_t *)(RGA_BASE + RGA_PAT_CON)) 84 #define rRGA_DST_VIR_WIDTH_PIX (*(volatile uint32_t *)(RGA_BASE + RGA_DST_VIR_WIDTH_PIX)) //repeat 85 86 #define rRGA_ROP_CON0 (*(volatile uint32_t *)(RGA_BASE + RGA_ROP_CON0)) 87 #define rRGA_CP_GR_G (*(volatile uint32_t *)(RGA_BASE + RGA_CP_GR_G)) //repeat 88 #define rRGA_PRESCL_CB_MST (*(volatile uint32_t *)(RGA_BASE + RGA_PRESCL_CB_MST)) //repeat 89 90 #define rRGA_ROP_CON1 (*(volatile uint32_t *)(RGA_BASE + RGA_ROP_CON1)) 91 #define rRGA_CP_GR_R (*(volatile uint32_t *)(RGA_BASE + RGA_CP_GR_R)) //repeat 92 #define rRGA_PRESCL_CR_MST (*(volatile uint32_t *)(RGA_BASE + RGA_PRESCL_CR_MST)) //repeat 93 94 //MMU Register 95 #define rRGA_MMU_CTRL (*(volatile uint32_t *)(RGA_BASE + RGA_MMU_CTRL)) 96 97 98 99 100 //----------------------------------------------------------------- 101 //reg detail definition 102 //----------------------------------------------------------------- 103 /*RGA_SYS_CTRL*/ 104 #define m_RGA_SYS_CTRL_CMD_MODE ( 1<<2 ) 105 #define m_RGA_SYS_CTRL_OP_ST_SLV ( 1<<1 ) 106 #define m_RGA_sys_CTRL_SOFT_RESET ( 1<<0 ) 107 108 #define s_RGA_SYS_CTRL_CMD_MODE(x) ( (x&0x1)<<2 ) 109 #define s_RGA_SYS_CTRL_OP_ST_SLV(x) ( (x&0x1)<<1 ) 110 #define s_RGA_sys_CTRL_SOFT_RESET(x) ( (x&0x1)<<0 ) 111 112 113 /*RGA_CMD_CTRL*/ 114 #define m_RGA_CMD_CTRL_CMD_INCR_NUM ( 0x3ff<<3 ) 115 #define m_RGA_CMD_CTRL_CMD_STOP_MODE ( 1<<2 ) 116 #define m_RGA_CMD_CTRL_CMD_INCR_VALID ( 1<<1 ) 117 #define m_RGA_CMD_CTRL_CMD_LINE_FET_ST ( 1<<0 ) 118 119 #define s_RGA_CMD_CTRL_CMD_INCR_NUM(x) ( (x&0x3ff)<<3 ) 120 #define s_RGA_CMD_CTRL_CMD_STOP_MODE(x) ( (x&0x1)<<2 ) 121 #define s_RGA_CMD_CTRL_CMD_INCR_VALID(x) ( (x&0x1)<<1 ) 122 #define s_RGA_CMD_CTRL_CMD_LINE_FET_ST(x) ( (x*0x1)<<0 ) 123 124 125 /*RGA_STATUS*/ 126 #define m_RGA_CMD_STATUS_CMD_TOTAL_NUM ( 0xfff<<20 ) 127 #define m_RGA_CMD_STATUS_NOW_CMD_NUM ( 0xfff<<8 ) 128 #define m_RGA_CMD_STATUS_ENGINE_STATUS ( 1<<0 ) 129 130 131 /*RGA_INT*/ 132 #define m_RGA_INT_ALL_CMD_DONE_INT_EN ( 1<<10 ) 133 #define m_RGA_INT_MMU_INT_EN ( 1<<9 ) 134 #define m_RGA_INT_ERROR_INT_EN ( 1<<8 ) 135 #define m_RGA_INT_NOW_CMD_DONE_INT_CLEAR ( 1<<7 ) 136 #define m_RGA_INT_ALL_CMD_DONE_INT_CLEAR ( 1<<6 ) 137 #define m_RGA_INT_MMU_INT_CLEAR ( 1<<5 ) 138 #define m_RGA_INT_ERROR_INT_CLEAR ( 1<<4 ) 139 #define m_RGA_INT_NOW_CMD_DONE_INT_FLAG ( 1<<3 ) 140 #define m_RGA_INT_ALL_CMD_DONE_INT_FLAG ( 1<<2 ) 141 #define m_RGA_INT_MMU_INT_FLAG ( 1<<1 ) 142 #define m_RGA_INT_ERROR_INT_FLAG ( 1<<0 ) 143 144 #define s_RGA_INT_ALL_CMD_DONE_INT_EN(x) ( (x&0x1)<<10 ) 145 #define s_RGA_INT_MMU_INT_EN(x) ( (x&0x1)<<9 ) 146 #define s_RGA_INT_ERROR_INT_EN(x) ( (x&0x1)<<8 ) 147 #define s_RGA_INT_NOW_CMD_DONE_INT_CLEAR(x) ( (x&0x1)<<7 ) 148 #define s_RGA_INT_ALL_CMD_DONE_INT_CLEAR(x) ( (x&0x1)<<6 ) 149 #define s_RGA_INT_MMU_INT_CLEAR(x) ( (x&0x1)<<5 ) 150 #define s_RGA_INT_ERROR_INT_CLEAR(x) ( (x&0x1)<<4 ) 151 152 153 /*RGA_AXI_ID*/ 154 #define m_RGA_AXI_ID_MMU_READ ( 3<<30 ) 155 #define m_RGA_AXI_ID_MMU_WRITE ( 3<<28 ) 156 #define m_RGA_AXI_ID_MASK_READ ( 0xf<<24 ) 157 #define m_RGA_AXI_ID_CMD_FET ( 0xf<<20 ) 158 #define m_RGA_AXI_ID_DST_WRITE ( 0xf<<16 ) 159 #define m_RGA_AXI_ID_DST_READ ( 0xf<<12 ) 160 #define m_RGA_AXI_ID_SRC_CR_READ ( 0xf<<8 ) 161 #define m_RGA_AXI_ID_SRC_CB_READ ( 0xf<<4 ) 162 #define m_RGA_AXI_ID_SRC_Y_READ ( 0xf<<0 ) 163 164 #define s_RGA_AXI_ID_MMU_READ(x) ( (x&0x3)<<30 ) 165 #define s_RGA_AXI_ID_MMU_WRITE(x) ( (x&0x3)<<28 ) 166 #define s_RGA_AXI_ID_MASK_READ(x) ( (x&0xf)<<24 ) 167 #define s_RGA_AXI_ID_CMD_FET(x) ( (x&0xf)<<20 ) 168 #define s_RGA_AXI_ID_DST_WRITE(x) ( (x&0xf)<<16 ) 169 #define s_RGA_AXI_ID_DST_READ(x) ( (x&0xf)<<12 ) 170 #define s_RGA_AXI_ID_SRC_CR_READ(x) ( (x&0xf)<<8 ) 171 #define s_RGA_AXI_ID_SRC_CB_READ(x) ( (x&0xf)<<4 ) 172 #define s_RGA_AXI_ID_SRC_Y_READ(x) ( (x&0xf)<<0 ) 173 174 175 /*RGA_MMU_STA_CTRL*/ 176 #define m_RGA_MMU_STA_CTRL_TLB_STA_CLEAR ( 1<<3 ) 177 #define m_RGA_MMU_STA_CTRL_TLB_STA_RESUME ( 1<<2 ) 178 #define m_RGA_MMU_STA_CTRL_TLB_STA_PAUSE ( 1<<1 ) 179 #define m_RGA_MMU_STA_CTRL_TLB_STA_EN ( 1<<0 ) 180 181 #define s_RGA_MMU_STA_CTRL_TLB_STA_CLEAR(x) ( (x&0x1)<<3 ) 182 #define s_RGA_MMU_STA_CTRL_TLB_STA_RESUME(x) ( (x&0x1)<<2 ) 183 #define s_RGA_MMU_STA_CTRL_TLB_STA_PAUSE(x) ( (x&0x1)<<1 ) 184 #define s_RGA_MMU_STA_CTRL_TLB_STA_EN(x) ( (x&0x1)<<0 ) 185 186 187 188 /* RGA_MODE_CTRL */ 189 #define m_RGA_MODE_CTRL_2D_RENDER_MODE ( 7<<0 ) 190 #define m_RGA_MODE_CTRL_SRC_RGB_PACK ( 1<<3 ) 191 #define m_RGA_MODE_CTRL_SRC_FORMAT ( 15<<4 ) 192 #define m_RGA_MODE_CTRL_SRC_RB_SWAP ( 1<<8 ) 193 #define m_RGA_MODE_CTRL_SRC_ALPHA_SWAP ( 1<<9 ) 194 #define m_RGA_MODE_CTRL_SRC_UV_SWAP_MODE ( 1<<10 ) 195 #define m_RGA_MODE_CTRL_YUV2RGB_CON_MODE ( 3<<11 ) 196 #define m_RGA_MODE_CTRL_SRC_TRANS_MODE (0x1f<<13 ) 197 #define m_RGA_MODE_CTRL_SRC_TR_MODE ( 1<<13 ) 198 #define m_RGA_MODE_CTRL_SRC_TR_R_EN ( 1<<14 ) 199 #define m_RGA_MODE_CTRL_SRC_TR_G_EN ( 1<<15 ) 200 #define m_RGA_MODE_CTRL_SRC_TR_B_EN ( 1<<16 ) 201 #define m_RGA_MODE_CTRL_SRC_TR_A_EN ( 1<<17 ) 202 #define m_RGA_MODE_CTRL_ROTATE_MODE ( 3<<18 ) 203 #define m_RGA_MODE_CTRL_SCALE_MODE ( 3<<20 ) 204 #define m_RGA_MODE_CTRL_PAT_SEL ( 1<<22 ) 205 #define m_RGA_MODE_CTRL_DST_FORMAT ( 3<<23 ) 206 #define m_RGA_MODE_CTRL_DST_RGB_PACK ( 1<<25 ) 207 #define m_RGA_MODE_CTRL_DST_RB_SWAP ( 1<<26 ) 208 #define m_RGA_MODE_CTRL_DST_ALPHA_SWAP ( 1<<27 ) 209 #define m_RGA_MODE_CTRL_LUT_ENDIAN_MODE ( 1<<28 ) 210 #define m_RGA_MODE_CTRL_CMD_INT_ENABLE ( 1<<29 ) 211 #define m_RGA_MODE_CTRL_ZERO_MODE_ENABLE ( 1<<30 ) 212 #define m_RGA_MODE_CTRL_DST_ALPHA_ENABLE ( 1<<30 ) 213 214 215 216 #define s_RGA_MODE_CTRL_2D_RENDER_MODE(x) ( (x&0x7)<<0 ) 217 #define s_RGA_MODE_CTRL_SRC_RGB_PACK(x) ( (x&0x1)<<3 ) 218 #define s_RGA_MODE_CTRL_SRC_FORMAT(x) ( (x&0xf)<<4 ) 219 #define s_RGA_MODE_CTRL_SRC_RB_SWAP(x) ( (x&0x1)<<8 ) 220 #define s_RGA_MODE_CTRL_SRC_ALPHA_SWAP(x) ( (x&0x1)<<9 ) 221 #define s_RGA_MODE_CTRL_SRC_UV_SWAP_MODE(x) ( (x&0x1)<<10 ) 222 #define s_RGA_MODE_CTRL_YUV2RGB_CON_MODE(x) ( (x&0x3)<<11 ) 223 #define s_RGA_MODE_CTRL_SRC_TRANS_MODE(x) ( (x&0x1f)<<13 ) 224 #define s_RGA_MODE_CTRL_SRC_TR_MODE(x) ( (x&0x1)<<13 ) 225 #define s_RGA_MODE_CTRL_SRC_TR_R_EN(x) ( (x&0x1)<<14 ) 226 #define s_RGA_MODE_CTRL_SRC_TR_G_EN(x) ( (x&0x1)<<15 ) 227 #define s_RGA_MODE_CTRL_SRC_TR_B_EN(x) ( (x&0x1)<<16 ) 228 #define s_RGA_MODE_CTRL_SRC_TR_A_EN(x) ( (x&0x1)<<17 ) 229 #define s_RGA_MODE_CTRL_ROTATE_MODE(x) ( (x&0x3)<<18 ) 230 #define s_RGA_MODE_CTRL_SCALE_MODE(x) ( (x&0x3)<<20 ) 231 #define s_RGA_MODE_CTRL_PAT_SEL(x) ( (x&0x1)<<22 ) 232 #define s_RGA_MODE_CTRL_DST_FORMAT(x) ( (x&0x3)<<23 ) 233 #define s_RGA_MODE_CTRL_DST_RGB_PACK(x) ( (x&0x1)<<25 ) 234 #define s_RGA_MODE_CTRL_DST_RB_SWAP(x) ( (x&0x1)<<26 ) 235 #define s_RGA_MODE_CTRL_DST_ALPHA_SWAP(x) ( (x&0x1)<<27 ) 236 #define s_RGA_MODE_CTRL_LUT_ENDIAN_MODE(x) ( (x&0x1)<<28 ) 237 #define s_RGA_MODE_CTRL_CMD_INT_ENABLE(x) ( (x&0x1)<<29 ) 238 #define s_RGA_MODE_CTRL_ZERO_MODE_ENABLE(x) ( (x&0x1)<<30 ) 239 #define s_RGA_MODE_CTRL_DST_ALPHA_ENABLE(x) ( (x&0x1)<<31 ) 240 241 242 243 /* RGA_LINE_DRAW */ 244 #define m_RGA_LINE_DRAW_MAJOR_WIDTH ( 0x7ff<<0 ) 245 #define m_RGA_LINE_DRAW_LINE_DIRECTION ( 0x1<<11) 246 #define m_RGA_LINE_DRAW_LINE_WIDTH ( 0xf<<12) 247 #define m_RGA_LINE_DRAW_INCR_VALUE ( 0xfff<<16) 248 #define m_RGA_LINE_DRAW_DIR_MAJOR ( 0x1<<28) 249 #define m_RGA_LINE_DRAW_DIR_SEMI_MAJOR ( 0x1<<29) 250 #define m_RGA_LINE_DRAW_LAST_POINT ( 0x1<<30) 251 #define m_RGA_LINE_DRAW_ANTI_ALISING ( 0x1<<31) 252 253 #define s_RGA_LINE_DRAW_MAJOR_WIDTH(x) (((x)&0x7ff)<<0 ) 254 #define s_RGA_LINE_DRAW_LINE_DIRECTION(x) ( ((x)&0x1)<<11) 255 #define s_RGA_LINE_DRAW_LINE_WIDTH(x) ( ((x)&0xf)<<12) 256 #define s_RGA_LINE_DRAW_INCR_VALUE(x) (((x)&0xfff)<<16) 257 #define s_RGA_LINE_DRAW_DIR_MAJOR(x) ( ((x)&0x1)<<28) 258 #define s_RGA_LINE_DRAW_DIR_SEMI_MAJOR(x) ( ((x)&0x1)<<29) 259 #define s_RGA_LINE_DRAW_LAST_POINT(x) ( ((x)&0x1)<<30) 260 #define s_RGA_LINE_DRAW_ANTI_ALISING(x) ( ((x)&0x1)<<31) 261 262 263 /* RGA_ALPHA_CON */ 264 #define m_RGA_ALPHA_CON_ENABLE ( 0x1<<0 ) 265 #define m_RGA_ALPHA_CON_A_OR_R_SEL ( 0x1<<1 ) 266 #define m_RGA_ALPHA_CON_ALPHA_MODE ( 0x3<<2 ) 267 #define m_RGA_ALPHA_CON_PD_MODE ( 0xf<<4 ) 268 #define m_RGA_ALPHA_CON_SET_CONSTANT_VALUE (0xff<<8 ) 269 #define m_RGA_ALPHA_CON_PD_M_SEL ( 0x1<<16) 270 #define m_RGA_ALPHA_CON_FADING_ENABLE ( 0x1<<17) 271 #define m_RGA_ALPHA_CON_ROP_MODE_SEL ( 0x3<<18) 272 #define m_RGA_ALPHA_CON_CAL_MODE_SEL ( 0x1<<28) 273 #define m_RGA_ALPHA_CON_DITHER_ENABLE ( 0x1<<29) 274 #define m_RGA_ALPHA_CON_GRADIENT_CAL_MODE ( 0x1<<30) 275 #define m_RGA_ALPHA_CON_AA_SEL ( 0x1<<31) 276 277 #define s_RGA_ALPHA_CON_ENABLE(x) ( (x&0x1)<<0 ) 278 #define s_RGA_ALPHA_CON_A_OR_R_SEL(x) ( (x&0x1)<<1 ) 279 #define s_RGA_ALPHA_CON_ALPHA_MODE(x) ( (x&0x3)<<2 ) 280 #define s_RGA_ALPHA_CON_PD_MODE(x) ( (x&0xf)<<4 ) 281 #define s_RGA_ALPHA_CON_SET_CONSTANT_VALUE(x) ((x&0xff)<<8 ) 282 #define s_RGA_ALPHA_CON_PD_M_SEL(x) ( (x&0x1)<<16) 283 #define s_RGA_ALPHA_CON_FADING_ENABLE(x) ( (x&0x1)<<17) 284 #define s_RGA_ALPHA_CON_ROP_MODE_SEL(x) ( (x&0x3)<<18) 285 #define s_RGA_ALPHA_CON_CAL_MODE_SEL(x) ( (x&0x1)<<28) 286 #define s_RGA_ALPHA_CON_DITHER_ENABLE(x) ( (x&0x1)<<29) 287 #define s_RGA_ALPHA_CON_GRADIENT_CAL_MODE(x) ( (x&0x1)<<30) 288 #define s_RGA_ALPHA_CON_AA_SEL(x) ( (x&0x1)<<31) 289 290 291 /* blur sharp mode */ 292 #define m_RGA_BLUR_SHARP_FILTER_MODE ( 0x1<<25 ) 293 #define m_RGA_BLUR_SHARP_FILTER_TYPE ( 0x3<<26 ) 294 295 #define s_RGA_BLUR_SHARP_FILTER_MODE(x) ( (x&0x1)<<25 ) 296 #define s_RGA_BLUR_SHARP_FILTER_TYPE(x) ( (x&0x3)<<26 ) 297 298 299 /* pre scale mode */ 300 #define m_RGA_PRE_SCALE_HOR_RATIO ( 0x3 <<20 ) 301 #define m_RGA_PRE_SCALE_VER_RATIO ( 0x3 <<22 ) 302 #define m_RGA_PRE_SCALE_OUTPUT_FORMAT ( 0x1 <<24 ) 303 304 #define s_RGA_PRE_SCALE_HOR_RATIO(x) ( (x&0x3) <<20 ) 305 #define s_RGA_PRE_SCALE_VER_RATIO(x) ( (x&0x3) <<22 ) 306 #define s_RGA_PRE_SCALE_OUTPUT_FORMAT(x) ( (x&0x1) <<24 ) 307 308 309 310 /* RGA_MMU_CTRL*/ 311 #define m_RGA_MMU_CTRL_TLB_ADDR ( 0xffffffff<<0) 312 #define m_RGA_MMU_CTRL_PAGE_TABLE_SIZE ( 0x3<<4 ) 313 #define m_RGA_MMU_CTRL_MMU_ENABLE ( 0x1<<0 ) 314 #define m_RGA_MMU_CTRL_SRC_FLUSH ( 0x1<<1 ) 315 #define m_RGA_MMU_CTRL_DST_FLUSH ( 0x1<<2 ) 316 #define m_RGA_MMU_CTRL_CMD_CHAN_FLUSH ( 0x1<<3 ) 317 318 #define s_RGA_MMU_CTRL_TLB_ADDR(x) ((x&0xffffffff)) 319 #define s_RGA_MMU_CTRL_PAGE_TABLE_SIZE(x) ((x&0x3)<<4) 320 #define s_RGA_MMU_CTRL_MMU_ENABLE(x) ((x&0x1)<<0) 321 #define s_RGA_MMU_CTRL_SRC_FLUSH(x) ((x&0x1)<<1) 322 #define s_RGA_MMU_CTRL_DST_FLUSH(x) ((x&0x1)<<2) 323 #define s_RGA_MMU_CTRL_CMD_CHAN_FLUSH(x) ((x&0x1)<<3) 324 325 #endif 326 327 /* 328 #define RGA_MODE_CTRL_OFFSET 0x0 329 #define RGA_SRC_Y_MST_OFFSET 0x4 330 #define RGA_SRC_CB_MST_OFFSET 0x8 331 #define RGA_SRC_CR_MST_OFFSET 0xc 332 #define RGA_SRC_VIR_INFO_OFFSET 0x10 333 #define RGA_SRC_ACT_INFO_OFFSET 0x14 334 #define RGA_SRC_X_PARA_OFFSET 0x18 335 #define RGA_SRC_Y_PARA_OFFSET 0x1c 336 #define RGA_SRC_TILE_XINFO_OFFSET 0x20 337 #define RGA_SRC_TILE_YINFO_OFFSET 0x24 338 #define RGA_SRC_TILE_H_INCR_OFFSET 0x28 339 #define RGA_SRC_TILE_V_INCR_OFFSET 0x2c 340 #define RGA_SRC_TILE_OFFSETX_OFFSET 0x30 341 #define RGA_SRC_TILE_OFFSETY_OFFSET 0x34 342 #define RGA_SRC_BG_COLOR_OFFSET 0x38 343 344 #define RGA_SRC_FG_COLOR_OFFSET 0x3c 345 #define RGA_LINE_DRAWING_COLOR_OFFSET 0x3c 346 347 #define RGA_SRC_TR_COLOR0_OFFSET 0x40 348 #define RGA_CP_GR_A_OFFSET 0x40 //repeat 349 350 #define RGA_SRC_TR_COLOR1_OFFSET 0x44 351 #define RGA_CP_GR_B_OFFSET 0x44 //repeat 352 353 #define RGA_LINE_DRAW_OFFSET 0x48 354 #define RGA_PAT_START_POINT_OFFSET 0x48 //repeat 355 356 #define RGA_DST_MST_OFFSET 0x4c 357 #define RGA_LUT_MST_OFFSET 0x4c //repeat 358 #define RGA_PAT_MST_OFFSET 0x4c //repeat 359 #define RGA_LINE_DRAWING_MST_OFFSET 0x4c //repeat 360 361 #define RGA_DST_VIR_INFO_OFFSET 0x50 362 363 #define RGA_DST_CTR_INFO_OFFSET 0x54 364 #define RGA_LINE_DRAW_XY_INFO_OFFSET 0x54 //repeat 365 366 #define RGA_ALPHA_CON_OFFSET 0x58 367 #define RGA_FADING_CON_OFFSET 0x5c 368 369 #define RGA_PAT_CON_OFFSET 0x60 370 #define RGA_LINE_DRAWING_WIDTH_OFFSET 0x60 //repeat 371 372 #define RGA_ROP_CON0_OFFSET 0x64 373 #define RGA_CP_GR_G_OFFSET 0x64 //repeat 374 #define RGA_PRESCL_CB_MST_OFFSET 0x64 //repeat 375 376 #define RGA_ROP_CON1_OFFSET 0x68 377 #define RGA_CP_GR_R_OFFSET 0x68 //repeat 378 #define RGA_PRESCL_CR_MST_OFFSET 0x68 //repeat 379 380 #define RGA_MMU_CTRL_OFFSET 0x6c 381 382 383 #define RGA_SYS_CTRL_OFFSET 0x000 384 #define RGA_CMD_CTRL_OFFSET 0x004 385 #define RGA_CMD_ADDR_OFFSET 0x008 386 #define RGA_STATUS_OFFSET 0x00c 387 #define RGA_INT_OFFSET 0x010 388 #define RGA_AXI_ID_OFFSET 0x014 389 #define RGA_MMU_STA_CTRL_OFFSET 0x018 390 #define RGA_MMU_STA_OFFSET 0x01c 391 */ 392 //hxx 393 394 #define RGA_SYS_CTRL_OFFSET (RGA_SYS_CTRL-0x100) 395 #define RGA_CMD_CTRL_OFFSET (RGA_CMD_CTRL-0x100) 396 #define RGA_CMD_ADDR_OFFSET (RGA_CMD_ADDR-0x100) 397 #define RGA_STATUS_OFFSET (RGA_STATUS-0x100) 398 #define RGA_INT_OFFSET (RGA_INT-0x100) 399 #define RGA_AXI_ID_OFFSET (RGA_AXI_ID-0x100) 400 #define RGA_MMU_STA_CTRL_OFFSET (RGA_MMU_STA_CTRL-0x100) 401 #define RGA_MMU_STA_OFFSET (RGA_MMU_STA-0x100) 402 403 #define RGA_MODE_CTRL_OFFSET (RGA_MODE_CTRL-0x100) 404 #define RGA_SRC_Y_MST_OFFSET (RGA_SRC_Y_MST-0x100) 405 #define RGA_SRC_CB_MST_OFFSET (RGA_SRC_CB_MST-0x100) 406 #define RGA_SRC_CR_MST_OFFSET (RGA_SRC_CR_MST-0x100) 407 #define RGA_SRC_VIR_INFO_OFFSET (RGA_SRC_VIR_INFO-0x100) 408 #define RGA_SRC_ACT_INFO_OFFSET (RGA_SRC_ACT_INFO-0x100) 409 #define RGA_SRC_X_PARA_OFFSET (RGA_SRC_X_PARA-0x100) 410 #define RGA_SRC_Y_PARA_OFFSET (RGA_SRC_Y_PARA-0x100) 411 #define RGA_SRC_TILE_XINFO_OFFSET (RGA_SRC_TILE_XINFO-0x100) 412 #define RGA_SRC_TILE_YINFO_OFFSET (RGA_SRC_TILE_YINFO-0x100) 413 #define RGA_SRC_TILE_H_INCR_OFFSET (RGA_SRC_TILE_H_INCR-0x100) 414 #define RGA_SRC_TILE_V_INCR_OFFSET (RGA_SRC_TILE_V_INCR-0x100) 415 #define RGA_SRC_TILE_OFFSETX_OFFSET (RGA_SRC_TILE_OFFSETX-0x100) 416 #define RGA_SRC_TILE_OFFSETY_OFFSET (RGA_SRC_TILE_OFFSETY-0x100) 417 #define RGA_SRC_BG_COLOR_OFFSET (RGA_SRC_BG_COLOR-0x100) 418 419 #define RGA_SRC_FG_COLOR_OFFSET (RGA_SRC_FG_COLOR-0x100) 420 #define RGA_LINE_DRAWING_COLOR_OFFSET (RGA_LINE_DRAWING_COLOR-0x100) 421 422 #define RGA_SRC_TR_COLOR0_OFFSET (RGA_SRC_TR_COLOR0-0x100) 423 #define RGA_CP_GR_A_OFFSET (RGA_CP_GR_A-0x100) //repeat 424 425 #define RGA_SRC_TR_COLOR1_OFFSET (RGA_SRC_TR_COLOR1-0x100) 426 #define RGA_CP_GR_B_OFFSET (RGA_CP_GR_B-0x100) //repeat 427 428 #define RGA_LINE_DRAW_OFFSET (RGA_LINE_DRAW-0x100) 429 #define RGA_PAT_START_POINT_OFFSET (RGA_PAT_START_POINT-0x100) //repeat 430 431 #define RGA_DST_MST_OFFSET (RGA_DST_MST-0x100) 432 #define RGA_LUT_MST_OFFSET (RGA_LUT_MST-0x100) //repeat 433 #define RGA_PAT_MST_OFFSET (RGA_PAT_MST-0x100) //repeat 434 #define RGA_LINE_DRAWING_MST_OFFSET (RGA_LINE_DRAWING_MST-0x100) //repeat 435 436 #define RGA_DST_VIR_INFO_OFFSET (RGA_DST_VIR_INFO-0x100) 437 438 #define RGA_DST_CTR_INFO_OFFSET (RGA_DST_CTR_INFO-0x100) 439 #define RGA_LINE_DRAW_XY_INFO_OFFSET (RGA_LINE_DRAW_XY_INFO-0x100) //repeat 440 441 #define RGA_ALPHA_CON_OFFSET (RGA_ALPHA_CON-0x100) 442 443 #define RGA_PAT_CON_OFFSET (RGA_PAT_CON-0x100) 444 #define RGA_LINE_DRAWING_WIDTH_OFFSET (RGA_DST_VIR_WIDTH_PIX-0x100) //repeat 445 446 #define RGA_ROP_CON0_OFFSET (RGA_ROP_CON0-0x100) 447 #define RGA_CP_GR_G_OFFSET (RGA_CP_GR_G-0x100) //repeat 448 #define RGA_PRESCL_CB_MST_OFFSET (RGA_PRESCL_CB_MST-0x100) //repeat 449 450 #define RGA_ROP_CON1_OFFSET (RGA_ROP_CON1-0x100) 451 #define RGA_CP_GR_R_OFFSET (RGA_CP_GR_R-0x100) //repeat 452 #define RGA_PRESCL_CR_MST_OFFSET (RGA_PRESCL_CR_MST-0x100) //repeat 453 454 #define RGA_FADING_CON_OFFSET (RGA_FADING_CON-0x100) 455 #define RGA_MMU_TLB_OFFSET (RGA_MMU_TBL-0x100) 456 457 #define RGA_YUV_OUT_CFG_OFFSET (RGA_YUV_OUT_CFG-0x100) 458 #define RGA_DST_UV_MST_OFFSET (RGA_DST_UV_MST-0x100) 459 460 461 462 void matrix_cal(const struct rga_req *msg, TILE_INFO *tile); 463 464 465 int RGA_gen_reg_info(const struct rga_req *msg, unsigned char *base); 466 uint8_t RGA_pixel_width_init(uint32_t format); 467 468