1 /* SPDX-License-Identifier: BSD-2-Clause */ 2 /* 3 * Copyright (c) 2026, Qualcomm Technologies, Inc. and/or its subsidiaries. 4 */ 5 6 #ifndef _PAS_RESOURCES_H_ 7 #define _PAS_RESOURCES_H_ 8 9 #include <io.h> 10 #include <string.h> 11 #include <stdint.h> 12 #include <stdlib.h> 13 14 #include "pas.h" 15 16 /* 17 * WPSS 18 */ 19 static const struct fw_rsc_devmem wpss_mem_res[] = { 20 {.name = "wlan_fw_mem", .flags = IOMMU_READ | IOMMU_WRITE, 21 .da = 0x80c00000, .pa = 0x80c00000, .len = 0xc00000, }, 22 {.name = "wlan_ce_mem", .flags = IOMMU_READ | IOMMU_WRITE, 23 .da = 0x004cd000, .pa = 0x004cd000, .len = 0x1000, }, 24 }; 25 26 static const struct fw_rsc_hdr wpss_mem_hdr = { 27 .type = RSC_DEVMEM, 28 }; 29 30 DEFINE_RESOURCE_TABLE(WPSS, ARRAY_SIZE(wpss_mem_res)); 31 32 static struct resource_table wpss_rt = { 33 .ver = 1, 34 .num = WPSS_NUM_MEM_RESOURCES, 35 .offset[WPSS_NUM_MEM_RESOURCES - 1] = 0, 36 }; 37 38 /* 39 * Compute 40 */ 41 static const struct fw_rsc_devmem turing_mem_res[] = { 42 { .name = "tcsr_2", .flags = IOMMU_READ | IOMMU_WRITE, 43 .da = 0x01fc0000, .pa = 0x01fc0000, .len = 0x00030000, }, 44 { .name = "tcsr_mutex", .flags = IOMMU_READ | IOMMU_WRITE, 45 .da = 0x01f40000, .pa = 0x01f40000, .len = 0x00020000, }, 46 { .name = "efuse", .flags = IOMMU_READ, 47 .da = 0x00780000, .pa = 0x00780000, .len = 0x0000A000, }, 48 { .name = "mailbox", .flags = IOMMU_READ | IOMMU_WRITE, 49 .da = 0x406000, .pa = 0x406000, .len = 0x00001000, }, 50 { .name = "smem", .flags = IOMMU_READ | IOMMU_WRITE, 51 .da = 0x80900000, .pa = 0x80900000, .len = 0x00200000, }, 52 { .name = "cmd_db", .flags = IOMMU_READ | IOMMU_WRITE, 53 .da = 0x80860000, .pa = 0x80860000, .len = 0x00020000, }, 54 { .name = "aoss_msg_ram", .flags = IOMMU_READ | IOMMU_WRITE, 55 .da = 0x0c300000, .pa = 0x0c300000, .len = 0x00100000, }, 56 { .name = "clk_ctl", .flags = IOMMU_READ | IOMMU_WRITE, 57 .da = 0x00100000, .pa = 0x00100000, .len = 0x001f0000, }, 58 { .name = "rpmh_pdc", .flags = IOMMU_READ | IOMMU_WRITE, 59 .da = 0x0b2b0000, .pa = 0x0b2b0000, .len = 0x00010000, }, 60 { .name = "rpmh_seqmem", .flags = IOMMU_READ | IOMMU_WRITE, 61 .da = 0x0b4b0000, .pa = 0x0b4b0000, .len = 0x00010000, }, 62 { .name = "rpmh_bcm", .flags = IOMMU_READ | IOMMU_WRITE, 63 .da = 0x0bbf0000, .pa = 0x0bbf0000, .len = 0x0002000, }, 64 { .name = "ddr_reg", .flags = IOMMU_READ | IOMMU_WRITE, 65 .da = 0x09080000, .pa = 0x09080000, .len = 0x00001000, }, 66 { .name = "llcc_bdcast", .flags = IOMMU_READ | IOMMU_WRITE, 67 .da = 0x09600000, .pa = 0x09600000, .len = 0x00058000, }, 68 { .name = "llcc0", .flags = IOMMU_READ | IOMMU_WRITE, 69 .da = 0x09200000, .pa = 0x09200000, .len = 0x00058000, }, 70 { .name = "llcc1", .flags = IOMMU_READ | IOMMU_WRITE, 71 .da = 0x09280000, .pa = 0x09280000, .len = 0x00058000, }, 72 { .name = "rdpm", .flags = IOMMU_READ | IOMMU_WRITE, 73 .da = 0x00634000, .pa = 0x00634000, .len = 0x00004000, }, 74 }; 75 76 static const struct fw_rsc_hdr turing_mem_hdr = { 77 .type = RSC_DEVMEM, 78 }; 79 80 DEFINE_RESOURCE_TABLE(TURING, ARRAY_SIZE(turing_mem_res)); 81 82 static struct resource_table turing_rt = { 83 .ver = 1, 84 .num = TURING_NUM_MEM_RESOURCES, 85 .offset[TURING_NUM_MEM_RESOURCES - 1] = 0, 86 }; 87 88 /* 89 * LPASS 90 */ 91 static const struct fw_rsc_devmem lpass_mem_res[] = { 92 { .name = "efuse", .flags = IOMMU_READ, 93 .da = 0x00786000, .pa = 0x00786000, .len = 0x00020000, }, 94 { .name = "rng", .flags = IOMMU_READ | IOMMU_WRITE, 95 .da = 0x010d4000, .pa = 0x010d4000, .len = 0x00001000, }, 96 { .name = "mailbox", .flags = IOMMU_READ | IOMMU_WRITE, 97 .da = 0x00403000, .pa = 0x00403000, .len = 0x00001000, }, 98 { .name = "rpmh", .flags = IOMMU_READ | IOMMU_WRITE, 99 .da = 0x0a000000, .pa = 0x0a000000, .len = 0x05000000, }, 100 { .name = "tcsr_2", .flags = IOMMU_READ | IOMMU_WRITE, 101 .da = 0x01fc0000, .pa = 0x01fc0000, .len = 0x00030000, }, 102 { .name = "tcsr_mutex", .flags = IOMMU_READ | IOMMU_WRITE, 103 .da = 0x01f40000, .pa = 0x01f40000, .len = 0x00020000, }, 104 { .name = "smem", .flags = IOMMU_READ | IOMMU_WRITE, 105 .da = 0x80900000, .pa = 0x80900000, .len = 0x00200000, }, 106 { .name = "gcc", .flags = IOMMU_READ | IOMMU_WRITE, 107 .da = 0x00100000, .pa = 0x00100000, .len = 0x001F0000, }, 108 { .name = "cmd_db", .flags = IOMMU_READ | IOMMU_WRITE, 109 .da = 0x80860000, .pa = 0x80860000, .len = 0x00020000, }, 110 { .name = "i2c", .flags = IOMMU_READ | IOMMU_WRITE, 111 .da = 0x00a80000, .pa = 0x00a80000, .len = 0x00004000, }, 112 { .name = "pinctrl", .flags = IOMMU_READ | IOMMU_WRITE, 113 .da = 0x0f100000, .pa = 0x0f100000, .len = 0x00300000, }, 114 }; 115 116 static const struct fw_rsc_hdr lpass_mem_hdr = { 117 .type = RSC_DEVMEM, 118 }; 119 120 DEFINE_RESOURCE_TABLE(LPASS, ARRAY_SIZE(lpass_mem_res)); 121 122 static struct resource_table lpass_rt = { 123 .ver = 1, 124 .num = LPASS_NUM_MEM_RESOURCES, 125 .offset[LPASS_NUM_MEM_RESOURCES - 1] = 0, 126 }; 127 128 #endif /* _PAS_RESOURCES_H_ */ 129 130