1 // SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
2 /*
3 *
4 * (C) COPYRIGHT 2021-2022 ARM Limited. All rights reserved.
5 *
6 * This program is free software and is provided to you under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation, and any use by you of this program is subject to the terms
9 * of such GNU license.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, you can access it online at
18 * http://www.gnu.org/licenses/gpl-2.0.html.
19 *
20 */
21
22 #include "mali_kbase_pbha.h"
23
24 #include <device/mali_kbase_device.h>
25 #include <mali_kbase.h>
26 #define DTB_SET_SIZE 2
27
read_setting_valid(unsigned int id,unsigned int read_setting)28 static bool read_setting_valid(unsigned int id, unsigned int read_setting)
29 {
30 switch (id) {
31 /* Valid ID - fall through all */
32 case SYSC_ALLOC_ID_R_OTHER:
33 case SYSC_ALLOC_ID_R_CSF:
34 case SYSC_ALLOC_ID_R_MMU:
35 case SYSC_ALLOC_ID_R_TILER_VERT:
36 case SYSC_ALLOC_ID_R_TILER_PTR:
37 case SYSC_ALLOC_ID_R_TILER_INDEX:
38 case SYSC_ALLOC_ID_R_TILER_OTHER:
39 case SYSC_ALLOC_ID_R_IC:
40 case SYSC_ALLOC_ID_R_ATTR:
41 case SYSC_ALLOC_ID_R_SCM:
42 case SYSC_ALLOC_ID_R_FSDC:
43 case SYSC_ALLOC_ID_R_VL:
44 case SYSC_ALLOC_ID_R_PLR:
45 case SYSC_ALLOC_ID_R_TEX:
46 case SYSC_ALLOC_ID_R_LSC:
47 switch (read_setting) {
48 /* Valid setting value - fall through all */
49 case SYSC_ALLOC_L2_ALLOC:
50 case SYSC_ALLOC_NEVER_ALLOC:
51 case SYSC_ALLOC_ALWAYS_ALLOC:
52 case SYSC_ALLOC_PTL_ALLOC:
53 case SYSC_ALLOC_L2_PTL_ALLOC:
54 return true;
55 default:
56 return false;
57 }
58 default:
59 return false;
60 }
61
62 /* Unreachable */
63 return false;
64 }
65
write_setting_valid(unsigned int id,unsigned int write_setting)66 static bool write_setting_valid(unsigned int id, unsigned int write_setting)
67 {
68 switch (id) {
69 /* Valid ID - fall through all */
70 case SYSC_ALLOC_ID_W_OTHER:
71 case SYSC_ALLOC_ID_W_CSF:
72 case SYSC_ALLOC_ID_W_PCB:
73 case SYSC_ALLOC_ID_W_TILER_PTR:
74 case SYSC_ALLOC_ID_W_TILER_VERT_PLIST:
75 case SYSC_ALLOC_ID_W_TILER_OTHER:
76 case SYSC_ALLOC_ID_W_L2_EVICT:
77 case SYSC_ALLOC_ID_W_L2_FLUSH:
78 case SYSC_ALLOC_ID_W_TIB_COLOR:
79 case SYSC_ALLOC_ID_W_TIB_COLOR_AFBCH:
80 case SYSC_ALLOC_ID_W_TIB_COLOR_AFBCB:
81 case SYSC_ALLOC_ID_W_TIB_CRC:
82 case SYSC_ALLOC_ID_W_TIB_DS:
83 case SYSC_ALLOC_ID_W_TIB_DS_AFBCH:
84 case SYSC_ALLOC_ID_W_TIB_DS_AFBCB:
85 case SYSC_ALLOC_ID_W_LSC:
86 switch (write_setting) {
87 /* Valid setting value - fall through all */
88 case SYSC_ALLOC_L2_ALLOC:
89 case SYSC_ALLOC_NEVER_ALLOC:
90 case SYSC_ALLOC_ALWAYS_ALLOC:
91 case SYSC_ALLOC_PTL_ALLOC:
92 case SYSC_ALLOC_L2_PTL_ALLOC:
93 return true;
94 default:
95 return false;
96 }
97 default:
98 return false;
99 }
100
101 /* Unreachable */
102 return false;
103 }
104
105 /* Private structure to be returned as setting validity status */
106 struct settings_status {
107 /* specifies whether id and either one of settings is valid */
108 bool overall;
109 /* specifies whether read setting is valid */
110 bool read;
111 /* specifies whether write setting is valid*/
112 bool write;
113 };
114
settings_valid(unsigned int id,unsigned int read_setting,unsigned int write_setting)115 static struct settings_status settings_valid(unsigned int id, unsigned int read_setting,
116 unsigned int write_setting)
117 {
118 struct settings_status valid = { .overall = (id < SYSC_ALLOC_COUNT * sizeof(u32)) };
119
120 if (valid.overall) {
121 valid.read = read_setting_valid(id, read_setting);
122 valid.write = write_setting_valid(id, write_setting);
123 valid.overall = valid.read || valid.write;
124 }
125
126 return valid;
127 }
128
kbasep_pbha_supported(struct kbase_device * kbdev)129 bool kbasep_pbha_supported(struct kbase_device *kbdev)
130 {
131 const u32 arch_maj_rev =
132 ARCH_MAJOR_REV_REG(kbdev->gpu_props.props.raw_props.gpu_id);
133
134 return (arch_maj_rev >= GPU_ID2_ARCH_MAJOR_REV_MAKE(11, 3));
135 }
136
kbase_pbha_record_settings(struct kbase_device * kbdev,bool runtime,unsigned int id,unsigned int read_setting,unsigned int write_setting)137 int kbase_pbha_record_settings(struct kbase_device *kbdev, bool runtime,
138 unsigned int id, unsigned int read_setting,
139 unsigned int write_setting)
140 {
141 struct settings_status const valid = settings_valid(id, read_setting, write_setting);
142
143 if (valid.overall) {
144 unsigned int const sysc_alloc_num = id / sizeof(u32);
145 u32 modified_reg;
146
147 if (runtime) {
148 int i;
149
150 kbase_pm_context_active(kbdev);
151 /* Ensure host copy of SYSC_ALLOC is up to date */
152 for (i = 0; i < SYSC_ALLOC_COUNT; i++)
153 kbdev->sysc_alloc[i] = kbase_reg_read(
154 kbdev, GPU_CONTROL_REG(SYSC_ALLOC(i)));
155 kbase_pm_context_idle(kbdev);
156 }
157
158 modified_reg = kbdev->sysc_alloc[sysc_alloc_num];
159
160 switch (id % sizeof(u32)) {
161 case 0:
162 modified_reg = valid.read ? SYSC_ALLOC_R_SYSC_ALLOC0_SET(modified_reg,
163 read_setting) :
164 modified_reg;
165 modified_reg = valid.write ? SYSC_ALLOC_W_SYSC_ALLOC0_SET(modified_reg,
166 write_setting) :
167 modified_reg;
168 break;
169 case 1:
170 modified_reg = valid.read ? SYSC_ALLOC_R_SYSC_ALLOC1_SET(modified_reg,
171 read_setting) :
172 modified_reg;
173 modified_reg = valid.write ? SYSC_ALLOC_W_SYSC_ALLOC1_SET(modified_reg,
174 write_setting) :
175 modified_reg;
176 break;
177 case 2:
178 modified_reg = valid.read ? SYSC_ALLOC_R_SYSC_ALLOC2_SET(modified_reg,
179 read_setting) :
180 modified_reg;
181 modified_reg = valid.write ? SYSC_ALLOC_W_SYSC_ALLOC2_SET(modified_reg,
182 write_setting) :
183 modified_reg;
184 break;
185 case 3:
186 modified_reg = valid.read ? SYSC_ALLOC_R_SYSC_ALLOC3_SET(modified_reg,
187 read_setting) :
188 modified_reg;
189 modified_reg = valid.write ? SYSC_ALLOC_W_SYSC_ALLOC3_SET(modified_reg,
190 write_setting) :
191 modified_reg;
192 break;
193 }
194
195 kbdev->sysc_alloc[sysc_alloc_num] = modified_reg;
196 }
197
198 return valid.overall ? 0 : -EINVAL;
199 }
200
kbase_pbha_write_settings(struct kbase_device * kbdev)201 void kbase_pbha_write_settings(struct kbase_device *kbdev)
202 {
203 if (kbasep_pbha_supported(kbdev)) {
204 int i;
205
206 for (i = 0; i < SYSC_ALLOC_COUNT; ++i)
207 kbase_reg_write(kbdev, GPU_CONTROL_REG(SYSC_ALLOC(i)),
208 kbdev->sysc_alloc[i]);
209 }
210 }
211
kbase_pbha_read_int_id_override_property(struct kbase_device * kbdev,const struct device_node * pbha_node)212 static int kbase_pbha_read_int_id_override_property(struct kbase_device *kbdev,
213 const struct device_node *pbha_node)
214 {
215 u32 dtb_data[SYSC_ALLOC_COUNT * sizeof(u32) * DTB_SET_SIZE];
216 int sz, i;
217 bool valid = true;
218
219 sz = of_property_count_elems_of_size(pbha_node, "int_id_override",
220 sizeof(u32));
221 if (sz <= 0 || (sz % DTB_SET_SIZE != 0)) {
222 dev_err(kbdev->dev, "Bad DTB format: pbha.int_id_override\n");
223 return -EINVAL;
224 }
225 if (of_property_read_u32_array(pbha_node, "int_id_override", dtb_data,
226 sz) != 0) {
227 dev_err(kbdev->dev,
228 "Failed to read DTB pbha.int_id_override\n");
229 return -EINVAL;
230 }
231
232 for (i = 0; valid && i < sz; i = i + DTB_SET_SIZE) {
233 unsigned int rdset =
234 SYSC_ALLOC_R_SYSC_ALLOC0_GET(dtb_data[i + 1]);
235 unsigned int wrset =
236 SYSC_ALLOC_W_SYSC_ALLOC0_GET(dtb_data[i + 1]);
237 valid = valid &&
238 (kbase_pbha_record_settings(kbdev, false, dtb_data[i],
239 rdset, wrset) == 0);
240 if (valid)
241 dev_info(kbdev->dev,
242 "pbha.int_id_override 0x%x r0x%x w0x%x\n",
243 dtb_data[i], rdset, wrset);
244 }
245 if (i != sz || (!valid)) {
246 dev_err(kbdev->dev,
247 "Failed recording DTB data (pbha.int_id_override)\n");
248 return -EINVAL;
249 }
250 return 0;
251 }
252
253 #if MALI_USE_CSF
kbase_pbha_read_propagate_bits_property(struct kbase_device * kbdev,const struct device_node * pbha_node)254 static int kbase_pbha_read_propagate_bits_property(struct kbase_device *kbdev,
255 const struct device_node *pbha_node)
256 {
257 u32 bits;
258 int err;
259
260 if (!kbase_hw_has_feature(kbdev, BASE_HW_FEATURE_PBHA_HWU))
261 return 0;
262
263 err = of_property_read_u32(pbha_node, "propagate_bits", &bits);
264
265 if (err < 0) {
266 if (err != -EINVAL) {
267 dev_err(kbdev->dev,
268 "DTB value for propagate_bits is improperly formed (err=%d)\n",
269 err);
270 return err;
271 }
272 }
273
274 if (bits > (L2_CONFIG_PBHA_HWU_MASK >> L2_CONFIG_PBHA_HWU_SHIFT)) {
275 dev_err(kbdev->dev, "Bad DTB value for propagate_bits: 0x%x\n", bits);
276 return -EINVAL;
277 }
278
279 kbdev->pbha_propagate_bits = bits;
280 return 0;
281 }
282 #endif
283
kbase_pbha_read_dtb(struct kbase_device * kbdev)284 int kbase_pbha_read_dtb(struct kbase_device *kbdev)
285 {
286 const struct device_node *pbha_node;
287 int err;
288
289 if (!kbasep_pbha_supported(kbdev))
290 return 0;
291
292 pbha_node = of_get_child_by_name(kbdev->dev->of_node, "pbha");
293 if (!pbha_node)
294 return 0;
295
296 err = kbase_pbha_read_int_id_override_property(kbdev, pbha_node);
297
298 #if MALI_USE_CSF
299 if (err < 0)
300 return err;
301
302 err = kbase_pbha_read_propagate_bits_property(kbdev, pbha_node);
303 #endif
304
305 return err;
306 }
307