1 /* 2 * 3 * (C) COPYRIGHT 2014-2016 ARM Limited. All rights reserved. 4 * 5 * This program is free software and is provided to you under the terms of the 6 * GNU General Public License version 2 as published by the Free Software 7 * Foundation, and any use by you of this program is subject to the terms 8 * of such GNU licence. 9 * 10 * A copy of the licence is included with the program, and can also be obtained 11 * from Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, 12 * Boston, MA 02110-1301, USA. 13 * 14 */ 15 16 17 18 19 /* 20 * Register-based HW access backend specific definitions 21 */ 22 23 #ifndef _KBASE_HWACCESS_GPU_DEFS_H_ 24 #define _KBASE_HWACCESS_GPU_DEFS_H_ 25 26 /* SLOT_RB_SIZE must be < 256 */ 27 #define SLOT_RB_SIZE 2 28 #define SLOT_RB_MASK (SLOT_RB_SIZE - 1) 29 30 /** 31 * struct rb_entry - Ringbuffer entry 32 * @katom: Atom associated with this entry 33 */ 34 struct rb_entry { 35 struct kbase_jd_atom *katom; 36 }; 37 38 /** 39 * struct slot_rb - Slot ringbuffer 40 * @entries: Ringbuffer entries 41 * @last_context: The last context to submit a job on this slot 42 * @read_idx: Current read index of buffer 43 * @write_idx: Current write index of buffer 44 * @job_chain_flag: Flag used to implement jobchain disambiguation 45 */ 46 struct slot_rb { 47 struct rb_entry entries[SLOT_RB_SIZE]; 48 49 struct kbase_context *last_context; 50 51 u8 read_idx; 52 u8 write_idx; 53 54 u8 job_chain_flag; 55 }; 56 57 /** 58 * struct kbase_backend_data - GPU backend specific data for HW access layer 59 * @slot_rb: Slot ringbuffers 60 * @rmu_workaround_flag: When PRLAM-8987 is present, this flag determines 61 * whether slots 0/1 or slot 2 are currently being 62 * pulled from 63 * @scheduling_timer: The timer tick used for rescheduling jobs 64 * @timer_running: Is the timer running? The runpool_mutex must be 65 * held whilst modifying this. 66 * @suspend_timer: Is the timer suspended? Set when a suspend 67 * occurs and cleared on resume. The runpool_mutex 68 * must be held whilst modifying this. 69 * @reset_gpu: Set to a KBASE_RESET_xxx value (see comments) 70 * @reset_workq: Work queue for performing the reset 71 * @reset_work: Work item for performing the reset 72 * @reset_wait: Wait event signalled when the reset is complete 73 * @reset_timer: Timeout for soft-stops before the reset 74 * @timeouts_updated: Have timeout values just been updated? 75 * 76 * The hwaccess_lock (a spinlock) must be held when accessing this structure 77 */ 78 struct kbase_backend_data { 79 struct slot_rb slot_rb[BASE_JM_MAX_NR_SLOTS]; 80 81 bool rmu_workaround_flag; 82 83 struct hrtimer scheduling_timer; 84 85 bool timer_running; 86 bool suspend_timer; 87 88 atomic_t reset_gpu; 89 90 /* The GPU reset isn't pending */ 91 #define KBASE_RESET_GPU_NOT_PENDING 0 92 /* kbase_prepare_to_reset_gpu has been called */ 93 #define KBASE_RESET_GPU_PREPARED 1 94 /* kbase_reset_gpu has been called - the reset will now definitely happen 95 * within the timeout period */ 96 #define KBASE_RESET_GPU_COMMITTED 2 97 /* The GPU reset process is currently occuring (timeout has expired or 98 * kbasep_try_reset_gpu_early was called) */ 99 #define KBASE_RESET_GPU_HAPPENING 3 100 /* Reset the GPU silently, used when resetting the GPU as part of normal 101 * behavior (e.g. when exiting protected mode). */ 102 #define KBASE_RESET_GPU_SILENT 4 103 struct workqueue_struct *reset_workq; 104 struct work_struct reset_work; 105 wait_queue_head_t reset_wait; 106 struct hrtimer reset_timer; 107 108 bool timeouts_updated; 109 }; 110 111 /** 112 * struct kbase_jd_atom_backend - GPU backend specific katom data 113 */ 114 struct kbase_jd_atom_backend { 115 }; 116 117 /** 118 * struct kbase_context_backend - GPU backend specific context data 119 */ 120 struct kbase_context_backend { 121 }; 122 123 #endif /* _KBASE_HWACCESS_GPU_DEFS_H_ */ 124