1 // SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
2 /*
3 *
4 * (C) COPYRIGHT 2014-2022 ARM Limited. All rights reserved.
5 *
6 * This program is free software and is provided to you under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation, and any use by you of this program is subject to the terms
9 * of such GNU license.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, you can access it online at
18 * http://www.gnu.org/licenses/gpl-2.0.html.
19 *
20 */
21
22 /*
23 * Base kernel property query backend APIs
24 */
25
26 #include <mali_kbase.h>
27 #include <device/mali_kbase_device.h>
28 #include <backend/gpu/mali_kbase_pm_internal.h>
29 #include <backend/gpu/mali_kbase_cache_policy_backend.h>
30 #include <mali_kbase_hwaccess_gpuprops.h>
31
kbase_backend_gpuprops_get(struct kbase_device * kbdev,struct kbase_gpuprops_regdump * regdump)32 int kbase_backend_gpuprops_get(struct kbase_device *kbdev,
33 struct kbase_gpuprops_regdump *regdump)
34 {
35 int i;
36 struct kbase_gpuprops_regdump registers = { 0 };
37
38 /* Fill regdump with the content of the relevant registers */
39 registers.gpu_id = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_ID));
40
41 registers.l2_features = kbase_reg_read(kbdev,
42 GPU_CONTROL_REG(L2_FEATURES));
43
44 registers.tiler_features = kbase_reg_read(kbdev,
45 GPU_CONTROL_REG(TILER_FEATURES));
46 registers.mem_features = kbase_reg_read(kbdev,
47 GPU_CONTROL_REG(MEM_FEATURES));
48 registers.mmu_features = kbase_reg_read(kbdev,
49 GPU_CONTROL_REG(MMU_FEATURES));
50 registers.as_present = kbase_reg_read(kbdev,
51 GPU_CONTROL_REG(AS_PRESENT));
52 #if !MALI_USE_CSF
53 registers.js_present = kbase_reg_read(kbdev,
54 GPU_CONTROL_REG(JS_PRESENT));
55 #else /* !MALI_USE_CSF */
56 registers.js_present = 0;
57 #endif /* !MALI_USE_CSF */
58
59 for (i = 0; i < GPU_MAX_JOB_SLOTS; i++)
60 #if !MALI_USE_CSF
61 registers.js_features[i] = kbase_reg_read(kbdev,
62 GPU_CONTROL_REG(JS_FEATURES_REG(i)));
63 #else /* !MALI_USE_CSF */
64 registers.js_features[i] = 0;
65 #endif /* !MALI_USE_CSF */
66
67 for (i = 0; i < BASE_GPU_NUM_TEXTURE_FEATURES_REGISTERS; i++)
68 registers.texture_features[i] = kbase_reg_read(kbdev,
69 GPU_CONTROL_REG(TEXTURE_FEATURES_REG(i)));
70
71 registers.thread_max_threads = kbase_reg_read(kbdev,
72 GPU_CONTROL_REG(THREAD_MAX_THREADS));
73 registers.thread_max_workgroup_size = kbase_reg_read(kbdev,
74 GPU_CONTROL_REG(THREAD_MAX_WORKGROUP_SIZE));
75 registers.thread_max_barrier_size = kbase_reg_read(kbdev,
76 GPU_CONTROL_REG(THREAD_MAX_BARRIER_SIZE));
77 registers.thread_features = kbase_reg_read(kbdev,
78 GPU_CONTROL_REG(THREAD_FEATURES));
79 registers.thread_tls_alloc = kbase_reg_read(kbdev,
80 GPU_CONTROL_REG(THREAD_TLS_ALLOC));
81
82 registers.shader_present_lo = kbase_reg_read(kbdev,
83 GPU_CONTROL_REG(SHADER_PRESENT_LO));
84 registers.shader_present_hi = kbase_reg_read(kbdev,
85 GPU_CONTROL_REG(SHADER_PRESENT_HI));
86
87 registers.tiler_present_lo = kbase_reg_read(kbdev,
88 GPU_CONTROL_REG(TILER_PRESENT_LO));
89 registers.tiler_present_hi = kbase_reg_read(kbdev,
90 GPU_CONTROL_REG(TILER_PRESENT_HI));
91
92 registers.l2_present_lo = kbase_reg_read(kbdev,
93 GPU_CONTROL_REG(L2_PRESENT_LO));
94 registers.l2_present_hi = kbase_reg_read(kbdev,
95 GPU_CONTROL_REG(L2_PRESENT_HI));
96
97 registers.stack_present_lo = kbase_reg_read(kbdev,
98 GPU_CONTROL_REG(STACK_PRESENT_LO));
99 registers.stack_present_hi = kbase_reg_read(kbdev,
100 GPU_CONTROL_REG(STACK_PRESENT_HI));
101
102 if (registers.gpu_id >= GPU_ID2_PRODUCT_MAKE(11, 8, 5, 2)) {
103 registers.gpu_features_lo = kbase_reg_read(kbdev,
104 GPU_CONTROL_REG(GPU_FEATURES_LO));
105 registers.gpu_features_hi = kbase_reg_read(kbdev,
106 GPU_CONTROL_REG(GPU_FEATURES_HI));
107 } else {
108 registers.gpu_features_lo = 0;
109 registers.gpu_features_hi = 0;
110 }
111
112 if (!kbase_is_gpu_removed(kbdev)) {
113 *regdump = registers;
114 return 0;
115 } else
116 return -EIO;
117 }
118
kbase_backend_gpuprops_get_curr_config(struct kbase_device * kbdev,struct kbase_current_config_regdump * curr_config_regdump)119 int kbase_backend_gpuprops_get_curr_config(struct kbase_device *kbdev,
120 struct kbase_current_config_regdump *curr_config_regdump)
121 {
122 if (WARN_ON(!kbdev) || WARN_ON(!curr_config_regdump))
123 return -EINVAL;
124
125 curr_config_regdump->mem_features = kbase_reg_read(kbdev,
126 GPU_CONTROL_REG(MEM_FEATURES));
127
128 curr_config_regdump->shader_present_lo = kbase_reg_read(kbdev,
129 GPU_CONTROL_REG(SHADER_PRESENT_LO));
130 curr_config_regdump->shader_present_hi = kbase_reg_read(kbdev,
131 GPU_CONTROL_REG(SHADER_PRESENT_HI));
132
133 curr_config_regdump->l2_present_lo = kbase_reg_read(kbdev,
134 GPU_CONTROL_REG(L2_PRESENT_LO));
135 curr_config_regdump->l2_present_hi = kbase_reg_read(kbdev,
136 GPU_CONTROL_REG(L2_PRESENT_HI));
137
138 if (kbase_is_gpu_removed(kbdev))
139 return -EIO;
140
141 return 0;
142
143 }
144
kbase_backend_gpuprops_get_features(struct kbase_device * kbdev,struct kbase_gpuprops_regdump * regdump)145 int kbase_backend_gpuprops_get_features(struct kbase_device *kbdev,
146 struct kbase_gpuprops_regdump *regdump)
147 {
148 u32 coherency_features;
149 int error = 0;
150
151 /* Ensure we can access the GPU registers */
152 kbase_pm_register_access_enable(kbdev);
153
154 coherency_features = kbase_cache_get_coherency_features(kbdev);
155
156 if (kbase_is_gpu_removed(kbdev))
157 error = -EIO;
158
159 regdump->coherency_features = coherency_features;
160
161 if (kbase_hw_has_feature(kbdev, BASE_HW_FEATURE_CORE_FEATURES))
162 regdump->core_features = kbase_reg_read(kbdev, GPU_CONTROL_REG(CORE_FEATURES));
163 else
164 regdump->core_features = 0;
165
166 kbase_pm_register_access_disable(kbdev);
167
168 return error;
169 }
170
kbase_backend_gpuprops_get_l2_features(struct kbase_device * kbdev,struct kbase_gpuprops_regdump * regdump)171 int kbase_backend_gpuprops_get_l2_features(struct kbase_device *kbdev,
172 struct kbase_gpuprops_regdump *regdump)
173 {
174 if (kbase_hw_has_feature(kbdev, BASE_HW_FEATURE_L2_CONFIG)) {
175 u32 l2_features = kbase_reg_read(kbdev,
176 GPU_CONTROL_REG(L2_FEATURES));
177 u32 l2_config =
178 kbase_reg_read(kbdev, GPU_CONTROL_REG(L2_CONFIG));
179 u32 asn_hash[ASN_HASH_COUNT] = {
180 0,
181 };
182 int i;
183
184 if (kbase_hw_has_feature(kbdev, BASE_HW_FEATURE_ASN_HASH)) {
185 for (i = 0; i < ASN_HASH_COUNT; i++)
186 asn_hash[i] = kbase_reg_read(
187 kbdev, GPU_CONTROL_REG(ASN_HASH(i)));
188 }
189
190 if (kbase_is_gpu_removed(kbdev))
191 return -EIO;
192
193 regdump->l2_features = l2_features;
194 regdump->l2_config = l2_config;
195 for (i = 0; i < ASN_HASH_COUNT; i++)
196 regdump->l2_asn_hash[i] = asn_hash[i];
197 }
198
199 return 0;
200 }
201