1 /*
2 * Copyright (C) 2015 Google, Inc
3 * Written by Simon Glass <sjg@chromium.org>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8 #include <common.h>
9 #include <dm.h>
10 #include <errno.h>
11 #include <irq-generic.h>
12 #include <power/rk8xx_pmic.h>
13 #include <power/pmic.h>
14
15 DECLARE_GLOBAL_DATA_PTR;
16
17 #if CONFIG_IS_ENABLED(IRQ)
18 /* RK805 */
19 static const struct virq_reg rk805_irqs[] = {
20 [RK8XX_IRQ_PWRON_FALL] = {
21 .mask = RK805_IRQ_PWRON_FALL_MSK,
22 .reg_offset = 0,
23 },
24 [RK8XX_IRQ_PWRON_RISE] = {
25 .mask = RK805_IRQ_PWRON_RISE_MSK,
26 .reg_offset = 0,
27 },
28 [RK8XX_IRQ_RTC_ALARM] = {
29 .mask = RK805_IRQ_RTC_ALARM_MSK,
30 .reg_offset = 0,
31 },
32 };
33
34 static struct virq_chip rk805_irq_chip = {
35 .status_base = RK805_INT_STS_REG,
36 .mask_base = RK805_INT_MSK_REG,
37 .num_regs = 1,
38 .read = pmic_reg_read,
39 .write = pmic_reg_write,
40 .irqs = rk805_irqs,
41 .num_irqs = ARRAY_SIZE(rk805_irqs),
42 };
43
44 /* RK806 */
45 static const struct virq_reg rk806_irqs[] = {
46 [RK8XX_IRQ_PWRON_FALL] = {
47 .mask = RK806_IRQ_PWRON_FALL_MSK,
48 .reg_offset = 0,
49 },
50 [RK8XX_IRQ_PWRON_RISE] = {
51 .mask = RK806_IRQ_PWRON_RISE_MSK,
52 .reg_offset = 0,
53 },
54 };
55
56 static struct virq_chip rk806_irq_chip = {
57 .status_base = RK806_INT_STS0,
58 .mask_base = RK806_INT_MSK0,
59 .irq_reg_stride = 2,
60 .num_regs = 2,
61 .read = pmic_reg_read,
62 .write = pmic_reg_write,
63 .irqs = rk806_irqs,
64 .num_irqs = ARRAY_SIZE(rk806_irqs),
65 };
66
67 /* RK808 */
68 static const struct virq_reg rk808_irqs[] = {
69 [RK8XX_IRQ_PLUG_OUT] = {
70 .mask = RK808_IRQ_PLUG_OUT_MSK,
71 .reg_offset = 1,
72 },
73 [RK8XX_IRQ_RTC_ALARM] = {
74 .mask = RK808_IRQ_RTC_ALARM_MSK,
75 .reg_offset = 0,
76 },
77 };
78
79 static struct virq_chip rk808_irq_chip = {
80 .status_base = RK808_INT_STS_REG1,
81 .mask_base = RK808_INT_MSK_REG1,
82 .irq_reg_stride = 2,
83 .num_regs = 2,
84 .read = pmic_reg_read,
85 .write = pmic_reg_write,
86 .irqs = rk808_irqs,
87 .num_irqs = ARRAY_SIZE(rk808_irqs),
88 };
89
90 /* RK816 */
91 static const struct virq_reg rk816_irqs[] = {
92 [RK8XX_IRQ_PWRON_FALL] = {
93 .mask = RK816_IRQ_PWRON_FALL_MSK,
94 .reg_offset = 0,
95 },
96 [RK8XX_IRQ_PWRON_RISE] = {
97 .mask = RK816_IRQ_PWRON_RISE_MSK,
98 .reg_offset = 0,
99 },
100 [RK8XX_IRQ_PLUG_OUT] = {
101 .mask = RK816_IRQ_PLUG_OUT_MSK,
102 .reg_offset = 2,
103 },
104 [RK8XX_IRQ_CHG_OK] = {
105 .mask = RK816_IRQ_CHR_OK_MSK,
106 .reg_offset = 2,
107 },
108 [RK8XX_IRQ_RTC_ALARM] = {
109 .mask = RK816_IRQ_RTC_ALARM_MSK,
110 .reg_offset = 1,
111 },
112 };
113
114 static struct virq_chip rk816_irq_chip = {
115 .status_base = RK816_INT_STS_REG1,
116 .mask_base = RK816_INT_MSK_REG1,
117 .irq_unalign_reg_idx = 1, /* idx <= 1, stride = 3 */
118 .irq_unalign_reg_stride = 3,
119 .irq_reg_stride = 2, /* idx > 1, stride = 2 */
120 .num_regs = 3,
121 .read = pmic_reg_read,
122 .write = pmic_reg_write,
123 .irqs = rk816_irqs,
124 .num_irqs = ARRAY_SIZE(rk816_irqs),
125 };
126
127 /* RK818 */
128 static const struct virq_reg rk818_irqs[] = {
129 [RK8XX_IRQ_PLUG_OUT] = {
130 .mask = RK818_IRQ_PLUG_OUT_MSK,
131 .reg_offset = 1,
132 },
133 [RK8XX_IRQ_CHG_OK] = {
134 .mask = RK818_IRQ_CHR_OK_MSK,
135 .reg_offset = 1,
136 },
137 [RK8XX_IRQ_RTC_ALARM] = {
138 .mask = RK818_IRQ_RTC_ALARM_MSK,
139 .reg_offset = 0,
140 },
141 };
142
143 static struct virq_chip rk818_irq_chip = {
144 .status_base = RK818_INT_STS_REG1,
145 .mask_base = RK818_INT_MSK_REG1,
146 .irq_reg_stride = 2,
147 .num_regs = 2,
148 .read = pmic_reg_read,
149 .write = pmic_reg_write,
150 .irqs = rk818_irqs,
151 .num_irqs = ARRAY_SIZE(rk818_irqs),
152 };
153
154 /* RK817/RK809 */
155 static const struct virq_reg rk817_irqs[] = {
156 [RK8XX_IRQ_PWRON_FALL] = {
157 .mask = RK817_IRQ_PWRON_FALL_MSK,
158 .reg_offset = 0,
159 },
160 [RK8XX_IRQ_PWRON_RISE] = {
161 .mask = RK817_IRQ_PWRON_RISE_MSK,
162 .reg_offset = 0,
163 },
164 [RK8XX_IRQ_PLUG_OUT] = {
165 .mask = RK817_IRQ_PLUG_OUT_MSK,
166 .reg_offset = 1,
167 },
168 [RK8XX_IRQ_PLUG_IN] = {
169 .mask = RK817_IRQ_PLUG_IN_MSK,
170 .reg_offset = 1,
171 },
172 [RK8XX_IRQ_RTC_ALARM] = {
173 .mask = RK817_IRQ_RTC_ALARM_MSK,
174 .reg_offset = 0,
175 },
176 };
177
178 static struct virq_chip rk817_irq_chip = {
179 .status_base = RK817_INT_STS_REG0,
180 .mask_base = RK817_INT_MSK_REG0,
181 .irq_reg_stride = 2,
182 .num_regs = 3,
183 .read = pmic_reg_read,
184 .write = pmic_reg_write,
185 .irqs = rk817_irqs,
186 .num_irqs = ARRAY_SIZE(rk817_irqs),
187 };
188 #endif
189
190 static struct reg_data rk817_init_reg[] = {
191 /* enable the under-voltage protection,
192 * the under-voltage protection will shutdown the LDO3 and reset the PMIC
193 */
194 { RK817_BUCK4_CMIN, 0x6e, 0x6e},
195 { RK817_PMIC_SYS_CFG1, 0x20, 0x70},
196 /* Set pmic_sleep as none function */
197 { RK817_PMIC_SYS_CFG3, 0x00, 0x18 },
198 /* GATE pin function: gate function */
199 { RK817_GPIO_INT_CFG, 0x00, 0x20 },
200 #if CONFIG_IS_ENABLED(IRQ)
201 /* Set pmic_int active low */
202 { RK817_GPIO_INT_CFG, 0x00, 0x02 },
203 #endif
204 };
205
206 static struct reg_data rk818_init_current[] = {
207 { REG_USB_CTRL, 0x07, 0x0f}, /* 2A */
208 };
209
210 /*
211 * Order WARNING: Must put "LDO" after the "NLDO" and "PLDO" !
212 *
213 * See: pmic_bind_children()
214 * if (!strstr(node_name, info->prefix)) {
215 * ......
216 * }
217 *
218 * Without this order, the prefix "LDO" will be matched if a regulator
219 * dts node name contains "NLDO" or "PLDO".
220 */
221 static const struct pmic_child_info pmic_children_info[] = {
222 { .prefix = "DCDC", .driver = "rk8xx_buck"},
223 { .prefix = "NLDO", .driver = "rk8xx_ldo"},
224 { .prefix = "PLDO", .driver = "rk8xx_pldo"},
225 { .prefix = "LDO", .driver = "rk8xx_ldo"},
226 { .prefix = "SWITCH", .driver = "rk8xx_switch"},
227 { .prefix = "BOOST", .driver = "rk8xx_boost"},
228
229 { },
230 };
231
232 static const struct pmic_child_info power_key_info[] = {
233 { .prefix = "pwrkey", .driver = "rk8xx_pwrkey"},
234 { },
235 };
236
237 static const struct pmic_child_info rtc_info[] = {
238 { .prefix = "rtc", .driver = "rk8xx_rtc"},
239 { },
240 };
241
242 static const struct pmic_child_info fuel_gauge_info[] = {
243 { .addr = "1c", .prefix = "battery", .driver = "rk818_fg"},
244 { .addr = "20", .prefix = "battery", .driver = "rk817_fg"},
245 { .addr = "1a", .prefix = "battery", .driver = "rk816_fg"},
246 { },
247 };
248
249 static const struct pmic_child_info rk817_codec_info[] = {
250 { .prefix = "codec", .driver = "rk817_codec"},
251 { },
252 };
253
rk8xx_reg_count(struct udevice * dev)254 static int rk8xx_reg_count(struct udevice *dev)
255 {
256 struct rk8xx_priv *priv = dev_get_priv(dev);
257
258 switch (priv->variant) {
259 case RK809_ID:
260 case RK817_ID:
261 return RK817_NUM_OF_REGS;
262 default:
263 return RK808_NUM_OF_REGS;
264 }
265 }
266
rk8xx_write(struct udevice * dev,uint reg,const uint8_t * buff,int len)267 static int rk8xx_write(struct udevice *dev, uint reg, const uint8_t *buff,
268 int len)
269 {
270 int ret;
271
272 ret = dm_i2c_write(dev, reg, buff, len);
273 if (ret) {
274 printf("%s: write reg 0x%02x failed, ret=%d\n", __func__, reg, ret);
275 return ret;
276 }
277
278 return 0;
279 }
280
rk8xx_read(struct udevice * dev,uint reg,uint8_t * buff,int len)281 static int rk8xx_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
282 {
283 int ret;
284
285 ret = dm_i2c_read(dev, reg, buff, len);
286 if (ret) {
287 printf("%s: read reg 0x%02x failed, ret=%d\n", __func__, reg, ret);
288 return ret;
289 }
290
291 return 0;
292 }
293
rk806_shutdown_seq(struct udevice * dev)294 static void rk806_shutdown_seq(struct udevice *dev)
295 {
296 struct rk8xx_priv *rk8xx = dev_get_priv(dev);
297 uint8_t value;
298 int i;
299
300 if (!rk8xx->shutdown_sequence)
301 return;
302
303 for (i = RK806_ID_DCDC1; i <= RK806_ID_DCDC10; i++) {
304 value = rk8xx->shutdown_sequence[RK806_ID_DCDC1 + i];
305 rk8xx_write(dev, RK806_SHUTDOWN_SEQ_REG0 + i, &value, 1);
306 }
307
308 for (i = RK806_ID_NLDO1; i <= RK806_ID_NLDO5; i++) {
309 value = rk8xx->shutdown_sequence[RK806_ID_NLDO1 + i];
310 rk8xx_write(dev, RK806_SHUTDOWN_SEQ_REG0 + i, &value, 1);
311 }
312
313 rk8xx_read(dev, RK806_SHUTDOWN_SEQ_REG8, &value, 1);
314 value |= rk8xx->shutdown_sequence[RK806_ID_PLDO1] << 6;
315 rk8xx_write(dev, RK806_SHUTDOWN_SEQ_REG8, &value, 1);
316
317 rk8xx_read(dev, RK806_SHUTDOWN_SEQ_REG11, &value, 1);
318 value |= rk8xx->shutdown_sequence[RK806_ID_PLDO2] << 6;
319 rk8xx_write(dev, RK806_SHUTDOWN_SEQ_REG11, &value, 1);
320
321 rk8xx_read(dev, RK806_SHUTDOWN_SEQ_REG14, &value, 1);
322 value |= rk8xx->shutdown_sequence[RK806_ID_PLDO3] << 6;
323 rk8xx_write(dev, RK806_SHUTDOWN_SEQ_REG14, &value, 1);
324
325 rk8xx_read(dev, RK806_SHUTDOWN_SEQ_REG15, &value, 1);
326 value |= rk8xx->shutdown_sequence[RK806_ID_PLDO4];
327 rk8xx_write(dev, RK806_SHUTDOWN_SEQ_REG15, &value, 1);
328
329 rk8xx_read(dev, RK806_SHUTDOWN_SEQ_REG16, &value, 1);
330 value |= rk8xx->shutdown_sequence[RK806_ID_PLDO5];
331 rk8xx_write(dev, RK806_SHUTDOWN_SEQ_REG16, &value, 1);
332
333 rk8xx_read(dev, RK806_SHUTDOWN_SEQ_REG5, &value, 1);
334 value |= rk8xx->shutdown_sequence[RK806_ID_PLDO6] << 6;
335 rk8xx_write(dev, RK806_SHUTDOWN_SEQ_REG5, &value, 1);
336 }
337
rk806_vb_shutdown_seq(struct udevice * dev)338 static void rk806_vb_shutdown_seq(struct udevice *dev)
339 {
340 struct rk8xx_priv *rk8xx = dev_get_priv(dev);
341 uint8_t value;
342 int i;
343
344 if (!rk8xx->vb_shutdown_sequence)
345 return;
346
347 for (i = RK806_ID_DCDC1; i <= RK806_ID_DCDC10; i++) {
348 value = rk8xx->vb_shutdown_sequence[RK806_ID_DCDC1 + i];
349 rk8xx_write(dev, RK806_SHUTDOWN_SEQ_REG0 + i, &value, 1);
350 }
351
352 for (i = RK806_ID_NLDO1; i <= RK806_ID_NLDO5; i++) {
353 value = rk8xx->vb_shutdown_sequence[i];
354 rk8xx_write(dev, RK806_SHUTDOWN_SEQ_REG0 + i, &value, 1);
355 }
356
357 rk8xx_read(dev, RK806_SHUTDOWN_SEQ_REG8, &value, 1);
358 value |= rk8xx->vb_shutdown_sequence[RK806_ID_PLDO1] << 6;
359 rk8xx_write(dev, RK806_SHUTDOWN_SEQ_REG8, &value, 1);
360
361 rk8xx_read(dev, RK806_SHUTDOWN_SEQ_REG11, &value, 1);
362 value |= rk8xx->vb_shutdown_sequence[RK806_ID_PLDO2] << 6;
363 rk8xx_write(dev, RK806_SHUTDOWN_SEQ_REG11, &value, 1);
364
365 rk8xx_read(dev, RK806_SHUTDOWN_SEQ_REG14, &value, 1);
366 value |= rk8xx->vb_shutdown_sequence[RK806_ID_PLDO3] << 6;
367 rk8xx_write(dev, RK806_SHUTDOWN_SEQ_REG14, &value, 1);
368
369 rk8xx_read(dev, RK806_SHUTDOWN_SEQ_REG15, &value, 1);
370 value |= rk8xx->vb_shutdown_sequence[RK806_ID_PLDO4];
371 rk8xx_write(dev, RK806_SHUTDOWN_SEQ_REG15, &value, 1);
372
373 rk8xx_read(dev, RK806_SHUTDOWN_SEQ_REG16, &value, 1);
374 value |= rk8xx->vb_shutdown_sequence[RK806_ID_PLDO5];
375 rk8xx_write(dev, RK806_SHUTDOWN_SEQ_REG16, &value, 1);
376
377 rk8xx_read(dev, RK806_SHUTDOWN_SEQ_REG5, &value, 1);
378 value |= rk8xx->vb_shutdown_sequence[RK806_ID_PLDO6] << 6;
379 rk8xx_write(dev, RK806_SHUTDOWN_SEQ_REG5, &value, 1);
380 }
381
rk8xx_suspend(struct udevice * dev)382 static int rk8xx_suspend(struct udevice *dev)
383 {
384 struct rk8xx_priv *priv = dev_get_priv(dev);
385 int ret = 0;
386 u8 i, val;
387
388 switch (priv->variant) {
389 case RK806_ID:
390 ret = rk8xx_read(dev, RK806_PWRCTRL_CONFIG0, &val, 1);
391 if (ret)
392 return ret;
393 val &= RK806_PWRCTRL_FUN_MSK;
394 ret = rk8xx_write(dev, RK806_PWRCTRL_CONFIG0, &val, 1);
395 if (ret)
396 return ret;
397
398 ret = rk8xx_read(dev, RK806_PWRCTRL_CONFIG1, &val, 1);
399 if (ret)
400 return ret;
401
402 val &= RK806_PWRCTRL_FUN_MSK;
403 ret = rk8xx_write(dev, RK806_PWRCTRL_CONFIG1, &val, 1);
404 if (ret)
405 return ret;
406
407 for (i = RK806_VSEL_CTR_SEL0; i <= RK806_DVS_CTR_SEL4; i++) {
408 ret = rk8xx_read(dev, i, &val, 1);
409 if (ret)
410 return ret;
411 val &= RK806_VSEL_CTRL_MSK;
412 ret = rk8xx_write(dev, i, &val, 1);
413 if (ret)
414 return ret;
415 }
416
417 ret = rk8xx_read(dev, RK806_PWRCTRL_CONFIG0, &val, 1);
418 if (ret)
419 return ret;
420 val &= RK806_PWRCTRL_FUN_MSK;
421 val |= RK806_ENABLE_PWRCTRL;
422 ret = rk8xx_write(dev, RK806_PWRCTRL_CONFIG0, &val, 1);
423 if (ret)
424 return ret;
425
426 for (i = RK806_VSEL_CTR_SEL0; i <= RK806_DVS_CTR_SEL4; i++) {
427 ret = rk8xx_read(dev, i, &val, 1);
428 if (ret)
429 return ret;
430 val &= RK806_VSEL_CTRL_MSK;
431 val |= RK806_VSEL_PWRCTRL1;
432 ret = rk8xx_write(dev, i, &val, 1);
433 if (ret)
434 return ret;
435 }
436 break;
437 case RK809_ID:
438 case RK817_ID:
439 /* pmic_sleep active high */
440 ret = rk8xx_read(dev, RK817_PMIC_SYS_CFG3, &val, 1);
441 if (ret)
442 return ret;
443 priv->sleep_pin = val;
444 val &= ~0x38;
445 val |= 0x28;
446 ret = rk8xx_write(dev, RK817_PMIC_SYS_CFG3, &val, 1);
447 break;
448 default:
449 return 0;
450 }
451
452 return ret;
453 }
454
rk8xx_resume(struct udevice * dev)455 static int rk8xx_resume(struct udevice *dev)
456 {
457 struct rk8xx_priv *priv = dev_get_priv(dev);
458 int ret = 0;
459 u8 i, val;
460
461 switch (priv->variant) {
462 case RK806_ID:
463 for (i = RK806_VSEL_CTR_SEL0; i <= RK806_DVS_CTR_SEL4; i++) {
464 ret = rk8xx_read(dev, i, &val, 1);
465 if (ret)
466 return ret;
467 val &= RK806_VSEL_CTRL_MSK;
468 ret = rk8xx_write(dev, i, &val, 1);
469 if (ret)
470 return ret;
471 }
472
473 ret = rk8xx_read(dev, RK806_PWRCTRL_CONFIG0, &val, 1);
474 if (ret)
475 return ret;
476 val &= RK806_PWRCTRL_FUN_MSK;
477 ret = rk8xx_write(dev, RK806_PWRCTRL_CONFIG0, &val, 1);
478 if (ret)
479 return ret;
480
481 ret = rk8xx_read(dev, RK806_PWRCTRL_CONFIG1, &val, 1);
482 if (ret)
483 return ret;
484 val &= RK806_PWRCTRL_FUN_MSK;
485 ret = rk8xx_write(dev, RK806_PWRCTRL_CONFIG1, &val, 1);
486 break;
487 case RK809_ID:
488 case RK817_ID:
489 ret = rk8xx_write(dev, RK817_PMIC_SYS_CFG3, &priv->sleep_pin, 1);
490 break;
491 default:
492 return 0;
493 }
494
495 return ret;
496 }
497
rk8xx_shutdown(struct udevice * dev)498 static int rk8xx_shutdown(struct udevice *dev)
499 {
500 struct rk8xx_priv *priv = dev_get_priv(dev);
501 u8 val, dev_off, devctrl_reg;
502 int ret = 0;
503
504 switch (priv->variant) {
505 case RK806_ID:
506 rk806_shutdown_seq(dev);
507 devctrl_reg = RK806_SYS_CFG3;
508 dev_off = RK806_DEV_OFF;
509 break;
510 case RK808_ID:
511 devctrl_reg = REG_DEVCTRL;
512 dev_off = BIT(3);
513 break;
514 case RK805_ID:
515 case RK816_ID:
516 case RK818_ID:
517 devctrl_reg = REG_DEVCTRL;
518 dev_off = BIT(0);
519 break;
520 case RK809_ID:
521 case RK817_ID:
522 devctrl_reg = RK817_REG_SYS_CFG3;
523 dev_off = BIT(0);
524 break;
525 default:
526 printf("Unknown PMIC: RK%x\n", priv->variant);
527 return -EINVAL;
528 }
529
530 ret = rk8xx_read(dev, devctrl_reg, &val, 1);
531 if (ret)
532 return ret;
533
534 val |= dev_off;
535 ret = rk8xx_write(dev, devctrl_reg, &val, 1);
536 if (ret)
537 return ret;
538
539 return 0;
540 }
541
542 #if CONFIG_IS_ENABLED(PMIC_CHILDREN)
rk8xx_bind(struct udevice * dev)543 static int rk8xx_bind(struct udevice *dev)
544 {
545 ofnode regulators_node;
546 int children;
547
548 regulators_node = dev_read_subnode(dev, "regulators");
549 if (!ofnode_valid(regulators_node)) {
550 debug("%s: %s regulators subnode not found!\n", __func__,
551 dev->name);
552 return -ENXIO;
553 }
554
555 debug("%s: '%s' - found regulators subnode\n", __func__, dev->name);
556
557 children = pmic_bind_children(dev, regulators_node, pmic_children_info);
558 if (!children)
559 debug("%s: %s - no child found\n", __func__, dev->name);
560
561 children = pmic_bind_children(dev, dev->node, power_key_info);
562 if (!children)
563 debug("%s: %s - no child found\n", __func__, dev->name);
564
565 children = pmic_bind_children(dev, dev->node, rtc_info);
566 if (!children)
567 debug("%s: %s - no child found\n", __func__, dev->name);
568
569 children = pmic_bind_children(dev, dev->node, fuel_gauge_info);
570 if (!children)
571 debug("%s: %s - no child found\n", __func__, dev->name);
572
573 children = pmic_bind_children(dev, dev->node, rk817_codec_info);
574 if (!children)
575 debug("%s: %s - no child found\n", __func__, dev->name);
576
577 /* Always return success for this device */
578 return 0;
579 }
580 #endif
581
582 #if CONFIG_IS_ENABLED(IRQ)
583 /*
584 * When system suspend during U-Boot charge, make sure the plugout event
585 * be able to wakeup cpu in wfi/wfe state.
586 */
587 #ifdef CONFIG_DM_CHARGE_DISPLAY
rk8xx_plug_out_handler(int irq,void * data)588 static void rk8xx_plug_out_handler(int irq, void *data)
589 {
590 printf("Plug out interrupt\n");
591 }
592 #endif
593
rk8xx_irq_chip_init(struct udevice * dev)594 static int rk8xx_irq_chip_init(struct udevice *dev)
595 {
596 struct rk8xx_priv *priv = dev_get_priv(dev);
597 struct virq_chip *irq_chip = NULL;
598 __maybe_unused int irq_plugout = 1;
599 uint8_t value;
600 int ret;
601
602 switch (priv->variant) {
603 case RK806_ID:
604 irq_chip = &rk806_irq_chip;
605 irq_plugout = 0;
606 ret = rk8xx_read(dev, RK806_GPIO_INT_CONFIG, &value, 1);
607 if (ret)
608 return ret;
609 /* set INT polarity active low */
610 value &= (~RK806_INT_POL_HIGH);
611 ret = rk8xx_write(dev, RK806_GPIO_INT_CONFIG, &value, 1);
612 if (ret)
613 return ret;
614 break;
615 case RK808_ID:
616 irq_chip = &rk808_irq_chip;
617 break;
618 case RK805_ID:
619 irq_chip = &rk805_irq_chip;
620 irq_plugout = 0;
621 break;
622 case RK816_ID:
623 irq_chip = &rk816_irq_chip;
624 break;
625 case RK818_ID:
626 irq_chip = &rk818_irq_chip;
627 break;
628 case RK809_ID:
629 case RK817_ID:
630 irq_chip = &rk817_irq_chip;
631 break;
632 default:
633 return -EINVAL;
634 }
635
636 if (irq_chip) {
637 ret = virq_add_chip(dev, irq_chip, priv->irq);
638 if (ret) {
639 printf("Failed to add irqchip(irq=%d), ret=%d\n",
640 priv->irq, ret);
641 return ret;
642 }
643
644 priv->irq_chip = irq_chip;
645
646 #ifdef CONFIG_DM_CHARGE_DISPLAY
647 int irq;
648
649 if (irq_plugout) {
650 irq = virq_to_irq(irq_chip, RK8XX_IRQ_PLUG_OUT);
651 if (irq < 0) {
652 printf("Failed to register plugout irq, ret=%d\n", irq);
653 return irq;
654 }
655 irq_install_handler(irq, rk8xx_plug_out_handler, dev);
656 irq_handler_enable_suspend_only(irq);
657 }
658 #endif
659 }
660
661 return 0;
662 }
663 #else
rk8xx_irq_chip_init(struct udevice * dev)664 static inline int rk8xx_irq_chip_init(struct udevice *dev) { return 0; }
665 #endif
666
rk8xx_ofdata_to_platdata(struct udevice * dev)667 static int rk8xx_ofdata_to_platdata(struct udevice *dev)
668 {
669 struct rk8xx_priv *rk8xx = dev_get_priv(dev);
670 u32 interrupt, phandle, val;
671 int ret, len;
672
673 phandle = dev_read_u32_default(dev, "interrupt-parent", -ENODATA);
674 if (phandle == -ENODATA) {
675 printf("Read 'interrupt-parent' failed, ret=%d\n", phandle);
676 return phandle;
677 }
678
679 ret = dev_read_u32_array(dev, "interrupts", &interrupt, 1);
680 if (ret) {
681 printf("Read 'interrupts' failed, ret=%d\n", ret);
682 return ret;
683 }
684
685 #if CONFIG_IS_ENABLED(IRQ)
686 rk8xx->irq = phandle_gpio_to_irq(phandle, interrupt);
687 if (rk8xx->irq < 0) {
688 printf("Failed to request rk8xx irq, ret=%d\n", rk8xx->irq);
689 return rk8xx->irq;
690 }
691 #endif
692 val = dev_read_u32_default(dev, "long-press-off-time-sec", 0);
693 if (val <= 6)
694 rk8xx->lp_off_time = RK8XX_LP_TIME_6S;
695 else if (val <= 8)
696 rk8xx->lp_off_time = RK8XX_LP_TIME_8S;
697 else if (val <= 10)
698 rk8xx->lp_off_time = RK8XX_LP_TIME_10S;
699 else
700 rk8xx->lp_off_time = RK8XX_LP_TIME_12S;
701
702 val = dev_read_u32_default(dev, "long-press-restart", 0);
703 if (val)
704 rk8xx->lp_action = RK8XX_LP_RESTART;
705 else
706 rk8xx->lp_action = RK8XX_LP_OFF;
707
708 rk8xx->not_save_power_en = dev_read_u32_default(dev, "not-save-power-en", 0);
709 rk8xx->sys_can_sd = dev_read_bool(dev, "vsys-off-shutdown");
710 rk8xx->rst_fun = dev_read_u32_default(dev, "pmic-reset-func", 0);
711 /* buck5 external feedback resister disable */
712 rk8xx->buck5_feedback_dis = dev_read_bool(dev, "buck5-feedback-disable");
713
714 rk8xx->pwr_ctr[0] = dev_read_u32_default(dev, "pwrctrl1_output", -1);
715 rk8xx->pwr_ctr[1] = dev_read_u32_default(dev, "pwrctrl2_output", -1);
716 rk8xx->pwr_ctr[2] = dev_read_u32_default(dev, "pwrctrl3_output", -1);
717
718 if (!dev_read_prop(dev, "shutdown-sequence", &len)) {
719 printf("can't find shutdown-sequence prop\n");
720 } else {
721 if (len / 4 != RK806_ID_END)
722 return 0;
723 rk8xx->shutdown_sequence = calloc(len, 1);
724 if (!rk8xx->shutdown_sequence) {
725 printf("can't calloc shutdown_sequence\n");
726 return 0;
727 }
728
729 if (dev_read_u32_array(dev, "shutdown-sequence",
730 rk8xx->shutdown_sequence,
731 RK806_ID_END)) {
732 printf("can't read shutdown_sequence\n");
733 free(rk8xx->shutdown_sequence);
734 return 0;
735 }
736 }
737
738 if (!dev_read_prop(dev, "vb-shutdown-sequence", &len)) {
739 printf("can't find vb-shutdown-sequence prop\n");
740 } else {
741 if (len / 4 != RK806_ID_END)
742 return 0;
743 rk8xx->vb_shutdown_sequence = calloc(len, 1);
744 if (!rk8xx->vb_shutdown_sequence) {
745 printf("can't calloc vb_shutdown_sequence\n");
746 return 0;
747 }
748
749 if (dev_read_u32_array(dev, "vb-shutdown-sequence",
750 rk8xx->vb_shutdown_sequence,
751 RK806_ID_END)) {
752 printf("can't read vb-shutdown-sequence\n");
753 free(rk8xx->vb_shutdown_sequence);
754 return 0;
755 }
756 }
757
758 return 0;
759 }
760
rk806_pwrctrl_output_value(struct udevice * dev,int pin,int output_value)761 static void rk806_pwrctrl_output_value(struct udevice *dev,
762 int pin,
763 int output_value)
764 {
765 u8 value;
766
767 rk8xx_read(dev, RK806_PWRCTRL_CONFIG0 + pin / 3, &value, 1);
768 if ((pin == RK806_PWRCTRL1) || (pin == RK806_PWRCTRL3)) {
769 value &= ~RK806_PWRCTR_MSK_FUN;
770 value |= RK806_PWRCTR_GPIO_FUN;
771 } else {
772 value &= ~(RK806_PWRCTR_MSK_FUN << 4);
773 value |= RK806_PWRCTR_GPIO_FUN << 4;
774 }
775 rk8xx_write(dev, RK806_PWRCTRL_CONFIG0 + pin / 3, &value, 1);
776
777 rk8xx_read(dev, RK806_PWRCTRL_GPIO, &value, 1);
778 value &= ~(RK806_PWRCTR_OUTPUT_MSK << (pin - 1));
779 if (output_value)
780 value |= (RK806_PWRCTR_OUTPUT1 << (pin - 1));
781 else
782 value |= (RK806_PWRCTR_OUTPUT0 << (pin - 1));
783 rk8xx_write(dev, RK806_PWRCTRL_GPIO, &value, 1);
784 }
785
rk8xx_probe(struct udevice * dev)786 static int rk8xx_probe(struct udevice *dev)
787 {
788 struct rk8xx_priv *priv = dev_get_priv(dev);
789 struct reg_data *init_current = NULL;
790 struct reg_data *init_data = NULL;
791 int init_current_num = 0;
792 int init_data_num = 0;
793 int ret = 0, i, show_variant;
794 uint8_t msb, lsb, id_msb, id_lsb;
795 uint8_t on_source = 0, off_source = 0;
796 uint8_t pwron_key = 0, lp_off_msk = 0, lp_act_msk = 0;
797 uint8_t power_en0, power_en1, power_en2, power_en3;
798 uint8_t on, off;
799 uint8_t value;
800
801 /* read Chip variant */
802 if (device_is_compatible(dev, "rockchip,rk817") ||
803 device_is_compatible(dev, "rockchip,rk809")) {
804 id_msb = RK817_ID_MSB;
805 id_lsb = RK817_ID_LSB;
806 } else if (device_is_compatible(dev, "rockchip,rk806")) {
807 id_msb = RK806_CHIP_NAME;
808 id_lsb = RK806_CHIP_VER;
809 } else {
810 id_msb = ID_MSB;
811 id_lsb = ID_LSB;
812 }
813
814 ret = rk8xx_read(dev, id_msb, &msb, 1);
815 if (ret)
816 return ret;
817 ret = rk8xx_read(dev, id_lsb, &lsb, 1);
818 if (ret)
819 return ret;
820
821 priv->variant = ((msb << 8) | lsb) & RK8XX_ID_MSK;
822 show_variant = priv->variant;
823 switch (priv->variant) {
824 case RK806_ID:
825 on_source = RK806_ON_SOURCE;
826 off_source = RK806_OFF_SOURCE;
827 ret = rk8xx_read(dev, RK806_HW_VER, &value, 1);
828 if (ret)
829 panic("RK806: read RK806_HW_VER error!\n");
830
831 if ((lsb & RK806_VERSION_MSK) == RK806_VERSION_AB) {
832 ret = rk8xx_read(dev, RK806_SYS_CFG1, &value, 1);
833 if (ret) {
834 dev_err(dev, "rk806 RK806_SYS_CFG1 read error: %d\n", ret);
835 return ret;
836 }
837 value |= RK806_ABNORDET_EN;
838 rk8xx_write(dev, RK806_SYS_CFG1, &value, 1);
839 }
840
841 for (i = 0; i < 3; i++)
842 if (priv->pwr_ctr[i] >= 0 && priv->pwr_ctr[i] <= 1)
843 rk806_pwrctrl_output_value(dev,
844 i + 1,
845 priv->pwr_ctr[i]);
846
847 if (priv->rst_fun) {
848 rk8xx_read(dev, RK806_SYS_CFG3, &value, 1);
849 value &= RK806_RESET_FUN_CLR;
850 if (priv->rst_fun == RK806_RST_MODE1) {
851 value |= (RK806_RST_MODE1 << 6);
852 rk8xx_write(dev, RK806_SYS_CFG3, &value, 1);
853 } else if (priv->rst_fun == RK806_RST_MODE2) {
854 value |= (RK806_RST_MODE2 << 6);
855 rk8xx_write(dev, RK806_SYS_CFG3, &value, 1);
856 }
857 }
858
859 if (priv->buck5_feedback_dis) {
860 rk8xx_read(dev, RK806_BUCK_RSERVE_REG3, &value, 1);
861 value &= (~RK806_BUCK5_EX_RES_EN);
862 rk8xx_write(dev, RK806_BUCK_RSERVE_REG3, &value, 1);
863 }
864 rk806_vb_shutdown_seq(dev);
865 break;
866 case RK808_ID:
867 show_variant = 0x808; /* RK808 hardware ID is 0 */
868 pwron_key = RK8XX_DEVCTRL_REG;
869 lp_off_msk = RK8XX_LP_OFF_MSK;
870 break;
871 case RK805_ID:
872 case RK816_ID:
873 on_source = RK8XX_ON_SOURCE;
874 off_source = RK8XX_OFF_SOURCE;
875 pwron_key = RK8XX_DEVCTRL_REG;
876 lp_off_msk = RK8XX_LP_OFF_MSK;
877 lp_act_msk = RK8XX_LP_ACTION_MSK;
878 break;
879 case RK818_ID:
880 on_source = RK8XX_ON_SOURCE;
881 off_source = RK8XX_OFF_SOURCE;
882 pwron_key = RK8XX_DEVCTRL_REG;
883 lp_off_msk = RK8XX_LP_OFF_MSK;
884 lp_act_msk = RK8XX_LP_ACTION_MSK;
885 /* set current if no fuel gauge */
886 if (!ofnode_valid(dev_read_subnode(dev, "battery"))) {
887 init_current = rk818_init_current;
888 init_current_num = ARRAY_SIZE(rk818_init_current);
889 }
890 break;
891 case RK809_ID:
892 case RK817_ID:
893 if (device_is_compatible(dev, "rockchip,rk809") && (priv->variant != RK809_ID)) {
894 dev_err(dev, "the dts is RK809, the hardware is RK817\n");
895 run_command("download", 0);
896 }
897
898 if (device_is_compatible(dev, "rockchip,rk817") && (priv->variant != RK817_ID)) {
899 dev_err(dev, "the dts is RK817, the hardware is RK809\n");
900 run_command("download", 0);
901 }
902
903 on_source = RK817_ON_SOURCE;
904 off_source = RK817_OFF_SOURCE;
905 pwron_key = RK817_PWRON_KEY;
906 lp_off_msk = RK8XX_LP_OFF_MSK;
907 lp_act_msk = RK8XX_LP_ACTION_MSK;
908 init_data = rk817_init_reg;
909 init_data_num = ARRAY_SIZE(rk817_init_reg);
910
911 /* whether the system voltage can be shutdown in PWR_off mode */
912 if (priv->sys_can_sd) {
913 ret = rk8xx_read(dev, RK817_PMIC_CHRG_TERM, &value, 1);
914 if (ret)
915 return ret;
916 value |= 0x80;
917 ret = rk8xx_write(dev, RK817_PMIC_CHRG_TERM, &value, 1);
918 if (ret)
919 return ret;
920 } else {
921 ret = rk8xx_read(dev, RK817_PMIC_CHRG_TERM, &value, 1);
922 if (ret)
923 return ret;
924 value &= 0x7f;
925 ret = rk8xx_write(dev, RK817_PMIC_CHRG_TERM, &value, 1);
926 if (ret)
927 return ret;
928 }
929
930 if ((priv->rst_fun > RK8xx_RST_MODE0) &&
931 (priv->rst_fun <= RK8xx_RST_MODE2)) {
932 rk8xx_read(dev, RK817_PMIC_SYS_CFG3, &value, 1);
933 value &= RK8xx_RESET_FUN_CLR;
934 value |= (priv->rst_fun << 6);
935 rk8xx_write(dev, RK817_PMIC_SYS_CFG3, &value, 1);
936 }
937 /* judge whether save the PMIC_POWER_EN register */
938 if (!priv->not_save_power_en) {
939 ret = rk8xx_read(dev, RK817_POWER_EN0, &power_en0, 1);
940 if (ret)
941 return ret;
942 ret = rk8xx_read(dev, RK817_POWER_EN1, &power_en1, 1);
943 if (ret)
944 return ret;
945 ret = rk8xx_read(dev, RK817_POWER_EN2, &power_en2, 1);
946 if (ret)
947 return ret;
948 ret = rk8xx_read(dev, RK817_POWER_EN3, &power_en3, 1);
949 if (ret)
950 return ret;
951
952 value = (power_en0 & 0x0f) | ((power_en1 & 0x0f) << 4);
953 rk8xx_write(dev, RK817_POWER_EN_SAVE0, &value, 1);
954 value = (power_en2 & 0x0f) | ((power_en3 & 0x0f) << 4);
955 rk8xx_write(dev, RK817_POWER_EN_SAVE1, &value, 1);
956 }
957 break;
958 default:
959 printf("Unknown PMIC: RK%x!!\n", priv->variant);
960 return -EINVAL;
961 }
962
963 /* common init */
964 for (i = 0; i < init_data_num; i++) {
965 ret = pmic_clrsetbits(dev,
966 init_data[i].reg,
967 init_data[i].mask,
968 init_data[i].val);
969 if (ret < 0) {
970 printf("%s: i2c set reg 0x%x failed, ret=%d\n",
971 __func__, init_data[i].reg, ret);
972 }
973 }
974
975 /* current init */
976 for (i = 0; i < init_current_num; i++) {
977 ret = pmic_clrsetbits(dev,
978 init_current[i].reg,
979 init_current[i].mask,
980 init_current[i].val);
981 if (ret < 0) {
982 printf("%s: i2c set reg 0x%x failed, ret=%d\n",
983 __func__, init_current[i].reg, ret);
984 }
985 }
986
987 printf("PMIC: RK%x ", show_variant);
988
989 if (on_source && off_source) {
990 rk8xx_read(dev, on_source, &on, 1);
991 rk8xx_read(dev, off_source, &off, 1);
992 printf("(on=0x%02x, off=0x%02x)", on, off);
993 }
994 printf("\n");
995
996 if (pwron_key) {
997 ret = rk8xx_read(dev, pwron_key, &value, 1);
998 if (ret)
999 return ret;
1000 value &= ~(lp_off_msk | lp_act_msk);
1001 if (lp_off_msk)
1002 value |= priv->lp_off_time;
1003 if (lp_act_msk)
1004 value |= priv->lp_action;
1005 rk8xx_write(dev, pwron_key, &value, 1);
1006 }
1007
1008 ret = rk8xx_irq_chip_init(dev);
1009 if (ret) {
1010 printf("IRQ chip initial failed\n");
1011 return ret;
1012 }
1013
1014 return 0;
1015 }
1016
1017 static struct dm_pmic_ops rk8xx_ops = {
1018 .reg_count = rk8xx_reg_count,
1019 .read = rk8xx_read,
1020 .write = rk8xx_write,
1021 .suspend = rk8xx_suspend,
1022 .resume = rk8xx_resume,
1023 .shutdown = rk8xx_shutdown,
1024 };
1025
1026 static const struct udevice_id rk8xx_ids[] = {
1027 { .compatible = "rockchip,rk805" },
1028 { .compatible = "rockchip,rk806" },
1029 { .compatible = "rockchip,rk808" },
1030 { .compatible = "rockchip,rk809" },
1031 { .compatible = "rockchip,rk816" },
1032 { .compatible = "rockchip,rk817" },
1033 { .compatible = "rockchip,rk818" },
1034 { }
1035 };
1036
1037 U_BOOT_DRIVER(pmic_rk8xx) = {
1038 .name = "rk8xx pmic",
1039 .id = UCLASS_PMIC,
1040 .of_match = rk8xx_ids,
1041 #if CONFIG_IS_ENABLED(PMIC_CHILDREN)
1042 .bind = rk8xx_bind,
1043 #endif
1044 .ofdata_to_platdata = rk8xx_ofdata_to_platdata,
1045 .priv_auto_alloc_size = sizeof(struct rk8xx_priv),
1046 .probe = rk8xx_probe,
1047 .ops = &rk8xx_ops,
1048 };
1049