1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 3 #ifndef __AWINIC_DEVICE_FILE_H__ 4 #define __AWINIC_DEVICE_FILE_H__ 5 #include "aw_spin.h" 6 #include "aw_monitor.h" 7 #include "aw_data_type.h" 8 #include "aw_calib.h" 9 10 #define AW_DEV_DEFAULT_CH (0) 11 #define AW_DEV_I2S_CHECK_MAX (5) 12 #define AW_DEV_DSP_CHECK_MAX (5) 13 14 15 /******************************************** 16 * 17 * DSP I2C WRITES 18 * 19 *******************************************/ 20 #define AW_DSP_I2C_WRITES 21 #define AW_MAX_RAM_WRITE_BYTE_SIZE (128) 22 #define AW_DSP_ODD_NUM_BIT_TEST (0x5555) 23 #define AW_DSP_EVEN_NUM_BIT_TEST (0xAAAA) 24 #define AW_DSP_ST_CHECK_MAX (2) 25 #define AW_FADE_IN_OUT_DEFAULT (0) 26 #define AW_CALI_DELAY_CACL(value) ((value * 32) / 48) 27 28 struct aw_device; 29 30 enum { 31 AW_DEV_VDSEL_DAC = 0, 32 AW_DEV_VDSEL_VSENSE = 1, 33 }; 34 35 enum { 36 AW_DSP_CRC_NA = 0, 37 AW_DSP_CRC_OK = 1, 38 }; 39 40 enum { 41 AW_DSP_CRC_DISABLE = 0, 42 AW_DSP_CRC_ENABLE = 1, 43 }; 44 45 enum { 46 AW_DSP_FW_UPDATE_OFF = 0, 47 AW_DSP_FW_UPDATE_ON = 1, 48 }; 49 50 enum { 51 AW_FORCE_UPDATE_OFF = 0, 52 AW_FORCE_UPDATE_ON = 1, 53 }; 54 55 enum { 56 AW_1000_US = 1000, 57 AW_2000_US = 2000, 58 AW_3000_US = 3000, 59 AW_4000_US = 4000, 60 AW_5000_US = 5000, 61 AW_10000_US = 10000, 62 AW_100000_US = 100000, 63 }; 64 65 enum { 66 AW_DEV_TYPE_OK = 0, 67 AW_DEV_TYPE_NONE = 1, 68 }; 69 70 71 enum AW_DEV_STATUS { 72 AW_DEV_PW_OFF = 0, 73 AW_DEV_PW_ON, 74 }; 75 76 enum AW_DEV_FW_STATUS { 77 AW_DEV_FW_FAILED = 0, 78 AW_DEV_FW_OK, 79 }; 80 81 enum AW_DEV_MEMCLK { 82 AW_DEV_MEMCLK_OSC = 0, 83 AW_DEV_MEMCLK_PLL = 1, 84 }; 85 86 enum AW_DEV_DSP_CFG { 87 AW_DEV_DSP_WORK = 0, 88 AW_DEV_DSP_BYPASS = 1, 89 }; 90 91 enum { 92 AW_DSP_16_DATA = 0, 93 AW_DSP_32_DATA = 1, 94 }; 95 96 enum aw_platform { 97 AW_QCOM = 0, 98 AW_MTK = 1, 99 AW_SPRD = 2, 100 }; 101 102 enum { 103 AW_NOT_RCV_MODE = 0, 104 AW_RCV_MODE = 1, 105 }; 106 107 struct aw_device_ops { 108 int (*aw_i2c_writes)(struct aw_device *aw_dev, uint8_t reg_addr, uint8_t *buf, uint16_t len); 109 int (*aw_i2c_write)(struct aw_device *aw_dev, uint8_t reg_addr, uint16_t reg_data); 110 int (*aw_i2c_read)(struct aw_device *aw_dev, uint8_t reg_addr, uint16_t *reg_data); 111 112 int (*aw_reg_write)(struct aw_device *aw_dev, uint8_t reg_addr, uint16_t reg_data); 113 int (*aw_reg_read)(struct aw_device *aw_dev, uint8_t reg_addr, uint16_t *reg_data); 114 int (*aw_reg_write_bits)(struct aw_device *aw_dev, uint8_t reg_addr, uint16_t mask, uint16_t reg_data); 115 116 int (*aw_dsp_write)(struct aw_device *aw_dev, uint16_t dsp_addr, uint32_t reg_data, uint8_t data_type); 117 int (*aw_dsp_read)(struct aw_device *aw_dev, uint16_t dsp_addr, uint32_t *dsp_data, uint8_t data_type); 118 int (*aw_dsp_write_bits)(struct aw_device *aw_dev, uint16_t dsp_addr, uint16_t mask, uint16_t dsp_data); 119 120 int (*aw_set_volume)(struct aw_device *aw_dev, uint16_t value); 121 int (*aw_get_volume)(struct aw_device *aw_dev, uint16_t *value); 122 unsigned int (*aw_reg_val_to_db)(unsigned int value); 123 124 void (*aw_i2s_tx_enable)(struct aw_device *aw_dev, bool flag); 125 int (*aw_get_dev_num)(void); 126 127 bool (*aw_check_wr_access)(int reg); 128 bool (*aw_check_rd_access)(int reg); 129 int (*aw_get_reg_num)(void); 130 int (*aw_get_version)(char *buf, int size); 131 int (*aw_read_dsp_pid)(struct aw_device *aw_dev); 132 int (*aw_get_hw_mon_st)(struct aw_device *aw_dev, bool *is_enable, uint8_t *temp_flag); 133 int (*aw_cali_svc_get_iv_st)(struct aw_device *aw_dev); 134 void (*aw_set_cfg_f0_fs)(struct aw_device *aw_dev, uint32_t *f0_fs); 135 int (*aw_dsp_fw_check)(struct aw_device *aw_dev); 136 }; 137 138 struct aw_int_desc { 139 unsigned int mask_reg; /*interrupt mask reg*/ 140 unsigned int st_reg; /*interrupt status reg*/ 141 unsigned int mask_default; /*default mask close all*/ 142 unsigned int int_mask; /*set mask*/ 143 unsigned int intst_mask; /*interrupt check mask*/ 144 uint16_t sysint_st; /*interrupt reg status*/ 145 }; 146 147 struct aw_pwd_desc { 148 unsigned int reg; 149 unsigned int mask; 150 unsigned int enable; 151 unsigned int disable; 152 }; 153 154 struct aw_vcalb_desc { 155 unsigned int icalk_reg; 156 unsigned int icalk_reg_mask; 157 unsigned int icalk_sign_mask; 158 unsigned int icalk_neg_mask; 159 int icalk_value_factor; 160 161 unsigned int vcalk_reg; 162 unsigned int vcalk_reg_mask; 163 unsigned int vcalk_sign_mask; 164 unsigned int vcalk_neg_mask; 165 unsigned int vcalk_shift; 166 int vcalk_value_factor; 167 168 unsigned int vcalb_dsp_reg; 169 unsigned char data_type; 170 int cabl_base_value; 171 int vcal_factor; 172 int vscal_factor; 173 int iscal_factor; 174 175 unsigned int vcalb_adj_shift; 176 177 unsigned int vcalb_vsense_reg; 178 int vscal_factor_vsense_in; 179 int vcalk_value_factor_vsense_in; 180 unsigned int vcalk_dac_shift; 181 unsigned int vcalk_dac_mask; 182 unsigned int vcalk_dac_neg_mask; 183 unsigned int vcalk_vdsel_mask; 184 }; 185 186 struct aw_mute_desc { 187 unsigned int reg; 188 unsigned int mask; 189 unsigned int enable; 190 unsigned int disable; 191 }; 192 193 struct aw_sysst_desc { 194 unsigned int reg; 195 unsigned int st_check; 196 unsigned int st_mask; 197 unsigned int pll_check; 198 unsigned int dsp_check; 199 unsigned int dsp_mask; 200 }; 201 202 struct aw_profctrl_desc { 203 unsigned int reg; 204 unsigned int mask; 205 unsigned int rcv_mode_val; 206 unsigned int cur_mode; 207 }; 208 209 struct aw_volume_desc { 210 unsigned int reg; 211 unsigned int mask; 212 unsigned int shift; 213 int init_volume; 214 int mute_volume; 215 }; 216 217 struct aw_dsp_en_desc { 218 unsigned int reg; 219 unsigned int mask; 220 unsigned int enable; 221 unsigned int disable; 222 }; 223 224 struct aw_memclk_desc { 225 unsigned int reg; 226 unsigned int mask; 227 unsigned int mcu_hclk; 228 unsigned int osc_clk; 229 }; 230 231 struct aw_watch_dog_desc { 232 unsigned int reg; 233 unsigned int mask; 234 }; 235 236 struct aw_dsp_mem_desc { 237 unsigned int dsp_madd_reg; 238 unsigned int dsp_mdat_reg; 239 unsigned int dsp_fw_base_addr; 240 unsigned int dsp_cfg_base_addr; 241 }; 242 243 struct aw_voltage_desc { 244 unsigned int reg; 245 unsigned int vbat_range; 246 unsigned int int_bit; 247 }; 248 249 struct aw_temperature_desc { 250 unsigned int reg; 251 unsigned int sign_mask; 252 unsigned int neg_mask; 253 }; 254 255 struct aw_ipeak_desc { 256 unsigned int reg; 257 unsigned int mask; 258 }; 259 260 struct aw_vmax_desc { 261 unsigned int dsp_reg; 262 unsigned char data_type; 263 unsigned int init_vmax; 264 }; 265 266 struct aw_soft_rst { 267 uint8_t reg; 268 uint16_t reg_value; 269 }; 270 271 struct aw_cali_cfg_desc { 272 unsigned int actampth_reg; 273 unsigned char actampth_data_type; 274 275 unsigned int noiseampth_reg; 276 unsigned char noiseampth_data_type; 277 278 unsigned int ustepn_reg; 279 unsigned char ustepn_data_type; 280 281 unsigned int alphan_reg; 282 unsigned int alphan_data_type; 283 }; 284 285 struct aw_dsp_vol_desc { 286 unsigned int reg; 287 unsigned int mute_st; 288 unsigned int noise_st; 289 unsigned int mask; 290 }; 291 292 struct aw_amppd_desc { 293 unsigned int reg; 294 unsigned int mask; 295 unsigned int enable; 296 unsigned int disable; 297 }; 298 299 struct aw_f0_desc { 300 unsigned int dsp_reg; 301 unsigned char data_type; 302 unsigned int shift; 303 }; 304 305 struct aw_cfgf0_fs_desc { 306 unsigned int dsp_reg; 307 unsigned char data_type; 308 }; 309 310 struct aw_q_desc { 311 unsigned int dsp_reg; 312 unsigned char data_type; 313 unsigned int shift; 314 }; 315 316 struct aw_ra_desc { 317 unsigned int dsp_reg; 318 unsigned char data_type; 319 }; 320 321 struct aw_noise_desc { 322 unsigned int dsp_reg; 323 unsigned char data_type; 324 unsigned int mask; 325 }; 326 327 struct aw_hw_mon_desc { 328 unsigned int dsp_reg; 329 unsigned char data_type; 330 unsigned int mask; 331 unsigned int enable; 332 unsigned int disable; 333 }; 334 335 struct aw_ste_re_desc { 336 unsigned int dsp_reg; 337 unsigned char data_type; 338 unsigned int shift; 339 }; 340 341 struct aw_adpz_re_desc { 342 unsigned int dsp_reg; 343 unsigned char data_type; 344 unsigned int shift; 345 }; 346 347 struct aw_adpz_t0_desc { 348 unsigned int dsp_reg; 349 unsigned char data_type; 350 uint16_t coilalpha_reg; 351 unsigned char coil_type; 352 }; 353 354 struct aw_spkr_temp_desc { 355 unsigned int reg; 356 }; 357 358 struct aw_dsp_crc_desc { 359 unsigned int ctl_reg; 360 unsigned int ctl_mask; 361 unsigned int ctl_enable; 362 unsigned int ctl_disable; 363 364 unsigned int dsp_reg; 365 unsigned char data_type; 366 }; 367 368 struct aw_cco_mux_desc { 369 unsigned int reg; 370 unsigned int mask; 371 unsigned int divider; 372 unsigned int bypass; 373 }; 374 375 struct aw_hw_temp_desc { 376 unsigned int dsp_reg; 377 unsigned char data_type; 378 }; 379 380 struct aw_re_range_desc { 381 uint32_t re_min; 382 uint32_t re_max; 383 uint32_t re_min_default; 384 uint32_t re_max_default; 385 }; 386 387 struct aw_cali_delay_desc { 388 unsigned int dsp_reg; 389 unsigned char data_type; 390 unsigned int delay; 391 }; 392 393 struct aw_chansel_desc { 394 unsigned int rxchan_reg; 395 unsigned int rxchan_mask; 396 unsigned int txchan_reg; 397 unsigned int txchan_mask; 398 399 unsigned int rx_left; 400 unsigned int rx_right; 401 unsigned int tx_left; 402 unsigned int tx_right; 403 }; 404 405 struct aw_tx_en_desc { 406 unsigned int tx_en_mask; 407 unsigned int tx_disable; 408 }; 409 410 struct aw_dsp_st { 411 unsigned int dsp_reg_s1; 412 unsigned int dsp_reg_e1; 413 414 unsigned int dsp_reg_s2; 415 unsigned int dsp_reg_e2; 416 }; 417 418 struct aw_container { 419 int len; 420 uint8_t data[]; 421 }; 422 423 struct aw_device { 424 int status; 425 struct mutex *i2c_lock; 426 427 unsigned char cur_prof; /*current profile index*/ 428 unsigned char set_prof; /*set profile index*/ 429 unsigned char dsp_crc_st; 430 uint16_t chip_id; 431 432 unsigned int channel; /*pa channel select*/ 433 unsigned int fade_step; 434 435 struct i2c_client *i2c; 436 struct device *dev; 437 char *acf; 438 void *private_data; 439 440 uint32_t fade_en; 441 unsigned char dsp_cfg; 442 443 uint32_t dsp_fw_len; 444 uint32_t dsp_cfg_len; 445 uint8_t platform; 446 uint8_t fw_status; /*load cfg status*/ 447 struct aw_prof_info prof_info; 448 struct aw_sec_data_desc crc_dsp_cfg; 449 450 struct aw_int_desc int_desc; 451 struct aw_pwd_desc pwd_desc; 452 struct aw_mute_desc mute_desc; 453 struct aw_vcalb_desc vcalb_desc; 454 struct aw_sysst_desc sysst_desc; 455 struct aw_profctrl_desc profctrl_desc; 456 struct aw_volume_desc volume_desc; 457 struct aw_dsp_en_desc dsp_en_desc; 458 struct aw_memclk_desc memclk_desc; 459 struct aw_watch_dog_desc watch_dog_desc; 460 struct aw_dsp_mem_desc dsp_mem_desc; 461 struct aw_voltage_desc voltage_desc; 462 struct aw_temperature_desc temp_desc; 463 struct aw_vmax_desc vmax_desc; 464 struct aw_ipeak_desc ipeak_desc; 465 struct aw_soft_rst soft_rst; 466 struct aw_cali_cfg_desc cali_cfg_desc; 467 struct aw_ra_desc ra_desc; 468 struct aw_dsp_vol_desc dsp_vol_desc; 469 struct aw_noise_desc noise_desc; 470 struct aw_f0_desc f0_desc; 471 struct aw_cfgf0_fs_desc cfgf0_fs_desc; 472 struct aw_q_desc q_desc; 473 struct aw_hw_mon_desc hw_mon_desc; 474 struct aw_ste_re_desc ste_re_desc; 475 struct aw_adpz_re_desc adpz_re_desc; 476 struct aw_adpz_t0_desc t0_desc; 477 struct aw_amppd_desc amppd_desc; 478 struct aw_spkr_temp_desc spkr_temp_desc; 479 struct aw_dsp_crc_desc dsp_crc_desc; 480 struct aw_cco_mux_desc cco_mux_desc; 481 struct aw_hw_temp_desc hw_temp_desc; 482 483 struct aw_cali_desc cali_desc; 484 struct aw_monitor_desc monitor_desc; 485 struct aw_re_range_desc re_range; 486 struct aw_spin_desc spin_desc; 487 struct aw_chansel_desc chansel_desc; 488 struct aw_tx_en_desc tx_en_desc; 489 struct aw_cali_delay_desc cali_delay_desc; 490 struct aw_dsp_st dsp_st_desc; 491 492 struct aw_device_ops ops; 493 struct list_head list_node; 494 }; 495 496 497 void aw_dev_deinit(struct aw_device *aw_dev); 498 int aw_device_init(struct aw_device *aw_dev, struct aw_container *aw_prof); 499 int aw_device_start(struct aw_device *aw_dev); 500 int aw_device_stop(struct aw_device *aw_dev); 501 502 int aw_dev_fw_update(struct aw_device *aw_dev, bool up_dsp_fw_en, bool force_up_en); 503 int aw_dev_get_int_status(struct aw_device *aw_dev, uint16_t *int_status); 504 void aw_dev_set_volume_step(struct aw_device *aw_dev, unsigned int step); 505 int aw_dev_set_intmask(struct aw_device *aw_dev, bool flag); 506 void aw_dev_clear_int_status(struct aw_device *aw_dev); 507 int aw_dev_get_volume_step(struct aw_device *aw_dev); 508 int aw_device_probe(struct aw_device *aw_dev); 509 int aw_device_remove(struct aw_device *aw_dev); 510 int aw_dev_syspll_check(struct aw_device *aw_dev); 511 int aw_dev_get_dsp_status(struct aw_device *aw_dev); 512 513 void aw_dev_set_fade_vol_step(struct aw_device *aw_dev, unsigned int step); 514 int aw_dev_get_fade_vol_step(struct aw_device *aw_dev); 515 void aw_dev_get_fade_time(unsigned int *time, bool fade_in); 516 void aw_dev_set_fade_time(unsigned int time, bool fade_in); 517 int aw_dev_get_hmute(struct aw_device *aw_dev); 518 int aw_dev_sysst_check(struct aw_device *aw_dev); 519 int aw_dev_get_list_head(struct list_head **head); 520 int aw_dev_dsp_check(struct aw_device *aw_dev); 521 void aw_dev_memclk_select(struct aw_device *aw_dev, unsigned char flag); 522 void aw_dev_dsp_enable(struct aw_device *aw_dev, bool dsp); 523 void aw_dev_mute(struct aw_device *aw_dev, bool mute); 524 int aw_dev_dsp_fw_update(struct aw_device *aw_dev, 525 uint8_t *data, uint32_t len); 526 int aw_dev_dsp_cfg_update(struct aw_device *aw_dev, 527 uint8_t *data, uint32_t len); 528 int aw_dev_modify_dsp_cfg(struct aw_device *aw_dev, 529 unsigned int addr, uint32_t dsp_data, unsigned char data_type); 530 int aw_dev_get_iis_status(struct aw_device *aw_dev); 531 532 #endif 533 534