1 /*
2 * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net>
3 * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de>
4 * Changes for multibus/multiadapter I2C support.
5 *
6 * (C) Copyright 2001
7 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
8 *
9 * SPDX-License-Identifier: GPL-2.0+
10 *
11 * The original I2C interface was
12 * (C) 2000 by Paolo Scaffardi (arsenio@tin.it)
13 * AIRVENT SAM s.p.a - RIMINI(ITALY)
14 * but has been changed substantially.
15 */
16
17 #ifndef _I2C_H_
18 #define _I2C_H_
19
20 /*
21 * For now there are essentially two parts to this file - driver model
22 * here at the top, and the older code below (with CONFIG_SYS_I2C being
23 * most recent). The plan is to migrate everything to driver model.
24 * The driver model structures and API are separate as they are different
25 * enough as to be incompatible for compilation purposes.
26 */
27
28 enum dm_i2c_chip_flags {
29 DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */
30 DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */
31 DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */
32 };
33
34 struct udevice;
35 /**
36 * struct dm_i2c_chip - information about an i2c chip
37 *
38 * An I2C chip is a device on the I2C bus. It sits at a particular address
39 * and normally supports 7-bit or 10-bit addressing.
40 *
41 * To obtain this structure, use dev_get_parent_platdata(dev) where dev is
42 * the chip to examine.
43 *
44 * @chip_addr: Chip address on bus
45 * @offset_len: Length of offset in bytes. A single byte offset can
46 * represent up to 256 bytes. A value larger than 1 may be
47 * needed for larger devices.
48 * @flags: Flags for this chip (dm_i2c_chip_flags)
49 * @emul: Emulator for this chip address (only used for emulation)
50 */
51 struct dm_i2c_chip {
52 uint chip_addr;
53 uint offset_len;
54 uint flags;
55 #ifdef CONFIG_SANDBOX
56 struct udevice *emul;
57 bool test_mode;
58 #endif
59 };
60
61 /**
62 * struct dm_i2c_bus- information about an i2c bus
63 *
64 * An I2C bus contains 0 or more chips on it, each at its own address. The
65 * bus can operate at different speeds (measured in Hz, typically 100KHz
66 * or 400KHz).
67 *
68 * To obtain this structure, use dev_get_uclass_priv(bus) where bus is the
69 * I2C bus udevice.
70 *
71 * @speed_hz: Bus speed in hertz (typically 100000)
72 */
73 struct dm_i2c_bus {
74 int speed_hz;
75 };
76
77 /*
78 * Not all of these flags are implemented in the U-Boot API
79 */
80 enum dm_i2c_msg_flags {
81 I2C_M_TEN = 0x0010, /* ten-bit chip address */
82 I2C_M_RD = 0x0001, /* read data, from slave to master */
83 I2C_M_STOP = 0x8000, /* send stop after this message */
84 I2C_M_NOSTART = 0x4000, /* no start before this message */
85 I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */
86 I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */
87 I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */
88 I2C_M_RECV_LEN = 0x0400, /* length is first received byte */
89 };
90
91 /**
92 * struct i2c_msg - an I2C message
93 *
94 * @addr: Slave address
95 * @flags: Flags (see enum dm_i2c_msg_flags)
96 * @len: Length of buffer in bytes, may be 0 for a probe
97 * @buf: Buffer to send/receive, or NULL if no data
98 */
99 struct i2c_msg {
100 uint addr;
101 uint flags;
102 uint len;
103 u8 *buf;
104 };
105
106 /**
107 * struct i2c_msg_list - a list of I2C messages
108 *
109 * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem
110 * appropriate in U-Boot.
111 *
112 * @msg: Pointer to i2c_msg array
113 * @nmsgs: Number of elements in the array
114 */
115 struct i2c_msg_list {
116 struct i2c_msg *msgs;
117 uint nmsgs;
118 };
119
120 /**
121 * dm_i2c_read() - read bytes from an I2C chip
122 *
123 * To obtain an I2C device (called a 'chip') given the I2C bus address you
124 * can use i2c_get_chip(). To obtain a bus by bus number use
125 * uclass_get_device_by_seq(UCLASS_I2C, <bus number>).
126 *
127 * To set the address length of a devce use i2c_set_addr_len(). It
128 * defaults to 1.
129 *
130 * @dev: Chip to read from
131 * @offset: Offset within chip to start reading
132 * @buffer: Place to put data
133 * @len: Number of bytes to read
134 *
135 * @return 0 on success, -ve on failure
136 */
137 int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len);
138
139 /**
140 * dm_i2c_write() - write bytes to an I2C chip
141 *
142 * See notes for dm_i2c_read() above.
143 *
144 * @dev: Chip to write to
145 * @offset: Offset within chip to start writing
146 * @buffer: Buffer containing data to write
147 * @len: Number of bytes to write
148 *
149 * @return 0 on success, -ve on failure
150 */
151 int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
152 int len);
153
154 /**
155 * dm_i2c_probe() - probe a particular chip address
156 *
157 * This can be useful to check for the existence of a chip on the bus.
158 * It is typically implemented by writing the chip address to the bus
159 * and checking that the chip replies with an ACK.
160 *
161 * @bus: Bus to probe
162 * @chip_addr: 7-bit address to probe (10-bit and others are not supported)
163 * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags)
164 * @devp: Returns the device found, or NULL if none
165 * @return 0 if a chip was found at that address, -ve if not
166 */
167 int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
168 struct udevice **devp);
169
170 /**
171 * dm_i2c_reg_read() - Read a value from an I2C register
172 *
173 * This reads a single value from the given address in an I2C chip
174 *
175 * @dev: Device to use for transfer
176 * @addr: Address to read from
177 * @return value read, or -ve on error
178 */
179 int dm_i2c_reg_read(struct udevice *dev, uint offset);
180
181 /**
182 * dm_i2c_reg_write() - Write a value to an I2C register
183 *
184 * This writes a single value to the given address in an I2C chip
185 *
186 * @dev: Device to use for transfer
187 * @addr: Address to write to
188 * @val: Value to write (normally a byte)
189 * @return 0 on success, -ve on error
190 */
191 int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val);
192
193 /**
194 * dm_i2c_reg_clrset() - Apply bitmask to an I2C register
195 *
196 * Read value, apply bitmask and write modified value back to the
197 * given address in an I2C chip
198 *
199 * @dev: Device to use for transfer
200 * @offset: Address for the R/W operation
201 * @clr: Bitmask of bits that should be cleared
202 * @set: Bitmask of bits that should be set
203 * @return 0 on success, -ve on error
204 */
205 int dm_i2c_reg_clrset(struct udevice *dev, uint offset, u32 clr, u32 set);
206
207 /**
208 * dm_i2c_xfer() - Transfer messages over I2C
209 *
210 * This transfers a raw message. It is best to use dm_i2c_reg_read/write()
211 * instead.
212 *
213 * @dev: Device to use for transfer
214 * @msg: List of messages to transfer
215 * @nmsgs: Number of messages to transfer
216 * @return 0 on success, -ve on error
217 */
218 int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs);
219
220 /**
221 * dm_i2c_set_bus_speed() - set the speed of a bus
222 *
223 * @bus: Bus to adjust
224 * @speed: Requested speed in Hz
225 * @return 0 if OK, -EINVAL for invalid values
226 */
227 int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed);
228
229 /**
230 * dm_i2c_get_bus_speed() - get the speed of a bus
231 *
232 * @bus: Bus to check
233 * @return speed of selected I2C bus in Hz, -ve on error
234 */
235 int dm_i2c_get_bus_speed(struct udevice *bus);
236
237 /**
238 * i2c_set_chip_flags() - set flags for a chip
239 *
240 * Typically addresses are 7 bits, but for 10-bit addresses you should set
241 * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing.
242 *
243 * @dev: Chip to adjust
244 * @flags: New flags
245 * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error
246 */
247 int i2c_set_chip_flags(struct udevice *dev, uint flags);
248
249 /**
250 * i2c_get_chip_flags() - get flags for a chip
251 *
252 * @dev: Chip to check
253 * @flagsp: Place to put flags
254 * @return 0 if OK, other -ve value on error
255 */
256 int i2c_get_chip_flags(struct udevice *dev, uint *flagsp);
257
258 /**
259 * i2c_set_offset_len() - set the offset length for a chip
260 *
261 * The offset used to access a chip may be up to 4 bytes long. Typically it
262 * is only 1 byte, which is enough for chips with 256 bytes of memory or
263 * registers. The default value is 1, but you can call this function to
264 * change it.
265 *
266 * @offset_len: New offset length value (typically 1 or 2)
267 */
268 int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len);
269
270 /**
271 * i2c_get_offset_len() - get the offset length for a chip
272 *
273 * @return: Current offset length value (typically 1 or 2)
274 */
275 int i2c_get_chip_offset_len(struct udevice *dev);
276
277 /**
278 * i2c_deblock() - recover a bus that is in an unknown state
279 *
280 * See the deblock() method in 'struct dm_i2c_ops' for full information
281 *
282 * @bus: Bus to recover
283 * @return 0 if OK, -ve on error
284 */
285 int i2c_deblock(struct udevice *bus);
286
287 #ifdef CONFIG_DM_I2C_COMPAT
288 /**
289 * i2c_probe() - Compatibility function for driver model
290 *
291 * Calls dm_i2c_probe() on the current bus
292 */
293 int i2c_probe(uint8_t chip_addr);
294
295 /**
296 * i2c_read() - Compatibility function for driver model
297 *
298 * Calls dm_i2c_read() with the device corresponding to @chip_addr, and offset
299 * set to @addr. @alen must match the current setting for the device.
300 */
301 int i2c_read(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
302 int len);
303
304 /**
305 * i2c_write() - Compatibility function for driver model
306 *
307 * Calls dm_i2c_write() with the device corresponding to @chip_addr, and offset
308 * set to @addr. @alen must match the current setting for the device.
309 */
310 int i2c_write(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
311 int len);
312
313 /**
314 * i2c_get_bus_num_fdt() - Compatibility function for driver model
315 *
316 * @return the bus number associated with the given device tree node
317 */
318 int i2c_get_bus_num_fdt(int node);
319
320 /**
321 * i2c_get_bus_num() - Compatibility function for driver model
322 *
323 * @return the 'current' bus number
324 */
325 unsigned int i2c_get_bus_num(void);
326
327 /**
328 * i2c_set_bus_num() - Compatibility function for driver model
329 *
330 * Sets the 'current' bus
331 */
332 int i2c_set_bus_num(unsigned int bus);
333
I2C_SET_BUS(unsigned int bus)334 static inline void I2C_SET_BUS(unsigned int bus)
335 {
336 i2c_set_bus_num(bus);
337 }
338
I2C_GET_BUS(void)339 static inline unsigned int I2C_GET_BUS(void)
340 {
341 return i2c_get_bus_num();
342 }
343
344 /**
345 * i2c_init() - Compatibility function for driver model
346 *
347 * This function does nothing.
348 */
349 void i2c_init(int speed, int slaveaddr);
350
351 /**
352 * board_i2c_init() - Compatibility function for driver model
353 *
354 * @param blob Device tree blbo
355 * @return the number of I2C bus
356 */
357 void board_i2c_init(const void *blob);
358
359 /*
360 * Compatibility functions for driver model.
361 */
362 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
363 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
364
365 #endif
366
367 /**
368 * struct dm_i2c_ops - driver operations for I2C uclass
369 *
370 * Drivers should support these operations unless otherwise noted. These
371 * operations are intended to be used by uclass code, not directly from
372 * other code.
373 */
374 struct dm_i2c_ops {
375 /**
376 * xfer() - transfer a list of I2C messages
377 *
378 * @bus: Bus to read from
379 * @msg: List of messages to transfer
380 * @nmsgs: Number of messages in the list
381 * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte,
382 * -ECOMM if the speed cannot be supported, -EPROTO if the chip
383 * flags cannot be supported, other -ve value on some other error
384 */
385 int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs);
386
387 /**
388 * probe_chip() - probe for the presense of a chip address
389 *
390 * This function is optional. If omitted, the uclass will send a zero
391 * length message instead.
392 *
393 * @bus: Bus to probe
394 * @chip_addr: Chip address to probe
395 * @chip_flags: Probe flags (enum dm_i2c_chip_flags)
396 * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back
397 * to default probem other -ve value on error
398 */
399 int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags);
400
401 /**
402 * set_bus_speed() - set the speed of a bus (optional)
403 *
404 * The bus speed value will be updated by the uclass if this function
405 * does not return an error. This method is optional - if it is not
406 * provided then the driver can read the speed from
407 * dev_get_uclass_priv(bus)->speed_hz
408 *
409 * @bus: Bus to adjust
410 * @speed: Requested speed in Hz
411 * @return 0 if OK, -EINVAL for invalid values
412 */
413 int (*set_bus_speed)(struct udevice *bus, unsigned int speed);
414
415 /**
416 * get_bus_speed() - get the speed of a bus (optional)
417 *
418 * Normally this can be provided by the uclass, but if you want your
419 * driver to check the bus speed by looking at the hardware, you can
420 * implement that here. This method is optional. This method would
421 * normally be expected to return dev_get_uclass_priv(bus)->speed_hz.
422 *
423 * @bus: Bus to check
424 * @return speed of selected I2C bus in Hz, -ve on error
425 */
426 int (*get_bus_speed)(struct udevice *bus);
427
428 /**
429 * set_flags() - set the flags for a chip (optional)
430 *
431 * This is generally implemented by the uclass, but drivers can
432 * check the value to ensure that unsupported options are not used.
433 * This method is optional. If provided, this method will always be
434 * called when the flags change.
435 *
436 * @dev: Chip to adjust
437 * @flags: New flags value
438 * @return 0 if OK, -EINVAL if value is unsupported
439 */
440 int (*set_flags)(struct udevice *dev, uint flags);
441
442 /**
443 * deblock() - recover a bus that is in an unknown state
444 *
445 * I2C is a synchronous protocol and resets of the processor in the
446 * middle of an access can block the I2C Bus until a powerdown of
447 * the full unit is done. This is because slaves can be stuck
448 * waiting for addition bus transitions for a transaction that will
449 * never complete. Resetting the I2C master does not help. The only
450 * way is to force the bus through a series of transitions to make
451 * sure that all slaves are done with the transaction. This method
452 * performs this 'deblocking' if support by the driver.
453 *
454 * This method is optional.
455 */
456 int (*deblock)(struct udevice *bus);
457 };
458
459 #define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops)
460
461 /**
462 * struct i2c_mux_ops - operations for an I2C mux
463 *
464 * The current mux state is expected to be stored in the mux itself since
465 * it is the only thing that knows how to make things work. The mux can
466 * record the current state and then avoid switching unless it is necessary.
467 * So select() can be skipped if the mux is already in the correct state.
468 * Also deselect() can be made a nop if required.
469 */
470 struct i2c_mux_ops {
471 /**
472 * select() - select one of of I2C buses attached to a mux
473 *
474 * This will be called when there is no bus currently selected by the
475 * mux. This method does not need to deselect the old bus since
476 * deselect() will be already have been called if necessary.
477 *
478 * @mux: Mux device
479 * @bus: I2C bus to select
480 * @channel: Channel number correponding to the bus to select
481 * @return 0 if OK, -ve on error
482 */
483 int (*select)(struct udevice *mux, struct udevice *bus, uint channel);
484
485 /**
486 * deselect() - select one of of I2C buses attached to a mux
487 *
488 * This is used to deselect the currently selected I2C bus.
489 *
490 * @mux: Mux device
491 * @bus: I2C bus to deselect
492 * @channel: Channel number correponding to the bus to deselect
493 * @return 0 if OK, -ve on error
494 */
495 int (*deselect)(struct udevice *mux, struct udevice *bus, uint channel);
496 };
497
498 #define i2c_mux_get_ops(dev) ((struct i2c_mux_ops *)(dev)->driver->ops)
499
500 /**
501 * i2c_get_chip() - get a device to use to access a chip on a bus
502 *
503 * This returns the device for the given chip address. The device can then
504 * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc.
505 *
506 * @bus: Bus to examine
507 * @chip_addr: Chip address for the new device
508 * @offset_len: Length of a register offset in bytes (normally 1)
509 * @devp: Returns pointer to new device if found or -ENODEV if not
510 * found
511 */
512 int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
513 struct udevice **devp);
514
515 /**
516 * i2c_get_chip_for_busnum() - get a device to use to access a chip on
517 * a bus number
518 *
519 * This returns the device for the given chip address on a particular bus
520 * number.
521 *
522 * @busnum: Bus number to examine
523 * @chip_addr: Chip address for the new device
524 * @offset_len: Length of a register offset in bytes (normally 1)
525 * @devp: Returns pointer to new device if found or -ENODEV if not
526 * found
527 */
528 int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
529 struct udevice **devp);
530
531 /**
532 * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data
533 *
534 * This decodes the chip address from a device tree node and puts it into
535 * its dm_i2c_chip structure. This should be called in your driver's
536 * ofdata_to_platdata() method.
537 *
538 * @blob: Device tree blob
539 * @node: Node offset to read from
540 * @spi: Place to put the decoded information
541 */
542 int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct dm_i2c_chip *chip);
543
544 /**
545 * i2c_dump_msgs() - Dump a list of I2C messages
546 *
547 * This may be useful for debugging.
548 *
549 * @msg: Message list to dump
550 * @nmsgs: Number of messages
551 */
552 void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs);
553
554 #ifndef CONFIG_DM_I2C
555
556 /*
557 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
558 *
559 * The implementation MUST NOT use static or global variables if the
560 * I2C routines are used to read SDRAM configuration information
561 * because this is done before the memories are initialized. Limited
562 * use of stack-based variables are OK (the initial stack size is
563 * limited).
564 *
565 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
566 */
567
568 /*
569 * Configuration items.
570 */
571 #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */
572
573 #if !defined(CONFIG_SYS_I2C_MAX_HOPS)
574 /* no muxes used bus = i2c adapters */
575 #define CONFIG_SYS_I2C_DIRECT_BUS 1
576 #define CONFIG_SYS_I2C_MAX_HOPS 0
577 #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c)
578 #else
579 /* we use i2c muxes */
580 #undef CONFIG_SYS_I2C_DIRECT_BUS
581 #endif
582
583 /* define the I2C bus number for RTC and DTT if not already done */
584 #if !defined(CONFIG_SYS_RTC_BUS_NUM)
585 #define CONFIG_SYS_RTC_BUS_NUM 0
586 #endif
587 #if !defined(CONFIG_SYS_SPD_BUS_NUM)
588 #define CONFIG_SYS_SPD_BUS_NUM 0
589 #endif
590
591 struct i2c_adapter {
592 void (*init)(struct i2c_adapter *adap, int speed,
593 int slaveaddr);
594 int (*probe)(struct i2c_adapter *adap, uint8_t chip);
595 int (*read)(struct i2c_adapter *adap, uint8_t chip,
596 uint addr, int alen, uint8_t *buffer,
597 int len);
598 int (*write)(struct i2c_adapter *adap, uint8_t chip,
599 uint addr, int alen, uint8_t *buffer,
600 int len);
601 uint (*set_bus_speed)(struct i2c_adapter *adap,
602 uint speed);
603 int speed;
604 int waitdelay;
605 int slaveaddr;
606 int init_done;
607 int hwadapnr;
608 char *name;
609 };
610
611 #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
612 _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \
613 { \
614 .init = _init, \
615 .probe = _probe, \
616 .read = _read, \
617 .write = _write, \
618 .set_bus_speed = _set_speed, \
619 .speed = _speed, \
620 .slaveaddr = _slaveaddr, \
621 .init_done = 0, \
622 .hwadapnr = _hwadapnr, \
623 .name = #_name \
624 };
625
626 #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \
627 _set_speed, _speed, _slaveaddr, _hwadapnr) \
628 ll_entry_declare(struct i2c_adapter, _name, i2c) = \
629 U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
630 _set_speed, _speed, _slaveaddr, _hwadapnr, _name);
631
632 struct i2c_adapter *i2c_get_adapter(int index);
633
634 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
635 struct i2c_mux {
636 int id;
637 char name[16];
638 };
639
640 struct i2c_next_hop {
641 struct i2c_mux mux;
642 uint8_t chip;
643 uint8_t channel;
644 };
645
646 struct i2c_bus_hose {
647 int adapter;
648 struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS];
649 };
650 #define I2C_NULL_HOP {{-1, ""}, 0, 0}
651 extern struct i2c_bus_hose i2c_bus[];
652
653 #define I2C_ADAPTER(bus) i2c_bus[bus].adapter
654 #else
655 #define I2C_ADAPTER(bus) bus
656 #endif
657 #define I2C_BUS gd->cur_i2c_bus
658
659 #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus))
660 #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus)
661 #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr)
662
663 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
664 #define I2C_MUX_PCA9540_ID 1
665 #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"}
666 #define I2C_MUX_PCA9542_ID 2
667 #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"}
668 #define I2C_MUX_PCA9544_ID 3
669 #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"}
670 #define I2C_MUX_PCA9547_ID 4
671 #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"}
672 #define I2C_MUX_PCA9548_ID 5
673 #define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"}
674 #endif
675
676 #ifndef I2C_SOFT_DECLARATIONS
677 # if (defined(CONFIG_AT91RM9200) || \
678 defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
679 defined(CONFIG_AT91SAM9263))
680 # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
681 # else
682 # define I2C_SOFT_DECLARATIONS
683 # endif
684 #endif
685
686 /*
687 * Many boards/controllers/drivers don't support an I2C slave interface so
688 * provide a default slave address for them for use in common code. A real
689 * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
690 * support a slave interface.
691 */
692 #ifndef CONFIG_SYS_I2C_SLAVE
693 #define CONFIG_SYS_I2C_SLAVE 0xfe
694 #endif
695
696 /*
697 * Initialization, must be called once on start up, may be called
698 * repeatedly to change the speed and slave addresses.
699 */
700 #ifdef CONFIG_SYS_I2C_EARLY_INIT
701 void i2c_early_init_f(void);
702 #endif
703 void i2c_init(int speed, int slaveaddr);
704 void i2c_init_board(void);
705
706 #ifdef CONFIG_SYS_I2C
707 /*
708 * i2c_get_bus_num:
709 *
710 * Returns index of currently active I2C bus. Zero-based.
711 */
712 unsigned int i2c_get_bus_num(void);
713
714 /*
715 * i2c_set_bus_num:
716 *
717 * Change the active I2C bus. Subsequent read/write calls will
718 * go to this one.
719 *
720 * bus - bus index, zero based
721 *
722 * Returns: 0 on success, not 0 on failure
723 *
724 */
725 int i2c_set_bus_num(unsigned int bus);
726
727 /*
728 * i2c_init_all():
729 *
730 * Initializes all I2C adapters in the system. All i2c_adap structures must
731 * be initialized beforehead with function pointers and data, including
732 * speed and slaveaddr. Returns 0 on success, non-0 on failure.
733 */
734 void i2c_init_all(void);
735
736 /*
737 * Probe the given I2C chip address. Returns 0 if a chip responded,
738 * not 0 on failure.
739 */
740 int i2c_probe(uint8_t chip);
741
742 /*
743 * Read/Write interface:
744 * chip: I2C chip address, range 0..127
745 * addr: Memory (register) address within the chip
746 * alen: Number of bytes to use for addr (typically 1, 2 for larger
747 * memories, 0 for register type devices with only one
748 * register)
749 * buffer: Where to read/write the data
750 * len: How many bytes to read/write
751 *
752 * Returns: 0 on success, not 0 on failure
753 */
754 int i2c_read(uint8_t chip, unsigned int addr, int alen,
755 uint8_t *buffer, int len);
756
757 int i2c_write(uint8_t chip, unsigned int addr, int alen,
758 uint8_t *buffer, int len);
759
760 /*
761 * Utility routines to read/write registers.
762 */
763 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
764
765 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
766
767 /*
768 * i2c_set_bus_speed:
769 *
770 * Change the speed of the active I2C bus
771 *
772 * speed - bus speed in Hz
773 *
774 * Returns: new bus speed
775 *
776 */
777 unsigned int i2c_set_bus_speed(unsigned int speed);
778
779 /*
780 * i2c_get_bus_speed:
781 *
782 * Returns speed of currently active I2C bus in Hz
783 */
784
785 unsigned int i2c_get_bus_speed(void);
786
787 #else
788
789 /*
790 * Probe the given I2C chip address. Returns 0 if a chip responded,
791 * not 0 on failure.
792 */
793 int i2c_probe(uchar chip);
794
795 /*
796 * Read/Write interface:
797 * chip: I2C chip address, range 0..127
798 * addr: Memory (register) address within the chip
799 * alen: Number of bytes to use for addr (typically 1, 2 for larger
800 * memories, 0 for register type devices with only one
801 * register)
802 * buffer: Where to read/write the data
803 * len: How many bytes to read/write
804 *
805 * Returns: 0 on success, not 0 on failure
806 */
807 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
808 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
809
810 /*
811 * Utility routines to read/write registers.
812 */
i2c_reg_read(u8 addr,u8 reg)813 static inline u8 i2c_reg_read(u8 addr, u8 reg)
814 {
815 u8 buf;
816
817 #ifdef DEBUG
818 printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg);
819 #endif
820
821 i2c_read(addr, reg, 1, &buf, 1);
822
823 return buf;
824 }
825
i2c_reg_write(u8 addr,u8 reg,u8 val)826 static inline void i2c_reg_write(u8 addr, u8 reg, u8 val)
827 {
828 #ifdef DEBUG
829 printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n",
830 __func__, addr, reg, val);
831 #endif
832
833 i2c_write(addr, reg, 1, &val, 1);
834 }
835
836 /*
837 * Functions for setting the current I2C bus and its speed
838 */
839
840 /*
841 * i2c_set_bus_num:
842 *
843 * Change the active I2C bus. Subsequent read/write calls will
844 * go to this one.
845 *
846 * bus - bus index, zero based
847 *
848 * Returns: 0 on success, not 0 on failure
849 *
850 */
851 int i2c_set_bus_num(unsigned int bus);
852
853 /*
854 * i2c_get_bus_num:
855 *
856 * Returns index of currently active I2C bus. Zero-based.
857 */
858
859 unsigned int i2c_get_bus_num(void);
860
861 /*
862 * i2c_set_bus_speed:
863 *
864 * Change the speed of the active I2C bus
865 *
866 * speed - bus speed in Hz
867 *
868 * Returns: 0 on success, not 0 on failure
869 *
870 */
871 int i2c_set_bus_speed(unsigned int);
872
873 /*
874 * i2c_get_bus_speed:
875 *
876 * Returns speed of currently active I2C bus in Hz
877 */
878
879 unsigned int i2c_get_bus_speed(void);
880 #endif /* CONFIG_SYS_I2C */
881
882 /*
883 * only for backwardcompatibility, should go away if we switched
884 * completely to new multibus support.
885 */
886 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
887 # if !defined(CONFIG_SYS_MAX_I2C_BUS)
888 # define CONFIG_SYS_MAX_I2C_BUS 2
889 # endif
890 # define I2C_MULTI_BUS 1
891 #else
892 # define CONFIG_SYS_MAX_I2C_BUS 1
893 # define I2C_MULTI_BUS 0
894 #endif
895
896 /* NOTE: These two functions MUST be always_inline to avoid code growth! */
897 static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline));
I2C_GET_BUS(void)898 static inline unsigned int I2C_GET_BUS(void)
899 {
900 return I2C_MULTI_BUS ? i2c_get_bus_num() : 0;
901 }
902
903 static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline));
I2C_SET_BUS(unsigned int bus)904 static inline void I2C_SET_BUS(unsigned int bus)
905 {
906 if (I2C_MULTI_BUS)
907 i2c_set_bus_num(bus);
908 }
909
910 /* Multi I2C definitions */
911 enum {
912 I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,
913 I2C_8, I2C_9, I2C_10,
914 };
915
916 /**
917 * Get FDT values for i2c bus.
918 *
919 * @param blob Device tree blbo
920 * @return the number of I2C bus
921 */
922 void board_i2c_init(const void *blob);
923
924 /**
925 * Find the I2C bus number by given a FDT I2C node.
926 *
927 * @param blob Device tree blbo
928 * @param node FDT I2C node to find
929 * @return the number of I2C bus (zero based), or -1 on error
930 */
931 int i2c_get_bus_num_fdt(int node);
932
933 /**
934 * Reset the I2C bus represented by the given a FDT I2C node.
935 *
936 * @param blob Device tree blbo
937 * @param node FDT I2C node to find
938 * @return 0 if port was reset, -1 if not found
939 */
940 int i2c_reset_port_fdt(const void *blob, int node);
941
942 #endif /* !CONFIG_DM_I2C */
943
944 #endif /* _I2C_H_ */
945