1 /* 2 * Copyright 2015 - 2017 Rockchip Electronics Co. LTD 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #ifndef __HAL_JPEGD_BASE_H__ 18 #define __HAL_JPEGD_BASE_H__ 19 20 #include <stdio.h> 21 22 #include "mpp_hal.h" 23 #include "mpp_device.h" 24 25 typedef struct PPInfo_t { 26 /* PP parameters */ 27 RK_U8 pp_enable; /* 0 - disable; 1 - enable */ 28 RK_U8 pp_in_fmt; /* PP input format */ 29 RK_U8 pp_out_fmt;/* PP output format */ 30 RK_U8 dither_enable; /* for PP output RGB565 */ 31 RK_U32 crop_width; 32 RK_U32 crop_height; 33 RK_U32 crop_x; 34 RK_U32 crop_y; 35 } PPInfo; 36 37 typedef struct JpegdHalCtx { 38 MppBufSlots packet_slots; 39 MppBufSlots frame_slots; 40 MppDev dev; 41 void *regs; 42 MppBufferGroup group; 43 MppBuffer pTableBase; 44 MppHalApi hal_api; 45 MppCbCtx *dec_cb; 46 47 MppFrameFormat output_fmt; 48 RK_U32 set_output_fmt_flag; 49 RK_U32 hal_debug_enable; 50 RK_U32 frame_count; 51 RK_U32 output_yuv_count; 52 RK_U8 scale; 53 54 RK_S32 pkt_fd; /* input stream's physical address(fd) */ 55 RK_S32 frame_fd; /* output picture's physical address(fd) */ 56 57 RK_U32 have_pp; 58 PPInfo pp_info; 59 const MppDecHwCap *hw_info; 60 } JpegdHalCtx; 61 62 #endif /* __HAL_JPEGD_COMMON_H__ */ 63