1 /******************************************************************************
2 *
3 * Copyright(c) 2016 - 2017 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 *****************************************************************************/
15
16 #include "mp_precomp.h"
17
18 #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
19
20 static u8 *trace_buf = &gl_btc_trace_buf[0];
21
22 /* rssi express in percentage % (dbm = % - 100) */
23 static const u8 wl_rssi_step_8822c[] = {60, 50, 44, 30};
24 static const u8 bt_rssi_step_8822c[] = {8, 15, 20, 25};
25
26 /* Shared-Antenna Coex Table */
27 static const struct btc_coex_table_para table_sant_8822c[] = {
28 {0xffffffff, 0xffffffff}, /*case-0*/
29 {0x55555555, 0x55555555},
30 {0x66555555, 0x66555555},
31 {0xaaaaaaaa, 0xaaaaaaaa},
32 {0x5a5a5a5a, 0x5a5a5a5a},
33 {0xfafafafa, 0xfafafafa}, /*case-5*/
34 {0x6a5a5555, 0xaaaaaaaa},
35 {0x6a5a56aa, 0x6a5a56aa},
36 {0x6a5a5a5a, 0x6a5a5a5a},
37 {0x66555555, 0x5a5a5a5a},
38 {0x66555555, 0x6a5a5a5a}, /*case-10*/
39 {0x66555555, 0xaaaaaaaa},
40 {0x66555555, 0x5a5a5aaa},
41 {0x66555555, 0x6aaa5aaa},
42 {0x66555555, 0xaaaa5aaa},
43 {0x66555555, 0xaaaaaaaa}, /*case-15*/
44 {0xffff55ff, 0xfafafafa},
45 {0xffff55ff, 0x6afa5afa},
46 {0xaaffffaa, 0xfafafafa},
47 {0xaa5555aa, 0x5a5a5a5a},
48 {0xaa5555aa, 0x6a5a5a5a}, /*case-20*/
49 {0xaa5555aa, 0xaaaaaaaa},
50 {0xffffffff, 0x5a5a5a5a},
51 {0xffffffff, 0x5a5a5a5a},
52 {0xffffffff, 0x55555555},
53 {0xffffffff, 0x5a5a5aaa}, /*case-25*/
54 {0x55555555, 0x5a5a5a5a},
55 {0x55555555, 0xaaaaaaaa},
56 {0x55555555, 0x6a5a6a5a},
57 {0x66556655, 0x66556655},
58 {0x66556aaa, 0x6a5a6aaa}, /*case-30*/
59 {0xffffffff, 0x5aaa5aaa},
60 {0x56555555, 0x5a5a5aaa},
61 {0xdaffdaff, 0xdaffdaff},
62 {0x6a555a5a, 0x5a5a5a5a},
63 {0xe5555555, 0xe5555555}, /*case-35*/
64 {0xea5a5a5a, 0xea5a5a5a} };
65
66 /* Non-Shared-Antenna Coex Table */
67 static const struct btc_coex_table_para table_nsant_8822c[] = {
68 {0xffffffff, 0xffffffff}, /*case-100*/
69 {0x55555555, 0x55555555},
70 {0x66555555, 0x66555555},
71 {0xaaaaaaaa, 0xaaaaaaaa},
72 {0x5a5a5a5a, 0x5a5a5a5a},
73 {0xfafafafa, 0xfafafafa}, /*case-105*/
74 {0x5afa5afa, 0x5afa5afa},
75 {0x55555555, 0xfafafafa},
76 {0x66555555, 0xfafafafa},
77 {0x66555555, 0x5a5a5a5a},
78 {0x66555555, 0x6a5a5a5a}, /*case-110*/
79 {0x66555555, 0xaaaaaaaa},
80 {0xffff55ff, 0xfafafafa},
81 {0xffff55ff, 0x5afa5afa},
82 {0xffff55ff, 0xaaaaaaaa},
83 {0xffff55ff, 0xffff55ff}, /*case-115*/
84 {0xaaffffaa, 0x5afa5afa},
85 {0xaaffffaa, 0xaaaaaaaa},
86 {0xffffffff, 0xfafafafa},
87 {0xffffffff, 0x5afa5afa},
88 {0xffffffff, 0xaaaaaaaa},/*case-120*/
89 {0x55ff55ff, 0x5afa5afa},
90 {0x55ff55ff, 0xaaaaaaaa},
91 {0x55ff55ff, 0x55ff55ff},
92 {0x6a555a5a, 0xfafafafa} };
93
94 /* Shared-Antenna TDMA*/
95 static const struct btc_tdma_para tdma_sant_8822c[] = {
96 { {0x00, 0x00, 0x00, 0x00, 0x00} }, /*case-0*/
97 { {0x61, 0x45, 0x03, 0x11, 0x11} }, /*case-1*/
98 { {0x61, 0x3a, 0x03, 0x11, 0x11} },
99 { {0x61, 0x30, 0x03, 0x11, 0x11} },
100 { {0x61, 0x20, 0x03, 0x11, 0x11} },
101 { {0x61, 0x10, 0x03, 0x11, 0x11} }, /*case-5*/
102 { {0x61, 0x45, 0x03, 0x11, 0x10} },
103 { {0x61, 0x3a, 0x03, 0x11, 0x10} },
104 { {0x61, 0x30, 0x03, 0x11, 0x10} },
105 { {0x61, 0x20, 0x03, 0x11, 0x10} },
106 { {0x61, 0x10, 0x03, 0x11, 0x10} }, /*case-10*/
107 { {0x61, 0x08, 0x03, 0x11, 0x14} },
108 { {0x61, 0x08, 0x03, 0x10, 0x14} },
109 { {0x51, 0x08, 0x03, 0x10, 0x54} },
110 { {0x51, 0x08, 0x03, 0x10, 0x55} },
111 { {0x51, 0x08, 0x07, 0x10, 0x54} }, /*case-15*/
112 { {0x51, 0x45, 0x03, 0x10, 0x50} },
113 { {0x51, 0x3a, 0x03, 0x10, 0x50} },
114 { {0x51, 0x30, 0x03, 0x10, 0x50} },
115 { {0x51, 0x20, 0x03, 0x10, 0x50} },
116 { {0x51, 0x10, 0x03, 0x10, 0x50} }, /*case-20*/
117 { {0x51, 0x4a, 0x03, 0x10, 0x50} },
118 { {0x51, 0x0c, 0x03, 0x10, 0x54} },
119 { {0x55, 0x08, 0x03, 0x10, 0x54} },
120 { {0x65, 0x10, 0x03, 0x11, 0x10} },
121 { {0x51, 0x10, 0x03, 0x10, 0x51} }, /*case-25*/
122 { {0x51, 0x08, 0x03, 0x10, 0x50} },
123 { {0x61, 0x08, 0x03, 0x11, 0x11} } };
124
125
126 /* Non-Shared-Antenna TDMA*/
127 static const struct btc_tdma_para tdma_nsant_8822c[] = {
128 { {0x00, 0x00, 0x00, 0x00, 0x00} }, /*case-100*/
129 { {0x61, 0x45, 0x03, 0x11, 0x11} }, /*case-101*/
130 { {0x61, 0x3a, 0x03, 0x11, 0x11} },
131 { {0x61, 0x30, 0x03, 0x11, 0x11} },
132 { {0x61, 0x20, 0x03, 0x11, 0x11} },
133 { {0x61, 0x10, 0x03, 0x11, 0x11} }, /*case-105*/
134 { {0x61, 0x45, 0x03, 0x11, 0x10} },
135 { {0x61, 0x3a, 0x03, 0x11, 0x10} },
136 { {0x61, 0x30, 0x03, 0x11, 0x10} },
137 { {0x61, 0x20, 0x03, 0x11, 0x10} },
138 { {0x61, 0x10, 0x03, 0x11, 0x10} }, /*case-110*/
139 { {0x61, 0x08, 0x03, 0x11, 0x14} },
140 { {0x61, 0x08, 0x03, 0x10, 0x14} },
141 { {0x51, 0x08, 0x03, 0x10, 0x54} },
142 { {0x51, 0x08, 0x03, 0x10, 0x55} },
143 { {0x51, 0x08, 0x07, 0x10, 0x54} }, /*case-115*/
144 { {0x51, 0x45, 0x03, 0x10, 0x50} },
145 { {0x51, 0x3a, 0x03, 0x10, 0x50} },
146 { {0x51, 0x30, 0x03, 0x10, 0x50} },
147 { {0x51, 0x20, 0x03, 0x10, 0x50} },
148 { {0x51, 0x10, 0x03, 0x10, 0x50} }, /*case-120*/
149 { {0x51, 0x08, 0x03, 0x10, 0x50} },
150 { {0x61, 0x30, 0x03, 0x10, 0x11} },
151 { {0x61, 0x08, 0x03, 0x10, 0x11} },
152 { {0x61, 0x08, 0x07, 0x10, 0x14} },
153 { {0x61, 0x08, 0x03, 0x10, 0x10} }, /*case-125*/
154 { {0x61, 0x08, 0x03, 0x11, 0x15} } };
155
156 /* wl_tx_dec_power, bt_tx_dec_power, wl_rx_gain, bt_rx_lna_constrain */
157 static const struct btc_rf_para rf_para_tx_8822c[] = {
158 {0, 0, FALSE, 7}, /* for normal */
159 {0, 16, FALSE, 7}, /* for WL-CPT */
160 {16, 4, TRUE, 4}, /* 2 for RCU SDR */
161 {15, 5, TRUE, 4},
162 {7, 8, TRUE, 4},
163 {6, 10, TRUE, 4},
164 {16, 4, TRUE, 4}, /* 6 for RCU OFC */
165 {15, 5, TRUE, 4},
166 {7, 8, TRUE, 4},
167 {6, 10, TRUE, 4},
168 {16, 4, TRUE, 4}, /* 10 for A2DP SDR */
169 {15, 5, TRUE, 4},
170 {7, 8, TRUE, 4},
171 {6, 10, TRUE, 4},
172 {16, 4, TRUE, 4}, /* 14 for A2DP OFC */
173 {15, 5, TRUE, 4},
174 {7, 8, TRUE, 4},
175 {6, 10, TRUE, 4},
176 {16, 4, TRUE, 4}, /* 18 for A2DP+RCU SDR */
177 {15, 5, TRUE, 4},
178 {7, 8, TRUE, 4},
179 {6, 10, TRUE, 4},
180 {16, 4, TRUE, 4}, /* 22 for A2DP+RCU OFC */
181 {15, 5, TRUE, 4},
182 {7, 8, TRUE, 4},
183 {6, 10, TRUE, 4} };
184
185 static const struct btc_rf_para rf_para_rx_8822c[] = {
186 {0, 0, FALSE, 7}, /* for normal */
187 {0, 16, FALSE, 7}, /* for WL-CPT */
188 {14, 5, TRUE, 5}, /* 2 for RCU SDR */
189 {13, 6, TRUE, 5},
190 {6, 9, TRUE, 5},
191 {4, 11, TRUE, 5},
192 {16, 4, TRUE, 4}, /* 6 for RCU OFC */
193 {15, 5, TRUE, 4},
194 {7, 8, TRUE, 4},
195 {6, 10, TRUE, 4},
196 {16, 4, TRUE, 4}, /* 10 for A2DP SDR */
197 {15, 5, TRUE, 4},
198 {7, 8, TRUE, 4},
199 {6, 10, TRUE, 4},
200 {16, 4, TRUE, 4}, /* 14 for A2DP OFC */
201 {15, 5, TRUE, 4},
202 {7, 8, TRUE, 4},
203 {6, 10, TRUE, 4},
204 {16, 4, TRUE, 4}, /* 18 for A2DP+RCU SDR */
205 {15, 5, TRUE, 4},
206 {7, 8, TRUE, 4},
207 {6, 10, TRUE, 4},
208 {16, 4, TRUE, 4}, /* 22 for A2DP+RCU OFC */
209 {15, 5, TRUE, 4},
210 {7, 8, TRUE, 4},
211 {6, 10, TRUE, 4} };
212
213 const struct btc_5g_afh_map afh_5g_8822c[] = { {0, 0, 0} };
214
215 const struct btc_chip_para btc_chip_para_8822c = {
216 "8822c", /*.chip_name */
217 20211210, /*.para_ver_date */
218 0x27, /*.para_ver */
219 0x20, /* bt_desired_ver */
220 0x7001c, /* wl_desired_ver */
221 TRUE, /* scbd_support */
222 0xaa, /* scbd_reg*/
223 BTC_SCBD_16_BIT, /* scbd_bit_num */
224 TRUE, /* mailbox_support*/
225 TRUE, /* lte_indirect_access */
226 TRUE, /* new_scbd10_def */
227 BTC_INDIRECT_1700, /* indirect_type */
228 BTC_PSTDMA_FORCE_LPSOFF, /* pstdma_type */
229 BTC_BTRSSI_DBM, /* bt_rssi_type */
230 15, /*.ant_isolation */
231 2, /*.rssi_tolerance */
232 2, /* rx_path_num */
233 ARRAY_SIZE(wl_rssi_step_8822c), /*.wl_rssi_step_num */
234 wl_rssi_step_8822c, /*.wl_rssi_step */
235 ARRAY_SIZE(bt_rssi_step_8822c), /*.bt_rssi_step_num */
236 bt_rssi_step_8822c, /*.bt_rssi_step */
237 ARRAY_SIZE(table_sant_8822c), /*.table_sant_num */
238 table_sant_8822c, /*.table_sant = */
239 ARRAY_SIZE(table_nsant_8822c), /*.table_nsant_num */
240 table_nsant_8822c, /*.table_nsant = */
241 ARRAY_SIZE(tdma_sant_8822c), /*.tdma_sant_num */
242 tdma_sant_8822c, /*.tdma_sant = */
243 ARRAY_SIZE(tdma_nsant_8822c), /*.tdma_nsant_num */
244 tdma_nsant_8822c, /*.tdma_nsant */
245 ARRAY_SIZE(rf_para_tx_8822c), /* wl_rf_para_tx_num */
246 rf_para_tx_8822c, /* wl_rf_para_tx */
247 rf_para_rx_8822c, /* wl_rf_para_rx */
248 0x24, /*.bt_afh_span_bw20 */
249 0x36, /*.bt_afh_span_bw40 */
250 ARRAY_SIZE(afh_5g_8822c), /*.afh_5g_num */
251 afh_5g_8822c, /*.afh_5g */
252 halbtc8822c_chip_setup /* chip_setup function */
253 };
254
halbtc8822c_cfg_init(struct btc_coexist * btc)255 void halbtc8822c_cfg_init(struct btc_coexist *btc)
256 {
257 u8 u8tmp = 0;
258
259 /* enable TBTT nterrupt */
260 btc->btc_write_1byte_bitmask(btc, 0x550, 0x8, 0x1);
261
262 /* BT report packet sample rate */
263 /* 0x790[5:0]=0x5 */
264 btc->btc_write_1byte(btc, 0x790, 0x5);
265
266 /* Enable BT counter statistics */
267 btc->btc_write_1byte(btc, 0x778, 0x1);
268
269 /* Enable PTA (3-wire function form BT side) */
270 btc->btc_write_1byte_bitmask(btc, 0x40, 0x20, 0x1);
271 btc->btc_write_1byte_bitmask(btc, 0x41, 0x02, 0x1);
272
273 /* Enable PTA (tx/rx signal form WiFi side) */
274 btc->btc_write_1byte_bitmask(btc, 0x4c6, BIT(4), 0x1);
275 btc->btc_write_1byte_bitmask(btc, 0x4c6, BIT(5), 0x0);
276 /*GNT_BT=1 while select both */
277 btc->btc_write_1byte_bitmask(btc, 0x763, BIT(4), 0x1);
278
279 /* BT_CCA = ~GNT_WL_BB, (not or GNT_BT_BB, LTE_Rx */
280 btc->btc_write_1byte_bitmask(btc, 0x4fc, 0x3, 0x0);
281
282 /* To avoid RF parameter error */
283 btc->btc_set_rf_reg(btc, BTC_RF_B, 0x1, 0xfffff, 0x40000);
284 }
285
halbtc8822c_cfg_ant_switch(struct btc_coexist * btc)286 void halbtc8822c_cfg_ant_switch(struct btc_coexist *btc)
287 {}
288
halbtc8822c_cfg_gnt_fix(struct btc_coexist * btc)289 void halbtc8822c_cfg_gnt_fix(struct btc_coexist *btc)
290 {
291 struct btc_coex_sta *coex_sta = &btc->coex_sta;
292 struct btc_wifi_link_info_ext *link_info_ext = &btc->wifi_link_info_ext;
293 u32 val = 0x40000;
294
295 /* Because WL-S1 5G RF TRX mask affect by GNT_BT
296 * Set debug mode on: GNT_BT=0, GNT_WL=1, BT at BTG
297 */
298 if (coex_sta->kt_ver == 0 &&
299 coex_sta->wl_coex_mode == BTC_WLINK_5G)
300 val = 0x40021;
301 else if (coex_sta->coex_freerun) /* WL S1 force to GNT_WL=1, GNT_BT=0 */
302 val = 0x40021;
303 else
304 val = 0x40000;
305
306 if (btc->board_info.btdm_ant_num == 1) /* BT at S1 for 2-Ant */
307 val = val | BIT(13);
308
309 btc->btc_set_rf_reg(btc, BTC_RF_B, 0x1, 0xfffff, val);
310
311 /* Because WL-S0 2G RF TRX can't masked by GNT_BT
312 * enable "WLS0 BB chage RF mode if GNT_BT = 1" for shared-antenna type
313 * disable:0x1860[3] = 1, enable:0x1860[3] = 0
314 *
315 * enable "AFE DAC off if GNT_WL = 0"
316 * disable 0x1c30[22] = 0,
317 * enable: 0x1c30[22] = 1, 0x1c38[12] = 0, 0x1c38[28] = 1
318 */
319 if (coex_sta->wl_coex_mode == BTC_WLINK_2GFREE) {
320 btc->btc_write_1byte_bitmask(btc, 0x1c32, BIT(6), 0);
321 } else {
322 btc->btc_write_1byte_bitmask(btc, 0x1c32, BIT(6), 1);
323 btc->btc_write_1byte_bitmask(btc, 0x1c39, BIT(4), 0);
324 btc->btc_write_1byte_bitmask(btc, 0x1c3b, BIT(4), 1);
325 }
326
327 /* disable WLS1 BB chage RF mode if GNT_BT
328 * since RF TRx mask can do it
329 */
330 btc->btc_write_1byte_bitmask(btc, 0x4160, BIT(3), 1);
331
332 /* for kt_ver >= 3: 0x1860[3] = 0
333 * always set "WLS0 BB chage RF mode if GNT_WL = 0"
334 * But the BB DAC will be turned off by GNT_BT = 1
335 * 0x1ca7[3] = 1, "don't off BB DAC if GNT_BT = 1"
336 */
337 if (coex_sta->wl_coex_mode == BTC_WLINK_2GFREE) {
338 btc->btc_write_1byte_bitmask(btc, 0x1860, BIT(3), 1);
339 btc->btc_write_1byte_bitmask(btc, 0x1ca7, BIT(3), 1);
340 } else if (coex_sta->wl_coex_mode == BTC_WLINK_5G ||
341 link_info_ext->is_all_under_5g) {
342 if (coex_sta->kt_ver >= 3) {
343 btc->btc_write_1byte_bitmask(btc, 0x1860, BIT(3), 0);
344 btc->btc_write_1byte_bitmask(btc, 0x1ca7, BIT(3), 1);
345 } else {
346 btc->btc_write_1byte_bitmask(btc, 0x1860, BIT(3), 1);
347 }
348 } else if (btc->board_info.btdm_ant_num == 2 ||
349 coex_sta->wl_coex_mode == BTC_WLINK_25GMPORT) {
350 /* non-shared-antenna or MCC-2band */
351 if (coex_sta->kt_ver >= 3) {
352 btc->btc_write_1byte_bitmask(btc, 0x1860, BIT(3), 0);
353 btc->btc_write_1byte_bitmask(btc, 0x1ca7, BIT(3), 1);
354 } else {
355 btc->btc_write_1byte_bitmask(btc, 0x1860, BIT(3), 1);
356 }
357 } else { /* shared-antenna */
358 btc->btc_write_1byte_bitmask(btc, 0x1860, BIT(3), 0);
359 if (coex_sta->kt_ver >= 3)
360 btc->btc_write_1byte_bitmask(btc, 0x1ca7, BIT(3), 0);
361 }
362 }
363
halbtc8822c_cfg_gnt_debug(struct btc_coexist * btc)364 void halbtc8822c_cfg_gnt_debug(struct btc_coexist *btc)
365 {
366 btc->btc_write_1byte_bitmask(btc, 0x66, BIT(4), 0);
367 btc->btc_write_1byte_bitmask(btc, 0x67, BIT(0), 0);
368 btc->btc_write_1byte_bitmask(btc, 0x42, BIT(3), 0);
369 btc->btc_write_1byte_bitmask(btc, 0x65, BIT(7), 0);
370 /* btc->btc_write_1byte_bitmask(btc, 0x73, BIT(3), 0); */
371 }
372
halbtc8822c_cfg_rfe_type(struct btc_coexist * btc)373 void halbtc8822c_cfg_rfe_type(struct btc_coexist *btc)
374 {
375 struct btc_coex_sta *coex_sta = &btc->coex_sta;
376 struct btc_rfe_type *rfe_type = &btc->rfe_type;
377 struct btc_board_info *board_info = &btc->board_info;
378
379 rfe_type->rfe_module_type = board_info->rfe_type;
380 rfe_type->ant_switch_polarity = 0;
381 rfe_type->ant_switch_exist = FALSE;
382 rfe_type->ant_switch_with_bt = FALSE;
383 rfe_type->ant_switch_type = BTC_SWITCH_NONE;
384 rfe_type->ant_switch_diversity = FALSE;
385
386 rfe_type->band_switch_exist = FALSE;
387 rfe_type->band_switch_type = 0;
388 rfe_type->band_switch_polarity = 0;
389
390 if (btc->board_info.btdm_ant_num == 1)
391 rfe_type->wlg_at_btg = TRUE;
392 else
393 rfe_type->wlg_at_btg = FALSE;
394
395 coex_sta->rf4ce_en = FALSE;
396
397 /* Disable LTE Coex Function in WiFi side */
398 btc->btc_write_linderct(btc, 0x38, BIT(7), 0);
399
400 /* BTC_CTT_WL_VS_LTE */
401 btc->btc_write_linderct(btc, 0xa0, 0xffff, 0xffff);
402
403 /* BTC_CTT_BT_VS_LTE */
404 btc->btc_write_linderct(btc, 0xa4, 0xffff, 0xffff);
405 }
406
halbtc8822c_cfg_coexinfo_hw(struct btc_coexist * btc)407 void halbtc8822c_cfg_coexinfo_hw(struct btc_coexist *btc)
408 {
409 u8 *cli_buf = btc->cli_buf, u8tmp[4];
410 u16 u16tmp[4];
411 u32 u32tmp[4];
412 boolean lte_coex_on = FALSE;
413
414 u32tmp[0] = btc->btc_read_linderct(btc, 0x38);
415 u32tmp[1] = btc->btc_read_linderct(btc, 0x54);
416 u8tmp[0] = btc->btc_read_1byte(btc, 0x73);
417 lte_coex_on = ((u32tmp[0] & BIT(7)) >> 7) ? TRUE : FALSE;
418
419 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s",
420 "LTE Coex/Path Owner", ((lte_coex_on) ? "On" : "Off"),
421 ((u8tmp[0] & BIT(2)) ? "WL" : "BT"));
422 CL_PRINTF(cli_buf);
423
424 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
425 "\r\n %-35s = RF:%s_BB:%s/ RF:%s_BB:%s/ %s",
426 "GNT_WL_Ctrl/GNT_BT_Ctrl/Dbg",
427 ((u32tmp[0] & BIT(12)) ? "SW" : "HW"),
428 ((u32tmp[0] & BIT(8)) ? "SW" : "HW"),
429 ((u32tmp[0] & BIT(14)) ? "SW" : "HW"),
430 ((u32tmp[0] & BIT(10)) ? "SW" : "HW"),
431 ((u8tmp[0] & BIT(3)) ? "On" : "Off"));
432 CL_PRINTF(cli_buf);
433
434 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
435 "GNT_WL/GNT_BT", (int)((u32tmp[1] & BIT(2)) >> 2),
436 (int)((u32tmp[1] & BIT(3)) >> 3));
437 CL_PRINTF(cli_buf);
438
439 u32tmp[0] = btc->btc_read_4byte(btc, 0x1c38);
440 u8tmp[0] = btc->btc_read_1byte(btc, 0x1860);
441 u8tmp[1] = btc->btc_read_1byte(btc, 0x4160);
442 u8tmp[2] = btc->btc_read_1byte(btc, 0x1c32);
443 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
444 "\r\n %-35s = %d/ %d/ %d/ %d",
445 "1860[3]/4160[3]/1c30[22]/1c38[28]",
446 (int)((u8tmp[0] & BIT(3)) >> 3),
447 (int)((u8tmp[1] & BIT(3)) >> 3),
448 (int)((u8tmp[2] & BIT(6)) >> 6),
449 (int)((u32tmp[0] & BIT(28)) >> 28));
450 CL_PRINTF(cli_buf);
451
452 u32tmp[0] = btc->btc_read_4byte(btc, 0x430);
453 u32tmp[1] = btc->btc_read_4byte(btc, 0x434);
454 u16tmp[0] = btc->btc_read_2byte(btc, 0x42a);
455 u16tmp[1] = btc->btc_read_1byte(btc, 0x454);
456 u8tmp[0] = btc->btc_read_1byte(btc, 0x426);
457 u8tmp[1] = btc->btc_read_1byte(btc, 0x45e);
458 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
459 "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x/ 0x%x/ 0x%x",
460 "430/434/42a/426/45e[3]/454",
461 u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0],
462 (int)((u8tmp[1] & BIT(3)) >> 3), u16tmp[1]);
463 CL_PRINTF(cli_buf);
464
465 u32tmp[0] = btc->btc_read_4byte(btc, 0x4c);
466 u8tmp[2] = btc->btc_read_1byte(btc, 0x64);
467 u8tmp[0] = btc->btc_read_1byte(btc, 0x4c6);
468 u8tmp[1] = btc->btc_read_1byte(btc, 0x40);
469
470 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
471 "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x/ 0x%x",
472 "4c[24:23]/64[0]/4c6[4]/40[5]/RF_0x1",
473 (int)(u32tmp[0] & (BIT(24) | BIT(23))) >> 23, u8tmp[2] & 0x1,
474 (int)((u8tmp[0] & BIT(4)) >> 4),
475 (int)((u8tmp[1] & BIT(5)) >> 5),
476 (int)(btc->btc_get_rf_reg(btc, BTC_RF_B, 0x1, 0xfffff)));
477 CL_PRINTF(cli_buf);
478
479 u32tmp[0] = btc->btc_read_4byte(btc, 0x550);
480 u8tmp[0] = btc->btc_read_1byte(btc, 0x522);
481 u8tmp[1] = btc->btc_read_1byte(btc, 0x953);
482 u8tmp[2] = btc->btc_read_1byte(btc, 0xc50);
483
484 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
485 "\r\n %-35s = 0x%x/ 0x%x/ %s/ 0x%x",
486 "550/522/4-RxAGC/c50", u32tmp[0], u8tmp[0],
487 (u8tmp[1] & 0x2) ? "On" : "Off", u8tmp[2]);
488 CL_PRINTF(cli_buf);
489 }
490
halbtc8822c_cfg_wl_tx_power(struct btc_coexist * btc)491 void halbtc8822c_cfg_wl_tx_power(struct btc_coexist *btc)
492 {
493 struct btc_coex_dm *coex_dm = &btc->coex_dm;
494
495 btc->btc_reduce_wl_tx_power(btc, coex_dm->cur_wl_pwr_lvl);
496 }
497
halbtc8822c_cfg_wl_rx_gain(struct btc_coexist * btc)498 void halbtc8822c_cfg_wl_rx_gain(struct btc_coexist *btc)
499 {
500 struct btc_coex_dm *coex_dm = &btc->coex_dm;
501 struct btc_wifi_link_info_ext *link_info_ext = &btc->wifi_link_info_ext;
502 u8 i;
503
504 /* WL Rx Low gain on */
505 static const u32 wl_rx_gain_on_HT20[] = {0xff000003,
506 0xbd120003, 0xbe100003, 0xbf080003, 0xbf060003, 0xbf050003,
507 0xbc140003, 0xbb160003, 0xba180003, 0xb91a0003, 0xb81c0003,
508 0xb71e0003, 0xb4200003, 0xb5220003, 0xb4240003, 0xb3260003,
509 0xb2280003, 0xb12a0003, 0xb02c0003, 0xaf2e0003, 0xae300003,
510 0xad320003, 0xac340003, 0xab360003, 0x8d380003, 0x8c3a0003,
511 0x8b3c0003, 0x8a3e0003, 0x6e400003, 0x6d420003, 0x6c440003,
512 0x6b460003, 0x6a480003, 0x694a0003, 0x684c0003, 0x674e0003,
513 0x66500003, 0x65520003, 0x64540003, 0x64560003, 0x007e0403};
514
515 static const u32 wl_rx_gain_on_HT40[] = {0xff000003,
516 0xbd120003, 0xbe100003, 0xbf080003, 0xbf060003, 0xbf050003,
517 0xbc140003, 0xbb160003, 0xba180003, 0xb91a0003, 0xb81c0003,
518 0xb71e0003, 0xb4200003, 0xb5220003, 0xb4240003, 0xb3260003,
519 0xb2280003, 0xb12a0003, 0xb02c0003, 0xaf2e0003, 0xae300003,
520 0xad320003, 0xac340003, 0xab360003, 0x8d380003, 0x8c3a0003,
521 0x8b3c0003, 0x8a3e0003, 0x6e400003, 0x6d420003, 0x6c440003,
522 0x6b460003, 0x6a480003, 0x694a0003, 0x684c0003, 0x674e0003,
523 0x66500003, 0x65520003, 0x64540003, 0x64560003, 0x007e0403};
524
525 /* WL Rx Low gain off */
526 static const u32 wl_rx_gain_off_HT20[] = {0xff000003,
527 0xf4120003, 0xf5100003, 0xf60e0003, 0xf70c0003, 0xf80a0003,
528 0xf3140003, 0xf2160003, 0xf1180003, 0xf01a0003, 0xef1c0003,
529 0xee1e0003, 0xed200003, 0xec220003, 0xeb240003, 0xea260003,
530 0xe9280003, 0xe82a0003, 0xe72c0003, 0xe62e0003, 0xe5300003,
531 0xc8320003, 0xc7340003, 0xc6360003, 0xc5380003, 0xc43a0003,
532 0xc33c0003, 0xc23e0003, 0xc1400003, 0xc0420003, 0xa5440003,
533 0xa4460003, 0xa3480003, 0xa24a0003, 0xa14c0003, 0x834e0003,
534 0x82500003, 0x81520003, 0x80540003, 0x65560003, 0x007e0403};
535
536 static const u32 wl_rx_gain_off_HT40[] = {0xff000003,
537 0xf4120003, 0xf5100003, 0xf60e0003, 0xf70c0003, 0xf80a0003,
538 0xf3140003, 0xf2160003, 0xf1180003, 0xf01a0003, 0xef1c0003,
539 0xee1e0003, 0xed200003, 0xec220003, 0xeb240003, 0xea260003,
540 0xe9280003, 0xe82a0003, 0xe72c0003, 0xe62e0003, 0xe5300003,
541 0xc8320003, 0xc7340003, 0xc6360003, 0xc5380003, 0xc43a0003,
542 0xc33c0003, 0xc23e0003, 0xc1400003, 0xc0420003, 0xa5440003,
543 0xa4460003, 0xa3480003, 0xa24a0003, 0xa14c0003, 0x834e0003,
544 0x82500003, 0x81520003, 0x80540003, 0x65560003, 0x007e0403};
545
546 u32 *wl_rx_gain_on, *wl_rx_gain_off;
547
548 if (coex_dm->cur_wl_rx_low_gain_en) {
549 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
550 "[BTCoex], Hi-Li Table On!\n");
551 BTC_TRACE(trace_buf);
552 #if 0
553 if (link_info_ext->wifi_bw == BTC_WIFI_BW_HT40)
554 wl_rx_gain_on = wl_rx_gain_on_HT40;
555 else
556 wl_rx_gain_on = wl_rx_gain_on_HT20;
557 for (i = 0; i < ARRAY_SIZE(wl_rx_gain_on); i++)
558 btc->btc_write_4byte(btc, 0x1d90, wl_rx_gain_on[i]);
559
560 /* set Rx filter corner RCK offset */
561 btc->btc_set_rf_reg(btc, BTC_RF_A, 0xde, 0xfffff, 0x22);
562 btc->btc_set_rf_reg(btc, BTC_RF_A, 0x1d, 0xfffff, 0x36);
563 btc->btc_set_rf_reg(btc, BTC_RF_B, 0xde, 0xfffff, 0x22);
564 btc->btc_set_rf_reg(btc, BTC_RF_B, 0x1d, 0xfffff, 0x36);
565 #endif
566 } else {
567 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
568 "[BTCoex], Hi-Li Table Off!\n");
569 BTC_TRACE(trace_buf);
570
571 #if 0
572 if (link_info_ext->wifi_bw == BTC_WIFI_BW_HT40)
573 wl_rx_gain_off = wl_rx_gain_off_HT40;
574 else
575 wl_rx_gain_off = wl_rx_gain_off_HT20;
576 for (i = 0; i < ARRAY_SIZE(wl_rx_gain_off); i++)
577 btc->btc_write_4byte(btc, 0x1d90, wl_rx_gain_off[i]);
578
579 /* set Rx filter corner RCK offset */
580 btc->btc_set_rf_reg(btc, BTC_RF_A, 0xde, 0xfffff, 0x20);
581 btc->btc_set_rf_reg(btc, BTC_RF_A, 0x1d, 0xfffff, 0x0);
582 btc->btc_set_rf_reg(btc, BTC_RF_B, 0xde, 0xfffff, 0x20);
583 btc->btc_set_rf_reg(btc, BTC_RF_B, 0x1d, 0xfffff, 0x0);
584 #endif
585
586 }
587 }
588
halbtc8822c_cfg_wlan_act_ips(struct btc_coexist * btc)589 void halbtc8822c_cfg_wlan_act_ips(struct btc_coexist *btc)
590 {}
591
halbtc8822c_cfg_bt_ctrl_act(struct btc_coexist * btc)592 void halbtc8822c_cfg_bt_ctrl_act(struct btc_coexist *btc)
593 {}
594
halbtc8822c_chip_setup(struct btc_coexist * btc,u8 type)595 void halbtc8822c_chip_setup(struct btc_coexist *btc, u8 type)
596 {
597 switch (type) {
598 case BTC_CSETUP_INIT_HW:
599 halbtc8822c_cfg_init(btc);
600 break;
601 case BTC_CSETUP_ANT_SWITCH:
602 halbtc8822c_cfg_ant_switch(btc);
603 break;
604 case BTC_CSETUP_GNT_FIX:
605 halbtc8822c_cfg_gnt_fix(btc);
606 break;
607 case BTC_CSETUP_GNT_DEBUG:
608 halbtc8822c_cfg_gnt_debug(btc);
609 break;
610 case BTC_CSETUP_RFE_TYPE:
611 halbtc8822c_cfg_rfe_type(btc);
612 break;
613 case BTC_CSETUP_COEXINFO_HW:
614 halbtc8822c_cfg_coexinfo_hw(btc);
615 break;
616 case BTC_CSETUP_WL_TX_POWER:
617 halbtc8822c_cfg_wl_tx_power(btc);
618 break;
619 case BTC_CSETUP_WL_RX_GAIN:
620 halbtc8822c_cfg_wl_rx_gain(btc);
621 break;
622 case BTC_CSETUP_WLAN_ACT_IPS:
623 halbtc8822c_cfg_wlan_act_ips(btc);
624 break;
625 case BTC_CSETUP_BT_CTRL_ACT:
626 halbtc8822c_cfg_bt_ctrl_act(btc);
627 break;
628 }
629 }
630 #endif
631