xref: /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852bs/phl/hal_g6/rtl8852b/sdio/rtl8852bs_ops.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1 /******************************************************************************
2  *
3  * Copyright(c) 2016 - 2019 Realtek Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12  * more details.
13  *
14  *****************************************************************************/
15 #define _RTL8852BS_OPS_C_
16 #include "../rtl8852b_hal.h"
17 #include "rtl8852bs.h"
18 
19 
hal_set_ops_8852bs(struct rtw_phl_com_t * phl_com,struct hal_info_t * hal)20 void hal_set_ops_8852bs(struct rtw_phl_com_t *phl_com,
21 					struct hal_info_t *hal)
22 {
23 	struct hal_ops_t *ops = hal_get_ops(hal);
24 
25 	hal_set_ops_8852b(phl_com, hal);
26 
27 	ops->init_hal_spec = init_hal_spec_8852bs;
28 	ops->hal_get_efuse = hal_get_efuse_8852bs;
29 	ops->hal_init = hal_init_8852bs;
30 	ops->hal_deinit = hal_deinit_8852bs;
31 	ops->hal_start = hal_start_8852bs;
32 	ops->hal_stop = hal_stop_8852bs;
33 #ifdef CONFIG_WOWLAN
34 	ops->hal_wow_init = hal_wow_init_8852bs;
35 	ops->hal_wow_deinit = hal_wow_deinit_8852bs;
36 #endif /* CONFIG_WOWLAN */
37 	ops->hal_hci_configure = hal_hci_cfg_8852bs;
38 	ops->init_default_value = init_default_value_8852bs;
39 
40 	ops->hal_mp_init = hal_mp_init_8852bs;
41 	ops->hal_mp_deinit = hal_mp_deinit_8852bs;
42 
43 	ops->enable_interrupt = hal_enable_int_8852bs;
44 	ops->disable_interrupt = hal_disable_int_8852bs;
45 	ops->config_interrupt = hal_config_int_8852bs;
46 	ops->recognize_interrupt = hal_recognize_int_8852bs;
47 	ops->recognize_halt_c2h_interrupt = hal_recognize_halt_c2h_int_8852bs;
48 	ops->clear_interrupt = hal_clear_interrupt_8852bs;
49 	ops->interrupt_handler = hal_int_hdler_8852bs;
50 	ops->restore_interrupt = hal_enable_int_8852bs;
51 }
52 
53 /*
54  * This function copied from 8852bu, maybe we should refine it later...
55  */
hal_mapping_hw_tx_chnl_8852bs(u16 macid,enum rtw_phl_ring_cat cat,u8 band)56 static u8 hal_mapping_hw_tx_chnl_8852bs(u16 macid, enum rtw_phl_ring_cat cat,
57 					u8 band)
58 {
59 	u8 dma_ch = 0;
60 
61 
62 	if (0 == band) {
63 		switch (cat) {
64 		case RTW_PHL_RING_CAT_TID0:/*AC_BE*/
65 		case RTW_PHL_RING_CAT_TID3:
66 		case RTW_PHL_RING_CAT_TID6:/*AC_VO*/
67 		case RTW_PHL_RING_CAT_TID7:
68 			dma_ch = ACH0_QUEUE_IDX_8852B;
69 			break;
70 		case RTW_PHL_RING_CAT_TID1:/*AC_BK*/
71 		case RTW_PHL_RING_CAT_TID2:
72 		case RTW_PHL_RING_CAT_TID4:/*AC_VI*/
73 		case RTW_PHL_RING_CAT_TID5:
74 			dma_ch = ACH2_QUEUE_IDX_8852B;
75 			break;
76 		case RTW_PHL_RING_CAT_MGNT:
77 			dma_ch = MGQ_B0_QUEUE_IDX_8852B;
78 			break;
79 		case RTW_PHL_RING_CAT_HIQ:
80 			dma_ch = HIQ_B0_QUEUE_IDX_8852B;
81 			break;
82 		default:
83 			dma_ch = ACH0_QUEUE_IDX_8852B;
84 			PHL_TRACE(COMP_PHL_DBG, _PHL_WARNING_,
85 				  "[WARNING]unknown category (%d)\n", cat);
86 			break;
87 		}
88 	}else {
89 		dma_ch = ACH0_QUEUE_IDX_8852B;
90 		PHL_TRACE(COMP_PHL_DBG, _PHL_WARNING_,
91 			  "[WARNING]unknown band (%d)\n", band);
92 	}
93 
94 	return dma_ch;
95 }
96 
hal_get_avail_page_8852bs(struct rtw_hal_com_t * hal_com,u8 dma_ch,u16 * host_idx,u16 * hw_idx)97 u16 hal_get_avail_page_8852bs(struct rtw_hal_com_t *hal_com, u8 dma_ch,
98 			u16 *host_idx, u16 *hw_idx)
99 {
100 	enum rtw_hal_status hstatus = RTW_HAL_STATUS_FAILURE;
101 
102 	return hstatus;
103 }
hal_trx_deinit_8852bs(struct hal_info_t * hal)104 static void hal_trx_deinit_8852bs(struct hal_info_t *hal)
105 {
106 }
107 
hal_trx_init_8852bs(struct hal_info_t * hal)108 enum rtw_hal_status hal_trx_init_8852bs(struct hal_info_t *hal)
109 {
110 	enum rtw_hal_status hstatus = RTW_HAL_STATUS_FAILURE;
111 
112 	return hstatus;
113 }
114 
hal_get_fwcmd_queue_idx_8852bs(void)115 static u8 hal_get_fwcmd_queue_idx_8852bs(void)
116 {
117 	return FWCMD_QUEUE_IDX_8852B;
118 }
119 static struct hal_trx_ops ops = {
120 	.init = hal_trx_init_8852bs,
121 	.deinit = hal_trx_deinit_8852bs,
122 	.query_tx_res = hal_get_avail_page_8852bs,
123 	.map_hw_tx_chnl = hal_mapping_hw_tx_chnl_8852bs,
124 	.get_fwcmd_queue_idx = hal_get_fwcmd_queue_idx_8852bs,
125 	.handle_rx_buffer = hal_handle_rx_buffer_8852b,
126 };
127 
hal_hook_trx_ops_8852bs(struct hal_info_t * hal_info)128 u32 hal_hook_trx_ops_8852bs(struct hal_info_t *hal_info)
129 {
130 	enum rtw_hal_status hstatus = RTW_HAL_STATUS_FAILURE;
131 
132 	if (NULL != hal_info) {
133 		hal_info->trx_ops = &ops;
134 		hstatus = RTW_HAL_STATUS_SUCCESS;
135 	}
136 
137 	return hstatus;
138 }
139