xref: /rockchip-linux_mpp/mpp/hal/common/h265/hal_h265e_debug.h (revision 437bfbeb9567cca9cd9080e3f6954aa9d6a94f18)
1 /*
2  * Copyright 2020 Rockchip Electronics Co. LTD
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *      http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 #ifndef __HAL_H265E_DEBUG_H__
18 #define __HAL_H265E_DEBUG_H__
19 
20 #include "mpp_debug.h"
21 
22 #define HAL_H265E_DBG_FUNCTION          (0x00000001)
23 #define HAL_H265E_DBG_SIMPLE            (0x00000002)
24 #define HAL_H265E_DBG_FLOW              (0x00000004)
25 #define HAL_H265E_DBG_DETAIL            (0x00000008)
26 
27 #define HAL_H265E_DBG_REGS              (0x00000010)
28 #define HAL_H265E_DBG_CTL_REGS          (0x00000020)
29 #define HAL_H265E_DBG_RCKUT_REGS        (0x00000040)
30 #define HAL_H265E_DBG_WGT_REGS          (0x00000080)
31 #define HAL_H265E_DBG_RDO_REGS          (0x000000C0)
32 #define HAL_H265E_DBG_ST_REGS           (0x00000100) /* status registers */
33 #define HAL_H265E_DBG_SMART_V3          (0x00000200)
34 
35 #define HAL_H265E_DBG_INPUT             (0x00020000)
36 #define HAL_H265E_DBG_OUTPUT            (0x00040000)
37 #define HAL_H265E_DBG_WRITE_IN_STREAM   (0x00080000)
38 #define HAL_H265E_DBG_WRITE_OUT_STREAM  (0x00100000)
39 
40 #define hal_h265e_dbg(flag, fmt, ...)   _mpp_dbg(hal_h265e_debug, flag, fmt, ## __VA_ARGS__)
41 #define hal_h265e_dbg_f(flag, fmt, ...) _mpp_dbg_f(hal_h265e_debug, flag, fmt, ## __VA_ARGS__)
42 
43 #define hal_h265e_dbg_func(fmt, ...)    hal_h265e_dbg_f(HAL_H265E_DBG_FUNCTION, fmt, ## __VA_ARGS__)
44 #define hal_h265e_dbg_simple(fmt, ...)  hal_h265e_dbg_f(HAL_H265E_DBG_SIMPLE, fmt, ## __VA_ARGS__)
45 #define hal_h265e_dbg_flow(fmt, ...)    hal_h265e_dbg(HAL_H265E_DBG_FLOW, fmt, ## __VA_ARGS__)
46 #define hal_h265e_dbg_detail(fmt, ...)  hal_h265e_dbg(HAL_H265E_DBG_DETAIL, fmt, ## __VA_ARGS__)
47 
48 #define hal_h265e_dbg_regs(fmt, ...)    hal_h265e_dbg(HAL_H265E_DBG_REGS, fmt, ## __VA_ARGS__)
49 #define hal_h265e_dbg_ctl(fmt, ...)     hal_h265e_dbg(HAL_H265E_DBG_CTL_REGS, fmt, ## __VA_ARGS__)
50 #define hal_h265e_dbg_rckut(fmt, ...)   hal_h265e_dbg(HAL_H265E_DBG_RCKUT_REGS, fmt, ## __VA_ARGS__)
51 #define hal_h265e_dbg_wgt(fmt, ...)     hal_h265e_dbg(HAL_H265E_DBG_WGT_REGS, fmt, ## __VA_ARGS__)
52 #define hal_h265e_dbg_rdo(fmt, ...)     hal_h265e_dbg(HAL_H265E_DBG_RDO_REGS, fmt, ## __VA_ARGS__)
53 #define hal_h265e_dbg_st(fmt, ...)      hal_h265e_dbg(HAL_H265E_DBG_ST_REGS, fmt, ## __VA_ARGS__)
54 #define hal_h265e_dbg_smartv3(fmt, ...) hal_h265e_dbg(HAL_H265E_DBG_SMART_V3, fmt, ## __VA_ARGS__)
55 
56 #define hal_h265e_dbg_input(fmt, ...)   hal_h265e_dbg(HAL_H265E_DBG_INPUT, fmt, ## __VA_ARGS__)
57 #define hal_h265e_dbg_output(fmt, ...)  hal_h265e_dbg(HAL_H265E_DBG_OUTPUT, fmt, ## __VA_ARGS__)
58 
59 #define hal_h265e_enter()               hal_h265e_dbg_flow("(%d) enter\n", __LINE__);
60 #define hal_h265e_leave()               hal_h265e_dbg_flow("(%d) leave\n", __LINE__);
61 
62 extern RK_U32 hal_h265e_debug;
63 
64 #endif
65