1 /*
2 * Copyright 2020 Rockchip Electronics Co. LTD
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #define MODULE_TAG "hal_h265d_api"
18
19 #include <stdio.h>
20 #include <string.h>
21
22 #include "mpp_env.h"
23 #include "mpp_mem.h"
24 #include "mpp_debug.h"
25
26 #include "hal_h265d_ctx.h"
27 #include "hal_h265d_api.h"
28 #include "hal_h265d_rkv.h"
29 #include "hal_h265d_vdpu34x.h"
30 #include "hal_h265d_vdpu382.h"
31
32 RK_U32 hal_h265d_debug = 0;
33
hal_h265d_init(void * ctx,MppHalCfg * cfg)34 MPP_RET hal_h265d_init(void *ctx, MppHalCfg *cfg)
35 {
36 MPP_RET ret = MPP_NOK;
37 HalH265dCtx *p = (HalH265dCtx *)ctx;
38 MppClientType client_type = VPU_CLIENT_BUTT;
39 RK_U32 vcodec_type = mpp_get_vcodec_type();
40 RK_U32 hw_id = 0;
41
42 if (!(vcodec_type & (HAVE_RKVDEC | HAVE_HEVC_DEC))) {
43 mpp_err_f("Can not found valid H.265 decoder hardware on platform %08x\n", vcodec_type);
44 return ret;
45 }
46
47 client_type = (vcodec_type & HAVE_HEVC_DEC) ?
48 VPU_CLIENT_HEVC_DEC : VPU_CLIENT_RKVDEC;
49
50 ret = mpp_dev_init(&cfg->dev, client_type);
51 if (ret) {
52 mpp_err("mpp_dev_init failed ret: %d\n", ret);
53 return ret;
54 }
55
56 hw_id = mpp_get_client_hw_id(client_type);
57 p->dev = cfg->dev;
58 p->is_v345 = (hw_id == HWID_VDPU345);
59 p->is_v34x = (hw_id == HWID_VDPU34X || hw_id == HWID_VDPU38X);
60 p->client_type = client_type;
61
62 if (hw_id == HWID_VDPU382_RK3528 || hw_id == HWID_VDPU382_RK3562)
63 p->api = &hal_h265d_vdpu382;
64 else if (p->is_v34x)
65 p->api = &hal_h265d_vdpu34x;
66 else
67 p->api = &hal_h265d_rkv;
68
69 cfg->support_fast_mode = 1;
70
71 p->cfg = cfg->cfg;
72 p->slots = cfg->frame_slots;
73 p->dec_cb = cfg->dec_cb;
74 p->fast_mode = cfg->cfg->base.fast_parse;
75 p->packet_slots = cfg->packet_slots;
76
77 mpp_env_get_u32("hal_h265d_debug", &hal_h265d_debug, 0);
78
79 ret = p->api->init(ctx, cfg);
80
81 return ret;
82 }
83
hal_h265d_deinit(void * ctx)84 MPP_RET hal_h265d_deinit(void *ctx)
85 {
86 MPP_RET ret = MPP_NOK;
87 HalH265dCtx *p = (HalH265dCtx *)ctx;
88
89 if (p && p->api && p->api->deinit)
90 ret = p->api->deinit(ctx);
91
92 if (p->dev) {
93 mpp_dev_deinit(p->dev);
94 p->dev = NULL;
95 }
96
97 return ret;
98 }
99
hal_h265d_gen_regs(void * ctx,HalTaskInfo * task)100 MPP_RET hal_h265d_gen_regs(void *ctx, HalTaskInfo *task)
101 {
102 MPP_RET ret = MPP_NOK;
103 HalH265dCtx *p = (HalH265dCtx *)ctx;
104
105 if (p && p->api && p->api->reg_gen)
106 ret = p->api->reg_gen(ctx, task);
107
108 return ret;
109 }
110
hal_h265d_start(void * ctx,HalTaskInfo * task)111 MPP_RET hal_h265d_start(void *ctx, HalTaskInfo *task)
112 {
113 MPP_RET ret = MPP_NOK;
114 HalH265dCtx *p = (HalH265dCtx *)ctx;
115
116 if (p && p->api && p->api->start)
117 ret = p->api->start(ctx, task);
118
119 return ret;
120 }
121
hal_h265d_wait(void * ctx,HalTaskInfo * task)122 MPP_RET hal_h265d_wait(void *ctx, HalTaskInfo *task)
123 {
124 MPP_RET ret = MPP_NOK;
125 HalH265dCtx *p = (HalH265dCtx *)ctx;
126
127 if (p && p->api && p->api->wait)
128 ret = p->api->wait(ctx, task);
129
130 return ret;
131 }
132
hal_h265d_reset(void * ctx)133 MPP_RET hal_h265d_reset(void *ctx)
134 {
135 MPP_RET ret = MPP_NOK;
136 HalH265dCtx *p = (HalH265dCtx *)ctx;
137
138 if (p && p->api && p->api->reset)
139 ret = p->api->reset(ctx);
140
141 return ret;
142 }
143
hal_h265d_flush(void * ctx)144 MPP_RET hal_h265d_flush(void *ctx)
145 {
146 MPP_RET ret = MPP_NOK;
147 HalH265dCtx *p = (HalH265dCtx *)ctx;
148
149 if (p && p->api && p->api->flush)
150 ret = p->api->flush(ctx);
151
152 return ret;
153 }
154
hal_h265d_control(void * ctx,MpiCmd cmd,void * param)155 MPP_RET hal_h265d_control(void *ctx, MpiCmd cmd, void *param)
156 {
157 MPP_RET ret = MPP_OK;
158 HalH265dCtx *p = (HalH265dCtx *)ctx;
159
160 if (p && p->api && p->api->control)
161 ret = p->api->control(ctx, cmd, param);
162
163 return ret;
164 }
165
166 const MppHalApi hal_api_h265d = {
167 .name = "h265d_rkdec",
168 .type = MPP_CTX_DEC,
169 .coding = MPP_VIDEO_CodingHEVC,
170 .ctx_size = sizeof(HalH265dCtx),
171 .flag = 0,
172 .init = hal_h265d_init,
173 .deinit = hal_h265d_deinit,
174 .reg_gen = hal_h265d_gen_regs,
175 .start = hal_h265d_start,
176 .wait = hal_h265d_wait,
177 .reset = hal_h265d_reset,
178 .flush = hal_h265d_flush,
179 .control = hal_h265d_control,
180 };
181