xref: /rockchip-linux_mpp/mpp/codec/enc/h265/h265e_codec.h (revision 437bfbeb9567cca9cd9080e3f6954aa9d6a94f18)
1 /*
2  * Copyright 2015 Rockchip Electronics Co. LTD
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *      http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 #ifndef __H265E_CODEC_H__
17 #define __H265E_CODEC_H__
18 
19 #include "mpp_debug.h"
20 
21 #include "mpp_common.h"
22 #include "mpp_rc.h"
23 
24 #include "h265e_syntax.h"
25 #include "h265e_syntax_new.h"
26 #include "h265e_dpb.h"
27 #include "enc_impl_api.h"
28 
29 #define H265E_DBG_FUNCTION          (0x00000001)
30 #define H265E_DBG_INPUT             (0x00000010)
31 #define H265E_DBG_OUTPUT            (0x00000020)
32 #define H265E_DBG_PS                (0x00000040)
33 #define H265E_DBG_DPB               (0x00000080)
34 #define H265E_DBG_DPB_REF           (0x000000c0)
35 
36 
37 #define H265E_DBG_SLICE             (0x00000100)
38 #define H265E_DBG_HEADER            (0x00000200)
39 #define H265E_DBG_API               (0x00000400)
40 #define H265E_DBG_SKIP              (0x00000800)
41 
42 
43 #define H265E_PS_BUF_SIZE           512
44 #define H265E_SEI_BUF_SIZE          1024
45 #define H265E_EXTRA_INFO_BUF_SIZE   (H265E_PS_BUF_SIZE + H265E_SEI_BUF_SIZE)
46 
47 extern RK_U32 h265e_debug;
48 
49 #define h265e_dbg(flag, fmt, ...)   _mpp_dbg(h265e_debug, flag, fmt, ## __VA_ARGS__)
50 #define h265e_dbg_f(flag, fmt, ...) _mpp_dbg_f(h265e_debug, flag, fmt, ## __VA_ARGS__)
51 
52 #define h265e_dbg_func(fmt, ...)    h265e_dbg_f(H265E_DBG_FUNCTION, fmt, ## __VA_ARGS__)
53 #define h265e_dbg_input(fmt, ...)   h265e_dbg(H265E_DBG_INPUT, fmt, ## __VA_ARGS__)
54 #define h265e_dbg_output(fmt, ...)  h265e_dbg(H265E_DBG_OUTPUT, fmt, ## __VA_ARGS__)
55 
56 #define h265e_dbg_ps(fmt, ...)      h265e_dbg(H265E_DBG_PS, fmt, ## __VA_ARGS__)
57 #define h265e_dbg_dpb(fmt, ...)     h265e_dbg(H265E_DBG_DPB, fmt, ## __VA_ARGS__)
58 #define h265e_dbg_slice(fmt, ...)   h265e_dbg(H265E_DBG_SLICE, fmt, ## __VA_ARGS__)
59 #define h265e_dbg_skip(fmt, ...)   h265e_dbg(H265E_DBG_SKIP, fmt, ## __VA_ARGS__)
60 
61 #define h265e_dbg_dpb_ref(fmt, ...)  h265e_dbg(H265E_DBG_DPB_REF, fmt, ## __VA_ARGS__)
62 
63 typedef struct H265eCtx_t {
64     MppEncCfgSet        *cfg;
65     RK_U32              rc_ready;
66     RK_S32              idr_request;
67 
68     H265eVps            vps;
69     H265eSps            sps;
70     H265ePps            pps;
71     H265eSlice          *slice;
72     H265eDpb            *dpb;
73     RK_U32              plt_flag;
74 
75     void                *extra_info;
76     H265eSyntax_new     syntax;
77     H265eFeedback       feedback;
78     struct list_head    rc_list;
79 } H265eCtx;
80 
81 #endif
82