1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* 3 * Copyright (c) 2025, Rockchip Electronics Co., Ltd. 4 */ 5 6 #ifndef __PLAT_ROCKCHIP_DMC_RK3576_H__ 7 #define __PLAT_ROCKCHIP_DMC_RK3576_H__ 8 9 #define MAX_CH_NUM (2) 10 #define CTL_PORT_NUM (5) 11 12 /* DDR_GRF Register */ 13 #define GRF_CH_CON(ch, n) ((((ch) % 2) * 0x100) + ((n) * 4)) 14 #define DDR_GRF_CH_STATUS16(ch) (0x220 + ((ch) * 0x100)) 15 #define GRF_DDRPHY_CON(n) (0x530 + ((n) * 4)) 16 #define GRF_DDRPHY_CON0(ch) (0x530 + (((ch) % 2) * 0x4)) 17 #define DDR_GRF_COMMON_CON(n) (0x540 + ((n) * 4)) 18 19 /* PMUGRF Register */ 20 #define PMUGRF_OS_REG(n) (0x200 + ((n) * 4)) 21 22 struct low_power_st { 23 uint32_t pwrctl; 24 uint32_t clkgatectl; 25 uint32_t dfi_lp_mode_apb; 26 uint32_t grf_ddr_con0; 27 uint32_t grf_ddr_con1; 28 uint32_t grf_ddr_con6; 29 uint32_t grf_ddr_con7; 30 uint32_t grf_ddr_con9; 31 uint32_t grf_ddrphy_con0; 32 uint32_t hwlp_0; 33 uint32_t hwlp_c; 34 uint32_t pcl_pd; 35 }; 36 37 struct rk3576_dmc_config { 38 struct low_power_st low_power[MAX_CH_NUM]; 39 }; 40 41 void dmc_save(void); 42 void dmc_restore(void); 43 44 #endif /* __PLAT_ROCKCHIP_DMC_RK3576_H__ */ 45