1 /*
2 * Generic PHY Management code
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 *
6 * Copyright 2011 Freescale Semiconductor, Inc.
7 * author Andy Fleming
8 *
9 * Based loosely off of Linux's PHY Lib
10 */
11
12 #include <config.h>
13 #include <common.h>
14 #include <console.h>
15 #include <dm.h>
16 #include <malloc.h>
17 #include <net.h>
18 #include <command.h>
19 #include <miiphy.h>
20 #include <phy.h>
21 #include <errno.h>
22 #include <linux/err.h>
23 #include <linux/compiler.h>
24
25 DECLARE_GLOBAL_DATA_PTR;
26
27 /* Generic PHY support and helper functions */
28
29 /**
30 * genphy_config_advert - sanitize and advertise auto-negotation parameters
31 * @phydev: target phy_device struct
32 *
33 * Description: Writes MII_ADVERTISE with the appropriate values,
34 * after sanitizing the values to make sure we only advertise
35 * what is supported. Returns < 0 on error, 0 if the PHY's advertisement
36 * hasn't changed, and > 0 if it has changed.
37 */
genphy_config_advert(struct phy_device * phydev)38 static int genphy_config_advert(struct phy_device *phydev)
39 {
40 u32 advertise;
41 int oldadv, adv, bmsr;
42 int err, changed = 0;
43
44 /* Only allow advertising what this PHY supports */
45 phydev->advertising &= phydev->supported;
46 advertise = phydev->advertising;
47
48 /* Setup standard advertisement */
49 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
50 oldadv = adv;
51
52 if (adv < 0)
53 return adv;
54
55 adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
56 ADVERTISE_PAUSE_ASYM);
57 if (advertise & ADVERTISED_10baseT_Half)
58 adv |= ADVERTISE_10HALF;
59 if (advertise & ADVERTISED_10baseT_Full)
60 adv |= ADVERTISE_10FULL;
61 if (advertise & ADVERTISED_100baseT_Half)
62 adv |= ADVERTISE_100HALF;
63 if (advertise & ADVERTISED_100baseT_Full)
64 adv |= ADVERTISE_100FULL;
65 if (advertise & ADVERTISED_Pause)
66 adv |= ADVERTISE_PAUSE_CAP;
67 if (advertise & ADVERTISED_Asym_Pause)
68 adv |= ADVERTISE_PAUSE_ASYM;
69 if (advertise & ADVERTISED_1000baseX_Half)
70 adv |= ADVERTISE_1000XHALF;
71 if (advertise & ADVERTISED_1000baseX_Full)
72 adv |= ADVERTISE_1000XFULL;
73
74 if (adv != oldadv) {
75 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
76
77 if (err < 0)
78 return err;
79 changed = 1;
80 }
81
82 bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
83 if (bmsr < 0)
84 return bmsr;
85
86 /* Per 802.3-2008, Section 22.2.4.2.16 Extended status all
87 * 1000Mbits/sec capable PHYs shall have the BMSR_ESTATEN bit set to a
88 * logical 1.
89 */
90 if (!(bmsr & BMSR_ESTATEN))
91 return changed;
92
93 /* Configure gigabit if it's supported */
94 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
95 oldadv = adv;
96
97 if (adv < 0)
98 return adv;
99
100 adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
101
102 if (phydev->supported & (SUPPORTED_1000baseT_Half |
103 SUPPORTED_1000baseT_Full)) {
104 if (advertise & SUPPORTED_1000baseT_Half)
105 adv |= ADVERTISE_1000HALF;
106 if (advertise & SUPPORTED_1000baseT_Full)
107 adv |= ADVERTISE_1000FULL;
108 }
109
110 if (adv != oldadv)
111 changed = 1;
112
113 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, adv);
114 if (err < 0)
115 return err;
116
117 return changed;
118 }
119
120
121 /**
122 * genphy_setup_forced - configures/forces speed/duplex from @phydev
123 * @phydev: target phy_device struct
124 *
125 * Description: Configures MII_BMCR to force speed/duplex
126 * to the values in phydev. Assumes that the values are valid.
127 */
genphy_setup_forced(struct phy_device * phydev)128 static int genphy_setup_forced(struct phy_device *phydev)
129 {
130 int err;
131 int ctl = BMCR_ANRESTART;
132
133 phydev->pause = phydev->asym_pause = 0;
134
135 if (SPEED_1000 == phydev->speed)
136 ctl |= BMCR_SPEED1000;
137 else if (SPEED_100 == phydev->speed)
138 ctl |= BMCR_SPEED100;
139
140 if (DUPLEX_FULL == phydev->duplex)
141 ctl |= BMCR_FULLDPLX;
142
143 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
144
145 return err;
146 }
147
148
149 /**
150 * genphy_restart_aneg - Enable and Restart Autonegotiation
151 * @phydev: target phy_device struct
152 */
genphy_restart_aneg(struct phy_device * phydev)153 int genphy_restart_aneg(struct phy_device *phydev)
154 {
155 int ctl;
156
157 ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
158
159 if (ctl < 0)
160 return ctl;
161
162 ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
163
164 /* Don't isolate the PHY if we're negotiating */
165 ctl &= ~(BMCR_ISOLATE);
166
167 ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
168
169 return ctl;
170 }
171
172
173 /**
174 * genphy_config_aneg - restart auto-negotiation or write BMCR
175 * @phydev: target phy_device struct
176 *
177 * Description: If auto-negotiation is enabled, we configure the
178 * advertising, and then restart auto-negotiation. If it is not
179 * enabled, then we write the BMCR.
180 */
genphy_config_aneg(struct phy_device * phydev)181 int genphy_config_aneg(struct phy_device *phydev)
182 {
183 int result;
184
185 if (AUTONEG_ENABLE != phydev->autoneg)
186 return genphy_setup_forced(phydev);
187
188 result = genphy_config_advert(phydev);
189
190 if (result < 0) /* error */
191 return result;
192
193 if (result == 0) {
194 /* Advertisment hasn't changed, but maybe aneg was never on to
195 * begin with? Or maybe phy was isolated? */
196 int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
197
198 if (ctl < 0)
199 return ctl;
200
201 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
202 result = 1; /* do restart aneg */
203 }
204
205 /* Only restart aneg if we are advertising something different
206 * than we were before. */
207 if (result > 0)
208 result = genphy_restart_aneg(phydev);
209
210 return result;
211 }
212
213 /**
214 * genphy_update_link - update link status in @phydev
215 * @phydev: target phy_device struct
216 *
217 * Description: Update the value in phydev->link to reflect the
218 * current link value. In order to do this, we need to read
219 * the status register twice, keeping the second value.
220 */
genphy_update_link(struct phy_device * phydev)221 int genphy_update_link(struct phy_device *phydev)
222 {
223 unsigned int mii_reg;
224
225 /*
226 * Wait if the link is up, and autonegotiation is in progress
227 * (ie - we're capable and it's not done)
228 */
229 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
230
231 /*
232 * If we already saw the link up, and it hasn't gone down, then
233 * we don't need to wait for autoneg again
234 */
235 if (phydev->link && mii_reg & BMSR_LSTATUS)
236 return 0;
237
238 if ((phydev->autoneg == AUTONEG_ENABLE) &&
239 !(mii_reg & BMSR_ANEGCOMPLETE)) {
240 int i = 0;
241
242 printf("%s Waiting for PHY auto negotiation to complete",
243 phydev->dev->name);
244 while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
245 /*
246 * Timeout reached ?
247 */
248 if (i > PHY_ANEG_TIMEOUT) {
249 printf(" TIMEOUT !\n");
250 phydev->link = 0;
251 return -ETIMEDOUT;
252 }
253
254 if (ctrlc()) {
255 puts("user interrupt!\n");
256 phydev->link = 0;
257 return -EINTR;
258 }
259
260 if ((i++ % 500) == 0)
261 printf(".");
262
263 udelay(1000); /* 1 ms */
264 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
265 }
266 printf(" done\n");
267 phydev->link = 1;
268 } else {
269 /* Read the link a second time to clear the latched state */
270 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
271
272 if (mii_reg & BMSR_LSTATUS)
273 phydev->link = 1;
274 else
275 phydev->link = 0;
276 }
277
278 return 0;
279 }
280
281 /*
282 * Generic function which updates the speed and duplex. If
283 * autonegotiation is enabled, it uses the AND of the link
284 * partner's advertised capabilities and our advertised
285 * capabilities. If autonegotiation is disabled, we use the
286 * appropriate bits in the control register.
287 *
288 * Stolen from Linux's mii.c and phy_device.c
289 */
genphy_parse_link(struct phy_device * phydev)290 int genphy_parse_link(struct phy_device *phydev)
291 {
292 int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
293
294 /* We're using autonegotiation */
295 if (phydev->autoneg == AUTONEG_ENABLE) {
296 u32 lpa = 0;
297 int gblpa = 0;
298 u32 estatus = 0;
299
300 /* Check for gigabit capability */
301 if (phydev->supported & (SUPPORTED_1000baseT_Full |
302 SUPPORTED_1000baseT_Half)) {
303 /* We want a list of states supported by
304 * both PHYs in the link
305 */
306 gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
307 if (gblpa < 0) {
308 debug("Could not read MII_STAT1000. Ignoring gigabit capability\n");
309 gblpa = 0;
310 }
311 gblpa &= phy_read(phydev,
312 MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
313 }
314
315 /* Set the baseline so we only have to set them
316 * if they're different
317 */
318 phydev->speed = SPEED_10;
319 phydev->duplex = DUPLEX_HALF;
320
321 /* Check the gigabit fields */
322 if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
323 phydev->speed = SPEED_1000;
324
325 if (gblpa & PHY_1000BTSR_1000FD)
326 phydev->duplex = DUPLEX_FULL;
327
328 /* We're done! */
329 return 0;
330 }
331
332 lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
333 lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
334
335 if (lpa & (LPA_100FULL | LPA_100HALF)) {
336 phydev->speed = SPEED_100;
337
338 if (lpa & LPA_100FULL)
339 phydev->duplex = DUPLEX_FULL;
340
341 } else if (lpa & LPA_10FULL)
342 phydev->duplex = DUPLEX_FULL;
343
344 /*
345 * Extended status may indicate that the PHY supports
346 * 1000BASE-T/X even though the 1000BASE-T registers
347 * are missing. In this case we can't tell whether the
348 * peer also supports it, so we only check extended
349 * status if the 1000BASE-T registers are actually
350 * missing.
351 */
352 if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP))
353 estatus = phy_read(phydev, MDIO_DEVAD_NONE,
354 MII_ESTATUS);
355
356 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF |
357 ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) {
358 phydev->speed = SPEED_1000;
359 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL))
360 phydev->duplex = DUPLEX_FULL;
361 }
362
363 } else {
364 u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
365
366 phydev->speed = SPEED_10;
367 phydev->duplex = DUPLEX_HALF;
368
369 if (bmcr & BMCR_FULLDPLX)
370 phydev->duplex = DUPLEX_FULL;
371
372 if (bmcr & BMCR_SPEED1000)
373 phydev->speed = SPEED_1000;
374 else if (bmcr & BMCR_SPEED100)
375 phydev->speed = SPEED_100;
376 }
377
378 return 0;
379 }
380
genphy_config(struct phy_device * phydev)381 int genphy_config(struct phy_device *phydev)
382 {
383 int val;
384 u32 features;
385
386 features = (SUPPORTED_TP | SUPPORTED_MII
387 | SUPPORTED_AUI | SUPPORTED_FIBRE |
388 SUPPORTED_BNC);
389
390 /* Do we support autonegotiation? */
391 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
392
393 if (val < 0)
394 return val;
395
396 if (val & BMSR_ANEGCAPABLE)
397 features |= SUPPORTED_Autoneg;
398
399 if (val & BMSR_100FULL)
400 features |= SUPPORTED_100baseT_Full;
401 if (val & BMSR_100HALF)
402 features |= SUPPORTED_100baseT_Half;
403 if (val & BMSR_10FULL)
404 features |= SUPPORTED_10baseT_Full;
405 if (val & BMSR_10HALF)
406 features |= SUPPORTED_10baseT_Half;
407
408 if (val & BMSR_ESTATEN) {
409 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
410
411 if (val < 0)
412 return val;
413
414 if (val & ESTATUS_1000_TFULL)
415 features |= SUPPORTED_1000baseT_Full;
416 if (val & ESTATUS_1000_THALF)
417 features |= SUPPORTED_1000baseT_Half;
418 if (val & ESTATUS_1000_XFULL)
419 features |= SUPPORTED_1000baseX_Full;
420 if (val & ESTATUS_1000_XHALF)
421 features |= SUPPORTED_1000baseX_Half;
422 }
423
424 phydev->supported &= features;
425 phydev->advertising &= features;
426
427 genphy_config_aneg(phydev);
428
429 return 0;
430 }
431
genphy_startup(struct phy_device * phydev)432 int genphy_startup(struct phy_device *phydev)
433 {
434 int ret;
435
436 ret = genphy_update_link(phydev);
437 if (ret)
438 return ret;
439
440 return genphy_parse_link(phydev);
441 }
442
genphy_shutdown(struct phy_device * phydev)443 int genphy_shutdown(struct phy_device *phydev)
444 {
445 return 0;
446 }
447
448 static struct phy_driver genphy_driver = {
449 .uid = 0xffffffff,
450 .mask = 0xffffffff,
451 .name = "Generic PHY",
452 .features = PHY_GBIT_FEATURES | SUPPORTED_MII |
453 SUPPORTED_AUI | SUPPORTED_FIBRE |
454 SUPPORTED_BNC,
455 .config = genphy_config,
456 .startup = genphy_startup,
457 .shutdown = genphy_shutdown,
458 };
459
460 static LIST_HEAD(phy_drivers);
461
phy_init(void)462 int phy_init(void)
463 {
464 #ifdef CONFIG_MV88E61XX_SWITCH
465 phy_mv88e61xx_init();
466 #endif
467 #ifdef CONFIG_PHY_AQUANTIA
468 phy_aquantia_init();
469 #endif
470 #ifdef CONFIG_PHY_ATHEROS
471 phy_atheros_init();
472 #endif
473 #ifdef CONFIG_PHY_BROADCOM
474 phy_broadcom_init();
475 #endif
476 #ifdef CONFIG_PHY_CORTINA
477 phy_cortina_init();
478 #endif
479 #ifdef CONFIG_PHY_DAVICOM
480 phy_davicom_init();
481 #endif
482 #ifdef CONFIG_PHY_ET1011C
483 phy_et1011c_init();
484 #endif
485 #ifdef CONFIG_PHY_LXT
486 phy_lxt_init();
487 #endif
488 #ifdef CONFIG_PHY_MARVELL
489 phy_marvell_init();
490 #endif
491 #ifdef CONFIG_PHY_MICREL_KSZ8XXX
492 phy_micrel_ksz8xxx_init();
493 #endif
494 #ifdef CONFIG_PHY_MICREL_KSZ90X1
495 phy_micrel_ksz90x1_init();
496 #endif
497 #ifdef CONFIG_PHY_NATSEMI
498 phy_natsemi_init();
499 #endif
500 #ifdef CONFIG_PHY_REALTEK
501 phy_realtek_init();
502 #endif
503 #ifdef CONFIG_PHY_RK630
504 phy_rk630_init();
505 #endif
506 #ifdef CONFIG_PHY_ROCKCHIP
507 phy_rockchip_fephy_init();
508 #endif
509 #ifdef CONFIG_PHY_SMSC
510 phy_smsc_init();
511 #endif
512 #ifdef CONFIG_PHY_TERANETICS
513 phy_teranetics_init();
514 #endif
515 #ifdef CONFIG_PHY_TI
516 phy_ti_init();
517 #endif
518 #ifdef CONFIG_PHY_VITESSE
519 phy_vitesse_init();
520 #endif
521 #ifdef CONFIG_PHY_XILINX
522 phy_xilinx_init();
523 #endif
524 #ifdef CONFIG_PHY_MSCC
525 phy_mscc_init();
526 #endif
527 #ifdef CONFIG_PHY_FIXED
528 phy_fixed_init();
529 #endif
530 return 0;
531 }
532
phy_register(struct phy_driver * drv)533 int phy_register(struct phy_driver *drv)
534 {
535 INIT_LIST_HEAD(&drv->list);
536 list_add_tail(&drv->list, &phy_drivers);
537
538 #ifdef CONFIG_NEEDS_MANUAL_RELOC
539 if (drv->probe)
540 drv->probe += gd->reloc_off;
541 if (drv->config)
542 drv->config += gd->reloc_off;
543 if (drv->startup)
544 drv->startup += gd->reloc_off;
545 if (drv->shutdown)
546 drv->shutdown += gd->reloc_off;
547 if (drv->readext)
548 drv->readext += gd->reloc_off;
549 if (drv->writeext)
550 drv->writeext += gd->reloc_off;
551 if (drv->read_mmd)
552 drv->read_mmd += gd->reloc_off;
553 if (drv->write_mmd)
554 drv->write_mmd += gd->reloc_off;
555 #endif
556 return 0;
557 }
558
phy_set_supported(struct phy_device * phydev,u32 max_speed)559 int phy_set_supported(struct phy_device *phydev, u32 max_speed)
560 {
561 /* The default values for phydev->supported are provided by the PHY
562 * driver "features" member, we want to reset to sane defaults first
563 * before supporting higher speeds.
564 */
565 phydev->supported &= PHY_DEFAULT_FEATURES;
566
567 switch (max_speed) {
568 default:
569 return -ENOTSUPP;
570 case SPEED_1000:
571 phydev->supported |= PHY_1000BT_FEATURES;
572 /* fall through */
573 case SPEED_100:
574 phydev->supported |= PHY_100BT_FEATURES;
575 /* fall through */
576 case SPEED_10:
577 phydev->supported |= PHY_10BT_FEATURES;
578 }
579
580 return 0;
581 }
582
phy_probe(struct phy_device * phydev)583 static int phy_probe(struct phy_device *phydev)
584 {
585 int err = 0;
586
587 phydev->advertising = phydev->supported = phydev->drv->features;
588 phydev->mmds = phydev->drv->mmds;
589
590 if (phydev->drv->probe)
591 err = phydev->drv->probe(phydev);
592
593 return err;
594 }
595
generic_for_interface(phy_interface_t interface)596 static struct phy_driver *generic_for_interface(phy_interface_t interface)
597 {
598 #ifdef CONFIG_PHYLIB_10G
599 if (is_10g_interface(interface))
600 return &gen10g_driver;
601 #endif
602
603 return &genphy_driver;
604 }
605
get_phy_driver(struct phy_device * phydev,phy_interface_t interface)606 static struct phy_driver *get_phy_driver(struct phy_device *phydev,
607 phy_interface_t interface)
608 {
609 struct list_head *entry;
610 int phy_id = phydev->phy_id;
611 struct phy_driver *drv = NULL;
612
613 list_for_each(entry, &phy_drivers) {
614 drv = list_entry(entry, struct phy_driver, list);
615 if ((drv->uid & drv->mask) == (phy_id & drv->mask))
616 return drv;
617 }
618
619 /* If we made it here, there's no driver for this PHY */
620 return generic_for_interface(interface);
621 }
622
phy_device_create(struct mii_dev * bus,int addr,u32 phy_id,bool is_c45,phy_interface_t interface)623 static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
624 u32 phy_id, bool is_c45,
625 phy_interface_t interface)
626 {
627 struct phy_device *dev;
628
629 /* We allocate the device, and initialize the
630 * default values */
631 dev = malloc(sizeof(*dev));
632 if (!dev) {
633 printf("Failed to allocate PHY device for %s:%d\n",
634 bus->name, addr);
635 return NULL;
636 }
637
638 memset(dev, 0, sizeof(*dev));
639
640 dev->duplex = -1;
641 dev->link = 0;
642 dev->interface = interface;
643
644 #ifdef CONFIG_DM_ETH
645 dev->node = ofnode_null();
646 #endif
647
648 dev->autoneg = AUTONEG_ENABLE;
649
650 dev->addr = addr;
651 dev->phy_id = phy_id;
652 dev->is_c45 = is_c45;
653 dev->bus = bus;
654
655 dev->drv = get_phy_driver(dev, interface);
656
657 phy_probe(dev);
658
659 bus->phymap[addr] = dev;
660
661 return dev;
662 }
663
664 /**
665 * get_phy_id - reads the specified addr for its ID.
666 * @bus: the target MII bus
667 * @addr: PHY address on the MII bus
668 * @phy_id: where to store the ID retrieved.
669 *
670 * Description: Reads the ID registers of the PHY at @addr on the
671 * @bus, stores it in @phy_id and returns zero on success.
672 */
get_phy_id(struct mii_dev * bus,int addr,int devad,u32 * phy_id)673 int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
674 {
675 int phy_reg;
676
677 /* Grab the bits from PHYIR1, and put them
678 * in the upper half */
679 phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
680
681 if (phy_reg < 0)
682 return -EIO;
683
684 *phy_id = (phy_reg & 0xffff) << 16;
685
686 /* Grab the bits from PHYIR2, and put them in the lower half */
687 phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
688
689 if (phy_reg < 0)
690 return -EIO;
691
692 *phy_id |= (phy_reg & 0xffff);
693
694 return 0;
695 }
696
create_phy_by_mask(struct mii_dev * bus,unsigned phy_mask,int devad,phy_interface_t interface)697 static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
698 unsigned phy_mask, int devad, phy_interface_t interface)
699 {
700 u32 phy_id = 0xffffffff;
701 bool is_c45;
702
703 while (phy_mask) {
704 int addr = ffs(phy_mask) - 1;
705 int r = get_phy_id(bus, addr, devad, &phy_id);
706 /* If the PHY ID is mostly f's, we didn't find anything */
707 if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff) {
708 is_c45 = (devad == MDIO_DEVAD_NONE) ? false : true;
709 return phy_device_create(bus, addr, phy_id, is_c45,
710 interface);
711 }
712 phy_mask &= ~(1 << addr);
713 }
714 return NULL;
715 }
716
search_for_existing_phy(struct mii_dev * bus,unsigned phy_mask,phy_interface_t interface)717 static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
718 unsigned phy_mask, phy_interface_t interface)
719 {
720 /* If we have one, return the existing device, with new interface */
721 while (phy_mask) {
722 int addr = ffs(phy_mask) - 1;
723 if (bus->phymap[addr]) {
724 bus->phymap[addr]->interface = interface;
725 return bus->phymap[addr];
726 }
727 phy_mask &= ~(1 << addr);
728 }
729 return NULL;
730 }
731
get_phy_device_by_mask(struct mii_dev * bus,unsigned phy_mask,phy_interface_t interface)732 static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
733 unsigned phy_mask, phy_interface_t interface)
734 {
735 int i;
736 struct phy_device *phydev;
737
738 phydev = search_for_existing_phy(bus, phy_mask, interface);
739 if (phydev)
740 return phydev;
741 /* Try Standard (ie Clause 22) access */
742 /* Otherwise we have to try Clause 45 */
743 for (i = 0; i < 5; i++) {
744 phydev = create_phy_by_mask(bus, phy_mask,
745 i ? i : MDIO_DEVAD_NONE, interface);
746 if (IS_ERR(phydev))
747 return NULL;
748 if (phydev)
749 return phydev;
750 }
751
752 debug("\n%s PHY: ", bus->name);
753 while (phy_mask) {
754 int addr = ffs(phy_mask) - 1;
755 debug("%d ", addr);
756 phy_mask &= ~(1 << addr);
757 }
758 debug("not found\n");
759
760 return NULL;
761 }
762
763 /**
764 * get_phy_device - reads the specified PHY device and returns its @phy_device struct
765 * @bus: the target MII bus
766 * @addr: PHY address on the MII bus
767 *
768 * Description: Reads the ID registers of the PHY at @addr on the
769 * @bus, then allocates and returns the phy_device to represent it.
770 */
get_phy_device(struct mii_dev * bus,int addr,phy_interface_t interface)771 static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
772 phy_interface_t interface)
773 {
774 return get_phy_device_by_mask(bus, 1 << addr, interface);
775 }
776
phy_reset(struct phy_device * phydev)777 int phy_reset(struct phy_device *phydev)
778 {
779 int reg;
780 int timeout = 500;
781 int devad = MDIO_DEVAD_NONE;
782
783 if (phydev->flags & PHY_FLAG_BROKEN_RESET)
784 return 0;
785
786 #ifdef CONFIG_PHYLIB_10G
787 /* If it's 10G, we need to issue reset through one of the MMDs */
788 if (is_10g_interface(phydev->interface)) {
789 if (!phydev->mmds)
790 gen10g_discover_mmds(phydev);
791
792 devad = ffs(phydev->mmds) - 1;
793 }
794 #endif
795
796 if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) {
797 debug("PHY reset failed\n");
798 return -1;
799 }
800
801 #ifdef CONFIG_PHY_RESET_DELAY
802 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
803 #endif
804 /*
805 * Poll the control register for the reset bit to go to 0 (it is
806 * auto-clearing). This should happen within 0.5 seconds per the
807 * IEEE spec.
808 */
809 reg = phy_read(phydev, devad, MII_BMCR);
810 while ((reg & BMCR_RESET) && timeout--) {
811 reg = phy_read(phydev, devad, MII_BMCR);
812
813 if (reg < 0) {
814 debug("PHY status read failed\n");
815 return -1;
816 }
817 udelay(1000);
818 }
819
820 if (reg & BMCR_RESET) {
821 puts("PHY reset timed out\n");
822 return -1;
823 }
824
825 return 0;
826 }
827
miiphy_reset(const char * devname,unsigned char addr)828 int miiphy_reset(const char *devname, unsigned char addr)
829 {
830 struct mii_dev *bus = miiphy_get_dev_by_name(devname);
831 struct phy_device *phydev;
832
833 /*
834 * miiphy_reset was only used on standard PHYs, so we'll fake it here.
835 * If later code tries to connect with the right interface, this will
836 * be corrected by get_phy_device in phy_connect()
837 */
838 phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII);
839
840 return phy_reset(phydev);
841 }
842
phy_find_by_mask(struct mii_dev * bus,unsigned phy_mask,phy_interface_t interface)843 struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
844 phy_interface_t interface)
845 {
846 /* Reset the bus */
847 if (bus->reset) {
848 bus->reset(bus);
849
850 /* Wait 15ms to make sure the PHY has come out of hard reset */
851 udelay(15000);
852 }
853
854 return get_phy_device_by_mask(bus, phy_mask, interface);
855 }
856
857 #ifdef CONFIG_DM_ETH
phy_connect_dev(struct phy_device * phydev,struct udevice * dev)858 void phy_connect_dev(struct phy_device *phydev, struct udevice *dev)
859 #else
860 void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
861 #endif
862 {
863 /* Soft Reset the PHY */
864 phy_reset(phydev);
865 if (phydev->dev && phydev->dev != dev) {
866 printf("%s:%d is connected to %s. Reconnecting to %s\n",
867 phydev->bus->name, phydev->addr,
868 phydev->dev->name, dev->name);
869 }
870 phydev->dev = dev;
871 debug("%s connected to %s\n", dev->name, phydev->drv->name);
872 }
873
874 #ifdef CONFIG_DM_ETH
phy_connect(struct mii_dev * bus,int addr,struct udevice * dev,phy_interface_t interface)875 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
876 struct udevice *dev, phy_interface_t interface)
877 #else
878 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
879 struct eth_device *dev, phy_interface_t interface)
880 #endif
881 {
882 struct phy_device *phydev = NULL;
883 #ifdef CONFIG_PHY_FIXED
884 int sn;
885 const char *name;
886 sn = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev));
887 while (sn > 0) {
888 name = fdt_get_name(gd->fdt_blob, sn, NULL);
889 if (name && strcmp(name, "fixed-link") == 0) {
890 phydev = phy_device_create(bus, sn, PHY_FIXED_ID, false,
891 interface);
892 break;
893 }
894 sn = fdt_next_subnode(gd->fdt_blob, sn);
895 }
896 #endif
897 if (phydev == NULL)
898 phydev = phy_find_by_mask(bus, 1 << addr, interface);
899
900 if (phydev)
901 phy_connect_dev(phydev, dev);
902 else
903 printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
904 return phydev;
905 }
906
907 /*
908 * Start the PHY. Returns 0 on success, or a negative error code.
909 */
phy_startup(struct phy_device * phydev)910 int phy_startup(struct phy_device *phydev)
911 {
912 if (phydev->drv->startup)
913 return phydev->drv->startup(phydev);
914
915 return 0;
916 }
917
board_phy_config(struct phy_device * phydev)918 __weak int board_phy_config(struct phy_device *phydev)
919 {
920 if (phydev->drv->config)
921 return phydev->drv->config(phydev);
922 return 0;
923 }
924
phy_config(struct phy_device * phydev)925 int phy_config(struct phy_device *phydev)
926 {
927 /* Invoke an optional board-specific helper */
928 return board_phy_config(phydev);
929 }
930
phy_shutdown(struct phy_device * phydev)931 int phy_shutdown(struct phy_device *phydev)
932 {
933 if (phydev->drv->shutdown)
934 phydev->drv->shutdown(phydev);
935
936 return 0;
937 }
938
phy_get_interface_by_name(const char * str)939 int phy_get_interface_by_name(const char *str)
940 {
941 int i;
942
943 for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) {
944 if (!strcmp(str, phy_interface_strings[i]))
945 return i;
946 }
947
948 return -1;
949 }
950