xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_debug.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1 /******************************************************************************
2  *
3  * Copyright(c) 2007 - 2017 Realtek Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12  * more details.
13  *
14  *****************************************************************************/
15 
16 /* ************************************************************
17  * include files
18  * ************************************************************ */
19 
20 #include "mp_precomp.h"
21 #include "phydm_precomp.h"
22 
23 void
phydm_init_debug_setting(struct PHY_DM_STRUCT * p_dm)24 phydm_init_debug_setting(
25 	struct PHY_DM_STRUCT		*p_dm
26 )
27 {
28 	p_dm->debug_level = ODM_DBG_TRACE;
29 
30 	p_dm->fw_debug_components = 0;
31 	p_dm->debug_components =
32 		\
33 #if DBG
34 		/*BB Functions*/
35 		/*									DBG_DIG					|*/
36 		/*									DBG_RA_MASK				|*/
37 		/*									DBG_DYN_TXPWR		|*/
38 		/*									DBG_FA_CNT				|*/
39 		/*									DBG_RSSI_MNTR			|*/
40 		/*									DBG_CCKPD					|*/
41 		/*									DBG_ANT_DIV				|*/
42 		/*									DBG_SMT_ANT				|*/
43 		/*									DBG_PWR_TRAIN					|*/
44 		/*									DBG_RA					|*/
45 		/*									DBG_PATH_DIV				|*/
46 		/*									DBG_DFS					|*/
47 		/*									DBG_DYN_ARFR			|*/
48 		/*									DBG_ADPTVTY			|*/
49 		/*									DBG_CFO_TRK		|*/
50 		/*									DBG_ENV_MNTR					|*/
51 		/*									DBG_PRI_CCA		|*/
52 		/*									DBG_ADPTV_SOML		|*/
53 
54 
55 		/*									DBG_DYN_RX_PATH		|*/
56 		/*									DBG_TMP					|*/
57 		/*									DBG_FW_TRACE			|*/
58 		/*									DBG_TXBF				|*/
59 		/*									DBG_COMMON_FLOW				|*/
60 		/*									ODM_COMP_TX_PWR_TRACK		|*/
61 		/*									ODM_COMP_CALIBRATION			|*/
62 		/*									ODM_COMP_MP					|*/
63 		/*									ODM_PHY_CONFIG					|*/
64 		/*									ODM_COMP_INIT					|*/
65 		/*									ODM_COMP_COMMON				|*/
66 		/*									ODM_COMP_API					|*/
67 
68 
69 #endif
70 		0;
71 
72 	p_dm->fw_buff_is_enpty = true;
73 	p_dm->pre_c2h_seq = 0;
74 	p_dm->c2h_cmd_start = 0;
75 }
76 
77 void
phydm_bb_dbg_port_header_sel(void * p_dm_void,u32 header_idx)78 phydm_bb_dbg_port_header_sel(
79 	void			*p_dm_void,
80 	u32			header_idx
81 ) {
82 	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
83 
84 	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
85 
86 		odm_set_bb_reg(p_dm, 0x8f8, (BIT(25) | BIT(24) | BIT(23) | BIT(22)), header_idx);
87 
88 		/*
89 		header_idx:
90 			(0:) '{ofdm_dbg[31:0]}'
91 			(1:) '{cca,crc32_fail,dbg_ofdm[29:0]}'
92 			(2:) '{vbon,crc32_fail,dbg_ofdm[29:0]}'
93 			(3:) '{cca,crc32_ok,dbg_ofdm[29:0]}'
94 			(4:) '{vbon,crc32_ok,dbg_ofdm[29:0]}'
95 			(5:) '{dbg_iqk_anta}'
96 			(6:) '{cca,ofdm_crc_ok,dbg_dp_anta[29:0]}'
97 			(7:) '{dbg_iqk_antb}'
98 			(8:) '{DBGOUT_RFC_b[31:0]}'
99 			(9:) '{DBGOUT_RFC_a[31:0]}'
100 			(a:) '{dbg_ofdm}'
101 			(b:) '{dbg_cck}'
102 		*/
103 	}
104 }
105 
106 void
phydm_bb_dbg_port_clock_en(void * p_dm_void,u8 enable)107 phydm_bb_dbg_port_clock_en(
108 	void			*p_dm_void,
109 	u8			enable
110 ) {
111 	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
112 	u32		reg_value = 0;
113 
114 	if (p_dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8814A | ODM_RTL8814B)) {
115 
116 		reg_value = (enable == true) ? 0x7 : 0;
117 		odm_set_bb_reg(p_dm, 0x198c, 0x7, reg_value); /*enable/disable debug port clock, for power saving*/
118 	}
119 }
120 
121 u8
phydm_set_bb_dbg_port(void * p_dm_void,u8 curr_dbg_priority,u32 debug_port)122 phydm_set_bb_dbg_port(
123 	void			*p_dm_void,
124 	u8			curr_dbg_priority,
125 	u32			debug_port
126 )
127 {
128 	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
129 	u8	dbg_port_result = false;
130 
131 	if (curr_dbg_priority > p_dm->pre_dbg_priority) {
132 
133 		if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
134 
135 			phydm_bb_dbg_port_clock_en(p_dm, true);
136 
137 			odm_set_bb_reg(p_dm, 0x8fc, MASKDWORD, debug_port);
138 			/**/
139 		} else /*if (p_dm->support_ic_type & ODM_IC_11N_SERIES)*/ {
140 			odm_set_bb_reg(p_dm, 0x908, MASKDWORD, debug_port);
141 			/**/
142 		}
143 		PHYDM_DBG(p_dm, ODM_COMP_API, ("DbgPort ((0x%x)) set success, Cur_priority=((%d)), Pre_priority=((%d))\n", debug_port, curr_dbg_priority, p_dm->pre_dbg_priority));
144 		p_dm->pre_dbg_priority = curr_dbg_priority;
145 		dbg_port_result = true;
146 	}
147 
148 	return dbg_port_result;
149 }
150 
151 void
phydm_release_bb_dbg_port(void * p_dm_void)152 phydm_release_bb_dbg_port(
153 	void			*p_dm_void
154 )
155 {
156 	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
157 
158 	phydm_bb_dbg_port_clock_en(p_dm, false);
159 	phydm_bb_dbg_port_header_sel(p_dm, 0);
160 
161 	p_dm->pre_dbg_priority = BB_DBGPORT_RELEASE;
162 	PHYDM_DBG(p_dm, ODM_COMP_API, ("Release BB dbg_port\n"));
163 }
164 
165 u32
phydm_get_bb_dbg_port_value(void * p_dm_void)166 phydm_get_bb_dbg_port_value(
167 	void			*p_dm_void
168 )
169 {
170 	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
171 	u32	dbg_port_value = 0;
172 
173 	if (p_dm->support_ic_type & ODM_IC_11AC_SERIES) {
174 		dbg_port_value = odm_get_bb_reg(p_dm, 0xfa0, MASKDWORD);
175 		/**/
176 	} else /*if (p_dm->support_ic_type & ODM_IC_11N_SERIES)*/ {
177 		dbg_port_value = odm_get_bb_reg(p_dm, 0xdf4, MASKDWORD);
178 		/**/
179 	}
180 	PHYDM_DBG(p_dm, ODM_COMP_API, ("dbg_port_value = 0x%x\n", dbg_port_value));
181 	return	dbg_port_value;
182 }
183 
184 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
185 
186 void
phydm_bb_debug_info_n_series(void * p_dm_void,u32 * _used,char * output,u32 * _out_len)187 phydm_bb_debug_info_n_series(
188 	void			*p_dm_void,
189 	u32			*_used,
190 	char				*output,
191 	u32			*_out_len
192 )
193 {
194 	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
195 	u32 used = *_used;
196 	u32 out_len = *_out_len;
197 
198 	u32	value32 = 0, value32_1 = 0;
199 	u8	rf_gain_a = 0, rf_gain_b = 0, rf_gain_c = 0, rf_gain_d = 0;
200 	u8	rx_snr_a = 0, rx_snr_b = 0, rx_snr_c = 0, rx_snr_d = 0;
201 
202 	s8    rxevm_0 = 0, rxevm_1 = 0;
203 	s32	short_cfo_a = 0, short_cfo_b = 0, long_cfo_a = 0, long_cfo_b = 0;
204 	s32	scfo_a = 0, scfo_b = 0, avg_cfo_a = 0, avg_cfo_b = 0;
205 	s32	cfo_end_a = 0, cfo_end_b = 0, acq_cfo_a = 0, acq_cfo_b = 0;
206 
207 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s\n", "BB Report Info"));
208 
209 	/*AGC result*/
210 	value32 = odm_get_bb_reg(p_dm, 0xdd0, MASKDWORD);
211 	rf_gain_a = (u8)(value32 & 0x3f);
212 	rf_gain_a = rf_gain_a << 1;
213 
214 	rf_gain_b = (u8)((value32 >> 8) & 0x3f);
215 	rf_gain_b = rf_gain_b << 1;
216 
217 	rf_gain_c = (u8)((value32 >> 16) & 0x3f);
218 	rf_gain_c = rf_gain_c << 1;
219 
220 	rf_gain_d = (u8)((value32 >> 24) & 0x3f);
221 	rf_gain_d = rf_gain_d << 1;
222 
223 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d / %d / %d", "OFDM RX RF Gain(A/B/C/D)", rf_gain_a, rf_gain_b, rf_gain_c, rf_gain_d));
224 
225 	/*SNR report*/
226 	value32 = odm_get_bb_reg(p_dm, 0xdd4, MASKDWORD);
227 	rx_snr_a = (u8)(value32 & 0xff);
228 	rx_snr_a = rx_snr_a >> 1;
229 
230 	rx_snr_b = (u8)((value32 >> 8) & 0xff);
231 	rx_snr_b = rx_snr_b >> 1;
232 
233 	rx_snr_c = (u8)((value32 >> 16) & 0xff);
234 	rx_snr_c = rx_snr_c >> 1;
235 
236 	rx_snr_d = (u8)((value32 >> 24) & 0xff);
237 	rx_snr_d = rx_snr_d >> 1;
238 
239 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d / %d / %d", "RXSNR(A/B/C/D, dB)", rx_snr_a, rx_snr_b, rx_snr_c, rx_snr_d));
240 
241 	/* PostFFT related info*/
242 	value32 = odm_get_bb_reg(p_dm, 0xdd8, MASKDWORD);
243 
244 	rxevm_0 = (s8)((value32 & MASKBYTE2) >> 16);
245 	rxevm_0 /= 2;
246 	if (rxevm_0 < -63)
247 		rxevm_0 = 0;
248 
249 	rxevm_1 = (s8)((value32 & MASKBYTE3) >> 24);
250 	rxevm_1 /= 2;
251 	if (rxevm_1 < -63)
252 		rxevm_1 = 0;
253 
254 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d", "RXEVM (1ss/2ss)", rxevm_0, rxevm_1));
255 
256 	/*CFO Report Info*/
257 	odm_set_bb_reg(p_dm, 0xd00, BIT(26), 1);
258 
259 	/*Short CFO*/
260 	value32 = odm_get_bb_reg(p_dm, 0xdac, MASKDWORD);
261 	value32_1 = odm_get_bb_reg(p_dm, 0xdb0, MASKDWORD);
262 
263 	short_cfo_b = (s32)(value32 & 0xfff);			/*S(12,11)*/
264 	short_cfo_a = (s32)((value32 & 0x0fff0000) >> 16);
265 
266 	long_cfo_b = (s32)(value32_1 & 0x1fff);		/*S(13,12)*/
267 	long_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16);
268 
269 	/*SFO 2's to dec*/
270 	if (short_cfo_a > 2047)
271 		short_cfo_a = short_cfo_a - 4096;
272 	if (short_cfo_b > 2047)
273 		short_cfo_b = short_cfo_b - 4096;
274 
275 	short_cfo_a = (short_cfo_a * 312500) / 2048;
276 	short_cfo_b = (short_cfo_b * 312500) / 2048;
277 
278 	/*LFO 2's to dec*/
279 
280 	if (long_cfo_a > 4095)
281 		long_cfo_a = long_cfo_a - 8192;
282 
283 	if (long_cfo_b > 4095)
284 		long_cfo_b = long_cfo_b - 8192;
285 
286 	long_cfo_a = long_cfo_a * 312500 / 4096;
287 	long_cfo_b = long_cfo_b * 312500 / 4096;
288 
289 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s", "CFO Report Info"));
290 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d", "Short CFO(Hz) <A/B>", short_cfo_a, short_cfo_b));
291 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d", "Long CFO(Hz) <A/B>", long_cfo_a, long_cfo_b));
292 
293 	/*SCFO*/
294 	value32 = odm_get_bb_reg(p_dm, 0xdb8, MASKDWORD);
295 	value32_1 = odm_get_bb_reg(p_dm, 0xdb4, MASKDWORD);
296 
297 	scfo_b = (s32)(value32 & 0x7ff);			/*S(11,10)*/
298 	scfo_a = (s32)((value32 & 0x07ff0000) >> 16);
299 
300 	if (scfo_a > 1023)
301 		scfo_a = scfo_a - 2048;
302 
303 	if (scfo_b > 1023)
304 		scfo_b = scfo_b - 2048;
305 
306 	scfo_a = scfo_a * 312500 / 1024;
307 	scfo_b = scfo_b * 312500 / 1024;
308 
309 	avg_cfo_b = (s32)(value32_1 & 0x1fff);	/*S(13,12)*/
310 	avg_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16);
311 
312 	if (avg_cfo_a > 4095)
313 		avg_cfo_a = avg_cfo_a - 8192;
314 
315 	if (avg_cfo_b > 4095)
316 		avg_cfo_b = avg_cfo_b - 8192;
317 
318 	avg_cfo_a = avg_cfo_a * 312500 / 4096;
319 	avg_cfo_b = avg_cfo_b * 312500 / 4096;
320 
321 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d", "value SCFO(Hz) <A/B>", scfo_a, scfo_b));
322 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d", "Avg CFO(Hz) <A/B>", avg_cfo_a, avg_cfo_b));
323 
324 	value32 = odm_get_bb_reg(p_dm, 0xdbc, MASKDWORD);
325 	value32_1 = odm_get_bb_reg(p_dm, 0xde0, MASKDWORD);
326 
327 	cfo_end_b = (s32)(value32 & 0x1fff);		/*S(13,12)*/
328 	cfo_end_a = (s32)((value32 & 0x1fff0000) >> 16);
329 
330 	if (cfo_end_a > 4095)
331 		cfo_end_a = cfo_end_a - 8192;
332 
333 	if (cfo_end_b > 4095)
334 		cfo_end_b = cfo_end_b - 8192;
335 
336 	cfo_end_a = cfo_end_a * 312500 / 4096;
337 	cfo_end_b = cfo_end_b * 312500 / 4096;
338 
339 	acq_cfo_b = (s32)(value32_1 & 0x1fff);	/*S(13,12)*/
340 	acq_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16);
341 
342 	if (acq_cfo_a > 4095)
343 		acq_cfo_a = acq_cfo_a - 8192;
344 
345 	if (acq_cfo_b > 4095)
346 		acq_cfo_b = acq_cfo_b - 8192;
347 
348 	acq_cfo_a = acq_cfo_a * 312500 / 4096;
349 	acq_cfo_b = acq_cfo_b * 312500 / 4096;
350 
351 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d", "End CFO(Hz) <A/B>", cfo_end_a, cfo_end_b));
352 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d", "ACQ CFO(Hz) <A/B>", acq_cfo_a, acq_cfo_b));
353 
354 }
355 
356 
357 void
phydm_bb_debug_info(void * p_dm_void,u32 * _used,char * output,u32 * _out_len)358 phydm_bb_debug_info(
359 	void			*p_dm_void,
360 	u32			*_used,
361 	char			*output,
362 	u32			*_out_len
363 )
364 {
365 	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
366 	u32 used = *_used;
367 	u32 out_len = *_out_len;
368 
369 	char *tmp_string = NULL;
370 
371 	u8	RX_HT_BW, RX_VHT_BW, RXSC, RX_HT, RX_BW;
372 	static u8 v_rx_bw ;
373 	u32	value32, value32_1, value32_2, value32_3;
374 	s32	SFO_A, SFO_B, SFO_C, SFO_D;
375 	s32	LFO_A, LFO_B, LFO_C, LFO_D;
376 	static u8	MCSS, tail, parity, rsv, vrsv, idx, smooth, htsound, agg, stbc, vstbc, fec, fecext, sgi, sgiext, htltf, vgid, v_nsts, vtxops, vrsv2, vbrsv, bf, vbcrc;
377 	static u16	h_length, htcrc8, length;
378 	static u16 vpaid;
379 	static u16	v_length, vhtcrc8, v_mcss, v_tail, vb_tail;
380 	static u8	HMCSS, HRX_BW;
381 
382 	u8    pwdb;
383 	s8    RXEVM_0, RXEVM_1, RXEVM_2 ;
384 	u8    rf_gain_path_a, rf_gain_path_b, rf_gain_path_c, rf_gain_path_d;
385 	u8    rx_snr_path_a, rx_snr_path_b, rx_snr_path_c, rx_snr_path_d;
386 	s32    sig_power;
387 
388 	const char *L_rate[8] = {"6M", "9M", "12M", "18M", "24M", "36M", "48M", "54M"};
389 
390 #if 0
391 	const double evm_comp_20M = 0.579919469776867; /* 10*log10(64.0/56.0) */
392 	const double evm_comp_40M = 0.503051183113957; /* 10*log10(128.0/114.0) */
393 	const double evm_comp_80M = 0.244245993314183; /* 10*log10(256.0/242.0) */
394 	const double evm_comp_160M = 0.244245993314183; /* 10*log10(512.0/484.0) */
395 #endif
396 
397 	if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
398 		phydm_bb_debug_info_n_series(p_dm, &used, output, &out_len);
399 		return;
400 	}
401 
402 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s\n", "BB Report Info"));
403 
404 	/*BW & mode Detection*/
405 
406 	value32 = odm_get_bb_reg(p_dm, 0xf80, MASKDWORD);
407 	value32_2 = value32;
408 	RX_HT_BW = (u8)(value32 & 0x1);
409 	RX_VHT_BW = (u8)((value32 >> 1) & 0x3);
410 	RXSC = (u8)(value32 & 0x78);
411 	value32_1 = (value32 & 0x180) >> 7;
412 	RX_HT = (u8)(value32_1);
413 
414 	RX_BW = 0;
415 
416 	if (RX_HT == 2) {
417 		if (RX_VHT_BW == 0)
418 			tmp_string = "20M";
419 		else if (RX_VHT_BW == 1)
420 			tmp_string = "40M";
421 		else
422 			tmp_string = "80M";
423 		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s %s %s", "mode", "VHT", tmp_string));
424 		RX_BW = RX_VHT_BW;
425 	} else if (RX_HT == 1) {
426 		if (RX_HT_BW == 0)
427 			tmp_string = "20M";
428 		else if (RX_HT_BW == 1)
429 			tmp_string = "40M";
430 		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s %s %s", "mode", "HT", tmp_string));
431 		RX_BW = RX_HT_BW;
432 	} else
433 		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s %s", "mode", "Legacy"));
434 
435 	if (RX_HT != 0) {
436 		if (RXSC == 0)
437 			tmp_string = "duplicate/full bw";
438 		else if (RXSC == 1)
439 			tmp_string = "usc20-1";
440 		else if (RXSC == 2)
441 			tmp_string = "lsc20-1";
442 		else if (RXSC == 3)
443 			tmp_string = "usc20-2";
444 		else if (RXSC == 4)
445 			tmp_string = "lsc20-2";
446 		else if (RXSC == 9)
447 			tmp_string = "usc40";
448 		else if (RXSC == 10)
449 			tmp_string = "lsc40";
450 		PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s", tmp_string));
451 	}
452 
453 	/* RX signal power and AGC related info*/
454 
455 	value32 = odm_get_bb_reg(p_dm, 0xF90, MASKDWORD);
456 	pwdb = (u8)((value32 & MASKBYTE1) >> 8);
457 	pwdb = pwdb >> 1;
458 	sig_power = -110 + pwdb;
459 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d", "OFDM RX Signal Power(dB)", sig_power));
460 
461 	value32 = odm_get_bb_reg(p_dm, 0xd14, MASKDWORD);
462 	rx_snr_path_a = (u8)(value32 & 0xFF) >> 1;
463 	rf_gain_path_a = (s8)((value32 & MASKBYTE1) >> 8);
464 	rf_gain_path_a *= 2;
465 	value32 = odm_get_bb_reg(p_dm, 0xd54, MASKDWORD);
466 	rx_snr_path_b = (u8)(value32 & 0xFF) >> 1;
467 	rf_gain_path_b = (s8)((value32 & MASKBYTE1) >> 8);
468 	rf_gain_path_b *= 2;
469 	value32 = odm_get_bb_reg(p_dm, 0xd94, MASKDWORD);
470 	rx_snr_path_c = (u8)(value32 & 0xFF) >> 1;
471 	rf_gain_path_c = (s8)((value32 & MASKBYTE1) >> 8);
472 	rf_gain_path_c *= 2;
473 	value32 = odm_get_bb_reg(p_dm, 0xdd4, MASKDWORD);
474 	rx_snr_path_d = (u8)(value32 & 0xFF) >> 1;
475 	rf_gain_path_d = (s8)((value32 & MASKBYTE1) >> 8);
476 	rf_gain_path_d *= 2;
477 
478 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d / %d / %d", "OFDM RX RF Gain(A/B/C/D)", rf_gain_path_a, rf_gain_path_b, rf_gain_path_c, rf_gain_path_d));
479 
480 
481 	/* RX counter related info*/
482 
483 	value32 = odm_get_bb_reg(p_dm, 0xF08, MASKDWORD);
484 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d", "OFDM CCA counter", ((value32 & 0xFFFF0000) >> 16)));
485 
486 	value32 = odm_get_bb_reg(p_dm, 0xFD0, MASKDWORD);
487 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d", "OFDM SBD Fail counter", value32 & 0xFFFF));
488 
489 	value32 = odm_get_bb_reg(p_dm, 0xFC4, MASKDWORD);
490 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d", "VHT SIGA/SIGB CRC8 Fail counter", value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16)));
491 
492 	value32 = odm_get_bb_reg(p_dm, 0xFCC, MASKDWORD);
493 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d", "CCK CCA counter", value32 & 0xFFFF));
494 
495 	value32 = odm_get_bb_reg(p_dm, 0xFBC, MASKDWORD);
496 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d", "LSIG (parity Fail/rate Illegal) counter", value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16)));
497 
498 	value32_1 = odm_get_bb_reg(p_dm, 0xFC8, MASKDWORD);
499 	value32_2 = odm_get_bb_reg(p_dm, 0xFC0, MASKDWORD);
500 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d", "HT/VHT MCS NOT SUPPORT counter", ((value32_2 & 0xFFFF0000) >> 16), value32_1 & 0xFFFF));
501 
502 	/* PostFFT related info*/
503 	value32 = odm_get_bb_reg(p_dm, 0xF8c, MASKDWORD);
504 	RXEVM_0 = (s8)((value32 & MASKBYTE2) >> 16);
505 	RXEVM_0 /= 2;
506 	if (RXEVM_0 < -63)
507 		RXEVM_0 = 0;
508 
509 	RXEVM_1 = (s8)((value32 & MASKBYTE3) >> 24);
510 	RXEVM_1 /= 2;
511 	value32 = odm_get_bb_reg(p_dm, 0xF88, MASKDWORD);
512 	RXEVM_2 = (s8)((value32 & MASKBYTE2) >> 16);
513 	RXEVM_2 /= 2;
514 
515 	if (RXEVM_1 < -63)
516 		RXEVM_1 = 0;
517 	if (RXEVM_2 < -63)
518 		RXEVM_2 = 0;
519 
520 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d / %d", "RXEVM (1ss/2ss/3ss)", RXEVM_0, RXEVM_1, RXEVM_2));
521 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d / %d / %d", "RXSNR(A/B/C/D, dB)", rx_snr_path_a, rx_snr_path_b, rx_snr_path_c, rx_snr_path_d));
522 
523 	value32 = odm_get_bb_reg(p_dm, 0xF8C, MASKDWORD);
524 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d", "CSI_1st /CSI_2nd", value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16)));
525 
526 	/*BW & mode Detection*/
527 
528 	/*Reset Page F counter*/
529 	odm_set_bb_reg(p_dm, 0xB58, BIT(0), 1);
530 	odm_set_bb_reg(p_dm, 0xB58, BIT(0), 0);
531 
532 	/*CFO Report Info*/
533 	/*Short CFO*/
534 	value32 = odm_get_bb_reg(p_dm, 0xd0c, MASKDWORD);
535 	value32_1 = odm_get_bb_reg(p_dm, 0xd4c, MASKDWORD);
536 	value32_2 = odm_get_bb_reg(p_dm, 0xd8c, MASKDWORD);
537 	value32_3 = odm_get_bb_reg(p_dm, 0xdcc, MASKDWORD);
538 
539 	SFO_A = (s32)(value32 & 0xfff);
540 	SFO_B = (s32)(value32_1 & 0xfff);
541 	SFO_C = (s32)(value32_2 & 0xfff);
542 	SFO_D = (s32)(value32_3 & 0xfff);
543 
544 	LFO_A = (s32)(value32 >> 16);
545 	LFO_B = (s32)(value32_1 >> 16);
546 	LFO_C = (s32)(value32_2 >> 16);
547 	LFO_D = (s32)(value32_3 >> 16);
548 
549 	/*SFO 2's to dec*/
550 	if (SFO_A > 2047)
551 		SFO_A = SFO_A - 4096;
552 	SFO_A = (SFO_A * 312500) / 2048;
553 	if (SFO_B > 2047)
554 		SFO_B = SFO_B - 4096;
555 	SFO_B = (SFO_B * 312500) / 2048;
556 	if (SFO_C > 2047)
557 		SFO_C = SFO_C - 4096;
558 	SFO_C = (SFO_C * 312500) / 2048;
559 	if (SFO_D > 2047)
560 		SFO_D = SFO_D - 4096;
561 	SFO_D = (SFO_D * 312500) / 2048;
562 
563 	/*LFO 2's to dec*/
564 
565 	if (LFO_A > 4095)
566 		LFO_A = LFO_A - 8192;
567 
568 	if (LFO_B > 4095)
569 		LFO_B = LFO_B - 8192;
570 
571 	if (LFO_C > 4095)
572 		LFO_C = LFO_C - 8192;
573 
574 	if (LFO_D > 4095)
575 		LFO_D = LFO_D - 8192;
576 	LFO_A = LFO_A * 312500 / 4096;
577 	LFO_B = LFO_B * 312500 / 4096;
578 	LFO_C = LFO_C * 312500 / 4096;
579 	LFO_D = LFO_D * 312500 / 4096;
580 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s", "CFO Report Info"));
581 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d / %d /%d", "Short CFO(Hz) <A/B/C/D>", SFO_A, SFO_B, SFO_C, SFO_D));
582 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d / %d /%d", "Long CFO(Hz) <A/B/C/D>", LFO_A, LFO_B, LFO_C, LFO_D));
583 
584 	/*SCFO*/
585 	value32 = odm_get_bb_reg(p_dm, 0xd10, MASKDWORD);
586 	value32_1 = odm_get_bb_reg(p_dm, 0xd50, MASKDWORD);
587 	value32_2 = odm_get_bb_reg(p_dm, 0xd90, MASKDWORD);
588 	value32_3 = odm_get_bb_reg(p_dm, 0xdd0, MASKDWORD);
589 
590 	SFO_A = (s32)(value32 & 0x7ff);
591 	SFO_B = (s32)(value32_1 & 0x7ff);
592 	SFO_C = (s32)(value32_2 & 0x7ff);
593 	SFO_D = (s32)(value32_3 & 0x7ff);
594 
595 	if (SFO_A > 1023)
596 		SFO_A = SFO_A - 2048;
597 
598 	if (SFO_B > 2047)
599 		SFO_B = SFO_B - 4096;
600 
601 	if (SFO_C > 2047)
602 		SFO_C = SFO_C - 4096;
603 
604 	if (SFO_D > 2047)
605 		SFO_D = SFO_D - 4096;
606 
607 	SFO_A = SFO_A * 312500 / 1024;
608 	SFO_B = SFO_B * 312500 / 1024;
609 	SFO_C = SFO_C * 312500 / 1024;
610 	SFO_D = SFO_D * 312500 / 1024;
611 
612 	LFO_A = (s32)(value32 >> 16);
613 	LFO_B = (s32)(value32_1 >> 16);
614 	LFO_C = (s32)(value32_2 >> 16);
615 	LFO_D = (s32)(value32_3 >> 16);
616 
617 	if (LFO_A > 4095)
618 		LFO_A = LFO_A - 8192;
619 
620 	if (LFO_B > 4095)
621 		LFO_B = LFO_B - 8192;
622 
623 	if (LFO_C > 4095)
624 		LFO_C = LFO_C - 8192;
625 
626 	if (LFO_D > 4095)
627 		LFO_D = LFO_D - 8192;
628 	LFO_A = LFO_A * 312500 / 4096;
629 	LFO_B = LFO_B * 312500 / 4096;
630 	LFO_C = LFO_C * 312500 / 4096;
631 	LFO_D = LFO_D * 312500 / 4096;
632 
633 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d / %d /%d", "value SCFO(Hz) <A/B/C/D>", SFO_A, SFO_B, SFO_C, SFO_D));
634 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d / %d /%d", "ACQ CFO(Hz) <A/B/C/D>", LFO_A, LFO_B, LFO_C, LFO_D));
635 
636 	value32 = odm_get_bb_reg(p_dm, 0xd14, MASKDWORD);
637 	value32_1 = odm_get_bb_reg(p_dm, 0xd54, MASKDWORD);
638 	value32_2 = odm_get_bb_reg(p_dm, 0xd94, MASKDWORD);
639 	value32_3 = odm_get_bb_reg(p_dm, 0xdd4, MASKDWORD);
640 
641 	LFO_A = (s32)(value32 >> 16);
642 	LFO_B = (s32)(value32_1 >> 16);
643 	LFO_C = (s32)(value32_2 >> 16);
644 	LFO_D = (s32)(value32_3 >> 16);
645 
646 	if (LFO_A > 4095)
647 		LFO_A = LFO_A - 8192;
648 
649 	if (LFO_B > 4095)
650 		LFO_B = LFO_B - 8192;
651 
652 	if (LFO_C > 4095)
653 		LFO_C = LFO_C - 8192;
654 
655 	if (LFO_D > 4095)
656 		LFO_D = LFO_D - 8192;
657 
658 	LFO_A = LFO_A * 312500 / 4096;
659 	LFO_B = LFO_B * 312500 / 4096;
660 	LFO_C = LFO_C * 312500 / 4096;
661 	LFO_D = LFO_D * 312500 / 4096;
662 
663 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d / %d /%d", "End CFO(Hz) <A/B/C/D>", LFO_A, LFO_B, LFO_C, LFO_D));
664 
665 	value32 = odm_get_bb_reg(p_dm, 0xf20, MASKDWORD);  /*L SIG*/
666 
667 	tail = (u8)((value32 & 0xfc0000) >> 16);
668 	parity = (u8)((value32 & 0x20000) >> 16);
669 	length = (u16)((value32 & 0x1ffe00) >> 8);
670 	rsv = (u8)(value32 & 0x10);
671 	MCSS = (u8)(value32 & 0x0f);
672 
673 	switch (MCSS) {
674 	case 0x0b:
675 		idx = 0;
676 		break;
677 	case 0x0f:
678 		idx = 1;
679 		break;
680 	case 0x0a:
681 		idx = 2;
682 		break;
683 	case 0x0e:
684 		idx = 3;
685 		break;
686 	case 0x09:
687 		idx = 4;
688 		break;
689 	case 0x08:
690 		idx = 5;
691 		break;
692 	case 0x0c:
693 		idx = 6;
694 		break;
695 	default:
696 		idx = 6;
697 		break;
698 
699 	}
700 
701 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s", "L-SIG"));
702 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s : %s", "rate", L_rate[idx]));
703 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %x / %x / %x", "Rsv/length/parity", rsv, RX_BW, length));
704 
705 	value32 = odm_get_bb_reg(p_dm, 0xf2c, MASKDWORD);  /*HT SIG*/
706 	if (RX_HT == 1) {
707 
708 		HMCSS = (u8)(value32 & 0x7F);
709 		HRX_BW = (u8)(value32 & 0x80);
710 		h_length = (u16)((value32 >> 8) & 0xffff);
711 	}
712 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s", "HT-SIG1"));
713 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %x / %x / %x", "MCS/BW/length", HMCSS, HRX_BW, h_length));
714 
715 	value32 = odm_get_bb_reg(p_dm, 0xf30, MASKDWORD);  /*HT SIG*/
716 
717 	if (RX_HT == 1) {
718 		smooth = (u8)(value32 & 0x01);
719 		htsound = (u8)(value32 & 0x02);
720 		rsv = (u8)(value32 & 0x04);
721 		agg = (u8)(value32 & 0x08);
722 		stbc = (u8)(value32 & 0x30);
723 		fec = (u8)(value32 & 0x40);
724 		sgi = (u8)(value32 & 0x80);
725 		htltf = (u8)((value32 & 0x300) >> 8);
726 		htcrc8 = (u16)((value32 & 0x3fc00) >> 8);
727 		tail = (u8)((value32 & 0xfc0000) >> 16);
728 	}
729 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s", "HT-SIG2"));
730 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %x / %x / %x / %x / %x / %x", "Smooth/NoSound/Rsv/Aggregate/STBC/LDPC", smooth, htsound, rsv, agg, stbc, fec));
731 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %x / %x / %x / %x", "SGI/E-HT-LTFs/CRC/tail", sgi, htltf, htcrc8, tail));
732 
733 	value32 = odm_get_bb_reg(p_dm, 0xf2c, MASKDWORD);  /*VHT SIG A1*/
734 	if (RX_HT == 2) {
735 		/* value32 = odm_get_bb_reg(p_dm, 0xf2c,MASKDWORD);*/
736 		v_rx_bw = (u8)(value32 & 0x03);
737 		vrsv = (u8)(value32 & 0x04);
738 		vstbc = (u8)(value32 & 0x08);
739 		vgid = (u8)((value32 & 0x3f0) >> 4);
740 		v_nsts = (u8)(((value32 & 0x1c00) >> 8) + 1);
741 		vpaid = (u16)(value32 & 0x3fe);
742 		vtxops = (u8)((value32 & 0x400000) >> 20);
743 		vrsv2 = (u8)((value32 & 0x800000) >> 20);
744 	}
745 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s", "VHT-SIG-A1"));
746 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x / %x", "BW/Rsv1/STBC/GID/Nsts/PAID/TXOPPS/Rsv2", v_rx_bw, vrsv, vstbc, vgid, v_nsts, vpaid, vtxops, vrsv2));
747 
748 	value32 = odm_get_bb_reg(p_dm, 0xf30, MASKDWORD);  /*VHT SIG*/
749 
750 	if (RX_HT == 2) {
751 		/*value32 = odm_get_bb_reg(p_dm, 0xf30,MASKDWORD); */  /*VHT SIG*/
752 
753 		/* sgi=(u8)(value32&0x01); */
754 		sgiext = (u8)(value32 & 0x03);
755 		/* fec = (u8)(value32&0x04); */
756 		fecext = (u8)(value32 & 0x0C);
757 
758 		v_mcss = (u8)(value32 & 0xf0);
759 		bf = (u8)((value32 & 0x100) >> 8);
760 		vrsv = (u8)((value32 & 0x200) >> 8);
761 		vhtcrc8 = (u16)((value32 & 0x3fc00) >> 8);
762 		v_tail = (u8)((value32 & 0xfc0000) >> 16);
763 	}
764 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s", "VHT-SIG-A2"));
765 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x", "SGI/FEC/MCS/BF/Rsv/CRC/tail", sgiext, fecext, v_mcss, bf, vrsv, vhtcrc8, v_tail));
766 
767 	value32 = odm_get_bb_reg(p_dm, 0xf34, MASKDWORD);  /*VHT SIG*/
768 	{
769 		v_length = (u16)(value32 & 0x1fffff);
770 		vbrsv = (u8)((value32 & 0x600000) >> 20);
771 		vb_tail = (u16)((value32 & 0x1f800000) >> 20);
772 		vbcrc = (u8)((value32 & 0x80000000) >> 28);
773 
774 	}
775 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s", "VHT-SIG-B"));
776 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %x / %x / %x / %x", "length/Rsv/tail/CRC", v_length, vbrsv, vb_tail, vbcrc));
777 
778 	/*for Condition number*/
779 	if (p_dm->support_ic_type & ODM_RTL8822B) {
780 		s32	condition_num = 0;
781 		char *factor = NULL;
782 
783 		odm_set_bb_reg(p_dm, 0x1988, BIT(22), 0x1);	/*enable report condition number*/
784 
785 		condition_num = odm_get_bb_reg(p_dm, 0xf84, MASKDWORD);
786 		condition_num = (condition_num & 0x3ffff) >> 4;
787 
788 		if (*p_dm->p_band_width == CHANNEL_WIDTH_80)
789 			factor = "256/234";
790 		else if (*p_dm->p_band_width == CHANNEL_WIDTH_40)
791 			factor = "128/108";
792 		else if (*p_dm->p_band_width == CHANNEL_WIDTH_20) {
793 			if (RX_HT != 2 || RX_HT != 1)
794 				factor = "64/52";	/*HT or VHT*/
795 			else
796 				factor = "64/48";	/*legacy*/
797 		}
798 
799 		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d (factor = %s)", "Condition number", condition_num, factor));
800 
801 	}
802 	*_used = used;
803 	*_out_len = out_len;
804 
805 }
806 #endif /*#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
807 
808 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
809 
810 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
phydm_sbd_check(struct PHY_DM_STRUCT * p_dm)811 void phydm_sbd_check(
812 	struct PHY_DM_STRUCT					*p_dm
813 )
814 {
815 	static u32	pkt_cnt = 0;
816 	static boolean sbd_state = 0;
817 	u32	sym_count, count, value32;
818 
819 	if (sbd_state == 0) {
820 		pkt_cnt++;
821 		if (pkt_cnt % 5 == 0) { /*read SBD conter once every 5 packets*/
822 			odm_set_timer(p_dm, &p_dm->sbdcnt_timer, 0); /*ms*/
823 			sbd_state = 1;
824 		}
825 	} else { /*read counter*/
826 		value32 = odm_get_bb_reg(p_dm, 0xF98, MASKDWORD);
827 		sym_count = (value32 & 0x7C000000) >> 26;
828 		count = (value32 & 0x3F00000) >> 20;
829 		dbg_print("#SBD#    sym_count   %d   count   %d\n", sym_count, count);
830 		sbd_state = 0;
831 	}
832 }
833 #endif
834 
phydm_sbd_callback(struct timer_list * p_timer)835 void phydm_sbd_callback(
836 	struct timer_list		*p_timer
837 )
838 {
839 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
840 	struct _ADAPTER		*adapter = (struct _ADAPTER *)p_timer->Adapter;
841 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
842 	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->DM_OutSrc;
843 
844 	#if USE_WORKITEM
845 	odm_schedule_work_item(&p_dm->sbdcnt_workitem);
846 	#else
847 	phydm_sbd_check(p_dm);
848 	#endif
849 #endif
850 }
851 
phydm_sbd_workitem_callback(void * p_context)852 void phydm_sbd_workitem_callback(
853 	void            *p_context
854 )
855 {
856 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
857 	struct _ADAPTER	*p_adapter = (struct _ADAPTER *)p_context;
858 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
859 	struct PHY_DM_STRUCT		*p_dm = &p_hal_data->DM_OutSrc;
860 
861 	phydm_sbd_check(p_dm);
862 #endif
863 }
864 #endif
865 
866 void
phydm_reset_rx_rate_distribution(struct PHY_DM_STRUCT * p_dm_odm)867 phydm_reset_rx_rate_distribution(
868 	struct PHY_DM_STRUCT	*p_dm_odm
869 )
870 {
871 	struct _odm_phy_dbg_info_		*p_dbg = &(p_dm_odm->phy_dbg_info);
872 
873 	odm_memory_set(p_dm_odm, &(p_dbg->num_qry_legacy_pkt[0]), 0, (LEGACY_RATE_NUM * 2));
874 	odm_memory_set(p_dm_odm, &(p_dbg->num_qry_ht_pkt[0]), 0, (HT_RATE_NUM * 2));
875 	p_dbg->ht_pkt_not_zero = false;
876 
877 #if	ODM_IC_11AC_SERIES_SUPPORT
878 	odm_memory_set(p_dm_odm, &(p_dbg->num_qry_vht_pkt[0]), 0, (VHT_RATE_NUM * 2));
879 	p_dbg->vht_pkt_not_zero = false;
880 #endif
881 }
882 
883 void
phydm_rx_rate_distribution(void * p_dm_void)884 phydm_rx_rate_distribution
885 (
886 	void			*p_dm_void
887 )
888 {
889 	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
890 	struct _odm_phy_dbg_info_		*p_dbg = &(p_dm->phy_dbg_info);
891 	u8	i = 0, j = 0;
892 	u8	rate_num = 1, rate_ss_shift = 0;
893 
894 	if (p_dm->support_ic_type & ODM_IC_4SS)
895 		rate_num = 4;
896 	else if (p_dm->support_ic_type & ODM_IC_3SS)
897 		rate_num = 3;
898 	else if (p_dm->support_ic_type & ODM_IC_2SS)
899 		rate_num = 2;
900 
901 	PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("[RxRate Cnt] =============>\n"));
902 
903 	/*======CCK=============================================================*/
904 	if (*(p_dm->p_channel) <= 14) {
905 		PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("* CCK = {%d, %d, %d, %d}\n",
906 			p_dbg->num_qry_legacy_pkt[0],
907 			p_dbg->num_qry_legacy_pkt[1],
908 			p_dbg->num_qry_legacy_pkt[2],
909 			p_dbg->num_qry_legacy_pkt[3]
910 			));
911 	}
912 	/*======OFDM============================================================*/
913 	PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("* OFDM = {%d, %d, %d, %d, %d, %d, %d, %d}\n",
914 		p_dbg->num_qry_legacy_pkt[4], p_dbg->num_qry_legacy_pkt[5],
915 		p_dbg->num_qry_legacy_pkt[6], p_dbg->num_qry_legacy_pkt[7],
916 		p_dbg->num_qry_legacy_pkt[8], p_dbg->num_qry_legacy_pkt[9],
917 		p_dbg->num_qry_legacy_pkt[10], p_dbg->num_qry_legacy_pkt[11]));
918 
919 	/*======HT==============================================================*/
920 	if (p_dbg->ht_pkt_not_zero) {
921 
922 		for (i = 0; i < rate_num; i++) {
923 
924 			rate_ss_shift = (i << 3);
925 
926 			PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("* HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n",
927 				(rate_ss_shift), (rate_ss_shift+7),
928 				p_dbg->num_qry_ht_pkt[rate_ss_shift + 0], p_dbg->num_qry_ht_pkt[rate_ss_shift + 1],
929 				p_dbg->num_qry_ht_pkt[rate_ss_shift + 2], p_dbg->num_qry_ht_pkt[rate_ss_shift + 3],
930 				p_dbg->num_qry_ht_pkt[rate_ss_shift + 4], p_dbg->num_qry_ht_pkt[rate_ss_shift + 5],
931 				p_dbg->num_qry_ht_pkt[rate_ss_shift + 6], p_dbg->num_qry_ht_pkt[rate_ss_shift + 7]));
932 
933 		}
934 	}
935 
936 #if	ODM_IC_11AC_SERIES_SUPPORT
937 	/*======VHT=============================================================*/
938 	if (p_dbg->vht_pkt_not_zero){
939 
940 		for (i = 0; i < rate_num; i++) {
941 
942 			rate_ss_shift = 10 * i;
943 
944 			PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("* VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n",
945 				(i + 1),
946 				p_dbg->num_qry_vht_pkt[rate_ss_shift + 0], p_dbg->num_qry_vht_pkt[rate_ss_shift + 1],
947 				p_dbg->num_qry_vht_pkt[rate_ss_shift + 2], p_dbg->num_qry_vht_pkt[rate_ss_shift + 3],
948 				p_dbg->num_qry_vht_pkt[rate_ss_shift + 4], p_dbg->num_qry_vht_pkt[rate_ss_shift + 5],
949 				p_dbg->num_qry_vht_pkt[rate_ss_shift + 6], p_dbg->num_qry_vht_pkt[rate_ss_shift + 7],
950 				p_dbg->num_qry_vht_pkt[rate_ss_shift + 8], p_dbg->num_qry_vht_pkt[rate_ss_shift + 9]));
951 
952 		}
953 	}
954 #endif
955 
956 }
957 
958 void
phydm_get_avg_phystatus_val(void * p_dm_void)959 phydm_get_avg_phystatus_val
960 (
961 	void		*p_dm_void
962 )
963 {
964 	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
965 	struct phydm_phystatus_statistic		*p_dbg_statistic = &(p_dm->phy_dbg_info.phystatus_statistic_info);
966 	struct phydm_phystatus_avg		*p_dbg_avg = &(p_dm->phy_dbg_info.phystatus_statistic_avg);
967 
968 	PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("[Avg PHY Statistic] ==============>\n"));
969 
970 	phydm_reset_phystatus_avg(p_dm);
971 
972 	/*CCK*/
973 	p_dbg_avg->rssi_cck_avg = (u8)((p_dbg_statistic->rssi_cck_cnt != 0) ? (p_dbg_statistic->rssi_cck_sum/p_dbg_statistic->rssi_cck_cnt) : 0);
974 	PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("* cck Cnt= ((%d)) RSSI:{%d}\n", p_dbg_statistic->rssi_cck_cnt, p_dbg_avg->rssi_cck_avg));
975 
976 	/*OFDM*/
977 	if (p_dbg_statistic->rssi_ofdm_cnt != 0) {
978 		p_dbg_avg->rssi_ofdm_avg = (u8)(p_dbg_statistic->rssi_ofdm_sum/p_dbg_statistic->rssi_ofdm_cnt);
979 		p_dbg_avg->evm_ofdm_avg = (u8)(p_dbg_statistic->evm_ofdm_sum/p_dbg_statistic->rssi_ofdm_cnt);
980 		p_dbg_avg->snr_ofdm_avg = (u8)(p_dbg_statistic->snr_ofdm_sum/p_dbg_statistic->rssi_ofdm_cnt);
981 	}
982 
983 	PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("* ofdm Cnt= ((%d)) RSSI:{%d} EVM:{%d} SNR:{%d}\n",
984 		p_dbg_statistic->rssi_ofdm_cnt, p_dbg_avg->rssi_ofdm_avg, p_dbg_avg->evm_ofdm_avg, p_dbg_avg->snr_ofdm_avg));
985 
986 	if (p_dbg_statistic->rssi_1ss_cnt != 0) {
987 		p_dbg_avg->rssi_1ss_avg = (u8)(p_dbg_statistic->rssi_1ss_sum/p_dbg_statistic->rssi_1ss_cnt);
988 		p_dbg_avg->evm_1ss_avg = (u8)(p_dbg_statistic->evm_1ss_sum/p_dbg_statistic->rssi_1ss_cnt);
989 		p_dbg_avg->snr_1ss_avg = (u8)(p_dbg_statistic->snr_1ss_sum/p_dbg_statistic->rssi_1ss_cnt);
990 	}
991 
992 	PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("* 1-ss Cnt= ((%d)) RSSI:{%d} EVM:{%d} SNR:{%d}\n",
993 		p_dbg_statistic->rssi_1ss_cnt, p_dbg_avg->rssi_1ss_avg, p_dbg_avg->evm_1ss_avg, p_dbg_avg->snr_1ss_avg));
994 
995 	#if (defined(PHYDM_COMPILE_ABOVE_2SS))
996 	if (p_dm->support_ic_type & (PHYDM_IC_ABOVE_2SS)) {
997 
998 		if (p_dbg_statistic->rssi_2ss_cnt != 0) {
999 			p_dbg_avg->rssi_2ss_avg[0] = (u8)(p_dbg_statistic->rssi_2ss_sum[0] /p_dbg_statistic->rssi_2ss_cnt);
1000 			p_dbg_avg->rssi_2ss_avg[1] = (u8)(p_dbg_statistic->rssi_2ss_sum[1] /p_dbg_statistic->rssi_2ss_cnt);
1001 
1002 			p_dbg_avg->evm_2ss_avg[0] = (u8)(p_dbg_statistic->evm_2ss_sum[0] /p_dbg_statistic->rssi_2ss_cnt);
1003 			p_dbg_avg->evm_2ss_avg[1] = (u8)(p_dbg_statistic->evm_2ss_sum[1] /p_dbg_statistic->rssi_2ss_cnt);
1004 
1005 			p_dbg_avg->snr_2ss_avg[0] = (u8)(p_dbg_statistic->snr_2ss_sum[0] /p_dbg_statistic->rssi_2ss_cnt);
1006 			p_dbg_avg->snr_2ss_avg[1] = (u8)(p_dbg_statistic->snr_2ss_sum[1] /p_dbg_statistic->rssi_2ss_cnt);
1007 		}
1008 
1009 		PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("* 2-ss Cnt= ((%d)) RSSI:{%d, %d}, EVM:{%d, %d}, SNR:{%d, %d}\n",
1010 			p_dbg_statistic->rssi_2ss_cnt,
1011 			p_dbg_avg->rssi_2ss_avg[0], p_dbg_avg->rssi_2ss_avg[1],
1012 			p_dbg_avg->evm_2ss_avg[0], p_dbg_avg->evm_2ss_avg[1],
1013 			p_dbg_avg->snr_2ss_avg[0], p_dbg_avg->snr_2ss_avg[1]));
1014 	}
1015 	#endif
1016 
1017 	#if (defined(PHYDM_COMPILE_ABOVE_3SS))
1018 	if (p_dm->support_ic_type & (PHYDM_IC_ABOVE_3SS)) {
1019 
1020 		if (p_dbg_statistic->rssi_3ss_cnt != 0) {
1021 			p_dbg_avg->rssi_3ss_avg[0] = (u8)(p_dbg_statistic->rssi_3ss_sum[0] /p_dbg_statistic->rssi_3ss_cnt);
1022 			p_dbg_avg->rssi_3ss_avg[1] = (u8)(p_dbg_statistic->rssi_3ss_sum[1] /p_dbg_statistic->rssi_3ss_cnt);
1023 			p_dbg_avg->rssi_3ss_avg[2] = (u8)(p_dbg_statistic->rssi_3ss_sum[2] /p_dbg_statistic->rssi_3ss_cnt);
1024 
1025 			p_dbg_avg->evm_3ss_avg[0] = (u8)(p_dbg_statistic->evm_3ss_sum[0] /p_dbg_statistic->rssi_3ss_cnt);
1026 			p_dbg_avg->evm_3ss_avg[1] = (u8)(p_dbg_statistic->evm_3ss_sum[1] /p_dbg_statistic->rssi_3ss_cnt);
1027 			p_dbg_avg->evm_3ss_avg[2] = (u8)(p_dbg_statistic->evm_3ss_sum[2] /p_dbg_statistic->rssi_3ss_cnt);
1028 
1029 			p_dbg_avg->snr_3ss_avg[0] = (u8)(p_dbg_statistic->snr_3ss_sum[0] /p_dbg_statistic->rssi_3ss_cnt);
1030 			p_dbg_avg->snr_3ss_avg[1] = (u8)(p_dbg_statistic->snr_3ss_sum[1] /p_dbg_statistic->rssi_3ss_cnt);
1031 			p_dbg_avg->snr_3ss_avg[2] = (u8)(p_dbg_statistic->snr_3ss_sum[2] /p_dbg_statistic->rssi_3ss_cnt);
1032 		}
1033 
1034 		PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("* 3-ss Cnt= ((%d)) RSSI:{%d, %d, %d} EVM:{%d, %d, %d} SNR:{%d, %d, %d}\n",
1035 			p_dbg_statistic->rssi_3ss_cnt,
1036 			p_dbg_avg->rssi_3ss_avg[0], p_dbg_avg->rssi_3ss_avg[1], p_dbg_avg->rssi_3ss_avg[2],
1037 			p_dbg_avg->evm_3ss_avg[0], p_dbg_avg->evm_3ss_avg[1], p_dbg_avg->evm_3ss_avg[2],
1038 			p_dbg_avg->snr_3ss_avg[0], p_dbg_avg->snr_3ss_avg[1], p_dbg_avg->snr_3ss_avg[2]));
1039 	}
1040 	#endif
1041 
1042 	#if (defined(PHYDM_COMPILE_ABOVE_4SS))
1043 	if (p_dm->support_ic_type & PHYDM_IC_ABOVE_4SS) {
1044 
1045 		if (p_dbg_statistic->rssi_4ss_cnt != 0) {
1046 			p_dbg_avg->rssi_4ss_avg[0] = (u8)(p_dbg_statistic->rssi_4ss_sum[0] /p_dbg_statistic->rssi_4ss_cnt);
1047 			p_dbg_avg->rssi_4ss_avg[1] = (u8)(p_dbg_statistic->rssi_4ss_sum[1] /p_dbg_statistic->rssi_4ss_cnt);
1048 			p_dbg_avg->rssi_4ss_avg[2] = (u8)(p_dbg_statistic->rssi_4ss_sum[2] /p_dbg_statistic->rssi_4ss_cnt);
1049 			p_dbg_avg->rssi_4ss_avg[3] = (u8)(p_dbg_statistic->rssi_4ss_sum[3] /p_dbg_statistic->rssi_4ss_cnt);
1050 
1051 			p_dbg_avg->evm_4ss_avg[0] = (u8)(p_dbg_statistic->evm_4ss_sum[0] /p_dbg_statistic->rssi_4ss_cnt);
1052 			p_dbg_avg->evm_4ss_avg[1] = (u8)(p_dbg_statistic->evm_4ss_sum[1] /p_dbg_statistic->rssi_4ss_cnt);
1053 			p_dbg_avg->evm_4ss_avg[2] = (u8)(p_dbg_statistic->evm_4ss_sum[2] /p_dbg_statistic->rssi_4ss_cnt);
1054 			p_dbg_avg->evm_4ss_avg[3] = (u8)(p_dbg_statistic->evm_4ss_sum[3] /p_dbg_statistic->rssi_4ss_cnt);
1055 
1056 			p_dbg_avg->snr_4ss_avg[0] = (u8)(p_dbg_statistic->snr_4ss_sum[0] /p_dbg_statistic->rssi_4ss_cnt);
1057 			p_dbg_avg->snr_4ss_avg[1] = (u8)(p_dbg_statistic->snr_4ss_sum[1] /p_dbg_statistic->rssi_4ss_cnt);
1058 			p_dbg_avg->snr_4ss_avg[2] = (u8)(p_dbg_statistic->snr_4ss_sum[2] /p_dbg_statistic->rssi_4ss_cnt);
1059 			p_dbg_avg->snr_4ss_avg[3] = (u8)(p_dbg_statistic->snr_4ss_sum[3] /p_dbg_statistic->rssi_4ss_cnt);
1060 		}
1061 
1062 		PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("* 4-ss Cnt= ((%d)) RSSI:{%d, %d, %d, %d} EVM:{%d, %d, %d, %d} SNR:{%d, %d, %d, %d}\n",
1063 			p_dbg_statistic->rssi_4ss_cnt,
1064 			p_dbg_avg->rssi_4ss_avg[0], p_dbg_avg->rssi_4ss_avg[1], p_dbg_avg->rssi_4ss_avg[2], p_dbg_avg->rssi_4ss_avg[3],
1065 			p_dbg_avg->evm_4ss_avg[0], p_dbg_avg->evm_4ss_avg[1], p_dbg_avg->evm_4ss_avg[2], p_dbg_avg->evm_4ss_avg[3],
1066 			p_dbg_avg->snr_4ss_avg[0], p_dbg_avg->snr_4ss_avg[1], p_dbg_avg->snr_4ss_avg[2], p_dbg_avg->snr_4ss_avg[3]));
1067 	}
1068 	#endif
1069 
1070 
1071 
1072 }
1073 
1074 void
phydm_get_phy_statistic(void * p_dm_void)1075 phydm_get_phy_statistic(
1076 	void		*p_dm_void
1077 )
1078 {
1079 	struct	PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
1080 
1081 	phydm_rx_rate_distribution(p_dm);
1082 	phydm_reset_rx_rate_distribution(p_dm);
1083 
1084 	phydm_get_avg_phystatus_val(p_dm);
1085 	phydm_reset_phystatus_statistic(p_dm);
1086 };
1087 
1088 void
phydm_basic_dbg_message(void * p_dm_void)1089 phydm_basic_dbg_message
1090 (
1091 	void			*p_dm_void
1092 )
1093 {
1094 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
1095 	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
1096 	struct phydm_fa_struct *false_alm_cnt = (struct phydm_fa_struct *)phydm_get_structure(p_dm, PHYDM_FALSEALMCNT);
1097 	struct phydm_cfo_track_struct				*p_cfo_track = (struct phydm_cfo_track_struct *)phydm_get_structure(p_dm, PHYDM_CFOTRACK);
1098 	struct phydm_dig_struct	*p_dig_t = &p_dm->dm_dig_table;
1099 	struct _rate_adaptive_table_	*p_ra_table = &p_dm->dm_ra_table;
1100 	u16	macid, phydm_macid, client_cnt = 0;
1101 	struct cmn_sta_info	*p_entry = NULL;
1102 	s32	tmp_val = 0;
1103 	u8	tmp_val_u1 = 0;
1104 
1105 	if (!(p_dm->debug_components & ODM_COMP_COMMON))
1106 		return;
1107 
1108 	PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("[PHYDM Common MSG] System up time: ((%d sec))----->\n", p_dm->phydm_sys_up_time));
1109 
1110 	if (p_dm->is_linked) {
1111 		PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("ID=((%d)), BW=((%d)), fc=((CH-%d))\n", p_dm->curr_station_id, 20<<(*(p_dm->p_band_width)), *(p_dm->p_channel)));
1112 
1113 		if ((*(p_dm->p_channel) <= 14) && (*(p_dm->p_band_width) == CHANNEL_WIDTH_40)) {
1114 			PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("Primary CCA at ((%s SB))\n",
1115 				(((*(p_dm->p_sec_ch_offset)) == SECOND_CH_AT_LSB)?"U":"L")));
1116 		}
1117 
1118 		if ((p_dm->support_ic_type & ODM_IC_PHY_STATUE_NEW_TYPE) || p_dm->rx_rate > ODM_RATE11M) {
1119 
1120 			PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("[AGC Idx] {0x%x, 0x%x, 0x%x, 0x%x}\n",
1121 				p_dm->ofdm_agc_idx[0], p_dm->ofdm_agc_idx[1], p_dm->ofdm_agc_idx[2], p_dm->ofdm_agc_idx[3]));
1122 		} else {
1123 
1124 			PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("[CCK AGC Idx] {LNA, VGA}={0x%x, 0x%x}\n",
1125 				p_dm->cck_lna_idx, p_dm->cck_vga_idx));
1126 		}
1127 
1128 		PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("RSSI:{%d, %d, %d, %d}, RxRate:",
1129 			(p_dm->RSSI_A == 0xff) ? 0 : p_dm->RSSI_A,
1130 			(p_dm->RSSI_B == 0xff) ? 0 : p_dm->RSSI_B,
1131 			(p_dm->RSSI_C == 0xff) ? 0 : p_dm->RSSI_C,
1132 			(p_dm->RSSI_D == 0xff) ? 0 : p_dm->RSSI_D));
1133 
1134 		phydm_print_rate(p_dm, p_dm->rx_rate, ODM_COMP_COMMON);
1135 
1136 		phydm_get_phy_statistic(p_dm);
1137 
1138 		/*Print TX rate*/
1139 		for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) {
1140 
1141 			p_entry = p_dm->p_phydm_sta_info[macid];
1142 			if (!is_sta_active(p_entry)) {
1143 				continue;
1144 			}
1145 
1146 			phydm_macid = (p_dm->phydm_macid_table[macid]);
1147 			PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("TxRate[%d]:", macid));
1148 			phydm_print_rate(p_dm, p_entry->ra_info.curr_tx_rate, ODM_COMP_COMMON);
1149 
1150 			client_cnt++;
1151 
1152 			if (client_cnt >= p_dm->number_linked_client)
1153 				break;
1154 		}
1155 
1156 		PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("TP {Tx, Rx, Total} = {%d, %d, %d}Mbps, Traffic_Load=(%d))\n",
1157 			p_dm->tx_tp, p_dm->rx_tp, p_dm->total_tp, p_dm->traffic_load));
1158 
1159 		tmp_val_u1 = (p_cfo_track->crystal_cap > p_cfo_track->def_x_cap) ? (p_cfo_track->crystal_cap - p_cfo_track->def_x_cap) : (p_cfo_track->def_x_cap - p_cfo_track->crystal_cap);
1160 		PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("CFO_avg = ((%d kHz)) , CFO_tracking = ((%s%d))\n",
1161 			p_cfo_track->CFO_ave_pre, ((p_cfo_track->crystal_cap > p_cfo_track->def_x_cap) ? "+" : "-"), tmp_val_u1));
1162 
1163 		/* Condition number */
1164 	#if (RTL8822B_SUPPORT == 1)
1165 		if (p_dm->support_ic_type == ODM_RTL8822B) {
1166 			tmp_val = phydm_get_condition_number_8822B(p_dm);
1167 			PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("Condi_Num=((%d))\n", tmp_val));
1168 		}
1169 	#endif
1170 
1171 	#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
1172 		/*STBC or LDPC pkt*/
1173 		if (p_dm->support_ic_type & ODM_IC_PHY_STATUE_NEW_TYPE)
1174 			PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("Coding: LDPC=((%s)), STBC=((%s))\n", (p_dm->phy_dbg_info.is_ldpc_pkt) ? "Y" : "N", (p_dm->phy_dbg_info.is_stbc_pkt) ? "Y" : "N"));
1175 	#endif
1176 	} else
1177 		PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("No Link !!!\n"));
1178 
1179 	PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("[CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
1180 		false_alm_cnt->cnt_cck_cca, false_alm_cnt->cnt_ofdm_cca, false_alm_cnt->cnt_cca_all));
1181 
1182 	PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("[FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
1183 		false_alm_cnt->cnt_cck_fail, false_alm_cnt->cnt_ofdm_fail, false_alm_cnt->cnt_all));
1184 
1185 	#if (ODM_IC_11N_SERIES_SUPPORT == 1)
1186 	if (p_dm->support_ic_type & ODM_IC_11N_SERIES) {
1187 		PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("[OFDM FA Detail] Parity_Fail = (( %d )), Rate_Illegal = (( %d )), CRC8_fail = (( %d )), Mcs_fail = (( %d )), Fast_Fsync = (( %d )), SB_Search_fail = (( %d ))\n",
1188 			false_alm_cnt->cnt_parity_fail, false_alm_cnt->cnt_rate_illegal, false_alm_cnt->cnt_crc8_fail, false_alm_cnt->cnt_mcs_fail, false_alm_cnt->cnt_fast_fsync, false_alm_cnt->cnt_sb_search_fail));
1189 	}
1190 	#endif
1191 
1192 	PHYDM_DBG(p_dm, ODM_COMP_COMMON, ("is_linked = %d, Num_client = %d, rssi_min = %d, IGI = 0x%x, bNoisy=%d\n\n",
1193 		p_dm->is_linked, p_dm->number_linked_client, p_dm->rssi_min, p_dig_t->cur_ig_value, p_dm->noisy_decision));
1194 
1195 #endif
1196 }
1197 
1198 
phydm_basic_profile(void * p_dm_void,u32 * _used,char * output,u32 * _out_len)1199 void phydm_basic_profile(
1200 	void			*p_dm_void,
1201 	u32			*_used,
1202 	char				*output,
1203 	u32			*_out_len
1204 )
1205 {
1206 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
1207 	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
1208 	char  *cut = NULL;
1209 	char *ic_type = NULL;
1210 	u32 used = *_used;
1211 	u32 out_len = *_out_len;
1212 	u32	date = 0;
1213 	char	*commit_by = NULL;
1214 	u32	release_ver = 0;
1215 
1216 	PHYDM_SNPRINTF((output + used, out_len - used, "%-35s\n", "% Basic Profile %"));
1217 
1218 	if (p_dm->support_ic_type == ODM_RTL8188E) {
1219 #if (RTL8188E_SUPPORT == 1)
1220 		ic_type = "RTL8188E";
1221 		date = RELEASE_DATE_8188E;
1222 		commit_by = COMMIT_BY_8188E;
1223 		release_ver = RELEASE_VERSION_8188E;
1224 #endif
1225 	}
1226 #if (RTL8812A_SUPPORT == 1)
1227 	else if (p_dm->support_ic_type == ODM_RTL8812) {
1228 		ic_type = "RTL8812A";
1229 		date = RELEASE_DATE_8812A;
1230 		commit_by = COMMIT_BY_8812A;
1231 		release_ver = RELEASE_VERSION_8812A;
1232 	}
1233 #endif
1234 #if (RTL8821A_SUPPORT == 1)
1235 	else if (p_dm->support_ic_type == ODM_RTL8821) {
1236 		ic_type = "RTL8821A";
1237 		date = RELEASE_DATE_8821A;
1238 		commit_by = COMMIT_BY_8821A;
1239 		release_ver = RELEASE_VERSION_8821A;
1240 	}
1241 #endif
1242 #if (RTL8192E_SUPPORT == 1)
1243 	else if (p_dm->support_ic_type == ODM_RTL8192E) {
1244 		ic_type = "RTL8192E";
1245 		date = RELEASE_DATE_8192E;
1246 		commit_by = COMMIT_BY_8192E;
1247 		release_ver = RELEASE_VERSION_8192E;
1248 	}
1249 #endif
1250 #if (RTL8723B_SUPPORT == 1)
1251 	else if (p_dm->support_ic_type == ODM_RTL8723B) {
1252 		ic_type = "RTL8723B";
1253 		date = RELEASE_DATE_8723B;
1254 		commit_by = COMMIT_BY_8723B;
1255 		release_ver = RELEASE_VERSION_8723B;
1256 	}
1257 #endif
1258 #if (RTL8814A_SUPPORT == 1)
1259 	else if (p_dm->support_ic_type == ODM_RTL8814A) {
1260 		ic_type = "RTL8814A";
1261 		date = RELEASE_DATE_8814A;
1262 		commit_by = COMMIT_BY_8814A;
1263 		release_ver = RELEASE_VERSION_8814A;
1264 	}
1265 #endif
1266 #if (RTL8881A_SUPPORT == 1)
1267 	else if (p_dm->support_ic_type == ODM_RTL8881A) {
1268 		ic_type = "RTL8881A";
1269 		/**/
1270 	}
1271 #endif
1272 #if (RTL8822B_SUPPORT == 1)
1273 	else if (p_dm->support_ic_type == ODM_RTL8822B) {
1274 		ic_type = "RTL8822B";
1275 		date = RELEASE_DATE_8822B;
1276 		commit_by = COMMIT_BY_8822B;
1277 		release_ver = RELEASE_VERSION_8822B;
1278 	}
1279 #endif
1280 #if (RTL8197F_SUPPORT == 1)
1281 	else if (p_dm->support_ic_type == ODM_RTL8197F) {
1282 		ic_type = "RTL8197F";
1283 		date = RELEASE_DATE_8197F;
1284 		commit_by = COMMIT_BY_8197F;
1285 		release_ver = RELEASE_VERSION_8197F;
1286 	}
1287 #endif
1288 
1289 #if (RTL8703B_SUPPORT == 1)
1290 	else if (p_dm->support_ic_type == ODM_RTL8703B) {
1291 
1292 		ic_type = "RTL8703B";
1293 		date = RELEASE_DATE_8703B;
1294 		commit_by = COMMIT_BY_8703B;
1295 		release_ver = RELEASE_VERSION_8703B;
1296 
1297 	}
1298 #endif
1299 #if (RTL8195A_SUPPORT == 1)
1300 	else if (p_dm->support_ic_type == ODM_RTL8195A) {
1301 		ic_type = "RTL8195A";
1302 		/**/
1303 	}
1304 #endif
1305 #if (RTL8188F_SUPPORT == 1)
1306 	else if (p_dm->support_ic_type == ODM_RTL8188F) {
1307 		ic_type = "RTL8188F";
1308 		date = RELEASE_DATE_8188F;
1309 		commit_by = COMMIT_BY_8188F;
1310 		release_ver = RELEASE_VERSION_8188F;
1311 	}
1312 #endif
1313 #if (RTL8723D_SUPPORT == 1)
1314 	else if (p_dm->support_ic_type == ODM_RTL8723D) {
1315 		ic_type = "RTL8723D";
1316 		date = RELEASE_DATE_8723D;
1317 		commit_by = COMMIT_BY_8723D;
1318 		release_ver = RELEASE_VERSION_8723D;
1319 		/**/
1320 	}
1321 #endif
1322 
1323 /* JJ ADD 20161014 */
1324 #if (RTL8710B_SUPPORT == 1)
1325 	else if (p_dm->support_ic_type == ODM_RTL8710B) {
1326 		ic_type = "RTL8710B";
1327 		date = RELEASE_DATE_8710B;
1328 		commit_by = COMMIT_BY_8710B;
1329 		release_ver = RELEASE_VERSION_8710B;
1330 		/**/
1331 	}
1332 #endif
1333 
1334 #if (RTL8821C_SUPPORT == 1)
1335 	else if (p_dm->support_ic_type == ODM_RTL8821C) {
1336 		ic_type = "RTL8821C";
1337 		date = RELEASE_DATE_8821C;
1338 		commit_by = COMMIT_BY_8821C;
1339 		release_ver = RELEASE_VERSION_8821C;
1340 	}
1341 #endif
1342 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s (MP Chip: %s)\n", "IC type", ic_type, p_dm->is_mp_chip ? "Yes" : "No"));
1343 
1344 	if (p_dm->cut_version == ODM_CUT_A)
1345 		cut = "A";
1346 	else if (p_dm->cut_version == ODM_CUT_B)
1347 		cut = "B";
1348 	else if (p_dm->cut_version == ODM_CUT_C)
1349 		cut = "C";
1350 	else if (p_dm->cut_version == ODM_CUT_D)
1351 		cut = "D";
1352 	else if (p_dm->cut_version == ODM_CUT_E)
1353 		cut = "E";
1354 	else if (p_dm->cut_version == ODM_CUT_F)
1355 		cut = "F";
1356 	else if (p_dm->cut_version == ODM_CUT_I)
1357 		cut = "I";
1358 
1359 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %d\n", "RFE type", p_dm->rfe_type));
1360 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "Cut Ver", cut));
1361 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %d\n", "PHY Para Ver", odm_get_hw_img_version(p_dm)));
1362 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %d\n", "PHY Para Commit date", date));
1363 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "PHY Para Commit by", commit_by));
1364 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %d\n", "PHY Para Release Ver", release_ver));
1365 
1366 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
1367 	{
1368 		struct _ADAPTER		*adapter = p_dm->adapter;
1369 		PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %d (Subversion: %d)\n", "FW Ver", adapter->MgntInfo.FirmwareVersion, adapter->MgntInfo.FirmwareSubVersion));
1370 	}
1371 #elif (DM_ODM_SUPPORT_TYPE & ODM_AP)
1372 	{
1373 		struct rtl8192cd_priv *priv = p_dm->priv;
1374 		PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %d (Subversion: %d)\n", "FW Ver", priv->pshare->fw_version, priv->pshare->fw_sub_version));
1375 	}
1376 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
1377 	{
1378 		struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm->adapter;
1379 		struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
1380 
1381 		PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %d (Subversion: %d)\n", "FW Ver", rtlhal->fw_version, rtlhal->fw_subversion));
1382 	}
1383 #else
1384 	{
1385 		struct _ADAPTER		*adapter = p_dm->adapter;
1386 		HAL_DATA_TYPE		*p_hal_data = GET_HAL_DATA(adapter);
1387 		PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %d (Subversion: %d)\n", "FW Ver", p_hal_data->firmware_version, p_hal_data->firmware_sub_version));
1388 	}
1389 #endif
1390 	/* 1 PHY DM version List */
1391 	PHYDM_SNPRINTF((output + used, out_len - used, "%-35s\n", "% PHYDM version %"));
1392 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "Code base", PHYDM_CODE_BASE));
1393 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "Release Date", PHYDM_RELEASE_DATE));
1394 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "Adaptivity", ADAPTIVITY_VERSION));
1395 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "DIG", DIG_VERSION));
1396 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "CFO Tracking", CFO_TRACKING_VERSION));
1397 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "AntDiv", ANTDIV_VERSION));
1398 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "Dynamic TxPower", DYNAMIC_TXPWR_VERSION));
1399 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "RA Info", RAINFO_VERSION));
1400 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
1401 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "AntDetect", ANTDECT_VERSION));
1402 #endif
1403 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "ACS", ACS_VERSION));
1404 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "PathDiv", PATHDIV_VERSION));
1405 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "LA mode", DYNAMIC_LA_MODE));
1406 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "Primary CCA", PRIMARYCCA_VERSION));
1407 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "DFS", DFS_VERSION));
1408 
1409 #if (RTL8822B_SUPPORT == 1)
1410 	if (p_dm->support_ic_type & ODM_RTL8822B)
1411 		PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "PHY config 8822B", PHY_CONFIG_VERSION_8822B));
1412 
1413 #endif
1414 #if (RTL8197F_SUPPORT == 1)
1415 	if (p_dm->support_ic_type & ODM_RTL8197F)
1416 		PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "PHY config 8197F", PHY_CONFIG_VERSION_8197F));
1417 #endif
1418 	*_used = used;
1419 	*_out_len = out_len;
1420 #endif /*#if CONFIG_PHYDM_DEBUG_FUNCTION*/
1421 }
1422 
1423 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
1424 void
phydm_fw_trace_en_h2c(void * p_dm_void,boolean enable,u32 fw_debug_component,u32 monitor_mode,u32 macid)1425 phydm_fw_trace_en_h2c(
1426 	void		*p_dm_void,
1427 	boolean		enable,
1428 	u32		fw_debug_component,
1429 	u32		monitor_mode,
1430 	u32		macid
1431 )
1432 {
1433 	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
1434 	u8			h2c_parameter[7] = {0};
1435 	u8			cmd_length;
1436 
1437 	if (p_dm->support_ic_type & PHYDM_IC_3081_SERIES) {
1438 
1439 		h2c_parameter[0] = enable;
1440 		h2c_parameter[1] = (u8)(fw_debug_component & MASKBYTE0);
1441 		h2c_parameter[2] = (u8)((fw_debug_component & MASKBYTE1) >> 8);
1442 		h2c_parameter[3] = (u8)((fw_debug_component & MASKBYTE2) >> 16);
1443 		h2c_parameter[4] = (u8)((fw_debug_component & MASKBYTE3) >> 24);
1444 		h2c_parameter[5] = (u8)monitor_mode;
1445 		h2c_parameter[6] = (u8)macid;
1446 		cmd_length = 7;
1447 
1448 	} else {
1449 
1450 		h2c_parameter[0] = enable;
1451 		h2c_parameter[1] = (u8)monitor_mode;
1452 		h2c_parameter[2] = (u8)macid;
1453 		cmd_length = 3;
1454 	}
1455 
1456 
1457 	PHYDM_DBG(p_dm, DBG_FW_TRACE, ("---->\n"));
1458 	if (monitor_mode == 0)
1459 		PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[H2C] FW_debug_en: (( %d ))\n", enable));
1460 	else
1461 		PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[H2C] FW_debug_en: (( %d )), mode: (( %d )), macid: (( %d ))\n", enable, monitor_mode, macid));
1462 	odm_fill_h2c_cmd(p_dm, PHYDM_H2C_FW_TRACE_EN, cmd_length, h2c_parameter);
1463 }
1464 
1465 void
phydm_get_per_path_txagc(void * p_dm_void,u8 path,u32 * _used,char * output,u32 * _out_len)1466 phydm_get_per_path_txagc(
1467 	void			*p_dm_void,
1468 	u8			path,
1469 	u32			*_used,
1470 	char				*output,
1471 	u32			*_out_len
1472 )
1473 {
1474 	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
1475 	u8			rate_idx;
1476 	u8			txagc;
1477 	u32			used = *_used;
1478 	u32			out_len = *_out_len;
1479 
1480 #ifdef PHYDM_COMMON_API_SUPPORT
1481 	if (((p_dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F)) && (path <= RF_PATH_B)) ||
1482 		((p_dm->support_ic_type & (ODM_RTL8821C)) && (path <= RF_PATH_A))) {
1483 		for (rate_idx = 0; rate_idx <= 0x53; rate_idx++) {
1484 			if (rate_idx == ODM_RATE1M)
1485 				PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s\n", "CCK====>"));
1486 			else if (rate_idx == ODM_RATE6M)
1487 				PHYDM_SNPRINTF((output + used, out_len - used, "\n  %-35s\n", "OFDM====>"));
1488 			else if (rate_idx == ODM_RATEMCS0)
1489 				PHYDM_SNPRINTF((output + used, out_len - used, "\n  %-35s\n", "HT 1ss====>"));
1490 			else if (rate_idx == ODM_RATEMCS8)
1491 				PHYDM_SNPRINTF((output + used, out_len - used, "\n  %-35s\n", "HT 2ss====>"));
1492 			else if (rate_idx == ODM_RATEMCS16)
1493 				PHYDM_SNPRINTF((output + used, out_len - used, "\n  %-35s\n", "HT 3ss====>"));
1494 			else if (rate_idx == ODM_RATEMCS24)
1495 				PHYDM_SNPRINTF((output + used, out_len - used, "\n  %-35s\n", "HT 4ss====>"));
1496 			else if (rate_idx == ODM_RATEVHTSS1MCS0)
1497 				PHYDM_SNPRINTF((output + used, out_len - used, "\n  %-35s\n", "VHT 1ss====>"));
1498 			else if (rate_idx == ODM_RATEVHTSS2MCS0)
1499 				PHYDM_SNPRINTF((output + used, out_len - used, "\n  %-35s\n", "VHT 2ss====>"));
1500 			else if (rate_idx == ODM_RATEVHTSS3MCS0)
1501 				PHYDM_SNPRINTF((output + used, out_len - used, "\n  %-35s\n", "VHT 3ss====>"));
1502 			else if (rate_idx == ODM_RATEVHTSS4MCS0)
1503 				PHYDM_SNPRINTF((output + used, out_len - used, "\n  %-35s\n", "VHT 4ss====>"));
1504 
1505 			txagc = phydm_api_get_txagc(p_dm, (enum rf_path) path, rate_idx);
1506 			if (config_phydm_read_txagc_check(txagc))
1507 				PHYDM_SNPRINTF((output + used, out_len - used, "  0x%02x    ", txagc));
1508 			else
1509 				PHYDM_SNPRINTF((output + used, out_len - used, "  0x%s    ", "xx"));
1510 		}
1511 	}
1512 #endif
1513 
1514 	*_used = used;
1515 	*_out_len = out_len;
1516 
1517 }
1518 
1519 
1520 void
phydm_get_txagc(void * p_dm_void,u32 * _used,char * output,u32 * _out_len)1521 phydm_get_txagc(
1522 	void			*p_dm_void,
1523 	u32			*_used,
1524 	char			*output,
1525 	u32			*_out_len
1526 )
1527 {
1528 	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
1529 	u32			used = *_used;
1530 	u32			out_len = *_out_len;
1531 
1532 	/* path-A */
1533 	PHYDM_SNPRINTF((output + used, out_len - used, "%-35s\n", "path-A===================="));
1534 	phydm_get_per_path_txagc(p_dm, RF_PATH_A, &used, output, &out_len);
1535 
1536 	/* path-B */
1537 	PHYDM_SNPRINTF((output + used, out_len - used, "\n%-35s\n", "path-B===================="));
1538 	phydm_get_per_path_txagc(p_dm, RF_PATH_B, &used, output, &out_len);
1539 
1540 	/* path-C */
1541 	PHYDM_SNPRINTF((output + used, out_len - used, "\n%-35s\n", "path-C===================="));
1542 	phydm_get_per_path_txagc(p_dm, RF_PATH_C, &used, output, &out_len);
1543 
1544 	/* path-D */
1545 	PHYDM_SNPRINTF((output + used, out_len - used, "\n%-35s\n", "path-D===================="));
1546 	phydm_get_per_path_txagc(p_dm, RF_PATH_D, &used, output, &out_len);
1547 
1548 	*_used = used;
1549 	*_out_len = out_len;
1550 
1551 }
1552 
1553 void
phydm_set_txagc(void * p_dm_void,u32 * const dm_value,u32 * _used,char * output,u32 * _out_len)1554 phydm_set_txagc(
1555 	void			*p_dm_void,
1556 	u32			*const dm_value,
1557 	u32			*_used,
1558 	char			*output,
1559 	u32			*_out_len
1560 )
1561 {
1562 	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
1563 	u32			used = *_used;
1564 	u32			out_len = *_out_len;
1565 
1566 	/*dm_value[1] = path*/
1567 	/*dm_value[2] = hw_rate*/
1568 	/*dm_value[3] = power_index*/
1569 
1570 #ifdef PHYDM_COMMON_API_SUPPORT
1571 	if (p_dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8821C)) {
1572 		if (dm_value[1] <= 1) {
1573 			if ((u8)dm_value[2] != 0xff) {
1574 				if (phydm_api_set_txagc(p_dm, dm_value[3], (enum rf_path) dm_value[1], (u8)dm_value[2], true))
1575 					PHYDM_SNPRINTF((output + used, out_len - used, "  %s%d   %s%x%s%x\n", "Write path-", dm_value[1], "rate index-0x", dm_value[2], " = 0x", dm_value[3]));
1576 				else
1577 					PHYDM_SNPRINTF((output + used, out_len - used, "  %s%d   %s%x%s\n", "Write path-", (dm_value[1] & 0x1), "rate index-0x", (dm_value[2] & 0x7f), " fail"));
1578 			} else {
1579 				u8	i;
1580 				u32	power_index;
1581 				boolean	status = true;
1582 
1583 				power_index = (dm_value[3] & 0x3f);
1584 
1585 				if (p_dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) {
1586 					power_index = (power_index << 24) | (power_index << 16) | (power_index << 8) | (power_index);
1587 
1588 					for (i = 0; i < ODM_RATEVHTSS2MCS9; i += 4)
1589 						status = (status & phydm_api_set_txagc(p_dm, power_index, (enum rf_path) dm_value[1], i, false));
1590 				} else if (p_dm->support_ic_type & ODM_RTL8197F) {
1591 					for (i = 0; i <= ODM_RATEMCS15; i++)
1592 						status = (status & phydm_api_set_txagc(p_dm, power_index, (enum rf_path) dm_value[1], i, false));
1593 				}
1594 
1595 				if (status)
1596 					PHYDM_SNPRINTF((output + used, out_len - used, "  %s%d   %s%x\n", "Write all TXAGC of path-", dm_value[1], " = 0x", dm_value[3]));
1597 				else
1598 					PHYDM_SNPRINTF((output + used, out_len - used, "  %s%d   %s\n", "Write all TXAGC of path-", dm_value[1], " fail"));
1599 			}
1600 		} else
1601 			PHYDM_SNPRINTF((output + used, out_len - used, "  %s%d   %s%x%s\n", "Write path-", (dm_value[1] & 0x1), "rate index-0x", (dm_value[2] & 0x7f), " fail"));
1602 	}
1603 #endif
1604 	*_used = used;
1605 	*_out_len = out_len;
1606 }
1607 
1608 void
phydm_debug_trace(void * p_dm_void,u32 * const dm_value,u32 * _used,char * output,u32 * _out_len)1609 phydm_debug_trace(
1610 	void		*p_dm_void,
1611 	u32		*const dm_value,
1612 	u32		*_used,
1613 	char		*output,
1614 	u32		*_out_len
1615 )
1616 {
1617 	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
1618 	u64			pre_debug_components, one = 1;
1619 	u32			used = *_used;
1620 	u32			out_len = *_out_len;
1621 
1622 	pre_debug_components = p_dm->debug_components;
1623 
1624 	PHYDM_SNPRINTF((output + used, out_len - used, "\n%s\n", "================================"));
1625 	if (dm_value[0] == 100) {
1626 		PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "[Debug Message] PhyDM Selection"));
1627 		PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================"));
1628 		PHYDM_SNPRINTF((output + used, out_len - used, "00. (( %s ))DIG\n", ((p_dm->debug_components & DBG_DIG) ? ("V") : ("."))));
1629 		PHYDM_SNPRINTF((output + used, out_len - used, "01. (( %s ))RA_MASK\n", ((p_dm->debug_components & DBG_RA_MASK) ? ("V") : ("."))));
1630 		PHYDM_SNPRINTF((output + used, out_len - used, "02. (( %s ))DYNAMIC_TXPWR\n", ((p_dm->debug_components & DBG_DYN_TXPWR) ? ("V") : ("."))));
1631 		PHYDM_SNPRINTF((output + used, out_len - used, "03. (( %s ))FA_CNT\n", ((p_dm->debug_components & DBG_FA_CNT) ? ("V") : ("."))));
1632 		PHYDM_SNPRINTF((output + used, out_len - used, "04. (( %s ))RSSI_MONITOR\n", ((p_dm->debug_components & DBG_RSSI_MNTR) ? ("V") : ("."))));
1633 		PHYDM_SNPRINTF((output + used, out_len - used, "05. (( %s ))CCKPD\n", ((p_dm->debug_components & DBG_CCKPD) ? ("V") : ("."))));
1634 		PHYDM_SNPRINTF((output + used, out_len - used, "06. (( %s ))ANT_DIV\n", ((p_dm->debug_components & DBG_ANT_DIV) ? ("V") : ("."))));
1635 		PHYDM_SNPRINTF((output + used, out_len - used, "07. (( %s ))SMT_ANT\n", ((p_dm->debug_components & DBG_SMT_ANT) ? ("V") : ("."))));
1636 		PHYDM_SNPRINTF((output + used, out_len - used, "08. (( %s ))PWR_TRAIN\n", ((p_dm->debug_components & F08_PWR_TRAIN) ? ("V") : ("."))));
1637 		PHYDM_SNPRINTF((output + used, out_len - used, "09. (( %s ))RA\n", ((p_dm->debug_components & DBG_RA) ? ("V") : ("."))));
1638 		PHYDM_SNPRINTF((output + used, out_len - used, "10. (( %s ))PATH_DIV\n", ((p_dm->debug_components & DBG_PATH_DIV) ? ("V") : ("."))));
1639 		PHYDM_SNPRINTF((output + used, out_len - used, "11. (( %s ))DFS\n", ((p_dm->debug_components & DBG_DFS) ? ("V") : ("."))));
1640 		PHYDM_SNPRINTF((output + used, out_len - used, "12. (( %s ))DYN_ARFR\n", ((p_dm->debug_components & DBG_DYN_ARFR) ? ("V") : ("."))));
1641 		PHYDM_SNPRINTF((output + used, out_len - used, "13. (( %s ))ADAPTIVITY\n", ((p_dm->debug_components & DBG_ADPTVTY) ? ("V") : ("."))));
1642 		PHYDM_SNPRINTF((output + used, out_len - used, "14. (( %s ))CFO_TRK\n", ((p_dm->debug_components & DBG_CFO_TRK) ? ("V") : ("."))));
1643 		PHYDM_SNPRINTF((output + used, out_len - used, "15. (( %s ))ENV_MNTR\n", ((p_dm->debug_components & DBG_ENV_MNTR) ? ("V") : ("."))));
1644 		PHYDM_SNPRINTF((output + used, out_len - used, "16. (( %s ))PRI_CCA\n", ((p_dm->debug_components & DBG_PRI_CCA) ? ("V") : ("."))));
1645 		PHYDM_SNPRINTF((output + used, out_len - used, "17. (( %s ))ADPTV_SOML\n", ((p_dm->debug_components & DBG_ADPTV_SOML) ? ("V") : ("."))));
1646 		PHYDM_SNPRINTF((output + used, out_len - used, "18. (( %s ))LNA_SAT_CHK\n", ((p_dm->debug_components & DBG_LNA_SAT_CHK) ? ("V") : ("."))));
1647 		/*PHYDM_SNPRINTF((output + used, out_len - used, "19. (( %s ))TBD1\n", ((p_dm->debug_components & DBG_TBD1) ? ("V") : ("."))));*/
1648 		PHYDM_SNPRINTF((output + used, out_len - used, "20. (( %s ))DRP\n", ((p_dm->debug_components & DBG_DYN_RX_PATH) ? ("V") : ("."))));
1649 		PHYDM_SNPRINTF((output + used, out_len - used, "21. (( %s ))TMP\n", ((p_dm->debug_components & DBG_TMP) ? ("V") : ("."))));
1650 		PHYDM_SNPRINTF((output + used, out_len - used, "22. (( %s ))FW_DEBUG_TRACE\n", ((p_dm->debug_components & DBG_FW_TRACE) ? ("V") : ("."))));
1651 		PHYDM_SNPRINTF((output + used, out_len - used, "23. (( %s ))TXBF\n", ((p_dm->debug_components & DBG_TXBF) ? ("V") : ("."))));
1652 		PHYDM_SNPRINTF((output + used, out_len - used, "24. (( %s ))COMMON_FLOW\n", ((p_dm->debug_components & DBG_COMMON_FLOW) ? ("V") : ("."))));
1653 		PHYDM_SNPRINTF((output + used, out_len - used, "25. (( %s ))TX_PWR_TRK\n", ((p_dm->debug_components & ODM_COMP_TX_PWR_TRACK) ? ("V") : ("."))));
1654 		PHYDM_SNPRINTF((output + used, out_len - used, "26. (( %s ))CALIBRATION\n", ((p_dm->debug_components & ODM_COMP_CALIBRATION) ? ("V") : ("."))));
1655 		PHYDM_SNPRINTF((output + used, out_len - used, "27. (( %s ))MP\n", ((p_dm->debug_components & ODM_COMP_MP) ? ("V") : ("."))));
1656 		PHYDM_SNPRINTF((output + used, out_len - used, "28. (( %s ))PHY_CONFIG\n", ((p_dm->debug_components & ODM_PHY_CONFIG) ? ("V") : ("."))));
1657 		PHYDM_SNPRINTF((output + used, out_len - used, "29. (( %s ))INIT\n", ((p_dm->debug_components & ODM_COMP_INIT) ? ("V") : ("."))));
1658 		PHYDM_SNPRINTF((output + used, out_len - used, "30. (( %s ))COMMON\n", ((p_dm->debug_components & ODM_COMP_COMMON) ? ("V") : ("."))));
1659 		PHYDM_SNPRINTF((output + used, out_len - used, "31. (( %s ))API\n", ((p_dm->debug_components & ODM_COMP_API) ? ("V") : ("."))));
1660 		PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================"));
1661 
1662 	} else if (dm_value[0] == 101) {
1663 		p_dm->debug_components = 0;
1664 		PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "Disable all debug components"));
1665 	} else {
1666 		if (dm_value[1] == 1)   /*enable*/
1667 			p_dm->debug_components |= (one << dm_value[0]);
1668 		else if (dm_value[1] == 2)   /*disable*/
1669 			p_dm->debug_components &= ~(one << dm_value[0]);
1670 		else
1671 			PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "[Warning!!!]  1:enable,  2:disable"));
1672 	}
1673 	PHYDM_SNPRINTF((output + used, out_len - used, "pre-DbgComponents = 0x%llx\n", pre_debug_components));
1674 	PHYDM_SNPRINTF((output + used, out_len - used, "Curr-DbgComponents = 0x%llx\n", p_dm->debug_components));
1675 	PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================"));
1676 
1677 	*_used = used;
1678 	*_out_len = out_len;
1679 }
1680 
1681 void
phydm_fw_debug_trace(void * p_dm_void,u32 * const dm_value,u32 * _used,char * output,u32 * _out_len)1682 phydm_fw_debug_trace(
1683 	void		*p_dm_void,
1684 	u32		*const dm_value,
1685 	u32		*_used,
1686 	char			*output,
1687 	u32		*_out_len
1688 )
1689 {
1690 	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
1691 	u32			pre_fw_debug_components, one = 1;
1692 	u32			used = *_used;
1693 	u32			out_len = *_out_len;
1694 
1695 	pre_fw_debug_components = p_dm->fw_debug_components;
1696 
1697 	PHYDM_SNPRINTF((output + used, out_len - used, "\n%s\n", "================================"));
1698 	if (dm_value[0] == 100) {
1699 		PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "[FW Debug Component]"));
1700 		PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================"));
1701 		PHYDM_SNPRINTF((output + used, out_len - used, "00. (( %s ))RA\n", ((p_dm->fw_debug_components & PHYDM_FW_COMP_RA) ? ("V") : ("."))));
1702 
1703 		if (p_dm->support_ic_type & PHYDM_IC_3081_SERIES) {
1704 			PHYDM_SNPRINTF((output + used, out_len - used, "01. (( %s ))MU\n", ((p_dm->fw_debug_components & PHYDM_FW_COMP_MU) ? ("V") : ("."))));
1705 			PHYDM_SNPRINTF((output + used, out_len - used, "02. (( %s ))path Div\n", ((p_dm->fw_debug_components & PHYDM_FW_COMP_PATH_DIV) ? ("V") : ("."))));
1706 			PHYDM_SNPRINTF((output + used, out_len - used, "03. (( %s ))Power training\n", ((p_dm->fw_debug_components & PHYDM_FW_COMP_PT) ? ("V") : ("."))));
1707 		}
1708 		PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================"));
1709 
1710 	} else {
1711 		if (dm_value[0] == 101) {
1712 			p_dm->fw_debug_components = 0;
1713 			PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "Clear all fw debug components"));
1714 		} else {
1715 			if (dm_value[1] == 1)   /*enable*/
1716 				p_dm->fw_debug_components |= (one << dm_value[0]);
1717 			else if (dm_value[1] == 2)   /*disable*/
1718 				p_dm->fw_debug_components &= ~(one << dm_value[0]);
1719 			else
1720 				PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "[Warning!!!]  1:enable,  2:disable"));
1721 		}
1722 
1723 		if (p_dm->fw_debug_components == 0) {
1724 			p_dm->debug_components &= ~DBG_FW_TRACE;
1725 			phydm_fw_trace_en_h2c(p_dm, false, p_dm->fw_debug_components, dm_value[2], dm_value[3]); /*H2C to enable C2H Msg*/
1726 		} else {
1727 			p_dm->debug_components |= DBG_FW_TRACE;
1728 			phydm_fw_trace_en_h2c(p_dm, true, p_dm->fw_debug_components, dm_value[2], dm_value[3]); /*H2C to enable C2H Msg*/
1729 		}
1730 	}
1731 }
1732 
1733 void
phydm_dump_bb_reg(void * p_dm_void,u32 * _used,char * output,u32 * _out_len)1734 phydm_dump_bb_reg(
1735 	void			*p_dm_void,
1736 	u32			*_used,
1737 	char				*output,
1738 	u32			*_out_len
1739 )
1740 {
1741 	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
1742 	u32			addr = 0;
1743 	u32			used = *_used;
1744 	u32			out_len = *_out_len;
1745 
1746 
1747 	/* BB Reg, For Nseries IC we only need to dump page8 to pageF using 3 digits*/
1748 	for (addr = 0x800; addr < 0xfff; addr += 4) {
1749 		if (p_dm->support_ic_type & ODM_IC_11N_SERIES)
1750 			PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "0x%03x 0x%08x\n", addr, odm_get_bb_reg(p_dm, addr, MASKDWORD)));
1751 		else
1752 			PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "0x%04x 0x%08x\n", addr, odm_get_bb_reg(p_dm, addr, MASKDWORD)));
1753 	}
1754 
1755 	if (p_dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8814A | ODM_RTL8821C)) {
1756 
1757 		if (p_dm->rf_type > RF_2T2R) {
1758 			for (addr = 0x1800; addr < 0x18ff; addr += 4)
1759 				PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "0x%04x 0x%08x\n", addr, odm_get_bb_reg(p_dm, addr, MASKDWORD)));
1760 		}
1761 
1762 		if (p_dm->rf_type > RF_3T3R) {
1763 			for (addr = 0x1a00; addr < 0x1aff; addr += 4)
1764 				PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "0x%04x 0x%08x\n", addr, odm_get_bb_reg(p_dm, addr, MASKDWORD)));
1765 		}
1766 
1767 		for (addr = 0x1900; addr < 0x19ff; addr += 4)
1768 			PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "0x%04x 0x%08x\n", addr, odm_get_bb_reg(p_dm, addr, MASKDWORD)));
1769 
1770 		for (addr = 0x1c00; addr < 0x1cff; addr += 4)
1771 			PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "0x%04x 0x%08x\n", addr, odm_get_bb_reg(p_dm, addr, MASKDWORD)));
1772 
1773 		for (addr = 0x1f00; addr < 0x1fff; addr += 4)
1774 			PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "0x%04x 0x%08x\n", addr, odm_get_bb_reg(p_dm, addr, MASKDWORD)));
1775 	}
1776 
1777 	*_used = used;
1778 	*_out_len = out_len;
1779 }
1780 
1781 void
phydm_dump_all_reg(void * p_dm_void,u32 * _used,char * output,u32 * _out_len)1782 phydm_dump_all_reg(
1783 	void			*p_dm_void,
1784 	u32			*_used,
1785 	char				*output,
1786 	u32			*_out_len
1787 )
1788 {
1789 	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
1790 	u32			addr = 0;
1791 	u32			used = *_used;
1792 	u32			out_len = *_out_len;
1793 
1794 	/* dump MAC register */
1795 	PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "MAC==========\n"));
1796 	for (addr = 0; addr < 0x7ff; addr += 4)
1797 		PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "0x%04x 0x%08x\n", addr, odm_get_bb_reg(p_dm, addr, MASKDWORD)));
1798 
1799 	for (addr = 0x1000; addr < 0x17ff; addr += 4)
1800 		PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "0x%04x 0x%08x\n", addr, odm_get_bb_reg(p_dm, addr, MASKDWORD)));
1801 
1802 	/* dump BB register */
1803 	PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "BB==========\n"));
1804 	phydm_dump_bb_reg(p_dm, &used, output, &out_len);
1805 
1806 	/* dump RF register */
1807 	PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "RF-A==========\n"));
1808 	for (addr = 0; addr < 0xFF; addr++)
1809 		PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "0x%02x 0x%05x\n", addr, odm_get_rf_reg(p_dm, RF_PATH_A, addr, RFREGOFFSETMASK)));
1810 
1811 	if (p_dm->rf_type > RF_1T1R) {
1812 		PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "RF-B==========\n"));
1813 		for (addr = 0; addr < 0xFF; addr++)
1814 			PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "0x%02x 0x%05x\n", addr, odm_get_rf_reg(p_dm, RF_PATH_B, addr, RFREGOFFSETMASK)));
1815 	}
1816 
1817 	if (p_dm->rf_type > RF_2T2R) {
1818 		PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "RF-C==========\n"));
1819 		for (addr = 0; addr < 0xFF; addr++)
1820 			PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "0x%02x 0x%05x\n", addr, odm_get_rf_reg(p_dm, RF_PATH_C, addr, RFREGOFFSETMASK)));
1821 	}
1822 
1823 	if (p_dm->rf_type > RF_3T3R) {
1824 		PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "RF-D==========\n"));
1825 		for (addr = 0; addr < 0xFF; addr++)
1826 			PHYDM_VAST_INFO_SNPRINTF((output + used, out_len - used, "0x%02x 0x%05x\n", addr, odm_get_rf_reg(p_dm, RF_PATH_D, addr, RFREGOFFSETMASK)));
1827 	}
1828 
1829 	*_used = used;
1830 	*_out_len = out_len;
1831 }
1832 
1833 void
phydm_enable_big_jump(struct PHY_DM_STRUCT * p_dm,boolean state)1834 phydm_enable_big_jump(
1835 	struct PHY_DM_STRUCT	*p_dm,
1836 	boolean		state
1837 )
1838 {
1839 #if (RTL8822B_SUPPORT == 1)
1840 	struct phydm_dig_struct			*p_dig_t = &p_dm->dm_dig_table;
1841 
1842 	if (state == false) {
1843 		p_dm->dm_dig_table.enable_adjust_big_jump = false;
1844 		odm_set_bb_reg(p_dm, 0x8c8, 0xfe, ((p_dig_t->big_jump_step3 << 5) | (p_dig_t->big_jump_step2 << 3) | p_dig_t->big_jump_step1));
1845 	} else
1846 		p_dm->dm_dig_table.enable_adjust_big_jump = true;
1847 #endif
1848 }
1849 
1850 #if (RTL8822B_SUPPORT == 1 | RTL8821C_SUPPORT == 1 | RTL8814B_SUPPORT == 1)
1851 
1852 void
phydm_show_rx_rate(struct PHY_DM_STRUCT * p_dm,u32 * _used,char * output,u32 * _out_len)1853 phydm_show_rx_rate(
1854 	struct PHY_DM_STRUCT			*p_dm,
1855 	u32			*_used,
1856 	char			*output,
1857 	u32			*_out_len
1858 )
1859 {
1860 	u32			used = *_used;
1861 	u32			out_len = *_out_len;
1862 
1863 	PHYDM_SNPRINTF((output + used, out_len - used, "=====Rx SU rate Statistics=====\n"));
1864 	PHYDM_SNPRINTF((output + used, out_len - used, "1SS MCS0 = %d, 1SS MCS1 = %d, 1SS MCS2 = %d, 1SS MCS 3 = %d\n",
1865 		p_dm->phy_dbg_info.num_qry_vht_pkt[0], p_dm->phy_dbg_info.num_qry_vht_pkt[1], p_dm->phy_dbg_info.num_qry_vht_pkt[2], p_dm->phy_dbg_info.num_qry_vht_pkt[3]));
1866 	PHYDM_SNPRINTF((output + used, out_len - used, "1SS MCS4 = %d, 1SS MCS5 = %d, 1SS MCS6 = %d, 1SS MCS 7 = %d\n",
1867 		p_dm->phy_dbg_info.num_qry_vht_pkt[4], p_dm->phy_dbg_info.num_qry_vht_pkt[5], p_dm->phy_dbg_info.num_qry_vht_pkt[6], p_dm->phy_dbg_info.num_qry_vht_pkt[7]));
1868 	PHYDM_SNPRINTF((output + used, out_len - used, "1SS MCS8 = %d, 1SS MCS9 = %d\n",
1869 		p_dm->phy_dbg_info.num_qry_vht_pkt[8], p_dm->phy_dbg_info.num_qry_vht_pkt[9]));
1870 	PHYDM_SNPRINTF((output + used, out_len - used, "2SS MCS0 = %d, 2SS MCS1 = %d, 2SS MCS2 = %d, 2SS MCS 3 = %d\n",
1871 		p_dm->phy_dbg_info.num_qry_vht_pkt[10], p_dm->phy_dbg_info.num_qry_vht_pkt[11], p_dm->phy_dbg_info.num_qry_vht_pkt[12], p_dm->phy_dbg_info.num_qry_vht_pkt[13]));
1872 	PHYDM_SNPRINTF((output + used, out_len - used, "2SS MCS4 = %d, 2SS MCS5 = %d, 2SS MCS6 = %d, 2SS MCS 7 = %d\n",
1873 		p_dm->phy_dbg_info.num_qry_vht_pkt[14], p_dm->phy_dbg_info.num_qry_vht_pkt[15], p_dm->phy_dbg_info.num_qry_vht_pkt[16], p_dm->phy_dbg_info.num_qry_vht_pkt[17]));
1874 	PHYDM_SNPRINTF((output + used, out_len - used, "2SS MCS8 = %d, 2SS MCS9 = %d\n",
1875 		p_dm->phy_dbg_info.num_qry_vht_pkt[18], p_dm->phy_dbg_info.num_qry_vht_pkt[19]));
1876 
1877 	PHYDM_SNPRINTF((output + used, out_len - used, "=====Rx MU rate Statistics=====\n"));
1878 	PHYDM_SNPRINTF((output + used, out_len - used, "1SS MCS0 = %d, 1SS MCS1 = %d, 1SS MCS2 = %d, 1SS MCS 3 = %d\n",
1879 		p_dm->phy_dbg_info.num_qry_mu_vht_pkt[0], p_dm->phy_dbg_info.num_qry_mu_vht_pkt[1], p_dm->phy_dbg_info.num_qry_mu_vht_pkt[2], p_dm->phy_dbg_info.num_qry_mu_vht_pkt[3]));
1880 	PHYDM_SNPRINTF((output + used, out_len - used, "1SS MCS4 = %d, 1SS MCS5 = %d, 1SS MCS6 = %d, 1SS MCS 7 = %d\n",
1881 		p_dm->phy_dbg_info.num_qry_mu_vht_pkt[4], p_dm->phy_dbg_info.num_qry_mu_vht_pkt[5], p_dm->phy_dbg_info.num_qry_mu_vht_pkt[6], p_dm->phy_dbg_info.num_qry_mu_vht_pkt[7]));
1882 	PHYDM_SNPRINTF((output + used, out_len - used, "1SS MCS8 = %d, 1SS MCS9 = %d\n",
1883 		p_dm->phy_dbg_info.num_qry_mu_vht_pkt[8], p_dm->phy_dbg_info.num_qry_mu_vht_pkt[9]));
1884 	PHYDM_SNPRINTF((output + used, out_len - used, "2SS MCS0 = %d, 2SS MCS1 = %d, 2SS MCS2 = %d, 2SS MCS 3 = %d\n",
1885 		p_dm->phy_dbg_info.num_qry_mu_vht_pkt[10], p_dm->phy_dbg_info.num_qry_mu_vht_pkt[11], p_dm->phy_dbg_info.num_qry_mu_vht_pkt[12], p_dm->phy_dbg_info.num_qry_mu_vht_pkt[13]));
1886 	PHYDM_SNPRINTF((output + used, out_len - used, "2SS MCS4 = %d, 2SS MCS5 = %d, 2SS MCS6 = %d, 2SS MCS 7 = %d\n",
1887 		p_dm->phy_dbg_info.num_qry_mu_vht_pkt[14], p_dm->phy_dbg_info.num_qry_mu_vht_pkt[15], p_dm->phy_dbg_info.num_qry_mu_vht_pkt[16], p_dm->phy_dbg_info.num_qry_mu_vht_pkt[17]));
1888 	PHYDM_SNPRINTF((output + used, out_len - used, "2SS MCS8 = %d, 2SS MCS9 = %d\n",
1889 		p_dm->phy_dbg_info.num_qry_mu_vht_pkt[18], p_dm->phy_dbg_info.num_qry_mu_vht_pkt[19]));
1890 
1891 	*_used = used;
1892 	*_out_len = out_len;
1893 }
1894 
1895 #endif
1896 
1897 void
phydm_api_adjust(void * p_dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len,u32 input_num)1898 phydm_api_adjust(
1899 	void		*p_dm_void,
1900 	char		input[][16],
1901 	u32		*_used,
1902 	char		*output,
1903 	u32		*_out_len,
1904 	u32		input_num
1905 )
1906 {
1907 	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
1908 	char		help[] = "-h";
1909 	u32		var1[10] = {0};
1910 	u32		used = *_used;
1911 	u32		out_len = *_out_len;
1912 	u8		i;
1913 	boolean	is_enable_dbg_mode;
1914 	u8 central_ch, primary_ch_idx;
1915 	enum channel_width	bandwidth;
1916 
1917 #ifdef PHYDM_COMMON_API_SUPPORT
1918 
1919 	if ((strcmp(input[1], help) == 0)) {
1920 
1921 		PHYDM_SNPRINTF((output + used, out_len - used, "{en} {ch_num} {prm_ch 1/2/3/4/9/10} {0:20M, 1:40M, 2:80M}\n"));
1922 
1923 	} else {
1924 
1925 		if (p_dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8821C)) {
1926 
1927 			for (i = 0; i < 4; i++) {
1928 				if (input[i + 1])
1929 					PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
1930 			}
1931 
1932 			is_enable_dbg_mode = (boolean)var1[0];
1933 			central_ch = (u8) var1[1];
1934 			primary_ch_idx = (u8) var1[2];
1935 			bandwidth = (enum channel_width)var1[3];
1936 
1937 			if (is_enable_dbg_mode) {
1938 				p_dm->is_disable_phy_api = false;
1939 				phydm_api_switch_bw_channel(p_dm, central_ch, primary_ch_idx, bandwidth);
1940 				p_dm->is_disable_phy_api = true;
1941 				PHYDM_SNPRINTF((output + used, out_len - used, "central_ch = %d, primary_ch_idx = %d, bandwidth = %d\n", central_ch, primary_ch_idx, bandwidth));
1942 			} else {
1943 				p_dm->is_disable_phy_api = false;
1944 				PHYDM_SNPRINTF((output + used, out_len - used, "Disable API debug mode\n"));
1945 			}
1946 		} else {
1947 			PHYDM_SNPRINTF((output + used, out_len - used, "This IC doesn't support PHYDM API function\n"));
1948 			/**/
1949 		}
1950 	}
1951 
1952 #else
1953 		PHYDM_SNPRINTF((output + used, out_len - used, "This IC doesn't support PHYDM API function\n"));
1954 #endif
1955 
1956 	*_used = used;
1957 	*_out_len = out_len;
1958 }
1959 
1960 void
phydm_parameter_adjust(void * p_dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len,u32 input_num)1961 phydm_parameter_adjust(
1962 	void		*p_dm_void,
1963 	char		input[][16],
1964 	u32		*_used,
1965 	char		*output,
1966 	u32		*_out_len,
1967 	u32		input_num
1968 )
1969 {
1970 	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
1971 	struct phydm_cfo_track_struct				*p_cfo_track = (struct phydm_cfo_track_struct *)phydm_get_structure(p_dm, PHYDM_CFOTRACK);
1972 	char		help[] = "-h";
1973 	u32		var1[10] = {0};
1974 	u32		used = *_used;
1975 	u32		out_len = *_out_len;
1976 	u8		i;
1977 
1978 	if ((strcmp(input[1], help) == 0)) {
1979 		PHYDM_SNPRINTF((output + used, out_len - used, "1. X_cap = ((0x%x))\n", p_cfo_track->crystal_cap));
1980 
1981 	} else {
1982 
1983 		PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
1984 
1985 		if (var1[0] == 0) {
1986 
1987 			PHYDM_SSCANF(input[2], DCMD_HEX, &var1[1]);
1988 			phydm_set_crystal_cap(p_dm, (u8)var1[1]);
1989 			PHYDM_SNPRINTF((output + used, out_len - used, "X_cap = ((0x%x))\n", p_cfo_track->crystal_cap));
1990 		}
1991 	}
1992 	*_used = used;
1993 	*_out_len = out_len;
1994 }
1995 
1996 struct _PHYDM_COMMAND {
1997 	char name[16];
1998 	u8 id;
1999 };
2000 
2001 enum PHYDM_CMD_ID {
2002 	PHYDM_HELP,
2003 	PHYDM_DEMO,
2004 	PHYDM_DIG,
2005 	PHYDM_RA,
2006 	PHYDM_PROFILE,
2007 	PHYDM_ANTDIV,
2008 	PHYDM_PATHDIV,
2009 	PHYDM_DEBUG,
2010 	PHYDM_FW_DEBUG,
2011 	PHYDM_SUPPORT_ABILITY,
2012 	PHYDM_RF_SUPPORTABILITY,
2013 	PHYDM_RF_PROFILE,
2014 	PHYDM_RF_IQK_INFO,
2015 	PHYDM_IQK,
2016 	PHYDM_IQK_DEBUG,
2017 	PHYDM_GET_TXAGC,
2018 	PHYDM_SET_TXAGC,
2019 	PHYDM_SMART_ANT,
2020 	PHYDM_API,
2021 	PHYDM_TRX_PATH,
2022 	PHYDM_LA_MODE,
2023 	PHYDM_DUMP_REG,
2024 	PHYDM_AUTO_DBG,
2025 	PHYDM_BIG_JUMP,
2026 	PHYDM_SHOW_RXRATE,
2027 	PHYDM_NBI_EN,
2028 	PHYDM_CSI_MASK_EN,
2029 	PHYDM_DFS_DEBUG,
2030 	PHYDM_NHM,
2031 	PHYDM_CLM,
2032 	PHYDM_BB_INFO,
2033 	PHYDM_TXBF,
2034 	PHYDM_H2C,
2035 	PHYDM_ANT_SWITCH,
2036 	PHYDM_DYNAMIC_RA_PATH,
2037 	PHYDM_ADAPTIVE_SOML,
2038 	PHYDM_PSD,
2039 	PHYDM_DEBUG_PORT,
2040 	PHYDM_DIS_HTSTF_CONTROL,
2041 	PHYDM_TUNE_PARAMETER,
2042 	PHYDM_ADAPTIVITY_DEBUG,
2043 	PHYDM_DIS_DYM_ANT_WEIGHTING,
2044 	PHYDM_FORECE_PT_STATE,
2045 	PHYDM_DIS_RXHP_CTR,
2046 	PHYDM_STA_INFO,
2047 	PHYDM_PAUSE_FUNC
2048 };
2049 
2050 struct _PHYDM_COMMAND phy_dm_ary[] = {
2051 	{"-h", PHYDM_HELP},		/*do not move this element to other position*/
2052 	{"demo", PHYDM_DEMO},	/*do not move this element to other position*/
2053 	{"dig", PHYDM_DIG},
2054 	{"ra", PHYDM_RA},
2055 	{"profile", PHYDM_PROFILE},
2056 	{"antdiv", PHYDM_ANTDIV},
2057 	{"pathdiv", PHYDM_PATHDIV},
2058 	{"dbg", PHYDM_DEBUG},
2059 	{"fw_dbg", PHYDM_FW_DEBUG},
2060 	{"ability", PHYDM_SUPPORT_ABILITY},
2061 	{"rf_ability", PHYDM_RF_SUPPORTABILITY},
2062 	{"rf_profile", PHYDM_RF_PROFILE},
2063 	{"iqk_info", PHYDM_RF_IQK_INFO},
2064 	{"iqk", PHYDM_IQK},
2065 	{"iqk_dbg", PHYDM_IQK_DEBUG},
2066 	{"get_txagc", PHYDM_GET_TXAGC},
2067 	{"set_txagc", PHYDM_SET_TXAGC},
2068 	{"smtant", PHYDM_SMART_ANT},
2069 	{"api", PHYDM_API},
2070 	{"trxpath", PHYDM_TRX_PATH},
2071 	{"lamode", PHYDM_LA_MODE},
2072 	{"dumpreg", PHYDM_DUMP_REG},
2073 	{"auto_dbg", PHYDM_AUTO_DBG},
2074 	{"bigjump", PHYDM_BIG_JUMP},
2075 	{"rxrate", PHYDM_SHOW_RXRATE},
2076 	{"nbi", PHYDM_NBI_EN},
2077 	{"csi_mask", PHYDM_CSI_MASK_EN},
2078 	{"dfs", PHYDM_DFS_DEBUG},
2079 	{"nhm", PHYDM_NHM},
2080 	{"clm", PHYDM_CLM},
2081 	{"bbinfo", PHYDM_BB_INFO},
2082 	{"txbf", PHYDM_TXBF},
2083 	{"h2c", PHYDM_H2C},
2084 	{"ant_switch", PHYDM_ANT_SWITCH},
2085 	{"drp", PHYDM_DYNAMIC_RA_PATH},
2086 	{"soml", PHYDM_ADAPTIVE_SOML},
2087 	{"psd", PHYDM_PSD},
2088 	{"dbgport", PHYDM_DEBUG_PORT},
2089 	{"dis_htstf", PHYDM_DIS_HTSTF_CONTROL},
2090 	{"tune_para", PHYDM_TUNE_PARAMETER},
2091 	{"adapt_debug", PHYDM_ADAPTIVITY_DEBUG},
2092 	{"dis_dym_ant_wgt", PHYDM_DIS_DYM_ANT_WEIGHTING},
2093 	{"force_pt_state", PHYDM_FORECE_PT_STATE},
2094 	{"dis_drxhp", PHYDM_DIS_RXHP_CTR},
2095 	{"sta_info", PHYDM_STA_INFO},
2096 	{"pause", PHYDM_PAUSE_FUNC}
2097 };
2098 
2099 #endif /*#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
2100 
2101 void
phydm_cmd_parser(struct PHY_DM_STRUCT * p_dm,char input[][MAX_ARGV],u32 input_num,u8 flag,char * output,u32 out_len)2102 phydm_cmd_parser(
2103 	struct PHY_DM_STRUCT	*p_dm,
2104 	char		input[][MAX_ARGV],
2105 	u32	input_num,
2106 	u8	flag,
2107 	char		*output,
2108 	u32	out_len
2109 )
2110 {
2111 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
2112 	u32 used = 0;
2113 	u8 id = 0;
2114 	int var1[10] = {0};
2115 	int i, input_idx = 0, phydm_ary_size = sizeof(phy_dm_ary) / sizeof(struct _PHYDM_COMMAND);
2116 	char help[] = "-h";
2117 
2118 	if (flag == 0) {
2119 		PHYDM_SNPRINTF((output + used, out_len - used, "GET, nothing to print\n"));
2120 		return;
2121 	}
2122 
2123 	PHYDM_SNPRINTF((output + used, out_len - used, "\n"));
2124 
2125 	/* Parsing Cmd ID */
2126 	if (input_num) {
2127 
2128 		for (i = 0; i < phydm_ary_size; i++) {
2129 			if (strcmp(phy_dm_ary[i].name, input[0]) == 0) {
2130 				id = phy_dm_ary[i].id;
2131 				break;
2132 			}
2133 		}
2134 		if (i == phydm_ary_size) {
2135 			PHYDM_SNPRINTF((output + used, out_len - used, "SET, command not found!\n"));
2136 			return;
2137 		}
2138 	}
2139 
2140 	switch (id) {
2141 
2142 	case PHYDM_HELP:
2143 	{
2144 		PHYDM_SNPRINTF((output + used, out_len - used, "BB cmd ==>\n"));
2145 		for (i = 0; i < phydm_ary_size - 2; i++) {
2146 
2147 			PHYDM_SNPRINTF((output + used, out_len - used, "  %-5d: %s\n", i, phy_dm_ary[i + 2].name));
2148 			/**/
2149 		}
2150 	}
2151 	break;
2152 
2153 	case PHYDM_DEMO: { /*echo demo 10 0x3a z abcde >cmd*/
2154 		u32 directory = 0;
2155 
2156 #if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP))
2157 		char char_temp;
2158 #else
2159 		u32 char_temp = ' ';
2160 #endif
2161 
2162 		PHYDM_SSCANF(input[1], DCMD_DECIMAL, &directory);
2163 		PHYDM_SNPRINTF((output + used, out_len - used, "Decimal value = %d\n", directory));
2164 		PHYDM_SSCANF(input[2], DCMD_HEX, &directory);
2165 		PHYDM_SNPRINTF((output + used, out_len - used, "Hex value = 0x%x\n", directory));
2166 		PHYDM_SSCANF(input[3], DCMD_CHAR, &char_temp);
2167 		PHYDM_SNPRINTF((output + used, out_len - used, "Char = %c\n", char_temp));
2168 		PHYDM_SNPRINTF((output + used, out_len - used, "String = %s\n", input[4]));
2169 	}
2170 	break;
2171 
2172 	case PHYDM_DIG:
2173 
2174 		phydm_dig_debug(p_dm, &input[0], &used, output, &out_len, input_num);
2175 		break;
2176 
2177 	case PHYDM_RA:
2178 		phydm_ra_debug(p_dm, &input[0], &used, output, &out_len);
2179 		break;
2180 
2181 	case PHYDM_ANTDIV:
2182 
2183 		for (i = 0; i < 5; i++) {
2184 			if (input[i + 1]) {
2185 				PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
2186 
2187 				/*PHYDM_SNPRINTF((output+used, out_len-used, "new SET, PATHDIV_var[%d]= (( %d ))\n", i, var1[i]));*/
2188 				input_idx++;
2189 			}
2190 		}
2191 
2192 		if (input_idx >= 1) {
2193 			/*PHYDM_SNPRINTF((output+used, out_len-used, "odm_PATHDIV_debug\n"));*/
2194 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
2195 			phydm_antdiv_debug(p_dm, (u32 *)var1, &used, output, &out_len);
2196 #endif
2197 		}
2198 
2199 		break;
2200 
2201 	case PHYDM_PATHDIV:
2202 
2203 		for (i = 0; i < 5; i++) {
2204 			if (input[i + 1]) {
2205 				PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
2206 
2207 				/*PHYDM_SNPRINTF((output+used, out_len-used, "new SET, PATHDIV_var[%d]= (( %d ))\n", i, var1[i]));*/
2208 				input_idx++;
2209 			}
2210 		}
2211 
2212 		if (input_idx >= 1) {
2213 			/*PHYDM_SNPRINTF((output+used, out_len-used, "odm_PATHDIV_debug\n"));*/
2214 #if (defined(CONFIG_PATH_DIVERSITY))
2215 			odm_pathdiv_debug(p_dm, (u32 *)var1, &used, output, &out_len);
2216 #endif
2217 		}
2218 
2219 		break;
2220 
2221 	case PHYDM_DEBUG:
2222 
2223 		for (i = 0; i < 5; i++) {
2224 			if (input[i + 1]) {
2225 				PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
2226 
2227 				/*PHYDM_SNPRINTF((output+used, out_len-used, "new SET, Debug_var[%d]= (( %d ))\n", i, var1[i]));*/
2228 				input_idx++;
2229 			}
2230 		}
2231 
2232 		if (input_idx >= 1) {
2233 			/*PHYDM_SNPRINTF((output+used, out_len-used, "odm_debug_comp\n"));*/
2234 			phydm_debug_trace(p_dm, (u32 *)var1, &used, output, &out_len);
2235 		}
2236 
2237 
2238 		break;
2239 
2240 	case PHYDM_FW_DEBUG:
2241 
2242 		for (i = 0; i < 5; i++) {
2243 			if (input[i + 1]) {
2244 				PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
2245 				input_idx++;
2246 			}
2247 		}
2248 
2249 		if (input_idx >= 1)
2250 			phydm_fw_debug_trace(p_dm, (u32 *)var1, &used, output, &out_len);
2251 
2252 		break;
2253 
2254 	case PHYDM_SUPPORT_ABILITY:
2255 
2256 		for (i = 0; i < 5; i++) {
2257 			if (input[i + 1]) {
2258 				PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
2259 
2260 				/*PHYDM_SNPRINTF((output+used, out_len-used, "new SET, support ablity_var[%d]= (( %d ))\n", i, var1[i]));*/
2261 				input_idx++;
2262 			}
2263 		}
2264 
2265 		if (input_idx >= 1) {
2266 			/*PHYDM_SNPRINTF((output+used, out_len-used, "support ablity\n"));*/
2267 			phydm_support_ability_debug(p_dm, (u32 *)var1, &used, output, &out_len);
2268 		}
2269 
2270 		break;
2271 
2272 	case PHYDM_RF_SUPPORTABILITY:
2273 		halrf_support_ability_debug(p_dm, &input[0], &used, output, &out_len);
2274 		break;
2275 
2276 	case PHYDM_RF_PROFILE:
2277 		halrf_basic_profile(p_dm, &used, output, &out_len);
2278 		break;
2279 
2280 	case PHYDM_RF_IQK_INFO:
2281 		#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
2282 		if (p_dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C))
2283 			halrf_iqk_info_dump(p_dm, &used, output, &out_len);
2284 		#endif
2285 		break;
2286 
2287 	case PHYDM_IQK:
2288 
2289 		PHYDM_SNPRINTF((output + used, out_len - used, "TRX IQK Trigger\n"));
2290 		halrf_iqk_trigger(p_dm, false);
2291 
2292 		#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
2293 		if (p_dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C))
2294 			halrf_iqk_info_dump(p_dm, &used, output, &out_len);
2295 		#endif
2296 
2297 		break;
2298 
2299 	case PHYDM_IQK_DEBUG:
2300 
2301 		for (i = 0; i < 5; i++) {
2302 			if (input[i + 1]) {
2303 				PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
2304 				input_idx++;
2305 			}
2306 		}
2307 
2308 		if (input_idx >= 1) {
2309 			#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
2310 			if (p_dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C))
2311 				halrf_iqk_debug(p_dm, (u32 *)var1, &used, output, &out_len);
2312 			#endif
2313 		}
2314 		break;
2315 
2316 	case PHYDM_SMART_ANT:
2317 
2318 		for (i = 0; i < 5; i++) {
2319 			if (input[i + 1]) {
2320 				PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
2321 				input_idx++;
2322 			}
2323 		}
2324 
2325 		if (input_idx >= 1) {
2326 	#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
2327 
2328 		#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
2329 		phydm_hl_smart_ant_debug_type2(p_dm, &input[0], &used, output, &out_len, input_num);
2330 		#elif (defined(CONFIG_HL_SMART_ANTENNA_TYPE1))
2331 		phydm_hl_smart_ant_debug(p_dm, &input[0], &used, output, &out_len, input_num);
2332 		#endif
2333 
2334 	#endif
2335 
2336 	#if (defined(CONFIG_CUMITEK_SMART_ANTENNA))
2337 		phydm_cumitek_smt_ant_debug(p_dm, &input[0], &used, output, &out_len, input_num);
2338 	#endif
2339 		}
2340 
2341 		break;
2342 
2343 	case PHYDM_API:
2344 		phydm_api_adjust(p_dm, &input[0], &used, output, &out_len, input_num);
2345 		break;
2346 
2347 	case PHYDM_PROFILE:
2348 		phydm_basic_profile(p_dm, &used, output, &out_len);
2349 		break;
2350 
2351 	case PHYDM_GET_TXAGC:
2352 		phydm_get_txagc(p_dm, &used, output, &out_len);
2353 		break;
2354 
2355 	case PHYDM_SET_TXAGC:
2356 	{
2357 		boolean		is_enable_dbg_mode;
2358 
2359 		for (i = 0; i < 5; i++) {
2360 			if (input[i + 1]) {
2361 				PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
2362 				input_idx++;
2363 			}
2364 		}
2365 
2366 		if ((strcmp(input[1], help) == 0)) {
2367 			PHYDM_SNPRINTF((output + used, out_len - used, "{En} {pathA~D(0~3)} {rate_idx(Hex), All_rate:0xff} {txagc_idx (Hex)}\n"));
2368 			/**/
2369 
2370 		} else {
2371 
2372 			is_enable_dbg_mode = (boolean)var1[0];
2373 			if (is_enable_dbg_mode) {
2374 				p_dm->is_disable_phy_api = false;
2375 				phydm_set_txagc(p_dm, (u32 *)var1, &used, output, &out_len);
2376 				p_dm->is_disable_phy_api = true;
2377 			} else {
2378 				p_dm->is_disable_phy_api = false;
2379 				PHYDM_SNPRINTF((output + used, out_len - used, "Disable API debug mode\n"));
2380 			}
2381 		}
2382 	}
2383 	break;
2384 
2385 	case PHYDM_TRX_PATH:
2386 
2387 		for (i = 0; i < 4; i++) {
2388 			if (input[i + 1])
2389 				PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
2390 		}
2391 #if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1)
2392 		if (p_dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F)) {
2393 			u8		tx_path, rx_path;
2394 			boolean		is_enable_dbg_mode, is_tx2_path;
2395 
2396 			is_enable_dbg_mode = (boolean)var1[0];
2397 			tx_path = (u8) var1[1];
2398 			rx_path = (u8) var1[2];
2399 			is_tx2_path = (boolean) var1[3];
2400 
2401 			if (is_enable_dbg_mode) {
2402 				p_dm->is_disable_phy_api = false;
2403 				phydm_api_trx_mode(p_dm, (enum bb_path) tx_path, (enum bb_path) rx_path, is_tx2_path);
2404 				p_dm->is_disable_phy_api = true;
2405 				PHYDM_SNPRINTF((output + used, out_len - used, "tx_path = 0x%x, rx_path = 0x%x, is_tx2_path = %d\n", tx_path, rx_path, is_tx2_path));
2406 			} else {
2407 				p_dm->is_disable_phy_api = false;
2408 				PHYDM_SNPRINTF((output + used, out_len - used, "Disable API debug mode\n"));
2409 			}
2410 		} else
2411 #endif
2412 			phydm_config_trx_path(p_dm, (u32 *)var1, &used, output, &out_len);
2413 
2414 		break;
2415 
2416 	case PHYDM_LA_MODE:
2417 
2418 		#if (PHYDM_LA_MODE_SUPPORT == 1)
2419 		phydm_lamode_trigger_setting(p_dm, &input[0], &used, output, &out_len, input_num);
2420 		#else
2421 		PHYDM_SNPRINTF((output + used, out_len - used, "This IC doesn't support LA mode\n"));
2422 		#endif
2423 
2424 		break;
2425 
2426 	case PHYDM_DUMP_REG:
2427 	{
2428 		u8	type = 0;
2429 
2430 		if (input[1]) {
2431 			PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
2432 			type = (u8)var1[0];
2433 		}
2434 
2435 		if (type == 0)
2436 			phydm_dump_bb_reg(p_dm, &used, output, &out_len);
2437 		else if (type == 1)
2438 			phydm_dump_all_reg(p_dm, &used, output, &out_len);
2439 	}
2440 	break;
2441 
2442 	case PHYDM_BIG_JUMP:
2443 	{
2444 #if (RTL8822B_SUPPORT == 1)
2445 		if (p_dm->support_ic_type & ODM_RTL8822B) {
2446 			if (input[1]) {
2447 				PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
2448 				phydm_enable_big_jump(p_dm, (boolean)(var1[0]));
2449 			} else
2450 				PHYDM_SNPRINTF((output + used, out_len - used, "unknown command!\n"));
2451 		} else
2452 			PHYDM_SNPRINTF((output + used, out_len - used, "The command is only for 8822B!\n"));
2453 #endif
2454 		break;
2455 	}
2456 
2457 	case PHYDM_AUTO_DBG:
2458 		#ifdef PHYDM_AUTO_DEGBUG
2459 		phydm_auto_dbg_console(p_dm, &input[0], &used, output, &out_len, input_num);
2460 		#endif
2461 		break;
2462 
2463 	case PHYDM_SHOW_RXRATE:
2464 #if (RTL8822B_SUPPORT == 1 | RTL8821C_SUPPORT == 1 | RTL8814B_SUPPORT == 1)
2465 		if (p_dm->support_ic_type & PHYDM_IC_SUPPORT_MU_BFEE) {
2466 			u8	rate_idx;
2467 
2468 			if (input[1])
2469 				PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
2470 
2471 			if (var1[0] == 1)
2472 				phydm_show_rx_rate(p_dm, &used, output, &out_len);
2473 			else {
2474 				PHYDM_SNPRINTF((output + used, out_len - used, "Reset Rx rate counter\n"));
2475 
2476 				for (rate_idx = 0; rate_idx < 40; rate_idx++) {
2477 					p_dm->phy_dbg_info.num_qry_vht_pkt[rate_idx] = 0;
2478 					p_dm->phy_dbg_info.num_qry_mu_vht_pkt[rate_idx] = 0;
2479 				}
2480 			}
2481 		}
2482 #endif
2483 		break;
2484 
2485 	case PHYDM_NBI_EN:
2486 
2487 		for (i = 0; i < 5; i++) {
2488 			if (input[i + 1]) {
2489 				PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
2490 				input_idx++;
2491 			}
2492 		}
2493 
2494 		if (input_idx >= 1) {
2495 
2496 			phydm_api_debug(p_dm, PHYDM_API_NBI, (u32 *)var1, &used, output, &out_len);
2497 			/**/
2498 		}
2499 
2500 
2501 		break;
2502 
2503 	case PHYDM_CSI_MASK_EN:
2504 
2505 		for (i = 0; i < 5; i++) {
2506 			if (input[i + 1]) {
2507 				PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
2508 				input_idx++;
2509 			}
2510 		}
2511 
2512 		if (input_idx >= 1) {
2513 
2514 			phydm_api_debug(p_dm, PHYDM_API_CSI_MASK, (u32 *)var1, &used, output, &out_len);
2515 			/**/
2516 		}
2517 
2518 
2519 		break;
2520 
2521 	case PHYDM_DFS_DEBUG:
2522 #ifdef CONFIG_PHYDM_DFS_MASTER
2523 		{
2524 			u32 var[4] = {0};
2525 
2526 			for (i = 0; i < 4; i++) {
2527 				if (input[i + 1]) {
2528 					PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var[i]);
2529 					input_idx++;
2530 				}
2531 			}
2532 
2533 			if (input_idx >= 1)
2534 				phydm_dfs_debug(p_dm, var, &used, output, &out_len);
2535 		}
2536 #endif
2537 		break;
2538 
2539 	case PHYDM_NHM:
2540 	{
2541 		u8		target_rssi;
2542 		u16		nhm_period = 0xC350;	/* 200ms */
2543 		u8		IGI;
2544 		struct _CCX_INFO	*ccx_info = &p_dm->dm_ccx_info;
2545 
2546 		PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
2547 
2548 		if (input_num == 1) {
2549 
2550 			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n Trigger NHM: echo nhm 1\n"));
2551 			PHYDM_SNPRINTF((output + used, out_len - used, "\r (Exclude CCA)\n"));
2552 			PHYDM_SNPRINTF((output + used, out_len - used, "\r Trigger NHM: echo nhm 2\n"));
2553 			PHYDM_SNPRINTF((output + used, out_len - used, "\r (Include CCA)\n"));
2554 			PHYDM_SNPRINTF((output + used, out_len - used, "\r Get NHM results: echo nhm 3\n"));
2555 
2556 			return;
2557 		}
2558 
2559 		/* NMH trigger */
2560 		if ((var1[0] <= 2) && (var1[0] != 0)) {
2561 
2562 			ccx_info->echo_igi = (u8)odm_get_bb_reg(p_dm, 0xC50, MASKBYTE0);
2563 
2564 			target_rssi = ccx_info->echo_igi - 10;
2565 
2566 			ccx_info->nhm_th[0] = (target_rssi - 15 + 10) * 2; /*Unit: PWdB U(8,1)*/
2567 
2568 			for (i = 1; i <= 10; i++)
2569 				ccx_info->nhm_th[i] = ccx_info->nhm_th[0] + 6 * i;
2570 
2571 			/* 4 1. store previous NHM setting */
2572 			phydm_nhm_setting(p_dm, STORE_NHM_SETTING);
2573 
2574 			/* 4 2. Set NHM period, 0x990[31:16]=0xC350, Time duration for NHM unit: 4us, 0xC350=200ms */
2575 			ccx_info->nhm_period = nhm_period;
2576 
2577 			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n Monitor NHM for %d us", nhm_period * 4));
2578 
2579 			/* 4 3. Set NHM inexclude_txon, inexclude_cca, ccx_en */
2580 
2581 
2582 			ccx_info->nhm_inexclude_cca = (var1[0] == 1) ? NHM_EXCLUDE_CCA : NHM_INCLUDE_CCA;
2583 			ccx_info->nhm_inexclude_txon = NHM_EXCLUDE_TXON;
2584 
2585 			phydm_nhm_setting(p_dm, SET_NHM_SETTING);
2586 
2587 			for (i = 0; i <= 10; i++) {
2588 
2589 				if (i == 5)
2590 					PHYDM_SNPRINTF((output + used, out_len - used, "\r\n NHM_th[%d] = 0x%x, echo_igi = 0x%x", i, ccx_info->nhm_th[i], ccx_info->echo_igi));
2591 				else if (i == 10)
2592 					PHYDM_SNPRINTF((output + used, out_len - used, "\r\n NHM_th[%d] = 0x%x\n", i, ccx_info->nhm_th[i]));
2593 				else
2594 					PHYDM_SNPRINTF((output + used, out_len - used, "\r\n NHM_th[%d] = 0x%x", i, ccx_info->nhm_th[i]));
2595 			}
2596 
2597 			/* 4 4. Trigger NHM */
2598 			phydm_nhm_trigger(p_dm);
2599 
2600 		}
2601 
2602 		/*Get NHM results*/
2603 		else if (var1[0] == 3) {
2604 
2605 			IGI = (u8)odm_get_bb_reg(p_dm, 0xC50, MASKBYTE0);
2606 
2607 			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n Cur_IGI = 0x%x", IGI));
2608 
2609 			phydm_get_nhm_result(p_dm);
2610 
2611 			/* 4 Resotre NHM setting */
2612 			phydm_nhm_setting(p_dm, RESTORE_NHM_SETTING);
2613 
2614 			for (i = 0; i <= 11; i++) {
2615 
2616 				if (i == 5)
2617 					PHYDM_SNPRINTF((output + used, out_len - used, "\r\n nhm_result[%d] = %d, echo_igi = 0x%x", i, ccx_info->nhm_result[i], ccx_info->echo_igi));
2618 				else if (i == 11)
2619 					PHYDM_SNPRINTF((output + used, out_len - used, "\r\n nhm_result[%d] = %d\n", i, ccx_info->nhm_result[i]));
2620 				else
2621 					PHYDM_SNPRINTF((output + used, out_len - used, "\r\n nhm_result[%d] = %d", i, ccx_info->nhm_result[i]));
2622 			}
2623 
2624 		} else {
2625 
2626 			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n Trigger NHM: echo nhm 1\n"));
2627 			PHYDM_SNPRINTF((output + used, out_len - used, "\r (Exclude CCA)\n"));
2628 			PHYDM_SNPRINTF((output + used, out_len - used, "\r Trigger NHM: echo nhm 2\n"));
2629 			PHYDM_SNPRINTF((output + used, out_len - used, "\r (Include CCA)\n"));
2630 			PHYDM_SNPRINTF((output + used, out_len - used, "\r Get NHM results: echo nhm 3\n"));
2631 
2632 			return;
2633 		}
2634 	}
2635 	break;
2636 
2637 	case PHYDM_CLM:
2638 	{
2639 		struct _CCX_INFO	*ccx_info = &p_dm->dm_ccx_info;
2640 		PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
2641 
2642 		/* PHYDM_SNPRINTF((output + used, out_len - used, "\r\n input_num = %d\n", input_num)); */
2643 
2644 		if (input_num == 1) {
2645 
2646 			ccx_info->echo_clm_en = false;
2647 			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n Trigger CLM: echo clm 1\n"));
2648 			PHYDM_SNPRINTF((output + used, out_len - used, "\r Get CLM results: echo clm 2\n"));
2649 			return;
2650 		}
2651 
2652 		/* Set & trigger CLM */
2653 		if (var1[0] == 1) {
2654 
2655 			ccx_info->echo_clm_en = true;
2656 			ccx_info->clm_period = 0xC350;		/*100ms*/
2657 			phydm_clm_setting(p_dm);
2658 			phydm_clm_trigger(p_dm);
2659 			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n Monitor CLM for 200ms\n"));
2660 		}
2661 
2662 		/* Get CLM results */
2663 		else if (var1[0] == 2) {
2664 
2665 			ccx_info->echo_clm_en = false;
2666 			phydm_get_clm_result(p_dm);
2667 			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n CLM_result = %d us\n", ccx_info->clm_result * 4));
2668 
2669 		} else {
2670 
2671 			ccx_info->echo_clm_en = false;
2672 			PHYDM_SNPRINTF((output + used, out_len - used, "\n\r Error command !\n"));
2673 			PHYDM_SNPRINTF((output + used, out_len - used, "\r Trigger CLM: echo clm 1\n"));
2674 			PHYDM_SNPRINTF((output + used, out_len - used, "\r Get CLM results: echo clm 2\n"));
2675 		}
2676 	}
2677 	break;
2678 
2679 	case PHYDM_BB_INFO:
2680 	{
2681 		s32 value32 = 0;
2682 
2683 		phydm_bb_debug_info(p_dm, &used, output, &out_len);
2684 
2685 		if (p_dm->support_ic_type & ODM_RTL8822B && input[1]) {
2686 			PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
2687 			odm_set_bb_reg(p_dm, 0x1988, 0x003fff00, var1[0]);
2688 			value32 = odm_get_bb_reg(p_dm, 0xf84, MASKDWORD);
2689 			value32 = (value32 & 0xff000000) >> 24;
2690 			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = condition num = %d, subcarriers = %d\n", "Over condition num subcarrier", var1[0], value32));
2691 			odm_set_bb_reg(p_dm, 0x1988, BIT(22), 0x0);	/*disable report condition number*/
2692 		}
2693 	}
2694 	break;
2695 
2696 	case PHYDM_TXBF:
2697 	{
2698 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
2699 #if (BEAMFORMING_SUPPORT == 1)
2700 		struct _RT_BEAMFORMING_INFO	*p_beamforming_info = &p_dm->beamforming_info;
2701 
2702 		PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
2703 		if (var1[0] == 0) {
2704 			p_beamforming_info->apply_v_matrix = false;
2705 			p_beamforming_info->snding3ss = true;
2706 			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n dont apply V matrix and 3SS 789 snding\n"));
2707 		} else if (var1[0] == 1) {
2708 			p_beamforming_info->apply_v_matrix = true;
2709 			p_beamforming_info->snding3ss = true;
2710 			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n apply V matrix and 3SS 789 snding\n"));
2711 		} else if (var1[0] == 2) {
2712 			p_beamforming_info->apply_v_matrix = true;
2713 			p_beamforming_info->snding3ss = false;
2714 			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n default txbf setting\n"));
2715 		} else
2716 			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n unknown cmd!!\n"));
2717 #else
2718 		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n no TxBF !!\n"));
2719 #endif
2720 #endif
2721 	}
2722 		break;
2723 
2724 	case PHYDM_H2C:
2725 
2726 		for (i = 0; i < 8; i++) {
2727 			if (input[i + 1]) {
2728 				PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
2729 				input_idx++;
2730 			}
2731 		}
2732 
2733 		if (input_idx >= 1)
2734 			phydm_h2C_debug(p_dm, (u32 *)var1, &used, output, &out_len);
2735 
2736 
2737 		break;
2738 
2739 	case PHYDM_ANT_SWITCH:
2740 
2741 		for (i = 0; i < 8; i++) {
2742 			if (input[i + 1]) {
2743 				PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
2744 				input_idx++;
2745 			}
2746 		}
2747 
2748 		if (input_idx >= 1) {
2749 
2750 #if (RTL8821A_SUPPORT == 1)
2751 			phydm_set_ext_switch(p_dm, (u32 *)var1, &used, output, &out_len);
2752 #else
2753 			PHYDM_SNPRINTF((output + used, out_len - used, "Not Support IC"));
2754 #endif
2755 		}
2756 
2757 
2758 		break;
2759 
2760 	case PHYDM_DYNAMIC_RA_PATH:
2761 
2762 #ifdef CONFIG_DYNAMIC_RX_PATH
2763 		for (i = 0; i < 8; i++) {
2764 			if (input[i + 1]) {
2765 				PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
2766 				input_idx++;
2767 			}
2768 		}
2769 
2770 		if (input_idx >= 1)
2771 			phydm_drp_debug(p_dm, (u32 *)var1, &used, output, &out_len);
2772 
2773 #else
2774 		PHYDM_SNPRINTF((output + used, out_len - used, "Not Support IC"));
2775 #endif
2776 
2777 		break;
2778 
2779 	case PHYDM_ADAPTIVE_SOML:
2780 
2781 #ifdef CONFIG_ADAPTIVE_SOML
2782 		for (i = 0; i < 8; i++) {
2783 			if (input[i + 1]) {
2784 				PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
2785 				input_idx++;
2786 			}
2787 		}
2788 
2789 		if (input_idx >= 1)
2790 			phydm_soml_debug(p_dm, (u32 *)var1, &used, output, &out_len);
2791 
2792 #else
2793 		PHYDM_SNPRINTF((output + used, out_len - used, "Not Support IC"));
2794 #endif
2795 
2796 		break;
2797 
2798 	case PHYDM_PSD:
2799 
2800 		#ifdef CONFIG_PSD_TOOL
2801 		phydm_psd_debug(p_dm, &input[0], &used, output, &out_len, input_num);
2802 		#endif
2803 
2804 		break;
2805 
2806 	case PHYDM_DEBUG_PORT:
2807 		{
2808 			u32	dbg_port_value;
2809 
2810 			PHYDM_SSCANF(input[1], DCMD_HEX, &var1[0]);
2811 
2812 			p_dm->debug_components |= ODM_COMP_API;
2813 			if (phydm_set_bb_dbg_port(p_dm, BB_DBGPORT_PRIORITY_3, var1[0])) {/*set debug port to 0x0*/
2814 
2815 				dbg_port_value = phydm_get_bb_dbg_port_value(p_dm);
2816 				phydm_release_bb_dbg_port(p_dm);
2817 
2818 				PHYDM_SNPRINTF((output + used, out_len - used, "Dbg Port[0x%x] = ((0x%x))\n", var1[0], dbg_port_value));
2819 			}
2820 			p_dm->debug_components &= (~ODM_COMP_API);
2821 		}
2822 		break;
2823 
2824 	case PHYDM_DIS_HTSTF_CONTROL:
2825 		{
2826 			if (input[1])
2827 				PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
2828 
2829 			if (var1[0] == 1) {
2830 
2831 				/* setting being false is for debug */
2832 				p_dm->bhtstfdisabled = true;
2833 				PHYDM_SNPRINTF((output + used, out_len - used, "Dynamic HT-STF Gain Control is Disable\n"));
2834 			}
2835 			else {
2836 
2837 				/* default setting should be true, always be dynamic control*/
2838 				p_dm->bhtstfdisabled = false;
2839 				PHYDM_SNPRINTF((output + used, out_len - used, "Dynamic HT-STF Gain Control is Enable\n"));
2840 			}
2841 		}
2842 		break;
2843 
2844 	case PHYDM_TUNE_PARAMETER:
2845 		phydm_parameter_adjust(p_dm, &input[0], &used, output, &out_len, input_num);
2846 		break;
2847 
2848 	case PHYDM_ADAPTIVITY_DEBUG:
2849 
2850 		for (i = 0; i < 5; i++) {
2851 			if (input[i + 1]) {
2852 				PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
2853 				input_idx++;
2854 			}
2855 		}
2856 
2857 		if (input_idx >= 1)
2858 			phydm_adaptivity_debug(p_dm, (u32 *)var1, &used, output, &out_len);
2859 
2860 		break;
2861 
2862 	case PHYDM_DIS_DYM_ANT_WEIGHTING:
2863 		PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
2864 		if (input_num == 1) {
2865 			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n Disable dynamic antenna weighting: echo dis_dym_ant_weighting 1\n"));
2866 			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n Enable dynamic antenna weighting: echo dis_dym_ant_weighting 0\n"));
2867 			return;
2868 		}
2869 
2870 		if (var1[0] == 1) {
2871 			p_dm->is_disable_dym_ant_weighting = 1;
2872 			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n Disable dynmic antenna weighting !\n"));
2873 		} else if(var1[0] == 0) {
2874 			p_dm->is_disable_dym_ant_weighting = 0;
2875 			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n Enable dynmic antenna weighting !\n"));
2876 		} else {
2877 			p_dm->is_disable_dym_ant_weighting = 0;
2878 			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n Enable dynmic antenna weighting !\n"));
2879 		}
2880 		break;
2881 
2882 	case PHYDM_FORECE_PT_STATE:
2883 		{
2884 
2885 		#ifdef PHYDM_POWER_TRAINING_SUPPORT
2886 			phydm_pow_train_debug(p_dm, &input[0], &used, output, &out_len, input_num);
2887 		#else
2888 			PHYDM_SNPRINTF((output + used, out_len - used, "Pow training: Not Support\n"));
2889 		#endif
2890 
2891 		break;
2892 		}
2893 
2894 	case PHYDM_DIS_RXHP_CTR:
2895 		{
2896 			if (input[1])
2897 				PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
2898 
2899 			if (var1[0] == 1) {
2900 				/* the setting being on is at debug mode to disconnect RxHP seeting with SoML on/odd */
2901 				p_dm->disrxhpsoml = true;
2902 				PHYDM_SNPRINTF((output + used, out_len - used, "Dynamic RxHP Control with SoML on/off is Disable\n"));
2903 			}
2904 			else if (var1[0] == 0) {
2905 				/* default setting, RxHP setting will follow SoML on/off setting */
2906 				p_dm->disrxhpsoml = false;
2907 				PHYDM_SNPRINTF((output + used, out_len - used, "Dynamic RxHP Control with SoML on/off is Enable\n"));
2908 			}
2909 			else {
2910 				p_dm->disrxhpsoml = false;
2911 				PHYDM_SNPRINTF((output + used, out_len - used, "Default Setting, Dynamic RxHP Control with SoML on/off is Enable\n"));
2912 			}
2913 		}
2914 		break;
2915 
2916 	case PHYDM_STA_INFO:
2917 		phydm_show_sta_info(p_dm, &input[0], &used, output, &out_len, input_num);
2918 		break;
2919 
2920 	case PHYDM_PAUSE_FUNC:
2921 		phydm_pause_func_console(p_dm, &input[0], &used, output, &out_len, input_num);
2922 		break;
2923 
2924 	default:
2925 		PHYDM_SNPRINTF((output + used, out_len - used, "SET, unknown command!\n"));
2926 		break;
2927 
2928 	}
2929 #endif /*#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
2930 }
2931 
2932 #ifdef __ECOS
strsep(char ** s,const char * ct)2933 char *strsep(char **s, const char *ct)
2934 {
2935 	char *sbegin = *s;
2936 	char *end;
2937 
2938 	if (sbegin == NULL)
2939 		return NULL;
2940 
2941 	end = strpbrk(sbegin, ct);
2942 	if (end)
2943 		*end++ = '\0';
2944 	*s = end;
2945 	return sbegin;
2946 }
2947 #endif
2948 
2949 #if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP))
2950 s32
phydm_cmd(struct PHY_DM_STRUCT * p_dm,char * input,u32 in_len,u8 flag,char * output,u32 out_len)2951 phydm_cmd(
2952 	struct PHY_DM_STRUCT	*p_dm,
2953 	char		*input,
2954 	u32	in_len,
2955 	u8	flag,
2956 	char	*output,
2957 	u32	out_len
2958 )
2959 {
2960 	char *token;
2961 	u32	argc = 0;
2962 	char		argv[MAX_ARGC][MAX_ARGV];
2963 
2964 	do {
2965 		token = strsep(&input, ", ");
2966 		if (token) {
2967 			strcpy(argv[argc], token);
2968 			argc++;
2969 		} else
2970 			break;
2971 	} while (argc < MAX_ARGC);
2972 
2973 	if (argc == 1)
2974 		argv[0][strlen(argv[0]) - 1] = '\0';
2975 
2976 	phydm_cmd_parser(p_dm, argv, argc, flag, output, out_len);
2977 
2978 	return 0;
2979 }
2980 #endif
2981 
2982 
2983 void
phydm_fw_trace_handler(void * p_dm_void,u8 * cmd_buf,u8 cmd_len)2984 phydm_fw_trace_handler(
2985 	void	*p_dm_void,
2986 	u8	*cmd_buf,
2987 	u8	cmd_len
2988 )
2989 {
2990 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
2991 	struct PHY_DM_STRUCT		*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
2992 
2993 	/*u8	debug_trace_11byte[60];*/
2994 	u8		freg_num, c2h_seq, buf_0 = 0;
2995 
2996 
2997 	if (!(p_dm->support_ic_type & PHYDM_IC_3081_SERIES))
2998 		return;
2999 
3000 	if ((cmd_len > 12) || (cmd_len == 0)) {
3001 		dbg_print("[Warning] Error C2H cmd_len=%d\n", cmd_len);
3002 		return;
3003 	}
3004 
3005 	buf_0 = cmd_buf[0];
3006 	freg_num = (buf_0 & 0xf);
3007 	c2h_seq = (buf_0 & 0xf0) >> 4;
3008 	/*PHYDM_DBG(p_dm, DBG_FW_TRACE,("[FW debug message] freg_num = (( %d )), c2h_seq = (( %d ))\n", freg_num,c2h_seq ));*/
3009 
3010 	/*strncpy(debug_trace_11byte,&cmd_buf[1],(cmd_len-1));*/
3011 	/*debug_trace_11byte[cmd_len-1] = '\0';*/
3012 	/*PHYDM_DBG(p_dm, DBG_FW_TRACE,("[FW debug message] %s\n", debug_trace_11byte));*/
3013 	/*PHYDM_DBG(p_dm, DBG_FW_TRACE,("[FW debug message] cmd_len = (( %d ))\n", cmd_len));*/
3014 	/*PHYDM_DBG(p_dm, DBG_FW_TRACE,("[FW debug message] c2h_cmd_start  = (( %d ))\n", p_dm->c2h_cmd_start));*/
3015 
3016 
3017 
3018 	/*PHYDM_DBG(p_dm, DBG_FW_TRACE,("pre_seq = (( %d )), current_seq = (( %d ))\n", p_dm->pre_c2h_seq, c2h_seq));*/
3019 	/*PHYDM_DBG(p_dm, DBG_FW_TRACE,("fw_buff_is_enpty = (( %d ))\n", p_dm->fw_buff_is_enpty));*/
3020 
3021 	if ((c2h_seq != p_dm->pre_c2h_seq)  &&  p_dm->fw_buff_is_enpty == false) {
3022 		p_dm->fw_debug_trace[p_dm->c2h_cmd_start] = '\0';
3023 		PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW Dbg Queue Overflow] %s\n", p_dm->fw_debug_trace));
3024 		p_dm->c2h_cmd_start = 0;
3025 	}
3026 
3027 	if ((cmd_len - 1) > (60 - p_dm->c2h_cmd_start)) {
3028 		p_dm->fw_debug_trace[p_dm->c2h_cmd_start] = '\0';
3029 		PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW Dbg Queue error: wrong C2H length] %s\n", p_dm->fw_debug_trace));
3030 		p_dm->c2h_cmd_start = 0;
3031 		return;
3032 	}
3033 
3034 	strncpy((char *)&(p_dm->fw_debug_trace[p_dm->c2h_cmd_start]), (char *)&cmd_buf[1], (cmd_len - 1));
3035 	p_dm->c2h_cmd_start += (cmd_len - 1);
3036 	p_dm->fw_buff_is_enpty = false;
3037 
3038 	if (freg_num == 0 || p_dm->c2h_cmd_start >= 60) {
3039 		if (p_dm->c2h_cmd_start < 60)
3040 			p_dm->fw_debug_trace[p_dm->c2h_cmd_start] = '\0';
3041 		else
3042 			p_dm->fw_debug_trace[59] = '\0';
3043 
3044 		PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW DBG Msg] %s\n", p_dm->fw_debug_trace));
3045 		/*dbg_print("[FW DBG Msg] %s\n", p_dm->fw_debug_trace);*/
3046 		p_dm->c2h_cmd_start = 0;
3047 		p_dm->fw_buff_is_enpty = true;
3048 	}
3049 
3050 	p_dm->pre_c2h_seq = c2h_seq;
3051 #endif /*#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
3052 }
3053 
3054 void
phydm_fw_trace_handler_code(void * p_dm_void,u8 * buffer,u8 cmd_len)3055 phydm_fw_trace_handler_code(
3056 	void	*p_dm_void,
3057 	u8	*buffer,
3058 	u8	cmd_len
3059 )
3060 {
3061 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
3062 	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
3063 	u8	function = buffer[0];
3064 	u8	dbg_num = buffer[1];
3065 	u16	content_0 = (((u16)buffer[3]) << 8) | ((u16)buffer[2]);
3066 	u16	content_1 = (((u16)buffer[5]) << 8) | ((u16)buffer[4]);
3067 	u16	content_2 = (((u16)buffer[7]) << 8) | ((u16)buffer[6]);
3068 	u16	content_3 = (((u16)buffer[9]) << 8) | ((u16)buffer[8]);
3069 	u16	content_4 = (((u16)buffer[11]) << 8) | ((u16)buffer[10]);
3070 
3071 	if (cmd_len > 12)
3072 		PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW Msg] Invalid cmd length (( %d )) >12\n", cmd_len));
3073 
3074 	/* PHYDM_DBG(p_dm, DBG_FW_TRACE,("[FW Msg] Func=((%d)),  num=((%d)), ct_0=((%d)), ct_1=((%d)), ct_2=((%d)), ct_3=((%d)), ct_4=((%d))\n", */
3075 	/*	function, dbg_num, content_0, content_1, content_2, content_3, content_4)); */
3076 
3077 	/*--------------------------------------------*/
3078 #ifdef CONFIG_RA_FW_DBG_CODE
3079 	if (function == RATE_DECISION) {
3080 		if (dbg_num == 0) {
3081 			if (content_0 == 1)
3082 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] RA_CNT=((%d))  Max_device=((%d))--------------------------->\n", content_1, content_2));
3083 			else if (content_0 == 2)
3084 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] Check RA macid= ((%d)), MediaStatus=((%d)), Dis_RA=((%d)),  try_bit=((0x%x))\n", content_1, content_2, content_3, content_4));
3085 			else if (content_0 == 3)
3086 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] Check RA  total=((%d)),  drop=((0x%x)), TXRPT_TRY_bit=((%x)), bNoisy=((%x))\n", content_1, content_2, content_3, content_4));
3087 		} else if (dbg_num == 1) {
3088 			if (content_0 == 1)
3089 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] RTY[0,1,2,3]=[ %d , %d , %d , %d ]\n", content_1, content_2, content_3, content_4));
3090 			else if (content_0 == 2) {
3091 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] RTY[4]=[ %d ], drop=(( %d )), total=(( %d )), current_rate=((0x %x ))", content_1, content_2, content_3, content_4));
3092 				phydm_print_rate(p_dm, (u8)content_4, DBG_FW_TRACE);
3093 			} else if (content_0 == 3)
3094 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] penality_idx=(( %d ))\n", content_1));
3095 			else if (content_0 == 4)
3096 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] RSSI=(( %d )), ra_stage = (( %d ))\n", content_1, content_2));
3097 		}
3098 
3099 		else if (dbg_num == 3) {
3100 			if (content_0 == 1)
3101 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] Fast_RA (( DOWN ))  total=((%d)),  total>>1=((%d)), R4+R3+R2 = ((%d)), RateDownHold = ((%d))\n", content_1, content_2, content_3, content_4));
3102 			else if (content_0 == 2)
3103 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] Fast_RA (( UP ))  total_acc=((%d)),  total_acc>>1=((%d)), R4+R3+R2 = ((%d)), RateDownHold = ((%d))\n", content_1, content_2, content_3, content_4));
3104 			else if (content_0 == 3)
3105 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] Fast_RA (( UP )) ((rate Down Hold))  RA_CNT=((%d))\n", content_1));
3106 			else if (content_0 == 4)
3107 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] Fast_RA (( UP )) ((tota_accl<5 skip))  RA_CNT=((%d))\n", content_1));
3108 			else if (content_0 == 8)
3109 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] Fast_RA (( Reset Tx Rpt )) RA_CNT=((%d))\n", content_1));
3110 		}
3111 
3112 		else if (dbg_num == 4) {
3113 			if (content_0 == 3) {
3114 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] RER_CNT   PCR_ori =(( %d )),  ratio_ori =(( %d )), pcr_updown_bitmap =(( 0x%x )), pcr_var_diff =(( %d ))\n", content_1, content_2, content_3, content_4));
3115 				/**/
3116 			} else if (content_0 == 4) {
3117 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] pcr_shift_value =(( %s%d )), rate_down_threshold =(( %d )), rate_up_threshold =(( %d ))\n", ((content_1) ? "+" : "-"), content_2, content_3, content_4));
3118 				/**/
3119 			} else if (content_0 == 5) {
3120 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] pcr_mean =(( %d )), PCR_VAR =(( %d )), offset =(( %d )), decision_offset_p =(( %d ))\n", content_1, content_2, content_3, content_4));
3121 				/**/
3122 			}
3123 		}
3124 
3125 		else if (dbg_num == 5) {
3126 			if (content_0 == 1)
3127 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] (( UP))  Nsc=(( %d )), N_High=(( %d )), RateUp_Waiting=(( %d )), RateUp_Fail=(( %d ))\n", content_1, content_2, content_3, content_4));
3128 			else if (content_0 == 2)
3129 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] ((DOWN))  Nsc=(( %d )), N_Low=(( %d ))\n", content_1, content_2));
3130 			else if (content_0 == 3)
3131 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] ((HOLD))  Nsc=((%d)), N_High=((%d)), N_Low=((%d)), Reset_CNT=((%d))\n", content_1, content_2, content_3, content_4));
3132 		} else if (dbg_num == 0x60) {
3133 			if (content_0 == 1)
3134 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] ((AP RPT))  macid=((%d)), BUPDATE[macid]=((%d))\n", content_1, content_2));
3135 			else if (content_0 == 4)
3136 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] ((AP RPT))  pass=((%d)), rty_num=((%d)), drop=((%d)), total=((%d))\n", content_1, content_2, content_3, content_4));
3137 			else if (content_0 == 5)
3138 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW] ((AP RPT))  PASS=((%d)), RTY_NUM=((%d)), DROP=((%d)), TOTAL=((%d))\n", content_1, content_2, content_3, content_4));
3139 		}
3140 	}
3141 	/*--------------------------------------------*/
3142 	else if (function == INIT_RA_TABLE) {
3143 		if (dbg_num == 3)
3144 			PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][INIT_RA_INFO] Ra_init, RA_SKIP_CNT = (( %d ))\n", content_0));
3145 
3146 	}
3147 	/*--------------------------------------------*/
3148 	else if (function == RATE_UP) {
3149 		if (dbg_num == 2) {
3150 			if (content_0 == 1)
3151 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][RateUp]  ((Highest rate->return)), macid=((%d))  Nsc=((%d))\n", content_1, content_2));
3152 		} else if (dbg_num == 5) {
3153 			if (content_0 == 0)
3154 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][RateUp]  ((rate UP)), up_rate_tmp=((0x%x)), rate_idx=((0x%x)), SGI_en=((%d)),  SGI=((%d))\n", content_1, content_2, content_3, content_4));
3155 			else if (content_0 == 1)
3156 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][RateUp]  ((rate UP)), rate_1=((0x%x)), rate_2=((0x%x)), BW=((%d)), Try_Bit=((%d))\n", content_1, content_2, content_3, content_4));
3157 		}
3158 
3159 	}
3160 	/*--------------------------------------------*/
3161 	else if (function == RATE_DOWN) {
3162 		if (dbg_num == 5) {
3163 			if (content_0 == 1)
3164 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][RateDownStep]  ((rate Down)), macid=((%d)), rate1=((0x%x)),  rate2=((0x%x)), BW=((%d))\n", content_1, content_2, content_3, content_4));
3165 		}
3166 	} else if (function == TRY_DONE) {
3167 		if (dbg_num == 1) {
3168 			if (content_0 == 1) {
3169 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][Try Done]  ((try succsess )) macid=((%d)), Try_Done_cnt=((%d))\n", content_1, content_2));
3170 				/**/
3171 			}
3172 		} else if (dbg_num == 2) {
3173 			if (content_0 == 1) {
3174 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][Try Done]  ((try)) macid=((%d)), Try_Done_cnt=((%d)),  rate_2=((%d)),  try_succes=((%d))\n", content_1, content_2, content_3, content_4));
3175 				/**/
3176 			}
3177 		}
3178 	}
3179 	/*--------------------------------------------*/
3180 	else if (function == RA_H2C) {
3181 		if (dbg_num == 1) {
3182 			if (content_0 == 0) {
3183 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][H2C=0x49]  fw_trace_en=((%d)), mode =((%d)),  macid=((%d))\n", content_1, content_2, content_3));
3184 				/**/
3185 				/*C2H_RA_Dbg_code(F_RA_H2C,1,0, SysMib.ODM.DEBUG.fw_trace_en, mode, macid, 0);    //RA MASK*/
3186 			}
3187 #if 0
3188 			else if (dbg_num == 2) {
3189 
3190 				if (content_0 == 1) {
3191 					PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][H2C=0x40]  MACID=((%d)), rate ID=((%d)),  SGI=((%d)),  BW=((%d))\n", content_1, content_2, content_3, content_4));
3192 					/**/
3193 				} else if (content_0 == 2) {
3194 					PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][H2C=0x40]   VHT_en=((%d)), Disable_PowerTraining=((%d)),  Disable_RA=((%d)),  No_Update=((%d))\n", content_1, content_2, content_3, content_4));
3195 					/**/
3196 				} else if (content_0 == 3) {
3197 					PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][H2C=0x40]   RA_MSK=[%x | %x | %x | %x ]\n", content_1, content_2, content_3, content_4));
3198 					/**/
3199 				}
3200 			}
3201 #endif
3202 		}
3203 	}
3204 	/*--------------------------------------------*/
3205 	else if (function == F_RATE_AP_RPT) {
3206 		if (dbg_num == 1) {
3207 			if (content_0 == 1)
3208 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][AP RPT]  ((1)), SPE_STATIS=((0x%x))---------->\n", content_3));
3209 		} else if (dbg_num == 2) {
3210 			if (content_0 == 1)
3211 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][AP RPT]  RTY_all=((%d))\n", content_1));
3212 		} else if (dbg_num == 3) {
3213 			if (content_0 == 1)
3214 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][AP RPT]  MACID1[%d], TOTAL=((%d)),  RTY=((%d))\n", content_3, content_1, content_2));
3215 		} else if (dbg_num == 4) {
3216 			if (content_0 == 1)
3217 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][AP RPT]  MACID2[%d], TOTAL=((%d)),  RTY=((%d))\n", content_3, content_1, content_2));
3218 		} else if (dbg_num == 5) {
3219 			if (content_0 == 1)
3220 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][AP RPT]  MACID1[%d], PASS=((%d)),  DROP=((%d))\n", content_3, content_1, content_2));
3221 		} else if (dbg_num == 6) {
3222 			if (content_0 == 1)
3223 				PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][AP RPT]  MACID2[%d],, PASS=((%d)),  DROP=((%d))\n", content_3, content_1, content_2));
3224 		}
3225 	} else {
3226 		PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][general][%d, %d, %d] = {%d, %d, %d, %d}\n", function, dbg_num, content_0, content_1, content_2, content_3, content_4));
3227 		/**/
3228 	}
3229 #else
3230 	PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW][general][%d, %d, %d] = {%d, %d, %d, %d}\n", function, dbg_num, content_0, content_1, content_2, content_3, content_4));
3231 #endif
3232 	/*--------------------------------------------*/
3233 
3234 #endif /*#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
3235 }
3236 
3237 void
phydm_fw_trace_handler_8051(void * p_dm_void,u8 * buffer,u8 cmd_len)3238 phydm_fw_trace_handler_8051(
3239 	void	*p_dm_void,
3240 	u8	*buffer,
3241 	u8	cmd_len
3242 )
3243 {
3244 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
3245 	struct PHY_DM_STRUCT	*p_dm = (struct PHY_DM_STRUCT *)p_dm_void;
3246 #if 0
3247 	if (cmd_len >= 3)
3248 		cmd_buf[cmd_len - 1] = '\0';
3249 	PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW DBG Msg] %s\n", &(cmd_buf[3])));
3250 #else
3251 
3252 	int i = 0;
3253 	u8	extend_c2h_sub_id = 0, extend_c2h_dbg_len = 0, extend_c2h_dbg_seq = 0;
3254 	u8	fw_debug_trace[128];
3255 	u8	*extend_c2h_dbg_content = 0;
3256 
3257 	if (cmd_len > 127)
3258 		return;
3259 
3260 	extend_c2h_sub_id = buffer[0];
3261 	extend_c2h_dbg_len = buffer[1];
3262 	extend_c2h_dbg_content = buffer + 2; /*DbgSeq+DbgContent  for show HEX*/
3263 
3264 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
3265 	RT_DISP(FC2H, C2H_Summary, ("[Extend C2H packet], Extend_c2hSubId=0x%x, extend_c2h_dbg_len=%d\n",
3266 				    extend_c2h_sub_id, extend_c2h_dbg_len));
3267 
3268 	RT_DISP_DATA(FC2H, C2H_Summary, "[Extend C2H packet], Content Hex:", extend_c2h_dbg_content, cmd_len - 2);
3269 #endif
3270 
3271 go_backfor_aggre_dbg_pkt:
3272 	i = 0;
3273 	extend_c2h_dbg_seq = buffer[2];
3274 	extend_c2h_dbg_content = buffer + 3;
3275 
3276 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
3277 	RT_DISP(FC2H, C2H_Summary, ("[RTKFW, SEQ= %d] :", extend_c2h_dbg_seq));
3278 #endif
3279 
3280 	for (; ; i++) {
3281 		fw_debug_trace[i] = extend_c2h_dbg_content[i];
3282 		if (extend_c2h_dbg_content[i + 1] == '\0') {
3283 			fw_debug_trace[i + 1] = '\0';
3284 			PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW DBG Msg] %s", &(fw_debug_trace[0])));
3285 			break;
3286 		} else if (extend_c2h_dbg_content[i] == '\n') {
3287 			fw_debug_trace[i + 1] = '\0';
3288 			PHYDM_DBG(p_dm, DBG_FW_TRACE, ("[FW DBG Msg] %s", &(fw_debug_trace[0])));
3289 			buffer = extend_c2h_dbg_content + i + 3;
3290 			goto go_backfor_aggre_dbg_pkt;
3291 		}
3292 	}
3293 
3294 
3295 #endif
3296 #endif /*#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
3297 }
3298