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77 //<MStar Software>
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93 ////////////////////////////////////////////////////////////////////////////////
94 //==============================================================================
95 #define _DRV_PQ_BIN_C
96
97
98 #ifdef MSOS_TYPE_LINUX_KERNEL
99 #include <linux/string.h>
100 #else
101 #include <string.h>
102 #endif
103
104 #ifdef MSOS_TYPE_LINUX
105 #include <pthread.h>
106 #endif
107
108 #include "MsCommon.h"
109 #include "MsOS.h"
110 #include "MsTypes.h"
111 #include "hwreg_utility2.h"
112 #include "color_reg.h"
113 #include "drvMMIO.h"
114 #include "drvXC_IOPort.h"
115 #include "apiXC.h"
116
117 #include "drvPQ_Define.h"
118 #include "drvPQ_Declare.h"
119 #include "drvPQ.h"
120 #include "drvPQ_Bin.h"
121 #include "drvPQ_Datatypes.h"
122 #include "mhal_pq.h"
123 #include "UFO.h"
124
125 //-------------------------------------------------------------------------------------------------
126 // Macro and Define
127 //-------------------------------------------------------------------------------------------------
128
129 #ifndef UNUSED //to avoid compile warnings...
130 #define UNUSED(var) (void)((var) = (var))
131 #endif
132
133 #ifndef PQ_BIN_SOURCELUT_DATA_LEN //to avoid compile warnings...
134 #define PQ_BIN_SOURCELUT_DATA_LEN 2 // 2 bytes
135 #endif
136
137 #define PQ_BIN_DBG_HEADER_DATA 0
138 #define PQ_BIN_DBG(x) //(x)
139 #define PQ_BIN_DBG_HEADER(x) //(x)
140 #define PQ_BIN_DUMP_DBG(x) //(x)
141 #define PQ_BIN_DUMP_FILTER_DBG(x) //(x)
142 #define PQ_BIN_XRULE_DBG(x) //(x)
143 #define PQ_BIN_GRULE_DBG(x) //(x)
144 #define PQ_TEXT_BIN_DBG_HEADER(x) //(x)
145 #define PQ_TEXT_BIN_DBG(x) //(x)
146 #define PQ_BIN_DBG_SRAMERROR(x) //(x)
147 #define PQ_BIN_DUMP_CLONE_DBG(x) //(x)
148
149 //-------------------------------------------------------------------------------------------------
150 // Local Variable
151 //-------------------------------------------------------------------------------------------------
152 static MS_U16 _u16PQTabIdx[PQ_BIN_MAX_PNL][PQ_BIN_MAX_IP]; // store all TabIdx of all IPs
153
154 static MS_U8 _gPQBinDisplayType;
155 static MS_U8 _gPQBinPnlIdx;
156 static MS_BOOL _bMLoadEn = FALSE;
157
158 #define MLOAD_MAX_CMD 192
159 static MS_U32 _u32MLoadCmd[MLOAD_MAX_CMD];
160 static MS_U16 _u16MLoadMsk[MLOAD_MAX_CMD];
161 static MS_U16 _u16MLoadVal[MLOAD_MAX_CMD];
162 static MS_U16 _u16MLoadCmdCnt = 0;
163 #ifdef MSOS_TYPE_LINUX
164 static pthread_mutex_t _stPQFilterTableMutex = PTHREAD_MUTEX_INITIALIZER;
165 #endif
166
167 // to save loading SRAM table time, SRAM are only downloaded
168 // when current SRAM table is different to previous SRAM table
169 static MS_U16 _u16SRAM1Table = 0xFFFF;
170 static MS_U16 _u16SRAM2Table = 0xFFFF;
171 static MS_U16 _u16SRAM3Table = 0xFFFF;
172 static MS_U16 _u16SRAM4Table = 0xFFFF;
173 static MS_U16 _u16CSRAM1Table = 0xFFFF;
174 static MS_U16 _u16CSRAM2Table = 0xFFFF;
175 static MS_U16 _u16CSRAM3Table = 0xFFFF;
176 static MS_U16 _u16CSRAM4Table = 0xFFFF;
177 static MS_U16 _u16ICC_CRD_Table = 0xFFFF;
178 static MS_U16 _u16IHC_CRD_Table = 0xFFFF;
179 static MS_U16 _u16XVYCC_DE_GAMMA_SRAM_Table = 0xFFFF;
180 static MS_U16 _u16XVYCC_GAMMA_SRAM_Table = 0xFFFF;
181
182 static MS_U16 _u16SRAM1Table_main2 = 0xFFFF;
183 static MS_U16 _u16SRAM2Table_main2 = 0xFFFF;
184 static MS_U16 _u16SRAM3Table_main2 = 0xFFFF;
185 static MS_U16 _u16SRAM4Table_main2 = 0xFFFF;
186 static MS_U16 _u16CSRAM1Table_main2 = 0xFFFF;
187 static MS_U16 _u16CSRAM2Table_main2 = 0xFFFF;
188 static MS_U16 _u16CSRAM3Table_main2 = 0xFFFF;
189 static MS_U16 _u16CSRAM4Table_main2 = 0xFFFF;
190 static MS_U16 _u16ICC_CRD_Table_main2 = 0xFFFF;
191 static MS_U16 _u16IHC_CRD_Table_main2 = 0xFFFF;
192 static MS_U16 _u16XVYCC_DE_GAMMA_SRAM_Table_main2 = 0xFFFF;
193 static MS_U16 _u16XVYCC_GAMMA_SRAM_Table_main2 = 0xFFFF;
194
195 #if defined(ENABLE_PQ_BIN_UFSC) && ENABLE_PQ_BIN_UFSC
196 static MS_U16 _u16UFSCSRAM1Table = 0xFFFF;
197 static MS_U16 _u16UFSCSRAM2Table = 0xFFFF;
198 static MS_U16 _u16UFSCSRAM3Table = 0xFFFF;
199 static MS_U16 _u16UFSCSRAM4Table = 0xFFFF;
200 static MS_U16 _u16UFSCCSRAM1Table = 0xFFFF;
201 static MS_U16 _u16UFSCCSRAM2Table = 0xFFFF;
202 static MS_U16 _u16UFSCCSRAM3Table = 0xFFFF;
203 static MS_U16 _u16UFSCCSRAM4Table = 0xFFFF;
204 static MS_U16 _u16UFSCICC_CRD_Table = 0xFFFF;
205 static MS_U16 _u16UFSCIHC_CRD_Table = 0xFFFF;
206 //static MS_U16 _u16UFSCXVYCC_DE_GAMMA_SRAM_Table = 0xFFFF;
207 //static MS_U16 _u16UFSCXVYCC_GAMMA_SRAM_Table = 0xFFFF;
208 #endif
209 //-------------------------------------------------------------------------------------------------
210 // Function
211 //-------------------------------------------------------------------------------------------------
212
MDrv_PQBin_GetByteData(void * pInstance,void * pAddrVirt,MS_U32 * u32Offset)213 MS_U8 MDrv_PQBin_GetByteData(void *pInstance,void *pAddrVirt, MS_U32 *u32Offset)
214 {
215 MS_U8 u8ret = *((MS_U8 *)pAddrVirt);
216 *u32Offset = *u32Offset + 1;
217
218 return u8ret;
219 }
220
MDrv_PQBin_Get2ByteData(void * pInstance,void * pAddrVirt,MS_U32 * u32Offset)221 MS_U16 MDrv_PQBin_Get2ByteData(void *pInstance,void *pAddrVirt, MS_U32 *u32Offset)
222 {
223 MS_U16 u16ret = (((MS_U16)*((MS_U8 *)pAddrVirt+0)) << 0) |
224 (((MS_U16)*((MS_U8 *)pAddrVirt+1)) << 8);
225
226 *u32Offset = *u32Offset + 2;
227
228
229 return u16ret;
230 }
231
232
MDrv_PQBin_Get4ByteData(void * pInstance,void * pAddrVirt,MS_U32 * u32Offset)233 MS_U32 MDrv_PQBin_Get4ByteData(void *pInstance,void *pAddrVirt, MS_U32 *u32Offset)
234 {
235 MS_U32 u32ret = (((MS_U32)*((MS_U8 *)pAddrVirt+0)) << 0) |
236 (((MS_U32)*((MS_U8 *)pAddrVirt+1)) << 8) |
237 (((MS_U32)*((MS_U8 *)pAddrVirt+2)) << 16) |
238 (((MS_U32)*((MS_U8 *)pAddrVirt+3)) << 24);
239
240 *u32Offset = *u32Offset + 4;
241
242 return u32ret;
243 }
244
245
246
247
MDrv_PQBin_DumpGeneralRegTable(void * pInstance,const MS_PQBin_IP_Table_Info * const pTabInfo)248 void MDrv_PQBin_DumpGeneralRegTable(void *pInstance,const MS_PQBin_IP_Table_Info* const pTabInfo)
249 {
250 MS_U8 u8Bank;
251 MS_U8 u8Addr;
252 MS_U8 u8Mask;
253 MS_U8 u8Value;
254 MS_U16 i;
255 MS_PHYADDR u32Addr, u32RegAddr;
256 MS_U32 u32Offset;
257 PQ_BIN_DUMP_DBG(printf("tab: general\n"));
258 if (pTabInfo->u16GroupIdx >= pTabInfo->u16GroupNum)
259 {
260 PQ_BIN_DUMP_DBG(printf("[PQBin]IP_Info error: General Reg Table\n"));
261 return;
262 }
263
264 u32Addr = pTabInfo->u32TabOffset;
265 for(i=0; i< pTabInfo->u16RegNum; i++)
266 {
267 u32Offset = ( PQ_BIN_BANK_SIZE + PQ_BIN_ADDR_SIZE + PQ_BIN_MASK_SIZE + (MS_U32)pTabInfo->u16GroupNum) * (MS_U32)i;
268 u8Bank = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
269 u8Addr = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
270 u8Mask = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
271
272 u32Offset += pTabInfo->u16GroupIdx;
273 u8Value = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
274 PQ_BIN_DBG_SRAMERROR(printf("4 [read addr=%lx], GroupIdx=%x,RegNum=%x,reg=%04x, msk=%02x, val=%02x, u8CurBank=%x\n",
275 (u32Addr+u32Offset-(MS_U32)pTabInfo->u16GroupIdx),pTabInfo->u16GroupIdx,pTabInfo->u16RegNum,NON_PM_BASE | (((MS_U16)u8Bank) << 8) | (MS_U16)u8Addr, u8Mask, u8Value, u8Bank));
276
277 u32RegAddr = NON_PM_BASE | (((MS_U16)u8Bank) << 8) | (MS_U16)u8Addr;
278
279 PQ_BIN_DUMP_DBG(printf("[addr=%04lx, msk=%02x, val=%02x]\n", u32RegAddr, u8Mask, u8Value));
280
281 PQ_REG_FUNC(u32RegAddr, u8Value, u8Mask);
282 }
283 }
284
MDrv_PQBin_DumpCombRegTable(void * pInstance,const MS_PQBin_IP_Table_Info * const pTabInfo)285 void MDrv_PQBin_DumpCombRegTable(void *pInstance,const MS_PQBin_IP_Table_Info* const pTabInfo)
286 {
287 MS_U16 i;
288 MS_U8 u8Addr;
289 MS_U8 u8Mask;
290 MS_U8 u8Value;
291 MS_U8 u8CurBank = 0xff;
292 MS_PHYADDR u32Addr, u32RegAddr;
293 MS_U32 u32Offset;
294 COMB_BK_STORE;
295
296 PQ_BIN_DUMP_DBG(printf("tab: comb\n"));
297
298 if(pTabInfo->u16GroupIdx >= pTabInfo->u16GroupNum)
299 {
300 PQ_BIN_DUMP_DBG(printf("[PQBin]IP_Info error: Comb Reg Table\n"));
301 return;
302 }
303
304 u32Addr = pTabInfo->u32TabOffset;
305 for(i=0; i< pTabInfo->u16RegNum; i++)
306 {
307 u32Offset = ( PQ_BIN_BANK_SIZE + PQ_BIN_ADDR_SIZE + PQ_BIN_MASK_SIZE + (MS_U32)pTabInfo->u16GroupNum) * (MS_U32)i;
308 u8CurBank = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
309 u8Addr = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
310 u8Mask = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
311
312 u32Offset += pTabInfo->u16GroupIdx;
313 u8Value = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
314 PQ_BIN_DBG_SRAMERROR(printf("2 [read addr=%lx], GroupIdx=%x,RegNum=%x,reg=%04lx, msk=%02x, val=%02x, u8CurBank=%x\n",
315 (u32Addr+u32Offset-(MS_U32)pTabInfo->u16GroupIdx),pTabInfo->u16GroupIdx,pTabInfo->u16RegNum,COMB_REG_BASE | (MS_U32)u8Addr, u8Mask, u8Value, u8CurBank));
316
317 if (u8CurBank != COMB_BK_CURRENT)
318 {
319 PQ_BIN_DUMP_DBG(printf("<<bankswitch=%02x>>\n", u8CurBank));
320 COMB_BK_SWITCH(u8CurBank);
321 }
322
323 u32RegAddr = COMB_REG_BASE | (MS_U16)u8Addr;
324
325 PQ_BIN_DUMP_DBG(printf("[addr=%04lx, msk=%02x, val=%02x]\n", u32RegAddr, u8Mask, u8Value));
326 PQ_REG_FUNC(u32RegAddr, u8Value, u8Mask);
327
328 }
329 COMB_BK_RESTORE;
330 }
331
332 #define BITSHIFT(x) ((((x)&0x01) == 0x01)? 0 : ( \
333 (((x)&0x02) == 0x02)? 1 : ( \
334 (((x)&0x04) == 0x04)? 2 : ( \
335 (((x)&0x08) == 0x08)? 3 : ( \
336 (((x)&0x10) == 0x10)? 4 : ( \
337 (((x)&0x20) == 0x20)? 5 : ( \
338 (((x)&0x40) == 0x40)? 6 : 7 )))))))
339
340
MDrv_PQBin_DumpCloneScalerRegTable(void * pInstance,const MS_PQBin_IP_Table_Info * const pTabMainInfo,const MS_PQBin_IP_Table_Info * const pTabSubInfo)341 void MDrv_PQBin_DumpCloneScalerRegTable(void *pInstance,const MS_PQBin_IP_Table_Info* const pTabMainInfo,
342 const MS_PQBin_IP_Table_Info* const pTabSubInfo)
343 {
344 MS_PHYADDR u32RegAddr1, u32RegAddr2;
345 MS_U8 u8Mask1, u8Mask2;
346 MS_U8 u8Addr1, u8Addr2;
347 MS_U8 u8Value;
348 MS_U8 u8CurBank1 = 0xff, u8CurBank2 = 0xff;
349 MS_PHYADDR u32Addr1, u32Addr2;
350 MS_U32 u32Offset1, u32Offset2;
351 MS_U8 u8BitShift1 = 0, u8BitShift2 = 0;
352 MS_U16 i;
353
354 #ifdef MSOS_TYPE_LINUX
355 #if(ENABLE_PQ_MLOAD)
356 pthread_mutex_lock(&_PQ_MLoad_Mutex);
357 #endif
358 #endif
359 //consider dump reg amount is very large, so we shouldn't use MApi_XC_W2BYTE(),
360 // because mutex cost much time.
361 SC_BK_STORE_MUTEX;
362
363 PQ_BIN_DUMP_CLONE_DBG(printf("tab: sc\n"));
364 if( (pTabMainInfo->u16GroupIdx >= pTabMainInfo->u16GroupNum)
365 || (pTabSubInfo->u16GroupIdx >= pTabMainInfo->u16GroupNum))
366 {
367 PQ_BIN_DUMP_CLONE_DBG(printf("[PQBin]IP_Info error: Scaler Reg Table\n"));
368
369 SC_BK_RESTORE_MUTEX;
370
371 #ifdef MSOS_TYPE_LINUX
372 #if(ENABLE_PQ_MLOAD)
373 pthread_mutex_unlock(&_PQ_MLoad_Mutex);
374 #endif
375 #endif
376
377 return;
378 }
379
380 u32Addr1 = pTabMainInfo->u32TabOffset;
381 u32Addr2 = pTabSubInfo->u32TabOffset;
382 for(i=0; i<pTabMainInfo->u16RegNum; i++)
383 {
384 u32Offset1 = ( PQ_BIN_BANK_SIZE + PQ_BIN_ADDR_SIZE + PQ_BIN_MASK_SIZE + (MS_U32)pTabMainInfo->u16GroupNum) * (MS_U32)i;
385 u8CurBank1 = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr1+u32Offset1)), &u32Offset1);
386 u8Addr1 = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr1+u32Offset1)), &u32Offset1);
387 u8Mask1 = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr1+u32Offset1)), &u32Offset1);
388
389 u32Offset2 = ( PQ_BIN_BANK_SIZE + PQ_BIN_ADDR_SIZE + PQ_BIN_MASK_SIZE + (MS_U32)pTabSubInfo->u16GroupNum) * (MS_U32)i;
390 u8CurBank2 = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr2+u32Offset2)), &u32Offset2);
391 u8Addr2 = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr2+u32Offset2)), &u32Offset2);
392 u8Mask2 = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr2+u32Offset2)), &u32Offset2);
393
394 //read from main reg
395 #if (SCALER_REGISTER_SPREAD)
396 u32RegAddr1 = BK_SCALER_BASE | (((MS_U32)u8CurBank1) << 8) | (MS_U32)u8Addr1;
397 #else
398 if (u8CurBank1 != SC_BK_CURRENT)
399 {
400 PQ_BIN_DUMP_CLONE_DBG(printf("<<bankswitch=%02x>>\n", u8CurBank1));
401 SC_BK_SWITCH(u8CurBank1);
402 }
403
404 u32RegAddr1 = BK_SCALER_BASE | (MS_U32)u8Addr1;
405 #endif
406
407 u8Value = PQ_REG_READ_FUNC(u32RegAddr1) & u8Mask1;
408
409 //when clone main and sub's mask bit is different
410 //we need to shift the value and then write to new mask position
411 u8BitShift1 = BITSHIFT(u8Mask1);
412 u8BitShift2 = BITSHIFT(u8Mask2);
413
414 if(u8BitShift1 > u8BitShift2)
415 {
416 u8Value = u8Value >> (u8BitShift1 - u8BitShift2);
417 }
418 else
419 {
420 u8Value = u8Value << (u8BitShift2 - u8BitShift1);
421 }
422
423 //write to sub reg
424 if(_bMLoadEn)
425 {
426 u32RegAddr2 = (((MS_U32)u8CurBank2) << 8) | (MS_U32)u8Addr2;
427 PQ_REG_MLOAD_WRITE_CMD(u32RegAddr2, u8Value, u8Mask2);
428 }
429 else
430 {
431
432 #if (SCALER_REGISTER_SPREAD)
433 u32RegAddr2 = BK_SCALER_BASE | (((MS_U32)u8CurBank2) << 8) | (MS_U32)u8Addr2;
434 #else
435 if (u8CurBank2 != SC_BK_CURRENT)
436 {
437 PQ_BIN_DUMP_CLONE_DBG(printf("<<bankswitch=%02x>>\n", u8CurBank2));
438 SC_BK_SWITCH(u8CurBank2);
439 }
440
441 u32RegAddr2 = BK_SCALER_BASE | (MS_U32)u8Addr2;
442 #endif
443 PQ_REG_FUNC(u32RegAddr2, u8Value, u8Mask2);
444 }
445 PQ_BIN_DUMP_CLONE_DBG(printf("%u [read from addr=%lx], GroupIdx=%x,RegNum=%x,reg=%04lx, msk=%02x, u8CurBank=%x\n",
446 i,(u32Addr1+u32Offset1-(MS_U32)pTabMainInfo->u16GroupIdx),pTabMainInfo->u16GroupIdx,pTabMainInfo->u16RegNum,u32RegAddr1, u8Mask1, u8CurBank1));
447 PQ_BIN_DUMP_CLONE_DBG(printf("%u [write to addr=%lx], GroupIdx=%x,RegNum=%x,reg=%04lx, msk=%02x, u8CurBank=%x\n",
448 i,(u32Addr2+u32Offset2-(MS_U32)pTabSubInfo->u16GroupIdx),pTabSubInfo->u16GroupIdx,pTabSubInfo->u16RegNum,u32RegAddr2, u8Mask2, u8CurBank2));
449
450 PQ_BIN_DUMP_CLONE_DBG(printf("[value=%02x], shift1=%u, shift2=%u\n", u8Value, u8BitShift1, u8BitShift2));
451 }
452
453 SC_BK_RESTORE_MUTEX;
454
455 #ifdef MSOS_TYPE_LINUX
456 #if(ENABLE_PQ_MLOAD)
457 pthread_mutex_unlock(&_PQ_MLoad_Mutex);
458 #endif
459 #endif
460 }
461
462 #if (defined (UFO_XC_DS_PQ))
463 stDS_PQ_REG DS_REG[DS_PQ_MAX_NUM];
464 MS_U16 DS_REG_CNT = 0;
465 stDS_PQ_REG DS_UFSC_REG[DS_PQ_MAX_NUM];
466 MS_U16 DS_UFSC_REG_CNT = 0;
467 MS_BOOL bUFSC_DSEn=0;
MDrv_PQBin_DumpScalerRegTable_v2(void * pInstance,const MS_PQBin_IP_Table_Info * const pTabInfo)468 void MDrv_PQBin_DumpScalerRegTable_v2(void *pInstance,const MS_PQBin_IP_Table_Info* const pTabInfo)
469 {
470 MS_PHYADDR u32RegAddr;
471 MS_U8 u8Mask;
472 MS_U8 u8Addr;
473 MS_U8 u8Value;
474 MS_U8 u8CurBank = 0xff;
475 MS_PHYADDR u32Addr;
476 MS_U32 u32Offset;
477 MS_U32 x =0;
478
479 MS_U16 i;
480
481 if(pTabInfo->u16GroupIdx >= pTabInfo->u16GroupNum)
482 {
483 //XC_PRINTF("[PQBin]IP_Info error: Scaler Reg Table\n");
484
485
486 return;
487 }
488
489
490 u32Addr = pTabInfo->u32TabOffset;
491 for(i=0; i<pTabInfo->u16RegNum; i++)
492 {
493 u32Offset = ( PQ_BIN_BANK_SIZE + PQ_BIN_ADDR_SIZE + PQ_BIN_MASK_SIZE + (MS_U32)pTabInfo->u16GroupNum) * (MS_U32)i;
494 u8CurBank = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
495 u8Addr = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
496 u8Mask = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
497
498 u32Offset += (MS_U32)pTabInfo->u16GroupIdx;
499 u8Value = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
500
501 #if (SCALER_REGISTER_SPREAD)
502 u32RegAddr = /*BK_SCALER_BASE |*/ (((MS_U32)u8CurBank) << 8) | (MS_U32)u8Addr;
503 #else
504 if (u8CurBank != SC_BK_CURRENT)
505 {
506 //XC_PRINTF("<<bankswitch=%02x>>\n", u8CurBank);
507 SC_BK_SWITCH(u8CurBank);
508 }
509
510 u32RegAddr = BK_SCALER_BASE | (MS_U32)u8Addr;
511 #endif
512 //XC_PRINTF("[addr=%04lx, msk=%02x, val=%02x]\n", u32RegAddr, u8Mask, u8Value);
513 if(DS_REG_CNT == 0)
514 {
515 if((u32RegAddr%2)==0)
516 {
517 DS_REG[DS_REG_CNT].u16Value = u8Value;
518 DS_REG[DS_REG_CNT].u16Mask = u8Mask;
519 }
520 else
521 {
522 DS_REG[DS_REG_CNT].u16Value = u8Value<<8;
523 DS_REG[DS_REG_CNT].u16Mask = u8Mask<<8;
524 }
525
526 DS_REG[DS_REG_CNT].u16Addr = u32RegAddr;
527 DS_REG[DS_REG_CNT].u16Addr = (DS_REG[DS_REG_CNT].u16Addr/2) *2;
528 DS_REG_CNT++;
529 }else
530 {
531 for(x=0;x < DS_REG_CNT;x++)
532 {
533 if((DS_REG[x].u16Addr/2) == (u32RegAddr/2))
534 {
535 if(DS_REG[x].u16Addr < u32RegAddr)
536 {
537 DS_REG[x].u16Value = (DS_REG[x].u16Value) | (u8Value<<8);
538 DS_REG[x].u16Mask = (DS_REG[x].u16Mask) | (u8Mask<<8);
539 }
540 else
541 {
542 DS_REG[x].u16Value = (u8Value) | DS_REG[x].u16Value;
543 DS_REG[x].u16Mask = (u8Mask) | DS_REG[x].u16Mask;
544 }
545 break;
546 }
547 }
548 if( x == DS_REG_CNT )
549 {
550 if((u32RegAddr%2)==0)
551 {
552 DS_REG[DS_REG_CNT].u16Value = u8Value;
553 DS_REG[DS_REG_CNT].u16Mask = u8Mask;
554 }
555 else
556 {
557 DS_REG[DS_REG_CNT].u16Value = u8Value<<8;
558 DS_REG[DS_REG_CNT].u16Mask = u8Mask<<8;
559 }
560
561 DS_REG[DS_REG_CNT].u16Addr = u32RegAddr;
562 DS_REG[DS_REG_CNT].u16Addr = (DS_REG[DS_REG_CNT].u16Addr/2) *2;
563 DS_REG_CNT++;
564 }
565 }
566 if(DS_REG_CNT >= DS_PQ_MAX_NUM)
567 {
568 //XC_PRINTF("[PQBin]IP_Info error: DS-PQ CNT has reach max num!\n");
569 MS_ASSERT(0);
570 }
571
572 }
573
574 }
MDrv_PQBin_DumpUFSCScalerRegTable_v2(void * pInstance,const MS_PQBin_IP_Table_Info * const pTabInfo)575 void MDrv_PQBin_DumpUFSCScalerRegTable_v2(void *pInstance,const MS_PQBin_IP_Table_Info* const pTabInfo)
576 {
577 MS_PHYADDR u32RegAddr;
578 MS_U8 u8Mask;
579 MS_U8 u8Addr;
580 MS_U8 u8Value;
581 MS_U8 u8CurBank = 0xff;
582 MS_PHYADDR u32Addr;
583 MS_U32 u32Offset;
584 MS_U32 x =0;
585
586 MS_U16 i;
587
588 if(pTabInfo->u16GroupIdx >= pTabInfo->u16GroupNum)
589 {
590 //XC_PRINTF("[PQBin]IP_Info error: Scaler Reg Table\n");
591
592
593 return;
594 }
595
596
597 u32Addr = pTabInfo->u32TabOffset;
598 for(i=0; i<pTabInfo->u16RegNum; i++)
599 {
600 u32Offset = ( PQ_BIN_BANK_SIZE + PQ_BIN_ADDR_SIZE + PQ_BIN_MASK_SIZE + (MS_U32)pTabInfo->u16GroupNum) * (MS_U32)i;
601 u8CurBank = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
602 u8Addr = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
603 u8Mask = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
604
605 u32Offset += (MS_U32)pTabInfo->u16GroupIdx;
606 u8Value = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
607
608 if (0)//(_bMLoadEn)
609 {
610 u32RegAddr = (((MS_U32)u8CurBank) << 8) | (MS_U32)u8Addr;
611 }
612 else
613 {
614 u32RegAddr = BK_UFSC_SCALER_BASE | (((MS_U32)u8CurBank) << 8) | (MS_U32)u8Addr;
615 }
616
617 //XC_PRINTF("[addr=%04lx, msk=%02x, val=%02x]\n", u32RegAddr, u8Mask, u8Value);
618
619 if(DS_UFSC_REG_CNT == 0)
620 {
621 DS_UFSC_REG[DS_UFSC_REG_CNT].u16Bank = (BK_UFSC_SCALER_BASE>>8) | (MS_U32)u8CurBank;
622 DS_UFSC_REG[DS_UFSC_REG_CNT].u16Value = u8Value;
623 DS_UFSC_REG[DS_UFSC_REG_CNT].u16Mask = u8Mask;
624 DS_UFSC_REG[DS_UFSC_REG_CNT].u16Addr = u8Addr;
625 if((DS_UFSC_REG[DS_UFSC_REG_CNT].u16Addr/2) *2 != DS_UFSC_REG[DS_UFSC_REG_CNT].u16Addr)
626 {
627 DS_UFSC_REG[x].u16Value = (DS_UFSC_REG[x].u16Value) <<8;
628 DS_UFSC_REG[x].u16Mask = (DS_UFSC_REG[x].u16Mask) <<8;
629 DS_UFSC_REG[DS_UFSC_REG_CNT].u16Addr = (DS_UFSC_REG[DS_UFSC_REG_CNT].u16Addr/2) *2;
630 }
631 DS_UFSC_REG_CNT++;
632 }else
633 {
634 for(x=0;x < DS_UFSC_REG_CNT;x++)
635 {
636 if(DS_UFSC_REG[x].u16Bank == ((BK_UFSC_SCALER_BASE>>8) | (MS_U32)u8CurBank))
637 {
638 if((DS_UFSC_REG[x].u16Addr/2) == ((MS_U16)u8Addr/2))
639 {
640 if(DS_UFSC_REG[x].u16Addr < (MS_U16)u8Addr)
641 {
642 DS_UFSC_REG[x].u16Value = (DS_UFSC_REG[x].u16Value) | (u8Value<<8);
643 DS_UFSC_REG[x].u16Mask = (DS_UFSC_REG[x].u16Mask) | (u8Mask<<8);
644 }
645 else
646 {
647 DS_UFSC_REG[x].u16Value = (u8Value) | DS_UFSC_REG[x].u16Value;
648 DS_UFSC_REG[x].u16Mask = (u8Mask) | DS_UFSC_REG[x].u16Mask;
649 }
650 break;
651 }
652 }
653 }
654 if( x == DS_UFSC_REG_CNT )
655 {
656 DS_UFSC_REG[DS_UFSC_REG_CNT].u16Bank = (BK_UFSC_SCALER_BASE>>8) | (MS_U32)u8CurBank;
657 DS_UFSC_REG[DS_UFSC_REG_CNT].u16Value = u8Value;
658 DS_UFSC_REG[DS_UFSC_REG_CNT].u16Mask = u8Mask;
659 DS_UFSC_REG[DS_UFSC_REG_CNT].u16Addr = u8Addr;
660 if((DS_UFSC_REG[DS_UFSC_REG_CNT].u16Addr/2) *2 != DS_UFSC_REG[DS_UFSC_REG_CNT].u16Addr)
661 {
662 DS_UFSC_REG[x].u16Value = (DS_UFSC_REG[x].u16Value) <<8;
663 DS_UFSC_REG[x].u16Mask = (DS_UFSC_REG[x].u16Mask) <<8;
664 DS_UFSC_REG[DS_UFSC_REG_CNT].u16Addr = (DS_UFSC_REG[DS_UFSC_REG_CNT].u16Addr/2) *2;
665 }
666 DS_UFSC_REG_CNT++;
667 }
668 }
669
670 if(DS_UFSC_REG_CNT >= DS_PQ_MAX_NUM)
671 {
672 //XC_PRINTF("[PQBin]IP_Info error: DS-PQ CNT has reach max num!\n");
673 MS_ASSERT(0);
674 }
675
676 }
677 bUFSC_DSEn=TRUE;
678
679 }
680 #endif
MDrv_PQBin_DumpScalerRegTable(void * pInstance,const MS_PQBin_IP_Table_Info * const pTabInfo)681 void MDrv_PQBin_DumpScalerRegTable(void *pInstance,const MS_PQBin_IP_Table_Info* const pTabInfo)
682 {
683 MS_PHYADDR u32RegAddr;
684 MS_U8 u8Mask;
685 MS_U8 u8Addr;
686 MS_U8 u8Value;
687 MS_U8 u8CurBank = 0xff;
688 MS_PHYADDR u32Addr;
689 MS_U32 u32Offset;
690
691 MS_U16 i;
692
693 #ifdef MSOS_TYPE_LINUX
694 #if(ENABLE_PQ_MLOAD)
695 pthread_mutex_lock(&_PQ_MLoad_Mutex);
696 #endif
697 #endif
698 //consider dump reg amount is very large, so we shouldn't use MApi_XC_W2BYTE(),
699 // because mutex cost much time.
700 SC_BK_STORE_MUTEX;
701
702 PQ_BIN_DUMP_DBG(printf("tab: sc\n"));
703 if(pTabInfo->u16GroupIdx >= pTabInfo->u16GroupNum)
704 {
705 PQ_BIN_DBG(printf("[PQBin]IP_Info error: Scaler Reg Table\n"));
706
707 SC_BK_RESTORE_MUTEX;
708
709 #ifdef MSOS_TYPE_LINUX
710 #if(ENABLE_PQ_MLOAD)
711 pthread_mutex_unlock(&_PQ_MLoad_Mutex);
712 #endif
713 #endif
714
715 return;
716 }
717
718 #if (ENABLE_PQ_MLOAD)
719 if (_bMLoadEn)
720 {
721 if (pTabInfo->u16RegNum >= MLOAD_MAX_CMD)
722 {
723 printf("[PQ ERROR] Function %s ==== ML overflow !!!\n",__FUNCTION__);
724 MS_ASSERT(FALSE);
725 }
726 else if ( (_u16MLoadCmdCnt + pTabInfo->u16RegNum) >= MLOAD_MAX_CMD)
727 {
728 SC_BK_RESTORE_MUTEX;
729 MDrv_PQBin_Set_MLoadEn(pInstance,FALSE);
730 MDrv_PQBin_Set_MLoadEn(pInstance,TRUE);
731 SC_BK_STORE_MUTEX;
732 }
733 }
734 #endif
735
736 u32Addr = pTabInfo->u32TabOffset;
737 for(i=0; i<pTabInfo->u16RegNum; i++)
738 {
739 u32Offset = ( PQ_BIN_BANK_SIZE + PQ_BIN_ADDR_SIZE + PQ_BIN_MASK_SIZE + (MS_U32)pTabInfo->u16GroupNum) * (MS_U32)i;
740 u8CurBank = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
741 u8Addr = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
742 u8Mask = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
743
744 u32Offset += (MS_U32)pTabInfo->u16GroupIdx;
745 u8Value = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
746
747 PQ_BIN_DBG_SRAMERROR(printf("1 [read addr=%lx], GroupIdx=%x,RegNum=%x,reg=%04lx, msk=%02x, val=%02x, u8CurBank=%x\n",
748 (u32Addr+u32Offset-(MS_U32)pTabInfo->u16GroupIdx),pTabInfo->u16GroupIdx,pTabInfo->u16RegNum,BK_SCALER_BASE | (MS_U32)u8Addr, u8Mask, u8Value, u8CurBank));
749
750 if(_bMLoadEn)
751 {
752 u32RegAddr = (((MS_U32)u8CurBank) << 8) | (MS_U32)u8Addr;
753 //PQ_REG_MLOAD_FUNC(u32RegAddr, u8Value, u8Mask);
754 PQ_REG_MLOAD_WRITE_CMD(u32RegAddr, u8Value, u8Mask);
755 }
756 else
757 {
758 #if (SCALER_REGISTER_SPREAD)
759 u32RegAddr = BK_SCALER_BASE | (((MS_U32)u8CurBank) << 8) | (MS_U32)u8Addr;
760 #else
761 if (u8CurBank != SC_BK_CURRENT)
762 {
763 PQ_BIN_DUMP_DBG(printf("<<bankswitch=%02x>>\n", u8CurBank));
764 SC_BK_SWITCH(u8CurBank);
765 }
766
767 u32RegAddr = BK_SCALER_BASE | (MS_U32)u8Addr;
768 #endif
769 PQ_REG_FUNC(u32RegAddr, u8Value, u8Mask);
770 }
771 PQ_BIN_DUMP_DBG(printf("[addr=%04lx, msk=%02x, val=%02x]\n", u32RegAddr, u8Mask, u8Value));
772
773 }
774
775 SC_BK_RESTORE_MUTEX;
776
777 #ifdef MSOS_TYPE_LINUX
778 #if(ENABLE_PQ_MLOAD)
779 pthread_mutex_unlock(&_PQ_MLoad_Mutex);
780 #endif
781 #endif
782 }
783
MDrv_PQBin_DumpFilterTable(void * pInstance,MS_PQBin_IP_Table_Info * pTabInfo)784 void MDrv_PQBin_DumpFilterTable(void *pInstance,MS_PQBin_IP_Table_Info *pTabInfo)
785 {
786 MS_PHYADDR u32Addr;
787 #ifdef MSOS_TYPE_LINUX
788 MS_S32 s32PTHChk;
789 s32PTHChk = pthread_mutex_lock(&_stPQFilterTableMutex);
790 if(s32PTHChk != 0)
791 {
792 printf("Func: %s():%d lock mutex error\n", __FUNCTION__, __LINE__);
793 }
794 #endif
795
796 PQ_BIN_DBG(printf("tab: sram\n"));
797
798 if(pTabInfo->u16GroupIdx >= pTabInfo->u16GroupNum)
799 {
800 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]IP_Info error: SRAM Table\n"));
801 #ifdef MSOS_TYPE_LINUX
802 s32PTHChk = pthread_mutex_unlock(&_stPQFilterTableMutex);
803 if(s32PTHChk != 0)
804 {
805 printf("Func: %s():%d unlock mutex error\n", __FUNCTION__, __LINE__);
806 }
807 #endif
808 return;
809 }
810
811 u32Addr = pTabInfo->u32TabOffset + pTabInfo->u16GroupIdx * pTabInfo->u16RegNum;
812
813 switch(pTabInfo->u16TableType)
814 {
815 case PQ_TABTYPE_SRAM1:
816 Hal_PQ_set_y_sram_table(pInstance,SC_FILTER_Y_SRAM1, (void *)u32Addr);
817 break;
818 case PQ_TABTYPE_SRAM2:
819 Hal_PQ_set_y_sram_table(pInstance,SC_FILTER_Y_SRAM2, (void *)u32Addr);
820 break;
821 case PQ_TABTYPE_SRAM3:
822 Hal_PQ_set_y_sram_table(pInstance,SC_FILTER_Y_SRAM3, (void *)u32Addr);
823 break;
824 case PQ_TABTYPE_SRAM4:
825 Hal_PQ_set_y_sram_table(pInstance,SC_FILTER_Y_SRAM4, (void *)u32Addr);
826 break;
827 case PQ_TABTYPE_C_SRAM1:
828 Hal_PQ_set_c_sram_table(pInstance,SC_FILTER_C_SRAM1, (void *)u32Addr);
829 break;
830 case PQ_TABTYPE_C_SRAM2:
831 Hal_PQ_set_c_sram_table(pInstance,SC_FILTER_C_SRAM2, (void *)u32Addr);
832 break;
833 case PQ_TABTYPE_C_SRAM3:
834 Hal_PQ_set_c_sram_table(pInstance,SC_FILTER_C_SRAM3, (void *)u32Addr);
835 break;
836 case PQ_TABTYPE_C_SRAM4:
837 Hal_PQ_set_c_sram_table(pInstance,SC_FILTER_C_SRAM4, (void *)u32Addr);
838 break;
839 case PQ_TABTYPE_SRAM_COLOR_INDEX:
840 Hal_PQ_set_sram_color_index_table(pInstance,SC_FILTER_SRAM_COLOR_INDEX, (void *)u32Addr);
841 break;
842 case PQ_TABTYPE_SRAM_COLOR_GAIN_SNR:
843 Hal_PQ_set_sram_color_gain_snr_table(pInstance,SC_FILTER_SRAM_COLOR_GAIN_SNR, (void *)u32Addr);
844 break;
845 case PQ_TABTYPE_SRAM_COLOR_GAIN_DNR:
846 Hal_PQ_set_sram_color_gain_dnr_table(pInstance,SC_FILTER_SRAM_COLOR_GAIN_DNR, (void *)u32Addr);
847 break;
848 case PQ_TABTYPE_VIP_ICC_CRD_SRAM:
849 Hal_PQ_set_sram_icc_crd_table(pInstance,SC_FILTER_SRAM_ICC_CRD, (void *)u32Addr);
850 break;
851 case PQ_TABTYPE_VIP_IHC_CRD_SRAM:
852 Hal_PQ_set_sram_ihc_crd_table(pInstance,SC_FILTER_SRAM_IHC_CRD, (void *)u32Addr);
853 break;
854 #ifdef MaseratiLinearRGB
855 case PQ_TABTYPE_LinearRGB_DE_GAMMA_SRAM:
856 Hal_PQ_set_sram_xvycc_gamma_table(pInstance,SC_FILTER_SRAM_XVYCC_DE_GAMMA, (void *)u32Addr);
857 break;
858 case PQ_TABTYPE_LinearRGB_GAMMA_SRAM:
859 Hal_PQ_set_sram_xvycc_gamma_table(pInstance,SC_FILTER_SRAM_XVYCC_GAMMA, (void *)u32Addr);
860 break;
861 #else
862 case PQ_TABTYPE_XVYCC_DE_GAMMA_SRAM:
863 Hal_PQ_set_sram_xvycc_gamma_table(pInstance,SC_FILTER_SRAM_XVYCC_DE_GAMMA, (void *)u32Addr);
864 break;
865 case PQ_TABTYPE_XVYCC_GAMMA_SRAM:
866 Hal_PQ_set_sram_xvycc_gamma_table(pInstance,SC_FILTER_SRAM_XVYCC_GAMMA, (void *)u32Addr);
867 break;
868 #endif
869 default:
870 printf("[PQBin] Unknown sram type %u\n", pTabInfo->u16TableType);
871 MS_ASSERT(0);
872 break;
873 }
874
875 #ifdef MSOS_TYPE_LINUX
876 s32PTHChk = pthread_mutex_unlock(&_stPQFilterTableMutex);
877 if(s32PTHChk != 0)
878 {
879 printf("Func: %s():%d unlock mutex error\n", __FUNCTION__, __LINE__);
880 }
881 #endif
882 }
883
884 #ifdef UFO_XC_PIP_PATCH_USING_SC1_MAIN_AS_SC0_SUB
MDrv_PQBin_DumpFilterTable_Main2(void * pInstance,MS_PQBin_IP_Table_Info * pTabInfo)885 void MDrv_PQBin_DumpFilterTable_Main2(void *pInstance,MS_PQBin_IP_Table_Info *pTabInfo)
886 {
887 MS_PHYADDR u32Addr;
888 #ifdef MSOS_TYPE_LINUX
889 MS_S32 s32PTHChk;
890 s32PTHChk = pthread_mutex_lock(&_stPQFilterTableMutex);
891 if(s32PTHChk != 0)
892 {
893 printf("Func: %s():%d lock mutex error\n", __FUNCTION__, __LINE__);
894 }
895 #endif
896
897 PQ_BIN_DBG(printf("tab: sram\n"));
898
899 if(pTabInfo->u16GroupIdx >= pTabInfo->u16GroupNum)
900 {
901 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]IP_Info error: SRAM Table\n"));
902 #ifdef MSOS_TYPE_LINUX
903 s32PTHChk = pthread_mutex_unlock(&_stPQFilterTableMutex);
904 if(s32PTHChk != 0)
905 {
906 printf("Func: %s():%d unlock mutex error\n", __FUNCTION__, __LINE__);
907 }
908 #endif
909 return;
910 }
911
912 u32Addr = pTabInfo->u32TabOffset + pTabInfo->u16GroupIdx * pTabInfo->u16RegNum;
913
914 switch(pTabInfo->u16TableType)
915 {
916 case PQ_TABTYPE_SRAM1:
917 Hal_PQ_set_y_sram_table_Main2(pInstance,SC_FILTER_Y_SRAM1, (void *)u32Addr);
918 break;
919 case PQ_TABTYPE_SRAM2:
920 Hal_PQ_set_y_sram_table_Main2(pInstance,SC_FILTER_Y_SRAM2, (void *)u32Addr);
921 break;
922 case PQ_TABTYPE_SRAM3:
923 Hal_PQ_set_y_sram_table_Main2(pInstance,SC_FILTER_Y_SRAM3, (void *)u32Addr);
924 break;
925 case PQ_TABTYPE_SRAM4:
926 Hal_PQ_set_y_sram_table_Main2(pInstance,SC_FILTER_Y_SRAM4, (void *)u32Addr);
927 break;
928 case PQ_TABTYPE_C_SRAM1:
929 Hal_PQ_set_c_sram_table_Main2(pInstance,SC_FILTER_C_SRAM1, (void *)u32Addr);
930 break;
931 case PQ_TABTYPE_C_SRAM2:
932 Hal_PQ_set_c_sram_table_Main2(pInstance,SC_FILTER_C_SRAM2, (void *)u32Addr);
933 break;
934 case PQ_TABTYPE_C_SRAM3:
935 Hal_PQ_set_c_sram_table_Main2(pInstance,SC_FILTER_C_SRAM3, (void *)u32Addr);
936 break;
937 case PQ_TABTYPE_C_SRAM4:
938 Hal_PQ_set_c_sram_table_Main2(pInstance,SC_FILTER_C_SRAM4, (void *)u32Addr);
939 break;
940 case PQ_TABTYPE_SRAM_COLOR_INDEX:
941 Hal_PQ_set_sram_color_index_table(pInstance,SC_FILTER_SRAM_COLOR_INDEX, (void *)u32Addr);
942 break;
943 case PQ_TABTYPE_SRAM_COLOR_GAIN_SNR:
944 Hal_PQ_set_sram_color_gain_snr_table(pInstance,SC_FILTER_SRAM_COLOR_GAIN_SNR, (void *)u32Addr);
945 break;
946 case PQ_TABTYPE_SRAM_COLOR_GAIN_DNR:
947 Hal_PQ_set_sram_color_gain_dnr_table(pInstance,SC_FILTER_SRAM_COLOR_GAIN_DNR, (void *)u32Addr);
948 break;
949 case PQ_TABTYPE_VIP_ICC_CRD_SRAM:
950 Hal_PQ_set_sram_icc_crd_table(pInstance,SC_FILTER_SRAM_ICC_CRD, (void *)u32Addr);
951 break;
952 case PQ_TABTYPE_VIP_IHC_CRD_SRAM:
953 Hal_PQ_set_sram_ihc_crd_table(pInstance,SC_FILTER_SRAM_IHC_CRD, (void *)u32Addr);
954 break;
955 #ifdef MaseratiLinearRGB
956 case PQ_TABTYPE_LinearRGB_DE_GAMMA_SRAM:
957 Hal_PQ_set_sram_xvycc_gamma_table(pInstance,SC_FILTER_SRAM_XVYCC_DE_GAMMA, (void *)u32Addr);
958 break;
959 case PQ_TABTYPE_LinearRGB_GAMMA_SRAM:
960 Hal_PQ_set_sram_xvycc_gamma_table(pInstance,SC_FILTER_SRAM_XVYCC_GAMMA, (void *)u32Addr);
961 break;
962 #else
963 case PQ_TABTYPE_XVYCC_DE_GAMMA_SRAM:
964 Hal_PQ_set_sram_xvycc_gamma_table(pInstance,SC_FILTER_SRAM_XVYCC_DE_GAMMA, (void *)u32Addr);
965 break;
966 case PQ_TABTYPE_XVYCC_GAMMA_SRAM:
967 Hal_PQ_set_sram_xvycc_gamma_table(pInstance,SC_FILTER_SRAM_XVYCC_GAMMA, (void *)u32Addr);
968 break;
969 #endif
970 default:
971 printf("[PQBin] Unknown sram type %u\n", pTabInfo->u16TableType);
972 MS_ASSERT(0);
973 break;
974 }
975
976 #ifdef MSOS_TYPE_LINUX
977 s32PTHChk = pthread_mutex_unlock(&_stPQFilterTableMutex);
978 if(s32PTHChk != 0)
979 {
980 printf("Func: %s():%d unlock mutex error\n", __FUNCTION__, __LINE__);
981 }
982 #endif
983 }
984 #endif
985
MDrv_PQBin_DumpCloneTable(void * pInstance,MS_PQBin_IP_Table_Info * pTabMainInfo,MS_PQBin_IP_Table_Info * pTabSubInfo)986 void MDrv_PQBin_DumpCloneTable(void *pInstance,MS_PQBin_IP_Table_Info* pTabMainInfo, MS_PQBin_IP_Table_Info* pTabSubInfo)
987 {
988 if ((pTabMainInfo->u16RegNum == 0) || (pTabMainInfo->u32TabOffset == PQ_BIN_ADDR_NULL))
989 {
990 PQ_BIN_DUMP_CLONE_DBG(printf("NULL Table\n"));
991 return;
992 }
993
994 if ((pTabSubInfo->u16RegNum == 0) || (pTabSubInfo->u32TabOffset == PQ_BIN_ADDR_NULL))
995 {
996 PQ_BIN_DUMP_CLONE_DBG(printf("NULL Table\n"));
997 return;
998 }
999
1000 switch(pTabMainInfo->u16TableType)
1001 {
1002 case PQ_TABTYPE_SCALER:
1003 MDrv_PQBin_DumpCloneScalerRegTable(pInstance,pTabMainInfo, pTabSubInfo);
1004 break;
1005
1006 default:
1007 PQ_BIN_DUMP_CLONE_DBG(printf("[PQBin]DumpCloneTable:unknown type: %u\n", pTabMainInfo->u16TableType));
1008 break;
1009 }
1010 }
1011 #if (defined (UFO_XC_DS_PQ))
MDrv_PQBin_DS_DumpTable(void * pInstance,MS_PQBin_IP_Table_Info * pTabInfo)1012 void MDrv_PQBin_DS_DumpTable(void *pInstance,MS_PQBin_IP_Table_Info* pTabInfo)
1013 {
1014 if ((pTabInfo->u16RegNum == 0) || (pTabInfo->u32TabOffset == PQ_BIN_ADDR_NULL))
1015 {
1016 PQ_BIN_DUMP_DBG(printf("NULL Table\n"));
1017 return;
1018 }
1019 if(pTabInfo->u16TableType == PQ_TABTYPE_SCALER)
1020 MDrv_PQBin_DumpScalerRegTable_v2(pInstance,pTabInfo);
1021 else if(pTabInfo->u16TableType == PQ_TABTYPE_UFSC_SCALER)
1022 MDrv_PQBin_DumpUFSCScalerRegTable_v2(pInstance,pTabInfo);
1023 return;
1024 }
1025 #endif
MDrv_PQBin_DumpTable(void * pInstance,MS_PQBin_IP_Table_Info * pTabInfo)1026 void MDrv_PQBin_DumpTable(void *pInstance,MS_PQBin_IP_Table_Info* pTabInfo)
1027 {
1028 if ((pTabInfo->u16RegNum == 0) || (pTabInfo->u32TabOffset == PQ_BIN_ADDR_NULL))
1029 {
1030 PQ_BIN_DUMP_DBG(printf("NULL Table\n"));
1031 return;
1032 }
1033 switch(pTabInfo->u16TableType)
1034 {
1035 case PQ_TABTYPE_SCALER:
1036 MDrv_PQBin_DumpScalerRegTable(pInstance,pTabInfo);
1037 break;
1038 case PQ_TABTYPE_COMB:
1039 MDrv_PQBin_DumpCombRegTable(pInstance,pTabInfo);
1040 break;
1041 case PQ_TABTYPE_GENERAL:
1042 MDrv_PQBin_DumpGeneralRegTable(pInstance,pTabInfo);
1043 break;
1044 case PQ_TABTYPE_SRAM1:
1045 if (_u16SRAM1Table != pTabInfo->u16GroupIdx)
1046 {
1047 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]old sram1: %u, new sram1: %u\n",
1048 _u16SRAM1Table, pTabInfo->u16GroupIdx));
1049
1050 _u16SRAM1Table = pTabInfo->u16GroupIdx;
1051 MDrv_PQBin_DumpFilterTable(pInstance,pTabInfo);
1052 }
1053 else
1054 {
1055 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]use the same sram1: %u\n", pTabInfo->u16GroupIdx));
1056 }
1057 break;
1058 case PQ_TABTYPE_SRAM2:
1059 if (_u16SRAM2Table != pTabInfo->u16GroupIdx)
1060 {
1061 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]old sram2: %u, new sram2: %u\n",
1062 _u16SRAM2Table, pTabInfo->u16GroupIdx));
1063
1064 _u16SRAM2Table = pTabInfo->u16GroupIdx;
1065 MDrv_PQBin_DumpFilterTable(pInstance,pTabInfo);
1066 }
1067 else
1068 {
1069 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]use the same sram2: %u\n", pTabInfo->u16GroupIdx));
1070 }
1071 break;
1072 case PQ_TABTYPE_SRAM3:
1073 if (_u16SRAM3Table != pTabInfo->u16GroupIdx)
1074 {
1075 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]old sram3: %u, new sram3: %u\n",
1076 _u16SRAM3Table, pTabInfo->u16GroupIdx));
1077
1078 _u16SRAM3Table = pTabInfo->u16GroupIdx;
1079 MDrv_PQBin_DumpFilterTable(pInstance,pTabInfo);
1080 }
1081 else
1082 {
1083 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]use the same sram3: %u\n", pTabInfo->u16GroupIdx));
1084 }
1085 break;
1086 case PQ_TABTYPE_SRAM4:
1087 if (_u16SRAM4Table != pTabInfo->u16GroupIdx)
1088 {
1089 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]old sram4: %u, new sram4: %u\n",
1090 _u16SRAM4Table, pTabInfo->u16GroupIdx));
1091
1092 _u16SRAM4Table = pTabInfo->u16GroupIdx;
1093 MDrv_PQBin_DumpFilterTable(pInstance,pTabInfo);
1094 }
1095 else
1096 {
1097 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]use the same sram4: %u\n", pTabInfo->u16GroupIdx));
1098 }
1099 break;
1100
1101 case PQ_TABTYPE_C_SRAM1:
1102 if (_u16CSRAM1Table != pTabInfo->u16GroupIdx)
1103 {
1104 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]old sram1: %u, new Csram1: %u\n",
1105 _u16CSRAM1Table, pTabInfo->u16GroupIdx));
1106
1107 _u16CSRAM1Table = pTabInfo->u16GroupIdx;
1108 MDrv_PQBin_DumpFilterTable(pInstance,pTabInfo);
1109 }
1110 else
1111 {
1112 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]use the same Csram1: %u\n", pTabInfo->u16GroupIdx));
1113 }
1114 break;
1115 case PQ_TABTYPE_C_SRAM2:
1116 if (_u16CSRAM2Table != pTabInfo->u16GroupIdx)
1117 {
1118 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]old Csram2: %u, new Csram2: %u\n",
1119 _u16CSRAM2Table, pTabInfo->u16GroupIdx));
1120
1121 _u16CSRAM2Table = pTabInfo->u16GroupIdx;
1122 MDrv_PQBin_DumpFilterTable(pInstance,pTabInfo);
1123 }
1124 else
1125 {
1126 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]use the same Csram2: %u\n", pTabInfo->u16GroupIdx));
1127 }
1128 break;
1129 case PQ_TABTYPE_C_SRAM3:
1130 if (_u16CSRAM3Table != pTabInfo->u16GroupIdx)
1131 {
1132 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]old Csram3: %u, new Csram3: %u\n",
1133 _u16CSRAM3Table, pTabInfo->u16GroupIdx));
1134
1135 _u16CSRAM3Table = pTabInfo->u16GroupIdx;
1136 MDrv_PQBin_DumpFilterTable(pInstance,pTabInfo);
1137 }
1138 else
1139 {
1140 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]use the same Csram3: %u\n", pTabInfo->u16GroupIdx));
1141 }
1142 break;
1143 case PQ_TABTYPE_C_SRAM4:
1144 if (_u16CSRAM4Table != pTabInfo->u16GroupIdx)
1145 {
1146 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]old sram4: %u, new Csram4: %u\n",
1147 _u16CSRAM2Table, pTabInfo->u16GroupIdx));
1148
1149 _u16CSRAM4Table = pTabInfo->u16GroupIdx;
1150 MDrv_PQBin_DumpFilterTable(pInstance,pTabInfo);
1151 }
1152 else
1153 {
1154 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]use the same Csram4: %u\n", pTabInfo->u16GroupIdx));
1155 }
1156 break;
1157
1158 case PQ_TABTYPE_VIP_ICC_CRD_SRAM:
1159 if(_u16ICC_CRD_Table != pTabInfo->u16GroupIdx)
1160 {
1161 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]old ICC_CRD_SRAM: %u, new ICC_CRD_SRAM: %u\n",
1162 _u16ICC_CRD_Table, pTabInfo->u16GroupIdx));
1163
1164 _u16ICC_CRD_Table = pTabInfo->u16GroupIdx;
1165 MDrv_PQBin_DumpFilterTable(pInstance,pTabInfo);
1166 }
1167 break;
1168
1169 case PQ_TABTYPE_VIP_IHC_CRD_SRAM:
1170 if(_u16IHC_CRD_Table != pTabInfo->u16GroupIdx)
1171 {
1172 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]old IHC_CRD_SRAM: %u, new IHC_CRD_SRAM: %u\n",
1173 _u16IHC_CRD_Table, pTabInfo->u16GroupIdx));
1174
1175 _u16IHC_CRD_Table = pTabInfo->u16GroupIdx;
1176 MDrv_PQBin_DumpFilterTable(pInstance,pTabInfo);
1177 }
1178 break;
1179 #ifdef MaseratiLinearRGB
1180 case PQ_TABTYPE_LinearRGB_DE_GAMMA_SRAM:
1181 if (_u16XVYCC_DE_GAMMA_SRAM_Table != pTabInfo->u16GroupIdx)
1182 {
1183 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin] xvYcc DE Gamma SRAM: %u, new xvYcc DE Gamma SRAM: %u\n",
1184 _u16XVYCC_DE_GAMMA_SRAM_Table, pTabInfo->u16GroupIdx));
1185
1186 _u16XVYCC_DE_GAMMA_SRAM_Table = pTabInfo->u16GroupIdx;
1187 MDrv_PQBin_DumpFilterTable(pInstance,pTabInfo);
1188 }
1189 else
1190 {
1191 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]use the same xvYcc DE Gamma SRAM: %u\n", pTabInfo->u16GroupIdx));
1192 }
1193 break;
1194 case PQ_TABTYPE_LinearRGB_GAMMA_SRAM:
1195 if (_u16XVYCC_GAMMA_SRAM_Table != pTabInfo->u16GroupIdx)
1196 {
1197 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]xvYcc Gamma SRAM: %u, new xvYcc Gamma SRAM: %u\n",
1198 _u16XVYCC_GAMMA_SRAM_Table, pTabInfo->u16GroupIdx));
1199
1200 _u16XVYCC_GAMMA_SRAM_Table = pTabInfo->u16GroupIdx;
1201 MDrv_PQBin_DumpFilterTable(pInstance,pTabInfo);
1202 }
1203 else
1204 {
1205 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]use the same xvYcc Gamma SRAM: %u\n", pTabInfo->u16GroupIdx));
1206 }
1207 break;
1208
1209 #else
1210 case PQ_TABTYPE_XVYCC_DE_GAMMA_SRAM:
1211 if (_u16XVYCC_DE_GAMMA_SRAM_Table != pTabInfo->u16GroupIdx)
1212 {
1213 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin] xvYcc DE Gamma SRAM: %u, new xvYcc DE Gamma SRAM: %u\n",
1214 _u16XVYCC_DE_GAMMA_SRAM_Table, pTabInfo->u16GroupIdx));
1215
1216 _u16XVYCC_DE_GAMMA_SRAM_Table = pTabInfo->u16GroupIdx;
1217 MDrv_PQBin_DumpFilterTable(pInstance,pTabInfo);
1218 }
1219 else
1220 {
1221 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]use the same xvYcc DE Gamma SRAM: %u\n", pTabInfo->u16GroupIdx));
1222 }
1223 break;
1224 case PQ_TABTYPE_XVYCC_GAMMA_SRAM:
1225 if (_u16XVYCC_GAMMA_SRAM_Table != pTabInfo->u16GroupIdx)
1226 {
1227 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]xvYcc Gamma SRAM: %u, new xvYcc Gamma SRAM: %u\n",
1228 _u16XVYCC_GAMMA_SRAM_Table, pTabInfo->u16GroupIdx));
1229
1230 _u16XVYCC_GAMMA_SRAM_Table = pTabInfo->u16GroupIdx;
1231 MDrv_PQBin_DumpFilterTable(pInstance,pTabInfo);
1232 }
1233 else
1234 {
1235 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]use the same xvYcc Gamma SRAM: %u\n", pTabInfo->u16GroupIdx));
1236 }
1237 break;
1238 #endif
1239 //---------------------------------------------------------------------------------------------------------------
1240 #if defined(ENABLE_PQ_BIN_UFSC) && ENABLE_PQ_BIN_UFSC
1241 case PQ_TABTYPE_UFSC_SCALER:
1242 MDrv_PQBin_DumpUFSCScalerRegTable(pInstance, pTabInfo);
1243 break;
1244 #if 0
1245 //case PQ_TABTYPE_UFSC_COMB:
1246 // MDrv_PQBin_DumpUFSCCombRegTable(pTabInfo);
1247 // break;
1248 case PQ_TABTYPE_UFSC_GENERAL:
1249 MDrv_PQBin_DumpUFSCGeneralRegTable(pTabInfo);
1250 break;
1251 #endif
1252
1253 case PQ_TABTYPE_UFSC_SRAM1:
1254 if (_u16UFSCSRAM1Table != pTabInfo->u16GroupIdx)
1255 {
1256 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] old sram1: %u, new sram1: %u\n",
1257 _u16UFSCSRAM1Table, pTabInfo->u16GroupIdx));
1258
1259 _u16UFSCSRAM1Table = pTabInfo->u16GroupIdx;
1260 MDrv_PQBin_DumpUFSCFilterTable(pInstance, pTabInfo);
1261 }
1262 else
1263 {
1264 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] use the same sram1: %u\n", pTabInfo->u16GroupIdx));
1265 }
1266 break;
1267 case PQ_TABTYPE_UFSC_SRAM2:
1268 if (_u16UFSCSRAM2Table != pTabInfo->u16GroupIdx)
1269 {
1270 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] old sram2: %u, new sram2: %u\n",
1271 _u16UFSCSRAM2Table, pTabInfo->u16GroupIdx));
1272
1273 _u16UFSCSRAM2Table = pTabInfo->u16GroupIdx;
1274 MDrv_PQBin_DumpUFSCFilterTable(pInstance, pTabInfo);
1275 }
1276 else
1277 {
1278 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] use the same sram2: %u\n", pTabInfo->u16GroupIdx));
1279 }
1280 break;
1281 case PQ_TABTYPE_UFSC_SRAM3:
1282 if (_u16UFSCSRAM3Table != pTabInfo->u16GroupIdx)
1283 {
1284 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin[UFSC] ]old sram3: %u, new sram3: %u\n",
1285 _u16UFSCSRAM3Table, pTabInfo->u16GroupIdx));
1286
1287 _u16UFSCSRAM3Table = pTabInfo->u16GroupIdx;
1288 MDrv_PQBin_DumpUFSCFilterTable(pInstance, pTabInfo);
1289 }
1290 else
1291 {
1292 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] use the same sram3: %u\n", pTabInfo->u16GroupIdx));
1293 }
1294 break;
1295 case PQ_TABTYPE_UFSC_SRAM4:
1296 if (_u16UFSCSRAM4Table != pTabInfo->u16GroupIdx)
1297 {
1298 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] old sram4: %u, new sram4: %u\n",
1299 _u16UFSCSRAM4Table, pTabInfo->u16GroupIdx));
1300
1301 _u16UFSCSRAM4Table = pTabInfo->u16GroupIdx;
1302 MDrv_PQBin_DumpUFSCFilterTable(pInstance, pTabInfo);
1303 }
1304 else
1305 {
1306 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] use the same sram4: %u\n", pTabInfo->u16GroupIdx));
1307 }
1308 break;
1309
1310 case PQ_TABTYPE_UFSC_C_SRAM1:
1311 if (_u16UFSCCSRAM1Table != pTabInfo->u16GroupIdx)
1312 {
1313 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] old sram1: %u, new Csram1: %u\n",
1314 _u16UFSCCSRAM1Table, pTabInfo->u16GroupIdx));
1315
1316 _u16UFSCCSRAM1Table = pTabInfo->u16GroupIdx;
1317 MDrv_PQBin_DumpUFSCFilterTable(pInstance, pTabInfo);
1318 }
1319 else
1320 {
1321 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] use the same Csram1: %u\n", pTabInfo->u16GroupIdx));
1322 }
1323 break;
1324 case PQ_TABTYPE_UFSC_C_SRAM2:
1325 if (_u16UFSCCSRAM2Table != pTabInfo->u16GroupIdx)
1326 {
1327 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] old Csram2: %u, new Csram2: %u\n",
1328 _u16UFSCCSRAM2Table, pTabInfo->u16GroupIdx));
1329
1330 _u16UFSCCSRAM2Table = pTabInfo->u16GroupIdx;
1331 MDrv_PQBin_DumpUFSCFilterTable(pInstance, pTabInfo);
1332 }
1333 else
1334 {
1335 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] use the same Csram2: %u\n", pTabInfo->u16GroupIdx));
1336 }
1337 break;
1338 case PQ_TABTYPE_UFSC_C_SRAM3:
1339 if (_u16UFSCCSRAM3Table != pTabInfo->u16GroupIdx)
1340 {
1341 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] old Csram3: %u, new Csram3: %u\n",
1342 _u16UFSCCSRAM3Table, pTabInfo->u16GroupIdx));
1343
1344 _u16UFSCCSRAM3Table = pTabInfo->u16GroupIdx;
1345 MDrv_PQBin_DumpUFSCFilterTable(pInstance, pTabInfo);
1346 }
1347 else
1348 {
1349 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] use the same Csram3: %u\n", pTabInfo->u16GroupIdx));
1350 }
1351 break;
1352 case PQ_TABTYPE_UFSC_C_SRAM4:
1353 if (_u16UFSCCSRAM4Table != pTabInfo->u16GroupIdx)
1354 {
1355 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] old sram4: %u, new Csram4: %u\n",
1356 _u16UFSCCSRAM2Table, pTabInfo->u16GroupIdx));
1357
1358 _u16UFSCCSRAM4Table = pTabInfo->u16GroupIdx;
1359 MDrv_PQBin_DumpUFSCFilterTable(pInstance, pTabInfo);
1360 }
1361 else
1362 {
1363 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] use the same Csram4: %u\n", pTabInfo->u16GroupIdx));
1364 }
1365 break;
1366
1367 case PQ_TABTYPE_UFSC_VIP_ICC_CRD_SRAM:
1368 if(_u16UFSCICC_CRD_Table != pTabInfo->u16GroupIdx)
1369 {
1370 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] old ICC_CRD_SRAM: %u, new ICC_CRD_SRAM: %u\n",
1371 _u16UFSCICC_CRD_Table, pTabInfo->u16GroupIdx));
1372
1373 _u16UFSCICC_CRD_Table = pTabInfo->u16GroupIdx;
1374 MDrv_PQBin_DumpUFSCFilterTable(pInstance, pTabInfo);
1375 }
1376 break;
1377
1378 case PQ_TABTYPE_UFSC_VIP_IHC_CRD_SRAM:
1379 if(_u16UFSCIHC_CRD_Table != pTabInfo->u16GroupIdx)
1380 {
1381 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] old IHC_CRD_SRAM: %u, new IHC_CRD_SRAM: %u\n",
1382 _u16UFSCIHC_CRD_Table, pTabInfo->u16GroupIdx));
1383
1384 _u16UFSCIHC_CRD_Table = pTabInfo->u16GroupIdx;
1385 MDrv_PQBin_DumpUFSCFilterTable(pInstance, pTabInfo);
1386 }
1387 break;
1388
1389 #if 0
1390 case PQ_TABTYPE_UFSC_XVYCC_DE_GAMMA_SRAM:
1391 if (_u16UFSCXVYCC_DE_GAMMA_SRAM_Table != pTabInfo->u16GroupIdx)
1392 {
1393 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] xvYcc DE Gamma SRAM: %u, new xvYcc DE Gamma SRAM: %u\n",
1394 _u16UFSCXVYCC_DE_GAMMA_SRAM_Table, pTabInfo->u16GroupIdx));
1395
1396 _u16UFSCXVYCC_DE_GAMMA_SRAM_Table = pTabInfo->u16GroupIdx;
1397 MDrv_PQBin_DumpUFSCFilterTable(pInstance,pTabInfo);
1398 }
1399 else
1400 {
1401 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] use the same xvYcc DE Gamma SRAM: %u\n", pTabInfo->u16GroupIdx));
1402 }
1403 break;
1404 case PQ_TABTYPE_UFSC_XVYCC_GAMMA_SRAM:
1405 if (_u16UFSCXVYCC_GAMMA_SRAM_Table != pTabInfo->u16GroupIdx)
1406 {
1407 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] xvYcc Gamma SRAM: %u, new xvYcc Gamma SRAM: %u\n",
1408 _u16UFSCXVYCC_GAMMA_SRAM_Table, pTabInfo->u16GroupIdx));
1409
1410 _u16UFSCXVYCC_GAMMA_SRAM_Table = pTabInfo->u16GroupIdx;
1411 MDrv_PQBin_DumpUFSCFilterTable(pInstance,pTabInfo);
1412 }
1413 else
1414 {
1415 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] use the same xvYcc Gamma SRAM: %u\n", pTabInfo->u16GroupIdx));
1416 }
1417 break;
1418 case PQ_TABTYPE_UFSC_100SERIES:
1419 MDrv_PQBin_DumpUFSC100RegTable(pTabInfo);
1420 break;
1421 #endif
1422 #endif
1423 default:
1424 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]DumpTable:unknown type: %u\n", pTabInfo->u16TableType));
1425 break;
1426 }
1427 }
1428
1429 #ifdef UFO_XC_PIP_PATCH_USING_SC1_MAIN_AS_SC0_SUB
MDrv_PQBin_DumpTable_Main2(void * pInstance,MS_PQBin_IP_Table_Info * pTabInfo)1430 void MDrv_PQBin_DumpTable_Main2(void *pInstance,MS_PQBin_IP_Table_Info* pTabInfo)
1431 {
1432 if ((pTabInfo->u16RegNum == 0) || (pTabInfo->u32TabOffset == PQ_BIN_ADDR_NULL))
1433 {
1434 PQ_BIN_DUMP_DBG(printf("NULL Table\n"));
1435 return;
1436 }
1437
1438 switch(pTabInfo->u16TableType)
1439 {
1440 case PQ_TABTYPE_SCALER:
1441 MDrv_PQBin_DumpScalerRegTable(pInstance,pTabInfo);
1442 break;
1443 case PQ_TABTYPE_COMB:
1444 MDrv_PQBin_DumpCombRegTable(pInstance,pTabInfo);
1445 break;
1446 case PQ_TABTYPE_GENERAL:
1447 MDrv_PQBin_DumpGeneralRegTable(pInstance,pTabInfo);
1448 break;
1449 case PQ_TABTYPE_SRAM1:
1450 if (_u16SRAM1Table_main2 != pTabInfo->u16GroupIdx)
1451 {
1452 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]old sram1: %u, new sram1: %u\n",
1453 _u16SRAM1Table_main2, pTabInfo->u16GroupIdx));
1454
1455 _u16SRAM1Table_main2 = pTabInfo->u16GroupIdx;
1456 MDrv_PQBin_DumpFilterTable_Main2(pInstance,pTabInfo);
1457 }
1458 else
1459 {
1460 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]use the same sram1: %u\n", pTabInfo->u16GroupIdx));
1461 }
1462 break;
1463 case PQ_TABTYPE_SRAM2:
1464 if (_u16SRAM2Table_main2 != pTabInfo->u16GroupIdx)
1465 {
1466 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]old sram2: %u, new sram2: %u\n",
1467 _u16SRAM2Table_main2, pTabInfo->u16GroupIdx));
1468
1469 _u16SRAM2Table_main2 = pTabInfo->u16GroupIdx;
1470 MDrv_PQBin_DumpFilterTable_Main2(pInstance,pTabInfo);
1471 }
1472 else
1473 {
1474 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]use the same sram2: %u\n", pTabInfo->u16GroupIdx));
1475 }
1476 break;
1477 case PQ_TABTYPE_SRAM3:
1478 if (_u16SRAM3Table_main2 != pTabInfo->u16GroupIdx)
1479 {
1480 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]old sram3: %u, new sram3: %u\n",
1481 _u16SRAM3Table_main2, pTabInfo->u16GroupIdx));
1482
1483 _u16SRAM3Table_main2 = pTabInfo->u16GroupIdx;
1484 MDrv_PQBin_DumpFilterTable_Main2(pInstance,pTabInfo);
1485 }
1486 else
1487 {
1488 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]use the same sram3: %u\n", pTabInfo->u16GroupIdx));
1489 }
1490 break;
1491 case PQ_TABTYPE_SRAM4:
1492 if (_u16SRAM4Table_main2 != pTabInfo->u16GroupIdx)
1493 {
1494 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]old sram4: %u, new sram4: %u\n",
1495 _u16SRAM4Table_main2, pTabInfo->u16GroupIdx));
1496
1497 _u16SRAM4Table_main2 = pTabInfo->u16GroupIdx;
1498 MDrv_PQBin_DumpFilterTable_Main2(pInstance,pTabInfo);
1499 }
1500 else
1501 {
1502 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]use the same sram4: %u\n", pTabInfo->u16GroupIdx));
1503 }
1504 break;
1505
1506 case PQ_TABTYPE_C_SRAM1:
1507 if (_u16CSRAM1Table_main2 != pTabInfo->u16GroupIdx)
1508 {
1509 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]old sram1: %u, new Csram1: %u\n",
1510 _u16CSRAM1Table_main2, pTabInfo->u16GroupIdx));
1511
1512 _u16CSRAM1Table_main2 = pTabInfo->u16GroupIdx;
1513 MDrv_PQBin_DumpFilterTable_Main2(pInstance,pTabInfo);
1514 }
1515 else
1516 {
1517 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]use the same Csram1: %u\n", pTabInfo->u16GroupIdx));
1518 }
1519 break;
1520 case PQ_TABTYPE_C_SRAM2:
1521 if (_u16CSRAM2Table_main2 != pTabInfo->u16GroupIdx)
1522 {
1523 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]old Csram2: %u, new Csram2: %u\n",
1524 _u16CSRAM2Table_main2, pTabInfo->u16GroupIdx));
1525
1526 _u16CSRAM2Table_main2 = pTabInfo->u16GroupIdx;
1527 MDrv_PQBin_DumpFilterTable_Main2(pInstance,pTabInfo);
1528 }
1529 else
1530 {
1531 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]use the same Csram2: %u\n", pTabInfo->u16GroupIdx));
1532 }
1533 break;
1534 case PQ_TABTYPE_C_SRAM3:
1535 if (_u16CSRAM3Table_main2 != pTabInfo->u16GroupIdx)
1536 {
1537 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]old Csram3: %u, new Csram3: %u\n",
1538 _u16CSRAM3Table_main2, pTabInfo->u16GroupIdx));
1539
1540 _u16CSRAM3Table_main2 = pTabInfo->u16GroupIdx;
1541 MDrv_PQBin_DumpFilterTable_Main2(pInstance,pTabInfo);
1542 }
1543 else
1544 {
1545 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]use the same Csram3: %u\n", pTabInfo->u16GroupIdx));
1546 }
1547 break;
1548 case PQ_TABTYPE_C_SRAM4:
1549 if (_u16CSRAM4Table_main2 != pTabInfo->u16GroupIdx)
1550 {
1551 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]old sram4: %u, new Csram4: %u\n",
1552 _u16CSRAM2Table_main2, pTabInfo->u16GroupIdx));
1553
1554 _u16CSRAM4Table_main2 = pTabInfo->u16GroupIdx;
1555 MDrv_PQBin_DumpFilterTable_Main2(pInstance,pTabInfo);
1556 }
1557 else
1558 {
1559 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]use the same Csram4: %u\n", pTabInfo->u16GroupIdx));
1560 }
1561 break;
1562
1563 case PQ_TABTYPE_VIP_ICC_CRD_SRAM:
1564 if(_u16ICC_CRD_Table_main2 != pTabInfo->u16GroupIdx)
1565 {
1566 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]old ICC_CRD_SRAM: %u, new ICC_CRD_SRAM: %u\n",
1567 _u16ICC_CRD_Table_main2, pTabInfo->u16GroupIdx));
1568
1569 _u16ICC_CRD_Table_main2 = pTabInfo->u16GroupIdx;
1570 MDrv_PQBin_DumpFilterTable(pInstance,pTabInfo);
1571 }
1572 break;
1573
1574 case PQ_TABTYPE_VIP_IHC_CRD_SRAM:
1575 if(_u16IHC_CRD_Table_main2 != pTabInfo->u16GroupIdx)
1576 {
1577 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]old IHC_CRD_SRAM: %u, new IHC_CRD_SRAM: %u\n",
1578 _u16IHC_CRD_Table_main2, pTabInfo->u16GroupIdx));
1579
1580 _u16IHC_CRD_Table_main2 = pTabInfo->u16GroupIdx;
1581 MDrv_PQBin_DumpFilterTable(pInstance,pTabInfo);
1582 }
1583 break;
1584 #ifdef MaseratiLinearRGB
1585 case PQ_TABTYPE_LinearRGB_DE_GAMMA_SRAM:
1586 if (_u16XVYCC_DE_GAMMA_SRAM_Table_main2 != pTabInfo->u16GroupIdx)
1587 {
1588 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin] xvYcc DE Gamma SRAM: %u, new xvYcc DE Gamma SRAM: %u\n",
1589 _u16XVYCC_DE_GAMMA_SRAM_Table_main2, pTabInfo->u16GroupIdx));
1590
1591 _u16XVYCC_DE_GAMMA_SRAM_Table_main2 = pTabInfo->u16GroupIdx;
1592 MDrv_PQBin_DumpFilterTable(pInstance,pTabInfo);
1593 }
1594 else
1595 {
1596 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]use the same xvYcc DE Gamma SRAM: %u\n", pTabInfo->u16GroupIdx));
1597 }
1598 break;
1599 case PQ_TABTYPE_LinearRGB_GAMMA_SRAM:
1600 if (_u16XVYCC_GAMMA_SRAM_Table_main2 != pTabInfo->u16GroupIdx)
1601 {
1602 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]xvYcc Gamma SRAM: %u, new xvYcc Gamma SRAM: %u\n",
1603 _u16XVYCC_GAMMA_SRAM_Table_main2, pTabInfo->u16GroupIdx));
1604
1605 _u16XVYCC_GAMMA_SRAM_Table_main2 = pTabInfo->u16GroupIdx;
1606 MDrv_PQBin_DumpFilterTable(pInstance,pTabInfo);
1607 }
1608 else
1609 {
1610 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]use the same xvYcc Gamma SRAM: %u\n", pTabInfo->u16GroupIdx));
1611 }
1612 break;
1613
1614 #else
1615 case PQ_TABTYPE_XVYCC_DE_GAMMA_SRAM:
1616 if (_u16XVYCC_DE_GAMMA_SRAM_Table_main2 != pTabInfo->u16GroupIdx)
1617 {
1618 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin] xvYcc DE Gamma SRAM: %u, new xvYcc DE Gamma SRAM: %u\n",
1619 _u16XVYCC_DE_GAMMA_SRAM_Table_main2, pTabInfo->u16GroupIdx));
1620
1621 _u16XVYCC_DE_GAMMA_SRAM_Table_main2 = pTabInfo->u16GroupIdx;
1622 MDrv_PQBin_DumpFilterTable(pInstance,pTabInfo);
1623 }
1624 else
1625 {
1626 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]use the same xvYcc DE Gamma SRAM: %u\n", pTabInfo->u16GroupIdx));
1627 }
1628 break;
1629 case PQ_TABTYPE_XVYCC_GAMMA_SRAM:
1630 if (_u16XVYCC_GAMMA_SRAM_Table_main2 != pTabInfo->u16GroupIdx)
1631 {
1632 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]xvYcc Gamma SRAM: %u, new xvYcc Gamma SRAM: %u\n",
1633 _u16XVYCC_GAMMA_SRAM_Table_main2, pTabInfo->u16GroupIdx));
1634
1635 _u16XVYCC_GAMMA_SRAM_Table_main2 = pTabInfo->u16GroupIdx;
1636 MDrv_PQBin_DumpFilterTable(pInstance,pTabInfo);
1637 }
1638 else
1639 {
1640 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]use the same xvYcc Gamma SRAM: %u\n", pTabInfo->u16GroupIdx));
1641 }
1642 break;
1643 #endif
1644 //---------------------------------------------------------------------------------------------------------------
1645 #if defined(ENABLE_PQ_BIN_UFSC) && ENABLE_PQ_BIN_UFSC
1646 case PQ_TABTYPE_UFSC_SCALER:
1647 MDrv_PQBin_DumpUFSCScalerRegTable(pInstance, pTabInfo);
1648 break;
1649 #if 0
1650 //case PQ_TABTYPE_UFSC_COMB:
1651 // MDrv_PQBin_DumpUFSCCombRegTable(pTabInfo);
1652 // break;
1653 case PQ_TABTYPE_UFSC_GENERAL:
1654 MDrv_PQBin_DumpUFSCGeneralRegTable(pTabInfo);
1655 break;
1656 #endif
1657
1658 case PQ_TABTYPE_UFSC_SRAM1:
1659 if (_u16UFSCSRAM1Table != pTabInfo->u16GroupIdx)
1660 {
1661 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] old sram1: %u, new sram1: %u\n",
1662 _u16UFSCSRAM1Table, pTabInfo->u16GroupIdx));
1663
1664 _u16UFSCSRAM1Table = pTabInfo->u16GroupIdx;
1665 MDrv_PQBin_DumpUFSCFilterTable(pInstance, pTabInfo);
1666 }
1667 else
1668 {
1669 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] use the same sram1: %u\n", pTabInfo->u16GroupIdx));
1670 }
1671 break;
1672 case PQ_TABTYPE_UFSC_SRAM2:
1673 if (_u16UFSCSRAM2Table != pTabInfo->u16GroupIdx)
1674 {
1675 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] old sram2: %u, new sram2: %u\n",
1676 _u16UFSCSRAM2Table, pTabInfo->u16GroupIdx));
1677
1678 _u16UFSCSRAM2Table = pTabInfo->u16GroupIdx;
1679 MDrv_PQBin_DumpUFSCFilterTable(pInstance, pTabInfo);
1680 }
1681 else
1682 {
1683 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] use the same sram2: %u\n", pTabInfo->u16GroupIdx));
1684 }
1685 break;
1686 case PQ_TABTYPE_UFSC_SRAM3:
1687 if (_u16UFSCSRAM3Table != pTabInfo->u16GroupIdx)
1688 {
1689 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin[UFSC] ]old sram3: %u, new sram3: %u\n",
1690 _u16UFSCSRAM3Table, pTabInfo->u16GroupIdx));
1691
1692 _u16UFSCSRAM3Table = pTabInfo->u16GroupIdx;
1693 MDrv_PQBin_DumpUFSCFilterTable(pInstance, pTabInfo);
1694 }
1695 else
1696 {
1697 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] use the same sram3: %u\n", pTabInfo->u16GroupIdx));
1698 }
1699 break;
1700 case PQ_TABTYPE_UFSC_SRAM4:
1701 if (_u16UFSCSRAM4Table != pTabInfo->u16GroupIdx)
1702 {
1703 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] old sram4: %u, new sram4: %u\n",
1704 _u16UFSCSRAM4Table, pTabInfo->u16GroupIdx));
1705
1706 _u16UFSCSRAM4Table = pTabInfo->u16GroupIdx;
1707 MDrv_PQBin_DumpUFSCFilterTable(pInstance, pTabInfo);
1708 }
1709 else
1710 {
1711 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] use the same sram4: %u\n", pTabInfo->u16GroupIdx));
1712 }
1713 break;
1714
1715 case PQ_TABTYPE_UFSC_C_SRAM1:
1716 if (_u16UFSCCSRAM1Table != pTabInfo->u16GroupIdx)
1717 {
1718 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] old sram1: %u, new Csram1: %u\n",
1719 _u16UFSCCSRAM1Table, pTabInfo->u16GroupIdx));
1720
1721 _u16UFSCCSRAM1Table = pTabInfo->u16GroupIdx;
1722 MDrv_PQBin_DumpUFSCFilterTable(pInstance, pTabInfo);
1723 }
1724 else
1725 {
1726 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] use the same Csram1: %u\n", pTabInfo->u16GroupIdx));
1727 }
1728 break;
1729 case PQ_TABTYPE_UFSC_C_SRAM2:
1730 if (_u16UFSCCSRAM2Table != pTabInfo->u16GroupIdx)
1731 {
1732 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] old Csram2: %u, new Csram2: %u\n",
1733 _u16UFSCCSRAM2Table, pTabInfo->u16GroupIdx));
1734
1735 _u16UFSCCSRAM2Table = pTabInfo->u16GroupIdx;
1736 MDrv_PQBin_DumpUFSCFilterTable(pInstance, pTabInfo);
1737 }
1738 else
1739 {
1740 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] use the same Csram2: %u\n", pTabInfo->u16GroupIdx));
1741 }
1742 break;
1743 case PQ_TABTYPE_UFSC_C_SRAM3:
1744 if (_u16UFSCCSRAM3Table != pTabInfo->u16GroupIdx)
1745 {
1746 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] old Csram3: %u, new Csram3: %u\n",
1747 _u16UFSCCSRAM3Table, pTabInfo->u16GroupIdx));
1748
1749 _u16UFSCCSRAM3Table = pTabInfo->u16GroupIdx;
1750 MDrv_PQBin_DumpUFSCFilterTable(pInstance, pTabInfo);
1751 }
1752 else
1753 {
1754 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] use the same Csram3: %u\n", pTabInfo->u16GroupIdx));
1755 }
1756 break;
1757 case PQ_TABTYPE_UFSC_C_SRAM4:
1758 if (_u16UFSCCSRAM4Table != pTabInfo->u16GroupIdx)
1759 {
1760 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] old sram4: %u, new Csram4: %u\n",
1761 _u16UFSCCSRAM2Table, pTabInfo->u16GroupIdx));
1762
1763 _u16UFSCCSRAM4Table = pTabInfo->u16GroupIdx;
1764 MDrv_PQBin_DumpUFSCFilterTable(pInstance, pTabInfo);
1765 }
1766 else
1767 {
1768 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] use the same Csram4: %u\n", pTabInfo->u16GroupIdx));
1769 }
1770 break;
1771
1772 case PQ_TABTYPE_UFSC_VIP_ICC_CRD_SRAM:
1773 if(_u16UFSCICC_CRD_Table != pTabInfo->u16GroupIdx)
1774 {
1775 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] old ICC_CRD_SRAM: %u, new ICC_CRD_SRAM: %u\n",
1776 _u16UFSCICC_CRD_Table, pTabInfo->u16GroupIdx));
1777
1778 _u16UFSCICC_CRD_Table = pTabInfo->u16GroupIdx;
1779 MDrv_PQBin_DumpUFSCFilterTable(pInstance, pTabInfo);
1780 }
1781 break;
1782
1783 case PQ_TABTYPE_UFSC_VIP_IHC_CRD_SRAM:
1784 if(_u16UFSCIHC_CRD_Table != pTabInfo->u16GroupIdx)
1785 {
1786 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] old IHC_CRD_SRAM: %u, new IHC_CRD_SRAM: %u\n",
1787 _u16UFSCIHC_CRD_Table, pTabInfo->u16GroupIdx));
1788
1789 _u16UFSCIHC_CRD_Table = pTabInfo->u16GroupIdx;
1790 MDrv_PQBin_DumpUFSCFilterTable(pInstance, pTabInfo);
1791 }
1792 break;
1793
1794 #if 0
1795 case PQ_TABTYPE_UFSC_XVYCC_DE_GAMMA_SRAM:
1796 if (_u16UFSCXVYCC_DE_GAMMA_SRAM_Table != pTabInfo->u16GroupIdx)
1797 {
1798 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] xvYcc DE Gamma SRAM: %u, new xvYcc DE Gamma SRAM: %u\n",
1799 _u16UFSCXVYCC_DE_GAMMA_SRAM_Table, pTabInfo->u16GroupIdx));
1800
1801 _u16UFSCXVYCC_DE_GAMMA_SRAM_Table = pTabInfo->u16GroupIdx;
1802 MDrv_PQBin_DumpUFSCFilterTable(pInstance,pTabInfo);
1803 }
1804 else
1805 {
1806 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] use the same xvYcc DE Gamma SRAM: %u\n", pTabInfo->u16GroupIdx));
1807 }
1808 break;
1809 case PQ_TABTYPE_UFSC_XVYCC_GAMMA_SRAM:
1810 if (_u16UFSCXVYCC_GAMMA_SRAM_Table != pTabInfo->u16GroupIdx)
1811 {
1812 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] xvYcc Gamma SRAM: %u, new xvYcc Gamma SRAM: %u\n",
1813 _u16UFSCXVYCC_GAMMA_SRAM_Table, pTabInfo->u16GroupIdx));
1814
1815 _u16UFSCXVYCC_GAMMA_SRAM_Table = pTabInfo->u16GroupIdx;
1816 MDrv_PQBin_DumpUFSCFilterTable(pInstance,pTabInfo);
1817 }
1818 else
1819 {
1820 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin][UFSC] use the same xvYcc Gamma SRAM: %u\n", pTabInfo->u16GroupIdx));
1821 }
1822 break;
1823 case PQ_TABTYPE_UFSC_100SERIES:
1824 MDrv_PQBin_DumpUFSC100RegTable(pTabInfo);
1825 break;
1826 #endif
1827 #endif
1828 default:
1829 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]DumpTable:unknown type: %u\n", pTabInfo->u16TableType));
1830 break;
1831 }
1832 }
1833 #endif
1834
1835 // return total IP count
MDrv_PQBin_GetIPNum(void * pInstance,const MS_PQBin_Header_Info * const pPQBinHeader)1836 MS_U16 MDrv_PQBin_GetIPNum(void *pInstance,const MS_PQBin_Header_Info* const pPQBinHeader)
1837 {
1838 PQ_BIN_DBG(printf("[PQBin]:IPNum=%u\n", pPQBinHeader->u16IP_Comm_Num));
1839 return pPQBinHeader->u16IP_Comm_Num;
1840 }
1841
1842 // return total table count of given IP
MDrv_PQBin_GetTableNum(void * pInstance,MS_U16 u16PQIPIdx,const MS_PQBin_Header_Info * const pPQBinHeader)1843 MS_U16 MDrv_PQBin_GetTableNum(void *pInstance,MS_U16 u16PQIPIdx, const MS_PQBin_Header_Info* const pPQBinHeader)
1844 {
1845 MS_PHYADDR u32Addr;
1846 MS_U32 u32Offset;
1847 MS_U16 u16TabNum;
1848
1849 u32Addr = pPQBinHeader->u32BinStartAddress + pPQBinHeader->u32IP_Comm_Offset;
1850 u32Offset = pPQBinHeader->u32IP_Comm_Pitch * (MS_U32)u16PQIPIdx + PQ_BIN_IP_COMM_IP_GROUP_NUM_OFFSET;
1851 u16TabNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
1852 PQ_BIN_DBG(printf("[PQBin]TabNum=%u\n", u16TabNum));
1853 return u16TabNum;
1854 }
1855
1856 // return current used table index of given IP
MDrv_PQBin_GetCurrentTableIndex(void * pInstance,MS_U16 u16PnlIdx,MS_U16 u16PQIPIdx)1857 MS_U16 MDrv_PQBin_GetCurrentTableIndex(void *pInstance,MS_U16 u16PnlIdx, MS_U16 u16PQIPIdx)
1858 {
1859 printf("[PQBin]CurrTableIdx=%u\n", _u16PQTabIdx[u16PnlIdx][u16PQIPIdx]);
1860
1861 return _u16PQTabIdx[u16PnlIdx][u16PQIPIdx];
1862 }
1863
1864
MDrv_PQBin_GetTableIndex(void * pInstance,MS_U16 u16PQSrcType,MS_U16 u16PQIPIdx,MS_U16 u16PQPnlIdx,const MS_PQBin_Header_Info * const pPQBinHeader)1865 MS_U16 MDrv_PQBin_GetTableIndex(void *pInstance,MS_U16 u16PQSrcType, MS_U16 u16PQIPIdx, MS_U16 u16PQPnlIdx, const MS_PQBin_Header_Info* const pPQBinHeader)
1866 {
1867 MS_PHYADDR u32Addr;
1868 MS_U32 u32Offset;
1869 MS_PHYADDR u32SourceLUT_Addr;
1870 MS_U32 u32SourceLUT_Offset;
1871 MS_U16 u16SourceLUT_SourceNum;
1872 MS_U16 u16SourceLUT_IPNum;
1873 MS_U32 u32SourceLUT_Data_Pitch;
1874 MS_U16 u16TableIdx;
1875
1876 if(u16PQPnlIdx >= pPQBinHeader->u16SourceLUT_PnlNum)
1877 {
1878 (printf("[PQBin]invalid panel type\n"));
1879 return PQ_BIN_IP_NULL;
1880 }
1881
1882
1883 u32Addr = pPQBinHeader->u32BinStartAddress + pPQBinHeader->u32SourceLUT_Offset;
1884 u32Offset = pPQBinHeader->u32SourceLUT_Pitch * u16PQPnlIdx + PQ_BIN_SOURCELUT_SOURCE_NUM_OFFSET;
1885 u16SourceLUT_SourceNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
1886 if (u16PQSrcType >= u16SourceLUT_SourceNum)
1887 {
1888 PQ_BIN_DBG(printf("[PQBin]invalid input type\n"));
1889 return PQ_BIN_IP_NULL;
1890 }
1891
1892 u32Offset = pPQBinHeader->u32SourceLUT_Pitch * u16PQPnlIdx + PQ_BIN_SOURCELUT_IP_NUM_OFFSET;
1893 u16SourceLUT_IPNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
1894 if (u16PQIPIdx >= u16SourceLUT_IPNum)
1895 {
1896 PQ_BIN_DBG(printf("[PQBin]invalid ip type\n"));
1897 return PQ_BIN_IP_NULL;
1898 }
1899
1900 u32Offset = pPQBinHeader->u32SourceLUT_Pitch * u16PQPnlIdx + PQ_BIN_SOURCELUT_OFFSET_OFFSET;
1901 u32SourceLUT_Addr = MDrv_PQBin_Get4ByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
1902
1903 u32SourceLUT_Addr += pPQBinHeader->u32BinStartAddress + PQ_BIN_HEADER_LEN;
1904 u32SourceLUT_Data_Pitch = (MS_U32)u16SourceLUT_IPNum * PQ_BIN_SOURCELUT_DATA_LEN;
1905 u32SourceLUT_Offset = u32SourceLUT_Data_Pitch * (MS_U32)u16PQSrcType +
1906 (MS_U32)u16PQIPIdx * PQ_BIN_SOURCELUT_DATA_LEN;
1907 #if PQ_BIN_SOURCELUT_DATA_LEN == 2
1908 u16TableIdx = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32SourceLUT_Addr+u32SourceLUT_Offset),
1909 &u32SourceLUT_Offset);
1910 #else
1911 u16TableIdx = (MS_U16)MDrv_PQBin_GetByteData(pInstance,(void *)(u32SourceLUT_Addr+u32SourceLUT_Offset),
1912 &u32SourceLUT_Offset);
1913 #endif
1914 PQ_BIN_DBG(printf("[PQBin]TableId=%u\n",u16TableIdx));
1915 return u16TableIdx;
1916 }
1917
MDrv_PQBin_GetTable(void * pInstance,MS_U16 u16PnlIdx,MS_U16 u16TabIdx,MS_U16 u16PQIPIdx,MS_PQBin_IP_Table_Info * pTableInfo,const MS_PQBin_Header_Info * const pPQBinHeader)1918 void MDrv_PQBin_GetTable(void *pInstance,MS_U16 u16PnlIdx, MS_U16 u16TabIdx, MS_U16 u16PQIPIdx, MS_PQBin_IP_Table_Info *pTableInfo, const MS_PQBin_Header_Info* const pPQBinHeader)
1919 {
1920 MS_PHYADDR u32Addr;
1921 MS_U32 u32Offset;
1922
1923 if((u16PnlIdx >= PQ_BIN_MAX_PNL) || (u16PQIPIdx >= PQ_BIN_MAX_IP))
1924 {
1925 printf("[PQBin]:Out Of Range!! PnlIdx=%u, IPIdx=%u\n", u16PnlIdx, u16PQIPIdx);
1926 //MS_ASSERT(0);
1927 return;
1928 }
1929 _u16PQTabIdx[u16PnlIdx][u16PQIPIdx] = u16TabIdx;
1930
1931 if (u16TabIdx != PQ_BIN_IP_NULL)
1932 {
1933 u32Addr = pPQBinHeader->u32IP_Comm_Offset +
1934 pPQBinHeader->u32BinStartAddress;
1935
1936 if(u16TabIdx == PQ_BIN_IP_COMM)
1937 {
1938 u32Offset = pPQBinHeader->u32IP_Comm_Pitch * (MS_U32)u16PQIPIdx + PQ_BIN_IP_COMM_TABLE_TYPE_OFFSET;
1939 pTableInfo->u16TableType = MDrv_PQBin_Get2ByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
1940
1941 u32Offset = pPQBinHeader->u32IP_Comm_Pitch * (MS_U32)u16PQIPIdx + PQ_BIN_IP_COMM_COMM_REG_NUM_OFFSET;
1942 pTableInfo->u16RegNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
1943
1944 u32Offset = pPQBinHeader->u32IP_Comm_Pitch * (MS_U32)u16PQIPIdx + PQ_BIN_IP_COMM_COMMOFFSET_OFFSET;
1945 pTableInfo->u32TabOffset = MDrv_PQBin_Get4ByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
1946 pTableInfo->u32TabOffset += (pPQBinHeader->u32BinStartAddress + PQ_BIN_HEADER_LEN);
1947
1948 pTableInfo->u16GroupNum = 1;
1949 pTableInfo->u16GroupIdx = 0;
1950 }
1951 else
1952 {
1953 u32Offset = pPQBinHeader->u32IP_Comm_Pitch * (MS_U32)u16PQIPIdx + PQ_BIN_IP_COMM_TABLE_TYPE_OFFSET;
1954 pTableInfo->u16TableType = MDrv_PQBin_Get2ByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
1955
1956 u32Offset = pPQBinHeader->u32IP_Comm_Pitch * (MS_U32)u16PQIPIdx + PQ_BIN_IP_COMM_IP_REG_NUM_OFFSET;
1957 pTableInfo->u16RegNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
1958
1959 u32Offset = pPQBinHeader->u32IP_Comm_Pitch * (MS_U32)u16PQIPIdx + PQ_BIN_IP_COMM_IP_GROUP_NUM_OFFSET;
1960 pTableInfo->u16GroupNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
1961
1962 u32Offset = pPQBinHeader->u32IP_Comm_Pitch * (MS_U32)u16PQIPIdx + PQ_BIN_IP_COMM_IPOFFSET_OFFSET;
1963 pTableInfo->u32TabOffset = MDrv_PQBin_Get4ByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
1964 pTableInfo->u32TabOffset += (pPQBinHeader->u32BinStartAddress + PQ_BIN_HEADER_LEN);
1965
1966 pTableInfo->u16GroupIdx = u16TabIdx;
1967 }
1968 }
1969 else
1970 {
1971 pTableInfo->u16GroupIdx = 0;
1972 pTableInfo->u32TabOffset = PQ_BIN_ADDR_NULL;
1973 pTableInfo->u16RegNum = 0;
1974 pTableInfo->u16TableType = 0;
1975 pTableInfo->u16GroupNum = 0;
1976 }
1977
1978 PQ_BIN_DBG(printf("[PQBin]: GetTable: Offset=%lx, RegNum=%u, GroupIdx=%u, GroupNum=%u, Type=%u \n",
1979 pTableInfo->u32TabOffset,
1980 pTableInfo->u16RegNum,
1981 pTableInfo->u16GroupIdx,
1982 pTableInfo->u16GroupNum,
1983 pTableInfo->u16TableType));
1984 }
1985
MDrv_PQBin_LoadTableData(void * pInstance,MS_U16 u16PnlIdx,MS_U16 u16TabIdx,MS_U16 u16PQIPIdx,MS_PQBin_Header_Info * pPQBinHeader,MS_U8 * pTable,MS_U16 u16TableSize)1986 void MDrv_PQBin_LoadTableData(
1987 void *pInstance,
1988 MS_U16 u16PnlIdx,
1989 MS_U16 u16TabIdx,
1990 MS_U16 u16PQIPIdx,
1991 MS_PQBin_Header_Info *pPQBinHeader,
1992 MS_U8 *pTable,
1993 MS_U16 u16TableSize)
1994 {
1995 MS_PQBin_IP_Table_Info stTableInfo;
1996 MS_U8 __attribute__((__unused__))u8Mask = 0;
1997 MS_U8 __attribute__((__unused__))u8Addr = 0;
1998 MS_U8 u8Value = 0;
1999 MS_U8 __attribute__((__unused__))u8CurBank = 0xff;
2000 MS_PHYADDR u32Addr = 0;
2001 MS_U32 u32Offset = 0;
2002 MS_U16 i = 0;
2003
2004
2005 memset(&stTableInfo, 0, sizeof(MS_PQBin_IP_Table_Info));
2006
2007 MDrv_PQBin_GetTable(pInstance,u16PnlIdx,
2008 u16TabIdx,
2009 u16PQIPIdx,
2010 &stTableInfo,
2011 pPQBinHeader);
2012
2013
2014
2015 PQ_BIN_DUMP_DBG(printf("LoadTableData: \n"));
2016 if(stTableInfo.u16GroupIdx >= stTableInfo.u16GroupNum)
2017 {
2018 PQ_BIN_DBG(printf("[PQBin]IP_Info error: LoadTable Data\n"));
2019 return;
2020 }
2021
2022 if(u16TableSize > stTableInfo.u16RegNum)
2023 {
2024 PQ_BIN_DBG(printf("[PQBin]IP_Info error: LoadTable Data is too big\n"));
2025 return;
2026 }
2027 u32Addr = stTableInfo.u32TabOffset;
2028 for(i=0; i<stTableInfo.u16RegNum; i++)
2029 {
2030 u32Offset = ( PQ_BIN_BANK_SIZE + PQ_BIN_ADDR_SIZE + PQ_BIN_MASK_SIZE + (MS_U32)stTableInfo.u16GroupNum) * (MS_U32)i;
2031 u8CurBank = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
2032 u8Addr = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
2033 u8Mask = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
2034
2035 u32Offset += (MS_U32)stTableInfo.u16GroupIdx;
2036 u8Value = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset);
2037
2038 pTable[i] = u8Value;
2039 }
2040 }
2041
2042
MDrv_PQBin_CloneTable(void * pInstance,MS_U16 u16PnlIdx,MS_U16 u16TabIdx,MS_U16 u16PQMainIPIdx,MS_U16 u16PQSubIPIdx,MS_PQBin_Header_Info * pPQBinHeader)2043 void MDrv_PQBin_CloneTable(
2044 void *pInstance,
2045 MS_U16 u16PnlIdx,
2046 MS_U16 u16TabIdx,
2047 MS_U16 u16PQMainIPIdx,
2048 MS_U16 u16PQSubIPIdx,
2049 MS_PQBin_Header_Info *pPQBinHeader)
2050 {
2051 MS_PQBin_IP_Table_Info stTableMainInfo, stTableSubInfo;
2052 PQ_BIN_DBG_SRAMERROR(printf("---------MDrv_PQBin_LoadTable: u16TabIdx=%u, u16PQMainIPIdx=%u, u16PQSubIPIdx=%u\n",
2053 u16TabIdx, u16PQMainIPIdx, u16PQSubIPIdx));
2054
2055 memset(&stTableMainInfo, 0, sizeof(MS_PQBin_IP_Table_Info));
2056 memset(&stTableSubInfo, 0, sizeof(MS_PQBin_IP_Table_Info));
2057
2058 MDrv_PQBin_GetTable(pInstance,u16PnlIdx,
2059 u16TabIdx,
2060 u16PQMainIPIdx,
2061 &stTableMainInfo,
2062 pPQBinHeader);
2063
2064 MDrv_PQBin_GetTable(pInstance,u16PnlIdx,
2065 u16TabIdx,
2066 u16PQSubIPIdx,
2067 &stTableSubInfo,
2068 pPQBinHeader);
2069
2070 MDrv_PQBin_DumpCloneTable(pInstance,&stTableMainInfo, &stTableSubInfo);
2071 }
2072
2073 extern MS_PQBin_Header_Info stPQBinHeaderInfo[MAX_PQ_BIN_NUM];
2074 #if (defined (UFO_XC_DS_PQ))
_MDrv_PQBin_DS_GetTable(void * pInstance,MS_U16 u16PnlIdx,MS_U16 u16TabIdx,MS_U16 u16PQIPIdx,MS_PQBin_Header_Info * pPQBinHeader,PQ_WIN eWindow)2075 void _MDrv_PQBin_DS_GetTable(
2076 void *pInstance,
2077 MS_U16 u16PnlIdx,
2078 MS_U16 u16TabIdx,
2079 MS_U16 u16PQIPIdx,
2080 MS_PQBin_Header_Info *pPQBinHeader,PQ_WIN eWindow)
2081 {
2082 MS_PQBin_IP_Table_Info stTableInfo;
2083 PQ_BIN_DBG_SRAMERROR(printf("---------MDrv_PQBin_LoadTable: u16TabIdx=%u, u16PQIPIdx=%u\n", u16TabIdx, u16PQIPIdx));
2084
2085 memset(&stTableInfo, 0, sizeof(MS_PQBin_IP_Table_Info));
2086
2087 MDrv_PQBin_GetTable(pInstance,u16PnlIdx,
2088 u16TabIdx,
2089 u16PQIPIdx,
2090 &stTableInfo,
2091 pPQBinHeader);
2092
2093 MDrv_PQBin_DS_DumpTable(pInstance,&stTableInfo);
2094 }
MDrv_PQBin_DS_GetTable(void * pInstance,PQ_WIN eWindow,MS_U16 u16TabIdx,MS_U16 u16PQIPIdx,PQ_ENGINE_TYPE ePQEngineType)2095 void MDrv_PQBin_DS_GetTable(void* pInstance,PQ_WIN eWindow, MS_U16 u16TabIdx, MS_U16 u16PQIPIdx, PQ_ENGINE_TYPE ePQEngineType)
2096 {
2097 switch(ePQEngineType)
2098 {
2099 case PQ_XC0_STD:
2100 _MDrv_PQBin_DS_GetTable(pInstance,MDrv_PQBin_GetPanelIdx(pInstance),
2101 u16TabIdx,
2102 u16PQIPIdx,
2103 &stPQBinHeaderInfo[PQ_BIN_STD_MAIN],eWindow);
2104 break;
2105 case PQ_XC0_UFSC:
2106 _MDrv_PQBin_DS_GetTable(pInstance,MDrv_PQBin_GetPanelIdx_UFSC(pInstance),
2107 u16TabIdx,
2108 u16PQIPIdx,
2109 &stPQBinHeaderInfo[PQ_BIN_UFSC],eWindow);
2110 break;
2111 default:
2112 break;
2113
2114 }
2115 }
2116 #endif
MDrv_PQBin_LoadTable(void * pInstance,MS_U16 u16PnlIdx,MS_U16 u16TabIdx,MS_U16 u16PQIPIdx,MS_PQBin_Header_Info * pPQBinHeader,PQ_WIN eWindow)2117 void MDrv_PQBin_LoadTable(
2118 void *pInstance,
2119 MS_U16 u16PnlIdx,
2120 MS_U16 u16TabIdx,
2121 MS_U16 u16PQIPIdx,
2122 MS_PQBin_Header_Info *pPQBinHeader,PQ_WIN eWindow)
2123 {
2124 MS_PQBin_IP_Table_Info stTableInfo;
2125 PQ_BIN_DBG_SRAMERROR(printf("---------MDrv_PQBin_LoadTable: u16TabIdx=%u, u16PQIPIdx=%u\n", u16TabIdx, u16PQIPIdx));
2126
2127 memset(&stTableInfo, 0, sizeof(MS_PQBin_IP_Table_Info));
2128
2129 MDrv_PQBin_GetTable(pInstance,u16PnlIdx,
2130 u16TabIdx,
2131 u16PQIPIdx,
2132 &stTableInfo,
2133 pPQBinHeader);
2134
2135 #ifdef UFO_XC_PIP_PATCH_USING_SC1_MAIN_AS_SC0_SUB
2136 if(eWindow==PQ_SUB_WINDOW)
2137 MDrv_PQBin_DumpTable_Main2(pInstance,&stTableInfo);
2138 else
2139 #endif
2140 {
2141 MDrv_PQBin_DumpTable(pInstance,&stTableInfo);
2142 }
2143 }
2144
MDrv_PQBin_LoadCommTable(void * pInstance,MS_U16 u16PnlIdx,MS_PQBin_Header_Info * pPQBinHeader)2145 void MDrv_PQBin_LoadCommTable(void *pInstance,MS_U16 u16PnlIdx, MS_PQBin_Header_Info *pPQBinHeader)
2146 {
2147 MS_U16 i;
2148 MS_PQBin_IP_Table_Info stTableInfo;
2149
2150 _u16SRAM1Table = 0xFFFF;
2151 _u16SRAM2Table = 0xFFFF;
2152 _u16SRAM3Table = 0xFFFF;
2153 _u16SRAM4Table = 0xFFFF;
2154 _u16CSRAM1Table = 0xFFFF;
2155 _u16CSRAM2Table = 0xFFFF;
2156 _u16CSRAM3Table = 0xFFFF;
2157 _u16CSRAM4Table = 0xFFFF;
2158 _u16ICC_CRD_Table = 0xFFFF;
2159 _u16IHC_CRD_Table = 0xFFFF;
2160 _u16XVYCC_DE_GAMMA_SRAM_Table = 0xFFFF;
2161 _u16XVYCC_GAMMA_SRAM_Table = 0xFFFF;
2162
2163 _u16SRAM1Table_main2 = 0xFFFF;
2164 _u16SRAM2Table_main2 = 0xFFFF;
2165 _u16SRAM3Table_main2 = 0xFFFF;
2166 _u16SRAM4Table_main2 = 0xFFFF;
2167 _u16CSRAM1Table_main2 = 0xFFFF;
2168 _u16CSRAM2Table_main2 = 0xFFFF;
2169 _u16CSRAM3Table_main2 = 0xFFFF;
2170 _u16CSRAM4Table_main2 = 0xFFFF;
2171 _u16ICC_CRD_Table_main2 = 0xFFFF;
2172 _u16IHC_CRD_Table_main2 = 0xFFFF;
2173 _u16XVYCC_DE_GAMMA_SRAM_Table_main2 = 0xFFFF;
2174 _u16XVYCC_GAMMA_SRAM_Table_main2 = 0xFFFF;
2175
2176 #if defined(ENABLE_PQ_BIN_UFSC) && ENABLE_PQ_BIN_UFSC
2177 _u16UFSCSRAM1Table = 0xFFFF;
2178 _u16UFSCSRAM2Table = 0xFFFF;
2179 _u16UFSCSRAM3Table = 0xFFFF;
2180 _u16UFSCSRAM4Table = 0xFFFF;
2181 _u16UFSCCSRAM1Table = 0xFFFF;
2182 _u16UFSCCSRAM2Table = 0xFFFF;
2183 _u16UFSCCSRAM3Table = 0xFFFF;
2184 _u16UFSCCSRAM4Table = 0xFFFF;
2185 _u16UFSCICC_CRD_Table = 0xFFFF;
2186 _u16UFSCIHC_CRD_Table = 0xFFFF;
2187 //_u16UFSCXVYCC_DE_GAMMA_SRAM_Table = 0xFFFF;
2188 //_u16UFSCXVYCC_GAMMA_SRAM_Table = 0xFFFF;
2189 #endif
2190 memset(&stTableInfo, 0, sizeof(MS_PQBin_IP_Table_Info));
2191
2192 PQ_BIN_DBG(printf("[PQBin]LoadCommTable\n"));
2193 for (i=0; i< pPQBinHeader->u16IP_Comm_Num; i++)
2194 {
2195 PQ_BIN_DBG_SRAMERROR(printf("--------MDrv_PQBin_LoadCommTable: u16TabIdx=%u, u16PQIPIdx=%u\n", PQ_BIN_IP_COMM, i));
2196 MDrv_PQBin_GetTable(pInstance,u16PnlIdx,
2197 PQ_BIN_IP_COMM,
2198 i,
2199 &stTableInfo,
2200 pPQBinHeader);
2201
2202 if((stTableInfo.u16TableType == PQ_TABTYPE_SRAM1) ||
2203 (stTableInfo.u16TableType == PQ_TABTYPE_SRAM2))
2204 {
2205 continue;
2206 }
2207
2208 MDrv_PQBin_DumpTable(pInstance,&stTableInfo);
2209 }
2210 }
2211
2212
2213
MDrv_PQBin_Parsing(void * pInstance,MS_PQBin_Header_Info * pPQBinHeader)2214 void MDrv_PQBin_Parsing(void *pInstance,MS_PQBin_Header_Info *pPQBinHeader)
2215 {
2216 MS_PHYADDR u32PQBin_Addr;
2217 MS_U32 u32Offset;
2218 #if PQ_BIN_DBG_HEADER_DATA
2219 MS_U32 u32tmpoffset;
2220 #endif
2221 MS_U8 i;
2222
2223 u32Offset = 0;
2224 u32PQBin_Addr = pPQBinHeader->u32BinStartAddress;
2225 printf("BinStartaDDR ID%u=%tx\n", pPQBinHeader->u8BinID, (ptrdiff_t) u32PQBin_Addr);
2226 for(i=0; i< PQ_BIN_HEADER_LEN; i++)
2227 {
2228 pPQBinHeader->u8Header[i] = MDrv_PQBin_GetByteData(pInstance,(void *)(u32PQBin_Addr+u32Offset), &u32Offset);
2229 }
2230
2231 for(i=0; i< PQ_BIN_HEADER_LEN; i++)
2232 {
2233 pPQBinHeader->u8Version[i] = MDrv_PQBin_GetByteData(pInstance,(void *)(u32PQBin_Addr+u32Offset), &u32Offset);
2234 }
2235
2236 pPQBinHeader->u32StartOffset = MDrv_PQBin_Get4ByteData(pInstance,(void *)(u32PQBin_Addr+u32Offset), &u32Offset);
2237 pPQBinHeader->u32EndOffset = MDrv_PQBin_Get4ByteData(pInstance,(void *)(u32PQBin_Addr+u32Offset), &u32Offset);
2238
2239 for(i=0; i< PQ_BIN_DUMMY; i++)
2240 {
2241 pPQBinHeader->u8Dummy[i] = MDrv_PQBin_GetByteData(pInstance,(void *)(u32PQBin_Addr+u32Offset), &u32Offset);
2242 }
2243
2244 PQ_BIN_DBG_HEADER(printf("Header :%16s\n", pPQBinHeader->u8Header));
2245 PQ_BIN_DBG_HEADER(printf("Version:%16s\n", pPQBinHeader->u8Version));
2246 PQ_BIN_DBG_HEADER(printf("startADDR=%lx, EndAddr=%lx\n", pPQBinHeader->u32StartOffset, pPQBinHeader->u32EndOffset));
2247 PQ_BIN_DBG_HEADER(printf("Dummy :%8s\n", pPQBinHeader->u8Dummy));
2248 //-------------------------------------------------------------------------------------------
2249 // GRule
2250 //
2251 for(i=0; i< PQ_BIN_HEADER_LEN; i++)
2252 {
2253 pPQBinHeader->u8GRuleHader[i] = MDrv_PQBin_GetByteData(pInstance,(void *)(u32PQBin_Addr+u32Offset), &u32Offset);
2254 }
2255
2256 pPQBinHeader->u16GRule_RuleNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32PQBin_Addr+u32Offset), &u32Offset);
2257 pPQBinHeader->u16GRule_PnlNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32PQBin_Addr+u32Offset), &u32Offset);
2258
2259
2260 PQ_BIN_DBG_HEADER(printf("GRuleHeader:%16s\n", pPQBinHeader->u8GRuleHader));
2261 PQ_BIN_DBG_HEADER(printf("GRule: RuleNum=%u, PnlNum=%u \n", pPQBinHeader->u16GRule_RuleNum, pPQBinHeader->u16GRule_PnlNum));
2262
2263 pPQBinHeader->u32GRule_Offset = u32Offset;
2264 pPQBinHeader->u32GRule_Pitch = PQ_BIN_GRULE_INFO_SIZE;
2265 u32Offset += pPQBinHeader->u32GRule_Pitch * (MS_U32)pPQBinHeader->u16GRule_RuleNum;
2266
2267
2268 pPQBinHeader->u32GRule_Lvl_Offset = u32Offset;
2269 pPQBinHeader->u32GRule_Lvl_Pitch = PQ_BIN_GRULE_LEVEL_INFO_SIZE;
2270 u32Offset += pPQBinHeader->u32GRule_Lvl_Pitch * (MS_U32)pPQBinHeader->u16GRule_RuleNum * (MS_U32)pPQBinHeader->u16GRule_PnlNum;
2271
2272 PQ_BIN_DBG_HEADER(printf("GRule Rule : offset=%lx, pitch=%lu\n", pPQBinHeader->u32GRule_Offset, pPQBinHeader->u32GRule_Pitch));
2273 PQ_BIN_DBG_HEADER(printf("GRule Level: offset=%lx, pitch=%lu \n", pPQBinHeader->u32GRule_Lvl_Offset, pPQBinHeader->u32GRule_Lvl_Pitch));
2274 PQ_BIN_DBG_HEADER(printf("XRule Start:%lx\n", u32Offset));
2275
2276 //-------------------------------------------------------------------------------------------
2277 // XRule
2278 //
2279 for(i=0; i< PQ_BIN_HEADER_LEN; i++)
2280 {
2281 pPQBinHeader->u8XRuleHader[i] = MDrv_PQBin_GetByteData(pInstance,(void *)(u32PQBin_Addr+u32Offset), &u32Offset);
2282 }
2283 pPQBinHeader->u16XRuleNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32PQBin_Addr+u32Offset), &u32Offset);
2284
2285 PQ_BIN_DBG_HEADER(printf("XRuleHeader:%16s\n", pPQBinHeader->u8XRuleHader));
2286 PQ_BIN_DBG_HEADER(printf("XRule: RuleNum=%u\n", pPQBinHeader->u16XRuleNum));
2287
2288 pPQBinHeader->u32XRule_Offset = u32Offset;
2289 pPQBinHeader->u32XRUle_Pitch = PQ_BIN_XRULE_INFO_SIZE;
2290 u32Offset += pPQBinHeader->u32XRUle_Pitch * (MS_U32)pPQBinHeader->u16XRuleNum;
2291
2292 PQ_BIN_DBG_HEADER(printf("XRule: offset=%lx, pitch=%lu\n",pPQBinHeader->u32XRule_Offset, pPQBinHeader->u32XRUle_Pitch));
2293 PQ_BIN_DBG_HEADER(printf("SkipRule Start:%lx\n", u32Offset));
2294
2295 //-------------------------------------------------------------------------------------------
2296 // SkipRule
2297 //
2298 for(i=0; i< PQ_BIN_HEADER_LEN; i++)
2299 {
2300 pPQBinHeader->u8SkipRuleHader[i] = MDrv_PQBin_GetByteData(pInstance,(void *)(u32PQBin_Addr+u32Offset), &u32Offset);
2301 }
2302
2303 pPQBinHeader->u16SkipRule_IPNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32PQBin_Addr+u32Offset), &u32Offset);
2304 pPQBinHeader->u32SkipRule_Offset = MDrv_PQBin_Get4ByteData(pInstance,(void *)(u32PQBin_Addr+u32Offset), &u32Offset);
2305
2306 PQ_BIN_DBG_HEADER(printf("SkipRuleHeader:%16s IpNum=%u, Offset=%lx\n", pPQBinHeader->u8SkipRuleHader, pPQBinHeader->u16SkipRule_IPNum, pPQBinHeader->u32SkipRule_Offset));
2307 PQ_BIN_DBG_HEADER(printf("IP_Comm Start:%lx\n", u32Offset));
2308
2309 //-------------------------------------------------------------------------------------------
2310 // IP & Common
2311 //
2312 for(i=0; i< PQ_BIN_HEADER_LEN; i++)
2313 {
2314 pPQBinHeader->u8IP_Comm_Header[i] = MDrv_PQBin_GetByteData(pInstance,(void *)(u32PQBin_Addr+u32Offset), &u32Offset);
2315 }
2316
2317 pPQBinHeader->u16IP_Comm_Num = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32PQBin_Addr+u32Offset), &u32Offset);
2318
2319 PQ_BIN_DBG_HEADER(printf("IP_CommHeader:%16s\n", pPQBinHeader->u8IP_Comm_Header));
2320 PQ_BIN_DBG_HEADER(printf("IP_Comm, Num=%u\n", pPQBinHeader->u16IP_Comm_Num));
2321
2322 pPQBinHeader->u32IP_Comm_Offset = u32Offset;
2323 pPQBinHeader->u32IP_Comm_Pitch = PQ_BIN_IP_COMM_INFO_SIZE;
2324 u32Offset += pPQBinHeader->u32IP_Comm_Pitch * (MS_U32)pPQBinHeader->u16IP_Comm_Num;
2325
2326 PQ_BIN_DBG_HEADER(printf("IP_Comm, Offset=%lx, pitch=%lu\n", pPQBinHeader->u32IP_Comm_Offset, pPQBinHeader->u32IP_Comm_Pitch));
2327 PQ_BIN_DBG_HEADER(printf("SourceLUT Start:%lx\n", u32Offset));
2328 //-------------------------------------------------------------------------------------------
2329 // SourceLUT
2330 //
2331 for(i=0; i< PQ_BIN_HEADER_LEN; i++)
2332 {
2333 pPQBinHeader->u8SourceLUT_Header[i] = MDrv_PQBin_GetByteData(pInstance,(void *)(u32PQBin_Addr+u32Offset), &u32Offset);
2334 }
2335
2336 pPQBinHeader->u16SourceLUT_PnlNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32PQBin_Addr+u32Offset), &u32Offset);
2337
2338 PQ_BIN_DBG_HEADER(printf("SourceLUTHeader:%16s\n", pPQBinHeader->u8SourceLUT_Header));
2339 PQ_BIN_DBG_HEADER(printf("SourceLUT, PnlNum=%u\n", pPQBinHeader->u16SourceLUT_PnlNum));
2340
2341 pPQBinHeader->u32SourceLUT_Offset = u32Offset;
2342 pPQBinHeader->u32SourceLUT_Pitch = PQ_BIN_SOURCELUT_INFO_SIZE;
2343 u32Offset += pPQBinHeader->u32SourceLUT_Pitch * (MS_U32)pPQBinHeader->u16SourceLUT_PnlNum;
2344
2345 PQ_BIN_DBG_HEADER(printf("SourceLUT: offset=%lx, pitch=%lu\n", pPQBinHeader->u32SourceLUT_Offset, pPQBinHeader->u32SourceLUT_Pitch));
2346
2347
2348 #if PQ_BIN_DBG_HEADER_DATA
2349 // GRule
2350 u32tmpoffset = pPQBinHeader->u32GRule_Offset;
2351 for(i=0; i<pPQBinHeader->u16GRule_RuleNum; i++)
2352 {
2353 MS_PQBin_GRule_Info stGRuleInfo;
2354
2355 stGRuleInfo.u16IPNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32PQBin_Addr+u32tmpoffset), &u32tmpoffset);
2356 stGRuleInfo.u16SourceNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32PQBin_Addr+u32tmpoffset), &u32tmpoffset);
2357 stGRuleInfo.u16GroupNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32PQBin_Addr+u32tmpoffset), &u32tmpoffset);
2358 stGRuleInfo.u32IPOffset = MDrv_PQBin_Get4ByteData(pInstance,(void *)(u32PQBin_Addr+u32tmpoffset), &u32tmpoffset);
2359 stGRuleInfo.u32RuleOffset = MDrv_PQBin_Get4ByteData(pInstance,(void *)(u32PQBin_Addr+u32tmpoffset), &u32tmpoffset);
2360
2361 printf("GRule %u, IPNum=%u, SourceNum=%u, GroupNum=%u, IPOffset=%lx, RuleOffset=%lx\n",
2362 i,
2363 stGRuleInfo.u16IPNum,
2364 stGRuleInfo.u16SourceNum,
2365 stGRuleInfo.u16GroupNum,
2366 stGRuleInfo.u32IPOffset,
2367 stGRuleInfo.u32RuleOffset);
2368 }
2369
2370 // GRule Level
2371 for(i=0; i<pPQBinHeader->u16GRule_RuleNum*pPQBinHeader->u16GRule_PnlNum; i++)
2372 {
2373 MS_PQBin_GRule_Level_Info stGRuleLvlInfo;
2374
2375 stGRuleLvlInfo.u16LvlNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32PQBin_Addr+u32tmpoffset), &u32tmpoffset);
2376 stGRuleLvlInfo.u32Offset = MDrv_PQBin_Get4ByteData(pInstance,(void *)(u32PQBin_Addr+u32tmpoffset), &u32tmpoffset);
2377
2378 printf("GRule_Lvl %u, u16LvlNum=%u, u32Offset=%lx \n",
2379 i, stGRuleLvlInfo.u16LvlNum, stGRuleLvlInfo.u32Offset);
2380 }
2381
2382 // XRule
2383 u32tmpoffset = pPQBinHeader->u32XRule_Offset;
2384 for(i=0; i<pPQBinHeader->u16XRuleNum; i++)
2385 {
2386 MS_PQBin_XRule_Info stXRuleInfo;
2387
2388 stXRuleInfo.u16IPNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32PQBin_Addr+u32tmpoffset), &u32tmpoffset);
2389 stXRuleInfo.u16GroupNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32PQBin_Addr+u32tmpoffset), &u32tmpoffset);
2390 stXRuleInfo.u32IPOffset = MDrv_PQBin_Get4ByteData(pInstance,(void *)(u32PQBin_Addr+u32tmpoffset), &u32tmpoffset);
2391 stXRuleInfo.u32GroupOffset = MDrv_PQBin_Get4ByteData(pInstance,(void *)(u32PQBin_Addr+u32tmpoffset), &u32tmpoffset);
2392
2393 printf("XRule %u, IPNum=%u, GroupNum=%u, IPOffset=%lx, GroupOffset=%lx\n",
2394 i, stXRuleInfo.u16IPNum, stXRuleInfo.u16GroupNum, stXRuleInfo.u32IPOffset, stXRuleInfo.u32GroupOffset);
2395 }
2396
2397 // IP & Common
2398 u32tmpoffset = pPQBinHeader->u32IP_Comm_Offset;
2399 for(i=0; i<pPQBinHeader->u16IP_Comm_Num; i++)
2400 {
2401 MS_PQBin_IP_Common_Info stIPCommInfo;
2402
2403 stIPCommInfo.u16CommRegNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32PQBin_Addr+u32tmpoffset), &u32tmpoffset);
2404 stIPCommInfo.u16IPRegNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32PQBin_Addr+u32tmpoffset), &u32tmpoffset);
2405 stIPCommInfo.u16IPGroupNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32PQBin_Addr+u32tmpoffset), &u32tmpoffset);
2406 stIPCommInfo.u32CommOffset = MDrv_PQBin_Get4ByteData(pInstance,(void *)(u32PQBin_Addr+u32tmpoffset), &u32tmpoffset);
2407 stIPCommInfo.u32IPOffset = MDrv_PQBin_Get4ByteData(pInstance,(void *)(u32PQBin_Addr+u32tmpoffset), &u32tmpoffset);
2408
2409 printf("IP_Comm %u, CommRegNum=%u, IPRegNum=%u, IPGroupNum=%u, CommOffset=%lx, IPOffset=%lx\n",
2410 i,
2411 stIPCommInfo.u16CommRegNum,
2412 stIPCommInfo.u16IPRegNum,
2413 stIPCommInfo.u16IPGroupNum,
2414 stIPCommInfo.u32CommOffset,
2415 stIPCommInfo.u32IPOffset);
2416 }
2417
2418 // SourceLUT
2419 u32tmpoffset = pPQBinHeader->u32SourceLUT_Offset;
2420 for(i=0; i<pPQBinHeader->u16SourceLUT_PnlNum; i++)
2421 {
2422 MS_PQBin_SourceLUT_Info stSourceLUTInfo;
2423
2424 stSourceLUTInfo.u16SourceNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32PQBin_Addr+u32tmpoffset), &u32tmpoffset);
2425 stSourceLUTInfo.u16IPNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32PQBin_Addr+u32tmpoffset), &u32tmpoffset);
2426 stSourceLUTInfo.u32Offset = MDrv_PQBin_Get4ByteData(pInstance,(void *)(u32PQBin_Addr+u32tmpoffset), &u32tmpoffset);
2427
2428 printf("SourceLUT %u, SourceNum=%u, IPNum=%u, Offset=%lx\n",
2429 i,
2430 stSourceLUTInfo.u16SourceNum,
2431 stSourceLUTInfo.u16IPNum,
2432 stSourceLUTInfo.u32Offset);
2433
2434 }
2435 #endif
2436
2437 }
2438
2439
MDrv_PQBin_GetSkipRule(void * pInstance,MS_U16 u16PQIPIdx,const MS_PQBin_Header_Info * const pPQBinHeader)2440 MS_U16 MDrv_PQBin_GetSkipRule(void *pInstance,MS_U16 u16PQIPIdx, const MS_PQBin_Header_Info* const pPQBinHeader)
2441 {
2442 MS_PHYADDR u32Addr;
2443 MS_U32 u32Offset;
2444 MS_U16 u16SkipRet;
2445
2446 u32Addr = pPQBinHeader->u32SkipRule_Offset +
2447 pPQBinHeader->u32BinStartAddress +
2448 PQ_BIN_SKIPRULE_HEADER_LEN;
2449
2450 u32Offset = u16PQIPIdx * 2;
2451 u16SkipRet = MDrv_PQBin_Get2ByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)) , &u32Offset);
2452 return u16SkipRet;
2453 }
2454
MDrv_PQBin_Enable8LBMode(void * pInstance,MS_BOOL bEnable)2455 MS_BOOL MDrv_PQBin_Enable8LBMode(void *pInstance,MS_BOOL bEnable)
2456 {
2457 if(_bMLoadEn)
2458 {
2459 if(bEnable)
2460 {
2461 PQ_REG_MLOAD_WRITE_CMD(REG_SC_BK2A_02_H, BIT(7), BIT(7));
2462 }
2463 else
2464 {
2465 PQ_REG_MLOAD_WRITE_CMD(REG_SC_BK2A_02_H, 0x00, BIT(7));
2466 }
2467 }
2468 else
2469 {
2470 if(bEnable)
2471 {
2472 MApi_XC_W2BYTEMSK(REG_SC_BK2A_02_L, BIT(15), BIT(15));
2473 }
2474 else
2475 {
2476 MApi_XC_W2BYTEMSK(REG_SC_BK2A_02_L, 0x0000, BIT(15));
2477 }
2478 }
2479
2480 return TRUE;
2481 }
2482
MDrv_PQBin_LoadTableBySrcType(void * pInstance,MS_U16 u16PQSrcType,MS_U16 u16PQIPIdx,MS_U16 u16PQPnlIdx,MS_PQBin_Header_Info * pPQBinHeader,PQ_WIN eWindow)2483 void MDrv_PQBin_LoadTableBySrcType(
2484 void *pInstance,
2485 MS_U16 u16PQSrcType,
2486 MS_U16 u16PQIPIdx,
2487 MS_U16 u16PQPnlIdx,
2488 MS_PQBin_Header_Info *pPQBinHeader,
2489 PQ_WIN eWindow)
2490 {
2491 MS_U16 QMIPtype_size,i;
2492 MS_U16 u16TabIdx;
2493 MS_PQBin_IP_Table_Info stTableInfo;
2494
2495 memset(&stTableInfo, 0, sizeof(MS_PQBin_IP_Table_Info));
2496
2497 #if (PQ_ENABLE_PIP)
2498 MS_U16 u16SFilter = 0;
2499 #endif
2500
2501 if (u16PQIPIdx==PQ_BIN_IP_ALL)
2502 {
2503 QMIPtype_size= MDrv_PQBin_GetIPNum(pInstance,pPQBinHeader);
2504 u16PQIPIdx=0;
2505 }
2506 else
2507 {
2508 QMIPtype_size=1;
2509 }
2510
2511
2512 for(i=0; i<QMIPtype_size; i++, u16PQIPIdx++)
2513 {
2514 if ( MDrv_PQBin_GetSkipRule(pInstance,u16PQIPIdx, pPQBinHeader))
2515 {
2516 PQ_BIN_DBG(printf("skip ip idx:%u\n", u16PQIPIdx));
2517 continue;
2518 }
2519
2520 if(pPQBinHeader->u8BinID < PQ_BIN_CUSTOMER_MAIN )
2521 {
2522 if(PQ_MAIN_WINDOW == eWindow)
2523 {
2524 //if now it's going to dump HSD_Y and HSD_C, just skip it.
2525 if((u16PQIPIdx == PQ_IP_HSD_C_Main) || (u16PQIPIdx == PQ_IP_HSD_Y_Main))
2526 {
2527 PQ_BIN_DBG(printf("skip ip idx:%u because of customer scaling case\n", u16PQIPIdx));
2528 continue;
2529 }
2530 }
2531 #if (PQ_ENABLE_PIP)
2532 else
2533 {
2534 //if now it's going to dump HSD_Y and HSD_C, just skip it.
2535 if((u16PQIPIdx == PQ_IP_HSD_C_Sub) || (u16PQIPIdx == PQ_IP_HSD_Y_Sub))
2536 {
2537 PQ_BIN_DBG(printf("skip ip idx:%u because of customer scaling case\n", u16PQIPIdx));
2538 continue;
2539 }
2540 }
2541 #endif
2542 }
2543
2544 u16TabIdx = MDrv_PQBin_GetTableIndex(pInstance,u16PQSrcType,
2545 u16PQIPIdx,
2546 u16PQPnlIdx,
2547 pPQBinHeader);
2548
2549 PQ_BIN_DBG(printf("[PQ]SrcType=%u, IPIdx=%u, TabIdx=%u\n",
2550 u16PQSrcType, u16PQIPIdx, u16TabIdx));
2551 PQ_BIN_DBG_SRAMERROR(printf("----------MDrv_PQBin_LoadTableBySrcType:u16TabIdx=%u, u16PQIPIdx=%u\n", u16TabIdx, u16PQIPIdx));
2552
2553 MDrv_PQBin_GetTable(pInstance,u16PQPnlIdx,
2554 u16TabIdx,
2555 u16PQIPIdx,
2556 &stTableInfo,
2557 pPQBinHeader);
2558
2559 #if (PQ_ENABLE_PIP)
2560 //Sub SRAM3,4 dumping will make main window flash, so set it to 0x0303 to skip sram affection.
2561 if(((u16PQIPIdx == PQ_IP_SRAM3_Sub) || (u16PQIPIdx == PQ_IP_SRAM4_Sub) ) && (PQ_SUB_WINDOW == eWindow)
2562 &&((E_XC_3D_OUTPUT_LINE_ALTERNATIVE == MApi_XC_Get_3D_Output_Mode())
2563 || (E_XC_3D_OUTPUT_TOP_BOTTOM == MApi_XC_Get_3D_Output_Mode())
2564 || (E_XC_3D_OUTPUT_SIDE_BY_SIDE_HALF == MApi_XC_Get_3D_Output_Mode())
2565 || (E_XC_3D_OUTPUT_TOP_BOTTOM_HW == MApi_XC_Get_3D_Output_Mode())
2566 || (E_XC_3D_OUTPUT_SIDE_BY_SIDE_HALF_HW == MApi_XC_Get_3D_Output_Mode())))
2567 {
2568 u16SFilter = MApi_XC_R2BYTE(REG_SC_BK23_0B_L);
2569 MApi_XC_W2BYTEMSK(REG_SC_BK23_0B_L, 0x0303 , 0xFFFF );
2570 }
2571 #endif
2572 #ifdef UFO_XC_PIP_PATCH_USING_SC1_MAIN_AS_SC0_SUB
2573 if(eWindow==PQ_SUB_WINDOW)
2574 MDrv_PQBin_DumpTable_Main2(pInstance,&stTableInfo);
2575 else
2576 #endif
2577 {
2578 MDrv_PQBin_DumpTable(pInstance,&stTableInfo);
2579 }
2580 #if (PQ_ENABLE_PIP)
2581 if(((u16PQIPIdx == PQ_IP_SRAM3_Sub) || (u16PQIPIdx == PQ_IP_SRAM4_Sub) ) && (PQ_SUB_WINDOW == eWindow)
2582 &&((E_XC_3D_OUTPUT_LINE_ALTERNATIVE == MApi_XC_Get_3D_Output_Mode())
2583 || (E_XC_3D_OUTPUT_TOP_BOTTOM == MApi_XC_Get_3D_Output_Mode())
2584 || (E_XC_3D_OUTPUT_SIDE_BY_SIDE_HALF == MApi_XC_Get_3D_Output_Mode())
2585 || (E_XC_3D_OUTPUT_TOP_BOTTOM_HW == MApi_XC_Get_3D_Output_Mode())
2586 || (E_XC_3D_OUTPUT_SIDE_BY_SIDE_HALF_HW == MApi_XC_Get_3D_Output_Mode())))
2587 {
2588 MApi_XC_W2BYTEMSK(REG_SC_BK23_0B_L, u16SFilter , 0xFFFF );
2589 }
2590 #endif
2591 }
2592 }
2593
2594
MDrv_PQBin_GetXRuleTableIndex(void * pInstance,MS_U16 u16XRuleType,MS_U16 u16XRuleIdx,MS_U16 u16XRuleIP,const MS_PQBin_Header_Info * const pPQBinHeader)2595 MS_U16 MDrv_PQBin_GetXRuleTableIndex(void *pInstance,MS_U16 u16XRuleType, MS_U16 u16XRuleIdx, MS_U16 u16XRuleIP, const MS_PQBin_Header_Info* const pPQBinHeader)
2596 {
2597 MS_PHYADDR u32Addr;
2598 MS_U32 u32Offset;
2599 MS_PHYADDR u32Rule_Addr;
2600 MS_U32 u32Rule_Offset;
2601 MS_U16 u16IPNum;
2602 MS_U16 u16TableIdx;
2603
2604 u32Addr = pPQBinHeader->u32XRule_Offset + pPQBinHeader->u32BinStartAddress;
2605
2606 u32Offset = pPQBinHeader->u32XRUle_Pitch * u16XRuleType + PQ_BIN_XRULE_IP_NUM_OFFSET;
2607 u16IPNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32Addr+u32Offset), &u32Offset);
2608
2609 u32Offset = pPQBinHeader->u32XRUle_Pitch * u16XRuleType + PQ_BIN_XRULE_GROUPOFFSET_OFFSET;
2610 u32Rule_Addr = MDrv_PQBin_Get4ByteData(pInstance,(void *)(u32Addr+u32Offset), &u32Offset) +
2611 pPQBinHeader->u32BinStartAddress;
2612
2613
2614 u32Rule_Offset = (u16IPNum * u16XRuleIdx + u16XRuleIP) * PQ_BIN_SOURCELUT_DATA_LEN;
2615 #if PQ_BIN_SOURCELUT_DATA_LEN == 2
2616 u16TableIdx = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32Rule_Addr+u32Rule_Offset), &u32Rule_Offset);
2617 #else
2618 u16TableIdx = (MS_U16)MDrv_PQBin_GetByteData(pInstance,(void *)(u32Rule_Addr+u32Rule_Offset), &u32Rule_Offset);
2619 #endif
2620 PQ_BIN_XRULE_DBG(printf("[PQBin_XRule]: TableIdx=%u\n", u16TableIdx));
2621 return u16TableIdx;
2622
2623 }
2624
MDrv_PQBin_GetXRuleIPIndex(void * pInstance,MS_U16 u16XRuleType,MS_U16 u16XRuleIP,const MS_PQBin_Header_Info * const pPQBinHeader)2625 MS_U16 MDrv_PQBin_GetXRuleIPIndex(void *pInstance,MS_U16 u16XRuleType, MS_U16 u16XRuleIP, const MS_PQBin_Header_Info* const pPQBinHeader)
2626 {
2627 MS_PHYADDR u32Addr;
2628 MS_U32 u32Offset;
2629 MS_PHYADDR u32IP_Addr;
2630 MS_U32 u32IP_Offset;
2631 MS_U16 u16IPIdx;
2632
2633 u32Addr = pPQBinHeader->u32XRule_Offset + pPQBinHeader->u32BinStartAddress;
2634 u32Offset = pPQBinHeader->u32XRUle_Pitch * u16XRuleType + PQ_BIN_XRULE_IPOFFSET_OFFSET;
2635
2636 u32IP_Addr = MDrv_PQBin_Get4ByteData(pInstance,(void *)(u32Addr+u32Offset), &u32Offset) +
2637 pPQBinHeader->u32BinStartAddress + PQ_BIN_XRULE_HEADER_LEN;
2638
2639 u32IP_Offset = u16XRuleIP * 2;
2640
2641 u16IPIdx = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32IP_Addr+u32IP_Offset), &u32IP_Offset);
2642
2643 PQ_BIN_XRULE_DBG(printf("[PQBin_XRule]: IPIdx=%u\n", u16IPIdx));
2644 return u16IPIdx;
2645
2646 }
2647
MDrv_PQBin_GetXRuleIPNum(void * pInstance,MS_U16 u16XRuleType,const MS_PQBin_Header_Info * const pPQBinHeader)2648 MS_U16 MDrv_PQBin_GetXRuleIPNum(void *pInstance,MS_U16 u16XRuleType, const MS_PQBin_Header_Info* const pPQBinHeader)
2649 {
2650 MS_PHYADDR u32Addr;
2651 MS_U32 u32Offset;
2652 MS_U16 u16IPNum;
2653
2654 u32Addr = pPQBinHeader->u32XRule_Offset + pPQBinHeader->u32BinStartAddress;
2655 u32Offset = pPQBinHeader->u32XRUle_Pitch * u16XRuleType + PQ_BIN_XRULE_IP_NUM_OFFSET;
2656 u16IPNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32Addr+u32Offset), &u32Offset);
2657
2658 PQ_BIN_XRULE_DBG(printf("[PQBin_XRule]: IPNum=%u\n", u16IPNum));
2659 return u16IPNum;
2660 }
2661
2662
2663
MDrv_PQBin_GetGRule_LevelIndex(void * pInstance,MS_U16 u16PnlIdx,MS_U16 u16GRuleType,MS_U16 u16GRuleLvlIndex,const MS_PQBin_Header_Info * const pPQBinHeader)2664 MS_U16 MDrv_PQBin_GetGRule_LevelIndex(
2665 void *pInstance,
2666 MS_U16 u16PnlIdx,
2667 MS_U16 u16GRuleType,
2668 MS_U16 u16GRuleLvlIndex,
2669 const MS_PQBin_Header_Info* const pPQBinHeader)
2670 {
2671 MS_PHYADDR u32Addr, u32Lvl_Addr;
2672 MS_U32 u32Offset;
2673 MS_U16 u16LvlNum;
2674 MS_U16 u16LvlIdx;
2675
2676 if(u16PnlIdx >= pPQBinHeader->u16GRule_PnlNum)
2677 {
2678 MS_ASSERT(0);
2679 printf("GRue: Pnl idx out of rage =%u\n", u16PnlIdx);
2680 return PQ_BIN_IP_NULL;
2681 }
2682
2683 u32Addr = pPQBinHeader->u32GRule_Lvl_Offset + pPQBinHeader->u32BinStartAddress;
2684
2685 u32Offset = pPQBinHeader->u32GRule_Lvl_Pitch * (MS_U32) (u16PnlIdx + pPQBinHeader->u16GRule_PnlNum * u16GRuleType) +
2686 PQ_BIN_GRULE_LEVEL_LVL_NUM_OFFSET;
2687 u16LvlNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32Addr+u32Offset), &u32Offset);
2688
2689 if(u16GRuleLvlIndex >= u16LvlNum)
2690 {
2691 MS_ASSERT(0);
2692 printf("GRule: lvl idx out of rage =%u\n", u16GRuleLvlIndex);
2693 return PQ_BIN_IP_NULL;
2694 }
2695
2696 u32Addr = pPQBinHeader->u32GRule_Lvl_Offset + pPQBinHeader->u32BinStartAddress;
2697 u32Offset = pPQBinHeader->u32GRule_Lvl_Pitch * (MS_U32) (u16PnlIdx + pPQBinHeader->u16GRule_PnlNum * u16GRuleType) +
2698 PQ_BIN_GRULE_LEVEL_OFFSET_OFFSET;
2699
2700 u32Lvl_Addr = MDrv_PQBin_Get4ByteData(pInstance,(void *)(u32Addr+u32Offset), &u32Offset);
2701
2702 u32Addr = u32Lvl_Addr + pPQBinHeader->u32BinStartAddress;
2703 u32Offset = PQ_BIN_GRULE_HEADER_LEN + u16GRuleLvlIndex * 2;
2704
2705 u16LvlIdx = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32Addr+u32Offset), &u32Offset);
2706
2707 PQ_BIN_GRULE_DBG(printf("[PQBin_GRule: LvlIdx=%u\n", u16LvlIdx));
2708 return u16LvlIdx;
2709 }
2710
2711
MDrv_PQBin_GetGRule_IPIndex(void * pInstance,MS_U16 u16GRuleType,MS_U16 u16GRuleIPIndex,const MS_PQBin_Header_Info * const pPQBinHeader)2712 MS_U16 MDrv_PQBin_GetGRule_IPIndex(
2713 void *pInstance,
2714 MS_U16 u16GRuleType,
2715 MS_U16 u16GRuleIPIndex,
2716 const MS_PQBin_Header_Info* const pPQBinHeader)
2717 {
2718 MS_PHYADDR u32Addr, u32IP_Addr;
2719 MS_U32 u32IP_Offset, u32Offset;
2720 MS_U16 u16IPIdx;
2721
2722 if(u16GRuleType >= pPQBinHeader->u16GRule_RuleNum)
2723 {
2724 MS_ASSERT(0);
2725 printf("GRule: ruleid out of range=%u\n", u16GRuleType);
2726 return PQ_BIN_IP_NULL;
2727 }
2728
2729 u32Addr = pPQBinHeader->u32GRule_Offset + pPQBinHeader->u32BinStartAddress;
2730 u32Offset = pPQBinHeader->u32GRule_Pitch * u16GRuleType +
2731 PQ_BIN_GRULE_IPOFFSET_OFFSET;
2732
2733 u32IP_Addr = MDrv_PQBin_Get4ByteData(pInstance,(void *)(u32Addr+u32Offset), &u32Offset) +
2734 pPQBinHeader->u32BinStartAddress + PQ_BIN_GRULE_HEADER_LEN;
2735 u32IP_Offset = u16GRuleIPIndex * 2;
2736
2737 u16IPIdx = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32IP_Addr+u32IP_Offset), &u32IP_Offset);
2738
2739 PQ_BIN_GRULE_DBG(printf("[PQBin_GRule: IPIdx=%u\n", u16IPIdx));
2740 return u16IPIdx;
2741 }
2742
MDrv_PQBin_GetGRule_TableIndex(void * pInstance,MS_U16 u16GRuleType,MS_U16 u16PQSrcType,MS_U16 u16PQ_NRIdx,MS_U16 u16GRuleIPIndex,const MS_PQBin_Header_Info * const pPQBinHeader)2743 MS_U16 MDrv_PQBin_GetGRule_TableIndex(
2744 void *pInstance,
2745 MS_U16 u16GRuleType,
2746 MS_U16 u16PQSrcType,
2747 MS_U16 u16PQ_NRIdx,
2748 MS_U16 u16GRuleIPIndex,
2749 const MS_PQBin_Header_Info* const pPQBinHeader)
2750 {
2751 MS_PHYADDR u32Addr, u32Rule_Addr;
2752 MS_U32 u32Offset, u32Rule_Offset;
2753 MS_U16 u16GroupNum, u16IPNum, u16SrcNum;
2754 MS_U16 u16TableIdx;
2755
2756 if(u16GRuleType >= pPQBinHeader->u16GRule_RuleNum)
2757 {
2758 MS_ASSERT(0);
2759 printf("GRule: ruleid out of range=%u\n", u16GRuleType);
2760 return PQ_BIN_IP_NULL;
2761 }
2762
2763 u32Addr = pPQBinHeader->u32GRule_Offset + pPQBinHeader->u32BinStartAddress;
2764
2765 u32Offset = pPQBinHeader->u32GRule_Pitch * u16GRuleType + PQ_BIN_GRULE_GROUP_NUM_OFFSET;
2766 u16GroupNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32Addr+u32Offset), &u32Offset);
2767
2768 u32Offset = pPQBinHeader->u32GRule_Pitch * u16GRuleType + PQ_BIN_GRULE_IP_NUM_OFFSET;
2769 u16IPNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32Addr+u32Offset), &u32Offset);
2770
2771 u32Offset = pPQBinHeader->u32GRule_Pitch * u16GRuleType + PQ_BIN_GRULE_SOURCE_NUM_OFFSET;
2772 u16SrcNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32Addr+u32Offset), &u32Offset);
2773
2774
2775
2776 if(u16PQSrcType >= u16SrcNum)
2777 {
2778 MS_ASSERT(0);
2779 printf("GRule: SrcIdx out of range =%u\n", u16PQSrcType);
2780 return PQ_BIN_IP_NULL;
2781 }
2782
2783 if(u16PQ_NRIdx >= u16GroupNum)
2784 {
2785 MS_ASSERT(0);
2786 printf("GRule: GroupIdx out of range =%u\n", u16PQ_NRIdx);
2787 return PQ_BIN_IP_NULL;
2788 }
2789
2790 if(u16GRuleIPIndex >= u16IPNum)
2791 {
2792 MS_ASSERT(0);
2793 printf("GRule: IPIdx out of range =%u\n", u16GRuleIPIndex);
2794 return PQ_BIN_IP_NULL;
2795 }
2796
2797
2798 u32Offset = pPQBinHeader->u32GRule_Pitch * u16GRuleType + PQ_BIN_GRULE_RULEOFFSET_OFFSET;
2799 u32Rule_Addr = MDrv_PQBin_Get4ByteData(pInstance,(void *)(u32Addr+u32Offset), &u32Offset) +
2800 pPQBinHeader->u32BinStartAddress + PQ_BIN_GRULE_HEADER_LEN;
2801
2802
2803 u32Rule_Offset = (u16IPNum * u16GroupNum * u16PQSrcType +
2804 u16IPNum * u16PQ_NRIdx +
2805 u16GRuleIPIndex) * PQ_BIN_SOURCELUT_DATA_LEN;
2806 #if PQ_BIN_SOURCELUT_DATA_LEN == 2
2807 u16TableIdx = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32Rule_Addr+u32Rule_Offset), &u32Rule_Offset);
2808 #else
2809 u16TableIdx = (MS_U16)MDrv_PQBin_GetByteData(pInstance,(void *)(u32Rule_Addr+u32Rule_Offset), &u32Rule_Offset);
2810 #endif
2811 PQ_BIN_GRULE_DBG(printf("[PQBin_GRule: TabIdx=%u\n", u16TableIdx));
2812 return u16TableIdx;
2813 }
2814
MDrv_PQBin_GetGRule_LvlNum(void * pInstance,MS_U16 u16PnlIdx,MS_U16 u16GRuleType,const MS_PQBin_Header_Info * const pPQBinHeader)2815 MS_U16 MDrv_PQBin_GetGRule_LvlNum(
2816 void *pInstance,
2817 MS_U16 u16PnlIdx,
2818 MS_U16 u16GRuleType,
2819 const MS_PQBin_Header_Info* const pPQBinHeader)
2820 {
2821 MS_PHYADDR u32Addr;
2822 MS_U32 u32Offset;
2823 MS_U16 u16LvlNum;
2824
2825 if(u16PnlIdx >= pPQBinHeader->u16GRule_PnlNum)
2826 {
2827 //MS_ASSERT(0);
2828 printf("=ERROR!!!=%s, %d, =%d, out of %d, =\n", __FUNCTION__, __LINE__, u16PnlIdx, pPQBinHeader->u16GRule_PnlNum);
2829 return PQ_BIN_IP_NULL;
2830 }
2831
2832 if(u16GRuleType >= pPQBinHeader->u16GRule_RuleNum)
2833 {
2834 printf("=ERROR!!!=%s, %d, =%d, out of %d, =\n", __FUNCTION__, __LINE__, u16GRuleType, pPQBinHeader->u16GRule_RuleNum);
2835 // MS_ASSERT(0);
2836 return PQ_BIN_IP_NULL;
2837 }
2838
2839 u32Addr = pPQBinHeader->u32GRule_Lvl_Offset + pPQBinHeader->u32BinStartAddress;
2840
2841 u32Offset = pPQBinHeader->u32GRule_Lvl_Pitch * (MS_U32) (u16PnlIdx + pPQBinHeader->u16GRule_PnlNum * u16GRuleType) +
2842 PQ_BIN_GRULE_LEVEL_LVL_NUM_OFFSET;
2843 u16LvlNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32Addr+u32Offset), &u32Offset);
2844
2845 return u16LvlNum;
2846 }
MDrv_PQBin_GetGRule_IPNum(void * pInstance,MS_U16 u16GRuleType,const MS_PQBin_Header_Info * const pPQBinHeader)2847 MS_U16 MDrv_PQBin_GetGRule_IPNum(void *pInstance,MS_U16 u16GRuleType, const MS_PQBin_Header_Info* const pPQBinHeader)
2848 {
2849 MS_PHYADDR u32Addr;
2850 MS_U32 u32Offset;
2851 MS_U16 u16IPNum;
2852
2853 if(u16GRuleType >= pPQBinHeader->u16GRule_RuleNum)
2854 {
2855 printf("=ERROR!!!=%s, %d, =%d, out of %d, =\n", __FUNCTION__, __LINE__, u16GRuleType, pPQBinHeader->u16GRule_RuleNum);
2856 // MS_ASSERT(0);
2857 return PQ_BIN_IP_NULL;
2858 }
2859
2860 u32Addr = pPQBinHeader->u32GRule_Offset + pPQBinHeader->u32BinStartAddress;
2861
2862 u32Offset = pPQBinHeader->u32GRule_Pitch * u16GRuleType + PQ_BIN_GRULE_IP_NUM_OFFSET;
2863 u16IPNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32Addr+u32Offset), &u32Offset);
2864
2865 return u16IPNum;
2866 }
2867
MDrv_PQBin_GetGRule_GroupNum(void * pInstance,MS_U16 u16GRuleType,const MS_PQBin_Header_Info * const pPQBinHeader)2868 MS_U16 MDrv_PQBin_GetGRule_GroupNum(void *pInstance,MS_U16 u16GRuleType, const MS_PQBin_Header_Info* const pPQBinHeader)
2869 {
2870 MS_PHYADDR u32Addr;
2871 MS_U32 u32Offset;
2872 MS_U16 u16GroupNum;
2873
2874 if(u16GRuleType >= pPQBinHeader->u16GRule_RuleNum)
2875 {
2876 printf("=ERROR!!!=%s, %d, =%d, out of %d, =\n", __FUNCTION__, __LINE__, u16GRuleType, pPQBinHeader->u16GRule_RuleNum);
2877 // MS_ASSERT(0);
2878 return PQ_BIN_IP_NULL;
2879 }
2880
2881 u32Addr = pPQBinHeader->u32GRule_Offset + pPQBinHeader->u32BinStartAddress;
2882
2883 u32Offset = pPQBinHeader->u32GRule_Pitch * u16GRuleType + PQ_BIN_GRULE_GROUP_NUM_OFFSET;
2884 u16GroupNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32Addr+u32Offset), &u32Offset);
2885
2886 return u16GroupNum;
2887 }
2888
MDrv_PQBin_CheckCommTable(void * pInstance,MS_U16 u16PnlIdx,MS_PQBin_Header_Info * pPQBinHeader)2889 void MDrv_PQBin_CheckCommTable(void *pInstance,MS_U16 u16PnlIdx, MS_PQBin_Header_Info * pPQBinHeader)
2890 {
2891 #if (PQ_ENABLE_CHECK == 1)
2892 _u8PQBinfunction = PQ_FUNC_CHK_REG;
2893 MDrv_PQBin_LoadCommTable(pInstance,u16PnlIdx, pPQBinHeader);
2894 _u8PQBinfunction = PQ_FUNC_DUMP_REG;
2895 #else
2896 UNUSED(u16PnlIdx);
2897 UNUSED(pPQBinHeader);
2898 #endif
2899 }
2900
MDrv_PQBin_CheckTableBySrcType(void * pInstance,MS_U16 u16PQSrcType,MS_U16 u16PQIPIdx,MS_U16 u16PQPnlIdx,MS_PQBin_Header_Info * pPQBinHeader,PQ_WIN eWindow)2901 void MDrv_PQBin_CheckTableBySrcType(
2902 void *pInstance,
2903 MS_U16 u16PQSrcType,
2904 MS_U16 u16PQIPIdx,
2905 MS_U16 u16PQPnlIdx,
2906 MS_PQBin_Header_Info * pPQBinHeader,
2907 PQ_WIN eWindow)
2908 {
2909 #if (PQ_ENABLE_CHECK == 1)
2910 _u8PQBinfunction = PQ_FUNC_CHK_REG;
2911 MDrv_PQBin_LoadTableBySrcType(pInstance,u16PQSrcType,
2912 u16PQIPIdx,
2913 u16PQPnlIdx,
2914 pPQBinHeader,
2915 eWindow);
2916 _u8PQBinfunction = PQ_FUNC_DUMP_REG;
2917 #else
2918 UNUSED(u16PQSrcType);
2919 UNUSED(u16PQIPIdx);
2920 UNUSED(u16PQPnlIdx);
2921 UNUSED(pPQBinHeader);
2922 UNUSED(eWindow);
2923 #endif
2924 }
2925
MDrv_PQBin_SetDisplayType(void * pInstance,PQ_BIN_DISPLAY_TYPE enDisplayType)2926 void MDrv_PQBin_SetDisplayType(void *pInstance,PQ_BIN_DISPLAY_TYPE enDisplayType)
2927 {
2928 _gPQBinDisplayType = enDisplayType;
2929 }
2930
MDrv_PQBin_GetDisplayType(void * pInstance)2931 PQ_BIN_DISPLAY_TYPE MDrv_PQBin_GetDisplayType(void *pInstance)
2932 {
2933 return (PQ_BIN_DISPLAY_TYPE)_gPQBinDisplayType;
2934 }
2935
MDrv_PQBin_SetPanelID(void * pInstance,MS_U8 u8PnlIDx)2936 void MDrv_PQBin_SetPanelID(void *pInstance,MS_U8 u8PnlIDx)
2937 {
2938 _gPQBinPnlIdx = u8PnlIDx;
2939 }
2940
MDrv_PQBin_GetPanelIdx(void * pInstance)2941 MS_U8 MDrv_PQBin_GetPanelIdx(void *pInstance)
2942 {
2943 #if (PQ_ENABLE_PIP)
2944 return _gPQBinPnlIdx * PQ_BIN_DISPLAY_NUM + _gPQBinDisplayType;
2945 #else
2946 return _gPQBinPnlIdx * 1 + _gPQBinDisplayType;
2947 #endif
2948 }
2949
MDrv_PQBin_GetPanelIdx_UFSC(void * pInstance)2950 MS_U8 MDrv_PQBin_GetPanelIdx_UFSC(void *pInstance)
2951 {
2952 return _gPQBinPnlIdx;
2953 }
2954
MDrv_PQBin_Set_MLoadEn(void * pInstance,MS_BOOL bEn)2955 void MDrv_PQBin_Set_MLoadEn(void *pInstance,MS_BOOL bEn)
2956 {
2957 if(bEn == DISABLE)
2958 {
2959 //if spread reg, no need to use mutex, but it's ok to use mutex
2960 // (because it's not MApi_XC_W2BYTE(), which has mutex already)
2961 //if not spread reg, must use mutex to protect MLoad_trigger func.
2962 SC_BK_STORE_MUTEX;
2963
2964 if(_u16MLoadCmdCnt)
2965 {
2966 #if(ENABLE_PQ_MLOAD)
2967 MApi_XC_MLoad_WriteCmds_And_Fire(
2968 &_u32MLoadCmd[0], &_u16MLoadVal[0], &_u16MLoadMsk[0], _u16MLoadCmdCnt);
2969 #endif
2970
2971 _u16MLoadCmdCnt = 0;
2972 }
2973
2974 SC_BK_RESTORE_MUTEX;
2975 }
2976
2977 _bMLoadEn = bEn;
2978 }
2979
2980 //------------------------------------------------------------------------------
2981 // Text Bin function
2982 //------------------------------------------------------------------------------
MDrv_PQTextBin_Parsing(void * pInstance,MS_PQTextBin_Header_Info * pPQTextBinHeader)2983 void MDrv_PQTextBin_Parsing(void *pInstance,MS_PQTextBin_Header_Info *pPQTextBinHeader)
2984 {
2985 MS_PHYADDR u32PQBin_Addr;
2986 MS_U32 u32Offset;
2987 #if PQ_BIN_DBG_HEADER_DATA
2988 MS_U32 u32tmpoffset;
2989 #endif
2990 MS_U8 i;
2991
2992 u32Offset = 0;
2993 u32PQBin_Addr = pPQTextBinHeader->u32BinStartAddress;
2994 printf("TextBinStartaDDR ID%u=%tx\n", pPQTextBinHeader->u8BinID, (ptrdiff_t) u32PQBin_Addr);
2995 for(i=0; i< PQ_TEXT_BIN_HEADER_LEN; i++)
2996 {
2997 pPQTextBinHeader->u8Header[i] = MDrv_PQBin_GetByteData(pInstance,(void *)(u32PQBin_Addr+u32Offset), &u32Offset);
2998 }
2999
3000 for(i=0; i< PQ_TEXT_BIN_HEADER_LEN; i++)
3001 {
3002 pPQTextBinHeader->u8Version[i] = MDrv_PQBin_GetByteData(pInstance,(void *)(u32PQBin_Addr+u32Offset), &u32Offset);
3003 }
3004
3005
3006 pPQTextBinHeader->u32StartOffset = MDrv_PQBin_Get4ByteData(pInstance,(void *)(u32PQBin_Addr+u32Offset), &u32Offset);
3007 pPQTextBinHeader->u32EndOffset = MDrv_PQBin_Get4ByteData(pInstance,(void *)(u32PQBin_Addr+u32Offset), &u32Offset);
3008
3009 for(i=0; i< PQ_TEXT_BIN_DUMMY; i++)
3010 {
3011 pPQTextBinHeader->u8Dummy[i] = MDrv_PQBin_GetByteData(pInstance,(void *)(u32PQBin_Addr+u32Offset), &u32Offset);
3012 }
3013
3014 PQ_TEXT_BIN_DBG_HEADER(printf("Header :%16s\n", pPQTextBinHeader->u8Header));
3015 PQ_TEXT_BIN_DBG_HEADER(printf("Version:%16s\n", pPQTextBinHeader->u8Version));
3016 PQ_TEXT_BIN_DBG_HEADER(printf("startADDR=%lx, pPQTextBinHeader=%lx\n", pPQTextBinHeader->u32StartOffset, pPQTextBinHeader->u32EndOffset));
3017 PQ_TEXT_BIN_DBG_HEADER(printf("Dummy :%8s\n", pPQTextBinHeader->u8Dummy));
3018
3019
3020 // SrcType
3021 for(i=0; i< PQ_TEXT_BIN_HEADER_LEN; i++)
3022 {
3023 pPQTextBinHeader->u8SrcTypeHeader[i] = MDrv_PQBin_GetByteData(pInstance,(void *)(u32PQBin_Addr+u32Offset), &u32Offset);
3024 }
3025 pPQTextBinHeader->u16SrcNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32PQBin_Addr+u32Offset), &u32Offset);
3026
3027 PQ_TEXT_BIN_DBG_HEADER(printf("SrcTypeHeader:%16s\n", pPQTextBinHeader->u8SrcTypeHeader));
3028 PQ_TEXT_BIN_DBG_HEADER(printf("SrcType: RuleNum=%u\n", pPQTextBinHeader->u16SrcNum));
3029
3030 pPQTextBinHeader->u32SrcType_Offset = u32Offset;
3031 pPQTextBinHeader->u32SrcType_Pitch = PQ_TEXT_BIN_SRCTYPE_INFO_SIZE;
3032 u32Offset += pPQTextBinHeader->u32SrcType_Pitch * (MS_U32)pPQTextBinHeader->u16SrcNum;
3033
3034 PQ_TEXT_BIN_DBG_HEADER(printf("SrcType: offset=%lx, pitch=%lu\n",pPQTextBinHeader->u32SrcType_Offset, pPQTextBinHeader->u32SrcType_Pitch));
3035 PQ_TEXT_BIN_DBG_HEADER(printf("IPName Start:%lx\n", u32Offset));
3036
3037 // IP Name
3038 for(i=0; i< PQ_TEXT_BIN_HEADER_LEN; i++)
3039 {
3040 pPQTextBinHeader->u8IPNameHeader[i] = MDrv_PQBin_GetByteData(pInstance,(void *)(u32PQBin_Addr+u32Offset), &u32Offset);
3041 }
3042 pPQTextBinHeader->u16IPNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32PQBin_Addr+u32Offset), &u32Offset);
3043
3044 PQ_TEXT_BIN_DBG_HEADER(printf("IPNameHeader:%16s\n", pPQTextBinHeader->u8IPNameHeader));
3045 PQ_TEXT_BIN_DBG_HEADER(printf("IPName: IPNum=%u\n", pPQTextBinHeader->u16IPNum));
3046
3047 pPQTextBinHeader->u32IPName_Offset = u32Offset;
3048 pPQTextBinHeader->u32IPName_Pitch = PQ_TEXT_BIN_IPNAME_INFO_SIZE;
3049 u32Offset += pPQTextBinHeader->u32IPName_Pitch * (MS_U32)pPQTextBinHeader->u16IPNum;
3050
3051 PQ_TEXT_BIN_DBG_HEADER(printf("IPName: offset=%lx, pitch=%lu\n",pPQTextBinHeader->u32IPName_Offset, pPQTextBinHeader->u32IPName_Pitch));
3052 PQ_TEXT_BIN_DBG_HEADER(printf("GroupName Start:%lx\n", u32Offset));
3053
3054 // Group Name
3055 for(i=0; i< PQ_TEXT_BIN_HEADER_LEN; i++)
3056 {
3057 pPQTextBinHeader->u8GroupNameHeader[i] = MDrv_PQBin_GetByteData(pInstance,(void *)(u32PQBin_Addr+u32Offset), &u32Offset);
3058 }
3059 pPQTextBinHeader->u16GroupIPNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32PQBin_Addr+u32Offset), &u32Offset);
3060
3061 PQ_TEXT_BIN_DBG_HEADER(printf("GroupName:%16s\n", pPQTextBinHeader->u8GroupNameHeader));
3062 PQ_TEXT_BIN_DBG_HEADER(printf("GroupName: IPNum=%u\n", pPQTextBinHeader->u16GroupIPNum));
3063
3064 pPQTextBinHeader->u32IP_Group_Offset = u32Offset;
3065 pPQTextBinHeader->u32IP_Group_pitch = PQ_TEXT_BIN_GROUPNAME_INFO_SIZE;
3066 u32Offset += pPQTextBinHeader->u32IP_Group_pitch * (MS_U32)pPQTextBinHeader->u16GroupIPNum;
3067
3068 PQ_TEXT_BIN_DBG_HEADER(printf("IPName: offset=%lx, pitch=%lu\n",pPQTextBinHeader->u32IP_Group_Offset, pPQTextBinHeader->u32IP_Group_pitch));
3069 PQ_TEXT_BIN_DBG_HEADER(printf("Group Start:%lx\n", u32Offset));
3070
3071 }
3072
MDrv_PQTextBin_GetSrcType(void * pInstance,MS_U16 u16SrcIdx,const MS_PQTextBin_Header_Info * const pPQTextBinHeader)3073 MS_U32 MDrv_PQTextBin_GetSrcType(void *pInstance,MS_U16 u16SrcIdx, const MS_PQTextBin_Header_Info* const pPQTextBinHeader)
3074 {
3075 MS_PHYADDR u32Addr;
3076 MS_U32 u32Offset;
3077 MS_U32 u32DstAddr;
3078
3079 if(u16SrcIdx >= pPQTextBinHeader->u16SrcNum)
3080 {
3081 MS_ASSERT(0);
3082 printf("[PQBinText] GetSrcType:: SrcIdx Out of range %u\n", u16SrcIdx);
3083 u16SrcIdx = 0;
3084 }
3085 u32Addr = pPQTextBinHeader->u32SrcType_Offset + pPQTextBinHeader->u32BinStartAddress;
3086 u32Offset = pPQTextBinHeader->u32SrcType_Pitch * u16SrcIdx +
3087 PQ_TEXT_BIN_SRCTYPE_OFFSET_OFFSET;
3088
3089 u32DstAddr = MDrv_PQBin_Get4ByteData(pInstance,(void *)(u32Addr+u32Offset), &u32Offset) +
3090 pPQTextBinHeader->u32BinStartAddress;
3091
3092 PQ_TEXT_BIN_DBG(printf("PQTextBin SrcType: Addr%lx, SrcIdx%u\n", u32DstAddr, u16SrcIdx));
3093 return u32DstAddr;
3094 }
3095
MDrv_PQTextBin_GetIPName(void * pInstance,MS_U16 u16PQIPIdx,const MS_PQTextBin_Header_Info * const pPQTextBinHeader)3096 MS_U32 MDrv_PQTextBin_GetIPName(void *pInstance,MS_U16 u16PQIPIdx, const MS_PQTextBin_Header_Info* const pPQTextBinHeader)
3097 {
3098 MS_PHYADDR u32Addr;
3099 MS_U32 u32Offset;
3100 MS_U32 u32DstAddr;
3101
3102 if(u16PQIPIdx >= pPQTextBinHeader->u16IPNum)
3103 {
3104 MS_ASSERT(0);
3105 printf("[PQBinText] GetIPName:: IPIdx Out of range %u\n", u16PQIPIdx);
3106 u16PQIPIdx = 0;
3107 }
3108 u32Addr = pPQTextBinHeader->u32IPName_Offset + pPQTextBinHeader->u32BinStartAddress;
3109 u32Offset = pPQTextBinHeader->u32IPName_Pitch * u16PQIPIdx +
3110 PQ_TEXT_BIN_IPNAME_OFFSET_OFFSET;
3111
3112 u32DstAddr = MDrv_PQBin_Get4ByteData(pInstance,(void *)(u32Addr+u32Offset), &u32Offset) +
3113 pPQTextBinHeader->u32BinStartAddress;
3114
3115 PQ_TEXT_BIN_DBG(printf("PQTextBin IPName: %lx\n", u32DstAddr));
3116 return u32DstAddr;
3117 }
3118
MDrv_PQTextBin_GetTableName(void * pInstance,MS_U16 u16PQIPIdx,MS_U16 u16TabIdx,const MS_PQTextBin_Header_Info * const pPQTextBinHeader)3119 MS_U32 MDrv_PQTextBin_GetTableName(void *pInstance,MS_U16 u16PQIPIdx, MS_U16 u16TabIdx, const MS_PQTextBin_Header_Info* const pPQTextBinHeader)
3120 {
3121 MS_PHYADDR u32Addr;
3122 MS_U32 u32Offset;
3123 MS_U32 u32DstAddr;
3124 MS_U16 u16GroupNum;
3125 MS_U32 u32Total_Len;
3126 MS_U32 i;
3127
3128 if(u16PQIPIdx >= pPQTextBinHeader->u16GroupIPNum)
3129 {
3130 MS_ASSERT(0);
3131 printf("[PQBinText] GetGroupName:: IPIdx Out of range %u\n", u16PQIPIdx);
3132 u16PQIPIdx = 0;
3133 }
3134
3135 u32Addr = pPQTextBinHeader->u32IP_Group_Offset + pPQTextBinHeader->u32BinStartAddress;
3136 u32Offset = pPQTextBinHeader->u32IP_Group_pitch * u16PQIPIdx +
3137 PQ_TEXT_BIN_GROUPNAME_IPGROUP_GROUPNUM_OFFSET;
3138 u16GroupNum = MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32Addr+u32Offset), &u32Offset);
3139
3140 if(u16TabIdx >= u16GroupNum)
3141 {
3142 MS_ASSERT(0);
3143 printf("[PQBinText] GetGroupName :: TableIdx Out of range %u\n", u16TabIdx);
3144 u16TabIdx = 0;
3145 }
3146 u32Addr = MDrv_PQBin_Get4ByteData(pInstance,(void *)(u32Addr+u32Offset), &u32Offset) +
3147 pPQTextBinHeader->u32BinStartAddress;
3148
3149 u32Offset = PQ_TEXT_BIN_GROUPNAME_GROUPOFFSET_OFFSET;
3150 u32DstAddr = MDrv_PQBin_Get4ByteData(pInstance,(void *)(u32Addr+u32Offset), &u32Offset) +
3151 pPQTextBinHeader->u32BinStartAddress;
3152
3153 u32Total_Len = 0;
3154 for(i=0; i< u16TabIdx; i++)
3155 {
3156 u32Offset = PQ_TEXT_BIN_GROUPNAME_GROUPOFFSET_LEN +
3157 PQ_TEXT_BIN_GROUPNAME_GROUPLENGTH_LEN * i;
3158
3159 u32Total_Len += MDrv_PQBin_Get2ByteData(pInstance,(void *)(u32Addr+u32Offset), &u32Offset);
3160 }
3161
3162 PQ_TEXT_BIN_DBG(printf("PQTextBin GroupName: %lx\n", (u32DstAddr+u32Total_Len)));
3163 return (u32DstAddr+u32Total_Len);
3164 }
3165
3166 //------------------ UFSC ---------------------------------------
MDrv_PQBin_DumpUFSCScalerRegTable(void * pInstance,const MS_PQBin_IP_Table_Info * const pTabInfo)3167 void MDrv_PQBin_DumpUFSCScalerRegTable(void *pInstance, const MS_PQBin_IP_Table_Info* const pTabInfo)
3168 {
3169 #if defined(ENABLE_PQ_BIN_UFSC) && ENABLE_PQ_BIN_UFSC
3170
3171 MS_PHYADDR u32RegAddr;
3172 MS_U8 u8Mask;
3173 MS_U8 u8Addr;
3174 MS_U8 u8Value;
3175 MS_U8 u8CurBank = 0xff;
3176 MS_PHYADDR u32Addr;
3177 MS_U32 u32Offset;
3178 MS_U16 i;
3179
3180 #ifdef MSOS_TYPE_LINUX
3181 #if 0//(ENABLE_PQ_MLOAD)
3182 pthread_mutex_lock(&_PQ_MLoad_Mutex);
3183 #endif
3184 #endif
3185 //consider dump reg amount is very large, so we shouldn't use MApi_XC_W2BYTE(),
3186 // because mutex cost much time.
3187 SC_BK_STORE_MUTEX;
3188
3189 PQ_BIN_DUMP_DBG(printf("tab: sc\n"));
3190 if(pTabInfo->u16GroupIdx >= pTabInfo->u16GroupNum)
3191 {
3192 PQ_BIN_DBG(printf("[PQBin]IP_Info error: Scaler Reg Table\n"));
3193
3194 SC_BK_RESTORE_MUTEX;
3195
3196 #ifdef MSOS_TYPE_LINUX
3197 #if 0//(ENABLE_PQ_MLOAD)
3198 pthread_mutex_unlock(&_PQ_MLoad_Mutex);
3199 #endif
3200 #endif
3201
3202 return;
3203 }
3204
3205 #if 0//(ENABLE_PQ_MLOAD)
3206 if (_bMLoadEn)
3207 {
3208 if (pTabInfo->u16RegNum >= MLOAD_MAX_CMD)
3209 {
3210 printf("[PQ ERROR] Function %s ==== ML overflow !!!\n",__FUNCTION__);
3211 assert(FALSE);
3212 }
3213 else if ( (_u16MLoadCmdCnt + pTabInfo->u16RegNum) >= MLOAD_MAX_CMD)
3214 {
3215 SC_BK_RESTORE_MUTEX;
3216 MDrv_PQBin_Set_MLoadEn(FALSE);
3217 MDrv_PQBin_Set_MLoadEn(TRUE);
3218 SC_BK_STORE_MUTEX;
3219 }
3220 }
3221 #endif
3222
3223 u32Addr = pTabInfo->u32TabOffset;
3224 for(i=0; i<pTabInfo->u16RegNum; i++)
3225 {
3226 u32Offset = ( PQ_BIN_BANK_SIZE + PQ_BIN_ADDR_SIZE + PQ_BIN_MASK_SIZE + (MS_U32)pTabInfo->u16GroupNum) * (MS_U32)i;
3227 u8CurBank = MDrv_PQBin_GetByteData(pInstance, (void *)((void *)(u32Addr+u32Offset)), &u32Offset);
3228 u8Addr = MDrv_PQBin_GetByteData(pInstance, (void *)((void *)(u32Addr+u32Offset)), &u32Offset);
3229 u8Mask = MDrv_PQBin_GetByteData(pInstance, (void *)((void *)(u32Addr+u32Offset)), &u32Offset);
3230
3231 u32Offset += (MS_U32)pTabInfo->u16GroupIdx;
3232 u8Value = MDrv_PQBin_GetByteData(pInstance, (void *)((void *)(u32Addr+u32Offset)), &u32Offset);
3233
3234 PQ_BIN_DBG_SRAMERROR(printf("[UFSC][read addr=%x], GroupIdx=%x,RegNum=%x,reg=%04x, msk=%02x, val=%02x, u8CurBank=%x\n",
3235 (u32Addr+u32Offset-(MS_U32)pTabInfo->u16GroupIdx),pTabInfo->u16GroupIdx,pTabInfo->u16RegNum, BK_UFSC_SCALER_BASE | (MS_U32)u8Addr, u8Mask, u8Value, u8CurBank));
3236
3237 if (0)//(_bMLoadEn)
3238 {
3239 u32RegAddr = (((MS_U32)u8CurBank) << 8) | (MS_U32)u8Addr;
3240 //PQ_REG_MLOAD_FUNC(u32RegAddr, u8Value, u8Mask);
3241 PQ_REG_MLOAD_WRITE_CMD(u32RegAddr, u8Value, u8Mask);
3242 }
3243 else
3244 {
3245 u32RegAddr = BK_UFSC_SCALER_BASE | (((MS_U32)u8CurBank) << 8) | (MS_U32)u8Addr;
3246
3247 PQ_REG_FUNC(u32RegAddr, u8Value, u8Mask);
3248 }
3249 PQ_BIN_DUMP_DBG(printf("[UFSC][addr=%04lx, msk=%02x, val=%02x]\n", u32RegAddr, u8Mask, u8Value));
3250
3251 }
3252
3253 SC_BK_RESTORE_MUTEX;
3254
3255 #ifdef MSOS_TYPE_LINUX
3256 #if 0//(ENABLE_PQ_MLOAD)
3257 pthread_mutex_unlock(&_PQ_MLoad_Mutex);
3258 #endif
3259 #endif
3260 #endif
3261 }
3262
MDrv_PQBin_DumpUFSCFilterTable(void * pInstance,MS_PQBin_IP_Table_Info * pTabInfo)3263 void MDrv_PQBin_DumpUFSCFilterTable(void *pInstance, MS_PQBin_IP_Table_Info *pTabInfo)
3264 {
3265
3266 #if defined(ENABLE_PQ_BIN_UFSC) && ENABLE_PQ_BIN_UFSC
3267 MS_PHYADDR u32Addr;
3268 #ifdef MSOS_TYPE_LINUX
3269 MS_S32 s32PTHChk;
3270
3271 s32PTHChk = pthread_mutex_lock(&_stPQFilterTableMutex);
3272
3273 if(s32PTHChk != 0)
3274 {
3275 printf("Func: %s():%d lock mutex error\n", __FUNCTION__, __LINE__);
3276 }
3277 #endif
3278
3279 PQ_BIN_DBG(printf("tab: sram\n"));
3280
3281
3282 if(pTabInfo->u16GroupIdx >= pTabInfo->u16GroupNum)
3283 {
3284
3285 PQ_BIN_DUMP_FILTER_DBG(printf("[PQBin]IP_Info error: SRAM Table\n"));
3286 #ifdef MSOS_TYPE_LINUX
3287 s32PTHChk = pthread_mutex_unlock(&_stPQFilterTableMutex);
3288 if(s32PTHChk != 0)
3289 {
3290 printf("Func: %s():%d unlock mutex error\n", __FUNCTION__, __LINE__);
3291 }
3292 #endif
3293 return;
3294 }
3295
3296 u32Addr = pTabInfo->u32TabOffset + pTabInfo->u16GroupIdx * pTabInfo->u16RegNum;
3297
3298 switch(pTabInfo->u16TableType)
3299 {
3300 case PQ_TABTYPE_UFSC_SRAM1:
3301 Hal_PQ_set_UFSC_y_sram_table(pInstance, SC_FILTER_Y_SRAM1, (void *)u32Addr);
3302 break;
3303 case PQ_TABTYPE_UFSC_SRAM2:
3304 Hal_PQ_set_UFSC_y_sram_table(pInstance, SC_FILTER_Y_SRAM2, (void *)u32Addr);
3305 break;
3306 case PQ_TABTYPE_UFSC_SRAM3:
3307 Hal_PQ_set_UFSC_y_sram_table(pInstance, SC_FILTER_Y_SRAM3, (void *)u32Addr);
3308 break;
3309 case PQ_TABTYPE_UFSC_SRAM4:
3310 Hal_PQ_set_UFSC_y_sram_table(pInstance, SC_FILTER_Y_SRAM4, (void *)u32Addr);
3311 break;
3312 case PQ_TABTYPE_UFSC_C_SRAM1:
3313 Hal_PQ_set_UFSC_c_sram_table(pInstance, SC_FILTER_C_SRAM1, (void *)u32Addr);
3314 break;
3315 case PQ_TABTYPE_UFSC_C_SRAM2:
3316 Hal_PQ_set_UFSC_c_sram_table(pInstance, SC_FILTER_C_SRAM2, (void *)u32Addr);
3317 break;
3318 case PQ_TABTYPE_UFSC_C_SRAM3:
3319 Hal_PQ_set_UFSC_c_sram_table(pInstance, SC_FILTER_C_SRAM3, (void *)u32Addr);
3320 break;
3321 case PQ_TABTYPE_UFSC_C_SRAM4:
3322 Hal_PQ_set_UFSC_c_sram_table(pInstance, SC_FILTER_C_SRAM4, (void *)u32Addr);
3323 break;
3324 case PQ_TABTYPE_UFSC_VIP_ICC_CRD_SRAM:
3325 Hal_PQ_set_UFSC_sram_icc_crd_table(pInstance, SC_FILTER_SRAM_ICC_CRD, (void *)u32Addr);
3326 break;
3327 case PQ_TABTYPE_UFSC_VIP_IHC_CRD_SRAM:
3328 Hal_PQ_set_UFSC_sram_ihc_crd_table(pInstance, SC_FILTER_SRAM_IHC_CRD, (void *)u32Addr);
3329 break;
3330 default:
3331 printf("[PQBin] Unknown sram type %u\n", pTabInfo->u16TableType);
3332 MS_ASSERT(0);
3333 break;
3334 }
3335
3336 #ifdef MSOS_TYPE_LINUX
3337 s32PTHChk = pthread_mutex_unlock(&_stPQFilterTableMutex);
3338 if(s32PTHChk != 0)
3339 {
3340 printf("Func: %s():%d unlock mutex error\n", __FUNCTION__, __LINE__);
3341 }
3342 #endif
3343 #endif
3344 }
3345
3346
3347 //--------------------------------------------------------------
3348