xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/phydm_adaptivity.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1 /******************************************************************************
2  *
3  * Copyright(c) 2007 - 2017 Realtek Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12  * more details.
13  *
14  *****************************************************************************/
15 
16 
17 #ifndef	__PHYDMADAPTIVITY_H__
18 #define    __PHYDMADAPTIVITY_H__
19 
20 #define ADAPTIVITY_VERSION	"9.5.7"	/*20170627 changed by Kevin, move adapt_igi_up from phydm.h to phydm_adaptivity.h*/
21 
22 #define pwdb_upper_bound	7
23 #define dfir_loss	7
24 
25 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
26 enum phydm_regulation_type {
27 	REGULATION_FCC		= 0,
28 	REGULATION_MKK		= 1,
29 	REGULATION_ETSI		= 2,
30 	REGULATION_WW		= 3,
31 	MAX_REGULATION_NUM	= 4
32 };
33 #endif
34 
35 enum phydm_adapinfo_e {
36 	PHYDM_ADAPINFO_CARRIER_SENSE_ENABLE = 0,
37 	PHYDM_ADAPINFO_DCBACKOFF,
38 	PHYDM_ADAPINFO_DYNAMICLINKADAPTIVITY,
39 	PHYDM_ADAPINFO_TH_L2H_INI,
40 	PHYDM_ADAPINFO_TH_EDCCA_HL_DIFF,
41 	PHYDM_ADAPINFO_AP_NUM_TH
42 };
43 
44 enum phydm_set_lna {
45 	phydm_disable_lna		= 0,
46 	phydm_enable_lna		= 1,
47 };
48 
49 enum phydm_trx_mux_type {
50 	phydm_shutdown			= 0,
51 	phydm_standby_mode		= 1,
52 	phydm_tx_mode			= 2,
53 	phydm_rx_mode			= 3
54 };
55 
56 enum phydm_mac_edcca_type {
57 	phydm_ignore_edcca			= 0,
58 	phydm_dont_ignore_edcca		= 1
59 };
60 
61 enum phydm_adaptivity_mode {
62 	PHYDM_ADAPT_MSG			= 0,
63 	PHYDM_ADAPT_DEBUG		= 1,
64 	PHYDM_ADAPT_RESUME		= 2,
65 	PHYDM_EDCCA_TH_PAUSE	= 3,
66 	PHYDM_EDCCA_RESUME		= 4
67 };
68 
69 struct phydm_adaptivity_struct {
70 	s8			th_l2h_ini_backup;
71 	s8			th_edcca_hl_diff_backup;
72 	s8			igi_base;
73 	u8			igi_target;
74 	s8			h2l_lb;
75 	s8			l2h_lb;
76 	boolean		is_check;
77 	boolean		dynamic_link_adaptivity;
78 	u8			ap_num_th;
79 	u8			adajust_igi_level;
80 	s8			backup_l2h;
81 	s8			backup_h2l;
82 	boolean			is_stop_edcca;
83 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
84 	RT_WORK_ITEM	phydm_pause_edcca_work_item;
85 	RT_WORK_ITEM	phydm_resume_edcca_work_item;
86 #endif
87 	u32			adaptivity_dbg_port; /*N:0x208, AC:0x209*/
88 	u8			debug_mode;
89 	s8			th_l2h_ini_debug;
90 	u16			igi_up_bound_lmt_cnt;	/*When igi_up_bound_lmt_cnt !=0, limit IGI upper bound to "adapt_igi_up"*/
91 	u16			igi_up_bound_lmt_val;	/*max value of igi_up_bound_lmt_cnt*/
92 	boolean		igi_lmt_en;
93 	u8			adapt_igi_up;
94 	s8			rvrt_val[2];
95 	s8			th_l2h;
96 	s8			th_h2l;
97 };
98 
99 void
100 phydm_pause_edcca(
101 	void	*p_dm_void,
102 	boolean	is_pasue_edcca
103 );
104 
105 void
106 phydm_check_environment(
107 	void					*p_dm_void
108 );
109 
110 void
111 phydm_mac_edcca_state(
112 	void					*p_dm_void,
113 	enum phydm_mac_edcca_type		state
114 );
115 
116 void
117 phydm_set_edcca_threshold(
118 	void		*p_dm_void,
119 	s8		H2L,
120 	s8		L2H
121 );
122 
123 void
124 phydm_set_trx_mux(
125 	void			*p_dm_void,
126 	enum phydm_trx_mux_type			tx_mode,
127 	enum phydm_trx_mux_type			rx_mode
128 );
129 
130 void
131 phydm_search_pwdb_lower_bound(
132 	void					*p_dm_void
133 );
134 
135 void
136 phydm_adaptivity_info_init(
137 	void			*p_dm_void,
138 	enum phydm_adapinfo_e	cmn_info,
139 	u32				value
140 );
141 
142 void
143 phydm_adaptivity_init(
144 	void					*p_dm_void
145 );
146 
147 void
148 phydm_adaptivity(
149 	void			*p_dm_void
150 );
151 
152 void
153 phydm_set_edcca_threshold_api(
154 	void	*p_dm_void,
155 	u8	IGI
156 );
157 
158 void
159 phydm_pause_edcca_work_item_callback(
160 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
161 	struct _ADAPTER		*adapter
162 #else
163 	void			*p_dm_void
164 #endif
165 );
166 
167 void
168 phydm_resume_edcca_work_item_callback(
169 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
170 	struct _ADAPTER		*adapter
171 #else
172 	void			*p_dm_void
173 #endif
174 );
175 
176 void
177 phydm_adaptivity_debug(
178 	void		*p_dm_void,
179 	u32		*const dm_value,
180 	u32		*_used,
181 	char		*output,
182 	u32		*_out_len
183 );
184 
185 void
186 phydm_set_l2h_th_ini(
187 	void		*p_dm_void
188 );
189 
190 void
191 phydm_set_forgetting_factor(
192 	void		*p_dm_void
193 );
194 
195 void
196 phydm_set_pwdb_mode(
197 	void		*p_dm_void
198 );
199 
200 void
201 phydm_set_edcca_val(
202 	void			*p_dm_void,
203 	u32			*val_buf,
204 	u8			val_len
205 );
206 
207 #endif
208