Searched defs:div0 (Results 1 – 3 of 3) sorted by relevance
| /rk3399_rockchip-uboot/drivers/clk/ |
| H A D | clk_zynq.c | 228 u32 clk_ctrl, div0, div1; in zynq_clk_get_dci_rate() local
244 u32 clk_ctrl, div0; in zynq_clk_get_peripheral_rate() local
290 u32 *div0, u32 *div1) in zynq_clk_calc_peripheral_two_divs()
319 u32 clk_ctrl, div0 = 0, div1 = 0; in zynq_clk_set_peripheral_rate() local
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| H A D | clk_zynqmp.c | 392 u32 clk_ctrl, div0; in zynqmp_clk_get_peripheral_rate() local
425 u32 *div0, u32 *div1) in zynqmp_clk_calc_peripheral_two_divs()
454 u32 clk_ctrl, div0 = 0, div1 = 0; in zynqmp_clk_set_peripheral_rate() local
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| /rk3399_rockchip-uboot/arch/arm/mach-s5pc1xx/include/mach/ |
| H A D | clock.h | 29 unsigned int div0; member
65 unsigned int div0; member
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