1 /******************************************************************************
2 *
3 * Copyright(c) 2007 - 2017 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 *****************************************************************************/
15 /*-------------------------------------------------------------------------------
16
17 For type defines and data structure defines
18
19 --------------------------------------------------------------------------------*/
20
21
22 #ifndef __DRV_TYPES_H__
23 #define __DRV_TYPES_H__
24
25 #include <drv_conf.h>
26 #include <basic_types.h>
27 #include <osdep_service.h>
28 #include <rtw_byteorder.h>
29 #include <wlan_bssdef.h>
30 #include <wifi.h>
31 #include <ieee80211.h>
32 #ifdef CONFIG_ARP_KEEP_ALIVE
33 #include <net/neighbour.h>
34 #include <net/arp.h>
35 #endif
36
37 #ifdef PLATFORM_OS_XP
38 #include <drv_types_xp.h>
39 #endif
40
41 #ifdef PLATFORM_OS_CE
42 #include <drv_types_ce.h>
43 #endif
44
45 #ifdef PLATFORM_LINUX
46 #include <drv_types_linux.h>
47 #endif
48
49 enum _NIC_VERSION {
50
51 RTL8711_NIC,
52 RTL8712_NIC,
53 RTL8713_NIC,
54 RTL8716_NIC
55
56 };
57
58 typedef struct _ADAPTER _adapter, ADAPTER, *PADAPTER;
59
60 #include <rtw_debug.h>
61 #include <cmn_info/rtw_sta_info.h>
62 #include <rtw_rf.h>
63
64 #ifdef CONFIG_80211N_HT
65 #include <rtw_ht.h>
66 #endif
67
68 #ifdef CONFIG_80211AC_VHT
69 #include <rtw_vht.h>
70 #endif
71
72 #ifdef CONFIG_INTEL_WIDI
73 #include <rtw_intel_widi.h>
74 #endif
75
76 #include <rtw_cmd.h>
77 #include <cmd_osdep.h>
78 #include <rtw_security.h>
79 #include <rtw_xmit.h>
80 #include <xmit_osdep.h>
81 #include <rtw_recv.h>
82
83 #ifdef CONFIG_BEAMFORMING
84 #include <rtw_beamforming.h>
85 #endif
86
87 #include <recv_osdep.h>
88 #include <rtw_efuse.h>
89 #include <rtw_sreset.h>
90 #include <hal_intf.h>
91 #include <hal_com.h>
92 #include<hal_com_h2c.h>
93 #include <hal_com_led.h>
94 #include "../hal/hal_dm.h"
95 #include <rtw_qos.h>
96 #include <rtw_pwrctrl.h>
97 #include <rtw_mlme.h>
98 #include <mlme_osdep.h>
99 #include <rtw_io.h>
100 #include <rtw_ioctl.h>
101 #include <rtw_ioctl_set.h>
102 #include <rtw_ioctl_query.h>
103 #include <rtw_ioctl_rtl.h>
104 #include <osdep_intf.h>
105 #include <rtw_eeprom.h>
106 #include <sta_info.h>
107 #include <rtw_event.h>
108 #include <rtw_mlme_ext.h>
109 #include <rtw_mi.h>
110 #include <rtw_ap.h>
111 #include <rtw_efuse.h>
112 #include <rtw_version.h>
113 #include <rtw_odm.h>
114
115 #ifdef CONFIG_PREALLOC_RX_SKB_BUFFER
116 #include <rtw_mem.h>
117 #endif
118
119 #include <rtw_p2p.h>
120
121 #ifdef CONFIG_TDLS
122 #include <rtw_tdls.h>
123 #endif /* CONFIG_TDLS */
124
125 #ifdef CONFIG_WAPI_SUPPORT
126 #include <rtw_wapi.h>
127 #endif /* CONFIG_WAPI_SUPPORT */
128
129 #ifdef CONFIG_DRVEXT_MODULE
130 #include <drvext_api.h>
131 #endif /* CONFIG_DRVEXT_MODULE */
132
133 #ifdef CONFIG_MP_INCLUDED
134 #include <rtw_mp.h>
135 #endif /* CONFIG_MP_INCLUDED */
136
137 #ifdef CONFIG_BR_EXT
138 #include <rtw_br_ext.h>
139 #endif /* CONFIG_BR_EXT */
140
141 #ifdef CONFIG_IOL
142 #include <rtw_iol.h>
143 #endif /* CONFIG_IOL */
144
145 #include <ip.h>
146 #include <if_ether.h>
147 #include <ethernet.h>
148 #include <circ_buf.h>
149
150 #include <rtw_android.h>
151
152 #include <rtw_btcoex_wifionly.h>
153 #ifdef CONFIG_BT_COEXIST
154 #include <rtw_btcoex.h>
155 #endif /* CONFIG_BT_COEXIST */
156
157 #ifdef CONFIG_MCC_MODE
158 #include <rtw_mcc.h>
159 #endif /*CONFIG_MCC_MODE */
160
161 #ifdef CONFIG_RTW_REPEATER_SON
162 #include <rtw_rson.h>
163 #endif /*CONFIG_RTW_REPEATER_SON */
164
165 #define SPEC_DEV_ID_NONE BIT(0)
166 #define SPEC_DEV_ID_DISABLE_HT BIT(1)
167 #define SPEC_DEV_ID_ENABLE_PS BIT(2)
168 #define SPEC_DEV_ID_RF_CONFIG_1T1R BIT(3)
169 #define SPEC_DEV_ID_RF_CONFIG_2T2R BIT(4)
170 #define SPEC_DEV_ID_ASSIGN_IFNAME BIT(5)
171
172 struct specific_device_id {
173
174 u32 flags;
175
176 u16 idVendor;
177 u16 idProduct;
178
179 };
180
181 struct registry_priv {
182 u8 chip_version;
183 u8 rfintfs;
184 u8 lbkmode;
185 u8 hci;
186 NDIS_802_11_SSID ssid;
187 u8 network_mode; /* infra, ad-hoc, auto */
188 u8 channel;/* ad-hoc support requirement */
189 u8 wireless_mode;/* A, B, G, auto */
190 u8 scan_mode;/* active, passive */
191 u8 radio_enable;
192 u8 preamble;/* long, short, auto */
193 u8 vrtl_carrier_sense;/* Enable, Disable, Auto */
194 u8 vcs_type;/* RTS/CTS, CTS-to-self */
195 u16 rts_thresh;
196 u16 frag_thresh;
197 u8 adhoc_tx_pwr;
198 u8 soft_ap;
199 u8 power_mgnt;
200 u8 ips_mode;
201 u8 lps_level;
202 u8 smart_ps;
203 #ifdef CONFIG_WMMPS_STA
204 u8 wmm_smart_ps;
205 #endif /* CONFIG_WMMPS_STA */
206 u8 usb_rxagg_mode;
207 u8 dynamic_agg_enable;
208 u8 long_retry_lmt;
209 u8 short_retry_lmt;
210 u16 busy_thresh;
211 u8 ack_policy;
212 u8 mp_mode;
213 #if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_RTW_CUSTOMER_STR)
214 u8 mp_customer_str;
215 #endif
216 u8 mp_dm;
217 u8 software_encrypt;
218 u8 software_decrypt;
219 #ifdef CONFIG_TX_EARLY_MODE
220 u8 early_mode;
221 #endif
222 u8 acm_method;
223 /* WMM */
224 u8 wmm_enable;
225 #ifdef CONFIG_WMMPS_STA
226 /* uapsd (unscheduled automatic power-save delivery) = a kind of wmmps */
227 u8 uapsd_max_sp_len;
228 /* BIT0: AC_VO UAPSD, BIT1: AC_VI UAPSD, BIT2: AC_BK UAPSD, BIT3: AC_BE UAPSD */
229 u8 uapsd_ac_enable;
230 #endif /* CONFIG_WMMPS_STA */
231
232 WLAN_BSSID_EX dev_network;
233
234 u8 tx_bw_mode;
235 #ifdef CONFIG_AP_MODE
236 u8 bmc_tx_rate;
237 #endif
238 #ifdef CONFIG_80211N_HT
239 u8 ht_enable;
240 /* 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160MHz */
241 /* 2.4G use bit 0 ~ 3, 5G use bit 4 ~ 7 */
242 /* 0x21 means enable 2.4G 40MHz & 5G 80MHz */
243 u8 bw_mode;
244 u8 ampdu_enable;/* for tx */
245 u8 rx_stbc;
246 u8 rx_ampdu_amsdu;/* Rx A-MPDU Supports A-MSDU is permitted */
247 u8 tx_ampdu_amsdu;/* Tx A-MPDU Supports A-MSDU is permitted */
248 u8 rx_ampdu_sz_limit_by_nss_bw[4][4]; /* 1~4SS, BW20~BW160 */
249 /* Short GI support Bit Map */
250 /* BIT0 - 20MHz, 1: support, 0: non-support */
251 /* BIT1 - 40MHz, 1: support, 0: non-support */
252 /* BIT2 - 80MHz, 1: support, 0: non-support */
253 /* BIT3 - 160MHz, 1: support, 0: non-support */
254 u8 short_gi;
255 /* BIT0: Enable VHT LDPC Rx, BIT1: Enable VHT LDPC Tx, BIT4: Enable HT LDPC Rx, BIT5: Enable HT LDPC Tx */
256 u8 ldpc_cap;
257 /* BIT0: Enable VHT STBC Rx, BIT1: Enable VHT STBC Tx, BIT4: Enable HT STBC Rx, BIT5: Enable HT STBC Tx */
258 u8 stbc_cap;
259 /*
260 * BIT0: Enable VHT SU Beamformer
261 * BIT1: Enable VHT SU Beamformee
262 * BIT2: Enable VHT MU Beamformer, depend on VHT SU Beamformer
263 * BIT3: Enable VHT MU Beamformee, depend on VHT SU Beamformee
264 * BIT4: Enable HT Beamformer
265 * BIT5: Enable HT Beamformee
266 */
267 u8 beamform_cap;
268 u8 beamformer_rf_num;
269 u8 beamformee_rf_num;
270 #endif /* CONFIG_80211N_HT */
271
272 #ifdef CONFIG_80211AC_VHT
273 u8 vht_enable; /* 0:disable, 1:enable, 2:auto */
274 u8 ampdu_factor;
275 u8 vht_rx_mcs_map[2];
276 #endif /* CONFIG_80211AC_VHT */
277
278 u8 lowrate_two_xmit;
279
280 u8 rf_config ;
281 u8 low_power ;
282
283 u8 wifi_spec;/* !turbo_mode */
284 u8 special_rf_path; /* 0: 2T2R ,1: only turn on path A 1T1R */
285 char alpha2[2];
286 u8 channel_plan;
287 u8 excl_chs[MAX_CHANNEL_NUM];
288 u8 full_ch_in_p2p_handshake; /* 0: reply only softap channel, 1: reply full channel list*/
289
290 #ifdef CONFIG_BT_COEXIST
291 u8 btcoex;
292 u8 bt_iso;
293 u8 bt_sco;
294 u8 bt_ampdu;
295 u8 ant_num;
296 u8 single_ant_path;
297 #endif
298 BOOLEAN bAcceptAddbaReq;
299
300 u8 antdiv_cfg;
301 u8 antdiv_type;
302 u8 drv_ant_band_switch;
303
304 u8 switch_usb_mode;
305
306 u8 usbss_enable;/* 0:disable,1:enable */
307 u8 hwpdn_mode;/* 0:disable,1:enable,2:decide by EFUSE config */
308 u8 hwpwrp_detect;/* 0:disable,1:enable */
309
310 u8 hw_wps_pbc;/* 0:disable,1:enable */
311
312 #ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE
313 char adaptor_info_caching_file_path[PATH_LENGTH_MAX];
314 #endif
315
316 #ifdef CONFIG_LAYER2_ROAMING
317 u8 max_roaming_times; /* the max number driver will try to roaming */
318 #endif
319
320 #ifdef CONFIG_IOL
321 u8 fw_iol; /* enable iol without other concern */
322 #endif
323
324 #ifdef CONFIG_80211D
325 u8 enable80211d;
326 #endif
327
328 u8 ifname[16];
329 u8 if2name[16];
330
331 u8 notch_filter;
332
333 /* for pll reference clock selction */
334 u8 pll_ref_clk_sel;
335
336 /* define for tx power adjust */
337 #ifdef CONFIG_TXPWR_LIMIT
338 u8 RegEnableTxPowerLimit;
339 #endif
340 u8 RegEnableTxPowerByRate;
341
342 u8 target_tx_pwr_valid;
343 s8 target_tx_pwr_2g[RF_PATH_MAX][RATE_SECTION_NUM];
344 #ifdef CONFIG_IEEE80211_BAND_5GHZ
345 s8 target_tx_pwr_5g[RF_PATH_MAX][RATE_SECTION_NUM - 1];
346 #endif
347
348 s8 TxBBSwing_2G;
349 s8 TxBBSwing_5G;
350 u8 AmplifierType_2G;
351 u8 AmplifierType_5G;
352 u8 bEn_RFE;
353 u8 RFE_Type;
354 u8 PowerTracking_Type;
355 u8 GLNA_Type;
356 u8 check_fw_ps;
357 u8 RegPwrTrimEnable;
358
359 #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
360 u8 load_phy_file;
361 u8 RegDecryptCustomFile;
362 #endif
363 #ifdef CONFIG_CONCURRENT_MODE
364 u8 virtual_iface_num;
365 #endif
366 u8 qos_opt_enable;
367
368 u8 hiq_filter;
369 u8 adaptivity_en;
370 u8 adaptivity_mode;
371 u8 adaptivity_dml;
372 u8 adaptivity_dc_backoff;
373 s8 adaptivity_th_l2h_ini;
374 s8 adaptivity_th_edcca_hl_diff;
375
376 u8 boffefusemask;
377 BOOLEAN bFileMaskEfuse;
378 #ifdef CONFIG_RTW_ACS
379 u8 acs_auto_scan;
380 u8 acs_mode;
381 #endif
382
383 #ifdef CONFIG_BACKGROUND_NOISE_MONITOR
384 u8 nm_mode;
385 #endif
386 u32 reg_rxgain_offset_2g;
387 u32 reg_rxgain_offset_5gl;
388 u32 reg_rxgain_offset_5gm;
389 u32 reg_rxgain_offset_5gh;
390
391 #ifdef CONFIG_DFS_MASTER
392 u8 dfs_region_domain;
393 #endif
394
395 #ifdef CONFIG_MCC_MODE
396 u8 en_mcc;
397 u32 rtw_mcc_single_tx_cri;
398 u32 rtw_mcc_ap_bw20_target_tx_tp;
399 u32 rtw_mcc_ap_bw40_target_tx_tp;
400 u32 rtw_mcc_ap_bw80_target_tx_tp;
401 u32 rtw_mcc_sta_bw20_target_tx_tp;
402 u32 rtw_mcc_sta_bw40_target_tx_tp;
403 u32 rtw_mcc_sta_bw80_target_tx_tp;
404 s8 rtw_mcc_policy_table_idx;
405 u8 rtw_mcc_duration;
406 u8 rtw_mcc_tsf_sync_offset;
407 u8 rtw_mcc_start_time_offset;
408 u8 rtw_mcc_interval;
409 s8 rtw_mcc_guard_offset0;
410 s8 rtw_mcc_guard_offset1;
411 #endif /* CONFIG_MCC_MODE */
412
413 #ifdef CONFIG_RTW_NAPI
414 u8 en_napi;
415 #ifdef CONFIG_RTW_NAPI_DYNAMIC
416 u32 napi_threshold; /* unit: Mbps */
417 #endif /* CONFIG_RTW_NAPI_DYNAMIC */
418 #ifdef CONFIG_RTW_GRO
419 u8 en_gro;
420 #endif /* CONFIG_RTW_GRO */
421 #endif /* CONFIG_RTW_NAPI */
422
423 #ifdef CONFIG_WOWLAN
424 u8 wakeup_event;
425 #endif
426
427 #ifdef CONFIG_SUPPORT_TRX_SHARED
428 u8 trx_share_mode;
429 #endif
430 u8 check_hw_status;
431
432 u32 pci_aspm_config;
433
434 u8 iqk_fw_offload;
435
436 #ifdef CONFIG_TDLS
437 u8 en_tdls;
438 #endif
439
440 #ifdef CONFIG_ADVANCE_OTA
441 u8 adv_ota;
442 #endif
443
444 #ifdef CONFIG_FW_OFFLOAD_PARAM_INIT
445 u8 fw_param_init;
446 #endif
447 };
448
449 /* For registry parameters */
450 #define RGTRY_OFT(field) ((ULONG)FIELD_OFFSET(struct registry_priv, field))
451 #define RGTRY_SZ(field) sizeof(((struct registry_priv *) 0)->field)
452
453 #define GetRegAmplifierType2G(_Adapter) (_Adapter->registrypriv.AmplifierType_2G)
454 #define GetRegAmplifierType5G(_Adapter) (_Adapter->registrypriv.AmplifierType_5G)
455
456 #define GetRegTxBBSwing_2G(_Adapter) (_Adapter->registrypriv.TxBBSwing_2G)
457 #define GetRegTxBBSwing_5G(_Adapter) (_Adapter->registrypriv.TxBBSwing_5G)
458
459 #define GetRegbENRFEType(_Adapter) (_Adapter->registrypriv.bEn_RFE)
460 #define GetRegRFEType(_Adapter) (_Adapter->registrypriv.RFE_Type)
461 #define GetRegGLNAType(_Adapter) (_Adapter->registrypriv.GLNA_Type)
462 #define GetRegPowerTrackingType(_Adapter) (_Adapter->registrypriv.PowerTracking_Type)
463
464 #define BSSID_OFT(field) ((ULONG)FIELD_OFFSET(WLAN_BSSID_EX, field))
465 #define BSSID_SZ(field) sizeof(((PWLAN_BSSID_EX) 0)->field)
466
467 #define BW_MODE_2G(bw_mode) ((bw_mode) & 0x0F)
468 #define BW_MODE_5G(bw_mode) ((bw_mode) >> 4)
469 #define REGSTY_BW_2G(regsty) BW_MODE_2G((regsty)->bw_mode)
470 #define REGSTY_BW_5G(regsty) BW_MODE_5G((regsty)->bw_mode)
471 #define REGSTY_IS_BW_2G_SUPPORT(regsty, bw) (REGSTY_BW_2G((regsty)) >= (bw))
472 #define REGSTY_IS_BW_5G_SUPPORT(regsty, bw) (REGSTY_BW_5G((regsty)) >= (bw))
473
474 #define REGSTY_IS_11AC_ENABLE(regsty) ((regsty)->vht_enable != 0)
475 #define REGSTY_IS_11AC_AUTO(regsty) ((regsty)->vht_enable == 2)
476
477 typedef struct rtw_if_operations {
478 int __must_check (*read)(struct dvobj_priv *d, unsigned int addr, void *buf,
479 size_t len, bool fixed);
480 int __must_check (*write)(struct dvobj_priv *d, unsigned int addr, void *buf,
481 size_t len, bool fixed);
482 } RTW_IF_OPS, *PRTW_IF_OPS;
483
484 #ifdef CONFIG_SDIO_HCI
485 #include <drv_types_sdio.h>
486 #define INTF_DATA SDIO_DATA
487 #define INTF_OPS PRTW_IF_OPS
488 #elif defined(CONFIG_GSPI_HCI)
489 #include <drv_types_gspi.h>
490 #define INTF_DATA GSPI_DATA
491 #elif defined(CONFIG_PCI_HCI)
492 #include <drv_types_pci.h>
493 #endif
494
495 #ifdef CONFIG_CONCURRENT_MODE
496 #define is_primary_adapter(adapter) (adapter->adapter_type == PRIMARY_ADAPTER)
497 #define is_vir_adapter(adapter) (adapter->adapter_type == VIRTUAL_ADAPTER)
498 #define get_hw_port(adapter) (adapter->hw_port)
499 #else
500 #define is_primary_adapter(adapter) (1)
501 #define is_vir_adapter(adapter) (0)
502 #define get_hw_port(adapter) (HW_PORT0)
503 #endif
504 #define GET_PRIMARY_ADAPTER(padapter) (((_adapter *)padapter)->dvobj->padapters[IFACE_ID0])
505 #define GET_IFACE_NUMS(padapter) (((_adapter *)padapter)->dvobj->iface_nums)
506 #define GET_ADAPTER(padapter, iface_id) (((_adapter *)padapter)->dvobj->padapters[iface_id])
507
508 #define GetDefaultAdapter(padapter) padapter
509
510 enum _IFACE_ID {
511 IFACE_ID0, /*PRIMARY_ADAPTER*/
512 IFACE_ID1,
513 IFACE_ID2,
514 IFACE_ID3,
515 IFACE_ID4,
516 IFACE_ID5,
517 IFACE_ID6,
518 IFACE_ID7,
519 IFACE_ID_MAX,
520 };
521
522 #define VIF_START_ID 1
523
524 #ifdef CONFIG_DBG_COUNTER
525
526 struct rx_logs {
527 u32 intf_rx;
528 u32 intf_rx_err_recvframe;
529 u32 intf_rx_err_skb;
530 u32 intf_rx_report;
531 u32 core_rx;
532 u32 core_rx_pre;
533 u32 core_rx_pre_ver_err;
534 u32 core_rx_pre_mgmt;
535 u32 core_rx_pre_mgmt_err_80211w;
536 u32 core_rx_pre_mgmt_err;
537 u32 core_rx_pre_ctrl;
538 u32 core_rx_pre_ctrl_err;
539 u32 core_rx_pre_data;
540 u32 core_rx_pre_data_wapi_seq_err;
541 u32 core_rx_pre_data_wapi_key_err;
542 u32 core_rx_pre_data_handled;
543 u32 core_rx_pre_data_err;
544 u32 core_rx_pre_data_unknown;
545 u32 core_rx_pre_unknown;
546 u32 core_rx_enqueue;
547 u32 core_rx_dequeue;
548 u32 core_rx_post;
549 u32 core_rx_post_decrypt;
550 u32 core_rx_post_decrypt_wep;
551 u32 core_rx_post_decrypt_tkip;
552 u32 core_rx_post_decrypt_aes;
553 u32 core_rx_post_decrypt_wapi;
554 u32 core_rx_post_decrypt_hw;
555 u32 core_rx_post_decrypt_unknown;
556 u32 core_rx_post_decrypt_err;
557 u32 core_rx_post_defrag_err;
558 u32 core_rx_post_portctrl_err;
559 u32 core_rx_post_indicate;
560 u32 core_rx_post_indicate_in_oder;
561 u32 core_rx_post_indicate_reoder;
562 u32 core_rx_post_indicate_err;
563 u32 os_indicate;
564 u32 os_indicate_ap_mcast;
565 u32 os_indicate_ap_forward;
566 u32 os_indicate_ap_self;
567 u32 os_indicate_err;
568 u32 os_netif_ok;
569 u32 os_netif_err;
570 };
571
572 struct tx_logs {
573 u32 os_tx;
574 u32 os_tx_err_up;
575 u32 os_tx_err_xmit;
576 u32 os_tx_m2u;
577 u32 os_tx_m2u_ignore_fw_linked;
578 u32 os_tx_m2u_ignore_self;
579 u32 os_tx_m2u_entry;
580 u32 os_tx_m2u_entry_err_xmit;
581 u32 os_tx_m2u_entry_err_skb;
582 u32 os_tx_m2u_stop;
583 u32 core_tx;
584 u32 core_tx_err_pxmitframe;
585 u32 core_tx_err_brtx;
586 u32 core_tx_upd_attrib;
587 u32 core_tx_upd_attrib_adhoc;
588 u32 core_tx_upd_attrib_sta;
589 u32 core_tx_upd_attrib_ap;
590 u32 core_tx_upd_attrib_unknown;
591 u32 core_tx_upd_attrib_dhcp;
592 u32 core_tx_upd_attrib_icmp;
593 u32 core_tx_upd_attrib_active;
594 u32 core_tx_upd_attrib_err_ucast_sta;
595 u32 core_tx_upd_attrib_err_ucast_ap_link;
596 u32 core_tx_upd_attrib_err_sta;
597 u32 core_tx_upd_attrib_err_link;
598 u32 core_tx_upd_attrib_err_sec;
599 u32 core_tx_ap_enqueue_warn_fwstate;
600 u32 core_tx_ap_enqueue_warn_sta;
601 u32 core_tx_ap_enqueue_warn_nosta;
602 u32 core_tx_ap_enqueue_warn_link;
603 u32 core_tx_ap_enqueue_warn_trigger;
604 u32 core_tx_ap_enqueue_mcast;
605 u32 core_tx_ap_enqueue_ucast;
606 u32 core_tx_ap_enqueue;
607 u32 intf_tx;
608 u32 intf_tx_pending_ac;
609 u32 intf_tx_pending_fw_under_survey;
610 u32 intf_tx_pending_fw_under_linking;
611 u32 intf_tx_pending_xmitbuf;
612 u32 intf_tx_enqueue;
613 u32 core_tx_enqueue;
614 u32 core_tx_enqueue_class;
615 u32 core_tx_enqueue_class_err_sta;
616 u32 core_tx_enqueue_class_err_nosta;
617 u32 core_tx_enqueue_class_err_fwlink;
618 u32 intf_tx_direct;
619 u32 intf_tx_direct_err_coalesce;
620 u32 intf_tx_dequeue;
621 u32 intf_tx_dequeue_err_coalesce;
622 u32 intf_tx_dump_xframe;
623 u32 intf_tx_dump_xframe_err_txdesc;
624 u32 intf_tx_dump_xframe_err_port;
625 };
626
627 struct int_logs {
628 u32 all;
629 u32 err;
630 u32 tbdok;
631 u32 tbder;
632 u32 bcnderr;
633 u32 bcndma;
634 u32 bcndma_e;
635 u32 rx;
636 u32 rx_rdu;
637 u32 rx_fovw;
638 u32 txfovw;
639 u32 mgntok;
640 u32 highdok;
641 u32 bkdok;
642 u32 bedok;
643 u32 vidok;
644 u32 vodok;
645 };
646
647 #endif /* CONFIG_DBG_COUNTER */
648
649 struct debug_priv {
650 u32 dbg_sdio_free_irq_error_cnt;
651 u32 dbg_sdio_alloc_irq_error_cnt;
652 u32 dbg_sdio_free_irq_cnt;
653 u32 dbg_sdio_alloc_irq_cnt;
654 u32 dbg_sdio_deinit_error_cnt;
655 u32 dbg_sdio_init_error_cnt;
656 u32 dbg_suspend_error_cnt;
657 u32 dbg_suspend_cnt;
658 u32 dbg_resume_cnt;
659 u32 dbg_resume_error_cnt;
660 u32 dbg_deinit_fail_cnt;
661 u32 dbg_carddisable_cnt;
662 u32 dbg_carddisable_error_cnt;
663 u32 dbg_ps_insuspend_cnt;
664 u32 dbg_dev_unload_inIPS_cnt;
665 u32 dbg_wow_leave_ps_fail_cnt;
666 u32 dbg_scan_pwr_state_cnt;
667 u32 dbg_downloadfw_pwr_state_cnt;
668 u32 dbg_fw_read_ps_state_fail_cnt;
669 u32 dbg_leave_ips_fail_cnt;
670 u32 dbg_leave_lps_fail_cnt;
671 u32 dbg_h2c_leave32k_fail_cnt;
672 u32 dbg_diswow_dload_fw_fail_cnt;
673 u32 dbg_enwow_dload_fw_fail_cnt;
674 u32 dbg_ips_drvopen_fail_cnt;
675 u32 dbg_poll_fail_cnt;
676 u32 dbg_rpwm_toogle_cnt;
677 u32 dbg_rpwm_timeout_fail_cnt;
678 u32 dbg_sreset_cnt;
679 u32 dbg_fw_mem_dl_error_cnt;
680 u64 dbg_rx_fifo_last_overflow;
681 u64 dbg_rx_fifo_curr_overflow;
682 u64 dbg_rx_fifo_diff_overflow;
683 };
684
685 struct rtw_traffic_statistics {
686 /* tx statistics */
687 u64 tx_bytes;
688 u64 tx_pkts;
689 u64 tx_drop;
690 u64 cur_tx_bytes;
691 u64 last_tx_bytes;
692 u32 cur_tx_tp; /* Tx throughput in MBps. */
693
694 /* rx statistics */
695 u64 rx_bytes;
696 u64 rx_pkts;
697 u64 rx_drop;
698 u64 cur_rx_bytes;
699 u64 last_rx_bytes;
700 u32 cur_rx_tp; /* Rx throughput in MBps. */
701 };
702
703 #define SEC_CAP_CHK_BMC BIT0
704
705 #define SEC_STATUS_STA_PK_GK_CONFLICT_DIS_BMC_SEARCH BIT0
706
707 struct sec_cam_bmp {
708 u32 m0;
709 #if (SEC_CAM_ENT_NUM_SW_LIMIT > 32)
710 u32 m1;
711 #endif
712 #if (SEC_CAM_ENT_NUM_SW_LIMIT > 64)
713 u32 m2;
714 #endif
715 #if (SEC_CAM_ENT_NUM_SW_LIMIT > 96)
716 u32 m3;
717 #endif
718 };
719
720 struct cam_ctl_t {
721 _lock lock;
722
723 u8 sec_cap;
724 u32 flags;
725
726 u8 num;
727 struct sec_cam_bmp used;
728
729 _mutex sec_cam_access_mutex;
730 };
731
732 struct sec_cam_ent {
733 u16 ctrl;
734 u8 mac[ETH_ALEN];
735 u8 key[16];
736 };
737
738 #define KEY_FMT "%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x"
739 #define KEY_ARG(x) ((u8 *)(x))[0], ((u8 *)(x))[1], ((u8 *)(x))[2], ((u8 *)(x))[3], ((u8 *)(x))[4], ((u8 *)(x))[5], \
740 ((u8 *)(x))[6], ((u8 *)(x))[7], ((u8 *)(x))[8], ((u8 *)(x))[9], ((u8 *)(x))[10], ((u8 *)(x))[11], \
741 ((u8 *)(x))[12], ((u8 *)(x))[13], ((u8 *)(x))[14], ((u8 *)(x))[15]
742
743 struct macid_bmp {
744 u32 m0;
745 #if (MACID_NUM_SW_LIMIT > 32)
746 u32 m1;
747 #endif
748 #if (MACID_NUM_SW_LIMIT > 64)
749 u32 m2;
750 #endif
751 #if (MACID_NUM_SW_LIMIT > 96)
752 u32 m3;
753 #endif
754 };
755
756 struct macid_ctl_t {
757 _lock lock;
758 u8 num;
759 struct macid_bmp used;
760 struct macid_bmp bmc;
761 struct macid_bmp if_g[CONFIG_IFACE_NUMBER];
762 u8 iface_bmc[CONFIG_IFACE_NUMBER];/*for bc-sta of AP or Adhoc mode*/
763 struct macid_bmp ch_g[2]; /* 2 ch concurrency */
764 u8 h2c_msr[MACID_NUM_SW_LIMIT];
765 u8 bw[MACID_NUM_SW_LIMIT];
766 u8 vht_en[MACID_NUM_SW_LIMIT];
767 u32 rate_bmp0[MACID_NUM_SW_LIMIT];
768 u32 rate_bmp1[MACID_NUM_SW_LIMIT];
769 struct sta_info *sta[MACID_NUM_SW_LIMIT];
770 };
771
772 /* used for rf_ctl_t.rate_bmp_cck_ofdm */
773 #define RATE_BMP_CCK 0x000F
774 #define RATE_BMP_OFDM 0xFFF0
775 #define RATE_BMP_HAS_CCK(_bmp_cck_ofdm) (_bmp_cck_ofdm & RATE_BMP_CCK)
776 #define RATE_BMP_HAS_OFDM(_bmp_cck_ofdm) (_bmp_cck_ofdm & RATE_BMP_OFDM)
777 #define RATE_BMP_GET_CCK(_bmp_cck_ofdm) (_bmp_cck_ofdm & RATE_BMP_CCK)
778 #define RATE_BMP_GET_OFDM(_bmp_cck_ofdm) ((_bmp_cck_ofdm & RATE_BMP_OFDM) >> 4)
779
780 /* used for rf_ctl_t.rate_bmp_ht_by_bw */
781 #define RATE_BMP_HT_1SS 0x000000FF
782 #define RATE_BMP_HT_2SS 0x0000FF00
783 #define RATE_BMP_HT_3SS 0x00FF0000
784 #define RATE_BMP_HT_4SS 0xFF000000
785 #define RATE_BMP_HAS_HT_1SS(_bmp_ht) (_bmp_ht & RATE_BMP_HT_1SS)
786 #define RATE_BMP_HAS_HT_2SS(_bmp_ht) (_bmp_ht & RATE_BMP_HT_2SS)
787 #define RATE_BMP_HAS_HT_3SS(_bmp_ht) (_bmp_ht & RATE_BMP_HT_3SS)
788 #define RATE_BMP_HAS_HT_4SS(_bmp_ht) (_bmp_ht & RATE_BMP_HT_4SS)
789 #define RATE_BMP_GET_HT_1SS(_bmp_ht) (_bmp_ht & RATE_BMP_HT_1SS)
790 #define RATE_BMP_GET_HT_2SS(_bmp_ht) ((_bmp_ht & RATE_BMP_HT_2SS) >> 8)
791 #define RATE_BMP_GET_HT_3SS(_bmp_ht) ((_bmp_ht & RATE_BMP_HT_3SS) >> 16)
792 #define RATE_BMP_GET_HT_4SS(_bmp_ht) ((_bmp_ht & RATE_BMP_HT_4SS) >> 24)
793
794 /* used for rf_ctl_t.rate_bmp_vht_by_bw */
795 #define RATE_BMP_VHT_1SS 0x000003FF
796 #define RATE_BMP_VHT_2SS 0x000FFC00
797 #define RATE_BMP_VHT_3SS 0x3FF00000
798 #define RATE_BMP_HAS_VHT_1SS(_bmp_vht) (_bmp_vht & RATE_BMP_VHT_1SS)
799 #define RATE_BMP_HAS_VHT_2SS(_bmp_vht) (_bmp_vht & RATE_BMP_VHT_2SS)
800 #define RATE_BMP_HAS_VHT_3SS(_bmp_vht) (_bmp_vht & RATE_BMP_VHT_3SS)
801 #define RATE_BMP_GET_VHT_1SS(_bmp_vht) (_bmp_vht & RATE_BMP_VHT_1SS)
802 #define RATE_BMP_GET_VHT_2SS(_bmp_vht) ((_bmp_vht & RATE_BMP_VHT_2SS) >> 10)
803 #define RATE_BMP_GET_VHT_3SS(_bmp_vht) ((_bmp_vht & RATE_BMP_VHT_3SS) >> 20)
804
805 #define TXPWR_LMT_REF_VHT_FROM_HT BIT0
806 #define TXPWR_LMT_REF_HT_FROM_VHT BIT1
807
808 #define TXPWR_LMT_HAS_CCK_1T BIT0
809 #define TXPWR_LMT_HAS_CCK_2T BIT1
810 #define TXPWR_LMT_HAS_CCK_3T BIT2
811 #define TXPWR_LMT_HAS_CCK_4T BIT3
812 #define TXPWR_LMT_HAS_OFDM_1T BIT4
813 #define TXPWR_LMT_HAS_OFDM_2T BIT5
814 #define TXPWR_LMT_HAS_OFDM_3T BIT6
815 #define TXPWR_LMT_HAS_OFDM_4T BIT7
816
817 struct rf_ctl_t {
818 const struct country_chplan *country_ent;
819 u8 ChannelPlan;
820 u8 max_chan_nums;
821 RT_CHANNEL_INFO channel_set[MAX_CHANNEL_NUM];
822 struct p2p_channels channel_list;
823
824 /* used for debug or by tx power limit */
825 u16 rate_bmp_cck_ofdm; /* 20MHz */
826 u32 rate_bmp_ht_by_bw[2]; /* 20MHz, 40MHz. 4SS supported */
827 u32 rate_bmp_vht_by_bw[4]; /* 20MHz, 40MHz, 80MHz, 160MHz. up to 3SS supported */
828
829 /* used by tx power limit */
830 u8 highest_ht_rate_bw_bmp;
831 u8 highest_vht_rate_bw_bmp;
832
833 #ifdef CONFIG_TXPWR_LIMIT
834 _mutex txpwr_lmt_mutex;
835 _list reg_exc_list;
836 u8 regd_exc_num;
837 _list txpwr_lmt_list;
838 u8 txpwr_regd_num;
839 const char *regd_name;
840
841 u8 txpwr_lmt_2g_cck_ofdm_state;
842 #ifdef CONFIG_IEEE80211_BAND_5GHZ
843 u8 txpwr_lmt_5g_cck_ofdm_state;
844 u8 txpwr_lmt_5g_20_40_ref;
845 #endif
846 #endif
847
848 #ifdef CONFIG_DFS_MASTER
849 bool radar_detect_by_others;
850 u8 dfs_master_enabled;
851 bool radar_detected;
852
853 u8 radar_detect_ch;
854 u8 radar_detect_bw;
855 u8 radar_detect_offset;
856
857 systime cac_start_time;
858 systime cac_end_time;
859
860 u8 dfs_ch_sel_d_flags;
861
862 u8 dbg_dfs_master_fake_radar_detect_cnt;
863 u8 dbg_dfs_master_radar_detect_trigger_non;
864 u8 dbg_dfs_master_choose_dfs_ch_first;
865 #endif
866 };
867
868 #define RTW_CAC_STOPPED 0
869 #define IS_CAC_STOPPED(rfctl) ((rfctl)->cac_end_time == RTW_CAC_STOPPED)
870 #define IS_CH_WAITING(rfctl) (!IS_CAC_STOPPED(rfctl) && time_after((rfctl)->cac_end_time, rtw_get_current_time()))
871 #define IS_UNDER_CAC(rfctl) (IS_CH_WAITING(rfctl) && time_after(rtw_get_current_time(), (rfctl)->cac_start_time))
872
873 #ifdef CONFIG_MBSSID_CAM
874 #define TOTAL_MBID_CAM_NUM 8
875 #define INVALID_CAM_ID 0xFF
876 struct mbid_cam_ctl_t {
877 _lock lock;
878 u8 bitmap;
879 ATOMIC_T mbid_entry_num;
880 };
881 struct mbid_cam_cache {
882 u8 iface_id;
883 /*u8 role;*/ /*WIFI_STATION_STATE or WIFI_AP_STATE*/
884 u8 mac_addr[ETH_ALEN];
885 };
886 #endif /*CONFIG_MBSSID_CAM*/
887
888 #ifdef RTW_HALMAC
889 struct halmac_indicator {
890 struct submit_ctx *sctx;
891 u8 *buffer;
892 u32 buf_size;
893 u32 ret_size;
894 u32 status;
895 };
896
897 struct halmacpriv {
898 /* flags */
899
900 /* For asynchronous functions */
901 struct halmac_indicator *indicator;
902
903 /* Hardware parameters */
904 #ifdef CONFIG_SDIO_HCI
905 /* Store hardware tx queue page number setting */
906 u16 txpage[HW_QUEUE_ENTRY];
907 #endif /* CONFIG_SDIO_HCI */
908 };
909 #endif /* RTW_HALMAC */
910
911 struct dvobj_priv {
912 /*-------- below is common data --------*/
913 u8 chip_type;
914 u8 HardwareType;
915 u8 interface_type;/*USB,SDIO,SPI,PCI*/
916
917 ATOMIC_T bSurpriseRemoved;
918 ATOMIC_T bDriverStopped;
919
920 s32 processing_dev_remove;
921
922 struct debug_priv drv_dbg;
923
924 _mutex hw_init_mutex;
925 _mutex h2c_fwcmd_mutex;
926
927 #ifdef CONFIG_RTW_CUSTOMER_STR
928 _mutex customer_str_mutex;
929 struct submit_ctx *customer_str_sctx;
930 u8 customer_str[RTW_CUSTOMER_STR_LEN];
931 #endif
932
933 _mutex setch_mutex;
934 _mutex setbw_mutex;
935 _mutex rf_read_reg_mutex;
936 #ifdef CONFIG_SDIO_INDIRECT_ACCESS
937 _mutex sd_indirect_access_mutex;
938 #endif
939
940 unsigned char oper_channel; /* saved channel info when call set_channel_bw */
941 unsigned char oper_bwmode;
942 unsigned char oper_ch_offset;/* PRIME_CHNL_OFFSET */
943 systime on_oper_ch_time;
944
945 _adapter *padapters[CONFIG_IFACE_NUMBER];/*IFACE_ID_MAX*/
946 u8 iface_nums; /* total number of ifaces used runtime */
947 struct mi_state iface_state;
948
949 #ifdef CONFIG_AP_MODE
950 u8 nr_ap_if; /* total interface s number of ap/go mode. */
951 u16 inter_bcn_space; /* unit:ms */
952 _queue ap_if_q;
953 #ifdef CONFIG_RTW_REPEATER_SON
954 struct rtw_rson_struct rson_data;
955 #endif
956
957 #endif
958
959 struct macid_ctl_t macid_ctl;
960
961 struct cam_ctl_t cam_ctl;
962 struct sec_cam_ent cam_cache[SEC_CAM_ENT_NUM_SW_LIMIT];
963
964 #ifdef CONFIG_MBSSID_CAM
965 struct mbid_cam_ctl_t mbid_cam_ctl;
966 struct mbid_cam_cache mbid_cam_cache[TOTAL_MBID_CAM_NUM];
967 #endif
968
969 struct rf_ctl_t rf_ctl;
970
971 /* For 92D, DMDP have 2 interface. */
972 u8 InterfaceNumber;
973 u8 NumInterfaces;
974
975 /* In /Out Pipe information */
976 int RtInPipe[2];
977 int RtOutPipe[4];
978 u8 Queue2Pipe[HW_QUEUE_ENTRY];/* for out pipe mapping */
979
980 u8 irq_alloc;
981 ATOMIC_T continual_io_error;
982
983 ATOMIC_T disable_func;
984
985 u8 xmit_block;
986 _lock xmit_block_lock;
987
988 struct pwrctrl_priv pwrctl_priv;
989
990 struct rtw_traffic_statistics traffic_stat;
991
992 #ifdef PLATFORM_LINUX
993 _thread_hdl_ rtnl_lock_holder;
994
995 #if defined(CONFIG_IOCTL_CFG80211) && defined(RTW_SINGLE_WIPHY)
996 struct wiphy *wiphy;
997 #endif
998 #endif /* PLATFORM_LINUX */
999
1000 #ifdef CONFIG_SWTIMER_BASED_TXBCN
1001 _timer txbcn_timer;
1002 #endif
1003 _timer dynamic_chk_timer; /* dynamic/periodic check timer */
1004
1005 #ifdef CONFIG_RTW_NAPI_DYNAMIC
1006 u8 en_napi_dynamic;
1007 #endif /* CONFIG_RTW_NAPI_DYNAMIC */
1008
1009 #ifdef RTW_HALMAC
1010 void *halmac;
1011 struct halmacpriv hmpriv;
1012 #endif /* RTW_HALMAC */
1013
1014 #ifdef CONFIG_FW_MULTI_PORT_SUPPORT
1015 u8 default_port_id;
1016 #endif
1017 /*-------- below is for SDIO INTERFACE --------*/
1018
1019 #ifdef INTF_DATA
1020 INTF_DATA intf_data;
1021 #endif
1022 #ifdef INTF_OPS
1023 INTF_OPS intf_ops;
1024 #endif
1025
1026 /*-------- below is for USB INTERFACE --------*/
1027
1028 #ifdef CONFIG_USB_HCI
1029
1030 u8 usb_speed; /* 1.1, 2.0 or 3.0 */
1031 u8 nr_endpoint;
1032 u8 RtNumInPipes;
1033 u8 RtNumOutPipes;
1034 int ep_num[6]; /* endpoint number */
1035
1036 int RegUsbSS;
1037
1038 _sema usb_suspend_sema;
1039
1040 #ifdef CONFIG_USB_VENDOR_REQ_MUTEX
1041 _mutex usb_vendor_req_mutex;
1042 #endif
1043
1044 #ifdef CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC
1045 u8 *usb_alloc_vendor_req_buf;
1046 u8 *usb_vendor_req_buf;
1047 #endif
1048
1049 #ifdef PLATFORM_WINDOWS
1050 /* related device objects */
1051 PDEVICE_OBJECT pphysdevobj;/* pPhysDevObj; */
1052 PDEVICE_OBJECT pfuncdevobj;/* pFuncDevObj; */
1053 PDEVICE_OBJECT pnextdevobj;/* pNextDevObj; */
1054
1055 u8 nextdevstacksz;/* unsigned char NextDeviceStackSize; */ /* = (CHAR)CEdevice->pUsbDevObj->StackSize + 1; */
1056
1057 /* urb for control diescriptor request */
1058
1059 #ifdef PLATFORM_OS_XP
1060 struct _URB_CONTROL_DESCRIPTOR_REQUEST descriptor_urb;
1061 PUSB_CONFIGURATION_DESCRIPTOR pconfig_descriptor;/* UsbConfigurationDescriptor; */
1062 #endif
1063
1064 #ifdef PLATFORM_OS_CE
1065 WCHAR active_path[MAX_ACTIVE_REG_PATH]; /* adapter regpath */
1066 USB_EXTENSION usb_extension;
1067
1068 _nic_hdl pipehdls_r8192c[0x10];
1069 #endif
1070
1071 u32 config_descriptor_len;/* ULONG UsbConfigurationDescriptorLength; */
1072 #endif/* PLATFORM_WINDOWS */
1073
1074 #ifdef PLATFORM_LINUX
1075 struct usb_interface *pusbintf;
1076 struct usb_device *pusbdev;
1077 #endif/* PLATFORM_LINUX */
1078
1079 #ifdef PLATFORM_FREEBSD
1080 struct usb_interface *pusbintf;
1081 struct usb_device *pusbdev;
1082 #endif/* PLATFORM_FREEBSD */
1083
1084 #endif/* CONFIG_USB_HCI */
1085
1086 /*-------- below is for PCIE INTERFACE --------*/
1087
1088 #ifdef CONFIG_PCI_HCI
1089
1090 #ifdef PLATFORM_LINUX
1091 struct pci_dev *ppcidev;
1092
1093 /* PCI MEM map */
1094 unsigned long pci_mem_end; /* shared mem end */
1095 unsigned long pci_mem_start; /* shared mem start */
1096
1097 /* PCI IO map */
1098 unsigned long pci_base_addr; /* device I/O address */
1099
1100 #ifdef RTK_129X_PLATFORM
1101 unsigned long ctrl_start;
1102 /* PCI MASK addr */
1103 unsigned long mask_addr;
1104
1105 /* PCI TRANSLATE addr */
1106 unsigned long tran_addr;
1107
1108 _lock io_reg_lock;
1109 #endif
1110
1111 /* PciBridge */
1112 struct pci_priv pcipriv;
1113
1114 unsigned int irq; /* get from pci_dev.irq, store to net_device.irq */
1115 u16 irqline;
1116 u8 irq_enabled;
1117 RT_ISR_CONTENT isr_content;
1118 _lock irq_th_lock;
1119
1120 /* ASPM */
1121 u8 const_pci_aspm;
1122 u8 const_amdpci_aspm;
1123 u8 const_hwsw_rfoff_d3;
1124 u8 const_support_pciaspm;
1125 /* pci-e bridge */
1126 u8 const_hostpci_aspm_setting;
1127 /* pci-e device */
1128 u8 const_devicepci_aspm_setting;
1129 u8 b_support_aspm; /* If it supports ASPM, Offset[560h] = 0x40, otherwise Offset[560h] = 0x00. */
1130 u8 b_support_backdoor;
1131 u8 bdma64;
1132 #endif/* PLATFORM_LINUX */
1133
1134 #endif/* CONFIG_PCI_HCI */
1135
1136 #ifdef CONFIG_MCC_MODE
1137 struct mcc_obj_priv mcc_objpriv;
1138 #endif /*CONFIG_MCC_MODE */
1139 };
1140
1141 #define DEV_STA_NUM(_dvobj) MSTATE_STA_NUM(&((_dvobj)->iface_state))
1142 #define DEV_STA_LD_NUM(_dvobj) MSTATE_STA_LD_NUM(&((_dvobj)->iface_state))
1143 #define DEV_STA_LG_NUM(_dvobj) MSTATE_STA_LG_NUM(&((_dvobj)->iface_state))
1144 #define DEV_TDLS_LD_NUM(_dvobj) MSTATE_TDLS_LD_NUM(&((_dvobj)->iface_state))
1145 #define DEV_AP_NUM(_dvobj) MSTATE_AP_NUM(&((_dvobj)->iface_state))
1146 #define DEV_AP_LD_NUM(_dvobj) MSTATE_AP_LD_NUM(&((_dvobj)->iface_state))
1147 #define DEV_ADHOC_NUM(_dvobj) MSTATE_ADHOC_NUM(&((_dvobj)->iface_state))
1148 #define DEV_ADHOC_LD_NUM(_dvobj) MSTATE_ADHOC_LD_NUM(&((_dvobj)->iface_state))
1149 #define DEV_MESH_NUM(_dvobj) MSTATE_MESH_NUM(&((_dvobj)->iface_state))
1150 #define DEV_MESH_LD_NUM(_dvobj) MSTATE_MESH_LD_NUM(&((_dvobj)->iface_state))
1151 #define DEV_SCAN_NUM(_dvobj) MSTATE_SCAN_NUM(&((_dvobj)->iface_state))
1152 #define DEV_WPS_NUM(_dvobj) MSTATE_WPS_NUM(&((_dvobj)->iface_state))
1153 #define DEV_ROCH_NUM(_dvobj) MSTATE_ROCH_NUM(&((_dvobj)->iface_state))
1154 #define DEV_MGMT_TX_NUM(_dvobj) MSTATE_MGMT_TX_NUM(&((_dvobj)->iface_state))
1155 #define DEV_U_CH(_dvobj) MSTATE_U_CH(&((_dvobj)->iface_state))
1156 #define DEV_U_BW(_dvobj) MSTATE_U_BW(&((_dvobj)->iface_state))
1157 #define DEV_U_OFFSET(_dvobj) MSTATE_U_OFFSET(&((_dvobj)->iface_state))
1158
1159 #define dvobj_to_pwrctl(dvobj) (&(dvobj->pwrctl_priv))
1160 #define pwrctl_to_dvobj(pwrctl) container_of(pwrctl, struct dvobj_priv, pwrctl_priv)
1161 #define dvobj_to_macidctl(dvobj) (&(dvobj->macid_ctl))
1162 #define dvobj_to_sec_camctl(dvobj) (&(dvobj->cam_ctl))
1163 #define dvobj_to_regsty(dvobj) (&(dvobj->padapters[IFACE_ID0]->registrypriv))
1164 #if defined(CONFIG_IOCTL_CFG80211) && defined(RTW_SINGLE_WIPHY)
1165 #define dvobj_to_wiphy(dvobj) ((dvobj)->wiphy)
1166 #endif
1167 #define dvobj_to_rfctl(dvobj) (&(dvobj->rf_ctl))
1168 #define rfctl_to_dvobj(rfctl) container_of((rfctl), struct dvobj_priv, rf_ctl)
1169
dev_set_surprise_removed(struct dvobj_priv * dvobj)1170 static inline void dev_set_surprise_removed(struct dvobj_priv *dvobj)
1171 {
1172 ATOMIC_SET(&dvobj->bSurpriseRemoved, _TRUE);
1173 }
dev_clr_surprise_removed(struct dvobj_priv * dvobj)1174 static inline void dev_clr_surprise_removed(struct dvobj_priv *dvobj)
1175 {
1176 ATOMIC_SET(&dvobj->bSurpriseRemoved, _FALSE);
1177 }
dev_set_drv_stopped(struct dvobj_priv * dvobj)1178 static inline void dev_set_drv_stopped(struct dvobj_priv *dvobj)
1179 {
1180 ATOMIC_SET(&dvobj->bDriverStopped, _TRUE);
1181 }
dev_clr_drv_stopped(struct dvobj_priv * dvobj)1182 static inline void dev_clr_drv_stopped(struct dvobj_priv *dvobj)
1183 {
1184 ATOMIC_SET(&dvobj->bDriverStopped, _FALSE);
1185 }
1186 #define dev_is_surprise_removed(dvobj) (ATOMIC_READ(&dvobj->bSurpriseRemoved) == _TRUE)
1187 #define dev_is_drv_stopped(dvobj) (ATOMIC_READ(&dvobj->bDriverStopped) == _TRUE)
1188
1189 #ifdef PLATFORM_LINUX
dvobj_to_dev(struct dvobj_priv * dvobj)1190 static struct device *dvobj_to_dev(struct dvobj_priv *dvobj)
1191 {
1192 /* todo: get interface type from dvobj and the return the dev accordingly */
1193 #ifdef RTW_DVOBJ_CHIP_HW_TYPE
1194 #endif
1195
1196 #ifdef CONFIG_USB_HCI
1197 return &dvobj->pusbintf->dev;
1198 #endif
1199 #ifdef CONFIG_SDIO_HCI
1200 return &dvobj->intf_data.func->dev;
1201 #endif
1202 #ifdef CONFIG_GSPI_HCI
1203 return &dvobj->intf_data.func->dev;
1204 #endif
1205 #ifdef CONFIG_PCI_HCI
1206 return &dvobj->ppcidev->dev;
1207 #endif
1208 }
1209 #endif
1210
1211 _adapter *dvobj_get_port0_adapter(struct dvobj_priv *dvobj);
1212 _adapter *dvobj_get_unregisterd_adapter(struct dvobj_priv *dvobj);
1213 _adapter *dvobj_get_adapter_by_addr(struct dvobj_priv *dvobj, u8 *addr);
1214 #define dvobj_get_primary_adapter(dvobj) ((dvobj)->padapters[IFACE_ID0])
1215
1216 enum _hw_port {
1217 HW_PORT0,
1218 HW_PORT1,
1219 HW_PORT2,
1220 HW_PORT3,
1221 HW_PORT4,
1222 MAX_HW_PORT,
1223 };
1224
1225 enum _ADAPTER_TYPE {
1226 PRIMARY_ADAPTER,
1227 VIRTUAL_ADAPTER,
1228 MAX_ADAPTER = 0xFF,
1229 };
1230
1231 typedef enum _DRIVER_STATE {
1232 DRIVER_NORMAL = 0,
1233 DRIVER_DISAPPEAR = 1,
1234 DRIVER_REPLACE_DONGLE = 2,
1235 } DRIVER_STATE;
1236
1237 #ifdef CONFIG_RTW_NAPI
1238 enum _NAPI_STATE {
1239 NAPI_DISABLE = 0,
1240 NAPI_ENABLE = 1,
1241 };
1242 #endif
1243
1244 #ifdef CONFIG_INTEL_PROXIM
1245 struct proxim {
1246 bool proxim_support;
1247 bool proxim_on;
1248
1249 void *proximity_priv;
1250 int (*proxim_rx)(_adapter *padapter,
1251 union recv_frame *precv_frame);
1252 u8(*proxim_get_var)(_adapter *padapter, u8 type);
1253 };
1254 #endif /* CONFIG_INTEL_PROXIM */
1255
1256 #ifdef CONFIG_MAC_LOOPBACK_DRIVER
1257 typedef struct loopbackdata {
1258 _sema sema;
1259 _thread_hdl_ lbkthread;
1260 u8 bstop;
1261 u32 cnt;
1262 u16 size;
1263 u16 txsize;
1264 u8 txbuf[0x8000];
1265 u16 rxsize;
1266 u8 rxbuf[0x8000];
1267 u8 msg[100];
1268
1269 } LOOPBACKDATA, *PLOOPBACKDATA;
1270 #endif
1271
1272 struct tsf_info {
1273 u8 sync_port;/*tsf sync from portx*/
1274 u8 offset; /*tsf timer offset*/
1275 };
1276
1277 #define ADAPTER_TX_BW_2G(adapter) BW_MODE_2G((adapter)->driver_tx_bw_mode)
1278 #define ADAPTER_TX_BW_5G(adapter) BW_MODE_5G((adapter)->driver_tx_bw_mode)
1279
1280 struct _ADAPTER {
1281 int DriverState;/* for disable driver using module, use dongle to replace module. */
1282 int pid[3];/* process id from UI, 0:wps, 1:hostapd, 2:dhcpcd */
1283 int bDongle;/* build-in module or external dongle */
1284
1285 _list list;
1286
1287 struct dvobj_priv *dvobj;
1288 struct mlme_priv mlmepriv;
1289 struct mlme_ext_priv mlmeextpriv;
1290 struct cmd_priv cmdpriv;
1291 struct evt_priv evtpriv;
1292 /* struct io_queue *pio_queue; */
1293 struct io_priv iopriv;
1294 struct xmit_priv xmitpriv;
1295 struct recv_priv recvpriv;
1296 struct sta_priv stapriv;
1297 struct security_priv securitypriv;
1298 _lock security_key_mutex; /* add for CONFIG_IEEE80211W, none 11w also can use */
1299 struct registry_priv registrypriv;
1300 #ifdef CONFIG_RTW_LED
1301 struct led_priv ledpriv;
1302 #endif
1303
1304
1305 #ifdef CONFIG_RTW_NAPI
1306 struct napi_struct napi;
1307 u8 napi_state;
1308 #endif
1309
1310 #ifdef CONFIG_MP_INCLUDED
1311 struct mp_priv mppriv;
1312 #endif
1313
1314 #ifdef CONFIG_DRVEXT_MODULE
1315 struct drvext_priv drvextpriv;
1316 #endif
1317
1318 #ifdef CONFIG_AP_MODE
1319 struct hostapd_priv *phostapdpriv;
1320 #endif
1321
1322 #ifdef CONFIG_IOCTL_CFG80211
1323 #ifdef CONFIG_P2P
1324 struct cfg80211_wifidirect_info cfg80211_wdinfo;
1325 #endif /* CONFIG_P2P */
1326 #endif /* CONFIG_IOCTL_CFG80211 */
1327 u32 setband;
1328 ATOMIC_T bandskip;
1329
1330 #ifdef CONFIG_P2P
1331 struct wifidirect_info wdinfo;
1332 #endif /* CONFIG_P2P */
1333
1334 #ifdef CONFIG_TDLS
1335 struct tdls_info tdlsinfo;
1336 #endif /* CONFIG_TDLS */
1337
1338 #ifdef CONFIG_WAPI_SUPPORT
1339 u8 WapiSupport;
1340 RT_WAPI_T wapiInfo;
1341 #endif
1342
1343 #ifdef CONFIG_RTW_REPEATER_SON
1344 u8 rtw_rson_scanstage;
1345 #endif
1346
1347 #ifdef CONFIG_WFD
1348 struct wifi_display_info wfd_info;
1349 #endif /* CONFIG_WFD */
1350
1351 #ifdef CONFIG_BT_COEXIST_SOCKET_TRX
1352 struct bt_coex_info coex_info;
1353 #endif /* CONFIG_BT_COEXIST_SOCKET_TRX */
1354
1355 ERROR_CODE LastError; /* <20130613, Kordan> Only the functions associated with MP records the error code by now. */
1356
1357 PVOID HalData;
1358 u32 hal_data_sz;
1359 struct hal_ops hal_func;
1360
1361 u32 IsrContent;
1362 u32 ImrContent;
1363
1364 u8 EepromAddressSize;
1365 u8 bDriverIsGoingToUnload;
1366 u8 init_adpt_in_progress;
1367 u8 bHaltInProgress;
1368 #ifdef CONFIG_GPIO_API
1369 u8 pre_gpio_pin;
1370 struct gpio_int_priv {
1371 u8 interrupt_mode;
1372 u8 interrupt_enable_mask;
1373 void (*callback[8])(u8 level);
1374 } gpiointpriv;
1375 #endif
1376 _thread_hdl_ cmdThread;
1377 _thread_hdl_ evtThread;
1378 _thread_hdl_ xmitThread;
1379 _thread_hdl_ recvThread;
1380
1381 u8 registered;
1382 #ifndef PLATFORM_LINUX
1383 NDIS_STATUS(*dvobj_init)(struct dvobj_priv *dvobj);
1384 void (*dvobj_deinit)(struct dvobj_priv *dvobj);
1385 #endif
1386
1387 u32(*intf_init)(struct dvobj_priv *dvobj);
1388 void (*intf_deinit)(struct dvobj_priv *dvobj);
1389 int (*intf_alloc_irq)(struct dvobj_priv *dvobj);
1390 void (*intf_free_irq)(struct dvobj_priv *dvobj);
1391
1392
1393 void (*intf_start)(_adapter *adapter);
1394 void (*intf_stop)(_adapter *adapter);
1395
1396 #ifdef PLATFORM_WINDOWS
1397 _nic_hdl hndis_adapter;/* hNdisAdapter(NDISMiniportAdapterHandle); */
1398 _nic_hdl hndis_config;/* hNdisConfiguration; */
1399 NDIS_STRING fw_img;
1400
1401 u32 NdisPacketFilter;
1402 u8 MCList[MAX_MCAST_LIST_NUM][6];
1403 u32 MCAddrCount;
1404 #endif /* end of PLATFORM_WINDOWS */
1405
1406
1407 #ifdef PLATFORM_LINUX
1408 _nic_hdl pnetdev;
1409 char old_ifname[IFNAMSIZ];
1410
1411 /* used by rtw_rereg_nd_name related function */
1412 struct rereg_nd_name_data {
1413 _nic_hdl old_pnetdev;
1414 char old_ifname[IFNAMSIZ];
1415 u8 old_ips_mode;
1416 u8 old_bRegUseLed;
1417 } rereg_nd_name_priv;
1418
1419 u8 ndev_unregistering;
1420 int bup;
1421 struct net_device_stats stats;
1422 struct iw_statistics iwstats;
1423 struct proc_dir_entry *dir_dev;/* for proc directory */
1424 struct proc_dir_entry *dir_odm;
1425
1426 #ifdef CONFIG_MCC_MODE
1427 struct proc_dir_entry *dir_mcc;
1428 #endif /* CONFIG_MCC_MODE */
1429
1430 #ifdef CONFIG_IOCTL_CFG80211
1431 struct wireless_dev *rtw_wdev;
1432 struct rtw_wdev_priv wdev_data;
1433
1434 #if !defined(RTW_SINGLE_WIPHY)
1435 struct wiphy *wiphy;
1436 #endif
1437
1438 #endif /* CONFIG_IOCTL_CFG80211 */
1439
1440 #endif /* PLATFORM_LINUX */
1441
1442 #ifdef PLATFORM_FREEBSD
1443 _nic_hdl pifp;
1444 int bup;
1445 _lock glock;
1446 #endif /* PLATFORM_FREEBSD */
1447 u8 mac_addr[ETH_ALEN];
1448 int net_closed;
1449
1450 u8 netif_up;
1451
1452 u8 bBTFWReady;
1453 u8 bLinkInfoDump;
1454 u8 bRxRSSIDisplay;
1455 /* Added by Albert 2012/10/26 */
1456 /* The driver will show up the desired channel number when this flag is 1. */
1457 u8 bNotifyChannelChange;
1458 u8 bsta_tp_dump;
1459 #ifdef CONFIG_P2P
1460 /* Added by Albert 2012/12/06 */
1461 /* The driver will show the current P2P status when the upper application reads it. */
1462 u8 bShowGetP2PState;
1463 #endif
1464 #ifdef CONFIG_AUTOSUSPEND
1465 u8 bDisableAutosuspend;
1466 #endif
1467
1468 u8 isprimary; /* is primary adapter or not */
1469 /* notes:
1470 ** if isprimary is true, the adapter_type value is 0, iface_id is IFACE_ID0 for PRIMARY_ADAPTER
1471 ** if isprimary is false, the adapter_type value is 1, iface_id is IFACE_ID1 for VIRTUAL_ADAPTER
1472 ** refer to iface_id if iface_nums>2 and isprimary is false and the adapter_type value is 0xff.*/
1473 u8 adapter_type;/*be used in Multi-interface to recognize whether is PRIMARY_ADAPTER or not(PRIMARY_ADAPTER/VIRTUAL_ADAPTER) .*/
1474 u8 hw_port; /*interface port type, it depends on HW port */
1475 struct tsf_info tsf;
1476
1477
1478 /*extend to support multi interface*/
1479 /*IFACE_ID0 is equals to PRIMARY_ADAPTER
1480 IFACE_ID1 is equals to VIRTUAL_ADAPTER*/
1481 u8 iface_id;
1482
1483 #ifdef CONFIG_BR_EXT
1484 _lock br_ext_lock;
1485 /* unsigned int macclone_completed; */
1486 struct nat25_network_db_entry *nethash[NAT25_HASH_SIZE];
1487 int pppoe_connection_in_progress;
1488 unsigned char pppoe_addr[MACADDRLEN];
1489 unsigned char scdb_mac[MACADDRLEN];
1490 unsigned char scdb_ip[4];
1491 struct nat25_network_db_entry *scdb_entry;
1492 unsigned char br_mac[MACADDRLEN];
1493 unsigned char br_ip[4];
1494
1495 struct br_ext_info ethBrExtInfo;
1496 #endif /* CONFIG_BR_EXT */
1497
1498 #ifdef CONFIG_INTEL_PROXIM
1499 /* intel Proximity, should be alloc mem
1500 * in intel Proximity module and can only
1501 * be used in intel Proximity mode */
1502 struct proxim proximity;
1503 #endif /* CONFIG_INTEL_PROXIM */
1504
1505 #ifdef CONFIG_MAC_LOOPBACK_DRIVER
1506 PLOOPBACKDATA ploopback;
1507 #endif
1508
1509 /* for debug purpose */
1510 u8 fix_rate;
1511 u8 fix_bw;
1512 u8 data_fb; /* data rate fallback, valid only when fix_rate is not 0xff */
1513 u8 power_offset;
1514 u8 driver_tx_bw_mode;
1515 u8 rsvd_page_offset;
1516 u8 rsvd_page_num;
1517 #ifdef CONFIG_AP_MODE
1518 u8 bmc_tx_rate;
1519 #endif
1520 #ifdef CONFIG_SUPPORT_FIFO_DUMP
1521 u8 fifo_sel;
1522 u32 fifo_addr;
1523 u32 fifo_size;
1524 #endif
1525
1526 u8 driver_vcs_en; /* Enable=1, Disable=0 driver control vrtl_carrier_sense for tx */
1527 u8 driver_vcs_type;/* force 0:disable VCS, 1:RTS-CTS, 2:CTS-to-self when vcs_en=1. */
1528 u8 driver_ampdu_spacing;/* driver control AMPDU Density for peer sta's rx */
1529 u8 driver_rx_ampdu_factor;/* 0xff: disable drv ctrl, 0:8k, 1:16k, 2:32k, 3:64k; */
1530 u8 driver_rx_ampdu_spacing; /* driver control Rx AMPDU Density */
1531 u8 fix_rx_ampdu_accept;
1532 u8 fix_rx_ampdu_size; /* 0~127, TODO:consider each sta and each TID */
1533 #ifdef CONFIG_TX_AMSDU
1534 u8 tx_amsdu;
1535 u16 tx_amsdu_rate;
1536 #endif
1537 u8 driver_tx_max_agg_num; /*fix tx desc max agg num , 0xff: disable drv ctrl*/
1538 #ifdef DBG_RX_COUNTER_DUMP
1539 u8 dump_rx_cnt_mode;/*BIT0:drv,BIT1:mac,BIT2:phy*/
1540 u32 drv_rx_cnt_ok;
1541 u32 drv_rx_cnt_crcerror;
1542 u32 drv_rx_cnt_drop;
1543 #endif
1544
1545 #ifdef CONFIG_DBG_COUNTER
1546 struct rx_logs rx_logs;
1547 struct tx_logs tx_logs;
1548 struct int_logs int_logs;
1549 #endif
1550
1551 #ifdef CONFIG_MCC_MODE
1552 struct mcc_adapter_priv mcc_adapterpriv;
1553 #endif /* CONFIG_MCC_MODE */
1554 };
1555
1556 #define adapter_to_dvobj(adapter) ((adapter)->dvobj)
1557 #define adapter_to_regsty(adapter) dvobj_to_regsty(adapter_to_dvobj((adapter)))
1558 #define adapter_to_pwrctl(adapter) dvobj_to_pwrctl(adapter_to_dvobj((adapter)))
1559 #define adapter_wdev_data(adapter) (&((adapter)->wdev_data))
1560 #if defined(RTW_SINGLE_WIPHY)
1561 #define adapter_to_wiphy(adapter) dvobj_to_wiphy(adapter_to_dvobj(adapter))
1562 #else
1563 #define adapter_to_wiphy(adapter) ((adapter)->wiphy)
1564 #endif
1565
1566 #define adapter_to_rfctl(adapter) dvobj_to_rfctl(adapter_to_dvobj((adapter)))
1567
1568 #define adapter_mac_addr(adapter) (adapter->mac_addr)
1569 #define adapter_to_chset(adapter) (adapter_to_rfctl((adapter))->channel_set)
1570
1571 #define mlme_to_adapter(mlme) container_of((mlme), struct _ADAPTER, mlmepriv)
1572 #define tdls_info_to_adapter(tdls) container_of((tdls), struct _ADAPTER, tdlsinfo)
1573
1574 #define rtw_get_chip_type(adapter) (((PADAPTER)adapter)->dvobj->chip_type)
1575 #define rtw_get_hw_type(adapter) (((PADAPTER)adapter)->dvobj->HardwareType)
1576 #define rtw_get_intf_type(adapter) (((PADAPTER)adapter)->dvobj->interface_type)
1577
1578 #define rtw_get_mi_nums(adapter) (((PADAPTER)adapter)->dvobj->iface_nums)
1579
rtw_set_surprise_removed(_adapter * padapter)1580 static inline void rtw_set_surprise_removed(_adapter *padapter)
1581 {
1582 dev_set_surprise_removed(adapter_to_dvobj(padapter));
1583 }
rtw_clr_surprise_removed(_adapter * padapter)1584 static inline void rtw_clr_surprise_removed(_adapter *padapter)
1585 {
1586 dev_clr_surprise_removed(adapter_to_dvobj(padapter));
1587 }
rtw_set_drv_stopped(_adapter * padapter)1588 static inline void rtw_set_drv_stopped(_adapter *padapter)
1589 {
1590 dev_set_drv_stopped(adapter_to_dvobj(padapter));
1591 }
rtw_clr_drv_stopped(_adapter * padapter)1592 static inline void rtw_clr_drv_stopped(_adapter *padapter)
1593 {
1594 dev_clr_drv_stopped(adapter_to_dvobj(padapter));
1595 }
1596 #define rtw_is_surprise_removed(padapter) (dev_is_surprise_removed(adapter_to_dvobj(padapter)))
1597 #define rtw_is_drv_stopped(padapter) (dev_is_drv_stopped(adapter_to_dvobj(padapter)))
1598
1599 /*
1600 * Function disabled.
1601 * */
1602 #define DF_TX_BIT BIT0 /*write_port_cancel*/
1603 #define DF_RX_BIT BIT1 /*read_port_cancel*/
1604 #define DF_IO_BIT BIT2
1605
1606 /* #define RTW_DISABLE_FUNC(padapter, func) (ATOMIC_ADD(&adapter_to_dvobj(padapter)->disable_func, (func))) */
1607 /* #define RTW_ENABLE_FUNC(padapter, func) (ATOMIC_SUB(&adapter_to_dvobj(padapter)->disable_func, (func))) */
RTW_DISABLE_FUNC(_adapter * padapter,int func_bit)1608 __inline static void RTW_DISABLE_FUNC(_adapter *padapter, int func_bit)
1609 {
1610 int df = ATOMIC_READ(&adapter_to_dvobj(padapter)->disable_func);
1611 df |= func_bit;
1612 ATOMIC_SET(&adapter_to_dvobj(padapter)->disable_func, df);
1613 }
1614
RTW_ENABLE_FUNC(_adapter * padapter,int func_bit)1615 __inline static void RTW_ENABLE_FUNC(_adapter *padapter, int func_bit)
1616 {
1617 int df = ATOMIC_READ(&adapter_to_dvobj(padapter)->disable_func);
1618 df &= ~(func_bit);
1619 ATOMIC_SET(&adapter_to_dvobj(padapter)->disable_func, df);
1620 }
1621
1622 #define RTW_CANNOT_RUN(padapter) \
1623 (rtw_is_surprise_removed(padapter) || \
1624 rtw_is_drv_stopped(padapter))
1625
1626 #define RTW_IS_FUNC_DISABLED(padapter, func_bit) (ATOMIC_READ(&adapter_to_dvobj(padapter)->disable_func) & (func_bit))
1627
1628 #define RTW_CANNOT_IO(padapter) \
1629 (rtw_is_surprise_removed(padapter) || \
1630 RTW_IS_FUNC_DISABLED((padapter), DF_IO_BIT))
1631
1632 #define RTW_CANNOT_RX(padapter) \
1633 (RTW_CANNOT_RUN(padapter) || \
1634 RTW_IS_FUNC_DISABLED((padapter), DF_RX_BIT))
1635
1636 #define RTW_CANNOT_TX(padapter) \
1637 (RTW_CANNOT_RUN(padapter) || \
1638 RTW_IS_FUNC_DISABLED((padapter), DF_TX_BIT))
1639
1640 #ifdef CONFIG_PNO_SUPPORT
1641 int rtw_parse_ssid_list_tlv(char **list_str, pno_ssid_t *ssid, int max, int *bytes_left);
1642 int rtw_dev_pno_set(struct net_device *net, pno_ssid_t *ssid, int num,
1643 int pno_time, int pno_repeat, int pno_freq_expo_max);
1644 #ifdef CONFIG_PNO_SET_DEBUG
1645 void rtw_dev_pno_debug(struct net_device *net);
1646 #endif /* CONFIG_PNO_SET_DEBUG */
1647 #endif /* CONFIG_PNO_SUPPORT */
1648
1649 int rtw_suspend_free_assoc_resource(_adapter *padapter);
1650 #ifdef CONFIG_WOWLAN
1651 int rtw_suspend_wow(_adapter *padapter);
1652 int rtw_resume_process_wow(_adapter *padapter);
1653 #endif
1654
1655 /* HCI Related header file */
1656 #ifdef CONFIG_USB_HCI
1657 #include <usb_osintf.h>
1658 #include <usb_ops.h>
1659 #include <usb_hal.h>
1660 #endif
1661
1662 #ifdef CONFIG_SDIO_HCI
1663 #include <sdio_osintf.h>
1664 #include <sdio_ops.h>
1665 #include <sdio_hal.h>
1666 #endif
1667
1668 #ifdef CONFIG_GSPI_HCI
1669 #include <gspi_osintf.h>
1670 #include <gspi_ops.h>
1671 #include <gspi_hal.h>
1672 #endif
1673
1674 #ifdef CONFIG_PCI_HCI
1675 #include <pci_osintf.h>
1676 #include <pci_ops.h>
1677 #include <pci_hal.h>
1678 #endif
1679
1680 #endif /* __DRV_TYPES_H__ */
1681