1 /* 2 * Copyright 2020 Rockchip Electronics Co. LTD 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #ifndef __IEP2_H__ 18 #define __IEP2_H__ 19 20 #include <stdint.h> 21 22 #include "rk_type.h" 23 24 #include "iep2_pd.h" 25 #include "iep2_ff.h" 26 27 #define TILE_W 16 28 #define TILE_H 4 29 #define MVL 28 30 #define MVR 27 31 32 #define TEST_DBG //printf 33 #define FLOOR(v, r) (((v) / (r)) * (r)) 34 35 #define RKCLIP(a, min, max) ((a < min) ? (min) : ((a > max) ? max : a)) 36 #define RKABS(a) (RK_U32)(((a) >= 0) ? (a) : -(a)) 37 #define RKMIN(a, b) (((a) < (b)) ? (a) : (b)) 38 #define RKMAX(a, b) (((a) > (b)) ? (a) : (b)) 39 40 struct iep2_addr { 41 uint32_t y; 42 uint32_t cbcr; 43 uint32_t cr; 44 }; 45 46 struct iep2_params { 47 uint32_t src_fmt; 48 uint32_t src_yuv_swap; 49 uint32_t dst_fmt; 50 uint32_t dst_yuv_swap; 51 uint32_t tile_cols; 52 uint32_t tile_rows; 53 uint32_t src_y_stride; 54 uint32_t src_uv_stride; 55 uint32_t dst_y_stride; 56 57 struct iep2_addr src[3]; // current, next, previous 58 struct iep2_addr dst[2]; // top/bottom field reconstructed frame 59 uint32_t mv_addr; 60 uint32_t md_addr; 61 62 uint32_t dil_mode; 63 uint32_t dil_out_mode; 64 uint32_t dil_field_order; 65 66 uint32_t md_theta; 67 uint32_t md_r; 68 uint32_t md_lambda; 69 70 uint32_t dect_resi_thr; 71 uint32_t osd_area_num; 72 uint32_t osd_gradh_thr; 73 uint32_t osd_gradv_thr; 74 75 uint32_t osd_pos_limit_en; 76 uint32_t osd_pos_limit_num; 77 78 uint32_t osd_limit_area[2]; 79 80 uint32_t osd_line_num; 81 uint32_t osd_pec_thr; 82 83 uint32_t osd_x_sta[8]; 84 uint32_t osd_x_end[8]; 85 uint32_t osd_y_sta[8]; 86 uint32_t osd_y_end[8]; 87 88 uint32_t me_pena; 89 uint32_t mv_bonus; 90 uint32_t mv_similar_thr; 91 uint32_t mv_similar_num_thr0; 92 int32_t me_thr_offset; 93 94 uint32_t mv_left_limit; 95 uint32_t mv_right_limit; 96 97 int8_t mv_tru_list[8]; 98 uint32_t mv_tru_vld[8]; 99 100 uint32_t eedi_thr0; 101 102 uint32_t ble_backtoma_num; 103 104 uint32_t comb_cnt_thr; 105 uint32_t comb_feature_thr; 106 uint32_t comb_t_thr; 107 uint32_t comb_osd_vld[8]; 108 109 uint32_t mtn_en; 110 uint32_t mtn_tab[16]; 111 112 uint32_t pd_mode; 113 114 uint32_t roi_en; 115 uint32_t roi_layer_num; 116 uint32_t roi_mode[8]; 117 uint32_t xsta[8]; 118 uint32_t xend[8]; 119 uint32_t ysta[8]; 120 uint32_t yend[8]; 121 }; 122 123 struct iep2_output { 124 uint32_t mv_hist[MVL + MVR + 1]; 125 uint32_t dect_pd_tcnt; 126 uint32_t dect_pd_bcnt; 127 uint32_t dect_ff_cur_tcnt; 128 uint32_t dect_ff_cur_bcnt; 129 uint32_t dect_ff_nxt_tcnt; 130 uint32_t dect_ff_nxt_bcnt; 131 uint32_t dect_ff_ble_tcnt; 132 uint32_t dect_ff_ble_bcnt; 133 uint32_t dect_ff_nz; 134 uint32_t dect_ff_comb_f; 135 uint32_t dect_osd_cnt; 136 uint32_t out_comb_cnt; 137 uint32_t out_osd_comb_cnt; 138 uint32_t ff_gradt_tcnt; 139 uint32_t ff_gradt_bcnt; 140 uint32_t x_sta[8]; 141 uint32_t x_end[8]; 142 uint32_t y_sta[8]; 143 uint32_t y_end[8]; 144 }; 145 146 struct iep2_api_ctx { 147 struct iep2_params params; 148 struct iep2_output output; 149 /* output */ 150 struct iep2_ff_info ff_inf; 151 struct iep2_pd_info pd_inf; 152 153 MppBufferGroup memGroup; 154 MppBuffer mv_buf; 155 MppBuffer md_buf; 156 int first_cfg; 157 int fd; 158 }; 159 160 #endif 161