1 // SPDX-License-Identifier: GPL-2.0
2 /********************************************************************************
3 *
4 * Copyright (C) 2017 NEXTCHIP Inc. All rights reserved.
5 * Module : Jaguar1 Device Driver
6 * Description : coax_protocol.c
7 * Author :
8 * Date :
9 * Version : Version 1.0
10 *
11 ********************************************************************************
12 * History :
13 *
14 *
15 ********************************************************************************/
16 #include <linux/string.h>
17 #include <linux/delay.h>
18 #include <linux/unistd.h>
19 #include "jaguar1_common.h"
20 #include "jaguar1_coax_table.h"
21 #include "jaguar1_coax_protocol.h"
22 #include "jaguar1_video.h"
23
24 extern unsigned int acp_mode_enable;
25
26 /*=======================================================================================================
27 ********************************************************************************************************
28 **************************** Coaxial protocol up stream function ***************************************
29 ********************************************************************************************************
30 * Coaxial protocol up stream Flow
31 * 1. Up stream initialize - coax_tx_init
32 * 2. Fill upstream data & Send - coax_tx_cmd_send
33 *
34 * Coaxial protocol up stream register(example: channel 0)
35 * (3x00) tx_baud : 1 bit duty
36 * (3x02) tx_pel_baud : 1 bit duty of pelco(SD)
37 * (3x03) tx_line_pos0 : up stream line position(low)
38 * (3x04) tx_line_pos1 : up stream line position(high)
39 * (3x05) tx_line_count : up stream output line number in 1 frame
40 * (3x07) tx_pel_line_pos0 : up stream line position of pelco(low)
41 * (3x08) tx_pel_line_pos1 : up stream line position of pelco(high)
42 * (3x0A) tx_line_count_max : up stream output total line
43 * (3x0B) tx_mode : up stream Mode set (ACP, CCP, TCP)
44 * (3x0D) tx_sync_pos0 : up stream sync start position(low)
45 * (3x0E) tx_sync_pos1 : up stream sync start position(high)
46 * (3x2F) tx_even : up stream SD..Interlace
47 * (3x0C) tx_zero_length : Only CVI 4M
48 ========================================================================================================*/
49 static NC_VIVO_CH_FORMATDEF g_coax_format;
50
51
52 /**************************************************************************************
53 * @desc
54 * JAGUAR1's This function initializes the register associated with the UP Stream..
55 *
56 * @param_in (NC_VD_COAX_Tx_Init_STR *)coax_tx_mode UP Stream Initialize structure
57 *
58 * @return void None
59 *
60 * ioctl : IOC_VDEC_COAX_TX_INIT
61 ***************************************************************************************/
__NC_VD_ACP_Get_CommandFormat_Get(NC_COAX_CMD_DEF def)62 static NC_VD_ACP_CMDDEF_STR *__NC_VD_ACP_Get_CommandFormat_Get( NC_COAX_CMD_DEF def )
63 {
64 NC_VD_ACP_CMDDEF_STR *pRet = &coax_cmd_lists[def];
65 if( pRet == NULL )
66 {
67 printk("Not Supported format Yet!!!(%d)\n",def);
68 }
69 return pRet;
70 }
71
__NC_VD_COAX_InitFormat_Get(NC_VIVO_CH_FORMATDEF def)72 static NC_VD_COAX_Init_STR *__NC_VD_COAX_InitFormat_Get( NC_VIVO_CH_FORMATDEF def )
73 {
74 NC_VD_COAX_Init_STR *pRet = &coax_init_lists[def];
75 if( pRet == NULL )
76 {
77 printk("Not Supported format Yet!!!(%d)\n",def);
78 }
79 return pRet;
80 }
81
__NC_VD_COAX_16bit_InitFormat_Get(NC_VIVO_CH_FORMATDEF def)82 static NC_VD_COAX_Init_STR *__NC_VD_COAX_16bit_InitFormat_Get( NC_VIVO_CH_FORMATDEF def )
83 {
84 NC_VD_COAX_Init_STR *pRet = &coax_acp_16bit_init_lists[def];
85 if( pRet == NULL )
86 {
87 printk("Not Supported format Yet!!!(%d)\n",def);
88 }
89 return pRet;
90 }
91
__NC_VD_COAX_Command_Each_Copy(unsigned char * Dst,int * Src)92 static int __NC_VD_COAX_Command_Each_Copy( unsigned char *Dst, int *Src )
93 {
94 int items = 0;
95
96 while( Src[items] != EOD )
97 {
98 Dst[items] = Src[items];
99 items++;
100 }
101
102 return items;
103 }
104
__NC_VD_COAX_Command_Copy(NC_FORMAT_STANDARD format,NC_VIVO_CH_FORMATDEF vivofmt,unsigned char * Dst,NC_VD_ACP_CMDDEF_STR * pCMD)105 static int __NC_VD_COAX_Command_Copy( NC_FORMAT_STANDARD format, NC_VIVO_CH_FORMATDEF vivofmt, unsigned char *Dst, NC_VD_ACP_CMDDEF_STR *pCMD )
106 {
107 int cmd_cnt = 0;
108
109 if( format == FMT_SD )
110 {
111 cmd_cnt = __NC_VD_COAX_Command_Each_Copy( Dst, pCMD->sd );
112 }
113 else if( (format == FMT_AHD20) || (format == FMT_AHD30) )
114 {
115 if( vivofmt == AHD30_5M_20P || vivofmt == AHD30_5M_12_5P || vivofmt == AHD30_5_3M_20P )
116 cmd_cnt = __NC_VD_COAX_Command_Each_Copy( Dst, pCMD->ahd_4_5m );
117 else if( vivofmt == AHD30_4M_30P || vivofmt == AHD30_4M_25P || vivofmt == AHD30_4M_15P )
118 cmd_cnt = __NC_VD_COAX_Command_Each_Copy( Dst, pCMD->ahd_4_5m );
119 else
120 cmd_cnt = __NC_VD_COAX_Command_Each_Copy( Dst, pCMD->ahd_8bit );
121 }
122 else if( format == FMT_CVI )
123 {
124 cmd_cnt= __NC_VD_COAX_Command_Each_Copy( Dst, pCMD->cvi_cmd );
125 }
126 else if( format == FMT_TVI )
127 {
128 if( (vivofmt == TVI_4M_30P) || (vivofmt == TVI_4M_25P) || (vivofmt == TVI_4M_15P) )
129 cmd_cnt = __NC_VD_COAX_Command_Each_Copy( Dst, pCMD->tvi_v2_0 );
130 else
131 cmd_cnt = __NC_VD_COAX_Command_Each_Copy( Dst, pCMD->tvi_v1_0 );
132 }
133 else
134 printk("NC_VD_COAX_Tx_Command_Send::Command Copy Error!!\n");
135
136
137 return cmd_cnt;
138 }
139
__NC_VD_COAX_16bit_Command_Copy(NC_FORMAT_STANDARD format,NC_VIVO_CH_FORMATDEF vivofmt,unsigned char * Dst,NC_VD_ACP_CMDDEF_STR * pCMD)140 static int __NC_VD_COAX_16bit_Command_Copy( NC_FORMAT_STANDARD format, NC_VIVO_CH_FORMATDEF vivofmt, unsigned char *Dst, NC_VD_ACP_CMDDEF_STR *pCMD )
141 {
142 int cmd_cnt = 0;
143
144 if( (vivofmt == AHD20_720P_25P) || (vivofmt == AHD20_720P_30P) ||\
145 (vivofmt == AHD20_720P_25P_EX) || (vivofmt == AHD20_720P_30P_EX) ||\
146 (vivofmt == AHD20_720P_25P_EX_Btype) || (vivofmt == AHD20_720P_30P_EX_Btype) )
147 {
148 cmd_cnt = __NC_VD_COAX_Command_Each_Copy( Dst, pCMD->ahd_16bit );
149 }
150 else if( (vivofmt == CVI_4M_25P) || (vivofmt == CVI_4M_30P) ||\
151 (vivofmt == CVI_8M_15P) || (vivofmt == CVI_8M_12_5P) )
152 {
153 cmd_cnt = __NC_VD_COAX_Command_Each_Copy( Dst, pCMD->cvi_new_cmd );
154 }
155 else
156 {
157 printk("[drv_coax] Can not send commands!! Unsupported format!!\n" );
158 return 0;
159 }
160
161 return cmd_cnt;
162 }
163
164 /**************************************************************************************
165 * @desc
166 * JAGUAR1's This function initializes the register associated with the UP Stream..
167 *
168 * @param_in (NC_VD_COAX_Tx_Init_STR *)coax_tx_mode UP Stream Initialize structure
169 *
170 * @return void None
171 *
172 * ioctl : IOC_VDEC_COAX_TX_INIT
173 ***************************************************************************************/
coax_tx_init(void * p_param)174 void coax_tx_init( void *p_param )
175 {
176 NC_VD_COAX_STR *coax_tx = (NC_VD_COAX_STR*)p_param;
177 NC_VD_COAX_Init_STR *CoaxVal = __NC_VD_COAX_InitFormat_Get( coax_tx->vivo_fmt );
178
179 int ch = coax_tx->ch;
180 unsigned char distance = 0;
181
182 g_coax_format = coax_tx->vivo_fmt;
183 printk("[drv_coax]ch::%d >>> fmt::%s\n", ch, CoaxVal->name );
184
185 #if 0
186 // Cable distance check
187 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->devnum], 0xFF, 0x13); // BANK 13
188 distance = gpio_i2c_read(jaguar1_i2c_addr[coax_tx->devnum], (0xA0+ch)); // 0:short, 1:100m, 2:200m, 3:300m, 4:400m, 5:500m, 0x0F:Unknown
189
190 distance = distance&0x0F;
191 if(distance == 0x0F)
192 {
193 printk("DRV::Cable distance Unknown!!\n");
194 distance = 0;
195 }
196 else
197 printk("DRV::Cable distance(%x)\n", distance);
198 #endif
199
200 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xFF, 0x01); // BANK 1
201 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xA8, 0x00); // MPP_TST_SEL1
202 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xA9, 0x00); // MPP_TST_SEL2
203 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xAA, 0x00); // MPP_TST_SEL3
204 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xAB, 0x00); // MPP_TST_SEL4
205
206 // Coaxial each mode set
207 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xFF, 0x02+((ch%4)/2)); // BANK 2, 3
208 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x7C+((ch%2)*0x80), CoaxVal->rx_src);
209 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x7D+((ch%2)*0x80), CoaxVal->rx_slice_lev);
210
211 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xFF, 0x02+((ch%4)/2));
212 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x00+((ch%2)*0x80), CoaxVal->tx_baud[distance]);
213 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x02+((ch%2)*0x80), CoaxVal->tx_pel_baud[distance]);
214 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x03+((ch%2)*0x80), CoaxVal->tx_line_pos0[distance]);
215 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x04+((ch%2)*0x80), CoaxVal->tx_line_pos1[distance]);
216 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x05+((ch%2)*0x80), CoaxVal->tx_line_count);
217 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x07+((ch%2)*0x80), CoaxVal->tx_pel_line_pos0[distance]);
218 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x08+((ch%2)*0x80), CoaxVal->tx_pel_line_pos1[distance]);
219 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x0A+((ch%2)*0x80), CoaxVal->tx_line_count_max);
220 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x0B+((ch%2)*0x80), CoaxVal->tx_mode);
221 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x0D+((ch%2)*0x80), CoaxVal->tx_sync_pos0[distance]);
222 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x0E + ((ch%2)*0x80), CoaxVal->tx_sync_pos1[distance]);
223 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x2F+((ch%2)*0x80), CoaxVal->tx_even);
224 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x0C+((ch%2)*0x80), CoaxVal->tx_zero_length);
225
226 #if 0
227 // MPP Coaxial mode select Ch1~4
228 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xFF, 0x01); // BANK 1
229 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xA8, 0x08); // MPP_TST_SEL1
230 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xA9, 0x09); // MPP_TST_SEL2
231 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xAA, 0x0A); // MPP_TST_SEL3
232 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xAB, 0x0B); // MPP_TST_SEL4
233
234 // Coaxial each mode set
235 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xFF, 0x05+ch%4); // BANK 5
236 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x2F, 0x00); // MPP_H_INV, MPP_V_INV, MPP_F_INV
237 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x30, 0xE0); // MPP_H_S[7~4], MPP_H_E[3:0]
238 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x31, 0x43); // MPP_H_S[7:0]
239 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x32, 0xA2); // MPP_H_E[7:0]
240 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x7C, CoaxVal->rx_src);
241 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x7D, CoaxVal->rx_slice_lev);
242
243 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xFF, 0x02+((ch%4)/2));
244
245 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x00+((ch%2)*0x80), CoaxVal->tx_baud[distance]);
246 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x02+((ch%2)*0x80), CoaxVal->tx_pel_baud[distance]);
247 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x03+((ch%2)*0x80), CoaxVal->tx_line_pos0[distance]);
248 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x04+((ch%2)*0x80), CoaxVal->tx_line_pos1[distance]);
249 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x05+((ch%2)*0x80), CoaxVal->tx_line_count);
250 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x07+((ch%2)*0x80), CoaxVal->tx_pel_line_pos0[distance]);
251 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x08+((ch%2)*0x80), CoaxVal->tx_pel_line_pos1[distance]);
252 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x0A+((ch%2)*0x80), CoaxVal->tx_line_count_max);
253 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x0B+((ch%2)*0x80), CoaxVal->tx_mode);
254 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x0D+((ch%2)*0x80), CoaxVal->tx_sync_pos0[distance]);
255 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x0E + ((ch%2)*0x80), CoaxVal->tx_sync_pos1[distance]);
256 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x2F+((ch%2)*0x80), CoaxVal->tx_even);
257 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x0C+((ch%2)*0x80), CoaxVal->tx_zero_length);
258 #endif
259
260 #if DBG_TX_INIT_PRINT
261 printk("[drv]tx_src: 5x7C>> 0x%02X\n", CoaxVal->rx_src );
262 printk("[drv]tx_slice_lev: 5x7D>> 0x%02X\n", CoaxVal->rx_slice_lev );
263 printk("[drv]tx_pel_baud: 3x02>> 0x%02X\n", CoaxVal->tx_baud[distance] );
264 printk("[drv]tx_pel_line_pos0: 3x07>> 0x%02X\n", CoaxVal->tx_pel_line_pos0[distance] );
265 printk("[drv]tx_pel_line_pos1: 3x08>> 0x%02X\n", CoaxVal->tx_pel_line_pos1[distance] );
266 printk("[drv]tx_mode: 3x0B>> 0x%02X\n", CoaxVal->tx_mode );
267 printk("[drv]tx_baud: 3x00>> 0x%02X\n", CoaxVal->tx_baud[distance]);
268 printk("[drv]tx_line_pos0: 3x03>> 0x%02X\n", CoaxVal->tx_line_pos0[distance] );
269 printk("[drv]tx_line_pos1: 3x04>> 0x%02X\n", CoaxVal->tx_line_pos1[distance] );
270 printk("[drv]tx_line_count: 3x05>> 0x%02X\n", CoaxVal->tx_line_count );
271 printk("[drv]tx_line_count_max: 3x0A>> 0x%02X\n", CoaxVal->tx_line_count_max );
272 printk("[drv]tx_sync_pos0: 3x0D>> 0x%02X\n", CoaxVal->tx_sync_pos0[distance] );
273 printk("[drv]tx_sync_pos1: 3x0E>> 0x%02X\n", CoaxVal->tx_sync_pos1[distance] );
274 printk("[drv]tx_even: 3x2F>> 0x%02X\n", CoaxVal->tx_even );
275 printk("[drv]tx_zero_length: 3x0C>> 0x%02X\n", CoaxVal->tx_zero_length);
276 #endif
277
278 }
279
280 /**************************************************************************************
281 * @desc
282 * JAGUAR1's This function initializes the register associated with the UP Stream..
283 *
284 * @param_in (NC_VD_COAX_Tx_Init_STR *)coax_tx_mode UP Stream Initialize structure
285 *
286 * @return void None
287 *
288 * ioctl : IOC_VDEC_COAX_TX_INIT
289 ***************************************************************************************/
coax_tx_16bit_init(void * p_param)290 void coax_tx_16bit_init( void *p_param )
291 {
292 NC_VD_COAX_STR *coax_tx = (NC_VD_COAX_STR*)p_param;
293 NC_VD_COAX_Init_STR *CoaxVal;
294
295 int ch = coax_tx->ch;
296 int fmt = coax_tx->vivo_fmt;
297 unsigned char distance = 0;
298
299 if( (fmt == AHD20_720P_25P) || (fmt == AHD20_720P_30P) ||\
300 (fmt == AHD20_720P_25P_EX) || (fmt == AHD20_720P_30P_EX) ||\
301 (fmt == AHD20_720P_25P_EX_Btype) || (fmt == AHD20_720P_30P_EX_Btype)\
302 )
303 {
304 printk("[drv_coax]Ch: %d ACP 16bit initialize!!!\n", ch );
305 }
306 else if( (fmt == CVI_4M_25P) || (fmt == CVI_4M_30P) ||\
307 (fmt == CVI_8M_15P) || (fmt == CVI_8M_12_5P) )
308 {
309 printk("[drv_coax]Ch: %d CVI New Protocol initialize!!!\n", ch );
310 }
311 else
312 {
313 printk("[drv_coax]Ch: %d Can not initialize!! Unsupported format!!\n", ch );
314 return;
315 }
316
317 CoaxVal = __NC_VD_COAX_16bit_InitFormat_Get( coax_tx->vivo_fmt );
318 printk("[drv_coax]Ch: %d Format >>>>> %s\n", ch, CoaxVal->name );
319
320 #if 0
321 // Cable distance check
322 gpio_i2c_write(jaguar1_i2c_addr[chip_num], 0xFF, 0x13); // BANK 13
323 distance = gpio_i2c_read(jaguar1_i2c_addr[chip_num], (0xA0+ch)); // 0:short, 1:100m, 2:200m, 3:300m, 4:400m, 5:500m, 0x0F:Unknown
324
325 distance = distance&0x0F;
326 if(distance == 0x0F)
327 {
328 printk("DRV::Cable distance Unknown!!\n");
329 distance = 0;
330 }
331 else
332 printk("DRV::Cable distance(%x)\n", distance);
333 #endif
334
335 // MPP Coaxial mode select Ch1~4
336 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xFF, 0x01); // BANK 1
337 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xA8, 0x00); // MPP_TST_SEL1
338 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xA9, 0x00); // MPP_TST_SEL2
339 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xAA, 0x00); // MPP_TST_SEL3
340 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xAB, 0x00); // MPP_TST_SEL4
341
342 // Coaxial each mode set
343 //gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xFF, 0x05+ch%4); // BANK 5
344 //gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x2F, 0x00); // MPP_H_INV, MPP_V_INV, MPP_F_INV
345 //gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x30, 0xE0); // MPP_H_S[7~4], MPP_H_E[3:0]
346 //gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x31, 0x43); // MPP_H_S[7:0]
347 //gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x32, 0xA2); // MPP_H_E[7:0]
348
349 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xFF, 0x02+((ch%4)/2)); // BANK 2, 3
350 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x7C, CoaxVal->rx_src);
351 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x7D, CoaxVal->rx_slice_lev);
352
353 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xFF, 0x02+((ch%4)/2));
354
355 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x00+((ch%2)*0x80), CoaxVal->tx_baud[distance]);
356 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x02+((ch%2)*0x80), CoaxVal->tx_pel_baud[distance]);
357 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x03+((ch%2)*0x80), CoaxVal->tx_line_pos0[distance]);
358 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x04+((ch%2)*0x80), CoaxVal->tx_line_pos1[distance]);
359 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x05+((ch%2)*0x80), CoaxVal->tx_line_count);
360 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x07+((ch%2)*0x80), CoaxVal->tx_pel_line_pos0[distance]);
361 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x08+((ch%2)*0x80), CoaxVal->tx_pel_line_pos1[distance]);
362 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x0A+((ch%2)*0x80), CoaxVal->tx_line_count_max);
363 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x0B+((ch%2)*0x80), CoaxVal->tx_mode);
364 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x0D+((ch%2)*0x80), CoaxVal->tx_sync_pos0[distance]);
365 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x0E + ((ch%2)*0x80), CoaxVal->tx_sync_pos1[distance]);
366 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x2F+((ch%2)*0x80), CoaxVal->tx_even);
367 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x0C+((ch%2)*0x80), CoaxVal->tx_zero_length);
368
369 #if DBG_TX_INIT_PRINT
370 printk("[drv]tx_src: 5x7C>> 0x%02X\n", CoaxVal->rx_src );
371 printk("[drv]tx_slice_lev: 5x7D>> 0x%02X\n", CoaxVal->rx_slice_lev );
372 printk("[drv]tx_pel_baud: 3x02>> 0x%02X\n", CoaxVal->tx_baud[distance] );
373 printk("[drv]tx_pel_line_pos0: 3x07>> 0x%02X\n", CoaxVal->tx_pel_line_pos0[distance] );
374 printk("[drv]tx_pel_line_pos1: 3x08>> 0x%02X\n", CoaxVal->tx_pel_line_pos1[distance] );
375 printk("[drv]tx_mode: 3x0B>> 0x%02X\n", CoaxVal->tx_mode );
376 printk("[drv]tx_baud: 3x00>> 0x%02X\n", CoaxVal->tx_baud[distance]);
377 printk("[drv]tx_line_pos0: 3x03>> 0x%02X\n", CoaxVal->tx_line_pos0[distance] );
378 printk("[drv]tx_line_pos1: 3x04>> 0x%02X\n", CoaxVal->tx_line_pos1[distance] );
379 printk("[drv]tx_line_count: 3x05>> 0x%02X\n", CoaxVal->tx_line_count );
380 printk("[drv]tx_line_count_max: 3x0A>> 0x%02X\n", CoaxVal->tx_line_count_max );
381 printk("[drv]tx_sync_pos0: 3x0D>> 0x%02X\n", CoaxVal->tx_sync_pos0[distance] );
382 printk("[drv]tx_sync_pos1: 3x0E>> 0x%02X\n", CoaxVal->tx_sync_pos1[distance] );
383 printk("[drv]tx_even: 3x2F>> 0x%02X\n", CoaxVal->tx_even );
384 printk("[drv]tx_zero_length: 3x0C>> 0x%02X\n", CoaxVal->tx_zero_length);
385 #endif
386
387 }
388
389 /**************************************************************************************
390 * @desc
391 * JAGUAR1's Send UP Stream command.
392 *
393 * @param_in (NC_VD_COAX_SET_STR *)coax_tx_mode UP Stream Command structure
394 *
395 * @return void None
396 *
397 * ioctl : IOC_VDEC_COAX_TX_CMD_SEND
398 ***************************************************************************************/
coax_tx_cmd_send(void * p_param)399 void coax_tx_cmd_send( void *p_param )
400 {
401 NC_VD_COAX_STR *coax_tx = (NC_VD_COAX_STR*)p_param;
402 int i;
403 int cmd_cnt = 0;
404 unsigned char ch = coax_tx->ch;
405 NC_COAX_CMD_DEF cmd = coax_tx->cmd;
406 NC_FORMAT_STANDARD format = coax_tx->format_standard;
407 NC_VIVO_CH_FORMATDEF vivofmt = coax_tx->vivo_fmt;
408
409 unsigned char tx_bank = 0x00;
410 unsigned char tx_cmd_addr = 0x00;
411 unsigned char tx_shot_addr = 0x00;
412 unsigned char command[32] = {0,};
413 unsigned char TCP_CMD_Stop_v10[10] = { 0xb5, 0x00, 0x14, 0x00, 0x80, 0x00, 0x00, 0x00, 0xc9, 0x80 };
414 unsigned char TCP_CMD_Stop_v20[10] = { 0xb5, 0x01, 0x14, 0x00, 0x80, 0x00, 0x00, 0x00, 0xc5, 0x80 };
415
416 // UP Stream get from coax table
417 NC_VD_COAX_Init_STR *CoaxVal = __NC_VD_COAX_InitFormat_Get(vivofmt); // Get from Coax_Tx_Init Table
418 NC_VD_ACP_CMDDEF_STR *pCMD = __NC_VD_ACP_Get_CommandFormat_Get(cmd); // Get From Coax_Tx_Command Table
419 printk("[drv_coax]Ch: %d Command >>>>> %s\n", ch, pCMD->name );
420
421 tx_bank = CoaxVal->tx_bank;
422 tx_cmd_addr = CoaxVal->tx_cmd_addr;
423 tx_shot_addr = CoaxVal->tx_shot_addr;
424
425 // UP Stream command copy in coax command table
426 cmd_cnt = __NC_VD_COAX_Command_Copy( format, vivofmt, command, pCMD );
427 // printk("cmd_cnt: %d\n", cmd_cnt);
428
429 // fill command + shot
430 if( format == FMT_SD )
431 {
432 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xFF, tx_bank+((ch%4)/2) );
433 for(i=0;i<cmd_cnt;i++)
434 {
435 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], (tx_cmd_addr+((ch%2)*0x80))+i, 0);
436 }
437 // Shot
438 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xFF, 0x02+((ch%4)/2) );
439 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], tx_shot_addr+((ch%2)*0x80), 0x01);
440 msleep(CoaxVal->shot_delay);
441 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], tx_shot_addr+((ch%2)*0x80), 0x00);
442
443 msleep(CoaxVal->reset_delay);
444
445 for(i=0;i<cmd_cnt;i++)
446 {
447 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], (tx_cmd_addr+((ch%2)*0x80))+i, command[i]);
448 }
449 // Shot
450 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xFF, 0x02+((ch%4)/2) );
451 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], tx_shot_addr+((ch%2)*0x80), 0x01);
452 msleep(CoaxVal->shot_delay);
453 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], tx_shot_addr+((ch%2)*0x80), 0x00);
454 }
455 else if(format == FMT_CVI)
456 {
457 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xFF, tx_bank+(ch%4));
458 for(i=0;i<cmd_cnt;i++)
459 {
460 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], tx_cmd_addr+i, command[i]);
461 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x10+i, 0xff);
462 }
463
464 // Shot
465 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xFF, 0x02+((ch%4)/2) );
466 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], tx_shot_addr+((ch%2)*0x80), 0x01);
467 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], tx_shot_addr+((ch%2)*0x80), 0x00);
468 }
469 else
470 {
471 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xFF, tx_bank+((ch%4)/2) );
472 for(i=0;i<cmd_cnt;i++)
473 {
474 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], (tx_cmd_addr+((ch%2)*0x80))+i, command[i]);
475 }
476
477 // Shot
478 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xFF, 0x02+((ch%4)/2) );
479 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], tx_shot_addr+((ch%2)*0x80), 0x01);
480 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], tx_shot_addr+((ch%2)*0x80), 0x00);
481 }
482
483 // Only TVI >>> OSD Stop Command Send
484 if( format == FMT_TVI )
485 {
486 msleep(30);
487 if( (vivofmt == TVI_4M_30P) || (vivofmt == TVI_4M_25P) || (vivofmt == TVI_4M_15P) )
488 {
489 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xFF, tx_bank+((ch%4)/2));
490 for(i=0;i<10;i++)
491 {
492 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], tx_cmd_addr+((ch%2)*0x80)+i, TCP_CMD_Stop_v20[i]);
493 }
494 }
495 else
496 {
497 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xFF, tx_bank+((ch%4)/2));
498 for(i=0;i<10;i++)
499 {
500 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], tx_cmd_addr+((ch%2)*0x80)+i, TCP_CMD_Stop_v10[i]);
501 }
502 }
503
504 // shot
505 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], tx_shot_addr+((ch%2)*0x80), 0x01);
506 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], tx_shot_addr+((ch%2)*0x80), 0x00);
507 }
508 }
509
510 /**************************************************************************************
511 * @desc
512 * JAGUAR1's Send UP Stream command.
513 *
514 * @param_in (NC_VD_COAX_SET_STR *)coax_tx_mode UP Stream Command structure
515 *
516 * @return void None
517 *
518 * ioctl : IOC_VDEC_COAX_TX_CMD_SEND
519 ***************************************************************************************/
coax_tx_16bit_cmd_send(void * p_param)520 void coax_tx_16bit_cmd_send( void *p_param )
521 {
522 NC_VD_COAX_STR *coax_tx = (NC_VD_COAX_STR*)p_param;
523 int i;
524 int cmd_cnt = 0;
525 unsigned char ch = coax_tx->ch;
526 NC_COAX_CMD_DEF cmd = coax_tx->cmd;
527 NC_FORMAT_STANDARD format = coax_tx->format_standard;
528 NC_VIVO_CH_FORMATDEF vivofmt = coax_tx->vivo_fmt;
529
530 unsigned char tx_bank = 0x00;
531 unsigned char tx_cmd_addr = 0x00;
532 unsigned char tx_shot_addr = 0x00;
533 unsigned char command[32] ={0,};
534
535 // UP Stream get from coax table
536 NC_VD_COAX_Init_STR *CoaxVal = __NC_VD_COAX_InitFormat_Get(vivofmt); // Get from Coax_Tx_Init Table
537 NC_VD_ACP_CMDDEF_STR *pCMD = __NC_VD_ACP_Get_CommandFormat_Get(cmd); // Get From Coax_Tx_Command Table
538 printk("[drv_coax]Ch: %d 16bit Command >>>>> %s\n", ch, pCMD->name );
539
540 tx_bank = CoaxVal->tx_bank;
541 tx_cmd_addr = CoaxVal->tx_cmd_addr;
542 tx_shot_addr = CoaxVal->tx_shot_addr;
543
544 // UP Stream command copy in coax command table
545 cmd_cnt = __NC_VD_COAX_16bit_Command_Copy( format, vivofmt, command, pCMD );
546
547 // Adjust Bank
548 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xFF, 0x02+((ch%4)/2) );
549
550 // fill Reset
551 for(i=0;i<cmd_cnt;i++)
552 {
553 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x20+((ch%2)*0x80)+i, 0);
554 }
555
556 // Command Shot
557 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xFF, 0x02+((ch%4)/2) );
558 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x0c+((ch%2)*0x80), 0x01);
559 msleep(30);
560 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x0c+((ch%2)*0x80), 0x00);
561
562
563 // fill command
564 for(i=0;i<cmd_cnt;i++)
565 {
566 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x20+((ch%2)*0x80)+i, command[i]);
567 }
568
569 // Command Shot
570 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xFF, 0x02+((ch%4)/2) );
571 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x0c+((ch%2)*0x80), 0x01);
572 msleep(30);
573 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x0c+((ch%2)*0x80), 0x00);
574
575 }
576
coax_tx_cvi_new_cmd_send(void * p_param)577 void coax_tx_cvi_new_cmd_send( void *p_param )
578 {
579 NC_VD_COAX_STR *coax_tx = (NC_VD_COAX_STR*)p_param;
580 int i;
581 int cmd_cnt = 0;
582 // unsigned char vd_dev = coax_tx->vd_dev;
583 unsigned char ch = coax_tx->ch;
584 NC_COAX_CMD_DEF cmd = coax_tx->cmd;
585 NC_FORMAT_STANDARD format = coax_tx->format_standard;
586 NC_VIVO_CH_FORMATDEF vivofmt = coax_tx->vivo_fmt;
587
588 unsigned char tx_bank = 0x00;
589 unsigned char tx_cmd_addr = 0x00;
590 unsigned char tx_shot_addr = 0x00;
591 unsigned char command[32] ={0,};
592
593 // UP Stream get from coax table
594 NC_VD_COAX_Init_STR *CoaxVal = __NC_VD_COAX_InitFormat_Get(vivofmt); // Get from Coax_Tx_Init Table
595 NC_VD_ACP_CMDDEF_STR *pCMD = __NC_VD_ACP_Get_CommandFormat_Get(cmd); // Get From Coax_Tx_Command Table
596 printk("[drv_coax]Ch: %d Command >>>>> %s\n", ch, pCMD->name );
597
598 tx_bank = CoaxVal->tx_bank;
599 tx_cmd_addr = CoaxVal->tx_cmd_addr;
600 tx_shot_addr = CoaxVal->tx_shot_addr;
601
602 // UP Stream command copy in coax command table
603 cmd_cnt = __NC_VD_COAX_16bit_Command_Copy( format, vivofmt, command, pCMD );
604
605 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xFF, tx_bank+(ch%4));
606 for(i=0;i<cmd_cnt;i++)
607 {
608 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], tx_cmd_addr+i, command[i]);
609 }
610
611 // Shot
612 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xFF, 0x02+((ch%4)/2) );
613 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], tx_shot_addr+((ch%2)*0x80), 0x01);
614 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], tx_shot_addr+((ch%2)*0x80), 0x00);
615 }
616
617 /*=======================================================================================================
618 ********************************************************************************************************
619 **************************** Coaxial protocol down stream function *************************************
620 ********************************************************************************************************
621 *
622 * Coaxial protocol down stream Flow
623 * 1. Down stream initialize - coax_rx_init
624 * 2. Down stream data read - coax_rx_data_get
625 *
626 * Coaxial protocol down stream register(example: channel 0)
627 * (3x63) rx_comm_on : Coaxial Down Stream Mode ON/OFF ( 0: OFF / 1: ON )
628 * (3x62) rx_area : Down Stream Read Line Number
629 * (3x66) rx_signal_enhance : Signal Enhance ON/OFF ( 0: OFF / 1: ON )
630 * (3x69) rx_manual_duty : 1 Bit Duty Setting ( HD@25, 30P 0x32 / HD@50, 60P, FHD@25, 30P 0x64 )
631 * (3x60) rx_head_matching : Same Header Read (EX. 0x48)
632 * (3x61) rx_data_rz : The lower 2 bits set Coax Mode.. ( 0 : A-CP ), ( 1 : C-CP ), ( 2 : T-CP )
633 * (3x68) rx_sz : Down stream size setting
634 * (3x3A) : Down stream buffer clear
635 ========================================================================================================*/
636 /**************************************************************************************
637 * @desc
638 * JAGUAR1's This function initializes the register associated with the Down Stream.
639 *
640 * @param_in (NC_VD_COAX_SET_STR *)coax_tx_mode Down Stream Initialize structure
641 *
642 * @return void None
643 *
644 * ioctl : IOC_VDEC_COAX_RX_INIT
645 ***************************************************************************************/
coax_rx_init(void * p_param)646 void coax_rx_init(void *p_param)
647 {
648 NC_VD_COAX_STR *coax_rx = (NC_VD_COAX_STR*)p_param;
649 unsigned char ch = coax_rx->ch;
650 NC_VIVO_CH_FORMATDEF vivofmt = coax_rx->vivo_fmt;
651
652 NC_VD_COAX_Init_STR *coax_rx_val = __NC_VD_COAX_InitFormat_Get(vivofmt);
653
654 gpio_i2c_write(jaguar1_i2c_addr[coax_rx->vd_dev], 0xFF, 0x02+((ch%4)/2));
655
656 gpio_i2c_write(jaguar1_i2c_addr[coax_rx->vd_dev], 0x63+((ch%2)*0x80), coax_rx_val->rx_comm_on);
657 gpio_i2c_write(jaguar1_i2c_addr[coax_rx->vd_dev], 0x62+((ch%2)*0x80), coax_rx_val->rx_area);
658 gpio_i2c_write(jaguar1_i2c_addr[coax_rx->vd_dev], 0x66+((ch%2)*0x80), coax_rx_val->rx_signal_enhance);
659 gpio_i2c_write(jaguar1_i2c_addr[coax_rx->vd_dev], 0x69+((ch%2)*0x80), coax_rx_val->rx_manual_duty);
660 gpio_i2c_write(jaguar1_i2c_addr[coax_rx->vd_dev], 0x60+((ch%2)*0x80), coax_rx_val->rx_head_matching);
661 gpio_i2c_write(jaguar1_i2c_addr[coax_rx->vd_dev], 0x61+((ch%2)*0x80), coax_rx_val->rx_data_rz);
662 gpio_i2c_write(jaguar1_i2c_addr[coax_rx->vd_dev], 0x68+((ch%2)*0x80), coax_rx_val->rx_sz);
663 #if DBG_RX_INIT_PRINT
664 printk("[drv]Channel %d Format >>>>> %s\n", ch, coax_rx_val->name );
665 printk("[drv]rx_head_matching: 0x60 >> 0x%02X\n", coax_rx_val->rx_head_matching);
666 printk("[drv]rx_data_rz: 0x61 >> 0x%02X\n", coax_rx_val->rx_data_rz);
667 printk("[drv]rx_area: 0x62 >> 0x%02X\n", coax_rx_val->rx_area);
668 printk("[drv]rx_comm_on: 0x63 >> 0x%02X\n", coax_rx_val->rx_comm_on );
669 printk("[drv]rx_signal_enhance: 0x66 >> 0x%02X\n", coax_rx_val->rx_signal_enhance);
670 printk("[drv]rx_sz: 0x68 >> 0x%02X\n", coax_rx_val->rx_sz);
671 printk("[drv]rx_manual_duty: 0x69 >> 0x%02X\n", coax_rx_val->rx_manual_duty);
672 #endif
673
674 }
675
676 /**************************************************************************************
677 * @desc
678 * JAGUAR1's Read down stream data.
679 *
680 * @param_in (NC_VD_COAX_SET_STR *)coax_tx_mode Down Stream read structure
681 *
682 * @return void None
683 *
684 * ioctl : IOC_VDEC_COAX_RX_DATA_READ
685 ***************************************************************************************/
coax_rx_data_get(void * p_param)686 void coax_rx_data_get(void *p_param)
687 {
688 NC_VD_COAX_STR *coax_rx = (NC_VD_COAX_STR*)p_param;
689
690 int ii = 0;
691 int ch = coax_rx->ch;
692 int format = coax_rx->format_standard;
693
694 gpio_i2c_write(jaguar1_i2c_addr[coax_rx->vd_dev], 0xFF, 0x02+((ch%4)/2));
695
696 if( (format == FMT_CVI) || (format == FMT_TVI) )
697 {
698 for(ii=0;ii<5;ii++)
699 {
700 coax_rx->rx_data1[ii] = gpio_i2c_read(jaguar1_i2c_addr[coax_rx->vd_dev], (0x40+((ch%2)*0x80))+ii); // ChX_Rx_Line_1 : 0x40 ~ 0x44 5byte
701 coax_rx->rx_data2[ii] = gpio_i2c_read(jaguar1_i2c_addr[coax_rx->vd_dev], (0x45+((ch%2)*0x80))+ii); // ChX_Rx_Line_2 : 0x45 ~ 0x49 5byte
702 coax_rx->rx_data3[ii] = gpio_i2c_read(jaguar1_i2c_addr[coax_rx->vd_dev], (0x4A+((ch%2)*0x80))+ii); // ChX_Rx_Line_3 : 0x4A ~ 0x4E 5byte
703 coax_rx->rx_data4[ii] = gpio_i2c_read(jaguar1_i2c_addr[coax_rx->vd_dev], (0x6C+((ch%2)*0x80))+ii); // ChX_Rx_Line_4 : 0x6C ~ 0x70 5byte
704 coax_rx->rx_data5[ii] = gpio_i2c_read(jaguar1_i2c_addr[coax_rx->vd_dev], (0x71+((ch%2)*0x80))+ii); // ChX_Rx_Line_5 : 0x71 ~ 0x75 5byte
705 coax_rx->rx_data6[ii] = gpio_i2c_read(jaguar1_i2c_addr[coax_rx->vd_dev], (0x76+((ch%2)*0x80))+ii); // ChX_Rx_Line_6 : 0x76 ~ 0x7A 5byte
706 }
707 }
708 else // AHD
709 {
710 for(ii=0;ii<8;ii++)
711 {
712 coax_rx->rx_pelco_data[ii] = gpio_i2c_read(jaguar1_i2c_addr[coax_rx->vd_dev], (0x50+((ch%2)*0x80))+ii); // ChX_PELCO_Rx_Line_1 ~ 8 : 0x50 ~ 0x57 8byte
713 }
714 }
715 }
716
717 /**************************************************************************************
718 * @desc
719 * JAGUAR1's Down stream buffer clear.
720 *
721 * @param_in (NC_VD_COAX_SET_STR *)coax_tx_mode UP Stream Command structure
722 *
723 * @return void None
724 *
725 * ioctl : IOC_VDEC_COAX_RX_BUF_CLEAR
726 ***************************************************************************************/
coax_rx_buffer_clear(void * p_param)727 void coax_rx_buffer_clear(void *p_param)
728 {
729 NC_VD_COAX_STR *coax_val = (NC_VD_COAX_STR*)p_param;
730
731 unsigned char ch = coax_val->ch;
732
733 gpio_i2c_write(jaguar1_i2c_addr[coax_val->vd_dev], 0xFF, 0x02+((ch%4)/2));
734
735 gpio_i2c_write(jaguar1_i2c_addr[coax_val->vd_dev], 0x3A+((ch%2)*0x80), 0x01);
736 gpio_i2c_write(jaguar1_i2c_addr[coax_val->vd_dev], 0x3A+((ch%2)*0x80), 0x00);
737 }
738
739 /**************************************************************************************
740 * @desc
741 * JAGUAR1's Down stream mode off.
742 *
743 * @param_in (NC_VD_COAX_SET_STR *)coax_tx_mode UP Stream Command structure
744 *
745 * @return void None
746 *
747 * ioctl : IOC_VDEC_COAX_RX_DEINIT
748 ***************************************************************************************/
coax_rx_deinit(void * p_param)749 void coax_rx_deinit(void *p_param)
750 {
751 NC_VD_COAX_STR *coax_val = (NC_VD_COAX_STR*)p_param;
752
753 unsigned char ch = coax_val->ch;
754
755 gpio_i2c_write(jaguar1_i2c_addr[coax_val->vd_dev], 0xFF, 0x02+((ch%4)/2));
756 gpio_i2c_write(jaguar1_i2c_addr[coax_val->vd_dev], 0x63+((ch%2)*0x80), 0);
757 }
758
759 /*=======================================================================================================
760 ********************************************************************************************************
761 ************************** Coaxial protocol firmware upgrade function **********************************
762 ********************************************************************************************************
763 *
764 * Coaxial protocol firmware upgrade Flow
765 * 1. ACP Check - Down Stream Header 0x55 - coax_fw_ready_header_check_from_isp_recv
766 * 2.1 FW ready send - coax_fw_ready_cmd_to_isp_send
767 * 2.2 FW ready ACK receive - coax_fw_ready_cmd_ack_from_isp_recv
768 * 3.1 FW start send - coax_fw_start_cmd_to_isp_send
769 * 3.2 FW start ACK receive - coax_fw_start_cmd_ack_from_isp_recv
770 * 4.1 FW data send - 139byte - coax_fw_one_packet_data_to_isp_send
771 * 4.2 FW data ACK receive - offset - coax_fw_one_packet_data_ack_from_isp_recv
772 * 5.1 FW end send - coax_fw_end_cmd_to_isp_send
773 * 5.2 FW end ACK receive - coax_fw_end_cmd_ack_from_isp_recv
774 ========================================================================================================*/
775
776 /**************************************************************************************
777 * @desc
778 * JAGUAR1's Down stream check header value.(AHD : 0x55)
779 *
780 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->channel FW Update channel
781 * @param_out (FIRMWARE_UP_FILE_INFO *)p_param->result Header check result
782 *
783 * @return void None
784 *
785 * ioctl : IOC_VDEC_COAX_FW_ACP_HEADER_GET
786 ***************************************************************************************/
coax_fw_ready_header_check_from_isp_recv(void * p_param)787 void coax_fw_ready_header_check_from_isp_recv(void *p_param)
788 {
789 int ret = FW_FAILURE;
790 int ch = 0;
791 int devnum = 0;
792 unsigned char readval = 0;
793
794 FIRMWARE_UP_FILE_INFO *pstFileInfo = (FIRMWARE_UP_FILE_INFO*)p_param;
795 ch = pstFileInfo->channel;
796 devnum = pstFileInfo->channel/4;
797
798 /* set register */
799 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0xFF, 0x02+((ch%4)/2));
800 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x50+((ch%2)*0x80), 0x05 ); // PELCO Down Stream Read 1st Line
801 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x60+((ch%2)*0x80), 0x55 ); // Header Matching
802
803 /* If the header is (0x50=>0x55) and chip information is (0x51=>0x3X, 0x4X, 0x5X ), it can update firmware */
804 if( gpio_i2c_read( jaguar1_i2c_addr[devnum], 0x50+((ch%2)*0x80) ) == 0x55 )
805 {
806 printk(">>>>> DRV[%s:%d] CH:%d, this camera can update, please, wait! = 0x%x\n", __func__, __LINE__, ch, gpio_i2c_read( jaguar1_i2c_addr[ch/4], 0x51+((ch%2)*0x80) ) );
807 ret = FW_SUCCESS;
808 }
809 else
810 {
811 readval= gpio_i2c_read( jaguar1_i2c_addr[devnum], 0x50+((ch%2)*0x80) );
812 printk(">>>>> DRV[%s:%d] check ACP_STATUS_MODE::0x%x\n", __func__, __LINE__, readval );
813 ret = FW_FAILURE;
814 }
815
816 pstFileInfo->result = ret;
817 }
818
819 /**************************************************************************************
820 * @desc
821 * JAGUAR1's FW Ready command send to camera ( Mode change to FHD@25P )
822 *
823 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->channel FW Update channel
824 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->cp_mode Camera Format
825 * @param_out (FIRMWARE_UP_FILE_INFO *)p_param->result Function execution result
826 *
827 * @return void None
828 *
829 * ioctl : IOC_VDEC_COAX_FW_READY_CMD_SET
830 ***************************************************************************************/
coax_fw_ready_cmd_to_isp_send(void * p_param)831 void coax_fw_ready_cmd_to_isp_send(void *p_param) // FW Ready
832 {
833 int ch = 0;
834 int devnum = 0;
835 int ret = FW_FAILURE;
836 int cp_mode = 0;
837
838 FIRMWARE_UP_FILE_INFO *pstFileInfo = (FIRMWARE_UP_FILE_INFO*)p_param;
839 ch = pstFileInfo->channel;
840 cp_mode = pstFileInfo->cp_mode;
841 devnum = pstFileInfo->channel/4;
842
843 /* Adjust Tx */
844 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0xFF, 0x02+((ch%4)/2));
845 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x0A+((ch%2)*0x80), 0x04); // Tx Line count max
846
847 /* change video mode FHD@25P Command Send */
848 if( (cp_mode == FMT_AHD20) || (cp_mode == FMT_AHD30) )
849 {
850 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x10+((ch%2)*0x80), 0x60); // Register Write Control - 17th line
851 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x11+((ch%2)*0x80), 0xB0); // table(Mode Change Command) - 18th line
852 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x12+((ch%2)*0x80), 0x02); // Flash Update Mode(big data) - 19th line
853 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x13+((ch%2)*0x80), 0x02); // Init Value(FW Information Check Mode) - 20th line
854
855 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x09+((ch%2)*0x80), 0x08); // trigger on
856 msleep(200);
857 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x09+((ch%2)*0x80), 0x10); // reset
858 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x09+((ch%2)*0x80), 0x00); // trigger Off
859 printk(">>>>> DRV[%s:%d] CH:%d, coax_fw_ready_cmd_to_isp_send!!- AHD\n", __func__, __LINE__, ch );
860 ret = FW_SUCCESS;
861 }
862 else if( (cp_mode == FMT_CVI) || (cp_mode == FMT_TVI) )
863 {
864 /* change video mode FHD@25P Command Send */
865 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0xFF, 0x02+((ch%4)/2) );
866 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x10+((ch%2)*0x80), 0x55); // 0x55(header) - 16th line
867 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x11+((ch%2)*0x80), 0x60); // Register Write Control - 17th line
868 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x12+((ch%2)*0x80), 0xB0); // table(Mode Change Command) - 18th line
869 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x13+((ch%2)*0x80), 0x02); // Flash Update Mode - 19th line
870 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x14+((ch%2)*0x80), 0x00); // Init Value(FW Information Check Mode) - 20th line
871
872 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x09+((ch%2)*0x80), 0x08); // trigger on
873 msleep(1000);
874 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x09+((ch%2)*0x80), 0x10); // reset
875 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x09+((ch%2)*0x80), 0x00); // trigger Off
876 printk(">>>>> DRV[%s:%d] CH:%d, coax_fw_ready_cmd_to_isp_send!!- AHD\n", __func__, __LINE__, ch );
877 ret = FW_SUCCESS;
878 }
879 else
880 {
881 printk(">>>> DRV[%s:%d] CH:%d, FMT:%d > Unknown Format!!! \n", __func__, __LINE__, ch, cp_mode );
882 ret = FW_FAILURE;
883 }
884
885 pstFileInfo->result = ret;
886 }
887
888 /**************************************************************************************
889 * @desc
890 * JAGUAR1's FW Ready ACK receive from camera
891 *
892 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->channel FW Update channel
893
894 * @param_out (FIRMWARE_UP_FILE_INFO *)p_param->result Function execution result
895 *
896 * @return void None
897 *
898 * ioctl : IOC_VDEC_COAX_FW_READY_ACK_GET
899 ***************************************************************************************/
coax_fw_ready_cmd_ack_from_isp_recv(void * p_param)900 void coax_fw_ready_cmd_ack_from_isp_recv(void *p_param)
901 {
902 int ret = FW_FAILURE;
903 int ch = 0;
904 int devnum = 0;
905 unsigned char retval = 0x00;
906 unsigned char retval2 = 0x00;
907 static int toggle = 0;
908
909 FIRMWARE_UP_FILE_INFO *pstFileInfo = (FIRMWARE_UP_FILE_INFO*)p_param;
910 ch = pstFileInfo->channel;
911 devnum = pstFileInfo->channel/4;
912
913
914 /* AHD FHD 25P Video Setting */
915 if(!toggle)
916 {
917 video_input_init vd_set;
918 vd_set.ch = ch;
919 vd_set.format = AHD20_1080P_25P;
920 vd_set.input = SINGLE_ENDED;
921 vd_jaguar1_init_set(&vd_set);
922 toggle =1;
923 }
924
925 /* Adjust Rx FHD@25P */
926 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0xFF, 0x02+((ch%4)/2));
927 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x63+((ch%2)*0x80), 0x01 ); // Ch_X Rx ON
928 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x62+((ch%2)*0x80), 0x05 ); // Ch_X Rx Area
929 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x66+((ch%2)*0x80), 0x81 ); // Ch_X Rx Signal enhance
930 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x69+((ch%2)*0x80), 0x2D ); // Ch_X Rx Manual duty
931 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x60+((ch%2)*0x80), 0x55 ); // Ch_X Rx Header matching
932 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x61+((ch%2)*0x80), 0x00 ); // Ch_X Rx data_rz
933 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x68+((ch%2)*0x80), 0x80 ); // Ch_X Rx SZ
934
935 if( gpio_i2c_read( jaguar1_i2c_addr[devnum], 0x57+((ch%2)*0x80) ) == 0x02 )
936 {
937 /* get status, If the status is 0x00(Camera information), 0x01(Firmware version */
938 if( gpio_i2c_read( jaguar1_i2c_addr[devnum], 0x56+((ch%2)*0x80) ) == 0x00 )
939 {
940 printk(">>>>> DRV[%s:%d]CH:%d Receive ISP status : [READY]\n", __func__, __LINE__, ch );
941 ret = FW_SUCCESS;
942 }
943 }
944 else
945 {
946 retval = gpio_i2c_read( jaguar1_i2c_addr[devnum], 0x56+((ch%2)*0x80) );
947 retval2 = gpio_i2c_read( jaguar1_i2c_addr[devnum], 0x57+((ch%2)*0x80) );
948 printk(">>>>> DRV[%s:%d]CH:%d retry : Receive ISP status[READY], [0x56-true[0x00]:0x%x], [0x57-true[0x02]:0x%x]\n", __func__, __LINE__, ch, retval, retval2 );
949 ret = FW_FAILURE;
950 }
951
952 /* Rx Buffer clear */
953 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0xFF, 0x02+((ch%4)/2));
954 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x3A+((ch%2)*0x80), 0x01);
955 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x3A+((ch%2)*0x80), 0x00);
956
957 pstFileInfo->result = ret;
958 }
959
960 /**************************************************************************************
961 * @desc
962 * JAGUAR1's FW start command send to camera ( change to black pattern )
963 *
964 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->channel FW Update channel
965 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->cp_mode Camera Format
966 * @param_out (FIRMWARE_UP_FILE_INFO *)p_param->result Function execution result
967 *
968 * @return void None
969 *
970 * ioctl : IOC_VDEC_COAX_FW_START_CMD_SET
971 ***************************************************************************************/
coax_fw_start_cmd_to_isp_send(void * p_param)972 void coax_fw_start_cmd_to_isp_send(void *p_param)
973 {
974 int ch = 0;
975 int devnum = 0;
976
977 FIRMWARE_UP_FILE_INFO *pstFileInfo = (FIRMWARE_UP_FILE_INFO*)p_param;
978
979 ch = pstFileInfo->channel;
980 devnum = pstFileInfo->channel/4;
981
982 /* Adjust Tx */
983 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0xFF, 0x02+((ch%4)/2) );
984 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0x00+((ch%2)*0x80), 0x2D); // Duty
985 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0x03+((ch%2)*0x80), 0x0D); // line
986 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0x05+((ch%2)*0x80), 0x03); // tx_line_count
987 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0x0A+((ch%2)*0x80), 0x04); // tx_line_count_max
988
989 // Tx Command set
990 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0x10+((ch%2)*0x80), 0x60); // Register Write Control - 17th line
991 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0x11+((ch%2)*0x80), 0xB0); // table(Mode Change Command) - 18th line
992 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0x12+((ch%2)*0x80), 0x02); // Flash Update Mode(big data) - 19th line
993 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0x13+((ch%2)*0x80), 0x40); // Start firmware update - 20th line
994
995 // Tx Command Shot
996 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0x09+((ch%2)*0x80), 0x08); // trigger on
997 msleep(200);
998 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0x09+((ch%2)*0x80), 0x10); // reset
999 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0x09+((ch%2)*0x80), 0x00); // trigger Off
1000
1001 printk(">>>>> DRV[%s:%d]CH:%d >> Send command[START]\n", __func__, __LINE__, ch );
1002
1003 }
1004
1005 /**************************************************************************************
1006 * @desc
1007 * JAGUAR1's FW Start ACK receive from camera
1008 *
1009 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->channel FW Update channel
1010 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->cp_mode Camera Format
1011 * @param_out (FIRMWARE_UP_FILE_INFO *)p_param->result Function execution result
1012 *
1013 * @return void None
1014 *
1015 * ioctl : IOC_VDEC_COAX_FW_START_ACK_GET
1016 ***************************************************************************************/
coax_fw_start_cmd_ack_from_isp_recv(void * p_param)1017 void coax_fw_start_cmd_ack_from_isp_recv( void *p_param )
1018 {
1019 int ch = 0;
1020 int devnum = 0;
1021 int ret = FW_FAILURE;
1022
1023 FIRMWARE_UP_FILE_INFO *pstFileInfo = (FIRMWARE_UP_FILE_INFO*)p_param;
1024 ch = pstFileInfo->channel;
1025 devnum = pstFileInfo->channel/4;
1026
1027 /* Adjust Rx FHD@25P */
1028 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0xFF, 0x02+((ch%4)/2));
1029 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x63+((ch%2)*0x80), 0x01 ); // Ch_X Rx ON
1030 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x62+((ch%2)*0x80), 0x05 ); // Ch_X Rx Area
1031 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x66+((ch%2)*0x80), 0x81 ); // Ch_X Rx Signal enhance
1032 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x69+((ch%2)*0x80), 0x2D ); // Ch_X Rx Manual duty
1033 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x60+((ch%2)*0x80), 0x55 ); // Ch_X Rx Header matching
1034 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x61+((ch%2)*0x80), 0x00 ); // Ch_X Rx data_rz
1035 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x68+((ch%2)*0x80), 0x80 ); // Ch_X Rx SZ
1036
1037 if( gpio_i2c_read( jaguar1_i2c_addr[devnum], 0x57+((ch%2)*0x80) ) == 0x02 )
1038 {
1039 if( gpio_i2c_read( jaguar1_i2c_addr[devnum], 0x56+((ch%2)*0x80) ) == 0x02 )
1040 {
1041 printk(">>>>> DRV[%s:%d]CH:%d Receive ISP status : [START]\n", __func__, __LINE__, ch );
1042 ret = FW_SUCCESS;
1043 }
1044 else
1045 {
1046 unsigned char retval1;
1047 unsigned char retval2;
1048 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0xFF, 0x02+((ch%4)/2));
1049 retval1 = gpio_i2c_read( jaguar1_i2c_addr[devnum], 0x56+((ch%2)*0x80) );
1050 retval2 = gpio_i2c_read( jaguar1_i2c_addr[devnum], 0x57+((ch%2)*0x80) );
1051 ret = FW_FAILURE;
1052 printk(">>>>> DRV[%s:%d]CH:%d retry : Receive ISP status[START], [0x56-true[0x02]:0x%x], [0x57-true[0x02]:0x%x]\n", __func__, __LINE__, ch, retval1, retval2 );
1053 }
1054 }
1055
1056 /* Rx Buffer clear */
1057 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0xFF, 0x02+((ch%4)/2));
1058 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x3A+((ch%2)*0x80), 0x01);
1059 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x3A+((ch%2)*0x80), 0x00);
1060
1061 pstFileInfo->result = ret;
1062 }
1063
1064 /**************************************************************************************
1065 * @desc
1066 * JAGUAR1's FW Data send to camera(One packet data size 139byte)
1067 *
1068 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->channel FW Update channel
1069 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->readsize One packet data size
1070 * @param_out (FIRMWARE_UP_FILE_INFO *)p_param->currentFileOffset File offset
1071 * @param_out (FIRMWARE_UP_FILE_INFO *)p_param->result Function execution result
1072 *
1073 * @return void None
1074 *
1075 * ioctl : IOC_VDEC_COAX_FW_SEND_DATA_SET
1076 ***************************************************************************************/
coax_fw_one_packet_data_to_isp_send(void * p_param)1077 void coax_fw_one_packet_data_to_isp_send( void *p_param )
1078 {
1079 int ch = 0;
1080 int devnum = 0;
1081 int ii = 0;
1082 unsigned int low = 0x00;
1083 unsigned int mid = 0x00;
1084 unsigned int high = 0x00;
1085 unsigned int readsize = 0;
1086 int byteNumOfPacket = 0;
1087 FIRMWARE_UP_FILE_INFO *pstFileInfo = (FIRMWARE_UP_FILE_INFO*)p_param;
1088
1089 /* file information */
1090 ch = pstFileInfo->channel;
1091 readsize = pstFileInfo->readsize;
1092 devnum = pstFileInfo->channel/4;
1093
1094 /* fill packet(139bytes), end packet is filled with 0xff */
1095 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0xff, 0x0c+(ch%4) );
1096 for( ii = 0; ii < 139; ii++ )
1097 {
1098 if( byteNumOfPacket < readsize)
1099 {
1100 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0x00+ii, pstFileInfo->onepacketbuf[ii] );
1101 byteNumOfPacket++;
1102 }
1103 else if( byteNumOfPacket >= readsize ) // end packet : fill 0xff
1104 {
1105 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0x00+ii, 0xff );
1106 byteNumOfPacket++;
1107 }
1108
1109 if( ii == 0 )
1110 low = pstFileInfo->onepacketbuf[ii];
1111 else if( ii == 1 )
1112 mid = pstFileInfo->onepacketbuf[ii];
1113 else if( ii == 2 )
1114 high = pstFileInfo->onepacketbuf[ii];
1115 }
1116
1117 /* offset */
1118 pstFileInfo->currentFileOffset = (unsigned int)((high << 16 )&(0xFF0000))| (unsigned int)((mid << 8 )&(0xFF00)) | (unsigned char)(low);
1119
1120 /* Tx Change mode to use Big data */
1121 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0xFF, 0x02+((ch%4)/2) );
1122 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0x0B+((ch%2)*0x80), 0x30);
1123 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0x05+((ch%2)*0x80), 0x8A);
1124
1125 /* Tx Shot */
1126 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0xFF, 0x02+((ch%4)/2) );
1127 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0x09+((ch%2)*0x80), 0x08); // trigger on
1128 }
1129
1130 /**************************************************************************************
1131 * @desc
1132 * JAGUAR1's FW Data ACK receive from camera
1133 *
1134 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->channel FW Update channel
1135 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->currentFileOffset File offset
1136
1137 * @param_out (FIRMWARE_UP_FILE_INFO *)p_param->result Function execution result
1138 *
1139 * @return void None
1140 *
1141 * ioctl : IOC_VDEC_COAX_FW_SEND_ACK_GET
1142 ***************************************************************************************/
coax_fw_one_packet_data_ack_from_isp_recv(void * p_param)1143 void coax_fw_one_packet_data_ack_from_isp_recv( void *p_param )
1144 {
1145 int ret = FW_FAILURE;
1146 int ch = 0;
1147 int devnum = 0;
1148 unsigned int onepacketaddr = 0;
1149 unsigned int receive_addr = 0;
1150
1151 FIRMWARE_UP_FILE_INFO *pstFileInfo = (FIRMWARE_UP_FILE_INFO*)p_param;
1152 ch = pstFileInfo->channel;
1153 onepacketaddr = pstFileInfo->currentFileOffset;
1154 devnum = pstFileInfo->channel/4;
1155
1156 /* Adjust Rx FHD@25P */
1157 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0xFF, 0x02+((ch%4)/2));
1158 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x63+((ch%2)*0x80), 0x01 ); // Ch_X Rx ON
1159 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x62+((ch%2)*0x80), 0x05 ); // Ch_X Rx Area
1160 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x66+((ch%2)*0x80), 0x81 ); // Ch_X Rx Signal enhance
1161 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x69+((ch%2)*0x80), 0x2D ); // Ch_X Rx Manual duty
1162 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x60+((ch%2)*0x80), 0x55 ); // Ch_X Rx Header matching
1163 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x61+((ch%2)*0x80), 0x00 ); // Ch_X Rx data_rz
1164 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x68+((ch%2)*0x80), 0x70 ); // Ch_X Rx SZ
1165
1166 if( gpio_i2c_read( jaguar1_i2c_addr[devnum], 0x57+((ch%2)*0x80) ) == 0x02 )
1167 {
1168 /* check ISP status - only check first packet */
1169 if( pstFileInfo->currentpacketnum == 0 )
1170 {
1171 if( gpio_i2c_read( jaguar1_i2c_addr[devnum], 0x56+((ch%2)*0x80) ) == 0x03 )
1172 {
1173 pstFileInfo->result = FW_FAILURE;
1174 printk(">>>>> DRV[%s:%d] CH:%d, Failed, error status, code=3..................\n", __func__, __LINE__, ch );
1175 return;
1176 }
1177 }
1178
1179 /* check offset */
1180 receive_addr = (( gpio_i2c_read( jaguar1_i2c_addr[devnum], 0x53+((ch%2)*0x80))<<16) + \
1181 (gpio_i2c_read( jaguar1_i2c_addr[devnum], 0x54+((ch%2)*0x80))<<8) +
1182 gpio_i2c_read( jaguar1_i2c_addr[devnum], 0x55+((ch%2)*0x80)));
1183 if( onepacketaddr == receive_addr )
1184 {
1185 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0x09+((ch%2)*0x80), 0x10); // Reset
1186 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0x09+((ch%2)*0x80), 0x00); // trigger off
1187 ret = FW_SUCCESS;
1188 pstFileInfo->receive_addr = receive_addr;
1189 pstFileInfo->result = ret;
1190 }
1191 }
1192
1193 pstFileInfo->result = ret;
1194 }
1195
1196 /**************************************************************************************
1197 * @desc
1198 * JAGUAR1's FW End command send to camera
1199 *
1200 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->channel FW Update channel
1201 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->result FW Data send result
1202 *
1203 * @return void None
1204 *
1205 * ioctl : IOC_VDEC_COAX_FW_END_CMD_SET
1206 ***************************************************************************************/
coax_fw_end_cmd_to_isp_send(void * p_param)1207 void coax_fw_end_cmd_to_isp_send(void *p_param)
1208 {
1209 int ch = 0;
1210 int devnum = 0;
1211 int send_success = 0;
1212
1213 FIRMWARE_UP_FILE_INFO *pstFileInfo = (FIRMWARE_UP_FILE_INFO*)p_param;
1214
1215 ch = pstFileInfo->channel;
1216 send_success = pstFileInfo->result;
1217 devnum = pstFileInfo->channel/4;
1218
1219 /* adjust Tx line */
1220 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0xFF, 0x02+((ch%4)/2) );
1221 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0x0B+((ch%2)*0x80), 0x10); // Tx_Mode
1222 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0x05+((ch%2)*0x80), 0x03); // Tx_Line Count 3 line number
1223 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0x0A+((ch%2)*0x80), 0x03); // Tx Total Line Count 3 line number
1224
1225 /* Fill end command */
1226 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0x10+((ch%2)*0x80), 0x60);
1227 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0x11+((ch%2)*0x80), 0xb0);
1228 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0x12+((ch%2)*0x80), 0x02);
1229 if( send_success == FW_FAILURE )
1230 {
1231 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0x13+((ch%2)*0x80), 0xE0/*0xC0*/);
1232 printk(">>>>> DRV[%s:%d] CH:%d, Camera UPDATE error signal. send Abnormal ending!\n", __func__, __LINE__, ch );
1233 }
1234 else
1235 {
1236 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0x13+((ch%2)*0x80), 0x80/*0x60*/);
1237 printk(">>>>> DVR[%s:%d] CH:%d, Camera UPDATE ending signal. wait please!\n", __func__, __LINE__, ch );
1238 }
1239
1240 /* Shot */
1241 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0x09+((ch%2)*0x80), 0x08);
1242 msleep(200);
1243 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0x09+((ch%2)*0x80), 0x00);
1244
1245 }
1246
1247 /**************************************************************************************
1248 * @desc
1249 * JAGUAR1's FW End command ACK receive from camera
1250 *
1251 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->channel FW Update channel
1252 *
1253 * @param_out (FIRMWARE_UP_FILE_INFO *)p_param->result Function execution result
1254 *
1255 * @return void None
1256 *
1257 * ioctl : IOC_VDEC_COAX_FW_END_ACK_GET
1258 ***************************************************************************************/
coax_fw_end_cmd_ack_from_isp_recv(void * p_param)1259 void coax_fw_end_cmd_ack_from_isp_recv(void *p_param)
1260 {
1261 int ch = 0;
1262 int devnum = 0;
1263
1264 unsigned char videofm = 0x00;
1265 unsigned char ack_return = 0x00;
1266 unsigned char isp_status = 0x00;
1267 FIRMWARE_UP_FILE_INFO *pstFileInfo = (FIRMWARE_UP_FILE_INFO*)p_param;
1268
1269 ch = pstFileInfo->channel;
1270 devnum = pstFileInfo->channel/4;
1271
1272 /* check video format(video loss), 0:videoloss, 1:video on */
1273 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0xFF, 0x05+(ch%4));
1274 videofm = gpio_i2c_read( jaguar1_i2c_addr[devnum], 0xF0);
1275
1276 if( videofm == 0xFF )
1277 {
1278 printk(">>>>> DRV[%s:%d] Final[CH:%d], No video[END]!\n", __func__, __LINE__, ch );
1279 pstFileInfo->result = FW_FAILURE;
1280 return;
1281 }
1282
1283 /* Adjust Rx FHD@25P */
1284 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0xFF, 0x02+((ch%4)/2));
1285 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x63+((ch%2)*0x80), 0x01 ); // Ch_X Rx ON
1286 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x62+((ch%2)*0x80), 0x05 ); // Ch_X Rx Area
1287 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x66+((ch%2)*0x80), 0x81 ); // Ch_X Rx Signal enhance
1288 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x69+((ch%2)*0x80), 0x2D ); // Ch_X Rx Manual duty
1289 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x60+((ch%2)*0x80), 0x55 ); // Ch_X Rx Header matching
1290 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x61+((ch%2)*0x80), 0x00 ); // Ch_X Rx data_rz
1291 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x68+((ch%2)*0x80), 0x80 ); // Ch_X Rx SZ
1292
1293 /* get status, If the ack_return(0x56) is 0x05(completed writing f/w file to isp's flash) */
1294 gpio_i2c_write( jaguar1_i2c_addr[devnum], 0xFF, 0x02+((ch%4)/2));
1295 ack_return = gpio_i2c_read( jaguar1_i2c_addr[devnum], 0x56+((ch%2)*0x80) );
1296 isp_status = gpio_i2c_read( jaguar1_i2c_addr[devnum], 0x57+((ch%2)*0x80) );
1297 if( isp_status == 0x02 && ack_return == 0x05 )
1298 {
1299 printk(">>>>> DRV[%s:%d]CH:%d Receive ISP status : [END]\n", __func__, __LINE__, ch );
1300 pstFileInfo->result = FW_SUCCESS;
1301 return;
1302 }
1303 else
1304 {
1305 printk(">>>>> DRV[%s:%d]CH:%d retry : Receive ISP status[END], [0x56-true[0x05]:0x%x], [0x57-true[0x02]:0x%x]\n", __func__, __LINE__, ch, ack_return, isp_status );
1306 pstFileInfo->result = FW_FAILURE;
1307 return;
1308 }
1309
1310 }
1311
1312
coax_fw_revert_to_previous_fmt_set(void * p_param)1313 void coax_fw_revert_to_previous_fmt_set(void *p_param)
1314 {
1315 int ch = 0;
1316 int devnum = 0;
1317 video_input_init vd_set;
1318
1319 FIRMWARE_UP_FILE_INFO *pstFileInfo = (FIRMWARE_UP_FILE_INFO*)p_param;
1320
1321 ch = pstFileInfo->channel;
1322 devnum = pstFileInfo->channel/4;
1323
1324 /* previous video format Setting */
1325 vd_set.ch = ch;
1326 vd_set.format = g_coax_format;
1327 vd_set.input = SINGLE_ENDED;
1328 vd_jaguar1_init_set(&vd_set);
1329
1330 }
1331
1332 /*=======================================================================================================
1333 * Coaxial protocol Support option function
1334 *
1335 ========================================================================================================*/
1336 /**************************************************************************************
1337 * @desc
1338 * JAGUAR1's RT/NRT Mode change
1339 *
1340 * @param_in (NC_VD_COAX_Tx_Init_STR *)p_param->channel Coax read channel
1341 *
1342 * @return void None
1343 *
1344 * ioctl : IOC_VDEC_COAX_TEST_TX_INIT_DATA_READ
1345 ***************************************************************************************/
coax_option_rt_nrt_mode_change_set(void * p_param)1346 void coax_option_rt_nrt_mode_change_set(void *p_param)
1347 {
1348 NC_VD_COAX_STR *coax_val = (NC_VD_COAX_STR*)p_param;
1349
1350 unsigned char ch = coax_val->ch;
1351 unsigned char param = coax_val->param;
1352 unsigned char tx_line = 0;
1353 unsigned char tx_line_max = 0;
1354 //
1355 gpio_i2c_write(jaguar1_i2c_addr[coax_val->vd_dev], 0xFF, 0x02+((ch%4)/2));
1356
1357 tx_line = gpio_i2c_read( jaguar1_i2c_addr[coax_val->vd_dev], 0x05+((ch%2)*0x80) );
1358 tx_line_max = gpio_i2c_read( jaguar1_i2c_addr[coax_val->vd_dev], 0x0A+((ch%2)*0x80) );
1359
1360 // Adjust Tx
1361 gpio_i2c_write( jaguar1_i2c_addr[coax_val->vd_dev], 0x05+((ch%2)*0x80), 0x03); // Tx line set
1362 gpio_i2c_write( jaguar1_i2c_addr[coax_val->vd_dev], 0x0A+((ch%2)*0x80), 0x04); // Tx max line set
1363
1364 if( !param ) // RT Mode
1365 {
1366 gpio_i2c_write( jaguar1_i2c_addr[coax_val->vd_dev], 0x10+((ch%2)*0x80), 0x60); // Register write
1367 gpio_i2c_write( jaguar1_i2c_addr[coax_val->vd_dev], 0x11+((ch%2)*0x80), 0xb1); // Output command
1368 gpio_i2c_write( jaguar1_i2c_addr[coax_val->vd_dev], 0x12+((ch%2)*0x80), 0x00); // RT Mode
1369 gpio_i2c_write( jaguar1_i2c_addr[coax_val->vd_dev], 0x13+((ch%2)*0x80), 0x00);
1370 gpio_i2c_write( jaguar1_i2c_addr[coax_val->vd_dev], 0x14+((ch%2)*0x80), 0x00);
1371 gpio_i2c_write( jaguar1_i2c_addr[coax_val->vd_dev], 0x15+((ch%2)*0x80), 0x00);
1372 gpio_i2c_write( jaguar1_i2c_addr[coax_val->vd_dev], 0x16+((ch%2)*0x80), 0x00);
1373 gpio_i2c_write( jaguar1_i2c_addr[coax_val->vd_dev], 0x17+((ch%2)*0x80), 0x00);
1374 }
1375 else // NRT Mode
1376 {
1377 gpio_i2c_write( jaguar1_i2c_addr[coax_val->vd_dev], 0x10+((ch%2)*0x80), 0x60); // Register write
1378 gpio_i2c_write( jaguar1_i2c_addr[coax_val->vd_dev], 0x11+((ch%2)*0x80), 0xb1); // Output command
1379 gpio_i2c_write( jaguar1_i2c_addr[coax_val->vd_dev], 0x12+((ch%2)*0x80), 0x01); // RT Mode
1380 gpio_i2c_write( jaguar1_i2c_addr[coax_val->vd_dev], 0x13+((ch%2)*0x80), 0x00);
1381 gpio_i2c_write( jaguar1_i2c_addr[coax_val->vd_dev], 0x14+((ch%2)*0x80), 0x00);
1382 gpio_i2c_write( jaguar1_i2c_addr[coax_val->vd_dev], 0x15+((ch%2)*0x80), 0x00);
1383 gpio_i2c_write( jaguar1_i2c_addr[coax_val->vd_dev], 0x16+((ch%2)*0x80), 0x00);
1384 gpio_i2c_write( jaguar1_i2c_addr[coax_val->vd_dev], 0x17+((ch%2)*0x80), 0x00);
1385 }
1386
1387 // Tx Command Shot
1388 gpio_i2c_write( jaguar1_i2c_addr[coax_val->vd_dev], 0x09+((ch%2)*0x80), 0x08); // trigger on
1389 msleep(100);
1390 gpio_i2c_write( jaguar1_i2c_addr[coax_val->vd_dev], 0x09+((ch%2)*0x80), 0x10); // reset
1391 gpio_i2c_write( jaguar1_i2c_addr[coax_val->vd_dev], 0x09+((ch%2)*0x80), 0x00); // trigger Off
1392
1393 gpio_i2c_write( jaguar1_i2c_addr[coax_val->vd_dev], 0x05+((ch%2)*0x80), tx_line); // Tx line set
1394 gpio_i2c_write( jaguar1_i2c_addr[coax_val->vd_dev], 0x0A+((ch%2)*0x80), tx_line_max); // Tx max line set
1395
1396 }
1397
1398 /*=======================================================================================================
1399 * Coaxial protocol test function
1400 *
1401 ========================================================================================================*/
1402 /**************************************************************************************
1403 * @desc
1404 * JAGUAR1's Test function. Read coax Tx initialize value
1405 *
1406 * @param_in (NC_VD_COAX_Tx_Init_STR *)p_param->channel Coax read channel
1407 *
1408 * @return void None
1409 *
1410 * ioctl : IOC_VDEC_COAX_TEST_TX_INIT_DATA_READ
1411 ***************************************************************************************/
coax_test_tx_init_read(NC_VD_COAX_TEST_STR * coax_tx_mode)1412 void coax_test_tx_init_read(NC_VD_COAX_TEST_STR *coax_tx_mode)
1413 {
1414 //int ch = coax_tx_mode->ch;
1415 //int devnum = coax_tx_mode->chip_num;
1416
1417 int ch = 0;
1418 int devnum = 0;
1419
1420 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0xFF, 0x05+ch%4);
1421 coax_tx_mode->rx_src = gpio_i2c_read(jaguar1_i2c_addr[devnum], 0x7C);
1422 coax_tx_mode->rx_slice_lev = gpio_i2c_read(jaguar1_i2c_addr[devnum], 0x7D);
1423
1424 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0xFF, 0x02+((ch%4)/2));
1425 coax_tx_mode->tx_baud = gpio_i2c_read(jaguar1_i2c_addr[devnum], 0x00+((ch%2)*0x80));
1426 coax_tx_mode->tx_pel_baud = gpio_i2c_read(jaguar1_i2c_addr[devnum], 0x02+((ch%2)*0x80));
1427 coax_tx_mode->tx_line_pos0 = gpio_i2c_read(jaguar1_i2c_addr[devnum], 0x03+((ch%2)*0x80));
1428 coax_tx_mode->tx_line_pos1 = gpio_i2c_read(jaguar1_i2c_addr[devnum], 0x04+((ch%2)*0x80));
1429 coax_tx_mode->tx_line_count = gpio_i2c_read(jaguar1_i2c_addr[devnum], 0x05+((ch%2)*0x80));
1430 coax_tx_mode->tx_pel_line_pos0 = gpio_i2c_read(jaguar1_i2c_addr[devnum], 0x07+((ch%2)*0x80));
1431 coax_tx_mode->tx_pel_line_pos1 = gpio_i2c_read(jaguar1_i2c_addr[devnum], 0x08+((ch%2)*0x80));
1432 coax_tx_mode->tx_line_count_max = gpio_i2c_read(jaguar1_i2c_addr[devnum], 0x0A+((ch%2)*0x80));
1433 coax_tx_mode->tx_mode = gpio_i2c_read(jaguar1_i2c_addr[devnum], 0x0B+((ch%2)*0x80));
1434 coax_tx_mode->tx_sync_pos0 = gpio_i2c_read(jaguar1_i2c_addr[devnum], 0x0D+((ch%2)*0x80));
1435 coax_tx_mode->tx_sync_pos1 = gpio_i2c_read(jaguar1_i2c_addr[devnum], 0x0E +((ch%2)*0x80));
1436 coax_tx_mode->tx_even = gpio_i2c_read(jaguar1_i2c_addr[devnum], 0x2F+((ch%2)*0x80));
1437 coax_tx_mode->tx_zero_length = gpio_i2c_read(jaguar1_i2c_addr[devnum], 0x0C+((ch%2)*0x80));
1438 }
1439
coax_acp_rx_detect_get(void * p_param)1440 void coax_acp_rx_detect_get( void *p_param )
1441 {
1442 NC_VD_COAX_STR *coax_val = (NC_VD_COAX_STR*)p_param;
1443
1444 unsigned char ch = coax_val->ch;
1445 unsigned char val_1 = 0;
1446 unsigned char val_2 = 0;
1447
1448
1449 gpio_i2c_write(jaguar1_i2c_addr[coax_val->vd_dev], 0xFF, 0x02+ch%4);
1450 val_1 = gpio_i2c_read(jaguar1_i2c_addr[coax_val->vd_dev], 0x5c+((ch%2)*0x80));
1451 // printk("[drv]%d_1. detection: 0x%02X\n", ch, val_1);
1452
1453 gpio_i2c_write(jaguar1_i2c_addr[coax_val->vd_dev], 0xFF, 0x00);
1454 val_2 = gpio_i2c_read(jaguar1_i2c_addr[coax_val->vd_dev], 0xa8 + ch);
1455 // printk("[drv]%d_2. detection: 0x%02X\n", ch, val_2);
1456
1457 coax_val->param = val_1;
1458 }
1459 /**************************************************************************************
1460 * @desc
1461 * JAGUAR1's Test function. bank, address, value setting. get from application
1462 *
1463 * @param_in (NC_VD_COAX_TEST_STR *)coax_data Coax Tx setting value
1464 *
1465 * @return void None
1466 *
1467 * ioctl : IOC_VDEC_COAX_TEST_DATA_SET
1468 ***************************************************************************************/
coax_test_data_set(NC_VD_COAX_TEST_STR * coax_data)1469 void coax_test_data_set(NC_VD_COAX_TEST_STR *coax_data)
1470 {
1471 // printk("[DRV_Set]bank(0x%02X)/addr(0x%02X)/param(0x%02X)\n", coax_data->bank, coax_data->data_addr, coax_data->param );
1472 gpio_i2c_write(jaguar1_i2c_addr[coax_data->chip_num], 0xFF, coax_data->bank);
1473 gpio_i2c_write(jaguar1_i2c_addr[coax_data->chip_num], coax_data->data_addr, coax_data->param );
1474 }
1475
1476 /**************************************************************************************
1477 * @desc
1478 * JAGUAR1's Test function. Read value bank, address, value. To application
1479 *
1480 * @param_in (NC_VD_COAX_TEST_STR *)coax_data Coax read channel
1481 *
1482 * @return void None
1483 *
1484 * ioctl : IOC_VDEC_COAX_TEST_DATA_READ
1485 ***************************************************************************************/
coax_test_data_get(NC_VD_COAX_TEST_STR * coax_data)1486 void coax_test_data_get(NC_VD_COAX_TEST_STR *coax_data)
1487 {
1488 gpio_i2c_write(jaguar1_i2c_addr[coax_data->chip_num], 0xFF, coax_data->bank);
1489 coax_data->param = gpio_i2c_read(jaguar1_i2c_addr[coax_data->chip_num], coax_data->data_addr);
1490 // printk("[DRV_Get]bank(0x%02X), addr(0x%02X), param(0x%02X)\n", coax_data->bank, coax_data->data_addr, coax_data->param );
1491 }
1492
1493 /**************************************************************************************
1494 * @desc
1495 * JAGUAR1's Test function. Bank Dump To application
1496 *
1497 * @param_in (NC_VD_COAX_BANK_DUMP_STR *)coax_data Coax read channel
1498 *
1499 * @return void None
1500 *
1501 * ioctl : IOC_VDEC_COAX_TEST_DATA_READ
1502 ***************************************************************************************/
coax_test_Bank_dump_get(NC_VD_COAX_BANK_DUMP_STR * coax_data)1503 void coax_test_Bank_dump_get(NC_VD_COAX_BANK_DUMP_STR *coax_data)
1504 {
1505 int ii = 0;
1506 memset( coax_data->rx_pelco_data, 0, sizeof(coax_data->rx_pelco_data));
1507
1508 printk("[drv]dev: %x, Bank: 0x%02X\n", coax_data->vd_dev, coax_data->bank);
1509
1510 gpio_i2c_write(jaguar1_i2c_addr[coax_data->vd_dev], 0xFF, coax_data->bank);
1511
1512 for(ii=0; ii<256; ii++)
1513 {
1514 coax_data->rx_pelco_data[ii] = gpio_i2c_read(jaguar1_i2c_addr[coax_data->vd_dev], 0x00+ii);
1515 }
1516
1517 }
1518
1519
1520 /*******************************************************************************
1521 * Description : write data to ISP
1522 * Argurments : ch(channel ID),reg_addr(high[1byte]:bank, low[1byte]:register)
1523 * reg_data(data)
1524 * Return value : void
1525 * Modify :
1526 * warning :
1527 *******************************************************************************/
acp_isp_write(unsigned char ch,unsigned int reg_addr,unsigned char reg_data)1528 void acp_isp_write(unsigned char ch, unsigned int reg_addr, unsigned char reg_data)
1529 {
1530 unsigned char bankaddr = 0x00;
1531 unsigned char device_id = 0x00;
1532 /* int i; */
1533 unsigned char lcnt_bak, lcntm_bak, crc_bak;
1534
1535 /* set coax RX device ID */
1536 bankaddr = (reg_addr>>8)&0xFF;
1537 if( bankaddr >= 0xB0 && bankaddr <= 0xB4 )
1538 {
1539 device_id = 0x55;
1540 }
1541 else
1542 {
1543 device_id = ACP_REG_WR;
1544 }
1545
1546 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0xFF, 0x02+((ch%4)/2));
1547 lcnt_bak = gpio_i2c_read(jaguar1_i2c_addr[ch/4], 0x05+((ch%2)*0x80));
1548 lcntm_bak = gpio_i2c_read(jaguar1_i2c_addr[ch/4], 0x0A+((ch%2)*0x80));
1549 crc_bak = gpio_i2c_read(jaguar1_i2c_addr[ch/4], 0x60+((ch%2)*0x80));
1550 //gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0x05+((ch%2)*0x80), 0x03);
1551 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0x0A+((ch%2)*0x80), 0x03);
1552 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0x60+((ch%2)*0x80), device_id);
1553
1554 /* write data to isp */
1555 gpio_i2c_write( jaguar1_i2c_addr[ch/4], 0xFF, 0x02+((ch%4)/2));
1556 if(acp_mode_enable == 1)
1557 {
1558 gpio_i2c_write( jaguar1_i2c_addr[ch/4], 0x10+((ch%2)*0x80), ACP_REG_WR); // data1(#define ACP_AHD2_FHD_D0 0x10)
1559 gpio_i2c_write( jaguar1_i2c_addr[ch/4], 0x11+((ch%2)*0x80), (reg_addr>>8)&0xFF); // data2(bank)
1560 gpio_i2c_write( jaguar1_i2c_addr[ch/4], 0x12+((ch%2)*0x80), reg_addr&0xFF); // data3(address)
1561 gpio_i2c_write( jaguar1_i2c_addr[ch/4], 0x13+((ch%2)*0x80), reg_data); // data4(Don't care)
1562 gpio_i2c_write( jaguar1_i2c_addr[ch/4], 0x09+((ch%2)*0x80), 0x08); // - pulse on(trigger)
1563 msleep(200); // sleep to recognize NRT(15fps) signal for ISP (M)
1564 gpio_i2c_write( jaguar1_i2c_addr[ch/4], 0xFF, 0x02+((ch%4)/2));
1565 gpio_i2c_write( jaguar1_i2c_addr[ch/4], 0x09+((ch%2)*0x80), 0x10); // reset - pulse off
1566 gpio_i2c_write( jaguar1_i2c_addr[ch/4], 0x09+((ch%2)*0x80), 0x00); // - pulse off
1567 printk("ahd acp 8bit mode test\n");
1568 }
1569 else
1570 {
1571 /*
1572 // fill Reset
1573 for(i=0;i<4;i++)
1574 {
1575 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0x20+((ch%2)*0x80)+i, 0);
1576 }
1577 // Command Shot
1578 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0xFF, 0x02+((ch%4)/2) );
1579 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0x0c+((ch%2)*0x80), 0x01);
1580 msleep(30);
1581 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0x0c+((ch%2)*0x80), 0x00);
1582 */
1583
1584 //fill command
1585 gpio_i2c_write( jaguar1_i2c_addr[ch/4], 0x20+((ch%2)*0x80), ACP_REG_WR); // data1(#define ACP_AHD2_FHD_D0 0x10)
1586 gpio_i2c_write( jaguar1_i2c_addr[ch/4], 0x21+((ch%2)*0x80), (reg_addr>>8)&0xFF); // data2(bank)
1587 gpio_i2c_write( jaguar1_i2c_addr[ch/4], 0x22+((ch%2)*0x80), reg_addr&0xFF); // data3(address)
1588 gpio_i2c_write( jaguar1_i2c_addr[ch/4], 0x23+((ch%2)*0x80), reg_data); // data4(Don't care)
1589 // Command Shot
1590 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0xFF, 0x02+((ch%4)/2) );
1591 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0x0c+((ch%2)*0x80), 0x01);
1592 msleep(200);
1593 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0x0c+((ch%2)*0x80), 0x00);
1594 printk("ahd pelcod 16bit mode test\n");
1595 }
1596
1597 //gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0x05+((ch%2)*0x80), lcnt_bak);
1598 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0x0A+((ch%2)*0x80), lcntm_bak);
1599 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0x60+((ch%2)*0x80), crc_bak);
1600
1601 #if 0 // debuggin
1602 printk(">>>>> CH:%d NORMAL, RX->TX : ", ch );
1603 printk("%02x ", ACP_REG_WR );
1604 printk("%02x ", (reg_addr>>8)&0xFF );
1605 printk("%02x ", reg_addr&0xFF );
1606 printk("%02x ", reg_data );
1607 printk("\n");
1608 #endif
1609 }
1610
1611 /*******************************************************************************
1612 * Description : read acp data of ISP
1613 * Argurments : ch(channel ID), reg_addr(high[1byte]:bank, low[1byte]:register)
1614 * Return value : void
1615 * Modify :
1616 * warning :
1617 *******************************************************************************/
acp_isp_read(unsigned char ch,unsigned int reg_addr)1618 unsigned char acp_isp_read(unsigned char ch, unsigned int reg_addr)
1619 {
1620 unsigned int data_3x50[8];
1621 unsigned char lcnt_bak, lcntm_bak, crc_bak;
1622 unsigned char bank;
1623 unsigned char addr;
1624 int i;
1625
1626 bank = (reg_addr>>8)&0xFF;
1627 addr = reg_addr&0xFF;
1628
1629 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0xFF, 0x02+((ch%4)/2));
1630 lcnt_bak = gpio_i2c_read(jaguar1_i2c_addr[ch/4], 0x05+((ch%2)*0x80));
1631 lcntm_bak = gpio_i2c_read(jaguar1_i2c_addr[ch/4], 0x0A+((ch%2)*0x80));
1632 crc_bak = gpio_i2c_read(jaguar1_i2c_addr[ch/4], 0x60+((ch%2)*0x80));
1633 //gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0x05+((ch%2)*0x80), 0x03);
1634 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0x0A+((ch%2)*0x80), 0x03);
1635 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0x60+((ch%2)*0x80), ACP_REG_RD);
1636
1637 if(acp_mode_enable == 1)
1638 {
1639 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0xFF, 0x02+((ch%4)/2));
1640 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0x10+(ch%2)*0x80, 0x61);
1641 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0x10+1+(ch%2)*0x80, bank);
1642 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0x10+2+(ch%2)*0x80, addr);
1643 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0x10+3+(ch%2)*0x80, 0x00);
1644 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0x09+(ch%2)*0x80, 0x08);
1645 }
1646 else
1647 {
1648 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0xFF, 0x02+((ch%4)/2));
1649 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0x20+(ch%2)*0x80, 0x61);
1650 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0x20+1+(ch%2)*0x80, bank);
1651 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0x20+2+(ch%2)*0x80, addr);
1652 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0x20+3+(ch%2)*0x80, 0x00);
1653 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0x0c+(ch%2)*0x80, 0x01);
1654 }
1655 msleep(300);
1656 for(i=0;i<8;i++)
1657 {
1658 data_3x50[i] = gpio_i2c_read(jaguar1_i2c_addr[ch/4],0x50+i+((ch%2)*0x80));
1659 printk("acp_isp_read ch = %d, reg_addr = %x, reg_data = %x\n", ch,reg_addr, data_3x50[i]);
1660 }
1661 //gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0x05+((ch%2)*0x80), lcnt_bak);
1662 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0x0A+((ch%2)*0x80), lcntm_bak);
1663 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0x60+((ch%2)*0x80), crc_bak);
1664
1665 if(acp_mode_enable == 1)
1666 {
1667 gpio_i2c_write( jaguar1_i2c_addr[ch/4], 0x09+((ch%2)*0x80), 0x10);
1668 gpio_i2c_write( jaguar1_i2c_addr[ch/4], 0x09+((ch%2)*0x80), 0x00);
1669 }
1670 else
1671 {
1672 gpio_i2c_write(jaguar1_i2c_addr[ch/4], 0x0c+(ch%2)*0x80, 0x00);
1673 }
1674 return data_3x50[3];
1675 }
1676
1677
1678