1/* 2 * Copyright (c) 2025-2026, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7#include <arch.h> 8#include <asm_macros.S> 9#include <assert_macros.S> 10 11 .globl clear_cpu_pfg_ctrl_register 12 .globl clear_cpu_pfg_cdn_register 13 .globl clear_cpu_erx_misc0_register 14 15/* 16 * void clear_cpu_pfg_ctrl_register() 17 * Clear the fault genration register to inject new error 18 */ 19func clear_cpu_pfg_ctrl_register 20 msr ERXPFGCTL_EL1, xzr 21 ret 22endfunc clear_cpu_pfg_ctrl_register 23 24/* 25 * void write_cpu_pfg_cdn_register(void) 26 * Clear the fault generation countdown register 27 */ 28func clear_cpu_pfg_cdn_register 29 msr ERXPFGCDN_EL1, xzr 30 ret 31endfunc clear_cpu_pfg_cdn_register 32 33/* 34 * void clear_cpu_erx_misc0_register(void) 35 * Clear the MISC0 register 36 */ 37func clear_cpu_erx_misc0_register 38 msr ERXMISC0_EL1, xzr 39 ret 40endfunc clear_cpu_erx_misc0_register 41 42