1 /*
2 * Copyright (c) 2022-2024, MediaTek Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <assert.h>
8 #include <arch.h>
9 #include <common/bl_common.h>
10 #include <common/debug.h>
11 #include <drivers/delay_timer.h>
12 #include <drivers/generic_delay_timer.h>
13 #if XLAT_TABLES_LIB_V2 && PLAT_XLAT_TABLES_DYNAMIC
14 #include <lib/xlat_tables/xlat_tables_v2.h>
15 #endif
16 #include <plat/common/platform.h>
17
18 #if COREBOOT
19 #include <common/desc_image_load.h>
20
21 #include <drivers/ti/uart/uart_16550.h>
22 #include <lib/coreboot.h>
23 #include <plat_params.h>
24 #endif
25
26 /* MTK headers */
27 #if CONFIG_MTK_DISABLE_CACHE_AS_RAM
28 #include <cache_ops.h>
29 #endif
30 #if MTK_SIP_KERNEL_BOOT_ENABLE
31 #include <cold_boot.h>
32 #endif
33 #include <lib/mtk_init/mtk_init.h>
34 #include <mtk_mmap_pool.h>
35
36 IMPORT_SYM(uintptr_t, __RW_START__, RW_START);
37 IMPORT_SYM(uintptr_t, __DATA_START__, DATA_START);
38
39 #if COREBOOT
40 static entry_point_info_t bl32_ep_info;
41 static entry_point_info_t bl33_ep_info;
42
43 /*******************************************************************************
44 * Return a pointer to the 'entry_point_info' structure of the next image for
45 * the security state specified. BL33 corresponds to the non-secure image type
46 * while BL32 corresponds to the secure image type. A NULL pointer is returned
47 * if the image does not exist.
48 ******************************************************************************/
bl31_plat_get_next_image_ep_info(uint32_t type)49 entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
50 {
51 entry_point_info_t *next_image_info;
52
53 next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info;
54 assert(next_image_info->h.type == PARAM_EP);
55
56 /* None of the images on this platform can have 0x0 as the entrypoint */
57 if (next_image_info->pc) {
58 return next_image_info;
59 } else {
60 return NULL;
61 }
62 }
63 #else
64 #ifndef MTK_BL31_AS_BL2
65 static struct mtk_bl31_fw_config bl31_fw_config;
66 #else
67 struct mtk_bl31_fw_config bl31_fw_config;
68 #endif
69 /* In order to be accessed after MMU enable */
70 static struct mtk_bl_param_t bl_param_clone;
71
get_mtk_bl31_fw_config(int index)72 void *get_mtk_bl31_fw_config(int index)
73 {
74 void *arg = NULL;
75
76 switch (index) {
77 case BOOT_ARG_FROM_BL2:
78 arg = bl31_fw_config.from_bl2;
79 break;
80 case BOOT_ARG_SOC_FW_CONFIG:
81 arg = bl31_fw_config.soc_fw_config;
82 break;
83 case BOOT_ARG_HW_CONFIG:
84 arg = bl31_fw_config.hw_config;
85 break;
86 case BOOT_ARG_RESERVED:
87 arg = bl31_fw_config.reserved;
88 break;
89 default:
90 WARN("Fail to get boot arg, index:%d", index);
91 break;
92 }
93 return arg;
94 }
95 #endif
96 /*****************************************************************************
97 * Perform the very early platform specific architectural setup shared between
98 * ARM standard platforms. This only does basic initialization. Later
99 * architectural setup (bl31_arch_setup()) does not do anything platform
100 * specific.
101 ******************************************************************************/
bl31_early_platform_setup2(u_register_t from_bl2,u_register_t soc_fw_config,u_register_t hw_config,u_register_t plat_params_from_bl2)102 void bl31_early_platform_setup2(u_register_t from_bl2,
103 u_register_t soc_fw_config,
104 u_register_t hw_config, u_register_t plat_params_from_bl2)
105
106 {
107 #if CONFIG_MTK_DISABLE_CACHE_AS_RAM
108 disable_cache_as_ram();
109 #endif
110 #if COREBOOT
111 static console_t console;
112
113 params_early_setup(soc_fw_config);
114 if (coreboot_serial.type) {
115 console_16550_register(coreboot_serial.baseaddr,
116 coreboot_serial.input_hertz,
117 coreboot_serial.baud,
118 &console);
119 }
120 bl31_params_parse_helper(from_bl2, &bl32_ep_info, &bl33_ep_info);
121 #else
122 struct mtk_bl_param_t *p_mtk_bl_param = (struct mtk_bl_param_t *)from_bl2;
123
124 if (p_mtk_bl_param == NULL) {
125 ERROR("from_bl2 should not be NULL\n");
126 panic();
127 }
128 memcpy(&bl_param_clone, p_mtk_bl_param, sizeof(struct mtk_bl_param_t));
129 bl31_fw_config.from_bl2 = (void *)&bl_param_clone;
130 bl31_fw_config.soc_fw_config = (void *)soc_fw_config;
131 bl31_fw_config.hw_config = (void *)hw_config;
132 bl31_fw_config.reserved = (void *)plat_params_from_bl2;
133 #endif
134
135 INFO("MTK BL31 start\n");
136 /* Init delay function */
137 generic_delay_timer_init();
138 /* Initialize module initcall */
139 mtk_init_one_level(MTK_INIT_LVL_EARLY_PLAT);
140 }
141
bl31_plat_arch_setup(void)142 void bl31_plat_arch_setup(void)
143 {
144 const mmap_region_t bl_regions[] = {
145 MAP_BL_RO,
146 MAP_BL_RW,
147 #if USE_COHERENT_MEM
148 MAP_BL_COHERENT_RAM,
149 #endif
150 {0},
151 };
152
153 mtk_xlat_init(bl_regions);
154 /* Initialize module initcall */
155 mtk_init_one_level(MTK_INIT_LVL_ARCH);
156 }
157
158 /*****************************************************************************
159 * Perform any BL31 platform setup common to ARM standard platforms
160 ******************************************************************************/
161
bl31_platform_setup(void)162 void bl31_platform_setup(void)
163 {
164 mtk_init_one_level(MTK_INIT_LVL_PLAT_SETUP_0);
165 mtk_init_one_level(MTK_INIT_LVL_PLAT_SETUP_1);
166 }
167
168 /*******************************************************************************
169 * Operations before cold CPU leave BL31.
170 * Switch console to runtime state.
171 ******************************************************************************/
bl31_plat_runtime_setup(void)172 void bl31_plat_runtime_setup(void)
173 {
174 mtk_init_one_level(MTK_INIT_LVL_PLAT_RUNTIME);
175 }
176
plat_get_syscnt_freq2(void)177 unsigned int plat_get_syscnt_freq2(void)
178 {
179 return SYS_COUNTER_FREQ_IN_HZ;
180 }
181