xref: /rk3399_ARM-atf/bl1/aarch64/bl1_context_mgmt.c (revision b921b5b889bad2a840dc131183ab20c603fcacc4)
1 /*
2  * Copyright (c) 2015-2025, Arm Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <assert.h>
8 
9 #include <arch_helpers.h>
10 #include <context.h>
11 #include <common/debug.h>
12 #include <lib/el3_runtime/context_mgmt.h>
13 #include <plat/common/platform.h>
14 
15 #include "../bl1_private.h"
16 
17 entry_point_info_t *bl2_ep_info;
18 
19 /*
20  * Following array will be used for context management.
21  * There are 2 instances, for the Secure and Non-Secure contexts.
22  */
23 static cpu_context_t bl1_cpu_context[2];
24 
cm_get_context(size_t security_state)25 void *cm_get_context(size_t security_state)
26 {
27 	assert(sec_state_is_valid(security_state));
28 	return &bl1_cpu_context[security_state];
29 }
30 
31 #if BL2_RUNS_AT_EL3
32 /*******************************************************************************
33  * This function prepares the entry point information to run BL2 in EL3. BL2 is
34  * set to run at EL3 in case of RESET_TO_BL2=1 (not applicable for BL1) or RME
35  * is enabled.
36  ******************************************************************************/
bl1_prepare_next_image(unsigned int image_id)37 void bl1_prepare_next_image(unsigned int image_id)
38 {
39 	image_desc_t *bl2_desc;
40 
41 	assert(image_id == BL2_IMAGE_ID);
42 
43 	/* Get the image descriptor. */
44 	bl2_desc = bl1_plat_get_image_desc(BL2_IMAGE_ID);
45 	assert(bl2_desc != NULL);
46 
47 	/* Get the entry point info. */
48 	bl2_ep_info = &bl2_desc->ep_info;
49 
50 	bl2_ep_info->spsr = (uint32_t)SPSR_64(MODE_EL3, MODE_SP_ELX,
51 						DISABLE_ALL_EXCEPTIONS);
52 
53 	/*
54 	 * Flush cache since bl2_ep_info is accessed after MMU is disabled
55 	 * before jumping to BL2.
56 	 */
57 	flush_dcache_range((uintptr_t)bl2_ep_info, sizeof(entry_point_info_t));
58 
59 	/* Indicate that image is in execution state. */
60 	bl2_desc->state = IMAGE_STATE_EXECUTED;
61 
62 	/* Print debug info and flush the console before running BL2. */
63 	print_entry_point_info(bl2_ep_info);
64 }
65 #else
66 /*******************************************************************************
67  * This function prepares the context for Secure/Normal world images.
68  * Normal world images are transitioned to EL2(if supported) else EL1.
69  ******************************************************************************/
bl1_prepare_next_image(unsigned int image_id)70 void bl1_prepare_next_image(unsigned int image_id)
71 {
72 	unsigned int security_state, mode = MODE_EL1;
73 	image_desc_t *desc;
74 	entry_point_info_t *next_bl_ep;
75 
76 #if CTX_INCLUDE_AARCH32_REGS
77 	/*
78 	 * Ensure that the build flag to save AArch32 system registers in CPU
79 	 * context is not set for AArch64-only platforms.
80 	 */
81 	if (el_implemented(1) == EL_IMPL_A64ONLY) {
82 		ERROR("EL1 supports AArch64-only. Please set build flag "
83 				"CTX_INCLUDE_AARCH32_REGS = 0\n");
84 		panic();
85 	}
86 #endif
87 
88 	/* Get the image descriptor. */
89 	desc = bl1_plat_get_image_desc(image_id);
90 	assert(desc != NULL);
91 
92 	/* Get the entry point info. */
93 	next_bl_ep = &desc->ep_info;
94 
95 	/* Get the image security state. */
96 	security_state = GET_SECURITY_STATE(next_bl_ep->h.attr);
97 
98 	/* Prepare the SPSR for the next BL image. */
99 	if ((security_state != SECURE) && (el_implemented(2) != EL_IMPL_NONE)) {
100 		mode = MODE_EL2;
101 	}
102 
103 	next_bl_ep->spsr = (uint32_t)SPSR_64((uint64_t) mode,
104 		(uint64_t)MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
105 
106 	/* Allow platform to make change */
107 	bl1_plat_set_ep_info(image_id, next_bl_ep);
108 
109 	/* Prepare the context for the next BL image. */
110 	cm_init_my_context(next_bl_ep);
111 	cm_prepare_el3_exit(security_state);
112 
113 	/* Indicate that image is in execution state. */
114 	desc->state = IMAGE_STATE_EXECUTED;
115 
116 	print_entry_point_info(next_bl_ep);
117 }
118 #endif /* BL2_RUNS_AT_EL3 */
119