1 /*
2 * Copyright 2016 Rockchip Electronics Co. LTD
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #define MODULE_TAG "rc_model_v2"
18
19 #include <math.h>
20 #include <string.h>
21
22 #include "mpp_env.h"
23 #include "mpp_mem.h"
24 #include "mpp_common.h"
25 #include "mpp_time.h"
26 #include "rc_debug.h"
27 #include "rc_ctx.h"
28 #include "rc_model_v2.h"
29
30 #define I_WINDOW_LEN 2
31 #define P_WINDOW1_LEN 5
32 #define P_WINDOW2_LEN 8
33 #define MAX_BIT_COUNT_VALUE 1000000000000000
34
35 static const RK_S32 max_i_delta_qp[51] = {
36 640, 640, 640, 640, 640, 640, 640, 640, 640, 640, 640, 640, 640, 640,
37 576, 576, 512, 512, 448, 448, 384, 384, 320, 320, 320, 256, 256, 256,
38 192, 192, 192, 192, 192, 128, 128, 128, 128, 128, 128, 64, 64, 64,
39 64, 64, 64, 0, 0, 0, 0, 0, 0,
40 };
41
42 RK_S32 tab_lnx[64] = {
43 -1216, -972, -830, -729, -651, -587, -533, -486,
44 -445, -408, -374, -344, -316, -290, -265, -243,
45 -221, -201, -182, -164, -147, -131, -115, -100,
46 -86, -72, -59, -46, -34, -22, -11, 0,
47 10, 21, 31, 41, 50, 60, 69, 78,
48 86, 95, 87, 103, 111, 119, 127, 134,
49 142, 149, 156, 163, 170, 177, 183, 190,
50 196, 202, 208, 214, 220, 226, 232, 237,
51 };
52
53 RK_S32 mean_qp2scale[16] = {
54 14, 15, 16, 18, 20, 22, 25, 28,
55 32, 36, 40, 44, 50, 56, 64, 72
56 };
57 const RK_S8 max_ip_qp_dealt[8] = {
58 7, 7, 6, 6, 5, 5, 4, 4
59 };
60 RK_U32 bit2percent[100] = {
61 99, 99, 99, 99, 99, 99, 99, 99, 99, 99,
62 99, 95, 90, 85, 80, 75, 72, 69, 66, 64,
63 62, 59, 58, 57, 56, 55, 54, 53, 52, 51,
64 50, 49, 48, 47, 47, 46, 46, 45, 45, 44,
65 44, 43, 43, 43, 42, 42, 42, 41, 41, 41,
66 40, 40, 40, 39, 39, 39, 38, 38, 38, 37,
67 37, 37, 37, 37, 37, 37, 36, 36, 36, 36,
68 36, 36, 36, 35, 35, 35, 34, 34, 34, 34,
69 34, 33, 33, 33, 33, 33, 33, 33, 33, 33,
70 32, 32, 32, 32, 32, 32, 32, 32, 32, 32,
71 };
72
73 RK_S8 intra_qp_map[8] = {
74 0, 0, 1, 1, 2, 2, 2, 2,
75 };
76
bits_model_param_deinit(RcModelV2Ctx * ctx)77 MPP_RET bits_model_param_deinit(RcModelV2Ctx *ctx)
78 {
79 rc_dbg_func("enter %p\n", ctx);
80
81 if (ctx->i_bit != NULL) {
82 mpp_data_deinit_v2(ctx->i_bit);
83 ctx->i_bit = NULL;
84 }
85
86 if (ctx->p_bit != NULL) {
87 mpp_data_deinit_v2(ctx->p_bit);
88 ctx->p_bit = NULL;
89 }
90
91 if (ctx->vi_bit != NULL) {
92 mpp_data_deinit_v2(ctx->vi_bit);
93 ctx->vi_bit = NULL;
94 }
95
96 if (ctx->pre_p_bit != NULL) {
97 mpp_data_deinit_v2(ctx->pre_p_bit);
98 ctx->pre_p_bit = NULL;
99 }
100
101 if (ctx->pre_i_bit != NULL) {
102 mpp_data_deinit_v2(ctx->pre_i_bit);
103 ctx->pre_i_bit = NULL;
104 }
105
106 if (ctx->pre_i_mean_qp != NULL) {
107 mpp_data_deinit_v2(ctx->pre_i_mean_qp);
108 ctx->pre_i_mean_qp = NULL;
109 }
110
111 if (ctx->madi != NULL) {
112 mpp_data_deinit_v2(ctx->madi);
113 ctx->madi = NULL;
114 }
115 if (ctx->madp != NULL) {
116 mpp_data_deinit_v2(ctx->madp);
117 ctx->madp = NULL;
118 }
119
120 if (ctx->stat_rate != NULL) {
121 mpp_data_deinit_v2(ctx->stat_rate);
122 ctx->stat_rate = NULL;
123 }
124
125 if (ctx->stat_bits != NULL) {
126 mpp_data_deinit_v2(ctx->stat_bits);
127 ctx->stat_bits = NULL;
128 }
129 if (ctx->gop_bits != NULL) {
130 mpp_data_deinit_v2(ctx->gop_bits);
131 ctx->gop_bits = NULL;
132 }
133 if (ctx->motion_level != NULL) {
134 mpp_data_deinit_v2(ctx->motion_level);
135 ctx->motion_level = NULL;
136 }
137 if (ctx->complex_level != NULL) {
138 mpp_data_deinit_v2(ctx->complex_level);
139 ctx->complex_level = NULL;
140 }
141 rc_dbg_func("leave %p\n", ctx);
142 return MPP_OK;
143 }
144
bits_model_param_init(RcModelV2Ctx * ctx)145 MPP_RET bits_model_param_init(RcModelV2Ctx *ctx)
146 {
147 RK_S32 gop_len = ctx->usr_cfg.igop;
148 RcFpsCfg *fps = &ctx->usr_cfg.fps;
149 RK_S32 mad_len = 10;
150 RK_U32 stat_len = fps->fps_out_num * ctx->usr_cfg.stats_time / fps->fps_out_denom;
151 stat_len = stat_len ? stat_len : 1;
152
153 bits_model_param_deinit(ctx);
154 mpp_data_init_v2(&ctx->i_bit, I_WINDOW_LEN, 0);
155 if (ctx->i_bit == NULL) {
156 mpp_err("i_bit init fail");
157 return MPP_ERR_MALLOC;
158 }
159
160 mpp_data_init_v2(&ctx->vi_bit, I_WINDOW_LEN, 0);
161 if (ctx->vi_bit == NULL) {
162 mpp_err("vi_bit init fail");
163 return MPP_ERR_MALLOC;
164 }
165 mpp_data_init_v2(&ctx->p_bit, P_WINDOW1_LEN, 0);
166 if (ctx->p_bit == NULL) {
167 mpp_err("p_bit init fail");
168 return MPP_ERR_MALLOC;
169 }
170
171 mpp_data_init_v2(&ctx->pre_p_bit, P_WINDOW2_LEN, 0);
172 if (ctx->pre_p_bit == NULL) {
173 mpp_err("pre_p_bit init fail");
174 return MPP_ERR_MALLOC;
175 }
176
177 mpp_data_init_v2(&ctx->pre_i_bit, I_WINDOW_LEN, 0);
178 if (ctx->pre_i_bit == NULL) {
179 mpp_err("pre_i_bit init fail");
180 return MPP_ERR_MALLOC;
181 }
182
183 mpp_data_init_v2(&ctx->pre_i_mean_qp, I_WINDOW_LEN, -1);
184 if (ctx->pre_i_mean_qp == NULL) {
185 mpp_err("pre_i_mean_qp init fail");
186 return MPP_ERR_MALLOC;
187 }
188 mpp_data_init_v2(&ctx->madi, P_WINDOW2_LEN, 0);
189 if (ctx->madi == NULL) {
190 mpp_err("madi init fail");
191 return MPP_ERR_MALLOC;
192 }
193 mpp_data_init_v2(&ctx->madp, P_WINDOW2_LEN, 0);
194 if (ctx->madp == NULL) {
195 mpp_err("madp init fail");
196 return MPP_ERR_MALLOC;
197 }
198 mpp_data_init_v2(&ctx->stat_rate, fps->fps_out_num, 0);
199 if (ctx->stat_rate == NULL) {
200 mpp_err("stat_rate init fail fps_out_num %d", fps->fps_out_num);
201 return MPP_ERR_MALLOC;
202 }
203
204 mpp_data_init_v2(&ctx->stat_bits, stat_len, ctx->bit_per_frame);
205 if (ctx->stat_bits == NULL) {
206 mpp_err("stat_bits init fail stat_len %d", stat_len);
207 return MPP_ERR_MALLOC;
208 }
209
210 mpp_data_init_v2(&ctx->gop_bits, gop_len, 0);
211 if (ctx->gop_bits == NULL) {
212 mpp_err("gop_bits init fail gop_len %d", gop_len);
213 return MPP_ERR_MALLOC;
214 }
215
216 if (ctx->usr_cfg.refresh_len) {
217 mpp_data_init_v2(&ctx->i_refresh_bit, ctx->usr_cfg.refresh_len, 0);
218 if (ctx->i_refresh_bit == NULL) {
219 mpp_err("i_refresh_bit init fail refresh_len %d", ctx->usr_cfg.refresh_len);
220 return MPP_ERR_MALLOC;
221 }
222 }
223
224 mpp_data_init_v2(&ctx->motion_level, mad_len, 0);
225 if (ctx->motion_level == NULL) {
226 mpp_err("motion_level init fail mad_len %d\n", mad_len);
227 return MPP_ERR_MALLOC;
228 }
229
230 mpp_data_init_v2(&ctx->complex_level, mad_len, 0);
231 if (ctx->complex_level == NULL) {
232 mpp_err("complex_level init fail mad_len %d\n", mad_len);
233 return MPP_ERR_MALLOC;
234 }
235
236 return MPP_OK;
237 }
238
bits_frm_init(RcModelV2Ctx * ctx)239 void bits_frm_init(RcModelV2Ctx *ctx)
240 {
241 RcCfg *usr_cfg = &ctx->usr_cfg;
242 RK_U32 gop_len = usr_cfg->igop;
243 RK_U32 p_bit = 0;
244 RK_U32 refresh_bit = 0;
245
246 rc_dbg_func("enter %p\n", ctx);
247
248 switch (usr_cfg->gop_mode) {
249 case NORMAL_P: {
250 ctx->i_scale = ctx->usr_cfg.init_ip_ratio;
251 ctx->p_scale = 16;
252 if (gop_len <= 1)
253 p_bit = ctx->gop_total_bits * 16;
254 else
255 p_bit = ctx->gop_total_bits * 16 / (ctx->i_scale + ctx->p_scale * (gop_len - 1));
256 mpp_data_reset_v2(ctx->p_bit, p_bit);
257 ctx->p_sumbits = 5 * p_bit;
258 mpp_data_reset_v2(ctx->i_bit, p_bit * ctx->i_scale / 16);
259 ctx->i_sumbits = 2 * p_bit * ctx->i_scale / 16;
260 if (usr_cfg->refresh_len) {
261 ctx->i_refresh_scale = ctx->i_scale / usr_cfg->refresh_len + ctx->p_scale;
262 refresh_bit = ctx->gop_total_bits * 16 / (ctx->i_refresh_scale * usr_cfg->refresh_len
263 + ctx->p_scale * (gop_len - usr_cfg->refresh_len));
264 mpp_data_reset_v2(ctx->i_refresh_bit, refresh_bit);
265 ctx->i_refresh_sumbits = usr_cfg->refresh_len * refresh_bit;
266 }
267 } break;
268 case SMART_P: {
269 RK_U32 vi_num = 0;
270 mpp_assert(usr_cfg->vgop > 1);
271 ctx->i_scale = 320;
272 ctx->p_scale = 16;
273 ctx->vi_scale = 32;
274 vi_num = gop_len / usr_cfg->vgop;
275 if (vi_num > 0) {
276 vi_num = vi_num - 1;
277 }
278 p_bit = ctx->gop_total_bits * 16 / (ctx->i_scale + ctx->vi_scale * vi_num + ctx->p_scale * (gop_len - vi_num));
279 mpp_data_reset_v2(ctx->p_bit, p_bit);
280 ctx->p_sumbits = 5 * p_bit;
281
282 mpp_data_reset_v2(ctx->i_bit, p_bit * ctx->i_scale / 16);
283 ctx->i_sumbits = 2 * p_bit * ctx->i_scale / 16;
284
285 mpp_data_reset_v2(ctx->vi_bit, p_bit * ctx->vi_scale / 16);
286 ctx->vi_sumbits = 2 * p_bit * ctx->vi_scale / 16;
287 } break;
288 default:
289 break;
290 }
291 rc_dbg_rc("p_sumbits %d i_sumbits %d vi_sumbits %d\n", ctx->p_sumbits, ctx->i_sumbits, ctx->vi_sumbits);
292 rc_dbg_func("leave %p\n", ctx);
293 }
294
moving_judge_update(RcModelV2Ctx * ctx,EncRcTaskInfo * cfg)295 RK_S32 moving_judge_update(RcModelV2Ctx *ctx, EncRcTaskInfo *cfg)
296 {
297 switch (cfg->frame_type) {
298 case INTRA_FRAME: {
299 mpp_data_update_v2(ctx->pre_i_bit, cfg->bit_real);
300 mpp_data_update_v2(ctx->pre_i_mean_qp, cfg->quality_real);
301 } break;
302
303 case INTER_P_FRAME: {
304 mpp_data_update_v2(ctx->pre_p_bit, cfg->bit_real);
305 mpp_data_update_v2(ctx->madp, cfg->madp);
306 } break;
307
308 default:
309 break;
310 }
311 return 0;
312 }
313
bit_statics_update(RcModelV2Ctx * ctx,RK_U32 real_bit)314 void bit_statics_update(RcModelV2Ctx *ctx, RK_U32 real_bit)
315 {
316 RK_S32 mean_pbits, mean_ibits;
317 RcCfg *usr_cfg = &ctx->usr_cfg;
318 RK_U32 gop_len = usr_cfg->igop;
319
320 mpp_data_update_v2(ctx->gop_bits, real_bit);
321 mean_pbits = mpp_data_mean_v2(ctx->pre_p_bit);
322 mean_ibits = mpp_data_mean_v2(ctx->pre_i_bit);
323 ctx->real_gbits = mpp_data_sum_v2(ctx->gop_bits);
324 ctx->avg_gbits = (gop_len - 1) * (RK_S64)mean_pbits + mean_ibits;
325 }
326
bits_model_preset(RcModelV2Ctx * ctx,EncRcTaskInfo * info)327 MPP_RET bits_model_preset(RcModelV2Ctx *ctx, EncRcTaskInfo *info)
328 {
329 RcCfg *usr_cfg = &ctx->usr_cfg;
330 RK_S32 preset_bit = info->bit_target;
331 RK_S32 water_level = 0;
332
333 mpp_data_preset_v2(ctx->stat_rate, preset_bit != 0);
334 mpp_data_preset_v2(ctx->stat_bits, preset_bit);
335
336 ctx->ins_bps = mpp_data_sum_v2(ctx->stat_bits) / usr_cfg->stats_time;
337 if (preset_bit + ctx->stat_watl > ctx->watl_thrd)
338 water_level = ctx->watl_thrd - ctx->bit_per_frame;
339 else
340 water_level = preset_bit + ctx->stat_watl - ctx->bit_per_frame;
341
342 if (water_level < 0) {
343 water_level = 0;
344 }
345 ctx->stat_watl = water_level;
346 switch (info->frame_type) {
347 case INTRA_FRAME : {
348 mpp_data_preset_v2(ctx->i_bit, preset_bit);
349 ctx->i_sumbits = mpp_data_sum_v2(ctx->i_bit);
350 ctx->i_scale = 80 * ctx->i_sumbits / (2 * ctx->p_sumbits);
351 rc_dbg_rc("i_sumbits %d p_sumbits %d i_scale %d\n",
352 ctx->i_sumbits, ctx->p_sumbits, ctx->i_scale);
353 } break;
354 case INTER_P_FRAME : {
355 mpp_data_preset_v2(ctx->p_bit, preset_bit);
356 ctx->p_sumbits = mpp_data_sum_v2(ctx->p_bit);
357
358 /* Avoid div zero when P frame successive drop */
359 if (!ctx->p_sumbits)
360 ctx->p_sumbits = 1;
361
362 ctx->p_scale = 16;
363 } break;
364 case INTER_VI_FRAME : {
365 mpp_data_preset_v2(ctx->vi_bit, preset_bit);
366 ctx->vi_sumbits = mpp_data_sum_v2(ctx->vi_bit);
367 ctx->vi_scale = 80 * ctx->vi_sumbits / (2 * ctx->p_sumbits);
368 /* NOTE: vi_scale may be set to zero. So we should limit the range */
369 ctx->vi_scale = mpp_clip(ctx->vi_scale, 16, 320);
370 } break;
371 case INTRA_RFH_FRAME: {
372 mpp_data_update_v2(ctx->i_refresh_bit, preset_bit);
373 mpp_data_update_v2(ctx->madi, info->madi);
374 ctx->i_refresh_sumbits = mpp_data_sum_v2(ctx->i_refresh_bit);
375 ctx->i_refresh_scale = 80 * ctx->i_refresh_sumbits / (usr_cfg->refresh_len * ctx->p_sumbits);
376 ctx->i_refresh_scale = mpp_clip(ctx->i_refresh_scale, 16, 64);
377 } break;
378 default : {
379 } break;
380 }
381 return MPP_OK;
382 }
383
bits_model_update(RcModelV2Ctx * ctx,EncRcTaskInfo * cfg)384 MPP_RET bits_model_update(RcModelV2Ctx *ctx, EncRcTaskInfo *cfg)
385 {
386 RcCfg *usr_cfg = &ctx->usr_cfg;
387 RK_S32 real_bit = cfg->bit_real;
388 RK_U32 madi = cfg->madi;
389 RK_S32 water_level = 0;
390
391 rc_dbg_func("enter %p\n", ctx);
392
393 mpp_data_update_v2(ctx->stat_rate, real_bit != 0);
394 mpp_data_update_v2(ctx->stat_bits, real_bit);
395
396 ctx->ins_bps = mpp_data_sum_v2(ctx->stat_bits) / usr_cfg->stats_time;
397 if (real_bit + ctx->stat_watl > ctx->watl_thrd)
398 water_level = ctx->watl_thrd - ctx->bit_per_frame;
399 else
400 water_level = real_bit + ctx->stat_watl - ctx->bit_per_frame;
401
402 if (water_level < 0)
403 water_level = 0;
404
405 ctx->stat_watl = water_level;
406
407 switch (cfg->frame_type) {
408 case INTRA_FRAME : {
409 mpp_data_update_v2(ctx->i_bit, real_bit);
410 ctx->i_sumbits = mpp_data_sum_v2(ctx->i_bit);
411 ctx->i_scale = 80 * ctx->i_sumbits / (2 * ctx->p_sumbits);
412 rc_dbg_rc("i_sumbits %d p_sumbits %d i_scale %d\n",
413 ctx->i_sumbits, ctx->p_sumbits, ctx->i_scale);
414 } break;
415 case INTER_P_FRAME : {
416 mpp_data_update_v2(ctx->p_bit, real_bit);
417 mpp_data_update_v2(ctx->madi, madi);
418 ctx->p_sumbits = mpp_data_sum_v2(ctx->p_bit);
419
420 /* Avoid div zero when P frame successive drop */
421 if (!ctx->p_sumbits)
422 ctx->p_sumbits = 1;
423
424 ctx->p_scale = 16;
425 } break;
426 case INTER_VI_FRAME: {
427 mpp_data_update_v2(ctx->vi_bit, real_bit);
428 ctx->vi_sumbits = mpp_data_sum_v2(ctx->vi_bit);
429 ctx->vi_scale = 80 * ctx->vi_sumbits / (2 * ctx->p_sumbits);
430 /* NOTE: vi_scale may be set to zero. So we should limit the range */
431 ctx->vi_scale = mpp_clip(ctx->vi_scale, 16, 320);
432 } break;
433 case INTRA_RFH_FRAME: {
434 mpp_data_update_v2(ctx->i_refresh_bit, real_bit);
435 mpp_data_update_v2(ctx->madi, madi);
436 ctx->i_refresh_sumbits = mpp_data_sum_v2(ctx->i_refresh_bit);
437 ctx->i_refresh_scale = 80 * ctx->i_refresh_sumbits / (usr_cfg->refresh_len * ctx->p_sumbits);
438 ctx->i_refresh_scale = mpp_clip(ctx->i_refresh_scale, 16, 64);
439 } break;
440 default : {
441 } break;
442 }
443
444 rc_dbg_func("leave %p\n", ctx);
445 return MPP_OK;
446 }
447
bits_model_alloc(RcModelV2Ctx * ctx,EncRcTaskInfo * cfg,RK_S64 total_bits)448 MPP_RET bits_model_alloc(RcModelV2Ctx *ctx, EncRcTaskInfo *cfg, RK_S64 total_bits)
449 {
450 RcCfg *usr_cfg = &ctx->usr_cfg;
451 RK_U32 max_i_prop = usr_cfg->max_i_bit_prop * 16;
452 RK_S32 gop_len = usr_cfg->igop;
453 RK_S32 i_scale = ctx->i_scale;
454 RK_S32 vi_scale = ctx->vi_scale;
455 RK_S32 alloc_bits = 0;
456 RK_S32 super_bit_thr = 0x7fffffff;
457 RK_S64 total_bits_fix = total_bits;
458
459 ctx->i_scale = 80 * ctx->i_sumbits / (2 * ctx->p_sumbits);
460 i_scale = ctx->i_scale;
461
462 rc_dbg_func("enter %p\n", ctx);
463 rc_dbg_rc("frame_type %d max_i_prop %d i_scale %d total_bits %lld\n",
464 cfg->frame_type, max_i_prop, i_scale, total_bits);
465 if (usr_cfg->super_cfg.super_mode) {
466 super_bit_thr = usr_cfg->super_cfg.super_p_thd;
467 }
468 if (usr_cfg->gop_mode == SMART_P) {
469 RK_U32 vi_num = 0;
470 mpp_assert(usr_cfg->vgop > 1);
471 vi_num = gop_len / usr_cfg->vgop;
472 if (vi_num > 0) {
473 vi_num = vi_num - 1;
474 }
475 switch (cfg->frame_type) {
476 case INTRA_FRAME: {
477 i_scale = mpp_clip(i_scale, 16, 16000);
478 total_bits = total_bits * i_scale;
479 if (usr_cfg->super_cfg.super_mode) {
480 super_bit_thr = usr_cfg->super_cfg.super_i_thd;
481 }
482 } break;
483 case INTER_P_FRAME: {
484 i_scale = mpp_clip(i_scale, 16, max_i_prop);
485 total_bits = total_bits * 16;
486 } break;
487 case INTER_VI_FRAME: {
488 i_scale = mpp_clip(i_scale, 16, max_i_prop);
489 total_bits = total_bits * vi_scale;
490 } break;
491 default:
492 break;
493 }
494
495 alloc_bits = total_bits / (i_scale + 16 * (gop_len - vi_num) + vi_num * vi_scale);
496
497 if (!alloc_bits) {
498 mpp_log_f("found zero alloc bits\n");
499 mpp_log_f("total_bits %lld, i_scale %d, gop_len %d, vi_num %d, vi_scale %d",
500 total_bits, i_scale, gop_len, vi_num, vi_scale);
501 mpp_log_f("gop_total_bits %lld, i_sumbits %d, p_sumbits %d, vgop %d igop %d",
502 ctx->gop_total_bits, ctx->i_sumbits, ctx->p_sumbits, usr_cfg->vgop, usr_cfg->igop);
503 }
504 } else {
505 switch (cfg->frame_type) {
506 case INTRA_FRAME: {
507 i_scale = mpp_clip(i_scale, 16, 16000);
508 total_bits = total_bits * i_scale;
509 if (usr_cfg->super_cfg.super_mode) {
510 super_bit_thr = usr_cfg->super_cfg.super_i_thd;
511 }
512 } break;
513
514 case INTER_P_FRAME: {
515 i_scale = mpp_clip(i_scale, 16, max_i_prop);
516 total_bits = total_bits * 16;
517 } break;
518 case INTRA_RFH_FRAME: {
519 i_scale = mpp_clip(i_scale, 16, max_i_prop);
520 total_bits = total_bits * ctx->i_refresh_scale;
521 rc_dbg_rc("ctx->i_refresh_scale = %d", ctx->i_refresh_scale);
522 } break;
523 default:
524 break;
525 }
526 if (gop_len > 1) {
527 if (!usr_cfg->refresh_len || cfg->frame_type == INTRA_FRAME)
528 alloc_bits = total_bits / (i_scale + 16 * (gop_len - 1));
529 else
530 alloc_bits = total_bits /
531 (ctx->i_refresh_scale * usr_cfg->refresh_len +
532 16 * (gop_len - usr_cfg->refresh_len));
533 } else {
534 alloc_bits = total_bits / i_scale;
535 }
536 }
537 rc_dbg_rc("i_scale %d, total_bits %lld", i_scale, total_bits);
538 if (alloc_bits > super_bit_thr &&
539 (usr_cfg->super_cfg.rc_priority == MPP_ENC_RC_BY_FRM_SIZE_FIRST)) {
540 alloc_bits = super_bit_thr - (super_bit_thr >> 4);
541 rc_dbg_rc("alloc bits max then super_bit_thr %d", super_bit_thr);
542 }
543
544 ctx->cur_super_thd = super_bit_thr;
545 cfg->bit_target = alloc_bits;
546 if (cfg->frame_type == INTRA_FRAME)
547 cfg->bit_target_fix = total_bits_fix * 240 / (240 + 16 * (gop_len - 1));
548 else
549 cfg->bit_target_fix = total_bits_fix * 16 / (240 + 16 * (gop_len - 1));
550
551 mpp_assert(alloc_bits);
552
553 rc_dbg_func("leave %p\n", ctx);
554 return MPP_OK;
555 }
556
calc_next_i_ratio(RcModelV2Ctx * ctx)557 MPP_RET calc_next_i_ratio(RcModelV2Ctx *ctx)
558 {
559 RcCfg *usr_cfg = &ctx->usr_cfg;
560 RK_S32 max_i_prop = usr_cfg->max_i_bit_prop * 16;
561 RK_S32 gop_len = usr_cfg->igop;
562 RK_S32 pre_qp = ctx->pre_i_qp;
563 RK_S32 bits_alloc;
564
565 rc_dbg_func("enter %p\n", ctx);
566 if (gop_len > 1) {
567 bits_alloc = ctx->gop_total_bits * max_i_prop / (max_i_prop + 16 * (gop_len - 1));
568 } else {
569 bits_alloc = ctx->gop_total_bits * max_i_prop / max_i_prop;
570 }
571
572 if (ctx->pre_real_bits > bits_alloc || ctx->next_i_ratio) {
573 RK_S32 ratio = ((ctx->pre_real_bits - bits_alloc) << 8) / bits_alloc;
574
575 ratio = mpp_clip(ratio, -256, 256);
576 ratio = ctx->next_i_ratio + ratio;
577 if (ratio >= 0) {
578 if (ratio > max_i_delta_qp[pre_qp])
579 ratio = max_i_delta_qp[pre_qp];
580 } else {
581 ratio = 0;
582 }
583 ctx->next_i_ratio = ratio;
584 rc_dbg_rc("ctx->next_i_ratio %d", ctx->next_i_ratio);
585 }
586
587 rc_dbg_func("leave %p\n", ctx);
588 return MPP_OK;
589
590 }
591
calc_debreath_qp(RcModelV2Ctx * ctx)592 MPP_RET calc_debreath_qp(RcModelV2Ctx *ctx)
593 {
594 rc_dbg_func("enter %p\n", ctx);
595 RcDebreathCfg *debreath_cfg = &ctx->usr_cfg.debreath_cfg;
596 RK_S32 qp_start_sum = 0;
597 RK_S32 new_start_qp = 0;
598 RK_U8 idx2 = MPP_MIN(ctx->pre_iblk4_prop >> 5, (RK_S32)sizeof(intra_qp_map) - 1);
599
600 static RK_S8 strength_map[36] = {
601 0, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 4,
602 5, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8,
603 9, 9, 9, 10, 10, 10, 11, 11, 11, 12, 12, 12
604 };
605
606 qp_start_sum = MPP_MIN(ctx->gop_qp_sum / ctx->gop_frm_cnt, (RK_S32)sizeof(strength_map) - 1);
607
608 rc_dbg_qp("i start_qp %d, qp_start_sum = %d, intra_lv4_prop %d",
609 ctx->start_qp, qp_start_sum, ctx->pre_iblk4_prop);
610
611 RK_S32 dealt_qp = strength_map[debreath_cfg->strength] - intra_qp_map[idx2];
612 if (qp_start_sum > dealt_qp)
613 new_start_qp = qp_start_sum - dealt_qp;
614 else
615 new_start_qp = qp_start_sum;
616
617 ctx->start_qp = mpp_clip(new_start_qp, ctx->usr_cfg.min_i_quality, ctx->usr_cfg.max_i_quality);
618
619 rc_dbg_func("leave %p\n", ctx);
620 return MPP_OK;
621 }
622
calc_cbr_ratio(void * ctx,EncRcTaskInfo * cfg)623 MPP_RET calc_cbr_ratio(void *ctx, EncRcTaskInfo *cfg)
624 {
625 RcModelV2Ctx *p = (RcModelV2Ctx *)ctx;
626 RK_S32 target_bps = p->target_bps;
627 RK_S32 ins_bps = p->ins_bps;
628 RK_S32 pre_target_bits = p->pre_target_bits;
629 RK_S32 pre_real_bits = p->pre_real_bits;
630 RK_S32 pre_ins_bps = p->last_inst_bps;
631 RK_S32 idx1, idx2;
632 RK_S32 bit_diff_ratio, ins_ratio, bps_ratio, wl_ratio;
633 RK_S32 fluc_l = 3;
634
635 rc_dbg_func("enter %p\n", p);
636
637 rc_dbg_bps("%10s|%10s|%10s|%10s|%10s|%8s", "r_bits", "t_bits", "ins_bps", "p_ins_bps", "target_bps", "watl");
638 rc_dbg_bps("%10d %10d %10d %10d %10d %8d", pre_real_bits, pre_target_bits, ins_bps, pre_ins_bps, target_bps, p->stat_watl >> 10);
639
640 bits_model_alloc(p, cfg, p->gop_total_bits);
641
642 mpp_assert(target_bps > 0);
643
644 p->pre_real_bits_count = p->pre_real_bits_count + pre_real_bits;
645 p->pre_target_bits_fix_count = p->pre_target_bits_fix_count + p->pre_target_bits_fix;
646 if (p->pre_real_bits_count > MAX_BIT_COUNT_VALUE || p->pre_target_bits_fix_count > MAX_BIT_COUNT_VALUE) {
647 p->pre_real_bits_count = 0;
648 p->pre_target_bits_fix_count = 0;
649 }
650
651 if (pre_target_bits > pre_real_bits)
652 bit_diff_ratio = 52 * (pre_real_bits - pre_target_bits) / pre_target_bits;
653 else
654 bit_diff_ratio = 64 * (pre_real_bits - pre_target_bits) / pre_target_bits;
655
656 idx1 = (ins_bps << 5) / target_bps;
657 idx2 = (pre_ins_bps << 5) / target_bps;
658
659 idx1 = mpp_clip(idx1, 0, 63);
660 idx2 = mpp_clip(idx2, 0, 63);
661 ins_ratio = tab_lnx[idx1] - tab_lnx[idx2]; // %3
662
663 /*ins_bps is increase and pre_ins > target_bps*15/16 will raise up ins_ratio to decrease bit
664 *ins_bps is decresase and pre_ins < target_bps*17/16 will decrease ins_ratio to increase bit
665 */
666
667 if (ins_bps > pre_ins_bps && target_bps - pre_ins_bps < (target_bps >> 4)) { // %6
668 ins_ratio = 6 * ins_ratio;
669 } else if ( ins_bps < pre_ins_bps && pre_ins_bps - target_bps < (target_bps >> 4)) {
670 ins_ratio = 4 * ins_ratio;
671 } else {
672 ins_ratio = 0;
673 }
674
675 bit_diff_ratio = mpp_clip(bit_diff_ratio, -128, 256);
676
677 ins_ratio = mpp_clip(ins_ratio, -128, 256);
678
679 bps_ratio = (ins_bps - target_bps) * fluc_l / (target_bps >> 4);
680 wl_ratio = 4 * (p->stat_watl - p->watl_base) * fluc_l / p->watl_base;
681 bps_ratio = mpp_clip(bps_ratio, -32, 32);
682 wl_ratio = mpp_clip(wl_ratio, -16, 32);
683 p->next_ratio = bit_diff_ratio + ins_ratio + bps_ratio + wl_ratio;
684
685 rc_dbg_qp("%10s|%10s|%10s|%10s|%10s|%10s", "diff_ratio", "ins_ratio", "bps_ratio",
686 "wl_ratio", "next_ratio", "cur_qp_s");
687 rc_dbg_qp("%10d %10d %10d %10d %10d|%10d", bit_diff_ratio, ins_ratio - bit_diff_ratio,
688 bps_ratio, wl_ratio, p->next_ratio, p->cur_scale_qp);
689
690 rc_dbg_func("leave %p\n", p);
691 return MPP_OK;
692 }
693
reenc_calc_super_frm_ratio(void * ctx,EncRcTaskInfo * cfg)694 MPP_RET reenc_calc_super_frm_ratio(void *ctx, EncRcTaskInfo *cfg)
695 {
696 RcModelV2Ctx *p = (RcModelV2Ctx *)ctx;
697
698 rc_dbg_func("enter %p\n", p);
699 p->next_ratio = 160 * (4 * (cfg->bit_real - p->cur_super_thd) / cfg->bit_target);
700 p->next_ratio = mpp_clip(p->next_ratio, 128, 640);
701 rc_dbg_func("leave %p\n", p);
702 return MPP_OK;
703 }
704
reenc_calc_cbr_ratio(void * ctx,EncRcTaskInfo * cfg)705 MPP_RET reenc_calc_cbr_ratio(void *ctx, EncRcTaskInfo *cfg)
706 {
707 RcModelV2Ctx *p = (RcModelV2Ctx *)ctx;
708 RcCfg *usr_cfg = &p->usr_cfg;
709 RK_S32 stat_time = usr_cfg->stats_time;
710 RK_S32 pre_ins_bps = mpp_data_sum_v2(p->stat_bits) / stat_time;
711 RK_S32 ins_bps = (pre_ins_bps * stat_time - mpp_data_get_pre_val_v2(p->stat_bits, -1) + cfg->bit_real) / stat_time;
712 RK_S32 real_bit = cfg->bit_real;
713 RK_S32 target_bit = cfg->bit_target;
714 RK_S32 target_bps = p->target_bps;
715 RK_S32 water_level = 0;
716 RK_S32 idx1, idx2;
717 RK_S32 bit_diff_ratio, ins_ratio, bps_ratio, wl_ratio;
718 RK_S32 mb_w = MPP_ALIGN(usr_cfg->width, 16) / 16;
719 RK_S32 mb_h = MPP_ALIGN(usr_cfg->height, 16) / 16;
720
721 rc_dbg_func("enter %p\n", p);
722
723 if (p->cur_super_thd <= cfg->bit_real &&
724 usr_cfg->super_cfg.rc_priority == MPP_ENC_RC_BY_FRM_SIZE_FIRST) {
725 return reenc_calc_super_frm_ratio(ctx, cfg);
726 }
727
728 if (real_bit + p->stat_watl > p->watl_thrd)
729 water_level = p->watl_thrd - p->bit_per_frame;
730 else
731 water_level = real_bit + p->stat_watl - p->bit_per_frame;
732
733 if (water_level < 0) {
734 water_level = 0;
735 }
736
737 if (target_bit > real_bit)
738 bit_diff_ratio = 32 * (real_bit - target_bit) / real_bit;
739 else
740 bit_diff_ratio = 32 * (real_bit - target_bit) / target_bit;
741
742 idx1 = ins_bps / (target_bps >> 5);
743 idx2 = pre_ins_bps / (target_bps >> 5);
744
745 idx1 = mpp_clip(idx1, 0, 63);
746 idx2 = mpp_clip(idx2, 0, 63);
747 ins_ratio = tab_lnx[idx1] - tab_lnx[idx2];
748
749 bps_ratio = 96 * (ins_bps - target_bps) / target_bps;
750 wl_ratio = 32 * (water_level - p->watl_base) / p->watl_base;
751 if (pre_ins_bps < ins_bps && target_bps != pre_ins_bps) {
752 ins_ratio = 6 * ins_ratio;
753 ins_ratio = mpp_clip(ins_ratio, -192, 256);
754 } else {
755 if (cfg->frame_type == INTRA_FRAME) {
756 ins_ratio = 3 * ins_ratio;
757 ins_ratio = mpp_clip(ins_ratio, -192, 256);
758 } else {
759 ins_ratio = 0;
760 }
761 }
762
763 bit_diff_ratio = mpp_clip(bit_diff_ratio, -128, 256);
764 bps_ratio = mpp_clip(bps_ratio, -32, 32);
765 wl_ratio = mpp_clip(wl_ratio, -32, 32);
766 p->next_ratio = bit_diff_ratio + ins_ratio + bps_ratio + wl_ratio;
767 if (cfg->frame_type == INTRA_FRAME && (cfg->madi > 0)) {
768 RK_U32 tar_bpp = target_bit / (mb_w * mb_h);
769 float lnb_t = log(tar_bpp);
770 float c = 6.7204, a = -0.1435, b = 0.0438;
771 float start_qp = (p->cur_scale_qp >> 6);
772 int qp_c = ((lnb_t - cfg->madi * b - c) / a + 14);
773 if (qp_c > start_qp)
774 p->next_ratio = (qp_c << 6) - p->cur_scale_qp;
775 }
776 rc_dbg_rc("cbr target_bit %d real_bit %d reenc next ratio %d", target_bit, real_bit, p->next_ratio);
777 rc_dbg_func("leave %p\n", p);
778 return MPP_OK;
779 }
780
rc_hier_calc_dealt_qp(RcModelV2Ctx * p,EncRcTaskInfo * info)781 void rc_hier_calc_dealt_qp(RcModelV2Ctx *p, EncRcTaskInfo *info)
782 {
783 RcHierQPCfg *hier_qp_cfg = &p->usr_cfg.hier_qp_cfg;
784
785 if (!hier_qp_cfg->hier_qp_en)
786 return;
787
788 if (info->frame_type == INTRA_FRAME || info->frame_type == INTER_VI_FRAME) {
789 p->hier_frm_cnt[3] = 0;
790 p->hier_frm_cnt[2] = 0;
791 p->hier_frm_cnt[1] = 0;
792 p->hier_frm_cnt[0] = 0;
793 p->qp_layer_id = 0;
794 } else {
795 if (p->hier_frm_cnt[3] < hier_qp_cfg->hier_frame_num[3]) {
796 p->hier_frm_cnt[3]++;
797 p->qp_layer_id = 4;
798 } else if (p->hier_frm_cnt[2] < hier_qp_cfg->hier_frame_num[2]) {
799 p->hier_frm_cnt[2]++;
800 p->hier_frm_cnt[3] = 0;
801 p->qp_layer_id = 3;
802 } else if (p->hier_frm_cnt[1] < hier_qp_cfg->hier_frame_num[1]) {
803 p->hier_frm_cnt[1]++;
804 p->hier_frm_cnt[3] = 0;
805 p->hier_frm_cnt[2] = 0;
806 p->qp_layer_id = 2;
807 } else if (p->hier_frm_cnt[0] < hier_qp_cfg->hier_frame_num[0]) {
808 p->hier_frm_cnt[0]++;
809 p->hier_frm_cnt[3] = 0;
810 p->hier_frm_cnt[2] = 0;
811 p->hier_frm_cnt[1] = 0;
812 p->qp_layer_id = 1;
813 } else {
814 p->hier_frm_cnt[3] = 0;
815 p->hier_frm_cnt[2] = 0;
816 p->hier_frm_cnt[1] = 0;
817 p->hier_frm_cnt[0] = 0;
818 p->qp_layer_id = 0;
819 }
820 }
821
822 return;
823 }
824
calc_vbr_ratio(void * ctx,EncRcTaskInfo * cfg)825 MPP_RET calc_vbr_ratio(void *ctx, EncRcTaskInfo *cfg)
826 {
827 RcModelV2Ctx *p = (RcModelV2Ctx *)ctx;
828 RcCfg *usr_cfg = &p->usr_cfg;
829 RK_S32 bps_change = p->target_bps;
830 RK_S32 max_bps_target = usr_cfg->bps_max;
831 RK_S32 ins_bps = p->ins_bps;
832 RK_S32 pre_target_bits = p->pre_target_bits;
833 RK_S32 pre_real_bits = p->pre_real_bits;
834 RK_S32 pre_ins_bps = p->last_inst_bps;
835
836 RK_S32 idx1, idx2;
837 RK_S32 bit_diff_ratio, ins_ratio, bps_ratio;
838
839 rc_dbg_func("enter %p\n", p);
840
841 bits_model_alloc(p, cfg, p->gop_total_bits);
842 if (pre_target_bits > pre_real_bits)
843 bit_diff_ratio = 32 * (pre_real_bits - pre_target_bits) / pre_target_bits;
844 else
845 bit_diff_ratio = 64 * (pre_real_bits - pre_target_bits) / pre_target_bits;
846
847 idx1 = ins_bps / (max_bps_target >> 5);
848 idx2 = pre_ins_bps / (max_bps_target >> 5);
849
850 idx1 = mpp_clip(idx1, 0, 63);
851 idx2 = mpp_clip(idx2, 0, 63);
852 ins_ratio = tab_lnx[idx1] - tab_lnx[idx2];
853
854 rc_dbg_bps("%10s|%10s|%10s|%10s|%10s|%10s", "r_bits", "t_bits", "ins_bps", "p_ins_bps",
855 "bps_ch", "max_bps");
856 rc_dbg_bps("%10d %10d %10d %10d %10d %10d", pre_real_bits, pre_target_bits, ins_bps,
857 pre_ins_bps, bps_change, max_bps_target);
858
859
860 if (ins_bps > bps_change && ins_bps > pre_ins_bps) {
861 ins_ratio = 6 * ins_ratio;
862 } else if (ins_bps <= pre_ins_bps && bps_change > pre_ins_bps) {
863 ins_ratio = 3 * ins_ratio;
864 } else {
865 ins_ratio = 0;
866 }
867
868 bit_diff_ratio = mpp_clip(bit_diff_ratio, -128, 256);
869 ins_ratio = mpp_clip(ins_ratio, -128, 256);
870 bps_ratio = 3 * (ins_bps - bps_change) / (max_bps_target >> 4);
871 bps_ratio = mpp_clip(bps_ratio, -16, 32);
872 if (p->i_scale > 640) {
873 bit_diff_ratio = mpp_clip(bit_diff_ratio, -16, 32);
874 ins_ratio = mpp_clip(ins_ratio, -16, 32);
875 }
876
877 p->next_ratio = bit_diff_ratio + ins_ratio + bps_ratio;
878
879 rc_dbg_qp("%10s|%10s|%10s|%10s|%10s", "diff_ratio", "ins_ratio", "bps_ratio", "next_ratio", "cur_qp_s");
880 rc_dbg_qp("%10d %10d %10d %10d|%10d", bit_diff_ratio, ins_ratio, bps_ratio, p->next_ratio, p->cur_scale_qp);
881 rc_dbg_func("leave %p\n", p);
882 return MPP_OK;
883 }
884
reenc_calc_vbr_ratio(void * ctx,EncRcTaskInfo * cfg)885 MPP_RET reenc_calc_vbr_ratio(void *ctx, EncRcTaskInfo *cfg)
886 {
887
888 RcModelV2Ctx *p = (RcModelV2Ctx *)ctx;
889 RcCfg *usr_cfg = &p->usr_cfg;
890 RK_S32 stat_time = usr_cfg->stats_time;
891 RK_S32 pre_ins_bps = mpp_data_sum_v2(p->stat_bits) / stat_time;
892 RK_S32 ins_bps = (pre_ins_bps * stat_time - mpp_data_get_pre_val_v2(p->stat_bits, -1) + cfg->bit_real) / stat_time;
893 RK_S32 bps_change = p->target_bps;
894 RK_S32 max_bps_target = usr_cfg->bps_max;
895
896 RK_S32 real_bit = cfg->bit_real;
897 RK_S32 target_bit = cfg->bit_target;
898 RK_S32 idx1, idx2;
899 RK_S32 bit_diff_ratio, ins_ratio, bps_ratio;
900
901 rc_dbg_func("enter %p\n", p);
902
903 if (p->cur_super_thd <= cfg->bit_real &&
904 usr_cfg->super_cfg.rc_priority == MPP_ENC_RC_BY_FRM_SIZE_FIRST) {
905 return reenc_calc_super_frm_ratio(ctx, cfg);
906 }
907
908 if (target_bit <= real_bit)
909 bit_diff_ratio = 32 * (real_bit - target_bit) / target_bit;
910 else
911 bit_diff_ratio = 32 * (real_bit - target_bit) / real_bit;
912
913 idx1 = ins_bps / (max_bps_target >> 5);
914 idx2 = pre_ins_bps / (max_bps_target >> 5);
915 idx1 = mpp_clip(idx1, 0, 63);
916 idx2 = mpp_clip(idx2, 0, 63);
917 if (pre_ins_bps < ins_bps && bps_change < ins_bps) {
918 ins_ratio = 6 * (tab_lnx[idx1] - tab_lnx[idx2]);
919 ins_ratio = mpp_clip(ins_ratio, -192, 256);
920 } else {
921 ins_ratio = 0;
922 }
923
924 bps_ratio = 96 * (ins_bps - bps_change) / bps_change;
925 bit_diff_ratio = mpp_clip(bit_diff_ratio, -128, 256);
926 bps_ratio = mpp_clip(bps_ratio, -32, 32);
927
928 p->next_ratio = bit_diff_ratio + ins_ratio + bps_ratio;
929 rc_dbg_rc("vbr reenc next ratio %d", p->next_ratio);
930 rc_dbg_func("leave %p\n", p);
931 return MPP_OK;
932 }
933
moving_ratio_calc(RcModelV2Ctx * ctx)934 RK_S32 moving_ratio_calc(RcModelV2Ctx *ctx)
935 {
936 RK_S32 motion_sensitivity = ctx->motion_sensitivity;
937 RK_S32 scale = 0, i;
938 RK_S32 total_bit = 0, pbit_sum = 0;
939 RK_S32 madi_sum = 0, madp_sum = 0;
940 RK_S32 percent = 0;
941
942 for (i = 0; i < 2; i++) {
943 RK_S32 pre_I_bit = mpp_data_get_pre_val_v2(ctx->pre_i_bit, i);
944 RK_S32 pre_mean_qp = mpp_data_get_pre_val_v2(ctx->pre_i_mean_qp, i);
945 if (pre_mean_qp == -1) {
946 scale = 32;
947 } else {
948 RK_S32 index = pre_mean_qp + 8 - ctx->pre_mean_qp;
949 if (index >= 0) {
950 index = mpp_clip(index, 0 , 15);
951 scale = mean_qp2scale[index];
952 } else {
953 scale = 14;
954 }
955 }
956 total_bit += (scale * pre_I_bit >> 5);
957 rc_dbg_rc("pre_mean_qp = %d, ctx->pre_mean_qp %d", pre_mean_qp, ctx->pre_mean_qp);
958 rc_dbg_rc("scale = %d, pre_I_bit %d", scale, pre_I_bit);
959 }
960
961 pbit_sum = mpp_data_sum_v2(ctx->pre_p_bit);
962 madi_sum = mpp_data_sum_v2(ctx->madi);
963 madp_sum = mpp_data_sum_v2(ctx->madp);
964 rc_dbg_rc("pbit_sum %d,madi_sum = %d, madp_sum = %d", pbit_sum, madi_sum, madp_sum);
965 if ( pbit_sum == 0 || total_bit == 0) {
966 percent = 255;
967 } else {
968 RK_S32 index = (total_bit << 6) / pbit_sum;
969 index = mpp_clip(index >> 4, 1, 99);
970 percent = (bit2percent[index] << 8) / 100;
971 }
972 rc_dbg_rc("means qp percent %d min_still_percent %d", percent, ctx->min_still_percent);
973 RK_S32 percent_a = (ctx->min_still_percent - 30) << 8;
974 RK_S32 percent_b = 100 - ctx->min_still_percent;
975
976 percent = (percent_a + percent * percent_b) / 70;
977 rc_dbg_rc("percent_a = %d percent_b %d", percent_a, percent_b);
978 RK_S32 mv_percnt = (ctx->prev_md_prop * 100) >> 8;
979 RK_S32 mv_ratio = (percent_a + 7680 + mv_percnt * percent_b) / 100;
980 rc_dbg_rc("mv_ratio = %d", mv_ratio);
981 RK_S32 mad_ratio = 256;
982 if (madi_sum) {
983 mad_ratio = 20 * madp_sum / madi_sum;
984 mad_ratio = mpp_clip(mad_ratio, 5, 100);
985 rc_dbg_rc("mad_ratio = %d", mad_ratio);
986 mad_ratio = (mad_ratio << 8) / 100;
987 }
988 mad_ratio = (percent_a + 7680 + percent_b * mad_ratio) / 100;
989
990 RK_S32 moving_ratio = (percent + 1 + (mv_ratio * motion_sensitivity + (100 - motion_sensitivity) * mad_ratio) / 100) >> 1;
991 rc_dbg_rc("moving_ratio = %d, motion_sensitivity = %d", moving_ratio, motion_sensitivity);
992 rc_dbg_rc("percent %d mad_ratio %d hr_ratio %d, moving_ratio %d", percent, mad_ratio, mv_ratio, moving_ratio);
993 return moving_ratio;
994 }
995
calc_avbr_ratio(void * ctx,EncRcTaskInfo * cfg)996 MPP_RET calc_avbr_ratio(void *ctx, EncRcTaskInfo *cfg)
997 {
998 RcModelV2Ctx *p = (RcModelV2Ctx *)ctx;
999 RcCfg *usr_cfg = &p->usr_cfg;
1000 RK_S32 bps_change = p->target_bps;
1001 RK_S32 max_bps_target = usr_cfg->bps_max;
1002 RK_S32 ins_bps = p->ins_bps;
1003 RK_S32 pre_target_bits = p->pre_target_bits;
1004 RK_S32 pre_real_bits = p->pre_real_bits;
1005 RK_S32 pre_ins_bps = p->last_inst_bps;
1006 RK_S32 idx1, idx2;
1007 RK_S32 bit_diff_ratio, ins_ratio, agop_dratio, rgop_dratio;
1008 RK_S32 moving_ratio = 0, moving_percent;
1009 RK_S32 gop_bits = 0, gop_kbits = 0;
1010 RK_S32 i_ratio, max_bps;
1011 RK_S32 qratio, final_qratio;
1012
1013 rc_dbg_func("enter %p\n", p);
1014
1015 moving_ratio = moving_ratio_calc(p);
1016 if (p->moving_ratio - 2 >= moving_ratio)
1017 moving_ratio = p->moving_ratio - 2;
1018
1019 if (p->moving_ratio > moving_ratio && (p->max_still_qp << 6) <= p->scale_qp) {
1020 p->moving_ratio = mpp_clip(p->moving_ratio + 1, 1, 255);
1021 } else {
1022 p->moving_ratio = moving_ratio;
1023 }
1024 rc_dbg_rc("final moving_ratio = %d", moving_ratio);
1025
1026 if (moving_ratio <= 0)
1027 moving_ratio = 1;
1028
1029 gop_bits = moving_ratio * p->gop_total_bits >> 8;
1030 gop_kbits = gop_bits >> 10;
1031 if (gop_kbits < 1)
1032 gop_kbits = 1;
1033
1034 bits_model_alloc(p, cfg, gop_bits);
1035 bps_change = moving_ratio * bps_change >> 8;
1036 if (moving_ratio < 0) {
1037 moving_ratio += 255;
1038 }
1039 moving_percent = 100 * moving_ratio >> 8;
1040
1041 rc_dbg_bps("%10s|%10s|%10s|%10s|%10s", "m_ratio", "r_bits", "t_bits", "ins_bps", "p_ins_bps");
1042 rc_dbg_bps("%10d %10d %10d %10d %10d", p->moving_ratio, pre_real_bits, pre_target_bits, ins_bps, pre_ins_bps);
1043
1044 if (pre_target_bits > pre_real_bits)
1045 bit_diff_ratio = 32 * (pre_real_bits - pre_target_bits) / pre_target_bits;
1046 else
1047 bit_diff_ratio = 64 * (pre_real_bits - pre_target_bits) / pre_target_bits * moving_percent;
1048
1049 i_ratio = mpp_clip(p->pre_i_scale >> 4, 10, 200);
1050 idx1 = ins_bps / (max_bps_target >> 5);
1051 idx2 = pre_ins_bps / (max_bps_target >> 5);
1052 idx1 = mpp_clip(idx1, 0, 63);
1053 idx2 = mpp_clip(idx2, 0, 63);
1054 ins_ratio = tab_lnx[idx2] - tab_lnx[idx1];
1055 max_bps = bps_change;
1056
1057 if (max_bps < pre_ins_bps) {
1058 max_bps = pre_ins_bps;
1059 }
1060
1061 if (ins_bps > max_bps) {
1062 ins_ratio = 6 * ins_ratio;
1063 } else if (ins_bps < pre_ins_bps && bps_change > pre_ins_bps) {
1064 ins_ratio = 3 * ins_ratio;
1065 } else {
1066 ins_ratio = 0;
1067 }
1068
1069 ins_ratio = mpp_clip(ins_ratio >> 2, -128, 256);
1070 bit_diff_ratio = mpp_clip(10 * bit_diff_ratio / i_ratio, -128, 256);
1071 rgop_dratio = mpp_clip(24 * ((p->real_gbits - gop_bits) >> 10) / gop_kbits, -1, 1);
1072 agop_dratio = mpp_clip(48 * ((p->avg_gbits - gop_bits) >> 10) / gop_kbits , -1, 1);
1073 if (p->pre_i_scale > 640) {
1074 bit_diff_ratio = mpp_clip(bit_diff_ratio, -16, 32);
1075 ins_ratio = mpp_clip(ins_ratio, -16, 32);
1076 }
1077 qratio = 0;
1078 final_qratio = ins_ratio + bit_diff_ratio + agop_dratio + rgop_dratio;
1079 if (max_bps_target >= ins_bps) {
1080 if (final_qratio > 0) {
1081 if (p->scale_qp >= (p->max_still_qp << 6)) {
1082 final_qratio = ins_ratio + agop_dratio + rgop_dratio;
1083 qratio = -6;
1084 }
1085 }
1086 }
1087 p->next_ratio = qratio + final_qratio;
1088
1089 rc_dbg_qp("%10s|%10s|%10s|%10s|%10s|%10s|%10s", "diff_ratio", "ins_ratio", "rg_ratio",
1090 "ag_ratio", "qratio", "next_ratio", "cur_qp_s");
1091 rc_dbg_qp("%10d %10d %10d %10d %10d %10d %10d", bit_diff_ratio, ins_ratio, rgop_dratio,
1092 agop_dratio, qratio, p->next_ratio, p->cur_scale_qp);
1093 rc_dbg_func("leave %p\n", p);
1094 return MPP_OK;
1095 }
1096
bits_model_init(RcModelV2Ctx * ctx)1097 MPP_RET bits_model_init(RcModelV2Ctx *ctx)
1098 {
1099 RcCfg *usr_cfg = &ctx->usr_cfg;
1100 RK_S32 gop_len = ctx->usr_cfg.igop;
1101 RcFpsCfg *fps = &ctx->usr_cfg.fps;
1102 RK_S64 gop_bits = 0;
1103 RK_U32 target_bps = 0;
1104
1105 rc_dbg_func("enter %p\n", ctx);
1106
1107 usr_cfg->min_i_bit_prop = mpp_clip(usr_cfg->min_i_bit_prop, 10, 100);
1108 usr_cfg->max_i_bit_prop = mpp_clip(usr_cfg->max_i_bit_prop,
1109 usr_cfg->min_i_bit_prop, 100);
1110 usr_cfg->init_ip_ratio = mpp_clip(usr_cfg->init_ip_ratio, 160, 640);
1111
1112 rc_dbg_rc("min_i_bit_prop %d max_i_bit_prop %d, init_ip_ratio %d",
1113 usr_cfg->min_i_bit_prop, usr_cfg->max_i_bit_prop, usr_cfg->init_ip_ratio);
1114
1115 if (!gop_len) {
1116 rc_dbg_rc("infinte gop, set default for rc bit calc\n");
1117 usr_cfg->igop = gop_len = 500;
1118 } else if (gop_len == 1) {
1119 rc_dbg_rc("all intra gop \n");
1120 usr_cfg->init_ip_ratio = 16;
1121
1122 /* disable debreath on all intra case */
1123 if (usr_cfg->debreath_cfg.enable)
1124 usr_cfg->debreath_cfg.enable = 0;
1125
1126 usr_cfg->igop = gop_len = 500;
1127 } else {
1128 usr_cfg->igop = gop_len = mpp_clip(usr_cfg->igop, usr_cfg->igop, 500);
1129 }
1130 ctx->max_still_qp = 35;
1131 ctx->motion_sensitivity = 90;
1132
1133 ctx->first_frm_flg = 1;
1134 ctx->gop_frm_cnt = 0;
1135 ctx->gop_qp_sum = 0;
1136
1137 if (!usr_cfg->fps_chg_prop) {
1138 usr_cfg->fps_chg_prop = 25;
1139 }
1140
1141 target_bps = ctx->usr_cfg.bps_max;
1142 ctx->re_calc_ratio = reenc_calc_vbr_ratio;
1143 switch (ctx->usr_cfg.mode) {
1144 case RC_CBR: {
1145 ctx->calc_ratio = calc_cbr_ratio;
1146 ctx->re_calc_ratio = reenc_calc_cbr_ratio;
1147 target_bps = ctx->usr_cfg.bps_target;
1148 } break;
1149 case RC_VBR: {
1150 ctx->calc_ratio = calc_vbr_ratio;
1151 } break;
1152 case RC_FIXQP: {
1153 return MPP_OK;
1154 }
1155 case RC_AVBR: {
1156 ctx->calc_ratio = calc_avbr_ratio;
1157 if (usr_cfg->bps_min && usr_cfg->bps_max) {
1158 ctx->min_still_percent = (RK_S64)usr_cfg->bps_min * 100 / usr_cfg->bps_max;
1159 } else {
1160 ctx->min_still_percent = 25;
1161 }
1162 rc_dbg_rc("min_still_percent %d", ctx->min_still_percent);
1163 } break;
1164 case RC_SMT: {
1165 mpp_log("rc mode is smart");
1166 } break;
1167 case RC_SE: {
1168 mpp_log("rc mode is super-encode");
1169 } break;
1170 default:
1171 mpp_log("rc mode set error");
1172 break;
1173 }
1174
1175 ctx->target_bps = ctx->usr_cfg.bps_target;
1176
1177 if (gop_len >= 1)
1178 gop_bits = (RK_S64)gop_len * target_bps * fps->fps_out_denom;
1179 else
1180 gop_bits = (RK_S64)fps->fps_out_num * target_bps * fps->fps_out_denom;
1181
1182 ctx->gop_total_bits = gop_bits / fps->fps_out_num;
1183 ctx->bit_per_frame = target_bps * fps->fps_out_denom / fps->fps_out_num;
1184 ctx->watl_thrd = 3 * target_bps;
1185 ctx->stat_watl = ctx->watl_thrd >> 3;
1186 ctx->watl_base = ctx->stat_watl;
1187 ctx->last_fps = fps->fps_out_num / fps->fps_out_denom;
1188
1189 rc_dbg_rc("gop %d total bit %lld per_frame %d statistics time %d second\n",
1190 ctx->usr_cfg.igop, ctx->gop_total_bits, ctx->bit_per_frame,
1191 ctx->usr_cfg.stats_time);
1192
1193 if (bits_model_param_init(ctx)) {
1194 return MPP_NOK;
1195 }
1196 ctx->time_base = mpp_time();
1197 bits_frm_init(ctx);
1198 rc_dbg_func("leave %p\n", ctx);
1199 return MPP_OK;
1200 }
1201
update_mode_param(RcModelV2Ctx * ctx,RK_U32 fps)1202 static MPP_RET update_mode_param(RcModelV2Ctx *ctx, RK_U32 fps)
1203 {
1204 RcCfg *usr_cfg = &ctx->usr_cfg;
1205 RK_S32 gop_len = ctx->usr_cfg.igop;
1206 RK_S64 gop_bits = 0;
1207 RK_U32 target_bps;
1208 RK_U32 stat_len = fps * usr_cfg->stats_time;
1209
1210 target_bps = ctx->usr_cfg.bps_max;
1211 if (ctx->usr_cfg.mode == RC_CBR) {
1212 target_bps = ctx->usr_cfg.bps_target;
1213 }
1214
1215 if (gop_len >= 1)
1216 gop_bits = (RK_S64)gop_len * target_bps;
1217 else
1218 gop_bits = (RK_S64)target_bps;
1219
1220 ctx->gop_total_bits = gop_bits / fps;
1221
1222 ctx->bit_per_frame = target_bps / fps;
1223
1224 if (ctx->stat_bits != NULL) {
1225 mpp_data_deinit_v2(ctx->stat_bits);
1226 ctx->stat_bits = NULL;
1227 }
1228 mpp_data_init_v2(&ctx->stat_bits, stat_len , ctx->bit_per_frame);
1229 if (ctx->stat_bits == NULL) {
1230 mpp_err("stat_bits init fail stat_len %d", stat_len);
1231 return MPP_ERR_MALLOC;
1232 }
1233 return MPP_OK;
1234 }
1235
fps_chg_update_mode(RcModelV2Ctx * ctx)1236 static MPP_RET fps_chg_update_mode(RcModelV2Ctx *ctx)
1237 {
1238 ctx->time_end = mpp_time();
1239 ctx->frm_cnt++;
1240
1241 if (ctx->time_base && ctx->time_end &&
1242 ((ctx->time_end - ctx->time_base) >= (RK_S64)(250 * 1000))) {
1243
1244 RK_S32 time_diff = ((RK_S32)(ctx->time_end - ctx->time_base) / 1000);
1245 RK_U32 fps = ctx->frm_cnt * 1000 / time_diff;
1246
1247 if (ctx->last_fps > 0 && fps &&
1248 abs(ctx->last_fps - (RK_S32)fps) * 100 / ctx->last_fps > (RK_S32)ctx->usr_cfg.fps_chg_prop) {
1249 update_mode_param(ctx, fps);
1250 mpp_log("fps chg from %d -> %d", ctx->last_fps, fps);
1251 ctx->last_fps = fps;
1252 }
1253 ctx->time_base = ctx->time_end;
1254 ctx->frm_cnt = 0;
1255 }
1256
1257 return MPP_OK;
1258 }
1259
bits_mode_reset(RcModelV2Ctx * ctx)1260 MPP_RET bits_mode_reset(RcModelV2Ctx *ctx)
1261 {
1262 rc_dbg_func("enter %p\n", ctx);
1263 (void) ctx;
1264 rc_dbg_func("leave %p\n", ctx);
1265 return MPP_OK;
1266 }
1267
check_super_frame(RcModelV2Ctx * ctx,EncRcTaskInfo * cfg)1268 MPP_RET check_super_frame(RcModelV2Ctx *ctx, EncRcTaskInfo *cfg)
1269 {
1270 MPP_RET ret = MPP_OK;
1271 RK_S32 frame_type = cfg->frame_type;
1272 RK_U32 bits_thr = 0;
1273 RcCfg *usr_cfg = &ctx->usr_cfg;
1274
1275 rc_dbg_func("enter %p\n", ctx);
1276 if (usr_cfg->super_cfg.super_mode) {
1277 bits_thr = usr_cfg->super_cfg.super_p_thd;
1278 if (frame_type == INTRA_FRAME) {
1279 bits_thr = usr_cfg->super_cfg.super_i_thd;
1280 }
1281
1282 if ((RK_U32)cfg->bit_real >= bits_thr) {
1283 if (usr_cfg->super_cfg.super_mode == MPP_ENC_RC_SUPER_FRM_DROP) {
1284 rc_dbg_rc("super frame drop current frame");
1285 usr_cfg->drop_mode = MPP_ENC_RC_DROP_FRM_NORMAL;
1286 usr_cfg->drop_gap = 0;
1287 }
1288 ret = MPP_NOK;
1289 }
1290 }
1291 rc_dbg_func("leave %p\n", ctx);
1292 return ret;
1293 }
1294
check_re_enc(RcModelV2Ctx * ctx,EncRcTaskInfo * cfg)1295 MPP_RET check_re_enc(RcModelV2Ctx *ctx, EncRcTaskInfo *cfg)
1296 {
1297 RcCfg *usr_cfg = &ctx->usr_cfg;
1298 RK_S32 frame_type = cfg->frame_type;
1299 RK_S32 bit_thr = 0;
1300 RK_S32 stat_time = usr_cfg->stats_time;
1301 RK_S32 last_ins_bps = mpp_data_sum_v2(ctx->stat_bits) / stat_time;
1302 RK_S32 ins_bps = (last_ins_bps * stat_time - mpp_data_get_pre_val_v2(ctx->stat_bits, -1)
1303 + cfg->bit_real) / stat_time;
1304 RK_S32 target_bps;
1305 RK_S32 ret = MPP_OK;
1306
1307 rc_dbg_func("enter %p\n", ctx);
1308 rc_dbg_rc("reenc check target_bps %d last_ins_bps %d ins_bps %d",
1309 usr_cfg->bps_target, last_ins_bps, ins_bps);
1310
1311 if (ctx->reenc_cnt >= usr_cfg->max_reencode_times)
1312 return MPP_OK;
1313
1314 if (check_super_frame(ctx, cfg))
1315 return MPP_NOK;
1316
1317 if (usr_cfg->debreath_cfg.enable && !ctx->first_frm_flg)
1318 return MPP_OK;
1319
1320 rc_dbg_drop("drop mode %d frame_type %d\n", usr_cfg->drop_mode, frame_type);
1321 if (usr_cfg->drop_mode && frame_type == INTER_P_FRAME) {
1322 bit_thr = (RK_S32)(usr_cfg->bps_max * (100 + usr_cfg->drop_thd) / (float)100);
1323 rc_dbg_drop("drop mode %d check max_bps %d bit_thr %d ins_bps %d",
1324 usr_cfg->drop_mode, usr_cfg->bps_target, bit_thr, ins_bps);
1325 return (ins_bps > bit_thr) ? MPP_NOK : MPP_OK;
1326 }
1327
1328 switch (frame_type) {
1329 case INTRA_FRAME:
1330 bit_thr = 3 * cfg->bit_target / 2;
1331 break;
1332 case INTER_P_FRAME:
1333 bit_thr = 3 * cfg->bit_target;
1334 break;
1335 default:
1336 break;
1337 }
1338
1339 if (cfg->bit_real > bit_thr) {
1340 if (usr_cfg->mode == RC_CBR) {
1341 target_bps = usr_cfg->bps_target;
1342 if (target_bps / 20 < ins_bps - last_ins_bps &&
1343 (target_bps + target_bps / 10 < ins_bps
1344 || target_bps - target_bps / 10 > ins_bps)) {
1345 ret = MPP_NOK;
1346 }
1347 } else {
1348 target_bps = usr_cfg->bps_max;
1349 if ((target_bps - (target_bps >> 3) < ins_bps) &&
1350 (target_bps / 20 < ins_bps - last_ins_bps)) {
1351 ret = MPP_NOK;
1352 }
1353 }
1354 }
1355
1356 rc_dbg_func("leave %p ret %d\n", ctx, ret);
1357 return ret;
1358 }
1359
1360
rc_model_v2_init(void * ctx,RcCfg * cfg)1361 MPP_RET rc_model_v2_init(void *ctx, RcCfg *cfg)
1362 {
1363 RcModelV2Ctx *p = (RcModelV2Ctx*)ctx;
1364
1365 rc_dbg_func("enter %p\n", ctx);
1366
1367 memcpy(&p->usr_cfg, cfg, sizeof(RcCfg));
1368 rc_dbg_rc("init rc param: fqp %d:%d:%d:%d\n", cfg->fqp_min_i, cfg->fqp_max_i,
1369 cfg->fqp_min_p, cfg->fqp_max_p);
1370
1371 bits_model_init(p);
1372
1373 rc_dbg_func("leave %p\n", ctx);
1374 return MPP_OK;
1375 }
1376
rc_model_v2_deinit(void * ctx)1377 MPP_RET rc_model_v2_deinit(void *ctx)
1378 {
1379 RcModelV2Ctx *p = (RcModelV2Ctx *)ctx;
1380
1381 rc_dbg_func("enter %p\n", ctx);
1382 bits_model_param_deinit(p);
1383
1384 rc_dbg_func("leave %p\n", ctx);
1385 return MPP_OK;
1386 }
1387
rc_model_v2_start(void * ctx,EncRcTask * task)1388 MPP_RET rc_model_v2_start(void *ctx, EncRcTask *task)
1389 {
1390 RcModelV2Ctx *p = (RcModelV2Ctx*)ctx;
1391 EncFrmStatus *frm = &task->frm;
1392 EncRcTaskInfo *info = &task->info;
1393 RcCfg *usr_cfg = &p->usr_cfg;
1394
1395 rc_dbg_func("enter %p\n", ctx);
1396
1397 if (usr_cfg->mode == RC_FIXQP) {
1398 if (usr_cfg->init_quality <= 0) {
1399 mpp_log("invalid fix %d qp found set default qp 26\n",
1400 usr_cfg->init_quality);
1401 usr_cfg->init_quality = 26;
1402 }
1403
1404 if (usr_cfg->max_quality <= 0)
1405 usr_cfg->max_quality = usr_cfg->init_quality;
1406 if (usr_cfg->min_quality <= 0)
1407 usr_cfg->min_quality = usr_cfg->init_quality;
1408 if (usr_cfg->max_i_quality <= 0)
1409 usr_cfg->max_i_quality = usr_cfg->max_quality;
1410 if (usr_cfg->min_i_quality <= 0)
1411 usr_cfg->min_i_quality = usr_cfg->min_quality;
1412
1413 if (frm->is_intra) {
1414 info->quality_max = usr_cfg->max_i_quality;
1415 info->quality_min = usr_cfg->min_i_quality;
1416 info->quality_target = usr_cfg->init_quality;
1417 } else {
1418 info->quality_max = usr_cfg->max_quality;
1419 info->quality_min = usr_cfg->min_quality;
1420 info->quality_target = usr_cfg->init_quality;
1421 }
1422
1423 rc_dbg_rc("seq_idx %d intra %d\n", frm->seq_idx, frm->is_intra);
1424 rc_dbg_rc("bitrate [%d : %d : %d]\n", info->bit_min, info->bit_target, info->bit_max);
1425 rc_dbg_rc("quality [%d : %d : %d]\n", info->quality_min, info->quality_target, info->quality_max);
1426
1427 return MPP_OK;
1428 }
1429
1430 if (usr_cfg->fps.fps_out_flex) {
1431 fps_chg_update_mode(ctx);
1432 }
1433
1434 info->frame_type = (frm->is_intra) ? (INTRA_FRAME) : (INTER_P_FRAME);
1435
1436 if (frm->ref_mode == REF_TO_PREV_INTRA)
1437 info->frame_type = INTER_VI_FRAME;
1438
1439 if (frm->is_i_refresh)
1440 info->frame_type = INTRA_RFH_FRAME;
1441
1442 p->next_ratio = 0;
1443 if (p->last_frame_type == INTRA_FRAME) {
1444 calc_next_i_ratio(p);
1445 }
1446
1447 if (!p->first_frm_flg) {
1448 if (p->calc_ratio)
1449 p->calc_ratio(p, info);
1450 } else {
1451 bits_model_alloc(p, info, p->gop_total_bits);
1452 /* quality determination */
1453 info->quality_target = (usr_cfg->init_quality <= 0) ? -1 : usr_cfg->init_quality;
1454 }
1455
1456 if (frm->is_intra) {
1457 info->quality_max = usr_cfg->max_i_quality;
1458 info->quality_min = usr_cfg->min_i_quality;
1459 } else {
1460 info->quality_max = usr_cfg->max_quality;
1461 info->quality_min = usr_cfg->min_quality;
1462 }
1463
1464 bits_model_preset(p, info);
1465
1466 rc_dbg_rc("seq_idx %d intra %d\n", frm->seq_idx, frm->is_intra);
1467 rc_dbg_rc("bitrate [%d : %d : %d]\n", info->bit_min, info->bit_target, info->bit_max);
1468 rc_dbg_rc("quality [%d : %d : %d]\n", info->quality_min, info->quality_target, info->quality_max);
1469
1470 p->reenc_cnt = 0;
1471 p->last_frame_type = info->frame_type;
1472
1473 rc_dbg_func("leave %p\n", ctx);
1474
1475 return MPP_OK;
1476 }
1477
cal_first_i_start_qp(RK_S32 target_bit,RK_U32 total_mb)1478 static RK_S32 cal_first_i_start_qp(RK_S32 target_bit, RK_U32 total_mb)
1479 {
1480 static RK_U32 mb_num[9] = {
1481 0, 200, 700, 1200,
1482 2000, 4000, 8000, 16000,
1483 20000
1484 };
1485
1486 static RK_U32 tab_bit[9] = {
1487 3780, 3570, 3150, 2940,
1488 2730, 3780, 2100, 1680,
1489 2100
1490 };
1491
1492 static RK_U8 qscale2qp[96] = {
1493 15, 15, 15, 15, 15, 16, 18, 20, 21, 22, 23, 24,
1494 25, 25, 26, 27, 28, 28, 29, 29, 30, 30, 30, 31,
1495 31, 32, 32, 33, 33, 33, 34, 34, 34, 34, 35, 35,
1496 35, 36, 36, 36, 36, 36, 37, 37, 37, 37, 38, 38,
1497 38, 38, 38, 39, 39, 39, 39, 39, 39, 40, 40, 40,
1498 40, 41, 41, 41, 41, 41, 41, 41, 42, 42, 42, 42,
1499 42, 42, 42, 42, 43, 43, 43, 43, 43, 43, 43, 43,
1500 44, 44, 44, 44, 44, 44, 44, 44, 45, 45, 45, 45,
1501 };
1502
1503 RK_S32 cnt = 0;
1504 RK_S32 index;
1505 RK_S32 i;
1506
1507 for (i = 0; i < 8; i++) {
1508 if (mb_num[i] > total_mb)
1509 break;
1510 cnt++;
1511 }
1512
1513 index = (total_mb * tab_bit[cnt] - 350) / target_bit; // qscale
1514 index = mpp_clip(index, 4, 95);
1515
1516 return qscale2qp[index];
1517 }
1518
derive_min_qp_from_complexity(RcModelV2Ctx * ctx,EncRcTaskInfo * info,RK_U32 is_intra)1519 static RK_S32 derive_min_qp_from_complexity(RcModelV2Ctx *ctx, EncRcTaskInfo *info, RK_U32 is_intra)
1520 {
1521 RcCfg *usr_cfg = &ctx->usr_cfg;
1522 RcMode rc_mode = usr_cfg->mode;
1523 RK_S32 qp_min = info->quality_min;
1524 RK_S32 fqp_min_i = usr_cfg->fqp_min_i;
1525 RK_S32 fqp_min_p = usr_cfg->fqp_min_p;
1526 RK_S32 cplx = mpp_data_sum_v2(ctx->complex_level);
1527 RK_S32 md = mpp_data_sum_v2(ctx->motion_level);
1528 RK_S32 md3 = mpp_data_get_pre_val_v2(ctx->motion_level, 0) +
1529 mpp_data_get_pre_val_v2(ctx->motion_level, 1) +
1530 mpp_data_get_pre_val_v2(ctx->motion_level, 2);
1531
1532 if (RC_AVBR == rc_mode || RC_VBR == rc_mode || RC_CBR == rc_mode) {
1533 if (md >= 700) {
1534 qp_min = is_intra ? fqp_min_i : fqp_min_p;
1535 if (md >= 1400)
1536 qp_min += md3 > 300 ? 3 : 2;
1537 else
1538 qp_min += md3 > 300 ? 2 : 1;
1539
1540 if (cplx >= 15)
1541 qp_min++;
1542 } else if (RC_CBR != rc_mode) {
1543 if (md > 100) {
1544 if (cplx >= 16)
1545 qp_min = (is_intra ? fqp_min_i : fqp_min_p) + 1;
1546 else if (cplx >= 10)
1547 qp_min = (is_intra ? fqp_min_i : fqp_min_p) + 0;
1548 } else {
1549 qp_min = (is_intra ? fqp_min_i : fqp_min_p);
1550 qp_min += (cplx >= 15) ? 3 : (cplx >= 10) ? 2 : (cplx >= 5) ? 1 : 0;
1551 }
1552 }
1553
1554 qp_min = mpp_clip(qp_min, info->quality_min, info->quality_max);
1555
1556 rc_dbg_rc("frame %d complex_level %d motion_level %d md3 %d qp_min %d\n",
1557 ctx->frm_num, cplx, md, md3, qp_min);
1558 }
1559
1560 return qp_min;
1561 }
1562
rc_model_v2_hal_start(void * ctx,EncRcTask * task)1563 MPP_RET rc_model_v2_hal_start(void *ctx, EncRcTask *task)
1564 {
1565 RcModelV2Ctx *p = (RcModelV2Ctx *)ctx;
1566 EncFrmStatus *frm = &task->frm;
1567 EncRcTaskInfo *info = &task->info;
1568 EncRcForceCfg *force = &task->force;
1569 RcCfg *usr_cfg = &p->usr_cfg;
1570 RK_S32 mb_w = MPP_ALIGN(usr_cfg->width, 16) / 16;
1571 RK_S32 mb_h = MPP_ALIGN(usr_cfg->height, 16) / 16;
1572 RK_S32 bit_min = info->bit_min;
1573 RK_S32 bit_max = info->bit_max;
1574 RK_S32 bit_target = info->bit_target;
1575 RK_S32 quality_min = info->quality_min;
1576 RK_S32 quality_max = info->quality_max;
1577 RK_S32 quality_target = info->quality_target;
1578
1579 rc_dbg_func("enter p %p task %p\n", p, task);
1580 rc_dbg_rc("seq_idx %d intra %d\n", frm->seq_idx, frm->is_intra);
1581
1582 if (force->force_flag & ENC_RC_FORCE_QP) {
1583 RK_S32 qp = force->force_qp;
1584 info->quality_target = qp;
1585 info->quality_max = qp;
1586 info->quality_min = qp;
1587 return MPP_OK;
1588 }
1589
1590 if (usr_cfg->mode == RC_FIXQP) {
1591 RK_S32 i_quality_delta = usr_cfg->i_quality_delta;
1592
1593 if (frm->is_intra && i_quality_delta)
1594 p->start_qp = quality_target - i_quality_delta;
1595 else
1596 p->start_qp = quality_target;
1597
1598 info->quality_target = p->start_qp;
1599
1600 return MPP_OK;
1601 }
1602
1603 /* setup quality parameters */
1604 if (p->first_frm_flg && frm->is_intra) {
1605 RK_S32 i_quality_delta = usr_cfg->i_quality_delta;
1606 p->pre_target_bits_fix_count = 0;
1607 p->pre_real_bits_count = 0;
1608
1609 if (info->quality_target < 0) {
1610 if (info->bit_target) {
1611 info->quality_target = cal_first_i_start_qp(info->bit_target, mb_w * mb_h);
1612 } else {
1613 mpp_log("init qp not set on fix qp mode, use default qp\n");
1614 info->quality_target = 26;
1615 }
1616 }
1617
1618 if (p->reenc_cnt) {
1619 p->cur_scale_qp += p->next_ratio;
1620 p->start_qp = (p->cur_scale_qp >> 6) - i_quality_delta;
1621 } else {
1622 p->start_qp = info->quality_target;
1623 p->cur_scale_qp = (info->quality_target + i_quality_delta) << 6;
1624 }
1625
1626 rc_dbg_rc("qp: start %2d cur_scale %d next_ratio %d reenc %d\n",
1627 p->start_qp, p->cur_scale_qp, p->next_ratio, p->reenc_cnt);
1628
1629 p->cur_scale_qp = mpp_clip(p->cur_scale_qp, (info->quality_min << 6), (info->quality_max << 6));
1630 } else {
1631 RK_S32 qp_scale = p->cur_scale_qp + p->next_ratio;
1632 RK_S32 start_qp = 0;
1633 RK_S32 qpmin = derive_min_qp_from_complexity(p, info, frm->is_intra);
1634
1635 if (frm->is_intra && !frm->is_i_refresh) {
1636 RK_S32 i_quality_delta = usr_cfg->i_quality_delta;
1637 RK_S32 qp_scale_t = qp_scale =
1638 mpp_clip(qp_scale, (info->quality_min << 6), (info->quality_max << 6));
1639
1640 qp_scale_t = (qp_scale + p->next_i_ratio) >> 6;
1641 if (qp_scale_t >= 35 && p->pre_i_qp <= 33)
1642 start_qp = (p->pre_i_qp * 307 + qp_scale_t * 717) >> 10;
1643 else
1644 start_qp = (p->pre_i_qp + qp_scale_t) >> 1;
1645
1646 if (i_quality_delta) {
1647 RK_U32 index = mpp_clip(mpp_data_mean_v2(p->madi) / 4, 0, 7);
1648 RK_S32 max_ip_delta = max_ip_qp_dealt[index];
1649
1650 if (i_quality_delta > max_ip_delta)
1651 i_quality_delta = max_ip_delta;
1652
1653 rc_dbg_rc("qp prev %d:%d curr %d - %d (max %d) -> %d reenc %d\n",
1654 p->pre_i_qp, qp_scale >> 6, start_qp,
1655 usr_cfg->i_quality_delta, max_ip_delta,
1656 start_qp - i_quality_delta, p->reenc_cnt);
1657
1658 //if (!p->reenc_cnt) {
1659 start_qp -= i_quality_delta;
1660 //}
1661 }
1662
1663 start_qp = mpp_clip(start_qp, qpmin, usr_cfg->fqp_max_i);
1664 start_qp = mpp_clip(start_qp, info->quality_min, info->quality_max);
1665 p->start_qp = start_qp;
1666
1667 if (!p->reenc_cnt) {
1668 p->cur_scale_qp = qp_scale;
1669 if (p->usr_cfg.debreath_cfg.enable) {
1670 calc_debreath_qp(ctx);
1671 }
1672 }
1673
1674 p->gop_frm_cnt = 0;
1675 p->gop_qp_sum = 0;
1676 } else {
1677 qp_scale = mpp_clip(qp_scale, (qpmin << 6), (info->quality_max << 6));
1678 qp_scale = mpp_clip(qp_scale, (info->quality_min << 6), (info->quality_max << 6));
1679 p->cur_scale_qp = qp_scale;
1680 rc_dbg_rc("qp %d -> %d\n", p->start_qp, qp_scale >> 6);
1681 p->start_qp = qp_scale >> 6;
1682 if (frm->ref_mode == REF_TO_PREV_INTRA && usr_cfg->vi_quality_delta) {
1683 rc_dbg_rc("qp %d -> %d (vi)\n", p->start_qp, p->start_qp - usr_cfg->vi_quality_delta);
1684 p->start_qp -= usr_cfg->vi_quality_delta;
1685 }
1686 p->start_qp = mpp_clip(p->start_qp, qpmin, usr_cfg->fqp_max_p);
1687 }
1688 if (p->pre_target_bits_fix_count * 90 / 100 > p->pre_real_bits_count) {
1689 p->start_qp = mpp_clip(p->start_qp, info->quality_min, 35);
1690 } else if (p->pre_target_bits_fix_count * 100 / 100 > p->pre_real_bits_count) {
1691 p->start_qp = mpp_clip(p->start_qp, info->quality_min, 37);
1692 } else if (p->pre_target_bits_fix_count * 107 / 100 > p->pre_real_bits_count) {
1693 p->start_qp = mpp_clip(p->start_qp, info->quality_min, 39);
1694 }
1695 p->start_qp = mpp_clip(p->start_qp, qpmin, 51);
1696 }
1697
1698 if (usr_cfg->hier_qp_cfg.hier_qp_en && !p->reenc_cnt) {
1699 rc_hier_calc_dealt_qp(p, info);
1700 if (p->qp_layer_id) {
1701 RK_S32 hier_qp_delta = usr_cfg->hier_qp_cfg.hier_qp_delta[p->qp_layer_id - 1];
1702
1703 p->start_qp -= hier_qp_delta;
1704 rc_dbg_qp("hier_qp: layer %d delta %d", p->qp_layer_id, hier_qp_delta);
1705 }
1706 }
1707
1708 if (frm->is_intra)
1709 p->start_qp = mpp_clip(p->start_qp, usr_cfg->fqp_min_i, usr_cfg->fqp_max_i);
1710 else
1711 p->start_qp = mpp_clip(p->start_qp, usr_cfg->fqp_min_p, usr_cfg->fqp_max_p);
1712 info->quality_target = p->start_qp;
1713
1714 rc_dbg_rc("bitrate [%d : %d : %d] -> [%d : %d : %d]\n",
1715 bit_min, bit_target, bit_max,
1716 info->bit_min, info->bit_target, info->bit_max);
1717 rc_dbg_rc("quality [%d : %d : %d] -> [%d : %d : %d]\n",
1718 quality_min, quality_target, quality_max,
1719 info->quality_min, info->quality_target, info->quality_max);
1720 rc_dbg_func("leave %p\n", p);
1721 return MPP_OK;
1722 }
1723
rc_model_v2_hal_end(void * ctx,EncRcTask * task)1724 MPP_RET rc_model_v2_hal_end(void *ctx, EncRcTask *task)
1725 {
1726 RcModelV2Ctx *p = (RcModelV2Ctx *)ctx;
1727 EncFrmStatus *frm = &task->frm;
1728
1729 rc_dbg_func("enter ctx %p task %p\n", ctx, task);
1730
1731 if (frm->is_intra)
1732 p->pre_i_qp = p->cur_scale_qp >> 6;
1733 else
1734 p->pre_p_qp = p->cur_scale_qp >> 6;
1735
1736 rc_dbg_func("leave %p\n", ctx);
1737 return MPP_OK;
1738 }
1739
rc_model_v2_check_reenc(void * ctx,EncRcTask * task)1740 MPP_RET rc_model_v2_check_reenc(void *ctx, EncRcTask *task)
1741 {
1742 RcModelV2Ctx *p = (RcModelV2Ctx *)ctx;
1743 EncRcTaskInfo *cfg = (EncRcTaskInfo *)&task->info;
1744 EncFrmStatus *frm = &task->frm;
1745 RcCfg *usr_cfg = &p->usr_cfg;
1746
1747 rc_dbg_func("enter ctx %p cfg %p\n", ctx, cfg);
1748
1749 frm->reencode = 0;
1750
1751 if ((usr_cfg->mode == RC_FIXQP) ||
1752 (task->force.force_flag & ENC_RC_FORCE_QP) ||
1753 p->on_drop || p->on_pskip)
1754 return MPP_OK;
1755
1756 if (check_re_enc(p, cfg)) {
1757 MppEncRcDropFrmMode drop_mode = usr_cfg->drop_mode;
1758
1759 if (frm->is_intra)
1760 drop_mode = MPP_ENC_RC_DROP_FRM_DISABLED;
1761
1762 if (usr_cfg->drop_gap && p->drop_cnt >= usr_cfg->drop_gap)
1763 drop_mode = MPP_ENC_RC_DROP_FRM_DISABLED;
1764
1765 rc_dbg_drop("reenc drop_mode %d drop_cnt %d\n", drop_mode, p->drop_cnt);
1766
1767 switch (drop_mode) {
1768 case MPP_ENC_RC_DROP_FRM_NORMAL : {
1769 frm->drop = 1;
1770 frm->reencode = 1;
1771 p->on_drop = 1;
1772 p->drop_cnt++;
1773 rc_dbg_drop("drop\n");
1774 } break;
1775 case MPP_ENC_RC_DROP_FRM_PSKIP : {
1776 frm->force_pskip = 1;
1777 frm->reencode = 1;
1778 p->on_pskip = 1;
1779 p->drop_cnt++;
1780 rc_dbg_drop("force_pskip\n");
1781 } break;
1782 case MPP_ENC_RC_DROP_FRM_DISABLED :
1783 default : {
1784 if (p->re_calc_ratio)
1785 p->re_calc_ratio(p, cfg);
1786
1787 if (p->next_ratio != 0 && cfg->quality_target < cfg->quality_max) {
1788 p->reenc_cnt++;
1789 frm->reencode = 1;
1790 }
1791 p->drop_cnt = 0;
1792 } break;
1793 }
1794 }
1795
1796 return MPP_OK;
1797 }
1798
rc_model_v2_end(void * ctx,EncRcTask * task)1799 MPP_RET rc_model_v2_end(void *ctx, EncRcTask *task)
1800 {
1801 RcModelV2Ctx *p = (RcModelV2Ctx *)ctx;
1802 EncRcTaskInfo *cfg = (EncRcTaskInfo *)&task->info;
1803 RcCfg *usr_cfg = &p->usr_cfg;
1804
1805 rc_dbg_func("enter ctx %p cfg %p\n", ctx, cfg);
1806
1807 rc_dbg_rc("bits_mode_update real_bit %d", cfg->bit_real);
1808
1809 if (usr_cfg->mode == RC_FIXQP)
1810 goto DONE;
1811
1812 rc_dbg_rc("motion_level %u, complex_level %u\n", cfg->motion_level, cfg->complex_level);
1813 mpp_data_update_v2(p->motion_level, cfg->motion_level);
1814 mpp_data_update_v2(p->complex_level, cfg->complex_level);
1815 cfg->rt_bits = p->ins_bps;
1816 p->last_inst_bps = p->ins_bps;
1817 p->first_frm_flg = 0;
1818
1819 bits_model_update(p, cfg);
1820 if (usr_cfg->mode == RC_AVBR) {
1821 moving_judge_update(p, cfg);
1822 bit_statics_update(p, cfg->bit_real);
1823 }
1824
1825 p->gop_frm_cnt++;
1826 p->gop_qp_sum += p->start_qp;
1827
1828 p->pre_mean_qp = cfg->quality_real;
1829 p->pre_iblk4_prop = cfg->iblk4_prop;
1830 p->scale_qp = p->cur_scale_qp;
1831 p->prev_md_prop = 0;
1832 p->pre_target_bits = cfg->bit_target;
1833 p->pre_target_bits_fix = cfg->bit_target_fix;
1834 p->pre_real_bits = cfg->bit_real;
1835
1836 p->on_drop = 0;
1837 p->on_pskip = 0;
1838
1839 DONE:
1840 rc_dbg_func("leave %p\n", ctx);
1841 return MPP_OK;
1842 }
1843