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MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 95 /////////////////////////////////////////////////////////////////////////////////////////////////// 96 /// 97 /// @file drvDMS.h 98 /// @author MStar Semiconductor Inc. 99 /// @brief DMS Driver Interface 100 /////////////////////////////////////////////////////////////////////////////////////////////////// 101 102 #ifndef _DRV_DMS_H_ 103 #define _DRV_DMS_H_ 104 105 106 #ifdef __cplusplus 107 extern "C" 108 { 109 #endif 110 #include "UFO.h" 111 112 #include "apiDMS_Type.h" 113 //------------------------------------------------------------------------------------------------- 114 // Driver Capability 115 //------------------------------------------------------------------------------------------------- 116 117 118 //------------------------------------------------------------------------------------------------- 119 // Macro and Define 120 //------------------------------------------------------------------------------------------------- 121 #ifndef UNUSED 122 #define UNUSED(x) (void)(x) 123 #endif 124 125 #define DMS_VERSION_DIP_GOP 126 //------------------------------------------------------------------------------------------------- 127 // Type and Structure 128 //------------------------------------------------------------------------------------------------- 129 130 //------------------------------------------------------------------------------------------------- 131 // Function Prototype 132 //------------------------------------------------------------------------------------------------- 133 #ifdef MDRV_DMS_C 134 #define DRV_DMS_INTERFACE 135 #else 136 #define DRV_DMS_INTERFACE extern 137 #endif 138 139 #define DMS_VERSION_DIPGOP 140 #define DMS_DI_RING_BUFFER 6 141 #define DMS_CAPTUREWIN_RING_BUFFER 3 142 #define DMS_CAPTURE_INTVL_CYCLE 3 143 #define INVALID_DI_RING_BUFFER_ID DMS_DI_RING_BUFFER 144 #define DMS_MAX_WINDOW_NUM 4 145 #define DMS_DIP_QUEUEDEPTH 8 146 #define DMS_Invalid_ReadPointer_ID DMS_DIP_QUEUEDEPTH 147 #define DMS_Invalid_WritePointer_ID DMS_DIP_QUEUEDEPTH 148 #define DMS_MVOP_FRAME_INFO_NUM 6 149 150 //SHM resource 151 typedef enum 152 { 153 /// YCrYCb. 154 E_DMS_DIP_FMT_YUV422 = 0, 155 /// RGB domain 156 E_DMS_DIP_FMT_RGB565, 157 /// RGB domain 158 E_DMS_DIP_FMT_ARGB8888, 159 /// YUV420 HVD tile 160 E_DMS_DIP_FMT_YUV420, 161 /// YC separate 422 162 E_DMS_DIP_FMT_YC422, 163 /// YUV420 H265 tile 164 E_DMS_DIP_FMT_YUV420_H265, 165 /// YUV420 H265_10bits tile 166 E_DMS_DIP_FMT_YUV420_H265_10BITS, 167 /// YUV420 planer 168 E_DMS_DIP_FMT_YUV420_PLANER, 169 /// YUV420 semi planer 170 E_DMS_DIP_FMT_YUV420_SEMI_PLANER, 171 /// YUV422 2.5D DI Top field 172 E_DMS_DIP_FMT_YUV422_MED_DI_FIELDTYPE_TOP, 173 /// YUV422 2.5D DI Bottom field 174 E_DMS_DIP_FMT_YUV422_MED_DI_FIELDTYPE_BOTTOM, 175 /// YUV420 2.5D DI Top field 176 E_DMS_DIP_FMT_YUV420_MED_DI_FIELDTYPE_TOP, 177 /// YUV420 2.5D DI Bottom field 178 E_DMS_DIP_FMT_YUV420_MED_DI_FIELDTYPE_BOTTOM, 179 E_DMS_DIP_FMT_MAX 180 } EN_DMS_DIP_FMT; 181 182 typedef enum 183 { 184 E_DMS_VIDEO_CODEC_UNKNOWN = -1, /// Video codec type is unknown. 185 E_DMS_VIDEO_CODEC_MPEG4, /// Video codec type is MPEG 4. 186 E_DMS_VIDEO_CODEC_MJPEG, /// Video codec type is motion JPG. 187 E_DMS_VIDEO_CODEC_H264, /// Video codec type is H264. 188 E_DMS_VIDEO_CODEC_RM, /// Video codec type is RealVideo. 189 E_DMS_VIDEO_CODEC_TS, /// Video codec type is TS File. 190 E_DMS_VIDEO_CODEC_MPEG, /// Video codec type is MPEG 1/2. 191 E_DMS_VIDEO_CODEC_VC1, /// Video codec type is VC1. 192 E_DMS_VIDEO_CODEC_AVS, /// Video codec type is Audio Video Standard. 193 E_DMS_VIDEO_CODEC_FLV, /// Video codec type is FLV. 194 E_DMS_VIDEO_CODEC_MVC, /// Video codec type is MVC. 195 E_DMS_VIDEO_CODEC_VP6, /// Video codec type is VP6. 196 E_DMS_VIDEO_CODEC_VP8, /// Video codec type is VP8. 197 E_DMS_VIDEO_CODEC_HEVC, /// Video codec type is HEVC. 198 E_DMS_VIDEO_CODEC_VP9, /// Video codec type is VP9. 199 }E_DMS_VIDEO_CODEC; 200 201 typedef enum 202 { 203 E_DMS_VIDEO_SCAN_TYPE_PROGRESSIVE = 0 , 204 E_DMS_VIDEO_SCAN_TYPE_INTERLACE_FRAME, 205 E_DMS_VIDEO_SCAN_TYPE_INTERLACE_FIELD, 206 E_DMS_VIDEO_SCAN_TYPE_MAX, 207 }E_DMS_VIDEO_SCAN_TYPE; 208 209 typedef enum 210 { 211 E_DMS_VIDEO_FIELD_ORDER_TYPE_BOTTOM = 0, 212 E_DMS_VIDEO_FIELD_ORDER_TYPE_TOP, 213 E_DMS_VIDEO_FIELD_ORDER_TYPE_MAX, 214 }E_DMS_VIDEO_FIELD_ORDER_TYPE; 215 216 typedef enum 217 { 218 E_DMS_VIDEO_FIELD_TYPE_NONE = 0, 219 E_DMS_VIDEO_FIELD_TYPE_TOP, 220 E_DMS_VIDEO_FIELD_TYPE_BOTTOM, 221 E_DMS_VIDEO_FIELD_TYPE_BOTH, 222 E_DMS_VIDEO_FIELD_TYPE_MAX, 223 }E_DMS_VIDEO_FIELD_TYPE; 224 225 typedef enum 226 { 227 E_DMS_VIDEO_TILE_MODE_NONE = 0, 228 E_DMS_VIDEO_TILE_MODE_16x16, 229 E_DMS_VIDEO_TILE_MODE_16x32, 230 E_DMS_VIDEO_TILE_MODE_32x16, 231 E_DMS_VIDEO_TILE_MODE_32x32, 232 E_DMS_VIDEO_TILE_MODE_MAX, 233 }E_DMS_VIDEO_TILE_MODE; 234 235 /// DIP source data format 236 typedef enum 237 { 238 239 E_DMS_VIDEO_DATA_FMT_YUV422 = 0, /// YCrYCb. 240 E_DMS_VIDEO_DATA_FMT_RGB565, /// RGB domain 241 E_DMS_VIDEO_DATA_FMT_ARGB8888, /// RGB domain 242 E_DMS_VIDEO_DATA_FMT_YUV420, /// YUV420 HVD tile 243 E_DMS_VIDEO_DATA_FMT_YC422, /// YC separate 422 244 E_DMS_VIDEO_DATA_FMT_YUV420_H265, /// YUV420 H265 tile 245 E_DMS_VIDEO_DATA_FMT_YUV420_H265_10BITS,/// YUV420 H265_10bits tile 246 E_DMS_VIDEO_DATA_FMT_YUV420_PLANER, /// YUV420 planer 247 E_DMS_VIDEO_DATA_FMT_YUV420_SEMI_PLANER,/// YUV420 semi planer 248 E_DMS_VIDEO_DATA_FMT_MAX 249 } E_DMS_VIDEO_DATA_FMT; 250 251 typedef struct 252 { 253 MS_U32 u32version; 254 MS_U32 u32size; 255 } DMS_VIDEO_MFDEC_VER_CRL; 256 257 typedef enum 258 { 259 E_DMS_DUMMY_VIDEO_H26X_MODE =0x00, 260 E_DMS_DUMMY_VIDEO_VP9_MODE =0x01, 261 }E_DMS_VIDEO_MFDEC_VP9_MODE; 262 263 typedef struct 264 { 265 DMS_VIDEO_MFDEC_VER_CRL stMFDec_HTLB_VerCtl; 266 MS_PHY u32HTLBEntriesAddr; 267 MS_U8 u8HTLBEntriesSize; 268 MS_U8 u8HTLBTableId; 269 void* pHTLBInfo; 270 #if !defined (__aarch64__) 271 MS_U32 dummy; 272 #endif 273 } DMS_VIDEO_MFDEC_HTLB_INFO; 274 275 typedef struct 276 { 277 MS_BOOL bMFDec_Enable; 278 MS_U8 u8MFDec_Select; 279 MS_BOOL bHMirror; // no use 280 MS_BOOL bVMirror; // no use 281 MS_BOOL bUncompress_mode; 282 MS_BOOL bBypass_codec_mode; 283 E_DMS_VIDEO_MFDEC_VP9_MODE en_MFDecVP9_mode; 284 MS_U16 u16StartX; 285 MS_U16 u16StartY; 286 MS_PHY phyBitlen_Base; 287 MS_U16 u16Bitlen_Pitch; 288 MS_U8 u8Bitlen_MiuSelect; 289 DMS_VIDEO_MFDEC_HTLB_INFO stMFDec_HTLB_Info; //reserve 290 void* pMFDecInfo; //reserve 291 #if !defined (__aarch64__) 292 MS_U32 dummy; 293 #endif 294 }DMS_VIDEO_MFDEC_INFO; 295 296 typedef struct 297 { 298 MS_BOOL bValid; /// frame buffer Valid 299 MS_U16 u16SrcWidth; /// frame buffer Width 300 MS_U16 u16SrcHeight; /// frame buffer Height 301 MS_U16 u16CropRight; ///right cropping 302 MS_U16 u16CropLeft; ///left cropping 303 MS_U16 u16CropBottom; ///bottom cropping 304 MS_U16 u16CropTop; ///top cropping 305 MS_U16 u16SrcPitch; /// frame buffer pitch 306 MS_PHY u32SrcLumaAddr; /// frame buffer base + the start offset of current displayed luma data. Unit: byte. 307 MS_PHY u32SrcChromaAddr; /// frame buffer base + the start offset of current displayed chroma data. Unit: byte. 308 MS_PHY u32SrcLumaAddr_2bit; /// physical address of Luma LSB 2bit buffer (Main10 profile) 309 MS_PHY u32SrcChromaAddr_2bit; /// physical address of Chroma LSB 2bit buffer (Main10 profile) 310 MS_PHY u32SrcLumaAddrI; /// physical address of Luma bottom field (interlace) 311 MS_PHY u32SrcLumaAddrI_2bit; /// physical address of Luma LSB 2bit bottom field (interlace) 312 MS_PHY u32SrcChromaAddrI; /// physical address of Chroma bottom field (interlace) 313 MS_PHY u32SrcChromaAddrI_2bit; /// physical address of Chroma LSB 2bit bottom field (interlace) 314 MS_U16 u16Src10bitPitch; /// frame buffer 10bit Pitch 315 MS_BOOL b10bitData; /// frame buffer 10bit data 316 MS_U8 u8LumaBitdepth; 317 MS_U32 u32FrameRate ; 318 E_DMS_VIDEO_DATA_FMT eFmt; 319 MS_U32 u32Window; 320 E_DMS_VIDEO_CODEC eCODEC; 321 E_DMS_VIDEO_SCAN_TYPE eScanType; 322 E_DMS_VIDEO_FIELD_ORDER_TYPE eFieldOrderType; 323 E_DMS_VIDEO_FIELD_TYPE eFieldType; 324 E_DMS_VIDEO_FIELD_TYPE eFieldType_2nd; 325 E_DMS_VIDEO_TILE_MODE eTileMode; 326 DMS_VIDEO_MFDEC_INFO stMFdecInfo; 327 // New Flip 328 MS_U32 u32FrameIndex; /// Frame index 329 MS_U32 u32FrameIndex_2nd; 330 MS_U32 u32VDECStreamID; /// Provide the VDEC stream ID to XC to access MApi_VDEC_EX_DisplayFrame() and MApi_VDEC_EX_ReleaseFrame() 331 MS_U32 u32VDECStreamVersion; /// Provide the VDEC stream ID Version to XC to access MApi_VDEC_EX_DisplayFrame() and MApi_VDEC_EX_ReleaseFrame() 332 MS_U32 u32PriData; /// Frame reference count 333 MS_U32 u32PriData_2nd; 334 MS_U64 u64Pts; 335 //2nd buffer 336 MS_PHY phySrc2ndBufferLumaAddr; 337 MS_PHY phySrc2ndBufferChromaAddr; 338 MS_U16 u16Src2ndBufferPitch; 339 MS_U8 u8Src2ndBufferTileMode; 340 MS_U8 u8Src2ndBufferV7DataValid; 341 MS_U16 u16Src2ndBufferWidth; 342 MS_U16 u16Src2ndBufferHeight; 343 344 //Di Task using member 345 MS_BOOL bIsAfterDiTask; 346 MS_BOOL bIs2ndField; 347 MS_U8 u8DiOutputRingBufferID; 348 349 //Field ctrl by v sync bridge 350 MS_U8 u8FieldCtrl; 351 } DMS_VDECFRAME_INFO; 352 353 // 354 typedef enum 355 { 356 E_DMS_MVOP_FLOW_UNKNOWN = 0, 357 E_DMS_MVOP_FLOW_FROM_DIP = 1, 358 E_DMS_MVOP_FLOW_FROM_VDEC = 2, 359 E_DMS_MVOP_FLOW_MAX, 360 } E_DMS_MVOP_FLOW_CONTROL; 361 362 typedef enum 363 { 364 E_DMS_DIP_MULTIVIEW_BUF_ID_0 = 0, 365 E_DMS_DIP_MULTIVIEW_BUF_ID_1 = 1, 366 E_DMS_DIP_MULTIVIEW_BUF_ID_MAX, 367 } E_DMS_DIP_MULTIVIEW_BUF_ID; 368 369 typedef enum 370 { 371 E_DMS_DIP_CLIENT_GOP = 0, 372 E_DMS_DIP_CLIENT_MVOP = 1, 373 E_DMS_DIP_CLIENT_MAX, 374 } E_DMS_DIP_CLIENT; 375 376 typedef enum 377 { 378 E_DMS_DIP_NORMAL = 0, 379 E_DMS_DIP_DI = 1, 380 E_DMS_DIP_CAPTURE = 2, 381 E_DMS_DIP_MAX, 382 } E_DMS_DIP_ACTION; 383 384 typedef struct 385 { 386 MS_BOOL bDIPwinUse; 387 ST_DMS_WINDOW stCropWin; 388 ST_DMS_WINDOW stDstWin; 389 MS_PHY u32DIPStartMemAddr; 390 MS_PHY u32DIPEndMemAddr; 391 MS_PHY u32DIPDoubleBufStartMemAddr; 392 MS_PHY u32DIPDoubleBufEndMemAddr; 393 MS_PHY phyDIPRingBufMemAddr[DMS_DI_RING_BUFFER]; 394 MS_U32 u32RingBufferSize; 395 MS_U32 u32Window; 396 MS_PHY u32GEStartMemAddr; 397 MS_PHY u32GEEndMemAddr; 398 399 MS_PHY u32DIStartAddr; 400 MS_PHY u32DIEndAddr; 401 MS_U32 u32DISize; 402 MS_U8 u8DIBufCnt; 403 } DMS_DIPWIN_INFO; 404 405 /// DIP tile block 406 typedef enum 407 { 408 DMS_DIP_TILE_BLOCK_R_NONE = 0x0, 409 DMS_DIP_TILE_BLOCK_W_NONE = 0x1, 410 DMS_DIP_TILE_BLOCK_R_16_32 = 0x2, 411 DMS_DIP_TILE_BLOCK_W_16_32 = 0x3, 412 DMS_DIP_TILE_BLOCK_R_32_16 = 0x4, 413 DMS_DIP_TILE_BLOCK_W_32_16 = 0x5, 414 DMS_DIP_TILE_BLOCK_R_32_32 = 0x6, 415 DMS_DIP_TILE_BLOCK_W_32_32 = 0x7, 416 }EN_DMS_DIP_TILE_BLOCK; 417 418 typedef struct 419 { 420 MS_U32 u32Enable; 421 MS_U32 u32Visible; 422 MS_U32 u32FrameRate; 423 MS_U32 u32Width; 424 MS_U32 u32Height; 425 EN_DMS_CAPTURE_COLORFORMAT enColorFormat; 426 EN_DMS_DIP_FMT enDIPDataFmt; 427 EN_DMS_DIP_TILE_BLOCK enTileBlock; 428 MS_PHY u32StartMemAddr; 429 MS_PHY u32EndMemAddr; 430 MS_PHY u32SecondBufStartMemAddr; 431 MS_PHY u32SecondBufEndMemAddr; 432 MS_PHY u32ThirdBufStartMemAddr; 433 MS_PHY u32ThirdBufEndMemAddr; 434 ST_DMS_CAPTURE_INFO stCaptureRingBuf[DMS_CAPTUREWIN_RING_BUFFER]; 435 MS_U32 u32Window; 436 437 MS_U8 u8ReadPointerOffset; 438 MS_U32 u32AccumuleOutputRate; 439 MS_U32 bStartCountCapModeFRC; 440 MS_U16 u16PreviousWP; 441 MS_U32 bStartGetCapture; 442 MS_U32 u32FrameCount; 443 MS_U16 u16NeedDeletePtr; 444 } DMS_DIPCAPTUREWIN_INFO; 445 446 typedef struct 447 { 448 MS_U32 bCaptureRet; 449 MS_U32 bIsEventSent; 450 MS_U32 bFirstCapFrame; 451 } DMS_DIPCAPTURE_IMI_INFO; 452 453 typedef struct 454 { 455 MS_U16 u16WritePointer; 456 MS_U16 u16PreWritePointer; 457 } DMS_DIPCaptureWin_WritePointer; 458 459 typedef struct 460 { 461 MS_U16 u16WindowCaptured; 462 MS_U16 u16WindowRemoved; 463 } DMS_DIPCaptureWin_WindowChanged; 464 465 typedef struct 466 { 467 MS_U16 u16WritePointer; 468 MS_U16 u16ReadPointer; 469 } DMS_DIPWriteReadPointer; 470 471 typedef struct 472 { 473 EN_DMS_DIP_FMT eDIPRFmt; 474 EN_DMS_DIP_FMT eDIPWFmt; 475 MS_U32 u32PanelWidth; 476 MS_U32 u32PanelHeight; 477 } DMS_DIPMEM_INFO; 478 479 typedef struct 480 { 481 MS_BOOL bCleanBuf; 482 MS_BOOL bDispChange; 483 } DMS_DISP_BUFFER_FLAG; 484 485 typedef enum 486 { 487 E_DMS_ID_VAR = 0, // 488 } EN_DMS_POOL_TYPE; 489 490 MS_U32 MDrv_DMS_Get_Semaphore(void* pInstance, EN_DMS_POOL_TYPE ePoolType); 491 MS_U32 MDrv_DMS_Release_Semaphore(void* pInstance, EN_DMS_POOL_TYPE ePoolType); 492 493 //---------------------------------------------------------------- 494 // 495 // 496 //---------------------------------------------------------------- 497 DRV_DMS_INTERFACE EN_DMS_RESULT MDrv_DMS_Init(void* pInstance, ST_DMS_INITDATA *pstDMS_InitData); 498 EN_DMS_RESULT MDrv_DMS_SetMemoryType(void* pInstance, ST_DMS_SET_MEMORY_TYPE* pstDMS_SetMemType); 499 DRV_DMS_INTERFACE EN_DMS_RESULT MDrv_DMS_CreateWindow(void* pInstance, ST_DMS_WINDOW *pstOutputWin, ST_DMS_CREATE_WIN_INFO *pstCreateWin_Info, MS_U32 *pu32WindowID); 500 DRV_DMS_INTERFACE EN_DMS_RESULT MDrv_DMS_SetDigitalDecodeSignalInfo(void* pInstance, MS_U32 u32WindowID, ST_DMS_DISPFRAMEFORMAT *pstDispFrameFormat); 501 DRV_DMS_INTERFACE EN_DMS_RESULT MDrv_DMS_ClearDigitalDecodeSignalInfo(void* pInstance, MS_U32 u32WindowID); 502 DRV_DMS_INTERFACE EN_DMS_RESULT MDrv_DMS_DestroyWindow(void* pInstance, MS_U32 u32WindowID); 503 DRV_DMS_INTERFACE EN_DMS_RESULT MDrv_DMS_SetWindow(void* pInstance, MS_U32 u32WindowID, ST_DMS_SETWIN_INFO *pstDMS_SetWin_Info); 504 DRV_DMS_INTERFACE EN_DMS_RESULT MDrv_DMS_GetWindowInfo(void* pInstance, MS_U32 u32WindowID, ST_DMS_WINDOW_INFO *pstDMS_GetWin_Info); 505 DRV_DMS_INTERFACE EN_DMS_RESULT MDrv_DMS_Video_Flip(void* pInstance, MS_U32 u32WindowID, ST_DMS_DISPFRAMEFORMAT* pstDispFrameFormat); 506 DRV_DMS_INTERFACE EN_DMS_RESULT MDrv_DMS_SetZOrder(void* pInstance, MS_U32 u32WindowID, MS_U32 u32ZOrder); 507 DRV_DMS_INTERFACE EN_DMS_RESULT MDrv_DMS_Video_Freeze(void* pInstance, MS_U32 u32WindowID, MS_U32 u32Enable); 508 DRV_DMS_INTERFACE EN_DMS_RESULT MDrv_DMS_Video_Mute(void* pInstance, MS_U32 u32WindowID, MS_U32 u32Enable); 509 DRV_DMS_INTERFACE EN_DMS_RESULT MDrv_DMS_Set_MuteColor(void* pInstance, MS_U32 u32WindowID, ST_DMS_COLOR stMuteColor); 510 DRV_DMS_INTERFACE EN_DMS_RESULT MDrv_DMS_GetStatus(void* pInstance, MS_U32 *pu32Status); 511 DRV_DMS_INTERFACE EN_DMS_RESULT MDrv_DMS_GetCapability(void* pInstance, EN_DMS_CAPABILITY *peCapability); 512 DRV_DMS_INTERFACE EN_DMS_RESULT MDrv_DMS_SetOutputLayer(void* pInstance, ST_DMS_WINDOW *pstLayer); 513 DRV_DMS_INTERFACE EN_DMS_RESULT MDrv_DMS_Set_3D_Mode(void* pInstance, MS_U32 u32WindowID, ST_DMS_3D_INFO *pst3DInfo); 514 DRV_DMS_INTERFACE EN_DMS_RESULT MDrv_DMS_Set_CaptureInfo(void* pInstance, MS_U32 u32WindowID, ST_DMS_SET_CAPTURE_INFO *pstSetCaptureInfo); 515 DRV_DMS_INTERFACE EN_DMS_RESULT MDrv_DMS_Get_CaptureBuffer(void* pInstance, MS_U32 u32WindowID, ST_DMS_CAPTURE_INFO *pstCaptureInfo); 516 DRV_DMS_INTERFACE EN_DMS_RESULT MDrv_DMS_Release_CaptureBuffer(void* pInstance, MS_U32 u32WindowID, ST_DMS_CAPTURE_INFO *pstCaptureInfo); 517 518 #ifdef __cplusplus 519 } 520 #endif 521 522 #endif // _DRV_DMS_H_ 523 524