1 /* SPDX-License-Identifier: Apache-2.0 OR MIT */ 2 /* 3 * Copyright (c) 2020 Rockchip Electronics Co., Ltd. 4 */ 5 6 #ifndef __MPP_DEVICE_H__ 7 #define __MPP_DEVICE_H__ 8 9 #include "mpp_err.h" 10 #include "mpp_list.h" 11 #include "mpp_mem_pool.h" 12 13 #include "mpp_dev_defs.h" 14 #include "mpp_callback.h" 15 16 #define MPP_MAX_REG_TRANS_NUM 80 17 18 typedef void* MppDev; 19 20 typedef enum MppDevIoctlCmd_e { 21 /* device batch mode config */ 22 MPP_DEV_BATCH_ON, 23 MPP_DEV_BATCH_OFF, 24 MPP_DEV_DELIMIT, 25 MPP_DEV_SET_CB_CTX, 26 27 /* hardware operation setup config */ 28 MPP_DEV_REG_WR, 29 MPP_DEV_REG_RD, 30 MPP_DEV_REG_OFFSET, 31 MPP_DEV_REG_OFFS, 32 MPP_DEV_RCB_INFO, 33 MPP_DEV_SET_INFO, 34 MPP_DEV_SET_ERR_REF_HACK, 35 MPP_DEV_LOCK_MAP, 36 MPP_DEV_UNLOCK_MAP, 37 MPP_DEV_ATTACH_FD, 38 MPP_DEV_DETACH_FD, 39 40 MPP_DEV_CMD_SEND, 41 MPP_DEV_CMD_POLL, 42 43 MPP_DEV_IOCTL_CMD_BUTT, 44 } MppDevIoctlCmd; 45 46 /* for MPP_DEV_REG_WR */ 47 typedef struct MppDevRegWrCfg_t { 48 void *reg; 49 RK_U32 size; 50 RK_U32 offset; 51 } MppDevRegWrCfg; 52 53 /* for MPP_DEV_REG_RD */ 54 typedef struct MppDevRegRdCfg_t { 55 void *reg; 56 RK_U32 size; 57 RK_U32 offset; 58 } MppDevRegRdCfg; 59 60 /* for MPP_DEV_REG_OFFSET */ 61 typedef struct MppDevRegOffsetCfg_t { 62 RK_U32 reg_idx; 63 RK_U32 offset; 64 } MppDevRegOffsetCfg; 65 66 /* for multi MPP_DEV_REG_OFFSET */ 67 typedef struct MppDevRegOffsCfg_t { 68 RK_S32 size; 69 RK_S32 count; 70 MppDevRegOffsetCfg cfgs[]; 71 } MppDevRegOffCfgs; 72 73 /* for MPP_DEV_RCB_INFO */ 74 typedef struct MppDevRcbInfoCfg_t { 75 RK_U32 reg_idx; 76 RK_U32 size; 77 } MppDevRcbInfoCfg; 78 79 /* for MPP_DEV_SET_INFO */ 80 typedef struct MppDevSetInfoCfg_t { 81 RK_U32 type; 82 RK_U32 flag; 83 RK_U64 data; 84 } MppDevInfoCfg; 85 86 typedef union MppDevPollEncSliceInfo_u { 87 RK_U32 val; 88 struct { 89 RK_U32 length : 31; 90 RK_U32 last : 1; 91 }; 92 } MppDevPollEncSliceInfo; 93 94 /* for MPP_DEV_POLL */ 95 typedef struct MppDevPollCfg_t { 96 RK_S32 poll_type; 97 RK_S32 poll_ret; 98 RK_S32 count_max; 99 RK_S32 count_ret; 100 MppDevPollEncSliceInfo slice_info[]; 101 } MppDevPollCfg; 102 103 typedef struct MppDevBufMapNode_t { 104 /* data write by buffer function */ 105 struct list_head list_buf; 106 pthread_mutex_t *lock_buf; 107 MppBuffer buffer; 108 MppDev dev; 109 MppMemPool pool; 110 RK_S32 buf_fd; 111 112 /* data write by device function */ 113 struct list_head list_dev; 114 pthread_mutex_t *lock_dev; 115 RK_S32 dev_fd; 116 RK_U32 iova; 117 } MppDevBufMapNode; 118 119 typedef struct MppDevApi_t { 120 const char *name; 121 RK_U32 ctx_size; 122 MPP_RET (*init)(void *ctx, MppClientType type); 123 MPP_RET (*deinit)(void *ctx); 124 125 /* bat mode function */ 126 MPP_RET (*attach)(void *ctx); 127 MPP_RET (*detach)(void *ctx); 128 MPP_RET (*delimit)(void *ctx); 129 MPP_RET (*set_cb_ctx)(void *ctx, MppCbCtx *cb); 130 131 /* config the cmd on preparing */ 132 MPP_RET (*reg_wr)(void *ctx, MppDevRegWrCfg *cfg); 133 MPP_RET (*reg_rd)(void *ctx, MppDevRegRdCfg *cfg); 134 MPP_RET (*reg_offset)(void *ctx, MppDevRegOffsetCfg *cfg); 135 MPP_RET (*reg_offs)(void *ctx, MppDevRegOffCfgs *cfg); 136 MPP_RET (*rcb_info)(void *ctx, MppDevRcbInfoCfg *cfg); 137 MPP_RET (*set_info)(void *ctx, MppDevInfoCfg *cfg); 138 MPP_RET (*set_err_ref_hack)(void *ctx, RK_U32 *enable); 139 140 /* buffer attach / detach */ 141 MPP_RET (*lock_map)(void *ctx); 142 MPP_RET (*unlock_map)(void *ctx); 143 MPP_RET (*attach_fd)(void *ctx, MppDevBufMapNode *node); 144 MPP_RET (*detach_fd)(void *ctx, MppDevBufMapNode *node); 145 146 /* send cmd to hardware */ 147 MPP_RET (*cmd_send)(void *ctx); 148 149 /* poll cmd from hardware */ 150 MPP_RET (*cmd_poll)(void *ctx, MppDevPollCfg *cfg); 151 } MppDevApi; 152 153 #ifdef __cplusplus 154 extern "C" { 155 #endif 156 157 MPP_RET mpp_dev_init(MppDev *ctx, MppClientType type); 158 MPP_RET mpp_dev_deinit(MppDev ctx); 159 160 MPP_RET mpp_dev_ioctl(MppDev ctx, RK_S32 cmd, void *param); 161 162 /* special helper function for large address offset config */ 163 MPP_RET mpp_dev_set_reg_offset(MppDev dev, RK_S32 index, RK_U32 offset); 164 165 /* register offset multi config */ 166 MPP_RET mpp_dev_multi_offset_init(MppDevRegOffCfgs **cfgs, RK_S32 size); 167 MPP_RET mpp_dev_multi_offset_deinit(MppDevRegOffCfgs *cfgs); 168 169 MPP_RET mpp_dev_multi_offset_reset(MppDevRegOffCfgs *cfgs); 170 MPP_RET mpp_dev_multi_offset_update(MppDevRegOffCfgs *cfgs, RK_S32 index, RK_U32 offset); 171 172 #ifdef __cplusplus 173 } 174 #endif 175 176 #endif /* __MPP_DEVICE_H__ */ 177