1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2 /* 3 * 4 * (C) COPYRIGHT 2014-2015, 2017-2022 ARM Limited. All rights reserved. 5 * 6 * This program is free software and is provided to you under the terms of the 7 * GNU General Public License version 2 as published by the Free Software 8 * Foundation, and any use by you of this program is subject to the terms 9 * of such GNU license. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, you can access it online at 18 * http://www.gnu.org/licenses/gpl-2.0.html. 19 * 20 */ 21 22 /* 23 * Dummy Model interface 24 * 25 * Support for NO_MALI dummy Model interface. 26 * 27 * +-----------------------------------+ 28 * | Kbase read/write/IRQ | 29 * +-----------------------------------+ 30 * | Model Linux Framework | 31 * +-----------------------------------+ 32 * | Model Dummy interface definitions | 33 * +-----------------+-----------------+ 34 * | Fake R/W | Fake IRQ | 35 * +-----------------+-----------------+ 36 */ 37 38 #ifndef _KBASE_MODEL_DUMMY_H_ 39 #define _KBASE_MODEL_DUMMY_H_ 40 41 #include <uapi/gpu/arm/bifrost/backend/gpu/mali_kbase_model_linux.h> 42 #include <uapi/gpu/arm/bifrost/backend/gpu/mali_kbase_model_dummy.h> 43 44 #define model_error_log(module, ...) pr_err(__VA_ARGS__) 45 46 #define NUM_SLOTS 4 /*number of job slots */ 47 48 /*Errors Mask Codes*/ 49 /* each bit of errors_mask is associated to a specific error: 50 * NON FAULT STATUS CODES: only the following are implemented since the others 51 * represent normal working statuses 52 */ 53 #define KBASE_JOB_INTERRUPTED (1<<0) 54 #define KBASE_JOB_STOPPED (1<<1) 55 #define KBASE_JOB_TERMINATED (1<<2) 56 57 /* JOB EXCEPTIONS: */ 58 #define KBASE_JOB_CONFIG_FAULT (1<<3) 59 #define KBASE_JOB_POWER_FAULT (1<<4) 60 #define KBASE_JOB_READ_FAULT (1<<5) 61 #define KBASE_JOB_WRITE_FAULT (1<<6) 62 #define KBASE_JOB_AFFINITY_FAULT (1<<7) 63 #define KBASE_JOB_BUS_FAULT (1<<8) 64 #define KBASE_INSTR_INVALID_PC (1<<9) 65 #define KBASE_INSTR_INVALID_ENC (1<<10) 66 #define KBASE_INSTR_TYPE_MISMATCH (1<<11) 67 #define KBASE_INSTR_OPERAND_FAULT (1<<12) 68 #define KBASE_INSTR_TLS_FAULT (1<<13) 69 #define KBASE_INSTR_BARRIER_FAULT (1<<14) 70 #define KBASE_INSTR_ALIGN_FAULT (1<<15) 71 #define KBASE_DATA_INVALID_FAULT (1<<16) 72 #define KBASE_TILE_RANGE_FAULT (1<<17) 73 #define KBASE_ADDR_RANGE_FAULT (1<<18) 74 #define KBASE_OUT_OF_MEMORY (1<<19) 75 #define KBASE_UNKNOWN (1<<20) 76 77 /* GPU EXCEPTIONS:*/ 78 #define KBASE_DELAYED_BUS_FAULT (1<<21) 79 #define KBASE_SHAREABILITY_FAULT (1<<22) 80 81 /* MMU EXCEPTIONS:*/ 82 #define KBASE_TRANSLATION_FAULT (1<<23) 83 #define KBASE_PERMISSION_FAULT (1<<24) 84 #define KBASE_TRANSTAB_BUS_FAULT (1<<25) 85 #define KBASE_ACCESS_FLAG (1<<26) 86 87 /* generic useful bitmasks */ 88 #define IS_A_JOB_ERROR ((KBASE_UNKNOWN << 1) - KBASE_JOB_INTERRUPTED) 89 #define IS_A_MMU_ERROR ((KBASE_ACCESS_FLAG << 1) - KBASE_TRANSLATION_FAULT) 90 #define IS_A_GPU_ERROR (KBASE_DELAYED_BUS_FAULT|KBASE_SHAREABILITY_FAULT) 91 92 /* number of possible MMU address spaces */ 93 #define NUM_MMU_AS 16 /* total number of MMU address spaces as in 94 * MMU_IRQ_RAWSTAT register 95 */ 96 97 /* Forward declaration */ 98 struct kbase_device; 99 100 /* 101 * the function below is used to trigger the simulation of a faulty 102 * HW condition for a specific job chain atom 103 */ 104 105 struct kbase_error_params { 106 u64 jc; 107 u32 errors_mask; 108 u32 mmu_table_level; 109 u16 faulty_mmu_as; 110 u16 padding[3]; 111 }; 112 113 enum kbase_model_control_command { 114 /* Disable/Enable job completion in the dummy model */ 115 KBASE_MC_DISABLE_JOBS 116 }; 117 118 /* struct to control dummy model behavior */ 119 struct kbase_model_control_params { 120 s32 command; 121 s32 value; 122 }; 123 124 /* struct to track faulty atoms */ 125 struct kbase_error_atom { 126 struct kbase_error_params params; 127 struct kbase_error_atom *next; 128 }; 129 130 /*struct to track the system error state*/ 131 struct error_status_t { 132 spinlock_t access_lock; 133 134 u32 errors_mask; 135 u32 mmu_table_level; 136 int faulty_mmu_as; 137 138 u64 current_jc; 139 int current_job_slot; 140 141 u32 job_irq_rawstat; 142 u32 job_irq_status; 143 u32 js_status[NUM_SLOTS]; 144 145 u32 mmu_irq_mask; 146 u32 mmu_irq_rawstat; 147 148 u32 gpu_error_irq; 149 u32 gpu_fault_status; 150 151 u32 as_faultstatus[NUM_MMU_AS]; 152 u32 as_command[NUM_MMU_AS]; 153 u64 as_transtab[NUM_MMU_AS]; 154 }; 155 156 /** 157 * struct gpu_model_prfcnt_en - Performance counter enable masks 158 * @fe: Enable mask for front-end block 159 * @tiler: Enable mask for tiler block 160 * @l2: Enable mask for L2/Memory system blocks 161 * @shader: Enable mask for shader core blocks 162 */ 163 struct gpu_model_prfcnt_en { 164 u32 fe; 165 u32 tiler; 166 u32 l2; 167 u32 shader; 168 }; 169 170 void midgard_set_error(int job_slot); 171 int job_atom_inject_error(struct kbase_error_params *params); 172 int gpu_model_control(void *h, 173 struct kbase_model_control_params *params); 174 175 /** 176 * gpu_model_set_dummy_prfcnt_user_sample() - Set performance counter values 177 * @data: Userspace pointer to array of counter values 178 * @size: Size of counter value array 179 * 180 * Counter values set by this function will be used for one sample dump only 181 * after which counters will be cleared back to zero. 182 * 183 * Return: 0 on success, else error code. 184 */ 185 int gpu_model_set_dummy_prfcnt_user_sample(u32 __user *data, u32 size); 186 187 /** 188 * gpu_model_set_dummy_prfcnt_kernel_sample() - Set performance counter values 189 * @data: Pointer to array of counter values 190 * @size: Size of counter value array 191 * 192 * Counter values set by this function will be used for one sample dump only 193 * after which counters will be cleared back to zero. 194 */ 195 void gpu_model_set_dummy_prfcnt_kernel_sample(u64 *data, u32 size); 196 197 void gpu_model_get_dummy_prfcnt_cores(struct kbase_device *kbdev, 198 u64 *l2_present, u64 *shader_present); 199 void gpu_model_set_dummy_prfcnt_cores(struct kbase_device *kbdev, 200 u64 l2_present, u64 shader_present); 201 202 /* Clear the counter values array maintained by the dummy model */ 203 void gpu_model_clear_prfcnt_values(void); 204 205 #if MALI_USE_CSF 206 /** 207 * gpu_model_prfcnt_dump_request() - Request performance counter sample dump. 208 * @sample_buf: Pointer to KBASE_DUMMY_MODEL_MAX_VALUES_PER_SAMPLE sized array 209 * in which to store dumped performance counter values. 210 * @enable_maps: Physical enable maps for performance counter blocks. 211 */ 212 void gpu_model_prfcnt_dump_request(uint32_t *sample_buf, struct gpu_model_prfcnt_en enable_maps); 213 214 /** 215 * gpu_model_glb_request_job_irq() - Trigger job interrupt with global request 216 * flag set. 217 * @model: Model pointer returned by midgard_model_create(). 218 */ 219 void gpu_model_glb_request_job_irq(void *model); 220 #endif /* MALI_USE_CSF */ 221 222 extern struct error_status_t hw_error_status; 223 224 #endif 225