1 /******************************************************************************
2 *
3 * Copyright(c) 2007 - 2019 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 *****************************************************************************/
15 /*-------------------------------------------------------------------------------
16
17 For type defines and data structure defines
18
19 --------------------------------------------------------------------------------*/
20 #ifndef __DRV_TYPES_H__
21 #define __DRV_TYPES_H__
22
23 #include <drv_conf.h>
24 #include <basic_types.h>
25 #include <osdep_service.h>
26 #include <rtw_byteorder.h>
27 #include <wlan_bssdef.h>
28 #include <wifi.h>
29 #include <ieee80211.h>
30 #ifdef CONFIG_ARP_KEEP_ALIVE
31 #include <net/neighbour.h>
32 #include <net/arp.h>
33 #endif
34
35 typedef struct _ADAPTER _adapter;
36 /* connection interface of drv and hal */
37 #include "../phl/rtw_general_def.h"
38
39 #include <rtw_debug.h>
40 #include <rtw_rf.h>
41 #include "../core/rtw_chplan.h"
42
43 #ifdef CONFIG_80211N_HT
44 #include <rtw_ht.h>
45 #endif
46
47 #ifdef CONFIG_80211AC_VHT
48 #include <rtw_vht.h>
49 #endif
50
51
52 #include <rtw_security.h>
53 #include <rtw_xmit.h>
54 #include <xmit_osdep.h>
55 #include <rtw_recv.h>
56 #include <rtw_rm.h>
57
58 #ifdef CONFIG_80211AX_HE
59 #include <rtw_he.h>
60 #endif
61
62 #ifdef CONFIG_BEAMFORMING
63 #include <rtw_beamforming.h>
64 #endif
65
66 #include <recv_osdep.h>
67 #include <rtw_sreset.h>
68
69 /*CONFIG_PHL_ARCH*/
70 #include "rtw_cmd.h"
71 #include "rtw_phl_cmd.h"
72 #include "../phl/phl_headers_core.h"
73 #include "phl_api_tmp.h"
74 #include "rtw_phl.h"
75
76 /*GEORGIA_TODO_FIXIT*/
77 #include "_hal_rate.h"
78 #include "_hal_api_tmp.h"
79
80 #include "platform_ops.h"
81 #include "rtw_scan.h"
82 #ifdef CONFIG_RTW_80211R
83 #include <rtw_ft.h>
84 #endif
85 #if defined(CONFIG_RTW_WNM) || defined(CONFIG_RTW_80211K)
86 #include <rtw_wnm.h>
87 #endif
88 #ifdef CONFIG_RTW_MBO
89 #include <rtw_mbo.h>
90 #endif
91 #include <rtw_qos.h>
92 #include <rtw_wow.h>
93 #include <rtw_pwrctrl.h>
94 #include <rtw_mlme.h>
95 #include <mlme_osdep.h>
96 #include <rtw_io.h>
97
98 #ifdef CONFIG_RTW_CORE_RXSC
99 #include <rtw_recv_shortcut.h>
100 #endif
101 #ifdef CONFIG_CORE_TXSC
102 #include <rtw_xmit_shortcut.h>
103 #endif
104
105 #include <rtw_ioctl.h>
106 #include <rtw_ioctl_set.h>
107 #include <rtw_ioctl_query.h>
108 #include "rtw_cfg.h"
109 #include <osdep_intf.h>
110 #include <sta_info.h>
111 #include <rtw_event.h>
112 #include <rtw_mlme_ext.h>
113 #include <rtw_sec_cam.h>
114 #include <rtw_mi.h>
115 #include <rtw_ap.h>
116 #include <rtw_csa.h>
117 #ifdef CONFIG_RTW_WDS
118 #include "../core/wds/rtw_wds.h"
119 #endif
120 #ifdef CONFIG_RTW_MESH
121 #include "../core/mesh/rtw_mesh.h"
122 #endif
123 #ifdef CONFIG_WIFI_MONITOR
124 #include "../core/monitor/rtw_radiotap.h"
125 #endif
126
127 #include <rtw_version.h>
128
129 #include <rtw_p2p.h>
130
131 #ifdef CONFIG_TDLS
132 #include <rtw_tdls.h>
133 #endif /* CONFIG_TDLS */
134
135 #ifdef CONFIG_WAPI_SUPPORT
136 #include <rtw_wapi.h>
137 #endif /* CONFIG_WAPI_SUPPORT */
138
139 #ifdef CONFIG_MP_INCLUDED
140 #include <rtw_mp.h>
141 #include <rtw_efuse.h>
142 #endif /* CONFIG_MP_INCLUDED */
143
144 #ifdef CONFIG_BR_EXT
145 #include <rtw_br_ext.h>
146 #endif /* CONFIG_BR_EXT */
147
148 #include <ip.h>
149 #include <if_ether.h>
150 #include <ethernet.h>
151 #include <circ_buf.h>
152
153 #include <rtw_android.h>
154
155 #include <rtw_btc.h>
156
157 #define SPEC_DEV_ID_NONE BIT(0)
158 #define SPEC_DEV_ID_DISABLE_HT BIT(1)
159 #define SPEC_DEV_ID_ENABLE_PS BIT(2)
160 #define SPEC_DEV_ID_RF_CONFIG_1T1R BIT(3)
161 #define SPEC_DEV_ID_RF_CONFIG_2T2R BIT(4)
162 #define SPEC_DEV_ID_ASSIGN_IFNAME BIT(5)
163
164 #if defined(RTW_PHL_TX) || defined(RTW_PHL_RX)
165 //#define PHLRX_LOG(fmt, args...) printk("phl-rx [%s][%d]"fmt, __FUNCTION__,__LINE__, ## args)
166 #define PHLRX_LOG printk("phl-rx [%s][%d] \n", __FUNCTION__, __LINE__);
167 #define PHLRX_ENTER printk("phl-rx [%s][%d] ++\n", __FUNCTION__, __LINE__);
168 #define PHLRX_EXIT printk("phl-rx [%s][%d] --\n", __FUNCTION__, __LINE__);
169 #endif
170
171 struct specific_device_id {
172
173 u32 flags;
174
175 u16 idVendor;
176 u16 idProduct;
177
178 };
179
180 struct registry_priv {
181 u8 chip_version;
182 u8 rfintfs;
183 u8 lbkmode;
184 u8 hci;
185 NDIS_802_11_SSID ssid;
186 u8 network_mode; /* infra, ad-hoc, auto */
187 u8 channel;/* ad-hoc support requirement */
188 u8 wireless_mode;/* A, B, G, auto */
189 u8 band_type;
190 enum rtw_phl_scan_type scan_mode;/*scan methods - active, passive */
191 u8 radio_enable;
192 u8 preamble;/* long, short, auto */
193 u8 vrtl_carrier_sense;/* Enable, Disable, Auto */
194 u8 vcs_type;/* RTS/CTS, CTS-to-self */
195 u16 rts_thresh;
196 u8 hw_rts_en;
197 u16 frag_thresh;
198 u8 adhoc_tx_pwr;
199 u8 soft_ap;
200 u8 power_mgnt;
201 u8 ips_mode;
202 u8 lps_level;
203 #ifdef CONFIG_LPS_1T1R
204 u8 lps_1t1r;
205 #endif
206 u8 lps_chk_by_tp;
207 #ifdef CONFIG_WOWLAN
208 u8 wow_power_mgnt;
209 u8 wow_lps_level;
210 #ifdef CONFIG_LPS_1T1R
211 u8 wow_lps_1t1r;
212 #endif
213 #endif /* CONFIG_WOWLAN */
214 u8 smart_ps;
215 #ifdef CONFIG_WMMPS_STA
216 u8 wmm_smart_ps;
217 #endif /* CONFIG_WMMPS_STA */
218 u8 usb_rxagg_mode;
219 u8 dynamic_agg_enable;
220 u8 long_retry_lmt;
221 u8 short_retry_lmt;
222 u16 busy_thresh;
223 u16 max_bss_cnt;
224 u8 ack_policy;
225 u8 mp_mode;
226 #if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_RTW_CUSTOMER_STR)
227 u8 mp_customer_str;
228 #endif
229 u8 mp_dm;
230 u8 software_encrypt;
231 u8 software_decrypt;
232 #ifdef CONFIG_TX_EARLY_MODE
233 u8 early_mode;
234 #endif
235 #ifdef CONFIG_NARROWBAND_SUPPORTING
236 u8 rtw_nb_config;
237 #endif
238 u8 acm_method;
239 /* WMM */
240 u8 wmm_enable;
241 #ifdef CONFIG_WMMPS_STA
242 /* uapsd (unscheduled automatic power-save delivery) = a kind of wmmps */
243 u8 uapsd_max_sp_len;
244 /* BIT0: AC_VO UAPSD, BIT1: AC_VI UAPSD, BIT2: AC_BK UAPSD, BIT3: AC_BE UAPSD */
245 u8 uapsd_ac_enable;
246 #endif /* CONFIG_WMMPS_STA */
247
248 WLAN_BSSID_EX dev_network;
249
250 u8 tx_bw_mode;
251 #ifdef CONFIG_AP_MODE
252 u8 bmc_tx_rate;
253 #if CONFIG_RTW_AP_DATA_BMC_TO_UC
254 u8 ap_src_b2u_flags;
255 u8 ap_fwd_b2u_flags;
256 #endif
257 #endif
258
259 #ifdef CONFIG_RTW_MESH
260 #if CONFIG_RTW_MESH_DATA_BMC_TO_UC
261 u8 msrc_b2u_flags;
262 u8 mfwd_b2u_flags;
263 #endif
264 #endif
265
266 #ifdef CONFIG_80211N_HT
267 u8 ht_enable;
268 /* 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160MHz */
269 /* 2.4G use bit 0 ~ 3, 5G use bit 4 ~ 7 */
270 /* 0x21 means enable 2.4G 40MHz & 5G 80MHz */
271 u8 bw_mode;
272 u8 ampdu_enable;/* for tx */
273 u8 rx_ampdu_amsdu;/* Rx A-MPDU Supports A-MSDU is permitted */
274 u8 tx_ampdu_amsdu;/* Tx A-MPDU Supports A-MSDU is permitted */
275 u8 tx_quick_addba_req;
276 u8 rx_ampdu_sz_limit_by_nss_bw[4][4]; /* 1~4SS, BW20~BW160 */
277 /* Short GI support Bit Map */
278 /* BIT0 - 20MHz, 1: support, 0: non-support */
279 /* BIT1 - 40MHz, 1: support, 0: non-support */
280 /* BIT2 - 80MHz, 1: support, 0: non-support */
281 /* BIT3 - 160MHz, 1: support, 0: non-support */
282 u8 short_gi;
283 /* BIT0: Enable VHT LDPC Rx, BIT1: Enable VHT LDPC Tx, BIT4: Enable HT LDPC Rx, BIT5: Enable HT LDPC Tx */
284 u8 ldpc_cap;
285 /*
286 * BIT0: Enable VHT STBC Rx, BIT1: Enable VHT STBC Tx
287 * BIT4: Enable HT STBC Rx, BIT5: Enable HT STBC Tx
288 * BIT8: Enable HE STBC Rx, BIT9: Enable HE STBC Rx(greater than 80M)
289 * BIT10: Enable HE STBC Tx, BIT11: Enable HE STBC Tx(greater than 80M)
290 */
291 u16 stbc_cap;
292 #if defined(CONFIG_RTW_TX_NPATH_EN)
293 u8 tx_npath;
294 #endif
295 #if defined(CONFIG_RTW_PATH_DIV)
296 u8 path_div;
297 #endif
298 /*
299 * BIT0: Enable VHT SU Beamformer
300 * BIT1: Enable VHT SU Beamformee
301 * BIT2: Enable VHT MU Beamformer, depend on VHT SU Beamformer
302 * BIT3: Enable VHT MU Beamformee, depend on VHT SU Beamformee
303 * BIT4: Enable HT Beamformer
304 * BIT5: Enable HT Beamformee
305 */
306 u8 beamform_cap;
307 u8 dyn_txbf;
308 u8 beamformer_rf_num;
309 u8 beamformee_rf_num;
310 #endif /* CONFIG_80211N_HT */
311
312 #ifdef CONFIG_80211AC_VHT
313 u8 vht_enable; /* 0:disable, 1:enable, 2:auto */
314 u8 vht_24g_enable; /* 0:disable, 1:enable */
315 u8 ampdu_factor;
316 u8 vht_rx_mcs_map[2];
317 #endif /* CONFIG_80211AC_VHT */
318
319 #ifdef CONFIG_80211AX_HE
320 u8 he_enable; /* 0:disable, 1:enable, 2:auto */
321 #endif
322
323 u8 lowrate_two_xmit;
324
325 u8 low_power ;
326
327 u8 wifi_spec;/* !turbo_mode */
328
329 u8 rf_path; /*rf_config*/
330 u8 tx_nss;
331 u8 rx_nss;
332
333 #ifdef CONFIG_REGD_SRC_FROM_OS
334 enum regd_src_t regd_src;
335 #endif
336 char alpha2[2];
337 u8 channel_plan;
338 u8 excl_chs[MAX_CHANNEL_NUM_2G_5G];
339 #if CONFIG_IEEE80211_BAND_6GHZ
340 u8 channel_plan_6g;
341 u8 excl_chs_6g[MAX_CHANNEL_NUM_6G];
342 #endif
343 u8 full_ch_in_p2p_handshake; /* 0: reply only softap channel, 1: reply full channel list*/
344
345 #ifdef CONFIG_BTC
346 u8 btcoex;
347 u8 bt_iso;
348 u8 bt_sco;
349 u8 bt_ampdu;
350 u8 ant_num;
351 u8 single_ant_path;
352 #endif
353 BOOLEAN bAcceptAddbaReq;
354
355 u8 antdiv_cfg;
356 u8 antdiv_type;
357 u8 drv_ant_band_switch;
358
359 u8 switch_usb_mode;
360
361 u8 hw_wps_pbc;/* 0:disable,1:enable */
362
363 #ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE
364 char adaptor_info_caching_file_path[PATH_LENGTH_MAX];
365 #endif
366
367 #ifdef CONFIG_LAYER2_ROAMING
368 u8 max_roaming_times; /* the max number driver will try to roaming */
369 #endif
370
371 #ifdef CONFIG_80211D
372 u8 country_ie_slave_en_role;
373 u8 country_ie_slave_en_ifbmp;
374 #endif
375
376 u8 ifname[16];
377 u8 if2name[16];
378
379 /* for pll reference clock selction */
380 u8 pll_ref_clk_sel;
381
382 u8 target_tx_pwr_valid;
383 s8 target_tx_pwr_2g[RF_PATH_MAX][RATE_SECTION_NUM];
384 #if CONFIG_IEEE80211_BAND_5GHZ
385 s8 target_tx_pwr_5g[RF_PATH_MAX][RATE_SECTION_NUM - 1];
386 #endif
387
388 s8 TxBBSwing_2G;
389 s8 TxBBSwing_5G;
390 u8 AmplifierType_2G;
391 u8 AmplifierType_5G;
392 u8 bEn_RFE;
393 u8 RFE_Type;
394 u8 PowerTracking_Type;
395 u8 GLNA_Type;
396 u8 check_fw_ps;
397 u8 RegPwrTrimEnable;
398
399 #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
400 u8 load_phy_file;
401 u8 RegDecryptCustomFile;
402 #endif
403 #if defined(CONFIG_CONCURRENT_MODE) && !RTW_P2P_GROUP_INTERFACE
404 #ifdef CONFIG_P2P
405 u8 sel_p2p_iface;
406 #endif
407 #endif
408
409 #ifdef CONFIG_IGNORE_GO_AND_LOW_RSSI_IN_SCAN_LIST
410 u8 ignore_go_in_scan;
411 u8 ignore_low_rssi_in_scan;
412 #endif
413 u32 vo_edca;
414
415 u8 qos_opt_enable;
416
417 u8 hiq_filter;
418 u8 adaptivity_en;
419 u8 adaptivity_mode;
420 s8 adaptivity_th_l2h_ini;
421 s8 adaptivity_th_edcca_hl_diff;
422 u8 adaptivity_idle_probability;
423
424 u8 boffefusemask;
425 BOOLEAN bFileMaskEfuse;
426 BOOLEAN bBTFileMaskEfuse;
427 #ifdef CONFIG_RTW_ACS
428 u8 acs_auto_scan;
429 u8 acs_mode;
430 #endif
431
432 u32 reg_rxgain_offset_2g;
433 u32 reg_rxgain_offset_5gl;
434 u32 reg_rxgain_offset_5gm;
435 u32 reg_rxgain_offset_5gh;
436
437 #ifdef CONFIG_DFS_MASTER
438 u8 dfs_region_domain;
439 #endif
440
441 #ifdef CONFIG_RTW_NAPI
442 u8 en_napi;
443 #ifdef CONFIG_RTW_NAPI_DYNAMIC
444 u32 napi_threshold; /* unit: Mbps */
445 #endif /* CONFIG_RTW_NAPI_DYNAMIC */
446 #ifdef CONFIG_RTW_GRO
447 u8 en_gro;
448 #endif /* CONFIG_RTW_GRO */
449 #endif /* CONFIG_RTW_NAPI */
450
451 #ifdef CONFIG_WOWLAN
452 u8 wowlan_enable;
453 u8 wakeup_event;
454 u8 suspend_type;
455 #endif
456
457 u8 check_hw_status;
458 u8 wowlan_sta_mix_mode;
459
460 #ifdef CONFIG_PCI_HCI
461 u32 pci_aspm_config;
462 u32 pci_dynamic_aspm_linkctrl;
463 #endif
464
465 u8 iqk_fw_offload;
466 u8 ch_switch_offload;
467
468 #ifdef CONFIG_TDLS
469 u8 en_tdls;
470 #endif
471
472 #ifdef CONFIG_FW_OFFLOAD_PARAM_INIT
473 u8 fw_param_init;
474 #endif
475
476 #ifdef DBG_LA_MODE
477 u8 la_mode_en;
478 #endif
479 u32 phydm_ability;
480 u32 halrf_ability;
481 #ifdef CONFIG_TDMADIG
482 u8 tdmadig_en;
483 u8 tdmadig_mode;
484 u8 tdmadig_dynamic;
485 #endif/*CONFIG_TDMADIG*/
486 u8 en_dyn_rrsr;
487 u32 set_rrsr_value;
488 #ifdef CONFIG_RTW_MESH
489 u8 peer_alive_based_preq;
490 #endif
491
492 #ifdef RTW_BUSY_DENY_SCAN
493 /*
494 * scan_interval_thr means scan interval threshold which is used to
495 * judge if user is in scan page or not.
496 * If scan interval < scan_interval_thr we guess user is in scan page,
497 * and driver won't deny any scan request at that time.
498 * Its default value comes from compiler flag
499 * BUSY_TRAFFIC_SCAN_DENY_PERIOD, and unit is ms.
500 */
501 u32 scan_interval_thr;
502 #endif
503 u16 scan_pch_ex_time;
504 u8 deny_legacy;
505 #ifdef CONFIG_RTW_MULTI_AP
506 u8 unassoc_sta_mode_of_stype[UNASOC_STA_SRC_NUM];
507 u16 max_unassoc_sta_cnt;
508 #endif
509
510 #ifdef CONFIG_IOCTL_CFG80211
511 u16 roch_min_home_dur; /* min duration for op channel */
512 u16 roch_max_away_dur; /* max acceptable away duration for remain on channel */
513 u16 roch_extend_dur; /* minimum duration to stay in roch when mgnt tx */
514 #endif
515
516 #if defined(ROKU_PRIVATE) && defined(CONFIG_P2P)
517 unsigned long go_hidden_ssid_mode;
518 ATOMIC_T set_hide_ssid_timer;
519 #endif
520 u8 amsdu_mode;
521 };
522
523 /* For registry parameters */
524 #define RGTRY_OFT(field) ((u32)FIELD_OFFSET(struct registry_priv, field))
525 #define RGTRY_SZ(field) sizeof(((struct registry_priv *) 0)->field)
526
527 #define WOWLAN_IS_STA_MIX_MODE(_Adapter) (_Adapter->registrypriv.wowlan_sta_mix_mode)
528 #define BSSID_OFT(field) ((u32)FIELD_OFFSET(WLAN_BSSID_EX, field))
529 #define BSSID_SZ(field) sizeof(((PWLAN_BSSID_EX) 0)->field)
530
531 #define BW_MODE_2G(bw_mode) ((bw_mode) & 0x0F)
532 #define BW_MODE_5G(bw_mode) ((bw_mode) >> 4)
533 #ifdef CONFIG_80211N_HT
534 #define REGSTY_BW_2G(regsty) BW_MODE_2G((regsty)->bw_mode)
535 #define REGSTY_BW_5G(regsty) BW_MODE_5G((regsty)->bw_mode)
536 #else
537 #define REGSTY_BW_2G(regsty) CHANNEL_WIDTH_20
538 #define REGSTY_BW_5G(regsty) CHANNEL_WIDTH_20
539 #endif
540 #define REGSTY_IS_BW_2G_SUPPORT(regsty, bw) (REGSTY_BW_2G((regsty)) >= (bw))
541 #define REGSTY_IS_BW_5G_SUPPORT(regsty, bw) (REGSTY_BW_5G((regsty)) >= (bw))
542
543 #ifdef CONFIG_80211AC_VHT
544 #define REGSTY_IS_11AC_ENABLE(regsty) ((regsty)->vht_enable != 0)
545 #define REGSTY_IS_11AC_AUTO(regsty) ((regsty)->vht_enable == 2)
546 #define REGSTY_IS_11AC_24G_ENABLE(regsty) ((regsty)->vht_24g_enable != 0)
547 #else
548 #define REGSTY_IS_11AC_ENABLE(regsty) 0
549 #define REGSTY_IS_11AC_AUTO(regsty) 0
550 #define REGSTY_IS_11AC_24G_ENABLE(regsty) 0
551 #endif
552
553 #define REGSTY_IS_11AX_ENABLE(regsty) ((regsty)->he_enable != 0)
554 #define REGSTY_IS_11AX_AUTO(regsty) ((regsty)->he_enable == 2)
555
556 #ifdef CONFIG_REGD_SRC_FROM_OS
557 #define REGSTY_REGD_SRC_FROM_OS(regsty) ((regsty)->regd_src == REGD_SRC_OS)
558 #else
559 #define REGSTY_REGD_SRC_FROM_OS(regsty) 0
560 #endif
561
562 #ifdef CONFIG_SDIO_HCI
563 #include <drv_types_sdio.h>
564 #endif
565 #ifdef CONFIG_GSPI_HCI
566 #include <drv_types_gspi.h>
567 #endif
568 #ifdef CONFIG_PCI_HCI
569 #include <drv_types_pci.h>
570 #endif
571 #ifdef CONFIG_USB_HCI
572 #include <drv_types_usb.h>
573 #endif
574
575 #include <rtw_trx.h>
576
577 #define get_hw_port(adapter) (adapter->hw_port)
578 #ifdef CONFIG_CONCURRENT_MODE
579 #define is_primary_adapter(adapter) (adapter->adapter_type == PRIMARY_ADAPTER)
580 #define is_vir_adapter(adapter) (adapter->adapter_type == VIRTUAL_ADAPTER)
581 #else
582 #define is_primary_adapter(adapter) (1)
583 #define is_vir_adapter(adapter) (0)
584 #endif
585 #define GET_PRIMARY_ADAPTER(padapter) (((_adapter *)padapter)->dvobj->padapters[IFACE_ID0])
586 #define GET_IFACE_NUMS(padapter) (((_adapter *)padapter)->dvobj->iface_nums)
587 #define GET_ADAPTER(padapter, iface_id) (((_adapter *)padapter)->dvobj->padapters[iface_id])
588
589
590 #ifdef RTW_PHL_TX
591
592 #if 1
593 #define PHLTX_ENTER //printk("eric-tx [%s][%d] ++\n", __FUNCTION__, __LINE__)
594 #define PHLTX_LOG //printk("eric-tx [%s][%d]\n", __FUNCTION__, __LINE__)
595 #define PHLTX_EXIT //printk("eric-tx [%s][%d] --\n", __FUNCTION__, __LINE__)
596 #define PHLTX_ERR //printk("PHLTX_ERR [%s][%d]\n", __FUNCTION__, __LINE__)
597 #else
598 #define PHLTX_ENTER printk("eric-tx [%s][%d] ++\n", __FUNCTION__, __LINE__)
599 #define PHLTX_LOG printk("eric-tx [%s][%d]\n", __FUNCTION__, __LINE__)
600 #define PHLTX_EXIT printk("eric-tx [%s][%d] --\n", __FUNCTION__, __LINE__)
601
602 #define PHLTX_ERR printk("PHLTX_ERR [%s][%d]\n", __FUNCTION__, __LINE__)
603 #endif
604
605
606 #define SZ_TXREQ (sizeof(struct rtw_xmit_req))
607 #define SZ_HEAD_BUF 100
608 #define SZ_TAIL_BUF 30
609
610 #define NUM_PKT_LIST_PER_TXREQ 8
611 #define SZ_PKT_LIST (sizeof(struct rtw_pkt_buf_list))
612
613
614 #define SZ_TX_RING (SZ_TXREQ+SZ_HEAD_BUF+SZ_TAIL_BUF+(SZ_PKT_LIST*NUM_PKT_LIST_PER_TXREQ))
615 #define SZ_MGT_RING (SZ_TXREQ + SZ_PKT_LIST)/* MGT_TXREQ_QMGT */
616
617 #define MAX_TX_RING_NUM 4096
618 #endif
619
620
621 enum _IFACE_ID {
622 IFACE_ID0, /*PRIMARY_ADAPTER*/
623 IFACE_ID1,
624 IFACE_ID2,
625 IFACE_ID3,
626 IFACE_ID4,
627 IFACE_ID5,
628 IFACE_ID6,
629 IFACE_ID7,
630 IFACE_ID_MAX,
631 };
632
633 #define VIF_START_ID 1
634
635 #ifdef CONFIG_DBG_COUNTER
636 struct rx_logs {
637 u32 intf_rx;
638 u32 intf_rx_err_recvframe;
639 u32 intf_rx_err_skb;
640 u32 intf_rx_report;
641 u32 core_rx;
642 u32 core_rx_pre;
643 u32 core_rx_pre_ver_err;
644 u32 core_rx_pre_mgmt;
645 u32 core_rx_pre_mgmt_err_80211w;
646 u32 core_rx_pre_mgmt_err;
647 u32 core_rx_pre_ctrl;
648 u32 core_rx_pre_ctrl_err;
649 u32 core_rx_pre_data;
650 u32 core_rx_pre_data_wapi_seq_err;
651 u32 core_rx_pre_data_wapi_key_err;
652 u32 core_rx_pre_data_handled;
653 u32 core_rx_pre_data_err;
654 u32 core_rx_pre_data_unknown;
655 u32 core_rx_pre_unknown;
656 u32 core_rx_enqueue;
657 u32 core_rx_dequeue;
658 u32 core_rx_post;
659 u32 core_rx_post_decrypt;
660 u32 core_rx_post_decrypt_wep;
661 u32 core_rx_post_decrypt_tkip;
662 u32 core_rx_post_decrypt_aes;
663 u32 core_rx_post_decrypt_wapi;
664 u32 core_rx_post_decrypt_gcmp;
665 u32 core_rx_post_decrypt_hw;
666 u32 core_rx_post_decrypt_unknown;
667 u32 core_rx_post_decrypt_err;
668 u32 core_rx_post_defrag_err;
669 u32 core_rx_post_portctrl_err;
670 u32 core_rx_post_indicate;
671 u32 core_rx_post_indicate_in_oder;
672 u32 core_rx_post_indicate_reoder;
673 u32 core_rx_post_indicate_err;
674 u32 os_indicate;
675 u32 os_indicate_ap_mcast;
676 u32 os_indicate_ap_forward;
677 u32 os_indicate_ap_self;
678 u32 os_indicate_err;
679 u32 os_netif_ok;
680 u32 os_netif_err;
681 };
682
683 struct tx_logs {
684 u32 os_tx;
685 u32 os_tx_err_up;
686 u32 os_tx_err_xmit;
687 u32 os_tx_m2u;
688 u32 os_tx_m2u_ignore_fw_linked;
689 u32 os_tx_m2u_ignore_self;
690 u32 os_tx_m2u_entry;
691 u32 os_tx_m2u_entry_err_xmit;
692 u32 os_tx_m2u_entry_err_skb;
693 u32 os_tx_m2u_stop;
694 u32 core_tx;
695 u32 core_tx_err_pxmitframe;
696 u32 core_tx_err_brtx;
697 u32 core_tx_upd_attrib;
698 u32 core_tx_upd_attrib_adhoc;
699 u32 core_tx_upd_attrib_sta;
700 u32 core_tx_upd_attrib_ap;
701 u32 core_tx_upd_attrib_unknown;
702 u32 core_tx_upd_attrib_dhcp;
703 u32 core_tx_upd_attrib_icmp;
704 u32 core_tx_upd_attrib_active;
705 u32 core_tx_upd_attrib_err_ucast_sta;
706 u32 core_tx_upd_attrib_err_ucast_ap_link;
707 u32 core_tx_upd_attrib_err_sta;
708 u32 core_tx_upd_attrib_err_link;
709 u32 core_tx_upd_attrib_err_sec;
710 u32 core_tx_ap_enqueue_warn_fwstate;
711 u32 core_tx_ap_enqueue_warn_sta;
712 u32 core_tx_ap_enqueue_warn_nosta;
713 u32 core_tx_ap_enqueue_warn_link;
714 u32 core_tx_ap_enqueue_warn_trigger;
715 u32 core_tx_ap_enqueue_mcast;
716 u32 core_tx_ap_enqueue_ucast;
717 u32 core_tx_ap_enqueue;
718 u32 intf_tx;
719 u32 intf_tx_pending_ac;
720 u32 intf_tx_pending_fw_under_survey;
721 u32 intf_tx_pending_fw_under_linking;
722 u32 intf_tx_pending_xmitbuf;
723 u32 intf_tx_enqueue;
724 u32 core_tx_enqueue;
725 u32 core_tx_enqueue_class;
726 u32 core_tx_enqueue_class_err_sta;
727 u32 core_tx_enqueue_class_err_nosta;
728 u32 core_tx_enqueue_class_err_fwlink;
729 u32 intf_tx_direct;
730 u32 intf_tx_direct_err_coalesce;
731 u32 intf_tx_dequeue;
732 u32 intf_tx_dequeue_err_coalesce;
733 u32 intf_tx_dump_xframe;
734 u32 intf_tx_dump_xframe_err_txdesc;
735 u32 intf_tx_dump_xframe_err_port;
736 };
737
738 struct int_logs {
739 u32 all;
740 u32 err;
741 u32 tbdok;
742 u32 tbder;
743 u32 bcnderr;
744 u32 bcndma;
745 u32 bcndma_e;
746 u32 rx;
747 u32 rx_rdu;
748 u32 rx_fovw;
749 u32 txfovw;
750 u32 mgntok;
751 u32 highdok;
752 u32 bkdok;
753 u32 bedok;
754 u32 vidok;
755 u32 vodok;
756 };
757
758 #endif /* CONFIG_DBG_COUNTER */
759
760 #ifdef RTW_DETECT_HANG
761 struct fw_hang_info {
762 u8 dbg_is_fw_hang;
763 u8 dbg_is_fw_gone;
764 };
765
766 struct rxff_hang_info {
767 u8 dbg_is_rxff_hang;
768 u8 rx_ff_hang_cnt;
769 };
770
771 struct hang_info {
772 u32 enter_cnt;
773 struct rxff_hang_info dbg_rxff_hang_info;
774 struct fw_hang_info dbg_fw_hang_info;
775 };
776 #endif /* RTW_DETECT_HANG */
777
778 struct debug_priv {
779 u32 dbg_sdio_free_irq_error_cnt;
780 u32 dbg_sdio_alloc_irq_error_cnt;
781 u32 dbg_sdio_free_irq_cnt;
782 u32 dbg_sdio_alloc_irq_cnt;
783 u32 dbg_sdio_deinit_error_cnt;
784 u32 dbg_sdio_init_error_cnt;
785 u32 dbg_suspend_error_cnt;
786 u32 dbg_suspend_cnt;
787 u32 dbg_resume_cnt;
788 u32 dbg_resume_error_cnt;
789 u32 dbg_deinit_fail_cnt;
790 u32 dbg_carddisable_cnt;
791 u32 dbg_carddisable_error_cnt;
792 u32 dbg_ps_insuspend_cnt;
793 u32 dbg_dev_unload_inIPS_cnt;
794 u32 dbg_wow_leave_ps_fail_cnt;
795 u32 dbg_scan_pwr_state_cnt;
796 u32 dbg_downloadfw_pwr_state_cnt;
797 u32 dbg_fw_read_ps_state_fail_cnt;
798 u32 dbg_leave_ips_fail_cnt;
799 u32 dbg_leave_lps_fail_cnt;
800 u32 dbg_h2c_leave32k_fail_cnt;
801 u32 dbg_diswow_dload_fw_fail_cnt;
802 u32 dbg_enwow_dload_fw_fail_cnt;
803 u32 dbg_ips_drvopen_fail_cnt;
804 u32 dbg_poll_fail_cnt;
805 u32 dbg_rpwm_toogle_cnt;
806 u32 dbg_rpwm_timeout_fail_cnt;
807 u32 dbg_sreset_cnt;
808 u32 dbg_fw_mem_dl_error_cnt;
809 u64 dbg_rx_fifo_last_overflow;
810 u64 dbg_rx_fifo_curr_overflow;
811 u64 dbg_rx_fifo_diff_overflow;
812 #ifdef RTW_DETECT_HANG
813 struct hang_info dbg_hang_info;
814 #endif
815 };
816
817 struct rtw_traffic_statistics {
818 /* tx statistics */
819 u64 tx_bytes;
820 u64 tx_pkts;
821 u64 tx_drop;
822 u64 cur_tx_bytes;
823 u64 last_tx_bytes;
824 u32 cur_tx_tp; /* Tx throughput in Mbps. */
825
826 /* rx statistics */
827 u64 rx_bytes;
828 u64 rx_pkts;
829 u64 rx_drop;
830 u64 cur_rx_bytes;
831 u64 last_rx_bytes;
832 u32 cur_rx_tp; /* Rx throughput in Mbps. */
833 };
834
835 #define SEC_CAP_CHK_EXTRA_SEC BIT1 /* 256 bit */
836
837 #define KEY_FMT "%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x"
838 #define KEY_ARG(x) ((u8 *)(x))[0], ((u8 *)(x))[1], ((u8 *)(x))[2], ((u8 *)(x))[3], ((u8 *)(x))[4], ((u8 *)(x))[5], \
839 ((u8 *)(x))[6], ((u8 *)(x))[7], ((u8 *)(x))[8], ((u8 *)(x))[9], ((u8 *)(x))[10], ((u8 *)(x))[11], \
840 ((u8 *)(x))[12], ((u8 *)(x))[13], ((u8 *)(x))[14], ((u8 *)(x))[15]
841
842
843
844 /* used for rf_ctl_t.rate_bmp_cck_ofdm */
845 #define RATE_BMP_CCK 0x000F
846 #define RATE_BMP_OFDM 0xFFF0
847 #define RATE_BMP_HAS_CCK(_bmp_cck_ofdm) (_bmp_cck_ofdm & RATE_BMP_CCK)
848 #define RATE_BMP_HAS_OFDM(_bmp_cck_ofdm) (_bmp_cck_ofdm & RATE_BMP_OFDM)
849 #define RATE_BMP_GET_CCK(_bmp_cck_ofdm) (_bmp_cck_ofdm & RATE_BMP_CCK)
850 #define RATE_BMP_GET_OFDM(_bmp_cck_ofdm) ((_bmp_cck_ofdm & RATE_BMP_OFDM) >> 4)
851
852 /* used for rf_ctl_t.rate_bmp_ht_by_bw */
853 #define RATE_BMP_HT_1SS 0x000000FF
854 #define RATE_BMP_HT_2SS 0x0000FF00
855 #define RATE_BMP_HT_3SS 0x00FF0000
856 #define RATE_BMP_HT_4SS 0xFF000000
857 #define RATE_BMP_HAS_HT_1SS(_bmp_ht) (_bmp_ht & RATE_BMP_HT_1SS)
858 #define RATE_BMP_HAS_HT_2SS(_bmp_ht) (_bmp_ht & RATE_BMP_HT_2SS)
859 #define RATE_BMP_HAS_HT_3SS(_bmp_ht) (_bmp_ht & RATE_BMP_HT_3SS)
860 #define RATE_BMP_HAS_HT_4SS(_bmp_ht) (_bmp_ht & RATE_BMP_HT_4SS)
861 #define RATE_BMP_GET_HT_1SS(_bmp_ht) (_bmp_ht & RATE_BMP_HT_1SS)
862 #define RATE_BMP_GET_HT_2SS(_bmp_ht) ((_bmp_ht & RATE_BMP_HT_2SS) >> 8)
863 #define RATE_BMP_GET_HT_3SS(_bmp_ht) ((_bmp_ht & RATE_BMP_HT_3SS) >> 16)
864 #define RATE_BMP_GET_HT_4SS(_bmp_ht) ((_bmp_ht & RATE_BMP_HT_4SS) >> 24)
865
866 /* used for rf_ctl_t.rate_bmp_vht_by_bw */
867 #define RATE_BMP_VHT_1SS 0x00000003FF
868 #define RATE_BMP_VHT_2SS 0x00000FFC00
869 #define RATE_BMP_VHT_3SS 0x003FF00000
870 #define RATE_BMP_VHT_4SS 0xFFC0000000
871 #define RATE_BMP_HAS_VHT_1SS(_bmp_vht) (_bmp_vht & RATE_BMP_VHT_1SS)
872 #define RATE_BMP_HAS_VHT_2SS(_bmp_vht) (_bmp_vht & RATE_BMP_VHT_2SS)
873 #define RATE_BMP_HAS_VHT_3SS(_bmp_vht) (_bmp_vht & RATE_BMP_VHT_3SS)
874 #define RATE_BMP_HAS_VHT_4SS(_bmp_vht) (_bmp_vht & RATE_BMP_VHT_4SS)
875 #define RATE_BMP_GET_VHT_1SS(_bmp_vht) ((u16)(_bmp_vht & RATE_BMP_VHT_1SS))
876 #define RATE_BMP_GET_VHT_2SS(_bmp_vht) ((u16)((_bmp_vht & RATE_BMP_VHT_2SS) >> 10))
877 #define RATE_BMP_GET_VHT_3SS(_bmp_vht) ((u16)((_bmp_vht & RATE_BMP_VHT_3SS) >> 20))
878 #define RATE_BMP_GET_VHT_4SS(_bmp_vht) ((u16)((_bmp_vht & RATE_BMP_VHT_4SS) >> 30))
879
880 #define TXPWR_LMT_REF_VHT_FROM_HT BIT0
881 #define TXPWR_LMT_REF_HT_FROM_VHT BIT1
882
883 #define TXPWR_LMT_HAS_CCK_1T BIT0
884 #define TXPWR_LMT_HAS_CCK_2T BIT1
885 #define TXPWR_LMT_HAS_CCK_3T BIT2
886 #define TXPWR_LMT_HAS_CCK_4T BIT3
887 #define TXPWR_LMT_HAS_OFDM_1T BIT4
888 #define TXPWR_LMT_HAS_OFDM_2T BIT5
889 #define TXPWR_LMT_HAS_OFDM_3T BIT6
890 #define TXPWR_LMT_HAS_OFDM_4T BIT7
891
892 #define OFFCHS_NONE 0
893 #define OFFCHS_LEAVING_OP 1
894 #define OFFCHS_LEAVE_OP 2
895 #define OFFCHS_BACKING_OP 3
896
897 #define COUNTRY_IE_SLAVE_EN_ROLE_STA BIT0 /* pure STA mode */
898 #define COUNTRY_IE_SLAVE_EN_ROLE_GC BIT1 /* P2P group client */
899
900 struct rf_ctl_t {
901 bool disable_sw_chplan;
902 enum regd_src_t regd_src;
903 enum rtw_regd_inr regd_inr;
904 char alpha2[2];
905 u8 ChannelPlan;
906 #if CONFIG_IEEE80211_BAND_6GHZ
907 u8 chplan_6g;
908 #endif
909 u8 edcca_mode_2g_override;
910 #if CONFIG_IEEE80211_BAND_5GHZ
911 u8 edcca_mode_5g_override;
912 #endif
913 #if CONFIG_IEEE80211_BAND_6GHZ
914 u8 edcca_mode_6g_override;
915 #endif
916 #if CONFIG_TXPWR_LIMIT
917 u8 txpwr_lmt_override;
918 #endif
919
920 #if defined(CONFIG_80211AX_HE) || defined(CONFIG_80211AC_VHT)
921 u8 proto_en;
922 #endif
923
924 /* initial channel plan selectors */
925 char init_alpha2[2];
926 u8 init_ChannelPlan;
927 #if CONFIG_IEEE80211_BAND_6GHZ
928 u8 init_chplan_6g;
929 #endif
930
931 /* channel plan selectors by user */
932 char user_alpha2[2]; /* "\x00\x00" is not set */
933 u8 user_ChannelPlan;
934 #if CONFIG_IEEE80211_BAND_6GHZ
935 u8 user_chplan_6g;
936 #endif
937
938 #ifdef CONFIG_80211D
939 u8 country_ie_slave_en_role;
940 u8 country_ie_slave_en_ifbmp;
941
942 struct country_ie_slave_record cisr[CONFIG_IFACE_NUMBER];
943 u8 effected_cisr_id;
944 #endif
945
946 u8 max_chan_nums;
947 RT_CHANNEL_INFO channel_set[MAX_CHANNEL_NUM];
948 struct op_class_pref_t **spt_op_class_ch;
949 u8 cap_spt_op_class_num;
950 u8 reg_spt_op_class_num;
951 u8 cur_spt_op_class_num;
952 struct p2p_channels channel_list;
953
954 u8 op_class;
955 u8 op_ch;
956 s16 op_txpwr_max; /* mBm */
957 u8 if_op_class[CONFIG_IFACE_NUMBER];
958 u8 if_op_ch[CONFIG_IFACE_NUMBER];
959
960 _mutex offch_mutex;
961 u8 offch_state;
962
963 /* used for debug or by tx power limit */
964 u16 rate_bmp_cck_ofdm; /* 20MHz */
965 u32 rate_bmp_ht_by_bw[2]; /* 20MHz, 40MHz. 4SS supported */
966 u64 rate_bmp_vht_by_bw[4]; /* 20MHz, 40MHz, 80MHz, 160MHz. 4SS supported */
967
968 #if CONFIG_TXPWR_LIMIT
969 u8 highest_ht_rate_bw_bmp;
970 u8 highest_vht_rate_bw_bmp;
971 #endif
972
973 bool ch_sel_within_same_band;
974
975 u8 edcca_mode_2g;
976 #if CONFIG_IEEE80211_BAND_5GHZ
977 u8 edcca_mode_5g;
978 #endif
979 #if CONFIG_IEEE80211_BAND_6GHZ
980 u8 edcca_mode_6g;
981 #endif
982 enum band_type last_edcca_mode_op_band;
983
984 #if CONFIG_DFS
985 u8 csa_mode;
986 u8 csa_switch_cnt;
987
988 /* @csa_ch_width definition from 802.11 spec
989 * 0 for 20 MHz or 40 MHz
990 * 1 for 80 MHz, 160 MHz or 80+80 MHz
991 * 2 for 160 MHz
992 * 3 for non-contiguous 80+80 MHz
993 */
994 u8 csa_ch_width;
995 struct rtw_chan_def csa_chandef;
996
997 #ifdef CONFIG_DFS_MASTER
998 u8 dfs_region_domain;
999 _timer radar_detect_timer;
1000 bool radar_detect_by_others;
1001 u8 radar_detect_enabled;
1002 bool radar_detected;
1003
1004 u8 radar_detect_ch;
1005 u8 radar_detect_bw;
1006 u8 radar_detect_offset;
1007
1008 systime cac_start_time;
1009 systime cac_end_time;
1010 u8 cac_force_stop;
1011
1012 #if CONFIG_DFS_SLAVE_WITH_RADAR_DETECT
1013 u8 dfs_slave_with_rd;
1014 #endif
1015 u8 dfs_ch_sel_e_flags;
1016 u8 dfs_ch_sel_d_flags;
1017
1018 u8 dbg_dfs_fake_radar_detect_cnt;
1019 u8 dbg_dfs_radar_detect_trigger_non;
1020 u8 dbg_dfs_choose_dfs_ch_first;
1021 #endif /* CONFIG_DFS_MASTER */
1022 #endif /* CONFIG_DFS */
1023 #ifdef CONFIG_RTW_MBO
1024 struct npref_ch_rtp ch_rtp;
1025 #endif
1026 };
1027
1028 struct wow_ctl_t {
1029 u8 wow_cap;
1030 };
1031
1032 #define WOW_CAP_TKIP_OL BIT0
1033
1034 #define RFCTL_REG_WORLDWIDE(rfctl) (IS_ALPHA2_WORLDWIDE(rfctl->alpha2))
1035 #define RFCTL_REG_ALPHA2_UNSPEC(rfctl) (IS_ALPHA2_UNSPEC(rfctl->alpha2)) /* ex: only domain code is specified */
1036
1037 #ifdef CONFIG_80211AC_VHT
1038 #define RFCTL_REG_EN_11AC(rfctl) (((rfctl)->proto_en & CHPLAN_PROTO_EN_AC) ? 1 : 0)
1039 #else
1040 #define RFCTL_REG_EN_11AC(rfctl) 0
1041 #endif
1042
1043 #ifdef CONFIG_80211AX_HE
1044 #define RFCTL_REG_EN_11AX(rfctl) (((rfctl)->proto_en & CHPLAN_PROTO_EN_AX) ? 1 : 0)
1045 #else
1046 #define RFCTL_REG_EN_11AX(rfctl) 0
1047 #endif
1048
1049 #define RTW_CAC_STOPPED 0
1050 #ifdef CONFIG_DFS_MASTER
1051 #define IS_CAC_STOPPED(rfctl) ((rfctl)->cac_end_time == RTW_CAC_STOPPED)
1052 #define IS_CH_WAITING(rfctl) (!IS_CAC_STOPPED(rfctl) && rtw_time_after((rfctl)->cac_end_time, rtw_get_current_time()))
1053 #define IS_UNDER_CAC(rfctl) (IS_CH_WAITING(rfctl) && rtw_time_after(rtw_get_current_time(), (rfctl)->cac_start_time))
1054 #define IS_RADAR_DETECTED(rfctl) ((rfctl)->radar_detected)
1055 #else
1056 #define IS_CAC_STOPPED(rfctl) 1
1057 #define IS_CH_WAITING(rfctl) 0
1058 #define IS_UNDER_CAC(rfctl) 0
1059 #define IS_RADAR_DETECTED(rfctl) 0
1060 #endif /* CONFIG_DFS_MASTER */
1061
1062 #if CONFIG_DFS_SLAVE_WITH_RADAR_DETECT
1063 #define IS_DFS_SLAVE_WITH_RD(rfctl) ((rfctl)->dfs_slave_with_rd)
1064 #else
1065 #define IS_DFS_SLAVE_WITH_RD(rfctl) 0
1066 #endif
1067
1068
1069 #ifdef CONFIG_USB_HCI
1070
1071 struct trx_urb_buf_q {
1072 _queue free_urb_buf_queue;
1073 u8 *alloc_urb_buf;
1074 u8 *urb_buf;
1075 uint free_urb_buf_cnt;
1076 };
1077
1078 struct data_urb {
1079 _list list;
1080 struct urb *urb;
1081 u8 bulk_id;
1082 u8 minlen;
1083 };
1084
1085 #endif
1086
1087 struct trx_data_buf_q {
1088 _queue free_data_buf_queue;
1089 u8 *alloc_data_buf;
1090 u8 *data_buf;
1091 uint free_data_buf_cnt;
1092 };
1093
1094
1095 struct lite_data_buf {
1096 _list list;
1097 struct dvobj_priv *dvobj;
1098 u16 buf_tag;
1099 u8 *pbuf;
1100 u8 *phl_buf_ptr; /*point to phl rtw_usb_buf from phl*/
1101 #ifdef CONFIG_USB_HCI
1102 struct data_urb *dataurb;
1103 #endif
1104 struct submit_ctx *sctx;
1105
1106 };
1107
1108 #ifdef CONFIG_DRV_FAKE_AP
1109 struct fake_ap {
1110 struct sk_buff_head rxq; /* RX queue */
1111 _workitem work;
1112 struct rtw_timer_list bcn_timer;
1113 };
1114 #endif /* CONFIG_DRV_FAKE_AP */
1115
1116 /*device object*/
1117 struct dvobj_priv {
1118 /*-------- below is common data --------*/
1119 ATOMIC_T bSurpriseRemoved;
1120 ATOMIC_T bDriverStopped;
1121 ATOMIC_T hw_start;
1122 s32 processing_dev_remove;
1123
1124 _mutex hw_init_mutex;
1125 _mutex ioctrl_mutex;
1126 _mutex setch_mutex;
1127 _mutex setbw_mutex;
1128 _mutex rf_read_reg_mutex;
1129
1130 _adapter *padapters[CONFIG_IFACE_NUMBER];/*IFACE_ID_MAX*/
1131 u8 virtual_iface_num;/*from registary*/
1132 u8 iface_nums; /* total number of ifaces used runtime */
1133 struct mi_state iface_state;
1134
1135 enum rtl_ic_id ic_id;
1136 enum rtw_hci_type interface_type;/*USB,SDIO,SPI,PCI*/
1137
1138 /*CONFIG_PHL_ARCH*/
1139 void *phl;
1140 struct rtw_phl_com_t *phl_com;
1141 #ifdef DBG_PHL_MEM_ALLOC
1142 ATOMIC_T phl_mem;
1143 #endif
1144
1145 struct rf_ctl_t rf_ctl;
1146 /* move to phl */
1147 /* struct macid_ctl_t macid_ctl; *//*shared HW resource*/
1148 struct cam_ctl_t cam_ctl;/*sec-cam shared HW resource*/
1149 struct sec_cam_ent cam_cache[SEC_CAM_ENT_NUM_SW_LIMIT];
1150 struct wow_ctl_t wow_ctl;
1151
1152
1153 /****** Band info may be x 2*********/
1154 /* saved channel info when call set_channel_bw */
1155 systime on_oper_ch_time;
1156
1157 u32 fa_cnt_acc[HW_BAND_MAX];
1158
1159 /****** hal dep info*********/
1160
1161
1162 ATOMIC_T continual_io_error;
1163 ATOMIC_T disable_func;
1164
1165 u8 xmit_block;
1166 _lock xmit_block_lock;
1167
1168 struct pwrctrl_priv pwrctl_priv;
1169 struct cmd_priv cmdpriv;
1170 struct recv_priv recvpriv;
1171 #ifdef CONFIG_WOWLAN
1172 struct wow_priv wowlan_priv;
1173 #endif /* CONFIG_WOWLAN */
1174
1175 struct rtw_traffic_statistics traffic_stat;
1176
1177 #ifdef PLATFORM_LINUX
1178 _thread_hdl_ rtnl_lock_holder;
1179
1180 #if defined(CONFIG_IOCTL_CFG80211)
1181 struct wiphy *wiphy;
1182 #endif
1183 #endif /* PLATFORM_LINUX */
1184
1185 #if 0 /*#ifdef CONFIG_CORE_DM_CHK_TIMER*/
1186 _timer dynamic_chk_timer; /* dynamic/periodic check timer */
1187 #endif
1188
1189 #ifdef CONFIG_RTW_NAPI_DYNAMIC
1190 u8 en_napi_dynamic;
1191 #endif /* CONFIG_RTW_NAPI_DYNAMIC */
1192
1193 #ifdef CONFIG_RTW_WIFI_HAL
1194 u32 nodfs;
1195 #endif
1196
1197 /*-------- below is for PCIE/USB/SDIO INTERFACE --------*/
1198 #ifdef CONFIG_SDIO_HCI
1199 SDIO_DATA sdio_data;
1200 #endif
1201 #ifdef CONFIG_GSPI_HCI
1202 GSPI_DATA gspi_data;
1203 #endif
1204 #ifdef CONFIG_PCI_HCI
1205 PCI_DATA pci_data;
1206 #endif
1207 #ifdef CONFIG_USB_HCI
1208 USB_DATA usb_data;
1209 #endif
1210
1211 struct rtw_intf_ops *intf_ops;
1212
1213 struct trx_data_buf_q litexmitbuf_q;
1214 struct trx_data_buf_q litexmit_extbuf_q;
1215 struct trx_data_buf_q literecvbuf_q;
1216
1217 /*-------- below is for USB INTERFACE --------*/
1218 #ifdef CONFIG_USB_HCI
1219 u8 Queue2Pipe[HW_QUEUE_ENTRY];/* for out pipe mapping */
1220 struct trx_urb_buf_q xmit_urb_q;
1221 struct trx_urb_buf_q recv_urb_q;
1222 #ifdef CONFIG_USB_INTERRUPT_IN_PIPE
1223 struct trx_data_buf_q intin_buf_q;
1224 struct trx_urb_buf_q intin_urb_q;
1225 ATOMIC_T rx_pending_cnt;/* urb counts for sumit to host */
1226 #endif
1227 #endif/* CONFIG_USB_HCI */
1228
1229 /*-------- below is for PCIE INTERFACE --------*/
1230 #ifdef CONFIG_PCI_HCI
1231
1232
1233 #endif/* CONFIG_PCI_HCI */
1234
1235 /* also for RTK T/P Testing Mode */
1236 u8 scan_deny;
1237
1238
1239 #ifdef CONFIG_RTW_CUSTOMER_STR
1240 _mutex customer_str_mutex;
1241 struct submit_ctx *customer_str_sctx;
1242 u8 customer_str[RTW_CUSTOMER_STR_LEN];
1243 #endif
1244
1245 struct debug_priv drv_dbg;
1246
1247 #ifdef CONFIG_DRV_FAKE_AP
1248 struct fake_ap fakeap;
1249 #endif /* CONFIG_DRV_FAKE_AP */
1250
1251 #ifdef CONFIG_FILE_FWIMG
1252 /* Placeholder for per physical adapter firmware file name.
1253 * Freddie ToDo: Move to phl_com as PHL/HAL common feature
1254 * should be placed there.
1255 */
1256 char fw_file[PATH_LENGTH_MAX];
1257 #endif
1258
1259 /* WPAS maintain from w1.fi */
1260 #define RTW_WPAS_W1FI 0x00
1261 /* WPAS maintain from android */
1262 #define RTW_WPAS_ANDROID 0x01
1263 u8 wpas_type;
1264 };
1265
1266 #define DEV_STA_NUM(_dvobj) MSTATE_STA_NUM(&((_dvobj)->iface_state))
1267 #define DEV_STA_LD_NUM(_dvobj) MSTATE_STA_LD_NUM(&((_dvobj)->iface_state))
1268 #define DEV_STA_LG_NUM(_dvobj) MSTATE_STA_LG_NUM(&((_dvobj)->iface_state))
1269 #define DEV_TDLS_LD_NUM(_dvobj) MSTATE_TDLS_LD_NUM(&((_dvobj)->iface_state))
1270 #define DEV_AP_NUM(_dvobj) MSTATE_AP_NUM(&((_dvobj)->iface_state))
1271 #define DEV_AP_STARTING_NUM(_dvobj) MSTATE_AP_STARTING_NUM(&((_dvobj)->iface_state))
1272 #define DEV_AP_LD_NUM(_dvobj) MSTATE_AP_LD_NUM(&((_dvobj)->iface_state))
1273 #define DEV_ADHOC_NUM(_dvobj) MSTATE_ADHOC_NUM(&((_dvobj)->iface_state))
1274 #define DEV_ADHOC_LD_NUM(_dvobj) MSTATE_ADHOC_LD_NUM(&((_dvobj)->iface_state))
1275 #define DEV_MESH_NUM(_dvobj) MSTATE_MESH_NUM(&((_dvobj)->iface_state))
1276 #define DEV_MESH_LD_NUM(_dvobj) MSTATE_MESH_LD_NUM(&((_dvobj)->iface_state))
1277 #define DEV_P2P_DV_NUM(_dvobj) MSTATE_P2P_DV_NUM(&((_dvobj)->iface_state))
1278 #define DEV_P2P_GC_NUM(_dvobj) MSTATE_P2P_GC_NUM(&((_dvobj)->iface_state))
1279 #define DEV_P2P_GO_NUM(_dvobj) MSTATE_P2P_GO_NUM(&((_dvobj)->iface_state))
1280 #define DEV_SCAN_NUM(_dvobj) MSTATE_SCAN_NUM(&((_dvobj)->iface_state))
1281 #define DEV_WPS_NUM(_dvobj) MSTATE_WPS_NUM(&((_dvobj)->iface_state))
1282 #define DEV_ROCH_NUM(_dvobj) MSTATE_ROCH_NUM(&((_dvobj)->iface_state))
1283 #define DEV_MGMT_TX_NUM(_dvobj) MSTATE_MGMT_TX_NUM(&((_dvobj)->iface_state))
1284 #define DEV_U_CH(_dvobj) MSTATE_U_CH(&((_dvobj)->iface_state))
1285 #define DEV_U_BW(_dvobj) MSTATE_U_BW(&((_dvobj)->iface_state))
1286 #define DEV_U_OFFSET(_dvobj) MSTATE_U_OFFSET(&((_dvobj)->iface_state))
1287
1288 #define dvobj_to_pwrctl(dvobj) (&(dvobj->pwrctl_priv))
1289 #ifdef CONFIG_WOWLAN
1290 #define dvobj_to_wowlan(dvobj) (&(dvobj->wowlan_priv))
1291 #endif /* CONFIG_WOWLAN */
1292 #define pwrctl_to_dvobj(pwrctl) container_of(pwrctl, struct dvobj_priv, pwrctl_priv)
1293 #define dvobj_to_macidctl(dvobj) (&(dvobj->macid_ctl))
1294 #define dvobj_to_sec_camctl(dvobj) (&(dvobj->cam_ctl))
1295 #define dvobj_to_regsty(dvobj) (&(dvobj->padapters[IFACE_ID0]->registrypriv))
1296 #if defined(CONFIG_IOCTL_CFG80211)
1297 #define dvobj_to_wiphy(dvobj) ((dvobj)->wiphy)
1298 #endif
1299 #define dvobj_to_rfctl(dvobj) (&(dvobj->rf_ctl))
1300 #define rfctl_to_dvobj(rfctl) container_of((rfctl), struct dvobj_priv, rf_ctl)
1301
1302 #ifdef CONFIG_PCI_HCI
dvobj_to_pci(struct dvobj_priv * dvobj)1303 static inline PCI_DATA *dvobj_to_pci(struct dvobj_priv *dvobj)
1304 {
1305 return &dvobj->pci_data;
1306 }
1307 #endif
1308 #ifdef CONFIG_USB_HCI
dvobj_to_usb(struct dvobj_priv * dvobj)1309 static inline USB_DATA *dvobj_to_usb(struct dvobj_priv *dvobj)
1310 {
1311 return &dvobj->usb_data;
1312 }
1313 #endif
1314 #ifdef CONFIG_SDIO_HCI
dvobj_to_sdio(struct dvobj_priv * dvobj)1315 static inline SDIO_DATA *dvobj_to_sdio(struct dvobj_priv *dvobj)
1316 {
1317 return &dvobj->sdio_data;
1318 }
1319 #endif
1320 #ifdef CONFIG_GSPI_HCI
dvobj_to_gspi(struct dvobj_priv * dvobj)1321 static inline GSPI_DATA *dvobj_to_gspi(struct dvobj_priv *dvobj)
1322 {
1323 return &dvobj->gspi_data;
1324 }
1325 #endif
1326
1327
1328 #ifdef PLATFORM_LINUX
dvobj_to_dev(struct dvobj_priv * dvobj)1329 static inline struct device *dvobj_to_dev(struct dvobj_priv *dvobj)
1330 {
1331 /* todo: get interface type from dvobj and the return the dev accordingly */
1332 #ifdef RTW_DVOBJ_CHIP_HW_TYPE
1333 #endif
1334
1335 #ifdef CONFIG_USB_HCI
1336 return &dvobj->usb_data.pusbintf->dev;
1337 #endif
1338 #ifdef CONFIG_SDIO_HCI
1339 return &dvobj->sdio_data.func->dev;
1340 #endif
1341 #ifdef CONFIG_GSPI_HCI
1342 return &dvobj->gspi_data.func->dev;
1343 #endif
1344 #ifdef CONFIG_PCI_HCI
1345 return &dvobj->pci_data.ppcidev->dev;
1346 #endif
1347 }
1348 #endif
1349
1350 _adapter *dvobj_get_unregisterd_adapter(struct dvobj_priv *dvobj);
1351 _adapter *dvobj_get_adapter_by_addr(struct dvobj_priv *dvobj, u8 *addr);
1352 #define dvobj_get_primary_adapter(dvobj) ((dvobj)->padapters[IFACE_ID0])
1353
1354
1355 enum _ADAPTER_TYPE {
1356 PRIMARY_ADAPTER,
1357 VIRTUAL_ADAPTER,
1358 MAX_ADAPTER = 0xFF,
1359 };
1360
1361 #ifdef CONFIG_RTW_NAPI
1362 enum _NAPI_STATE {
1363 NAPI_DISABLE = 0,
1364 NAPI_ENABLE = 1,
1365 };
1366 #endif
1367
1368 #if 0 /*#ifdef CONFIG_MAC_LOOPBACK_DRIVER*/
1369 typedef struct loopbackdata {
1370 _sema sema;
1371 _thread_hdl_ lbkthread;
1372 u8 bstop;
1373 u32 cnt;
1374 u16 size;
1375 u16 txsize;
1376 u8 txbuf[0x8000];
1377 u16 rxsize;
1378 u8 rxbuf[0x8000];
1379 u8 msg[100];
1380
1381 } LOOPBACKDATA, *PLOOPBACKDATA;
1382 #endif
1383
1384 #define ADAPTER_TX_BW_2G(adapter) BW_MODE_2G((adapter)->driver_tx_bw_mode)
1385 #define ADAPTER_TX_BW_5G(adapter) BW_MODE_5G((adapter)->driver_tx_bw_mode)
1386
1387 #ifdef RTW_PHL_DBG_CMD
1388 #define CORE_LOG_NUM (100)
1389 #define MAX_FRAG (4)
1390 #define INV_TXFORCE_VAL (0xFFFF)
1391
1392 enum _CORE_REC_DUMP {
1393 REC_DUMP_NO = 0,
1394 REC_DUMP_ALL,
1395 REC_DUMP_TX,
1396 REC_DUMP_RX,
1397 };
1398
1399 enum _CORE_REC_TYPE {
1400 REC_TX_MGMT = 0,
1401 REC_TX_DATA,
1402 REC_TX_PHL,
1403 REC_TX_PHL_RCC,
1404
1405 REC_RX_PHL,
1406 REC_RX_PHL_RCC,
1407 REC_RX_MGMT,
1408 REC_RX_DATA,
1409 REC_RX_DATA_RETRY,
1410 };
1411
1412 struct core_record {
1413 u32 type;
1414 u32 totalSz;
1415
1416 u32 wl_seq;
1417 u32 wl_type;
1418 u32 wl_subtype;
1419
1420 u8 fragNum;
1421 u32 fragLen[MAX_FRAG];
1422 void* virtAddr[MAX_FRAG];
1423 void* phyAddrL[MAX_FRAG];
1424 void* phyAddrH[MAX_FRAG];
1425 };
1426
1427 struct core_logs {
1428 u32 txCnt_all;
1429 u32 txCnt_data;
1430 u32 txCnt_mgmt;
1431 u32 txCnt_phl;
1432 u32 txSize_phl;
1433 u32 txCnt_recycle;
1434 u32 txSize_recycle;
1435 struct core_record drvTx[CORE_LOG_NUM];
1436 struct core_record phlTx[CORE_LOG_NUM];
1437 struct core_record txRcycle[CORE_LOG_NUM];
1438
1439 u32 rxCnt_phl;
1440 u32 rxSize_phl;
1441 u32 rxCnt_recycle;
1442 u32 rxSize_recycle;
1443 u32 rxCnt_data;
1444 u32 rxCnt_data_retry;
1445 u32 rxCnt_mgmt;
1446 u32 rxCnt_all;
1447 struct core_record drvRx[CORE_LOG_NUM];
1448 struct core_record phlRx[CORE_LOG_NUM];
1449 struct core_record rxRcycle[CORE_LOG_NUM];
1450 #ifdef CONFIG_RTW_CORE_RXSC
1451 u32 rxCnt_data_orig;
1452 u32 rxCnt_data_shortcut;
1453 #endif
1454 };
1455
1456 #define MAX_TXBD_SIZE 40
1457 #define MAX_TXWD_SIZE 128
1458 #define MAX_RXWD_SIZE 32
1459
1460
1461 enum _PHL_REC_TYPE {
1462 REC_TXBD = 0,
1463 REC_TXWD,
1464 REC_RXWD,
1465 REC_WP_RCC,
1466 REC_RX_MAP,
1467 REC_RX_UNMAP,
1468 REC_RX_AMPDU,
1469 };
1470
1471 struct record_txbd {
1472 u32 bd_len;
1473 u8 bd_buf[MAX_TXBD_SIZE];
1474 };
1475
1476 struct record_txwd {
1477 u32 wp_seq;
1478 u32 wd_len;
1479 u8 wd_buf[MAX_TXWD_SIZE];
1480 };
1481
1482 struct record_rxwd {
1483 u32 wd_len;
1484 u8 wd_buf[MAX_RXWD_SIZE];
1485 };
1486
1487 struct record_pci {
1488 u32 map_len;
1489 void *virtAddr;
1490 void* phyAddrL;
1491 void* phyAddrH;
1492 };
1493
1494 struct record_wp_rcc {
1495 u32 wp_seq;
1496 };
1497
1498 struct phl_logs {
1499 u32 txCnt_bd;
1500 u32 txCnt_wd;
1501 u32 txCnt_recycle;
1502
1503 struct record_txbd txBd[CORE_LOG_NUM];
1504 struct record_txwd txWd[CORE_LOG_NUM];
1505 struct record_wp_rcc wpRecycle[CORE_LOG_NUM];
1506
1507 u32 rxCnt_map;
1508 u32 rxSize_map;
1509 u32 rxCnt_unmap;
1510 u32 rxSize_unmap;
1511 struct record_pci rxPciMap[CORE_LOG_NUM];
1512 struct record_pci rxPciUnmap[CORE_LOG_NUM];
1513
1514 u32 rxCnt_wd;
1515 struct record_rxwd rxWd[CORE_LOG_NUM];
1516
1517 u32 rxCnt_ampdu;
1518 u32 rxAmpdu[CORE_LOG_NUM];
1519 };
1520
1521 #endif
1522
1523 enum _DIS_TURBO_EDCA {
1524 EN_TURBO = 0,
1525 DIS_TURBO,
1526 DIS_TURBO_USE_MANUAL,
1527 };
1528
1529 struct _ADAPTER {
1530 int pid[3];/*process id from UI, 0:wpa_supplicant, 1:hostapd, 2:dhcpcd*/
1531
1532 /*extend to support multi interface*/
1533 u8 iface_id;
1534 u8 isprimary; /* is primary adapter or not */
1535 /* notes:
1536 ** if isprimary is true, the adapter_type value is 0, iface_id is IFACE_ID0 for PRIMARY_ADAPTER
1537 ** if isprimary is false, the adapter_type value is 1, iface_id is IFACE_ID1 for VIRTUAL_ADAPTER
1538 ** refer to iface_id if iface_nums>2 and isprimary is false and the adapter_type value is 0xff.*/
1539 u8 adapter_type;/*be used in Multi-interface to recognize whether is PRIMARY_ADAPTER or not(PRIMARY_ADAPTER/VIRTUAL_ADAPTER) .*/
1540 u8 hw_port; /*interface port type, it depends on HW port */
1541
1542 u8 mac_addr[ETH_ALEN];
1543 /*CONFIG_PHL_ARCH*/
1544 struct rtw_wifi_role_t *phl_role;
1545 ATOMIC_T need_tsf_sync_done;
1546
1547 #ifdef CONFIG_HWSIM
1548 int bup_hwsim;
1549 #endif
1550
1551 u8 netif_up;
1552
1553 u8 registered;
1554 u8 ndev_unregistering;
1555
1556
1557 struct dvobj_priv *dvobj;
1558 struct mlme_priv mlmepriv;
1559 struct mlme_ext_priv mlmeextpriv;
1560 struct xmit_priv xmitpriv;
1561 struct recv_info recvinfo;/*rssi*/
1562 struct sta_priv stapriv;
1563 struct security_priv securitypriv;
1564 _lock security_key_mutex; /* add for CONFIG_IEEE80211W, none 11w also can use */
1565 struct registry_priv registrypriv;
1566
1567 #ifdef CONFIG_RTW_80211K
1568 struct rm_priv rmpriv;
1569 #endif
1570
1571 #ifdef CONFIG_MP_INCLUDED
1572 struct mp_priv mppriv;
1573 #endif
1574
1575 #ifdef CONFIG_AP_MODE
1576 struct hostapd_priv *phostapdpriv;
1577 u8 bmc_tx_rate;
1578 #ifdef CONFIG_AP_CMD_DISPR
1579 struct ap_cmd_dispr_priv *apcmd_dipsr_priv;
1580 u32 ap_start_cmd_token;
1581 u32 ap_stop_cmd_token;
1582 u8 ap_start_cmd_state;
1583 u8 ap_stop_cmd_state;
1584 #endif
1585 #if CONFIG_RTW_AP_DATA_BMC_TO_UC
1586 u8 b2u_flags_ap_src;
1587 u8 b2u_flags_ap_fwd;
1588 #endif
1589 #endif/*CONFIG_AP_MODE*/
1590
1591 u32 setband;
1592 ATOMIC_T bandskip;
1593
1594 #ifdef CONFIG_P2P
1595 struct wifidirect_info wdinfo;
1596 #endif /* CONFIG_P2P */
1597
1598 #ifdef CONFIG_TDLS
1599 struct tdls_info tdlsinfo;
1600 #endif /* CONFIG_TDLS */
1601
1602 #ifdef CONFIG_WFD
1603 struct wifi_display_info wfd_info;
1604 #endif /* CONFIG_WFD */
1605
1606 #ifdef CONFIG_RTW_NAPI
1607 struct napi_struct napi;
1608 u8 napi_state;
1609 #endif
1610
1611 #ifdef CONFIG_GPIO_API
1612 u8 pre_gpio_pin;
1613 struct gpio_int_priv {
1614 u8 interrupt_mode;
1615 u8 interrupt_enable_mask;
1616 void (*callback[8])(u8 level);
1617 } gpiointpriv;
1618 #endif
1619
1620 #if 0 /*#ifdef CONFIG_CORE_CMD_THREAD*/
1621 _thread_hdl_ cmdThread;
1622 #endif
1623
1624 #if 0 /*def CONFIG_XMIT_THREAD_MODE*/
1625 _thread_hdl_ xmitThread;
1626 #endif
1627 #ifdef CONFIG_RECV_THREAD_MODE
1628 _thread_hdl_ recvThread;
1629 #endif
1630
1631 #ifdef PLATFORM_LINUX
1632 #ifdef CONFIG_IOCTL_CFG80211
1633 struct cfg80211_roch_info cfg80211_rochinfo;
1634 #endif /* CONFIG_IOCTL_CFG80211 */
1635
1636 _nic_hdl pnetdev;
1637 char old_ifname[IFNAMSIZ];
1638
1639 /* used by rtw_rereg_nd_name related function */
1640 struct rereg_nd_name_data {
1641 _nic_hdl old_pnetdev;
1642 char old_ifname[IFNAMSIZ];
1643 u8 old_ips_mode;
1644 u8 old_bRegUseLed;
1645 } rereg_nd_name_priv;
1646
1647 struct net_device_stats stats;
1648 struct iw_statistics iwstats;
1649 struct proc_dir_entry *dir_dev;/* for proc directory */
1650 struct proc_dir_entry *dir_odm;
1651
1652 #ifdef CONFIG_IOCTL_CFG80211
1653 struct wireless_dev *rtw_wdev;
1654 struct rtw_wdev_priv wdev_data;
1655
1656 #endif /* CONFIG_IOCTL_CFG80211 */
1657
1658 #endif /* PLATFORM_LINUX */
1659
1660 #ifdef CONFIG_TX_AMSDU
1661 u8 tx_amsdu;
1662 u16 tx_amsdu_rate;
1663 #endif
1664
1665 #ifdef CONFIG_RTW_WDS
1666 bool use_wds; /* for STA, AP mode */
1667
1668 /* for STA mode */
1669 struct rtw_wds_gptr_table *wds_gpt_records;
1670 ATOMIC_T wds_gpt_record_num;
1671
1672 /* for AP mode */
1673 #ifdef CONFIG_AP_MODE
1674 struct rtw_wds_table *wds_paths;
1675 ATOMIC_T wds_path_num;
1676 #endif
1677 #endif /* CONFIG_RTW_WDS */
1678
1679 #ifdef CONFIG_RTW_MULTI_AP
1680 u8 multi_ap;
1681 u8 ch_util_threshold;
1682 #endif
1683
1684 #ifdef CONFIG_RTW_MESH
1685 struct rtw_mesh_cfg mesh_cfg;
1686 struct rtw_mesh_info mesh_info;
1687 _timer mesh_path_timer;
1688 _timer mesh_path_root_timer;
1689 _timer mesh_atlm_param_req_timer; /* airtime link metrics param request timer */
1690 _workitem mesh_work;
1691 unsigned long wrkq_flags;
1692 #endif /* CONFIG_RTW_MESH */
1693
1694 #ifdef CONFIG_RTW_TOKEN_BASED_XMIT
1695 ATOMIC_T tbtx_tx_pause;
1696 ATOMIC_T tbtx_remove_tx_pause;
1697 u8 tbtx_capability;
1698 u32 tbtx_duration;
1699 #endif /* CONFIG_RTW_TOKEN_BASED_XMIT */
1700
1701 #ifdef CONFIG_WAPI_SUPPORT
1702 u8 WapiSupport;
1703 RT_WAPI_T wapiInfo;
1704 #endif
1705
1706 #ifdef CONFIG_BR_EXT
1707 _lock br_ext_lock;
1708 /* unsigned int macclone_completed; */
1709 struct nat25_network_db_entry *nethash[NAT25_HASH_SIZE];
1710 int pppoe_connection_in_progress;
1711 unsigned char pppoe_addr[MACADDRLEN];
1712 unsigned char scdb_mac[MACADDRLEN];
1713 unsigned char scdb_ip[4];
1714 struct nat25_network_db_entry *scdb_entry;
1715 unsigned char br_mac[MACADDRLEN];
1716 unsigned char br_ip[4];
1717
1718 struct br_ext_info ethBrExtInfo;
1719 #endif /* CONFIG_BR_EXT */
1720
1721 #if 0 /*#ifdef CONFIG_MAC_LOOPBACK_DRIVER*/
1722 PLOOPBACKDATA ploopback;
1723 #endif
1724
1725 #ifdef PLATFORM_FREEBSD
1726 _nic_hdl pifp;
1727 _lock glock;
1728 #endif /* PLATFORM_FREEBSD */
1729
1730 /* for debug purpose */
1731 #define NO_FIX_RATE 0xFFFF
1732 #define GET_FIX_RATE(v) ((v) & 0x0FFF)
1733 #define GET_FIX_RATE_SGI(v) (((v) & 0x7000) >> 12)
1734 u16 fix_rate;
1735 #define NO_FIX_BW 0xFF
1736 u8 fix_bw;
1737 u8 data_fb; /* data rate fallback, valid only when fix_rate is not 0xffff */
1738 u8 power_offset;
1739 u8 driver_tx_bw_mode;
1740 u8 rsvd_page_offset;
1741 u8 rsvd_page_num;
1742 u8 ch_clm_ratio;
1743 u8 ch_nhm_ratio;
1744 #ifdef CONFIG_SUPPORT_FIFO_DUMP
1745 u8 fifo_sel;
1746 u32 fifo_addr;
1747 u32 fifo_size;
1748 #endif
1749
1750 u8 bLinkInfoDump;
1751 /* Added by Albert 2012/10/26 */
1752 /* The driver will show up the desired channel number when this flag is 1. */
1753 u8 bNotifyChannelChange;
1754 u8 bsta_tp_dump;
1755 #ifdef CONFIG_P2P
1756 /* Added by Albert 2012/12/06 */
1757 /* The driver will show the current P2P status when the upper application reads it. */
1758 u8 bShowGetP2PState;
1759 #endif
1760 u8 driver_vcs_en; /* Enable=1, Disable=0 driver control vrtl_carrier_sense for tx */
1761 u8 driver_vcs_type;/* force 0:disable VCS, 1:RTS-CTS, 2:CTS-to-self when vcs_en=1. */
1762 u8 driver_ampdu_spacing;/* driver control AMPDU Density for peer sta's rx */
1763 u8 driver_rx_ampdu_factor;/* 0xff: disable drv ctrl, 0:8k, 1:16k, 2:32k, 3:64k; */
1764 u8 driver_rx_ampdu_spacing; /* driver control Rx AMPDU Density */
1765 u8 fix_rx_ampdu_accept;
1766 u8 fix_rx_ampdu_size; /* 0~127, TODO:consider each sta and each TID */
1767 u8 driver_tx_max_agg_num; /*fix tx desc max agg num , 0xff: disable drv ctrl*/
1768
1769 #ifdef DBG_RX_COUNTER_DUMP
1770 u8 dump_rx_cnt_mode;/*BIT0:drv,BIT1:mac,BIT2:phy*/
1771 u32 drv_rx_cnt_ok;
1772 u32 drv_rx_cnt_crcerror;
1773 u32 drv_rx_cnt_drop;
1774 #endif
1775
1776 #ifdef CONFIG_DBG_COUNTER
1777 struct rx_logs rx_logs;
1778 struct tx_logs tx_logs;
1779 struct int_logs int_logs;
1780 #endif
1781
1782 #ifdef RTW_PHL_DBG_CMD
1783
1784 struct core_logs core_logs;
1785 struct phl_logs phl_logs;
1786
1787 u32 txForce_enable;
1788 u32 txForce_rate;
1789 u32 txForce_agg;
1790 u32 txForce_aggnum;
1791 u32 txForce_gi;
1792
1793 u32 sniffer_enable;
1794 u8 record_enable;
1795 #endif
1796 #ifdef RTW_PHL_TX
1797 u8 *pxmit_txreq_buf;
1798 _queue free_txreq_queue;
1799 u32 free_txreq_cnt;
1800 u32 txreq_full_cnt;
1801
1802 u32 tx_ring_idx;
1803 u8 *tx_pool_ring [MAX_TX_RING_NUM];
1804 #endif
1805 #ifdef CONFIG_RTW_CORE_RXSC
1806 u8 enable_rxsc;
1807 #endif
1808 #ifdef DBG_CONFIG_CMD_DISP
1809 enum phl_cmd_type cmd_type;
1810 u32 cmd_timeout;
1811 #endif
1812 u8 dis_turboedca;/* 1: disable turboedca,
1813 2. disable turboedca,and setting EDCA parameter based on the input parameter*/
1814 u32 edca_param_mode;
1815 u32 last_edca;
1816
1817 #ifdef CONFIG_STA_CMD_DISPR
1818 _lock connect_st_lock;
1819 u8 connect_state;
1820 #define CONNECT_ST_NOT_READY 0
1821 #define CONNECT_ST_IDLE 1
1822 #define CONNECT_ST_REQUESTING 2
1823 #define CONNECT_ST_ACQUIRED 3
1824 bool connect_abort;
1825 struct phl_cmd_token_req connect_req;
1826 u32 connect_token;
1827
1828 _lock disconnect_lock;
1829 struct phl_cmd_token_req disconnect_req;
1830 u32 disconnect_token;
1831 struct cmd_obj *discon_cmd;
1832 #endif /* CONFIG_STA_CMD_DISPR */
1833
1834 #ifdef CONFIG_ECSA_PHL
1835 struct core_ecsa_info ecsa_info;
1836 #endif
1837 };
1838
1839 #define adapter_to_dvobj(adapter) ((adapter)->dvobj)
1840 #define adapter_to_regsty(adapter) dvobj_to_regsty(adapter_to_dvobj((adapter)))
1841 #define adapter_to_pwrctl(adapter) dvobj_to_pwrctl(adapter_to_dvobj((adapter)))
1842 #ifdef CONFIG_WOWLAN
1843 #define adapter_to_wowlan(adapter) dvobj_to_wowlan(adapter_to_dvobj((adapter)))
1844 #endif /* CONFIG_WOWLAN */
1845
1846 #define adapter_wdev_data(adapter) (&((adapter)->wdev_data))
1847 #define adapter_to_wiphy(adapter) dvobj_to_wiphy(adapter_to_dvobj(adapter))
1848
1849 #define adapter_to_rfctl(adapter) dvobj_to_rfctl(adapter_to_dvobj((adapter)))
1850 #define adapter_to_macidctl(adapter) dvobj_to_macidctl(adapter_to_dvobj((adapter)))
1851
1852 #ifdef CONFIG_RTW_WDS
1853 #define adapter_use_wds(adapter) (adapter->use_wds)
1854 #define adapter_set_use_wds(adapter, en) do { \
1855 (adapter)->use_wds = (en) ? 1 : 0; \
1856 RTW_INFO(FUNC_ADPT_FMT" set use_wds=%d\n", FUNC_ADPT_ARG(adapter), (adapter)->use_wds); \
1857 } while (0)
1858 #else
1859 #define adapter_use_wds(adapter) 0
1860 #endif
1861
1862 #define adapter_mac_addr(adapter) (adapter->mac_addr)
1863
1864 #ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI
1865 #define adapter_pno_mac_addr(adapter) \
1866 ((adapter_wdev_data(adapter))->pno_mac_addr)
1867 #endif
1868
1869 #define adapter_to_chset(adapter) (adapter_to_rfctl((adapter))->channel_set)
1870
1871 #define mlme_to_adapter(mlme) container_of((mlme), _adapter, mlmepriv)
1872 #define tdls_info_to_adapter(tdls) container_of((tdls), _adapter, tdlsinfo)
1873
1874 #define rtw_get_chip_id(adapter) (((_adapter *)adapter)->dvobj->chip_id)
1875 #define rtw_get_intf_type(adapter) (((_adapter *)adapter)->dvobj->interface_type)
1876
1877 #define rtw_get_mi_nums(adapter) (((_adapter *)adapter)->dvobj->iface_nums)
1878
dev_set_surprise_removed(struct dvobj_priv * dvobj)1879 static inline void dev_set_surprise_removed(struct dvobj_priv *dvobj)
1880 {
1881 ATOMIC_SET(&dvobj->bSurpriseRemoved, _TRUE);
1882 if (dvobj->phl)
1883 rtw_phl_dev_terminate_ntf(dvobj->phl);
1884 }
dev_clr_surprise_removed(struct dvobj_priv * dvobj)1885 static inline void dev_clr_surprise_removed(struct dvobj_priv *dvobj)
1886 {
1887 ATOMIC_SET(&dvobj->bSurpriseRemoved, _FALSE);
1888 if (dvobj->phl_com)
1889 CLEAR_STATUS_FLAG(dvobj->phl_com->dev_state, RTW_DEV_SURPRISE_REMOVAL);
1890 }
dev_set_drv_stopped(struct dvobj_priv * dvobj)1891 static inline void dev_set_drv_stopped(struct dvobj_priv *dvobj)
1892 {
1893 ATOMIC_SET(&dvobj->bDriverStopped, _TRUE);
1894 }
dev_clr_drv_stopped(struct dvobj_priv * dvobj)1895 static inline void dev_clr_drv_stopped(struct dvobj_priv *dvobj)
1896 {
1897 ATOMIC_SET(&dvobj->bDriverStopped, _FALSE);
1898 }
dev_set_hw_start(struct dvobj_priv * dvobj)1899 static inline void dev_set_hw_start(struct dvobj_priv *dvobj)
1900 {
1901 ATOMIC_SET(&dvobj->hw_start, _TRUE);
1902 }
dev_clr_hw_start(struct dvobj_priv * dvobj)1903 static inline void dev_clr_hw_start(struct dvobj_priv *dvobj)
1904 {
1905 ATOMIC_SET(&dvobj->hw_start, _FALSE);
1906 }
1907
1908 #define dev_is_surprise_removed(dvobj) (ATOMIC_READ(&dvobj->bSurpriseRemoved) == _TRUE)
1909 #define dev_is_drv_stopped(dvobj) (ATOMIC_READ(&dvobj->bDriverStopped) == _TRUE)
1910 #define dev_is_hw_start(dvobj) (ATOMIC_READ(&dvobj->hw_start) == _TRUE)
1911 /*
1912 * Function disabled.
1913 * */
1914 #define DF_TX_BIT BIT0 /*rtw_usb_write_port_cancel*/
1915 #define DF_RX_BIT BIT1 /*rtw_usb_read_port_cancel*/
1916 #define DF_IO_BIT BIT2
1917
1918 /* #define RTW_DISABLE_FUNC(padapter, func) (ATOMIC_ADD(&dvobj->disable_func, (func))) */
1919 /* #define RTW_ENABLE_FUNC(padapter, func) (ATOMIC_SUB(&dvobj->disable_func, (func))) */
RTW_DISABLE_FUNC(struct dvobj_priv * dvobj,int func_bit)1920 __inline static void RTW_DISABLE_FUNC(struct dvobj_priv *dvobj, int func_bit)
1921 {
1922 int df = ATOMIC_READ(&dvobj->disable_func);
1923 df |= func_bit;
1924 ATOMIC_SET(&dvobj->disable_func, df);
1925 }
1926
RTW_ENABLE_FUNC(struct dvobj_priv * dvobj,int func_bit)1927 __inline static void RTW_ENABLE_FUNC(struct dvobj_priv *dvobj, int func_bit)
1928 {
1929 int df = ATOMIC_READ(&dvobj->disable_func);
1930 df &= ~(func_bit);
1931 ATOMIC_SET(&dvobj->disable_func, df);
1932 }
1933
1934 #define RTW_CANNOT_RUN(dvobj) \
1935 (dev_is_surprise_removed(dvobj) || \
1936 dev_is_drv_stopped(dvobj))
1937
1938 #define RTW_IS_FUNC_DISABLED(dvobj, func_bit) \
1939 (ATOMIC_READ(&dvobj->disable_func) & (func_bit))
1940
1941 #define RTW_CANNOT_IO(dvobj) \
1942 (dev_is_surprise_removed(dvobj) || \
1943 RTW_IS_FUNC_DISABLED((dvobj), DF_IO_BIT))
1944
1945 #define RTW_CANNOT_RX(dvobj) \
1946 (RTW_CANNOT_RUN(dvobj) || \
1947 RTW_IS_FUNC_DISABLED((dvobj), DF_RX_BIT))
1948
1949 #define RTW_CANNOT_TX(dvobj) \
1950 (RTW_CANNOT_RUN(dvobj) || \
1951 RTW_IS_FUNC_DISABLED((dvobj), DF_TX_BIT))
1952
1953
1954 /* HCI Related header file */
1955 #ifdef CONFIG_USB_HCI
1956 #include <usb_ops.h>
1957 #endif
1958
1959 #ifdef CONFIG_SDIO_HCI
1960 #include <sdio_ops.h>
1961 #endif
1962
1963 #ifdef CONFIG_GSPI_HCI
1964 #include <gspi_ops.h>
1965 #endif
1966
1967 #ifdef CONFIG_PCI_HCI
1968 #include <pci_ops.h>
1969 #endif
1970 #include <rtw_trx_ops.h>
1971
1972
1973 #endif /* __DRV_TYPES_H__ */
1974