1 /* 2 * Custom OID/ioctl definitions for 3 * 4 * 5 * Broadcom 802.11abg Networking Device Driver 6 * 7 * Definitions subject to change without notice. 8 * 9 * Copyright (C) 2020, Broadcom. 10 * 11 * Unless you and Broadcom execute a separate written software license 12 * agreement governing use of this software, this software is licensed to you 13 * under the terms of the GNU General Public License version 2 (the "GPL"), 14 * available at http://www.broadcom.com/licenses/GPLv2.php, with the 15 * following added to such license: 16 * 17 * As a special exception, the copyright holders of this software give you 18 * permission to link this software with independent modules, and to copy and 19 * distribute the resulting executable under terms of your choice, provided that 20 * you also meet, for each linked independent module, the terms and conditions of 21 * the license of that module. An independent module is a module which is not 22 * derived from this software. The special exception does not apply to any 23 * modifications of the software. 24 * 25 * 26 * <<Broadcom-WL-IPTag/Dual:>> 27 */ 28 29 #ifndef _wlioctl_h_ 30 #define _wlioctl_h_ 31 32 #include <typedefs.h> 33 #include <ethernet.h> 34 #include <bcmip.h> 35 #include <bcmeth.h> 36 #include <bcmip.h> 37 #include <bcmipv6.h> 38 #include <bcmevent.h> 39 #include <802.11.h> 40 #include <802.11s.h> 41 #include <802.1d.h> 42 #include <bcmwifi_channels.h> 43 #ifdef WL11AX 44 #include <802.11ax.h> 45 #endif /* WL11AX */ 46 #include <bcmwifi_rates.h> 47 #include <wlioctl_defs.h> 48 #include <bcmipv6.h> 49 50 #include <bcm_mpool_pub.h> 51 #include <bcmcdc.h> 52 #define SSSR_NEW_API 53 54 /* Include bcmerror.h for error codes or aliases */ 55 #ifdef BCMUTILS_ERR_CODES 56 #include <bcmerror.h> 57 #endif /* BCMUTILS_ERR_CODES */ 58 #include <bcmtlv.h> 59 60 /* NOTE re: Module specific error codes. 61 * 62 * BCME_.. error codes are extended by various features - e.g. FTM, NAN, SAE etc. 63 * The current process is to allocate a range of 1024 negative 32 bit integers to 64 * each module that extends the error codes to indicate a module specific status. 65 * 66 * The next range to use is below. If that range is used for a new feature, please 67 * update the range to be used by the next feature. 68 * 69 * The error codes -4096 ... -5119 are reserved for firmware signing. 70 * 71 * Next available (inclusive) range: [-8*1024 + 1, -7*1024] 72 * 73 * End Note 74 */ 75 76 /* 11ax trigger frame format - versioning info */ 77 #define TRIG_FRAME_FORMAT_11AX_DRAFT_1P1 0 78 79 typedef struct { 80 uint32 num; 81 chanspec_t list[1]; 82 } chanspec_list_t; 83 84 #define RSN_KCK_LENGTH 16 85 #define RSN_KEK_LENGTH 16 86 #define TPK_FTM_LEN 16 87 #ifndef INTF_NAME_SIZ 88 #define INTF_NAME_SIZ 16 89 #endif 90 91 #define WL_ASSOC_START_EVT_DATA_VERSION 1 92 93 typedef struct assoc_event_data { 94 uint32 version; 95 uint32 flags; 96 chanspec_t join_chspec; 97 } assoc_event_data_t; 98 99 /**Used to send ioctls over the transport pipe */ 100 typedef struct remote_ioctl { 101 cdc_ioctl_t msg; 102 uint32 data_len; 103 char intf_name[INTF_NAME_SIZ]; 104 } rem_ioctl_t; 105 #define REMOTE_SIZE sizeof(rem_ioctl_t) 106 107 #define BCM_IOV_XTLV_VERSION 0 108 109 #define MAX_NUM_D11CORES 2 110 111 /**DFS Forced param */ 112 typedef struct wl_dfs_forced_params { 113 chanspec_t chspec; 114 uint16 version; 115 chanspec_list_t chspec_list; 116 } wl_dfs_forced_t; 117 118 #define DFS_PREFCHANLIST_VER 0x01 119 #define WL_CHSPEC_LIST_FIXED_SIZE OFFSETOF(chanspec_list_t, list) 120 /* size of dfs forced param size given n channels are in the list */ 121 #define WL_DFS_FORCED_PARAMS_SIZE(n) \ 122 (sizeof(wl_dfs_forced_t) + (((n) < 1) ? (0) : (((n) - 1)* sizeof(chanspec_t)))) 123 #define WL_DFS_FORCED_PARAMS_FIXED_SIZE \ 124 (WL_CHSPEC_LIST_FIXED_SIZE + OFFSETOF(wl_dfs_forced_t, chspec_list)) 125 #define WL_DFS_FORCED_PARAMS_MAX_SIZE \ 126 WL_DFS_FORCED_PARAMS_FIXED_SIZE + (WL_NUMCHANNELS * sizeof(chanspec_t)) 127 128 /**association decision information */ 129 typedef struct { 130 uint8 assoc_approved; /**< (re)association approved */ 131 uint8 pad; 132 uint16 reject_reason; /**< reason code for rejecting association */ 133 struct ether_addr da; 134 uint8 pad1[6]; 135 #if defined(NDIS) && (NDISVER >= 0x0620) 136 LARGE_INTEGER sys_time; /**< current system time */ 137 #else 138 int64 sys_time; /**< current system time */ 139 #endif 140 } assoc_decision_t; 141 142 #define DFS_SCAN_S_IDLE -1 143 #define DFS_SCAN_S_RADAR_FREE 0 144 #define DFS_SCAN_S_RADAR_FOUND 1 145 #define DFS_SCAN_S_INPROGESS 2 146 #define DFS_SCAN_S_SCAN_ABORTED 3 147 #define DFS_SCAN_S_SCAN_MODESW_INPROGRESS 4 148 #define DFS_SCAN_S_MAX 5 149 150 #define ACTION_FRAME_SIZE 1800 151 152 typedef struct wl_action_frame { 153 struct ether_addr da; 154 uint16 len; 155 uint32 packetId; 156 uint8 data[ACTION_FRAME_SIZE]; 157 } wl_action_frame_t; 158 159 #define WL_WIFI_ACTION_FRAME_SIZE sizeof(struct wl_action_frame) 160 161 typedef struct ssid_info 162 { 163 uint8 ssid_len; /**< the length of SSID */ 164 uint8 ssid[32]; /**< SSID string */ 165 } ssid_info_t; 166 167 typedef struct wl_af_params { 168 uint32 channel; 169 int32 dwell_time; 170 struct ether_addr BSSID; 171 uint8 PAD[2]; 172 wl_action_frame_t action_frame; 173 } wl_af_params_t; 174 175 #define WL_WIFI_AF_PARAMS_SIZE sizeof(struct wl_af_params) 176 177 #define MFP_TEST_FLAG_NORMAL 0 178 #define MFP_TEST_FLAG_ANY_KEY 1 179 typedef struct wl_sa_query { 180 uint32 flag; 181 uint8 action; 182 uint8 PAD; 183 uint16 id; 184 struct ether_addr da; 185 uint16 PAD; 186 } wl_sa_query_t; 187 188 /* EXT_STA */ 189 /**association information */ 190 typedef struct { 191 uint32 assoc_req; /**< offset to association request frame */ 192 uint32 assoc_req_len; /**< association request frame length */ 193 uint32 assoc_rsp; /**< offset to association response frame */ 194 uint32 assoc_rsp_len; /**< association response frame length */ 195 uint32 bcn; /**< offset to AP beacon */ 196 uint32 bcn_len; /**< AP beacon length */ 197 uint32 wsec; /**< ucast security algo */ 198 uint32 wpaie; /**< offset to WPA ie */ 199 uint8 auth_alg; /**< 802.11 authentication mode */ 200 uint8 WPA_auth; /**< WPA: authenticated key management */ 201 uint8 ewc_cap; /**< EWC (MIMO) capable */ 202 uint8 ofdm; /**< OFDM */ 203 } assoc_info_t; 204 /* defined(EXT_STA) */ 205 206 /* Flags for OBSS IOVAR Parameters */ 207 #define WL_OBSS_DYN_BWSW_FLAG_ACTIVITY_PERIOD (0x01) 208 #define WL_OBSS_DYN_BWSW_FLAG_NOACTIVITY_PERIOD (0x02) 209 #define WL_OBSS_DYN_BWSW_FLAG_NOACTIVITY_INCR_PERIOD (0x04) 210 #define WL_OBSS_DYN_BWSW_FLAG_PSEUDO_SENSE_PERIOD (0x08) 211 #define WL_OBSS_DYN_BWSW_FLAG_RX_CRS_PERIOD (0x10) 212 #define WL_OBSS_DYN_BWSW_FLAG_DUR_THRESHOLD (0x20) 213 #define WL_OBSS_DYN_BWSW_FLAG_TXOP_PERIOD (0x40) 214 215 /* OBSS IOVAR Version information */ 216 #define WL_PROT_OBSS_CONFIG_PARAMS_VERSION 1 217 218 #include <packed_section_start.h> 219 typedef BWL_PRE_PACKED_STRUCT struct { 220 uint8 obss_bwsw_activity_cfm_count_cfg; /**< configurable count in 221 * seconds before we confirm that OBSS is present and 222 * dynamically activate dynamic bwswitch. 223 */ 224 uint8 obss_bwsw_no_activity_cfm_count_cfg; /**< configurable count in 225 * seconds before we confirm that OBSS is GONE and 226 * dynamically start pseudo upgrade. If in pseudo sense time, we 227 * will see OBSS, [means that, we false detected that OBSS-is-gone 228 * in watchdog] this count will be incremented in steps of 229 * obss_bwsw_no_activity_cfm_count_incr_cfg for confirming OBSS 230 * detection again. Note that, at present, max 30seconds is 231 * allowed like this. [OBSS_BWSW_NO_ACTIVITY_MAX_INCR_DEFAULT] 232 */ 233 uint8 obss_bwsw_no_activity_cfm_count_incr_cfg; /* see above 234 */ 235 uint16 obss_bwsw_pseudo_sense_count_cfg; /**< number of msecs/cnt to be in 236 * pseudo state. This is used to sense/measure the stats from lq. 237 */ 238 uint8 obss_bwsw_rx_crs_threshold_cfg; /**< RX CRS default threshold */ 239 uint8 obss_bwsw_dur_thres; /**< OBSS dyn bwsw trigger/RX CRS Sec */ 240 uint8 obss_bwsw_txop_threshold_cfg; /**< TXOP default threshold */ 241 } BWL_POST_PACKED_STRUCT wlc_obss_dynbwsw_config_t; 242 #include <packed_section_end.h> 243 244 #include <packed_section_start.h> 245 typedef BWL_PRE_PACKED_STRUCT struct { 246 uint32 version; /**< version field */ 247 uint32 config_mask; 248 uint32 reset_mask; 249 wlc_obss_dynbwsw_config_t config_params; 250 } BWL_POST_PACKED_STRUCT obss_config_params_t; 251 #include <packed_section_end.h> 252 253 /**bsscfg type */ 254 typedef enum bsscfg_type { 255 BSSCFG_TYPE_GENERIC = 0, /**< Generic AP/STA/IBSS BSS */ 256 BSSCFG_TYPE_P2P = 1, /**< P2P BSS */ 257 /* index 2 earlier used for BTAMP */ 258 BSSCFG_TYPE_PSTA = 3, 259 BSSCFG_TYPE_TDLS = 4, 260 BSSCFG_TYPE_SLOTTED_BSS = 5, 261 BSSCFG_TYPE_PROXD = 6, 262 BSSCFG_TYPE_NAN = 7, 263 BSSCFG_TYPE_MESH = 8, 264 BSSCFG_TYPE_AIBSS = 9 265 } bsscfg_type_t; 266 267 /* bsscfg subtype */ 268 typedef enum bsscfg_subtype { 269 BSSCFG_SUBTYPE_NONE = 0, 270 BSSCFG_GENERIC_STA = 1, /* GENERIC */ 271 BSSCFG_GENERIC_AP = 2, 272 BSSCFG_GENERIC_IBSS = 6, 273 BSSCFG_P2P_GC = 3, /* P2P */ 274 BSSCFG_P2P_GO = 4, 275 BSSCFG_P2P_DISC = 5, 276 /* Index 7 & 8 earlier used for BTAMP */ 277 BSSCFG_SUBTYPE_AWDL = 9, /* SLOTTED_BSS_TYPE */ 278 BSSCFG_SUBTYPE_NAN_MGMT = 10, 279 BSSCFG_SUBTYPE_NAN_DATA = 11, 280 BSSCFG_SUBTYPE_NAN_MGMT_DATA = 12 281 } bsscfg_subtype_t; 282 283 typedef struct wlc_bsscfg_info { 284 uint32 type; 285 uint32 subtype; 286 } wlc_bsscfg_info_t; 287 288 /* ULP SHM Offsets info */ 289 typedef struct ulp_shm_info { 290 uint32 m_ulp_ctrl_sdio; 291 uint32 m_ulp_wakeevt_ind; 292 uint32 m_ulp_wakeind; 293 } ulp_shm_info_t; 294 295 /* Note: Due to unpredictable size, bool type should not be used in any ioctl argument structure 296 * Cf PR53622 297 */ 298 299 #define WL_BSS_INFO_VERSION 109 /**< current version of wl_bss_info struct */ 300 301 /** 302 * BSS info structure 303 * Applications MUST CHECK ie_offset field and length field to access IEs and 304 * next bss_info structure in a vector (in wl_scan_results_t) 305 */ 306 typedef struct wl_bss_info { 307 uint32 version; /**< version field */ 308 uint32 length; /**< byte length of data in this record, 309 * starting at version and including IEs 310 */ 311 struct ether_addr BSSID; 312 uint16 beacon_period; /**< units are Kusec */ 313 uint16 capability; /**< Capability information */ 314 uint8 SSID_len; 315 uint8 SSID[32]; 316 uint8 bcnflags; /* additional flags w.r.t. beacon */ 317 struct { 318 uint32 count; /**< # rates in this set */ 319 uint8 rates[16]; /**< rates in 500kbps units w/hi bit set if basic */ 320 } rateset; /**< supported rates */ 321 chanspec_t chanspec; /**< chanspec for bss */ 322 uint16 atim_window; /**< units are Kusec */ 323 uint8 dtim_period; /**< DTIM period */ 324 uint8 accessnet; /* from beacon interwork IE (if bcnflags) */ 325 int16 RSSI; /**< receive signal strength (in dBm) */ 326 int8 phy_noise; /**< noise (in dBm) */ 327 uint8 n_cap; /**< BSS is 802.11N Capable */ 328 uint8 freespace1; /* make implicit padding explicit */ 329 uint8 load; /**< BSS Load from QBSS load IE if available */ 330 uint32 nbss_cap; /**< 802.11N+AC BSS Capabilities */ 331 uint8 ctl_ch; /**< 802.11N BSS control channel number */ 332 uint8 padding1[3]; /**< explicit struct alignment padding */ 333 uint16 vht_rxmcsmap; /**< VHT rx mcs map (802.11ac IE, VHT_CAP_MCS_MAP_*) */ 334 uint16 vht_txmcsmap; /**< VHT tx mcs map (802.11ac IE, VHT_CAP_MCS_MAP_*) */ 335 uint8 flags; /**< flags */ 336 uint8 vht_cap; /**< BSS is vht capable */ 337 uint8 reserved[2]; /**< Reserved for expansion of BSS properties */ 338 uint8 basic_mcs[MCSSET_LEN]; /**< 802.11N BSS required MCS set */ 339 340 uint16 ie_offset; /**< offset at which IEs start, from beginning */ 341 uint16 freespace2; /* making implicit padding explicit */ 342 uint32 ie_length; /**< byte length of Information Elements */ 343 int16 SNR; /**< average SNR of during frame reception */ 344 uint16 vht_mcsmap; /**< STA's Associated vhtmcsmap */ 345 uint16 vht_mcsmap_prop; /**< STA's Associated prop vhtmcsmap */ 346 uint16 vht_txmcsmap_prop; /**< prop VHT tx mcs prop */ 347 } wl_bss_info_v109_t; 348 349 /** 350 * BSS info structure 351 * Applications MUST CHECK ie_offset field and length field to access IEs and 352 * next bss_info structure in a vector (in wl_scan_results_t) 353 */ 354 typedef struct wl_bss_info_v109_1 { 355 uint32 version; /**< version field */ 356 uint32 length; /**< byte length of data in this record, 357 * starting at version and including IEs 358 */ 359 struct ether_addr BSSID; 360 uint16 beacon_period; /**< units are Kusec */ 361 uint16 capability; /**< Capability information */ 362 uint8 SSID_len; 363 uint8 SSID[32]; 364 uint8 bcnflags; /* additional flags w.r.t. beacon */ 365 struct { 366 uint32 count; /**< # rates in this set */ 367 uint8 rates[16]; /**< rates in 500kbps units w/hi bit set if basic */ 368 } rateset; /**< supported rates */ 369 chanspec_t chanspec; /**< chanspec for bss */ 370 uint16 atim_window; /**< units are Kusec */ 371 uint8 dtim_period; /**< DTIM period */ 372 uint8 accessnet; /* from beacon interwork IE (if bcnflags) */ 373 int16 RSSI; /**< receive signal strength (in dBm) */ 374 int8 phy_noise; /**< noise (in dBm) */ 375 uint8 n_cap; /**< BSS is 802.11N Capable */ 376 uint8 he_cap; /**< BSS is he capable */ 377 uint8 load; /**< BSS Load from QBSS load IE if available */ 378 uint32 nbss_cap; /**< 802.11N+AC BSS Capabilities */ 379 uint8 ctl_ch; /**< 802.11N BSS control channel number */ 380 uint8 padding1[3]; /**< explicit struct alignment padding */ 381 uint16 vht_rxmcsmap; /**< VHT rx mcs map (802.11ac IE, VHT_CAP_MCS_MAP_*) */ 382 uint16 vht_txmcsmap; /**< VHT tx mcs map (802.11ac IE, VHT_CAP_MCS_MAP_*) */ 383 uint8 flags; /**< flags */ 384 uint8 vht_cap; /**< BSS is vht capable */ 385 uint8 reserved[2]; /**< Reserved for expansion of BSS properties */ 386 uint8 basic_mcs[MCSSET_LEN]; /**< 802.11N BSS required MCS set */ 387 388 uint16 ie_offset; /**< offset at which IEs start, from beginning */ 389 uint16 freespace2; /* making implicit padding explicit */ 390 uint32 ie_length; /**< byte length of Information Elements */ 391 int16 SNR; /**< average SNR of during frame reception */ 392 uint16 vht_mcsmap; /**< STA's Associated vhtmcsmap */ 393 uint16 vht_mcsmap_prop; /**< STA's Associated prop vhtmcsmap */ 394 uint16 vht_txmcsmap_prop; /**< prop VHT tx mcs prop */ 395 uint32 he_mcsmap; /**< STA's Associated hemcsmap */ 396 uint32 he_rxmcsmap; /**< HE rx mcs map (802.11ax IE, HE_CAP_MCS_MAP_*) */ 397 uint32 he_txmcsmap; /**< HE tx mcs map (802.11ax IE, HE_CAP_MCS_MAP_*) */ 398 } wl_bss_info_v109_1_t; 399 400 /** 401 * BSS info structure 402 * Applications MUST CHECK ie_offset field and length field to access IEs and 403 * next bss_info structure in a vector (in wl_scan_results_t) 404 */ 405 typedef struct wl_bss_info_v109_2 { 406 uint32 version; /**< version field */ 407 uint32 length; /**< byte length of data in this record, 408 * starting at version and including IEs 409 */ 410 struct ether_addr BSSID; 411 uint16 beacon_period; /**< units are Kusec */ 412 uint16 capability; /**< Capability information */ 413 uint8 SSID_len; 414 uint8 SSID[32]; 415 uint8 bcnflags; /* additional flags w.r.t. beacon */ 416 struct { 417 uint32 count; /**< # rates in this set */ 418 uint8 rates[16]; /**< rates in 500kbps units w/hi bit set if basic */ 419 } rateset; /**< supported rates */ 420 chanspec_t chanspec; /**< chanspec for bss */ 421 uint16 atim_window; /**< units are Kusec */ 422 uint8 dtim_period; /**< DTIM period */ 423 uint8 accessnet; /* from beacon interwork IE (if bcnflags) */ 424 int16 RSSI; /**< receive signal strength (in dBm) */ 425 int8 phy_noise; /**< noise (in dBm) */ 426 uint8 n_cap; /**< BSS is 802.11N Capable */ 427 uint8 he_cap; /**< BSS is he capable */ 428 uint8 load; /**< BSS Load from QBSS load IE if available */ 429 uint32 nbss_cap; /**< 802.11N+AC BSS Capabilities */ 430 uint8 ctl_ch; /**< 802.11N BSS control channel number */ 431 uint8 RSVD1[3]; 432 uint16 vht_rxmcsmap; /**< VHT rx mcs map (802.11ac IE, VHT_CAP_MCS_MAP_*) */ 433 uint16 vht_txmcsmap; /**< VHT tx mcs map (802.11ac IE, VHT_CAP_MCS_MAP_*) */ 434 uint8 flags; /**< flags */ 435 uint8 vht_cap; /**< BSS is vht capable */ 436 uint8 RSVD2[2]; 437 uint8 basic_mcs[MCSSET_LEN]; /**< 802.11N BSS required MCS set */ 438 439 uint16 ie_offset; /**< offset at which IEs start, from beginning */ 440 uint16 freespace2; /* making implicit padding explicit */ 441 uint32 ie_length; /**< byte length of Information Elements */ 442 int16 SNR; /**< average SNR of during frame reception */ 443 uint16 vht_mcsmap; /**< STA's Associated vhtmcsmap */ 444 uint16 vht_mcsmap_prop; /**< STA's Associated prop vhtmcsmap */ 445 uint16 vht_txmcsmap_prop; /**< prop VHT tx mcs prop */ 446 uint32 he_mcsmap; /**< STA's Associated hemcsmap */ 447 uint32 he_rxmcsmap; /**< HE rx mcs map (802.11ax IE, HE_CAP_MCS_MAP_*) */ 448 uint32 he_txmcsmap; /**< HE tx mcs map (802.11ax IE, HE_CAP_MCS_MAP_*) */ 449 uint32 timestamp[2]; /* Beacon Timestamp for FAKEAP req */ 450 } wl_bss_info_v109_2_t; 451 452 /** 453 * BSS info structure 454 * Applications MUST CHECK ie_offset field and length field to access IEs and 455 * next bss_info structure in a vector (in wl_scan_results_t) 456 */ 457 typedef struct wl_bss_info_v112 { 458 uint32 version; /**< version field */ 459 uint32 length; /**< byte length of data in this record, 460 * starting at version and including IEs 461 */ 462 struct ether_addr BSSID; 463 uint16 beacon_period; /**< units are Kusec */ 464 uint16 capability; /**< Capability information */ 465 uint8 SSID_len; 466 uint8 SSID[32]; 467 uint8 bcnflags; /* additional flags w.r.t. beacon */ 468 struct { 469 uint32 count; /**< # rates in this set */ 470 uint8 rates[16]; /**< rates in 500kbps units w/hi bit set if basic */ 471 } rateset; /**< supported rates */ 472 chanspec_t chanspec; /**< chanspec for bss */ 473 uint16 atim_window; /**< units are Kusec */ 474 uint8 dtim_period; /**< DTIM period */ 475 uint8 accessnet; /* from beacon interwork IE (if bcnflags) */ 476 int16 RSSI; /**< receive signal strength (in dBm) */ 477 int8 phy_noise; /**< noise (in dBm) */ 478 uint8 n_cap; /**< BSS is 802.11N Capable */ 479 uint8 he_cap; /**< BSS is he capable */ 480 uint8 load; /**< BSS Load from QBSS load IE if available */ 481 uint32 nbss_cap; /**< 802.11N+AC BSS Capabilities */ 482 uint8 ctl_ch; /**< 802.11N BSS control channel number */ 483 uint8 RSVD1[3]; 484 uint16 vht_rxmcsmap; /**< VHT rx mcs map (802.11ac IE, VHT_CAP_MCS_MAP_*) */ 485 uint16 vht_txmcsmap; /**< VHT tx mcs map (802.11ac IE, VHT_CAP_MCS_MAP_*) */ 486 uint8 flags; /**< flags */ 487 uint8 vht_cap; /**< BSS is vht capable */ 488 uint8 RSVD2[2]; 489 uint8 basic_mcs[MCSSET_LEN]; /**< 802.11N BSS required MCS set */ 490 uint16 ie_offset; /**< offset at which IEs start, from beginning */ 491 uint16 freespace2; /* making implicit padding explicit */ 492 uint32 ie_length; /**< byte length of Information Elements */ 493 int16 SNR; /**< average SNR of during frame reception */ 494 uint16 vht_mcsmap; /**< STA's Associated vhtmcsmap */ 495 uint16 vht_mcsmap_prop; /**< STA's Associated prop vhtmcsmap */ 496 uint16 vht_txmcsmap_prop; /**< prop VHT tx mcs prop */ 497 uint32 he_mcsmap; /**< STA's Associated hemcsmap */ 498 uint32 he_rxmcsmap; /**< HE rx mcs map (802.11ax IE, HE_CAP_MCS_MAP_*) */ 499 uint32 he_txmcsmap; /**< HE tx mcs map (802.11ax IE, HE_CAP_MCS_MAP_*) */ 500 uint32 timestamp[2]; /* Beacon Timestamp for FAKEAP req */ 501 uint8 eht_cap; /* BSS is EHT capable */ 502 uint8 RSVD3[3]; 503 /* by the spec. it is maximum 16 streams hence all mcs code for all nss may not fit 504 * in a 32 bit mcs nss map but since this field only reflects the common mcs nss map 505 * between that of the peer and our device so it's probably ok to make it 32 bit and 506 * allow only a limited number of nss e.g. upto 8 of them in the map given the fact 507 * that our device probably won't exceed 4 streams anyway... 508 */ 509 uint32 eht_mcsmap; /* STA's associated EHT mcs code map */ 510 /* FIXME: change the following mcs code map to uint32 if all mcs+nss can fit in */ 511 uint8 eht_rxmcsmap[6]; /* EHT rx mcs code map */ 512 uint8 eht_txmcsmap[6]; /* EHT tx mcs code map */ 513 } wl_bss_info_v112_t; 514 515 #ifndef WL_BSS_INFO_TYPEDEF_HAS_ALIAS 516 typedef wl_bss_info_v109_t wl_bss_info_t; 517 #endif 518 519 #define WL_GSCAN_FULL_RESULT_VERSION 2 /* current version of wl_gscan_result_t struct */ 520 521 typedef struct wl_gscan_bss_info_v2 { 522 uint32 timestamp[2]; 523 wl_bss_info_v109_t info; 524 /* Do not add any more members below, fixed */ 525 /* and variable length Information Elements to follow */ 526 } wl_gscan_bss_info_v2_t; 527 528 typedef struct wl_gscan_bss_info_v3 { 529 uint32 timestamp[2]; 530 uint8 info[]; /* var length wl_bss_info_X structures */ 531 /* Do not add any more members below, fixed */ 532 /* and variable length Information Elements to follow */ 533 } wl_gscan_bss_info_v3_t; 534 535 #ifndef WL_BSS_INFO_TYPEDEF_HAS_ALIAS 536 typedef wl_gscan_bss_info_v2_t wl_gscan_bss_info_t; 537 #define WL_GSCAN_INFO_FIXED_FIELD_SIZE (sizeof(wl_gscan_bss_info_t) - sizeof(wl_bss_info_t)) 538 #endif 539 540 typedef struct wl_bsscfg { 541 uint32 bsscfg_idx; 542 uint32 wsec; 543 uint32 WPA_auth; 544 uint32 wsec_index; 545 uint32 associated; 546 uint32 BSS; 547 uint32 phytest_on; 548 struct ether_addr prev_BSSID; 549 struct ether_addr BSSID; 550 uint32 targetbss_wpa2_flags; 551 uint32 assoc_type; 552 uint32 assoc_state; 553 } wl_bsscfg_t; 554 555 typedef struct wl_if_add { 556 uint32 bsscfg_flags; 557 uint32 if_flags; 558 uint32 ap; 559 struct ether_addr mac_addr; 560 uint16 PAD; 561 uint32 wlc_index; 562 } wl_if_add_t; 563 564 typedef struct wl_bss_config { 565 uint32 atim_window; 566 uint32 beacon_period; 567 uint32 chanspec; 568 } wl_bss_config_t; 569 570 /* Number of Bsscolor supported per core */ 571 #ifndef HE_MAX_BSSCOLOR_RES 572 #define HE_MAX_BSSCOLOR_RES 2 573 #endif 574 575 #ifndef HE_MAX_STAID_PER_BSSCOLOR 576 #define HE_MAX_STAID_PER_BSSCOLOR 4 577 #endif 578 579 /* BSSColor indices */ 580 #define BSSCOLOR0_IDX 0 581 #define BSSCOLOR1_IDX 1 582 #define HE_BSSCOLOR0 0 583 #define HE_BSSCOLOR_MAX_VAL 63 584 585 /* STAID indices */ 586 #define STAID0_IDX 0 587 #define STAID1_IDX 1 588 #define STAID2_IDX 2 589 #define STAID3_IDX 3 590 #define HE_STAID_MAX_VAL 0x07FF 591 592 typedef struct wl_bsscolor_info { 593 uint16 version; /**< structure version */ 594 uint16 length; /**< length of the bsscolor info */ 595 uint8 bsscolor_index; /**< bsscolor index 0-1 */ 596 uint8 bsscolor; /**<bsscolor value from 0 to 63 */ 597 uint8 partial_bsscolor_ind; 598 uint8 disable_bsscolor_ind; /**< To disable particular bsscolor */ 599 /* bsscolor_disable to be added as part of D1.0 */ 600 uint16 staid_info[HE_MAX_STAID_PER_BSSCOLOR]; /**< 0-3 staid info of each bsscolor */ 601 } wl_bsscolor_info_t; 602 603 #define WL_BSS_USER_RADAR_CHAN_SELECT 0x1 /**< User application will randomly select 604 * radar channel. 605 */ 606 607 #define DLOAD_HANDLER_VER 1 /**< Downloader version */ 608 #define DLOAD_FLAG_VER_MASK 0xf000 /**< Downloader version mask */ 609 #define DLOAD_FLAG_VER_SHIFT 12 /**< Downloader version shift */ 610 611 #define DL_CRC_NOT_INUSE 0x0001 612 #define DL_BEGIN 0x0002 613 #define DL_END 0x0004 614 615 /* Flags for Major/Minor/Date number shift and mask */ 616 #define EPI_VER_SHIFT 16 617 #define EPI_VER_MASK 0xFFFF 618 /** generic download types & flags */ 619 enum { 620 DL_TYPE_UCODE = 1, 621 DL_TYPE_CLM = 2 622 }; 623 624 /** ucode type values */ 625 enum { 626 UCODE_FW, 627 INIT_VALS, 628 BS_INIT_VALS 629 }; 630 631 struct wl_dload_data { 632 uint16 flag; 633 uint16 dload_type; 634 uint32 len; 635 uint32 crc; 636 uint8 data[1]; 637 }; 638 typedef struct wl_dload_data wl_dload_data_t; 639 640 struct wl_ucode_info { 641 uint32 ucode_type; 642 uint32 num_chunks; 643 uint32 chunk_len; 644 uint32 chunk_num; 645 uint8 data_chunk[1]; 646 }; 647 typedef struct wl_ucode_info wl_ucode_info_t; 648 649 struct wl_clm_dload_info { 650 uint32 ds_id; 651 uint32 clm_total_len; 652 uint32 num_chunks; 653 uint32 chunk_len; 654 uint32 chunk_offset; 655 uint8 data_chunk[1]; 656 }; 657 typedef struct wl_clm_dload_info wl_clm_dload_info_t; 658 659 typedef struct wlc_ssid { 660 uint32 SSID_len; 661 uint8 SSID[DOT11_MAX_SSID_LEN]; 662 } wlc_ssid_t; 663 664 typedef struct wlc_ssid_ext { 665 uint8 hidden; 666 uint8 PAD; 667 uint16 flags; 668 uint8 SSID_len; 669 int8 rssi_thresh; 670 uint8 SSID[DOT11_MAX_SSID_LEN]; 671 } wlc_ssid_ext_t; 672 673 #define MAX_PREFERRED_AP_NUM 5 674 typedef struct wlc_fastssidinfo { 675 uint32 SSID_channel[MAX_PREFERRED_AP_NUM]; 676 wlc_ssid_t SSID_info[MAX_PREFERRED_AP_NUM]; 677 } wlc_fastssidinfo_t; 678 679 typedef struct wnm_url { 680 uint8 len; 681 uint8 data[1]; 682 } wnm_url_t; 683 684 typedef struct chan_scandata { 685 uint8 txpower; 686 uint8 pad; 687 chanspec_t channel; /**< Channel num, bw, ctrl_sb and band */ 688 uint32 channel_mintime; 689 uint32 channel_maxtime; 690 } chan_scandata_t; 691 692 typedef enum wl_scan_type { 693 EXTDSCAN_FOREGROUND_SCAN, 694 EXTDSCAN_BACKGROUND_SCAN, 695 EXTDSCAN_FORCEDBACKGROUND_SCAN 696 } wl_scan_type_t; 697 698 #define WLC_EXTDSCAN_MAX_SSID 5 699 700 typedef struct wl_extdscan_params { 701 int8 nprobes; /**< 0, passive, otherwise active */ 702 int8 split_scan; /**< split scan */ 703 int8 band; /**< band */ 704 int8 pad; 705 wlc_ssid_t ssid[WLC_EXTDSCAN_MAX_SSID]; /**< ssid list */ 706 uint32 tx_rate; /**< in 500ksec units */ 707 wl_scan_type_t scan_type; /**< enum */ 708 int32 channel_num; 709 chan_scandata_t channel_list[1]; /**< list of chandata structs */ 710 } wl_extdscan_params_t; 711 712 #define WL_EXTDSCAN_PARAMS_FIXED_SIZE (sizeof(wl_extdscan_params_t) - sizeof(chan_scandata_t)) 713 714 #define WL_SCAN_PARAMS_SSID_MAX 10 715 716 typedef struct wl_scan_params_v1 { 717 wlc_ssid_t ssid; /**< default: {0, ""} */ 718 struct ether_addr bssid; /**< default: bcast */ 719 int8 bss_type; /**< default: any, 720 * DOT11_BSSTYPE_ANY/INFRASTRUCTURE/INDEPENDENT 721 */ 722 uint8 scan_type; /**< flags, 0 use default */ 723 int32 nprobes; /**< -1 use default, number of probes per channel */ 724 int32 active_time; /**< -1 use default, dwell time per channel for 725 * active scanning 726 */ 727 int32 passive_time; /**< -1 use default, dwell time per channel 728 * for passive scanning 729 */ 730 int32 home_time; /**< -1 use default, dwell time for the home channel 731 * between channel scans 732 */ 733 int32 channel_num; /**< count of channels and ssids that follow 734 * 735 * low half is count of channels in channel_list, 0 736 * means default (use all available channels) 737 * 738 * high half is entries in wlc_ssid_t array that 739 * follows channel_list, aligned for int32 (4 bytes) 740 * meaning an odd channel count implies a 2-byte pad 741 * between end of channel_list and first ssid 742 * 743 * if ssid count is zero, single ssid in the fixed 744 * parameter portion is assumed, otherwise ssid in 745 * the fixed portion is ignored 746 */ 747 uint16 channel_list[BCM_FLEX_ARRAY]; 748 } wl_scan_params_v1_t; 749 750 /** size of wl_scan_params_v1 not including variable length array */ 751 #define WL_SCAN_PARAMS_V1_FIXED_SIZE (OFFSETOF(wl_scan_params_v1_t, channel_list)) 752 #define WL_MAX_ROAMSCAN_V1_DATSZ \ 753 (WL_SCAN_PARAMS_V1_FIXED_SIZE + (WL_NUMCHANNELS * sizeof(uint16))) 754 755 /* changes in wl_scan_params_v2 as comapred to wl_scan_params (v1) 756 * unit8 scantype to uint32 757 */ 758 typedef struct wl_scan_params_v2 { 759 uint16 version; /* Version of wl_scan_params, change value of 760 * WL_SCAN_PARAM_VERSION on version update 761 */ 762 uint16 length; /* length of structure wl_scan_params_v1_t 763 * without implicit pad 764 */ 765 wlc_ssid_t ssid; /**< default: {0, ""} */ 766 struct ether_addr bssid; /**< default: bcast */ 767 int8 bss_type; /**< default: any, 768 * DOT11_BSSTYPE_ANY/INFRASTRUCTURE/INDEPENDENT 769 */ 770 uint8 PAD; 771 uint32 scan_type; /**< flags, 0 use default, and flags specified in 772 * WL_SCANFLAGS_XXX 773 */ 774 int32 nprobes; /**< -1 use default, number of probes per channel */ 775 int32 active_time; /**< -1 use default, dwell time per channel for 776 * active scanning 777 */ 778 int32 passive_time; /**< -1 use default, dwell time per channel 779 * for passive scanning 780 */ 781 int32 home_time; /**< -1 use default, dwell time for the home channel 782 * between channel scans 783 */ 784 int32 channel_num; /**< count of channels and ssids that follow 785 * 786 * low half is count of channels in channel_list, 0 787 * means default (use all available channels) 788 * 789 * high half is entries in wlc_ssid_t array that 790 * follows channel_list, aligned for int32 (4 bytes) 791 * meaning an odd channel count implies a 2-byte pad 792 * between end of channel_list and first ssid 793 * 794 * if ssid count is zero, single ssid in the fixed 795 * parameter portion is assumed, otherwise ssid in 796 * the fixed portion is ignored 797 */ 798 uint16 channel_list[1]; /**< list of chanspecs */ 799 } wl_scan_params_v2_t; 800 801 #define WL_SCAN_PARAMS_VERSION_V2 2 802 803 /** size of wl_scan_params not including variable length array */ 804 #define WL_SCAN_PARAMS_V2_FIXED_SIZE (OFFSETOF(wl_scan_params_v2_t, channel_list)) 805 #define WL_MAX_ROAMSCAN_DATSZ \ 806 (WL_SCAN_PARAMS_FIXED_SIZE + (WL_NUMCHANNELS * sizeof(uint16))) 807 #define WL_MAX_ROAMSCAN_V2_DATSZ \ 808 (WL_SCAN_PARAMS_V2_FIXED_SIZE + (WL_NUMCHANNELS * sizeof(uint16))) 809 810 /* changes in wl_scan_params_v3 as comapred to wl_scan_params (v2) 811 * pad byte used to differentiate Short SSID and Regular SSID 812 */ 813 typedef struct wl_scan_params_v3 { 814 uint16 version; /* Version of wl_scan_params, change value of 815 * WL_SCAN_PARAM_VERSION on version update 816 */ 817 uint16 length; /* length of structure wl_scan_params_v1_t 818 * without implicit pad 819 */ 820 wlc_ssid_t ssid; /**< default: {0, ""} */ 821 struct ether_addr bssid; /**< default: bcast */ 822 int8 bss_type; /**< default: any, 823 * DOT11_BSSTYPE_ANY/INFRASTRUCTURE/INDEPENDENT 824 */ 825 uint8 ssid_type; /**< ssid_type_flag ,0 use default, and flags specified 826 * WL_SCAN_SSID_FLAGS 827 */ 828 uint32 scan_type; /**< flags, 0 use default, and flags specified in 829 * WL_SCANFLAGS_XXX 830 */ 831 int32 nprobes; /**< -1 use default, number of probes per channel */ 832 int32 active_time; /**< -1 use default, dwell time per channel for 833 * active scanning 834 */ 835 int32 passive_time; /**< -1 use default, dwell time per channel 836 * for passive scanning 837 */ 838 int32 home_time; /**< -1 use default, dwell time for the home channel 839 * between channel scans 840 */ 841 int32 channel_num; /**< count of channels and ssids that follow 842 * 843 * low half is count of channels in channel_list, 0 844 * means default (use all available channels) 845 * 846 * high half is entries in wlc_ssid_t array that 847 * follows channel_list, aligned for int32 (4 bytes) 848 * meaning an odd channel count implies a 2-byte pad 849 * between end of channel_list and first ssid 850 * 851 * if ssid count is zero, single ssid in the fixed 852 * parameter portion is assumed, otherwise ssid in 853 * the fixed portion is ignored 854 */ 855 uint16 channel_list[]; /**< list of chanspecs */ 856 } wl_scan_params_v3_t; 857 858 #define WL_SCAN_PARAMS_VERSION_V3 3 859 860 /** size of wl_scan_params not including variable length array */ 861 #define WL_SCAN_PARAMS_V3_FIXED_SIZE (OFFSETOF(wl_scan_params_v3_t, channel_list)) 862 #define WL_MAX_ROAMSCAN_V3_DATSZ \ 863 (WL_SCAN_PARAMS_V3_FIXED_SIZE + (WL_NUMCHANNELS * sizeof(uint16))) 864 865 #define ISCAN_REQ_VERSION_V1 1 866 #define ISCAN_REQ_VERSION_V2 2 867 868 /** incremental scan struct */ 869 typedef struct wl_iscan_params_v1 { 870 uint32 version; 871 uint16 action; 872 uint16 scan_duration; 873 struct wl_scan_params_v1 params; 874 } wl_iscan_params_v1_t; 875 876 /** incremental scan struct */ 877 typedef struct wl_iscan_params_v2 { 878 uint32 version; 879 uint16 action; 880 uint16 scan_duration; 881 wl_scan_params_v2_t params; 882 } wl_iscan_params_v2_t; 883 884 /** incremental scan struct */ 885 typedef struct wl_iscan_params_v3 { 886 uint32 version; 887 uint16 action; 888 uint16 scan_duration; 889 wl_scan_params_v3_t params; 890 } wl_iscan_params_v3_t; 891 892 /** 3 fields + size of wl_scan_params, not including variable length array */ 893 #define WL_ISCAN_PARAMS_FIXED_SIZE (OFFSETOF(wl_iscan_params_t, params) + sizeof(wlc_ssid_t)) 894 #define WL_ISCAN_PARAMS_V2_FIXED_SIZE \ 895 (OFFSETOF(wl_iscan_params_v2_t, params) + sizeof(wlc_ssid_t)) 896 #define WL_ISCAN_PARAMS_V3_FIXED_SIZE \ 897 (OFFSETOF(wl_iscan_params_v3_t, params) + sizeof(wlc_ssid_t)) 898 899 typedef struct wl_scan_results_v109 { 900 uint32 buflen; 901 uint32 version; 902 uint32 count; 903 wl_bss_info_v109_t bss_info[BCM_FLEX_ARRAY]; 904 } wl_scan_results_v109_t; 905 #define WL_SCAN_RESULTS_V109_FIXED_SIZE (OFFSETOF(wl_scan_results_v109_t, bss_info)) 906 907 typedef struct wl_scan_results_v2 { 908 uint32 buflen; 909 uint32 version; 910 uint32 count; 911 uint8 bss_info[]; /* var length wl_bss_info_X structures */ 912 } wl_scan_results_v2_t; 913 914 #ifndef WL_BSS_INFO_TYPEDEF_HAS_ALIAS 915 typedef wl_scan_results_v109_t wl_scan_results_t; 916 /** size of wl_scan_results not including variable length array */ 917 #define WL_SCAN_RESULTS_FIXED_SIZE (sizeof(wl_scan_results_t) - sizeof(wl_bss_info_t)) 918 #endif 919 920 #if defined(SIMPLE_ISCAN) 921 /** the buf lengh can be WLC_IOCTL_MAXLEN (8K) to reduce iteration */ 922 #define WLC_IW_ISCAN_MAXLEN 2048 923 typedef struct iscan_buf { 924 struct iscan_buf * next; 925 int8 iscan_buf[WLC_IW_ISCAN_MAXLEN]; 926 } iscan_buf_t; 927 #endif /* SIMPLE_ISCAN */ 928 #define ESCAN_REQ_VERSION 1 929 #define ESCAN_REQ_VERSION_V1 1 930 #define ESCAN_REQ_VERSION_V2 2 931 932 typedef struct wl_escan_params_v1 { 933 uint32 version; 934 uint16 action; 935 uint16 sync_id; 936 struct wl_scan_params_v1 params; 937 } wl_escan_params_v1_t; 938 939 typedef struct wl_escan_params_v2 { 940 uint32 version; 941 uint16 action; 942 uint16 sync_id; 943 wl_scan_params_v2_t params; 944 } wl_escan_params_v2_t; 945 946 typedef struct wl_escan_params_v3 { 947 uint32 version; 948 uint16 action; 949 uint16 sync_id; 950 wl_scan_params_v3_t params; 951 } wl_escan_params_v3_t; 952 953 #define WL_ESCAN_PARAMS_V1_FIXED_SIZE (OFFSETOF(wl_escan_params_v1_t, params) + sizeof(wlc_ssid_t)) 954 #define WL_ESCAN_PARAMS_V2_FIXED_SIZE (OFFSETOF(wl_escan_params_v2_t, params) + sizeof(wlc_ssid_t)) 955 #define WL_ESCAN_PARAMS_V3_FIXED_SIZE (OFFSETOF(wl_escan_params_v3_t, params) + sizeof(wlc_ssid_t)) 956 /* New scan version is defined then change old version of scan to 957 * wl_scan_params_v1_t and new one to wl_scan_params_t 958 */ 959 #if defined (WL_SCAN_PARAMS_V3) 960 typedef struct wl_scan_params wl_scan_params_v1_t; 961 typedef struct wl_escan_params wl_escan_params_v1_t; 962 typedef struct wl_iscan_params wl_iscan_params_v1_t; 963 typedef struct wl_scan_params_v3 wl_scan_params_t; 964 typedef struct wl_escan_params_v3 wl_escan_params_t; 965 typedef struct wl_iscan_params_v3 wl_iscan_params_t; 966 #define WL_SCAN_PARAMS_FIXED_SIZE (OFFSETOF(wl_scan_params_t, channel_list)) 967 #elif defined(WL_SCAN_PARAMS_V2) 968 typedef struct wl_scan_params wl_scan_params_v1_t; 969 typedef struct wl_escan_params wl_escan_params_v1_t; 970 typedef struct wl_iscan_params wl_iscan_params_v1_t; 971 typedef struct wl_scan_params_v2 wl_scan_params_t; 972 typedef struct wl_escan_params_v2 wl_escan_params_t; 973 typedef struct wl_iscan_params_v2 wl_iscan_params_t; 974 #define WL_SCAN_PARAMS_FIXED_SIZE (OFFSETOF(wl_scan_params_t, channel_list)) 975 #else 976 typedef struct wl_scan_params_v1 wl_scan_params_t; 977 typedef struct wl_escan_params_v1 wl_escan_params_t; 978 typedef struct wl_iscan_params_v1 wl_iscan_params_t; 979 #define WL_SCAN_PARAMS_FIXED_SIZE 64 980 #endif /* WL_SCAN_PARAMS_V3 */ 981 982 /** event scan reduces amount of SOC memory needed to store scan results */ 983 typedef struct wl_escan_result_v109 { 984 uint32 buflen; 985 uint32 version; 986 uint16 sync_id; 987 uint16 bss_count; 988 wl_bss_info_v109_t bss_info[BCM_FLEX_ARRAY]; 989 } wl_escan_result_v109_t; 990 #define WL_ESCAN_RESULTS_V109_FIXED_SIZE (OFFSETOF(wl_escan_result_v109_t, bss_info)) 991 992 /** event scan reduces amount of SOC memory needed to store scan results */ 993 typedef struct wl_escan_result_v2 { 994 uint32 buflen; 995 uint32 version; 996 uint16 sync_id; 997 uint16 bss_count; 998 uint8 bss_info[]; /* var length wl_bss_info_X structures */ 999 } wl_escan_result_v2_t; 1000 1001 #ifndef WL_BSS_INFO_TYPEDEF_HAS_ALIAS 1002 typedef wl_escan_result_v109_t wl_escan_result_t; 1003 #define WL_ESCAN_RESULTS_FIXED_SIZE (sizeof(wl_escan_result_t) - sizeof(wl_bss_info_t)) 1004 #endif 1005 1006 typedef struct wl_gscan_result_v2 { 1007 uint32 buflen; 1008 uint32 version; 1009 uint32 scan_ch_bucket; 1010 wl_gscan_bss_info_v2_t bss_info[1]; 1011 } wl_gscan_result_v2_t; 1012 1013 typedef struct wl_gscan_result_v2_1 { 1014 uint32 buflen; 1015 uint32 version; 1016 uint32 scan_ch_bucket; 1017 uint8 bss_info[]; /* var length wl_bss_info_X structures */ 1018 } wl_gscan_result_v2_1_t; 1019 1020 #ifndef WL_BSS_INFO_TYPEDEF_HAS_ALIAS 1021 typedef wl_gscan_result_v2_t wl_gscan_result_t; 1022 #define WL_GSCAN_RESULTS_FIXED_SIZE (sizeof(wl_gscan_result_t) - sizeof(wl_gscan_bss_info_t)) 1023 #endif 1024 1025 /** incremental scan results struct */ 1026 typedef struct wl_iscan_results { 1027 uint32 status; 1028 wl_scan_results_v109_t results; 1029 } wl_iscan_results_v109_t; 1030 1031 /** incremental scan results struct */ 1032 typedef struct wl_iscan_results_v2 { 1033 uint32 status; 1034 wl_scan_results_v2_t results; 1035 } wl_iscan_results_v2_t; 1036 1037 #ifndef WL_BSS_INFO_TYPEDEF_HAS_ALIAS 1038 typedef wl_iscan_results_v109_t wl_iscan_results_t; 1039 /** size of wl_iscan_results not including variable length array */ 1040 #define WL_ISCAN_RESULTS_FIXED_SIZE \ 1041 (WL_SCAN_RESULTS_FIXED_SIZE + OFFSETOF(wl_iscan_results_t, results)) 1042 #endif 1043 1044 typedef struct wl_probe_params { 1045 wlc_ssid_t ssid; 1046 struct ether_addr bssid; 1047 struct ether_addr mac; 1048 } wl_probe_params_t; 1049 1050 #define WL_MAXRATES_IN_SET 16 /**< max # of rates in a rateset */ 1051 1052 typedef struct wl_rateset { 1053 uint32 count; /**< # rates in this set */ 1054 uint8 rates[WL_MAXRATES_IN_SET]; /**< rates in 500kbps units w/hi bit set if basic */ 1055 } wl_rateset_t; 1056 1057 #define WL_VHT_CAP_MCS_MAP_NSS_MAX 8 1058 1059 typedef struct wl_rateset_args_v1 { 1060 uint32 count; /**< # rates in this set */ 1061 uint8 rates[WL_MAXRATES_IN_SET]; /**< rates in 500kbps units w/hi bit set if basic */ 1062 uint8 mcs[MCSSET_LEN]; /**< supported mcs index bit map */ 1063 uint16 vht_mcs[WL_VHT_CAP_MCS_MAP_NSS_MAX]; /**< supported mcs index bit map per nss */ 1064 } wl_rateset_args_v1_t; 1065 1066 #define RATESET_ARGS_V1 (1) 1067 #define RATESET_ARGS_V2 (2) 1068 #define RATESET_ARGS_V3 (3) 1069 1070 /* RATESET_VERSION_ENABLED is defined in wl.mk post J branch. 1071 * Guidelines to use wl_rateset_args_t: 1072 * [a] in wlioctl.h: Add macro RATESET_ARGS_VX where X is the new version number. 1073 * [b] in wlioctl.h: Add a new structure with wl_rateset_args_vX_t 1074 * [c] in wlu.c app: Add support to parse new structure under RATESET_ARGS_VX 1075 * [d] in wlc_types.h: in respective branch and trunk: redefine wl_rateset_args_t with 1076 * new wl_rateset_args_vX_t 1077 */ 1078 #ifndef RATESET_VERSION_ENABLED 1079 /* rateset structure before versioning. legacy. DONOT update anymore here */ 1080 #define RATESET_ARGS_VERSION (RATESET_ARGS_V1) 1081 typedef wl_rateset_args_v1_t wl_rateset_args_t; 1082 #endif /* RATESET_VERSION_ENABLED */ 1083 1084 /* Note: dependent structures: sta_info_vX_t. When any update to this structure happens, 1085 * update sta_info_vX_t also. 1086 */ 1087 #define WL_HE_CAP_MCS_MAP_NSS_MAX 8 1088 1089 typedef struct wl_rateset_args_v2 { 1090 uint16 version; /**< version. */ 1091 uint16 len; /**< length */ 1092 uint32 count; /**< # rates in this set */ 1093 uint8 rates[WL_MAXRATES_IN_SET]; /**< rates in 500kbps units w/hi bit set if basic */ 1094 uint8 mcs[MCSSET_LEN]; /**< supported mcs index bit map */ 1095 uint16 vht_mcs[WL_VHT_CAP_MCS_MAP_NSS_MAX]; /**< supported mcs index bit map per nss */ 1096 uint16 he_mcs[WL_HE_CAP_MCS_MAP_NSS_MAX]; /**< supported he mcs index bit map per nss */ 1097 } wl_rateset_args_v2_t; 1098 1099 /* HE Rates BITMAP */ 1100 #define WL_HE_CAP_MCS_0_7_MAP 0x00ff 1101 #define WL_HE_CAP_MCS_0_9_MAP 0x03ff 1102 #define WL_HE_CAP_MCS_0_11_MAP 0x0fff 1103 1104 /* Note: dependent structures: sta_info_vX_t. When any update to this structure happens, 1105 * update sta_info_vX_t also. 1106 */ 1107 #define WL_EHT_CAP_MCS_MAP_NSS_MAX 8u /* could be max. 16 streams by the spec, 1108 * but it's to control our own rateset 1109 * so it probably won't exceed 4 streams 1110 * anyway... 1111 */ 1112 1113 typedef struct wl_rateset_args_v3 { 1114 uint16 version; /**< version. */ 1115 uint16 len; /**< length */ 1116 uint32 count; /**< # rates in 'rates' */ 1117 uint8 rates[WL_MAXRATES_IN_SET]; /**< rates in 500kbps units w/hi bit set if basic */ 1118 uint8 mcs[MCSSET_LEN]; /**< supported mcs index bit map */ 1119 uint16 vht_mcs[WL_VHT_CAP_MCS_MAP_NSS_MAX]; /**< supported VHT mcs per nss */ 1120 uint16 he_mcs[WL_HE_CAP_MCS_MAP_NSS_MAX]; /**< supported HE mcs per nss */ 1121 uint16 eht_mcs[WL_EHT_CAP_MCS_MAP_NSS_MAX]; /**< supported EHT mcs bitmap per nss */ 1122 } wl_rateset_args_v3_t; 1123 1124 /* EHT MCS BITMAP */ 1125 #define WL_EHT_CAP_MCS_0_7_MAP 0x00ffu 1126 #define WL_EHT_CAP_MCS_0_9_MAP 0x03ffu 1127 #define WL_EHT_CAP_MCS_0_11_MAP 0x0fffu 1128 #define WL_EHT_CAP_MCS_0_13_MAP 0x3fffu 1129 1130 #define TXBF_RATE_MCS_ALL 4 1131 #define TXBF_RATE_VHT_ALL 4 1132 #define TXBF_RATE_OFDM_ALL 8 1133 1134 typedef struct wl_txbf_rateset { 1135 uint8 txbf_rate_mcs[TXBF_RATE_MCS_ALL]; /**< one for each stream */ 1136 uint8 txbf_rate_mcs_bcm[TXBF_RATE_MCS_ALL]; /**< one for each stream */ 1137 uint16 txbf_rate_vht[TXBF_RATE_VHT_ALL]; /**< one for each stream */ 1138 uint16 txbf_rate_vht_bcm[TXBF_RATE_VHT_ALL]; /**< one for each stream */ 1139 uint8 txbf_rate_ofdm[TXBF_RATE_OFDM_ALL]; /**< bitmap of ofdm rates that enables txbf */ 1140 uint8 txbf_rate_ofdm_bcm[TXBF_RATE_OFDM_ALL]; /* bitmap of ofdm rates that enables txbf */ 1141 uint8 txbf_rate_ofdm_cnt; 1142 uint8 txbf_rate_ofdm_cnt_bcm; 1143 } wl_txbf_rateset_t; 1144 1145 #define NUM_BFGAIN_ARRAY_1RX 2 1146 #define NUM_BFGAIN_ARRAY_2RX 3 1147 #define NUM_BFGAIN_ARRAY_3RX 4 1148 #define NUM_BFGAIN_ARRAY_4RX 5 1149 1150 typedef struct wl_txbf_expgainset { 1151 /* bitmap for each element: B[4:0]=>c0, B[9:5]=>c1, B[14:10]=>c2, B[19:15]=>c[3-7] 1152 * B[24:20]=>c[8-9], B[29:25]=>c[10-11] 1153 */ 1154 uint32 bfgain_2x1[NUM_BFGAIN_ARRAY_1RX]; /* exp 1ss, imp 1ss */ 1155 uint32 bfgain_2x2[NUM_BFGAIN_ARRAY_2RX]; /* exp [1-2]ss, imp 1ss */ 1156 uint32 bfgain_3x1[NUM_BFGAIN_ARRAY_1RX]; 1157 uint32 bfgain_3x2[NUM_BFGAIN_ARRAY_2RX]; 1158 uint32 bfgain_3x3[NUM_BFGAIN_ARRAY_3RX]; /* exp [1-3]ss, imp 1ss */ 1159 uint32 bfgain_4x1[NUM_BFGAIN_ARRAY_1RX]; 1160 uint32 bfgain_4x2[NUM_BFGAIN_ARRAY_2RX]; 1161 uint32 bfgain_4x3[NUM_BFGAIN_ARRAY_3RX]; 1162 uint32 bfgain_4x4[NUM_BFGAIN_ARRAY_4RX]; /* exp [1-4]ss, imp 1ss */ 1163 } wl_txbf_expgainset_t; 1164 1165 #define OFDM_RATE_MASK 0x0000007f 1166 typedef uint8 ofdm_rates_t; 1167 1168 typedef struct wl_rates_info { 1169 wl_rateset_t rs_tgt; 1170 uint32 phy_type; 1171 int32 bandtype; 1172 uint8 cck_only; 1173 uint8 rate_mask; 1174 uint8 mcsallow; 1175 uint8 bw; 1176 uint8 txstreams; 1177 uint8 PAD[3]; 1178 } wl_rates_info_t; 1179 1180 /**uint32 list */ 1181 typedef struct wl_uint32_list { 1182 /** in - # of elements, out - # of entries */ 1183 uint32 count; 1184 /** variable length uint32 list */ 1185 uint32 element[1]; 1186 } wl_uint32_list_t; 1187 /* Size in bytes for wl_uint32_list_t with 'count' elements */ 1188 #define WL_UINT32_LIST_SIZE(count) (((count) + 1) * sizeof(uint32)) 1189 1190 #define CHAN_INFO_LIST_ALL_V1 1 1191 1192 typedef struct wl_chanspec_attr_s_v1 { 1193 uint32 chaninfo; 1194 uint32 chanspec; 1195 } wl_chanspec_attr_v1_t; 1196 1197 /**chanspecs list */ 1198 typedef struct wl_chanspec_list_s_v1 { 1199 uint16 version; 1200 /** in - # of chanspecs, out - # of entries */ 1201 uint16 count; 1202 /** variable length chanspecs list */ 1203 wl_chanspec_attr_v1_t chspecs[1]; 1204 } wl_chanspec_list_v1_t; 1205 1206 /* WLC_SET_ALLOW_MODE values */ 1207 #define ALLOW_MODE_ANY_BSSID 0 1208 #define ALLOW_MODE_ONLY_DESIRED_BSSID 1 1209 #define ALLOW_MODE_NO_BSSID 2 1210 1211 /** used for association with a specific BSSID and chanspec list */ 1212 typedef struct wl_assoc_params { 1213 struct ether_addr bssid; /**< 00:00:00:00:00:00: broadcast scan */ 1214 uint16 bssid_cnt; /**< 0: use chanspec_num, and the single bssid, 1215 * otherwise count of chanspecs in chanspec_list 1216 * AND paired bssids following chanspec_list 1217 * also, chanspec_num has to be set to zero 1218 * for bssid list to be used 1219 */ 1220 int32 chanspec_num; /**< 0: all available channels, 1221 * otherwise count of chanspecs in chanspec_list 1222 */ 1223 chanspec_t chanspec_list[1]; /**< list of chanspecs */ 1224 1225 } wl_assoc_params_t; 1226 1227 typedef struct wl_assoc_params_v1 { 1228 uint16 version; 1229 uint16 flags; 1230 struct ether_addr bssid; /**< 00:00:00:00:00:00: broadcast scan */ 1231 uint16 bssid_cnt; /**< 0: use chanspec_num, and the single bssid, 1232 * otherwise count of chanspecs in chanspec_list 1233 * AND paired bssids following chanspec_list 1234 * also, chanspec_num has to be set to zero 1235 * for bssid list to be used 1236 */ 1237 int32 chanspec_num; /**< 0: all available channels, 1238 * otherwise count of chanspecs in chanspec_list 1239 */ 1240 chanspec_t chanspec_list[1]; /**< list of chanspecs */ 1241 } wl_assoc_params_v1_t; 1242 1243 #define ASSOC_HINT_BSSID_PRESENT (1 << 0) 1244 1245 #define WL_ASSOC_PARAMS_FIXED_SIZE OFFSETOF(wl_assoc_params_t, chanspec_list) 1246 #define WL_ASSOC_PARAMS_FIXED_SIZE_V1 OFFSETOF(wl_assoc_params_v1_t, chanspec_list) 1247 /** used for reassociation/roam to a specific BSSID and channel */ 1248 typedef wl_assoc_params_t wl_reassoc_params_t; 1249 #define WL_REASSOC_PARAMS_FIXED_SIZE WL_ASSOC_PARAMS_FIXED_SIZE 1250 #define WL_EXT_REASSOC_VER 1 1251 1252 typedef struct wl_ext_reassoc_params { 1253 uint16 version; 1254 uint16 length; 1255 uint32 flags; 1256 wl_reassoc_params_t params; 1257 } wl_ext_reassoc_params_t; 1258 1259 /* Flags field defined above in wl_ext_reassoc_params 1260 * The value in bits [2:0] is used to specify the type 1261 * of scan to be used for reassoc 1262 */ 1263 1264 #define WL_SCAN_MODE_HIGH_ACC 0u /**< use high accuracy scans for roam */ 1265 #define WL_SCAN_MODE_LOW_SPAN 1u /**< use low span scans for roam */ 1266 #define WL_SCAN_MODE_LOW_POWER 2u /**< use low power scans for roam */ 1267 1268 #define WL_EXTREASSOC_PARAMS_FIXED_SIZE (OFFSETOF(wl_ext_reassoc_params_t, params) + \ 1269 WL_REASSOC_PARAMS_FIXED_SIZE) 1270 1271 /** used for association to a specific BSSID and channel */ 1272 typedef wl_assoc_params_t wl_join_assoc_params_t; 1273 typedef wl_assoc_params_v1_t wl_join_assoc_params_v1_t; 1274 #define WL_JOIN_ASSOC_PARAMS_FIXED_SIZE WL_ASSOC_PARAMS_FIXED_SIZE 1275 #define WL_JOIN_ASSOC_PARAMS_FIXED_SIZE_V1 WL_ASSOC_PARAMS_FIXED_SIZE_V1 1276 /** used for join with or without a specific bssid and channel list */ 1277 typedef struct wl_join_params { 1278 wlc_ssid_t ssid; 1279 wl_assoc_params_t params; /**< optional field, but it must include the fixed portion 1280 * of the wl_assoc_params_t struct when it does present. 1281 */ 1282 } wl_join_params_t; 1283 1284 /** used for join with or without a specific bssid and channel list */ 1285 typedef struct wl_join_params_v1 { 1286 wlc_ssid_t ssid; 1287 wl_assoc_params_v1_t params; /**< optional field, but it must include the fixed portion 1288 * of the wl_assoc_params_t struct when it does present. 1289 */ 1290 } wl_join_params_v1_t; 1291 1292 #define WL_JOIN_PARAMS_FIXED_SIZE (OFFSETOF(wl_join_params_t, params) + \ 1293 WL_ASSOC_PARAMS_FIXED_SIZE) 1294 #define WL_JOIN_PARAMS_FIXED_SIZE_V1 (OFFSETOF(wl_join_params_v1_t, params) + \ 1295 WL_ASSOC_PARAMS_FIXED_SIZE_V1) 1296 typedef struct wlc_roam_exp_params { 1297 int8 a_band_boost_threshold; 1298 int8 a_band_penalty_threshold; 1299 int8 a_band_boost_factor; 1300 int8 a_band_penalty_factor; 1301 int8 cur_bssid_boost; 1302 int8 alert_roam_trigger_threshold; 1303 int16 a_band_max_boost; 1304 } wlc_roam_exp_params_t; 1305 1306 #define ROAM_EXP_CFG_VERSION 1 1307 1308 #define ROAM_EXP_ENABLE_FLAG (1 << 0) 1309 1310 #define ROAM_EXP_CFG_PRESENT (1 << 1) 1311 1312 typedef struct wl_roam_exp_cfg { 1313 uint16 version; 1314 uint16 flags; 1315 wlc_roam_exp_params_t params; 1316 } wl_roam_exp_cfg_t; 1317 1318 typedef struct wl_bssid_pref_list { 1319 struct ether_addr bssid; 1320 /* Add this to modify rssi */ 1321 int8 rssi_factor; 1322 int8 flags; 1323 } wl_bssid_pref_list_t; 1324 1325 #define BSSID_PREF_LIST_VERSION 1 1326 #define ROAM_EXP_CLEAR_BSSID_PREF (1 << 0) 1327 1328 typedef struct wl_bssid_pref_cfg { 1329 uint16 version; 1330 uint16 flags; 1331 uint16 count; 1332 uint16 reserved; 1333 wl_bssid_pref_list_t bssids[]; 1334 } wl_bssid_pref_cfg_t; 1335 1336 #define SSID_WHITELIST_VERSION 1 1337 1338 #define ROAM_EXP_CLEAR_SSID_WHITELIST (1 << 0) 1339 1340 /* Roam SSID whitelist, ssids in this list are ok to */ 1341 /* be considered as targets to join when considering a roam */ 1342 1343 typedef struct wl_ssid_whitelist { 1344 1345 uint16 version; 1346 uint16 flags; 1347 1348 uint8 ssid_count; 1349 uint8 reserved[3]; 1350 wlc_ssid_t ssids[]; 1351 } wl_ssid_whitelist_t; 1352 1353 #define ROAM_EXP_EVENT_VERSION 1 1354 1355 typedef struct wl_roam_exp_event { 1356 1357 uint16 version; 1358 uint16 flags; 1359 wlc_ssid_t cur_ssid; 1360 } wl_roam_exp_event_t; 1361 1362 /** scan params for extended join */ 1363 typedef struct wl_join_scan_params { 1364 uint8 scan_type; /**< 0 use default, active or passive scan */ 1365 uint8 PAD[3]; 1366 int32 nprobes; /**< -1 use default, number of probes per channel */ 1367 int32 active_time; /**< -1 use default, dwell time per channel for 1368 * active scanning 1369 */ 1370 int32 passive_time; /**< -1 use default, dwell time per channel 1371 * for passive scanning 1372 */ 1373 int32 home_time; /**< -1 use default, dwell time for the home channel 1374 * between channel scans 1375 */ 1376 } wl_join_scan_params_t; 1377 1378 #define wl_join_assoc_params_t wl_assoc_params_t 1379 #define wl_join_assoc_params_v1_t wl_assoc_params_v1_t 1380 /** extended join params */ 1381 typedef struct wl_extjoin_params { 1382 wlc_ssid_t ssid; /**< {0, ""}: wildcard scan */ 1383 wl_join_scan_params_t scan; 1384 wl_join_assoc_params_t assoc; /**< optional field, but it must include the fixed portion 1385 * of the wl_join_assoc_params_t struct when it does 1386 * present. 1387 */ 1388 } wl_extjoin_params_t; 1389 1390 typedef struct wl_extjoin_params_v1 { 1391 uint16 version; 1392 wlc_ssid_t ssid; /**< {0, ""}: wildcard scan */ 1393 wl_join_scan_params_t scan; 1394 wl_join_assoc_params_v1_t assoc; /**< optional field, but it must include the fixed portion 1395 * of the wl_join_assoc_params_t struct when it does 1396 * present. 1397 */ 1398 } wl_extjoin_params_v1_t; 1399 1400 #define WL_EXTJOIN_PARAMS_FIXED_SIZE (OFFSETOF(wl_extjoin_params_t, assoc) + \ 1401 WL_JOIN_ASSOC_PARAMS_FIXED_SIZE) 1402 #define WL_EXTJOIN_PARAMS_FIXED_SIZE_V1 (OFFSETOF(wl_extjoin_params_v1_t, assoc) + \ 1403 WL_JOIN_ASSOC_PARAMS_FIXED_SIZE_V1) 1404 #define ANT_SELCFG_MAX 4 /**< max number of antenna configurations */ 1405 #define MAX_STREAMS_SUPPORTED 4 /**< max number of streams supported */ 1406 typedef struct { 1407 uint8 ant_config[ANT_SELCFG_MAX]; /**< antenna configuration */ 1408 uint8 num_antcfg; /**< number of available antenna configurations */ 1409 } wlc_antselcfg_t; 1410 1411 /* This is obsolete.Pls add new fields by extending versioned structure. 1412 * cca_congest_ext_vX_t [X is latest version] 1413 */ 1414 typedef struct cca_congest { 1415 uint32 duration; /**< millisecs spent sampling this channel */ 1416 union { 1417 uint32 congest_ibss; /**< millisecs in our bss (presumably this traffic will */ 1418 /**< move if cur bss moves channels) */ 1419 uint32 congest_me; /**< millisecs in my own traffic */ 1420 }; 1421 union { 1422 uint32 congest_obss; /**< traffic not in our bss */ 1423 uint32 congest_notme; /**< traffic not from/to me (including bc/mc) */ 1424 }; 1425 uint32 interference; /**< millisecs detecting a non 802.11 interferer. */ 1426 uint32 timestamp; /**< second timestamp */ 1427 } cca_congest_t; 1428 1429 /* This is obsolete.Pls add new fields by extending versioned structure. 1430 * cca_congest_ext_channel_req_vX_t [X is latest version] 1431 */ 1432 typedef struct cca_congest_channel_req { 1433 chanspec_t chanspec; /**< Which channel? */ 1434 uint16 num_secs; /**< How many secs worth of data */ 1435 cca_congest_t secs[1]; /**< Data */ 1436 } cca_congest_channel_req_t; 1437 1438 typedef struct cca_congest_ext { 1439 uint32 timestamp; /**< second timestamp */ 1440 1441 /* Base structure of cca_congest_t: CCA statistics all inclusive */ 1442 uint32 duration; /**< millisecs spent sampling this channel */ 1443 uint32 congest_meonly; /**< millisecs in my own traffic (TX + RX) */ 1444 uint32 congest_ibss; /**< millisecs in our bss (presumably this traffic will */ 1445 /**< move if cur bss moves channels) */ 1446 uint32 congest_obss; /**< traffic not in our bss */ 1447 uint32 interference; /**< millisecs detecting a non 802.11 interferer. */ 1448 1449 /* CCA statistics for non PM only */ 1450 uint32 duration_nopm; /**< millisecs spent sampling this channel */ 1451 uint32 congest_meonly_nopm; /**< millisecs in my own traffic (TX + RX) */ 1452 uint32 congest_ibss_nopm; /**< millisecs in our bss (presumably this traffic will */ 1453 /**< move if cur bss moves channels) */ 1454 uint32 congest_obss_nopm; /**< traffic not in our bss */ 1455 uint32 interference_nopm; /**< millisecs detecting a non 802.11 interferer. */ 1456 1457 /* CCA statistics for during PM only */ 1458 uint32 duration_pm; /**< millisecs spent sampling this channel */ 1459 uint32 congest_meonly_pm; /**< millisecs in my own traffic (TX + RX) */ 1460 uint32 congest_ibss_pm; /**< millisecs in our bss (presumably this traffic will */ 1461 /**< move if cur bss moves channels) */ 1462 uint32 congest_obss_pm; /**< traffic not in our bss */ 1463 uint32 interference_pm; /**< millisecs detecting a non 802.11 interferer. */ 1464 } cca_congest_ext_t; 1465 1466 typedef struct cca_congest_ext_v2 { 1467 uint32 timestamp; /**< second timestamp */ 1468 1469 /* Base structure of cca_congest_t: CCA statistics all inclusive */ 1470 uint32 duration; /**< millisecs spent sampling this channel */ 1471 uint32 congest_meonly; /**< millisecs in my own traffic (TX + RX) */ 1472 uint32 congest_ibss; /**< millisecs in our bss (presumably this traffic will */ 1473 /**< move if cur bss moves channels) */ 1474 uint32 congest_obss; /**< traffic not in our bss */ 1475 uint32 interference; /**< millisecs detecting a non 802.11 interferer. */ 1476 1477 /* CCA statistics for non PM only */ 1478 uint32 duration_nopm; /**< millisecs spent sampling this channel */ 1479 uint32 congest_meonly_nopm; /**< millisecs in my own traffic (TX + RX) */ 1480 uint32 congest_ibss_nopm; /**< millisecs in our bss (presumably this traffic will */ 1481 /**< move if cur bss moves channels) */ 1482 uint32 congest_obss_nopm; /**< traffic not in our bss */ 1483 uint32 interference_nopm; /**< millisecs detecting a non 802.11 interferer. */ 1484 1485 /* CCA statistics for during PM only */ 1486 uint32 duration_pm; /**< millisecs spent sampling this channel */ 1487 uint32 congest_meonly_pm; /**< millisecs in my own traffic (TX + RX) */ 1488 uint32 congest_ibss_pm; /**< millisecs in our bss (presumably this traffic will */ 1489 /**< move if cur bss moves channels) */ 1490 uint32 congest_obss_pm; /**< traffic not in our bss */ 1491 uint32 interference_pm; /**< millisecs detecting a non 802.11 interferer. */ 1492 uint32 radio_on_time; /* Awake time on this channel */ 1493 uint32 cca_busy_time; /* CCA is held busy on this channel */ 1494 } cca_congest_ext_v2_t; 1495 1496 #define WL_CCA_EXT_REQ_VER 0u 1497 #define WL_CCA_EXT_REQ_VER_V2 2u 1498 #define WL_CCA_EXT_REQ_VER_V3 3u 1499 1500 typedef struct cca_congest_ext_channel_req { 1501 uint16 ver; /**< version of this struct */ 1502 uint16 len; /**< len of this structure */ 1503 chanspec_t chanspec; /**< Which channel? */ 1504 uint16 num_secs; /**< How many secs worth of data */ 1505 struct cca_congest_ext secs[1]; /**< Data - 3 sets for ALL - non-PM - PM */ 1506 } cca_congest_ext_channel_req_t; 1507 1508 typedef struct cca_congest_ext_channel_req_v2 { 1509 uint16 ver; /**< version of this struct */ 1510 uint16 len; /**< len of this structure */ 1511 chanspec_t chanspec; /**< Which channel? */ 1512 uint16 num_secs; /* How many secs worth of data */ 1513 cca_congest_ext_v2_t secs[1]; /* Data - 3 sets for ALL - non-PM - PM */ 1514 } cca_congest_ext_channel_req_v2_t; 1515 1516 /* Struct holding all channels cca statistics */ 1517 typedef struct cca_congest_ext_channel_req_v3 { 1518 uint16 ver; 1519 uint16 len; 1520 uint8 PAD[2]; 1521 uint16 num_of_entries; 1522 cca_congest_ext_channel_req_v2_t per_chan_stats[1]; 1523 } cca_congest_ext_channel_req_v3_t; 1524 1525 typedef struct { 1526 uint32 duration; /**< millisecs spent sampling this channel */ 1527 uint32 congest; /**< millisecs detecting busy CCA */ 1528 uint32 timestamp; /**< second timestamp */ 1529 } cca_congest_simple_t; 1530 1531 /* The following two structure must have same first 4 fields. 1532 * The cca_chan_qual_event_t is used to report CCA in older formats and NF. 1533 * The cca_only_chan_qual_event_t is used to report CCA only with newer format. 1534 */ 1535 typedef struct { 1536 uint16 status; 1537 uint16 id; 1538 chanspec_t chanspec; /**< Which channel? */ 1539 uint16 len; 1540 union { 1541 cca_congest_simple_t cca_busy; /**< CCA busy */ 1542 cca_congest_t cca_busy_ext; /**< Extended CCA report */ 1543 int32 noise; /**< noise floor */ 1544 }; 1545 } cca_chan_qual_event_t; 1546 1547 typedef struct { 1548 uint16 status; 1549 uint16 id; 1550 chanspec_t chanspec; /**< Which channel? */ 1551 uint16 len; 1552 union { 1553 cca_congest_simple_t cca_busy; /**< CCA busy */ 1554 struct { 1555 cca_congest_t cca_busy_ext; /**< Extended CCA report */ 1556 cca_congest_t cca_busy_nopm; /**< Extedned CCA report (PM awake time) */ 1557 cca_congest_t cca_busy_pm; /**< Extedned CCA report (PM sleep time) */ 1558 }; 1559 }; 1560 } cca_only_chan_qual_event_t; 1561 1562 typedef struct { 1563 uint16 status; /* Indicates the status of event */ 1564 uint16 id; 1565 /* id is used to indicate the number of bytes to read */ 1566 chanspec_t chanspec; /**< Which channel? */ 1567 uint16 len; 1568 union { 1569 cca_congest_simple_t cca_busy; /**< CCA busy */ 1570 struct { 1571 cca_congest_t cca_busy_ext; /**< Extended CCA report */ 1572 cca_congest_t cca_busy_nopm; /**< Extedned CCA report (PM awake time) */ 1573 cca_congest_t cca_busy_pm; /**< Extedned CCA report (PM sleep time) */ 1574 }; 1575 }; 1576 int32 ofdm_desense; 1577 } cca_only_chan_qual_event_v2_t; 1578 1579 typedef struct { 1580 uint32 msrmnt_time; /**< Time for Measurement (msec) */ 1581 uint32 msrmnt_done; /**< flag set when measurement complete */ 1582 char buf[]; 1583 } cca_stats_n_flags; 1584 1585 typedef struct { 1586 uint32 msrmnt_query; /* host to driver query for measurement done */ 1587 uint32 time_req; /* time required for measurement */ 1588 uint8 report_opt; /* option to print different stats in report */ 1589 uint8 PAD[3]; 1590 } cca_msrmnt_query; 1591 1592 /* interference sources */ 1593 enum interference_source { 1594 ITFR_NONE = 0, /**< interference */ 1595 ITFR_PHONE, /**< wireless phone */ 1596 ITFR_VIDEO_CAMERA, /**< wireless video camera */ 1597 ITFR_MICROWAVE_OVEN, /**< microwave oven */ 1598 ITFR_BABY_MONITOR, /**< wireless baby monitor */ 1599 ITFR_BLUETOOTH, /**< bluetooth */ 1600 ITFR_VIDEO_CAMERA_OR_BABY_MONITOR, /**< wireless camera or baby monitor */ 1601 ITFR_BLUETOOTH_OR_BABY_MONITOR, /**< bluetooth or baby monitor */ 1602 ITFR_VIDEO_CAMERA_OR_PHONE, /**< video camera or phone */ 1603 ITFR_UNIDENTIFIED /**< interference from unidentified source */ 1604 }; 1605 1606 /** structure for interference source report */ 1607 typedef struct { 1608 uint32 flags; /**< flags. bit definitions below */ 1609 uint32 source; /**< last detected interference source */ 1610 uint32 timestamp; /**< second timestamp on interferenced flag change */ 1611 } interference_source_rep_t; 1612 1613 #define WLC_CNTRY_BUF_SZ 4 /**< Country string is 3 bytes + NUL */ 1614 1615 typedef struct wl_country { 1616 char country_abbrev[WLC_CNTRY_BUF_SZ]; /**< nul-terminated country code used in 1617 * the Country IE 1618 */ 1619 int32 rev; /**< revision specifier for ccode 1620 * on set, -1 indicates unspecified. 1621 * on get, rev >= 0 1622 */ 1623 char ccode[WLC_CNTRY_BUF_SZ]; /**< nul-terminated built-in country code. 1624 * variable length, but fixed size in 1625 * struct allows simple allocation for 1626 * expected country strings <= 3 chars. 1627 */ 1628 } wl_country_t; 1629 1630 #define CCODE_INFO_VERSION 1 1631 1632 typedef enum wl_ccode_role { 1633 WLC_CCODE_ROLE_ACTIVE = 0, 1634 WLC_CCODE_ROLE_HOST, 1635 WLC_CCODE_ROLE_80211D_ASSOC, 1636 WLC_CCODE_ROLE_80211D_SCAN, 1637 WLC_CCODE_ROLE_DEFAULT, 1638 WLC_CCODE_ROLE_DEFAULT_SROM_BKUP, 1639 WLC_CCODE_LAST 1640 } wl_ccode_role_t; 1641 #define WLC_NUM_CCODE_INFO WLC_CCODE_LAST 1642 1643 typedef struct wl_ccode_entry { 1644 uint16 reserved; 1645 uint8 band; 1646 uint8 role; 1647 char ccode[WLC_CNTRY_BUF_SZ]; 1648 } wl_ccode_entry_t; 1649 1650 typedef struct wl_ccode_info { 1651 uint16 version; 1652 uint16 count; /**< Number of ccodes entries in the set */ 1653 wl_ccode_entry_t ccodelist[1]; 1654 } wl_ccode_info_t; 1655 #define WL_CCODE_INFO_FIXED_LEN OFFSETOF(wl_ccode_info_t, ccodelist) 1656 typedef struct wl_channels_in_country { 1657 uint32 buflen; 1658 uint32 band; 1659 char country_abbrev[WLC_CNTRY_BUF_SZ]; 1660 uint32 count; 1661 uint32 channel[1]; 1662 } wl_channels_in_country_t; 1663 1664 typedef struct wl_country_list { 1665 uint32 buflen; 1666 uint32 band_set; 1667 uint32 band; 1668 uint32 count; 1669 char country_abbrev[1]; 1670 } wl_country_list_t; 1671 1672 typedef struct wl_rm_req_elt { 1673 int8 type; 1674 int8 flags; 1675 chanspec_t chanspec; 1676 uint32 token; /**< token for this measurement */ 1677 uint32 tsf_h; /**< TSF high 32-bits of Measurement start time */ 1678 uint32 tsf_l; /**< TSF low 32-bits */ 1679 uint32 dur; /**< TUs */ 1680 } wl_rm_req_elt_t; 1681 1682 typedef struct wl_rm_req { 1683 uint32 token; /**< overall measurement set token */ 1684 uint32 count; /**< number of measurement requests */ 1685 void *cb; /**< completion callback function: may be NULL */ 1686 void *cb_arg; /**< arg to completion callback function */ 1687 wl_rm_req_elt_t req[1]; /**< variable length block of requests */ 1688 } wl_rm_req_t; 1689 #define WL_RM_REQ_FIXED_LEN OFFSETOF(wl_rm_req_t, req) 1690 1691 typedef struct wl_rm_rep_elt { 1692 int8 type; 1693 int8 flags; 1694 chanspec_t chanspec; 1695 uint32 token; /**< token for this measurement */ 1696 uint32 tsf_h; /**< TSF high 32-bits of Measurement start time */ 1697 uint32 tsf_l; /**< TSF low 32-bits */ 1698 uint32 dur; /**< TUs */ 1699 uint32 len; /**< byte length of data block */ 1700 uint8 data[1]; /**< variable length data block */ 1701 } wl_rm_rep_elt_t; 1702 #define WL_RM_REP_ELT_FIXED_LEN 24 /**< length excluding data block */ 1703 1704 #define WL_RPI_REP_BIN_NUM 8 1705 typedef struct wl_rm_rpi_rep { 1706 uint8 rpi[WL_RPI_REP_BIN_NUM]; 1707 int8 rpi_max[WL_RPI_REP_BIN_NUM]; 1708 } wl_rm_rpi_rep_t; 1709 1710 typedef struct wl_rm_rep { 1711 uint32 token; /**< overall measurement set token */ 1712 uint32 len; /**< length of measurement report block */ 1713 wl_rm_rep_elt_t rep[1]; /**< variable length block of reports */ 1714 } wl_rm_rep_t; 1715 #define WL_RM_REP_FIXED_LEN 8 1716 1717 #ifdef BCMCCX 1718 #define LEAP_USER_MAX 32 1719 #define LEAP_DOMAIN_MAX 32 1720 #define LEAP_PASSWORD_MAX 32 1721 1722 typedef struct wl_leap_info { 1723 wlc_ssid_t ssid; 1724 uint8 user_len; 1725 uint8 user[LEAP_USER_MAX]; 1726 uint8 password_len; 1727 uint8 password[LEAP_PASSWORD_MAX]; 1728 uint8 domain_len; 1729 uint8 domain[LEAP_DOMAIN_MAX]; 1730 uint8 PAD; 1731 } wl_leap_info_t; 1732 1733 typedef struct wl_leap_list { 1734 uint32 buflen; 1735 uint32 version; 1736 uint32 count; 1737 wl_leap_info_t leap_info[1]; 1738 } wl_leap_list_t; 1739 #endif /* BCMCCX */ 1740 1741 typedef enum sup_auth_status { 1742 /* Basic supplicant authentication states */ 1743 WLC_SUP_DISCONNECTED = 0, 1744 WLC_SUP_CONNECTING, 1745 WLC_SUP_IDREQUIRED, 1746 WLC_SUP_AUTHENTICATING, 1747 WLC_SUP_AUTHENTICATED, 1748 WLC_SUP_KEYXCHANGE, 1749 WLC_SUP_KEYED, 1750 WLC_SUP_TIMEOUT, 1751 WLC_SUP_LAST_BASIC_STATE, 1752 1753 /* Extended supplicant authentication states */ 1754 /** Waiting to receive handshake msg M1 */ 1755 WLC_SUP_KEYXCHANGE_WAIT_M1 = WLC_SUP_AUTHENTICATED, 1756 /** Preparing to send handshake msg M2 */ 1757 WLC_SUP_KEYXCHANGE_PREP_M2 = WLC_SUP_KEYXCHANGE, 1758 /* Waiting to receive handshake msg M3 */ 1759 WLC_SUP_KEYXCHANGE_WAIT_M3 = WLC_SUP_LAST_BASIC_STATE, 1760 WLC_SUP_KEYXCHANGE_PREP_M4, /**< Preparing to send handshake msg M4 */ 1761 WLC_SUP_KEYXCHANGE_WAIT_G1, /**< Waiting to receive handshake msg G1 */ 1762 WLC_SUP_KEYXCHANGE_PREP_G2 /**< Preparing to send handshake msg G2 */ 1763 } sup_auth_status_t; 1764 1765 typedef struct wl_wsec_key { 1766 uint32 index; /**< key index */ 1767 uint32 len; /**< key length */ 1768 uint8 data[DOT11_MAX_KEY_SIZE]; /**< key data */ 1769 uint32 pad_1[18]; 1770 uint32 algo; /**< CRYPTO_ALGO_AES_CCM, CRYPTO_ALGO_WEP128, etc */ 1771 uint32 flags; /**< misc flags */ 1772 uint32 pad_2[2]; 1773 int32 pad_3; 1774 int32 iv_initialized; /**< has IV been initialized already? */ 1775 int32 pad_4; 1776 /* Rx IV */ 1777 struct { 1778 uint32 hi; /**< upper 32 bits of IV */ 1779 uint16 lo; /**< lower 16 bits of IV */ 1780 uint16 PAD; 1781 } rxiv; 1782 uint32 pad_5[2]; 1783 struct ether_addr ea; /**< per station */ 1784 uint16 PAD; 1785 } wl_wsec_key_t; 1786 1787 /* Min length for PSK passphrase */ 1788 #define WSEC_MIN_PSK_LEN 8 1789 /* Max length of supported passphrases for PSK */ 1790 #define WSEC_MAX_PSK_LEN 64 1791 /* Max length of supported passphrases for SAE */ 1792 #define WSEC_MAX_PASSPHRASE_LEN 256u 1793 /* Max length of SAE password ID */ 1794 #define WSEC_MAX_SAE_PASSWORD_ID 255u 1795 1796 /* Flag for key material needing passhash'ing */ 1797 #define WSEC_PASSPHRASE 1u 1798 /* Flag indicating an SAE passphrase */ 1799 #define WSEC_SAE_PASSPHRASE 2u 1800 1801 /**receptacle for WLC_SET_WSEC_PMK parameter */ 1802 1803 typedef struct wsec_pmk { 1804 ushort key_len; /* octets in key material */ 1805 ushort flags; /* key handling qualification */ 1806 uint8 key[WSEC_MAX_PASSPHRASE_LEN]; /* PMK material */ 1807 uint16 opt_len; /* optional field length */ 1808 uint8 opt_tlvs[1]; /* optional filed in bcm_xtlv_t format */ 1809 } wsec_pmk_t; 1810 1811 typedef enum { 1812 WL_PMK_TLV_PASSWORD_ID = 1, 1813 WL_PMK_TLV_SSID = 2, 1814 WL_PMK_TLV_BSSID = 3 1815 } wl_pmk_tlv_types_t; 1816 1817 #define WL_AUTH_EVENT_DATA_V1 0x1 1818 #define WL_AUTH_EVENT_DATA_V2 0x2 1819 1820 /* tlv ids for auth event */ 1821 #define WL_AUTH_PMK_TLV_ID 1u 1822 #define WL_AUTH_PMKID_TLV_ID 2u 1823 #define WL_AUTH_PMKID_TYPE_TLV_ID 3u 1824 #define WL_AUTH_SSID_TLV_ID 4u 1825 1826 #define WL_AUTH_PMKID_TYPE_BSSID 1u 1827 #define WL_AUTH_PMKID_TYPE_SSID 2u 1828 /* AUTH event data 1829 * pmk and pmkid in case of SAE auth 1830 * xtlvs will be 32 bit alligned 1831 */ 1832 typedef struct wl_auth_event { 1833 uint16 version; 1834 uint16 length; 1835 uint8 xtlvs[]; 1836 } wl_auth_event_t; 1837 1838 #define WL_AUTH_EVENT_FIXED_LEN_V1 OFFSETOF(wl_auth_event_t, xtlvs) 1839 #define WL_AUTH_EVENT_FIXED_LEN_V2 OFFSETOF(wl_auth_event_t, xtlvs) 1840 1841 #define WL_PMKSA_EVENT_DATA_V1 1u 1842 1843 /* tlv ids for PMKSA event */ 1844 #define WL_PMK_TLV_ID 1u 1845 #define WL_PMKID_TLV_ID 2u 1846 #define WL_PEER_ADDR_TLV_ID 3u 1847 1848 /* PMKSA event data structure */ 1849 typedef struct wl_pmksa_event { 1850 uint16 version; 1851 uint16 length; 1852 uint8 xtlvs[]; 1853 } wl_pmksa_event_t; 1854 1855 #define WL_PMKSA_EVENT_FIXED_LEN_V1 OFFSETOF(wl_pmksa_event_t, xtlvs) 1856 1857 #define FILS_CACHE_ID_LEN 2u 1858 #define PMK_LEN_MAX 48u 1859 1860 typedef struct _pmkid_v1 { 1861 struct ether_addr BSSID; 1862 uint8 PMKID[WPA2_PMKID_LEN]; 1863 } pmkid_v1_t; 1864 1865 #define PMKID_ELEM_V2_LENGTH (sizeof(struct ether_addr) + WPA2_PMKID_LEN + PMK_LEN_MAX + \ 1866 sizeof(ssid_info_t) + FILS_CACHE_ID_LEN) 1867 1868 typedef struct _pmkid_v2 { 1869 uint16 length; /* Should match PMKID_ELEM_VX_LENGTH */ 1870 struct ether_addr BSSID; 1871 uint8 PMKID[WPA2_PMKID_LEN]; 1872 uint8 pmk[PMK_LEN_MAX]; /* for FILS key deriviation */ 1873 uint16 pmk_len; 1874 ssid_info_t ssid; 1875 uint8 fils_cache_id[FILS_CACHE_ID_LEN]; 1876 } pmkid_v2_t; 1877 1878 #define PMKID_LIST_VER_2 2 1879 1880 typedef struct _pmkid_v3 { 1881 struct ether_addr bssid; 1882 uint8 pmkid[WPA2_PMKID_LEN]; 1883 uint8 pmkid_len; 1884 uint8 pmk[PMK_LEN_MAX]; 1885 uint8 pmk_len; 1886 uint16 fils_cache_id; /* 2-byte length */ 1887 uint8 akm; 1888 uint8 ssid_len; 1889 uint8 ssid[DOT11_MAX_SSID_LEN]; /* For FILS, to save ESSID */ 1890 /* one pmkid used in whole ESS */ 1891 uint32 time_left; /* remaining time until expirary in sec. */ 1892 /* 0 means expired, all 0xFF means never expire */ 1893 } pmkid_v3_t; 1894 1895 #define PMKID_LIST_VER_3 3 1896 typedef struct _pmkid_list_v1 { 1897 uint32 npmkid; 1898 pmkid_v1_t pmkid[1]; 1899 } pmkid_list_v1_t; 1900 1901 typedef struct _pmkid_list_v2 { 1902 uint16 version; 1903 uint16 length; 1904 pmkid_v2_t pmkid[1]; 1905 } pmkid_list_v2_t; 1906 1907 #define PMKDB_SET_IOVAR 1u 1908 #define PMKDB_GET_IOVAR 2u 1909 #define PMKDB_CLEAR_IOVAR 4u 1910 1911 typedef struct _pmkid_list_v3 { 1912 uint16 version; 1913 uint16 length; 1914 uint16 count; 1915 uint16 flag; 1916 pmkid_v3_t pmkid[]; 1917 } pmkid_list_v3_t; 1918 1919 #ifndef PMKID_VERSION_ENABLED 1920 /* pmkid structure before versioning. legacy. DONOT update anymore here */ 1921 typedef pmkid_v1_t pmkid_t; 1922 typedef pmkid_list_v1_t pmkid_list_t; 1923 #endif /* PMKID_VERSION_ENABLED */ 1924 1925 typedef struct _pmkid_cand { 1926 struct ether_addr BSSID; 1927 uint8 preauth; 1928 } pmkid_cand_t; 1929 1930 typedef struct _pmkid_cand_list { 1931 uint32 npmkid_cand; 1932 pmkid_cand_t pmkid_cand[1]; 1933 } pmkid_cand_list_t; 1934 1935 #define WL_STA_ANT_MAX 4 /**< max possible rx antennas */ 1936 1937 typedef struct wl_assoc_info { 1938 uint32 req_len; 1939 uint32 resp_len; 1940 uint32 flags; 1941 struct dot11_assoc_req req; 1942 struct ether_addr reassoc_bssid; /**< used in reassoc's */ 1943 struct dot11_assoc_resp resp; 1944 uint32 state; 1945 } wl_assoc_info_t; 1946 1947 /** srom read/write struct passed through ioctl */ 1948 typedef struct { 1949 uint32 byteoff; /**< byte offset */ 1950 uint32 nbytes; /**< number of bytes */ 1951 uint16 buf[]; 1952 } srom_rw_t; 1953 1954 #define CISH_FLAG_PCIECIS (1 << 15) /**< write CIS format bit for PCIe CIS */ 1955 1956 /** similar cis (srom or otp) struct [iovar: may not be aligned] */ 1957 typedef struct { 1958 uint16 source; /**< cis source */ 1959 uint16 flags; /**< flags */ 1960 uint32 byteoff; /**< byte offset */ 1961 uint32 nbytes; /**< number of bytes */ 1962 /* data follows here */ 1963 } cis_rw_t; 1964 1965 /** R_REG and W_REG struct passed through ioctl */ 1966 typedef struct { 1967 uint32 byteoff; /**< byte offset of the field in d11regs_t */ 1968 uint32 val; /**< read/write value of the field */ 1969 uint32 size; /**< sizeof the field */ 1970 uint32 band; /**< band (optional) */ 1971 } rw_reg_t; 1972 1973 /** 1974 * Structure used by GET/SET_ATTEN ioctls - it controls power in b/g-band 1975 * PCL - Power Control Loop 1976 */ 1977 typedef struct { 1978 uint16 auto_ctrl; /**< WL_ATTEN_XX */ 1979 uint16 bb; /**< Baseband attenuation */ 1980 uint16 radio; /**< Radio attenuation */ 1981 uint16 txctl1; /**< Radio TX_CTL1 value */ 1982 } atten_t; 1983 1984 /** Per-AC retry parameters */ 1985 struct wme_tx_params_s { 1986 uint8 short_retry; 1987 uint8 short_fallback; 1988 uint8 long_retry; 1989 uint8 long_fallback; 1990 uint16 max_rate; /**< In units of 512 Kbps */ 1991 }; 1992 1993 typedef struct wme_tx_params_s wme_tx_params_t; 1994 1995 #define WL_WME_TX_PARAMS_IO_BYTES (sizeof(wme_tx_params_t) * AC_COUNT) 1996 1997 /**Used to get specific link/ac parameters */ 1998 typedef struct { 1999 int32 ac; 2000 uint8 val; 2001 struct ether_addr ea; 2002 uint8 PAD; 2003 } link_val_t; 2004 2005 #define WL_PM_MUTE_TX_VER 1 2006 2007 typedef struct wl_pm_mute_tx { 2008 uint16 version; /**< version */ 2009 uint16 len; /**< length */ 2010 uint16 deadline; /**< deadline timer (in milliseconds) */ 2011 uint8 enable; /**< set to 1 to enable mode; set to 0 to disable it */ 2012 uint8 PAD; 2013 } wl_pm_mute_tx_t; 2014 2015 /* 2016 * Pay attention to version if structure changes. 2017 */ 2018 2019 /* sta_info_t version 4 */ 2020 typedef struct { 2021 uint16 ver; /**< version of this struct */ 2022 uint16 len; /**< length in bytes of this structure */ 2023 uint16 cap; /**< sta's advertised capabilities */ 2024 uint16 PAD; 2025 uint32 flags; /**< flags defined below */ 2026 uint32 idle; /**< time since data pkt rx'd from sta */ 2027 struct ether_addr ea; /**< Station address */ 2028 uint16 PAD; 2029 wl_rateset_t rateset; /**< rateset in use */ 2030 uint32 in; /**< seconds elapsed since associated */ 2031 uint32 listen_interval_inms; /**< Min Listen interval in ms for this STA */ 2032 uint32 tx_pkts; /**< # of user packets transmitted (unicast) */ 2033 uint32 tx_failures; /**< # of user packets failed */ 2034 uint32 rx_ucast_pkts; /**< # of unicast packets received */ 2035 uint32 rx_mcast_pkts; /**< # of multicast packets received */ 2036 uint32 tx_rate; /**< Rate used by last tx frame */ 2037 uint32 rx_rate; /**< Rate of last successful rx frame */ 2038 uint32 rx_decrypt_succeeds; /**< # of packet decrypted successfully */ 2039 uint32 rx_decrypt_failures; /**< # of packet decrypted unsuccessfully */ 2040 uint32 tx_tot_pkts; /**< # of user tx pkts (ucast + mcast) */ 2041 uint32 rx_tot_pkts; /**< # of data packets recvd (uni + mcast) */ 2042 uint32 tx_mcast_pkts; /**< # of mcast pkts txed */ 2043 uint64 tx_tot_bytes; /**< data bytes txed (ucast + mcast) */ 2044 uint64 rx_tot_bytes; /**< data bytes recvd (ucast + mcast) */ 2045 uint64 tx_ucast_bytes; /**< data bytes txed (ucast) */ 2046 uint64 tx_mcast_bytes; /**< # data bytes txed (mcast) */ 2047 uint64 rx_ucast_bytes; /**< data bytes recvd (ucast) */ 2048 uint64 rx_mcast_bytes; /**< data bytes recvd (mcast) */ 2049 int8 rssi[WL_STA_ANT_MAX]; /**< average rssi per antenna 2050 * of data frames 2051 */ 2052 int8 nf[WL_STA_ANT_MAX]; /**< per antenna noise floor */ 2053 uint16 aid; /**< association ID */ 2054 uint16 ht_capabilities; /**< advertised ht caps */ 2055 uint16 vht_flags; /**< converted vht flags */ 2056 uint16 PAD; 2057 uint32 tx_pkts_retried; /**< # of frames where a retry was 2058 * necessary 2059 */ 2060 uint32 tx_pkts_retry_exhausted; /**< # of user frames where a retry 2061 * was exhausted 2062 */ 2063 int8 rx_lastpkt_rssi[WL_STA_ANT_MAX]; /**< Per antenna RSSI of last 2064 * received data frame. 2065 */ 2066 /* TX WLAN retry/failure statistics: 2067 * Separated for host requested frames and WLAN locally generated frames. 2068 * Include unicast frame only where the retries/failures can be counted. 2069 */ 2070 uint32 tx_pkts_total; /**< # user frames sent successfully */ 2071 uint32 tx_pkts_retries; /**< # user frames retries */ 2072 uint32 tx_pkts_fw_total; /**< # FW generated sent successfully */ 2073 uint32 tx_pkts_fw_retries; /**< # retries for FW generated frames */ 2074 uint32 tx_pkts_fw_retry_exhausted; /**< # FW generated where a retry 2075 * was exhausted 2076 */ 2077 uint32 rx_pkts_retried; /**< # rx with retry bit set */ 2078 uint32 tx_rate_fallback; /**< lowest fallback TX rate */ 2079 /* Fields above this line are common to sta_info_t versions 4 and 5 */ 2080 2081 uint32 rx_dur_total; /* total user RX duration (estimated) */ 2082 2083 chanspec_t chanspec; /** chanspec this sta is on */ 2084 uint16 PAD; 2085 wl_rateset_args_v1_t rateset_adv; /* rateset along with mcs index bitmap */ 2086 uint32 PAD; 2087 } sta_info_v4_t; 2088 2089 /* Note: Version 4 is the latest version of sta_info_t. Version 5 is abandoned. 2090 * Please add new fields to version 4, not version 5. 2091 */ 2092 /* sta_info_t version 5 */ 2093 typedef struct { 2094 uint16 ver; /**< version of this struct */ 2095 uint16 len; /**< length in bytes of this structure */ 2096 uint16 cap; /**< sta's advertised capabilities */ 2097 uint16 PAD; 2098 uint32 flags; /**< flags defined below */ 2099 uint32 idle; /**< time since data pkt rx'd from sta */ 2100 struct ether_addr ea; /**< Station address */ 2101 uint16 PAD; 2102 wl_rateset_t rateset; /**< rateset in use */ 2103 uint32 in; /**< seconds elapsed since associated */ 2104 uint32 listen_interval_inms; /**< Min Listen interval in ms for this STA */ 2105 uint32 tx_pkts; /**< # of user packets transmitted (unicast) */ 2106 uint32 tx_failures; /**< # of user packets failed */ 2107 uint32 rx_ucast_pkts; /**< # of unicast packets received */ 2108 uint32 rx_mcast_pkts; /**< # of multicast packets received */ 2109 uint32 tx_rate; /**< Rate used by last tx frame */ 2110 uint32 rx_rate; /**< Rate of last successful rx frame */ 2111 uint32 rx_decrypt_succeeds; /**< # of packet decrypted successfully */ 2112 uint32 rx_decrypt_failures; /**< # of packet decrypted unsuccessfully */ 2113 uint32 tx_tot_pkts; /**< # of user tx pkts (ucast + mcast) */ 2114 uint32 rx_tot_pkts; /**< # of data packets recvd (uni + mcast) */ 2115 uint32 tx_mcast_pkts; /**< # of mcast pkts txed */ 2116 uint64 tx_tot_bytes; /**< data bytes txed (ucast + mcast) */ 2117 uint64 rx_tot_bytes; /**< data bytes recvd (ucast + mcast) */ 2118 uint64 tx_ucast_bytes; /**< data bytes txed (ucast) */ 2119 uint64 tx_mcast_bytes; /**< # data bytes txed (mcast) */ 2120 uint64 rx_ucast_bytes; /**< data bytes recvd (ucast) */ 2121 uint64 rx_mcast_bytes; /**< data bytes recvd (mcast) */ 2122 int8 rssi[WL_STA_ANT_MAX]; /**< average rssi per antenna 2123 * of data frames 2124 */ 2125 int8 nf[WL_STA_ANT_MAX]; /**< per antenna noise floor */ 2126 uint16 aid; /**< association ID */ 2127 uint16 ht_capabilities; /**< advertised ht caps */ 2128 uint16 vht_flags; /**< converted vht flags */ 2129 uint16 PAD; 2130 uint32 tx_pkts_retried; /**< # of frames where a retry was 2131 * necessary 2132 */ 2133 uint32 tx_pkts_retry_exhausted; /**< # of user frames where a retry 2134 * was exhausted 2135 */ 2136 int8 rx_lastpkt_rssi[WL_STA_ANT_MAX]; /**< Per antenna RSSI of last 2137 * received data frame. 2138 */ 2139 /* TX WLAN retry/failure statistics: 2140 * Separated for host requested frames and WLAN locally generated frames. 2141 * Include unicast frame only where the retries/failures can be counted. 2142 */ 2143 uint32 tx_pkts_total; /**< # user frames sent successfully */ 2144 uint32 tx_pkts_retries; /**< # user frames retries */ 2145 uint32 tx_pkts_fw_total; /**< # FW generated sent successfully */ 2146 uint32 tx_pkts_fw_retries; /**< # retries for FW generated frames */ 2147 uint32 tx_pkts_fw_retry_exhausted; /**< # FW generated where a retry 2148 * was exhausted 2149 */ 2150 uint32 rx_pkts_retried; /**< # rx with retry bit set */ 2151 uint32 tx_rate_fallback; /**< lowest fallback TX rate */ 2152 /* Fields above this line are common to sta_info_t versions 4 and 5 */ 2153 2154 chanspec_t chanspec; /** chanspec this sta is on */ 2155 uint16 PAD; 2156 wl_rateset_args_v1_t rateset_adv; /* rateset along with mcs index bitmap */ 2157 } sta_info_v5_t; 2158 2159 /* 2160 * Pay attention to version if structure changes. 2161 */ 2162 2163 /* sta_info_t version 6 2164 changes to wl_rateset_args_t is leading to update this struct version as well. 2165 */ 2166 typedef struct sta_info_v6 { 2167 uint16 ver; /**< version of this struct */ 2168 uint16 len; /**< length in bytes of this structure */ 2169 uint16 cap; /**< sta's advertised capabilities */ 2170 uint16 PAD; 2171 uint32 flags; /**< flags defined below */ 2172 uint32 idle; /**< time since data pkt rx'd from sta */ 2173 struct ether_addr ea; /**< Station address */ 2174 uint16 PAD; 2175 wl_rateset_t rateset; /**< rateset in use */ 2176 uint32 in; /**< seconds elapsed since associated */ 2177 uint32 listen_interval_inms; /**< Min Listen interval in ms for this STA */ 2178 uint32 tx_pkts; /**< # of user packets transmitted (unicast) */ 2179 uint32 tx_failures; /**< # of user packets failed */ 2180 uint32 rx_ucast_pkts; /**< # of unicast packets received */ 2181 uint32 rx_mcast_pkts; /**< # of multicast packets received */ 2182 uint32 tx_rate; /**< Rate used by last tx frame */ 2183 uint32 rx_rate; /**< Rate of last successful rx frame */ 2184 uint32 rx_decrypt_succeeds; /**< # of packet decrypted successfully */ 2185 uint32 rx_decrypt_failures; /**< # of packet decrypted unsuccessfully */ 2186 uint32 tx_tot_pkts; /**< # of user tx pkts (ucast + mcast) */ 2187 uint32 rx_tot_pkts; /**< # of data packets recvd (uni + mcast) */ 2188 uint32 tx_mcast_pkts; /**< # of mcast pkts txed */ 2189 uint64 tx_tot_bytes; /**< data bytes txed (ucast + mcast) */ 2190 uint64 rx_tot_bytes; /**< data bytes recvd (ucast + mcast) */ 2191 uint64 tx_ucast_bytes; /**< data bytes txed (ucast) */ 2192 uint64 tx_mcast_bytes; /**< # data bytes txed (mcast) */ 2193 uint64 rx_ucast_bytes; /**< data bytes recvd (ucast) */ 2194 uint64 rx_mcast_bytes; /**< data bytes recvd (mcast) */ 2195 int8 rssi[WL_STA_ANT_MAX]; /**< average rssi per antenna 2196 * of data frames 2197 */ 2198 int8 nf[WL_STA_ANT_MAX]; /**< per antenna noise floor */ 2199 uint16 aid; /**< association ID */ 2200 uint16 ht_capabilities; /**< advertised ht caps */ 2201 uint16 vht_flags; /**< converted vht flags */ 2202 uint16 PAD; 2203 uint32 tx_pkts_retried; /**< # of frames where a retry was 2204 * necessary 2205 */ 2206 uint32 tx_pkts_retry_exhausted; /**< # of user frames where a retry 2207 * was exhausted 2208 */ 2209 int8 rx_lastpkt_rssi[WL_STA_ANT_MAX]; /**< Per antenna RSSI of last 2210 * received data frame. 2211 */ 2212 /* TX WLAN retry/failure statistics: 2213 * Separated for host requested frames and WLAN locally generated frames. 2214 * Include unicast frame only where the retries/failures can be counted. 2215 */ 2216 uint32 tx_pkts_total; /**< # user frames sent successfully */ 2217 uint32 tx_pkts_retries; /**< # user frames retries */ 2218 uint32 tx_pkts_fw_total; /**< # FW generated sent successfully */ 2219 uint32 tx_pkts_fw_retries; /**< # retries for FW generated frames */ 2220 uint32 tx_pkts_fw_retry_exhausted; /**< # FW generated where a retry 2221 * was exhausted 2222 */ 2223 uint32 rx_pkts_retried; /**< # rx with retry bit set */ 2224 uint32 tx_rate_fallback; /**< lowest fallback TX rate */ 2225 /* Fields above this line are common to sta_info_t versions 4 and 5 */ 2226 2227 uint32 rx_dur_total; /* total user RX duration (estimated) */ 2228 2229 chanspec_t chanspec; /** chanspec this sta is on */ 2230 uint16 PAD; 2231 wl_rateset_args_v2_t rateset_adv; /* rateset along with mcs index bitmap */ 2232 } sta_info_v6_t; 2233 2234 /* 2235 * Pay attention to version if structure changes. 2236 */ 2237 2238 /* sta_info_t version 7 2239 changes to wl_rateset_args_t is leading to update this struct version as well. 2240 */ 2241 typedef struct sta_info_v7 { 2242 uint16 ver; /**< version of this struct */ 2243 uint16 len; /**< length in bytes of this structure */ 2244 uint16 cap; /**< sta's advertised capabilities */ 2245 uint16 PAD; 2246 uint32 flags; /**< flags defined below */ 2247 uint32 idle; /**< time since data pkt rx'd from sta */ 2248 struct ether_addr ea; /**< Station address */ 2249 uint16 PAD; 2250 wl_rateset_t rateset; /**< rateset in use */ 2251 uint32 in; /**< seconds elapsed since associated */ 2252 uint32 listen_interval_inms; /**< Min Listen interval in ms for this STA */ 2253 uint32 tx_pkts; /**< # of user packets transmitted (unicast) */ 2254 uint32 tx_failures; /**< # of user packets failed */ 2255 uint32 rx_ucast_pkts; /**< # of unicast packets received */ 2256 uint32 rx_mcast_pkts; /**< # of multicast packets received */ 2257 uint32 tx_rate; /**< Rate used by last tx frame */ 2258 uint32 rx_rate; /**< Rate of last successful rx frame */ 2259 uint32 rx_decrypt_succeeds; /**< # of packet decrypted successfully */ 2260 uint32 rx_decrypt_failures; /**< # of packet decrypted unsuccessfully */ 2261 uint32 tx_tot_pkts; /**< # of user tx pkts (ucast + mcast) */ 2262 uint32 rx_tot_pkts; /**< # of data packets recvd (uni + mcast) */ 2263 uint32 tx_mcast_pkts; /**< # of mcast pkts txed */ 2264 uint64 tx_tot_bytes; /**< data bytes txed (ucast + mcast) */ 2265 uint64 rx_tot_bytes; /**< data bytes recvd (ucast + mcast) */ 2266 uint64 tx_ucast_bytes; /**< data bytes txed (ucast) */ 2267 uint64 tx_mcast_bytes; /**< # data bytes txed (mcast) */ 2268 uint64 rx_ucast_bytes; /**< data bytes recvd (ucast) */ 2269 uint64 rx_mcast_bytes; /**< data bytes recvd (mcast) */ 2270 int8 rssi[WL_STA_ANT_MAX]; /**< average rssi per antenna 2271 * of data frames 2272 */ 2273 int8 nf[WL_STA_ANT_MAX]; /**< per antenna noise floor */ 2274 uint16 aid; /**< association ID */ 2275 uint16 ht_capabilities; /**< advertised ht caps */ 2276 uint16 vht_flags; /**< converted vht flags */ 2277 uint16 PAD; 2278 uint32 tx_pkts_retried; /**< # of frames where a retry was 2279 * necessary 2280 */ 2281 uint32 tx_pkts_retry_exhausted; /**< # of user frames where a retry 2282 * was exhausted 2283 */ 2284 int8 rx_lastpkt_rssi[WL_STA_ANT_MAX]; /**< Per antenna RSSI of last 2285 * received data frame. 2286 */ 2287 /* TX WLAN retry/failure statistics: 2288 * Separated for host requested frames and WLAN locally generated frames. 2289 * Include unicast frame only where the retries/failures can be counted. 2290 */ 2291 uint32 tx_pkts_total; /**< # user frames sent successfully */ 2292 uint32 tx_pkts_retries; /**< # user frames retries */ 2293 uint32 tx_pkts_fw_total; /**< # FW generated sent successfully */ 2294 uint32 tx_pkts_fw_retries; /**< # retries for FW generated frames */ 2295 uint32 tx_pkts_fw_retry_exhausted; /**< # FW generated where a retry 2296 * was exhausted 2297 */ 2298 uint32 rx_pkts_retried; /**< # rx with retry bit set */ 2299 uint32 tx_rate_fallback; /**< lowest fallback TX rate */ 2300 /* Fields above this line are common to sta_info_t versions 4 and 5 */ 2301 2302 uint32 rx_dur_total; /* total user RX duration (estimated) */ 2303 2304 chanspec_t chanspec; /** chanspec this sta is on */ 2305 uint16 PAD; 2306 wl_rateset_args_v3_t rateset_adv; /* rateset along with mcs index bitmap */ 2307 } sta_info_v7_t; 2308 2309 /* define to help support one version older sta_info_t from user level 2310 * applications. 2311 */ 2312 #define WL_OLD_STAINFO_SIZE OFFSETOF(sta_info_t, tx_tot_pkts) 2313 2314 #define WL_STA_VER_4 4 2315 #define WL_STA_VER_5 5 2316 #define WL_STA_VER_6 6u 2317 /* FIXME: the user/branch should make the selection! */ 2318 #define WL_STA_VER WL_STA_VER_4 2319 2320 #define SWDIV_STATS_VERSION_2 2 2321 #define SWDIV_STATS_CURRENT_VERSION SWDIV_STATS_VERSION_2 2322 2323 struct wlc_swdiv_stats_v1 { 2324 uint32 auto_en; 2325 uint32 active_ant; 2326 uint32 rxcount; 2327 int32 avg_snr_per_ant0; 2328 int32 avg_snr_per_ant1; 2329 int32 avg_snr_per_ant2; 2330 uint32 swap_ge_rxcount0; 2331 uint32 swap_ge_rxcount1; 2332 uint32 swap_ge_snrthresh0; 2333 uint32 swap_ge_snrthresh1; 2334 uint32 swap_txfail0; 2335 uint32 swap_txfail1; 2336 uint32 swap_timer0; 2337 uint32 swap_timer1; 2338 uint32 swap_alivecheck0; 2339 uint32 swap_alivecheck1; 2340 uint32 rxcount_per_ant0; 2341 uint32 rxcount_per_ant1; 2342 uint32 acc_rxcount; 2343 uint32 acc_rxcount_per_ant0; 2344 uint32 acc_rxcount_per_ant1; 2345 uint32 tx_auto_en; 2346 uint32 tx_active_ant; 2347 uint32 rx_policy; 2348 uint32 tx_policy; 2349 uint32 cell_policy; 2350 uint32 swap_snrdrop0; 2351 uint32 swap_snrdrop1; 2352 uint32 mws_antsel_ovr_tx; 2353 uint32 mws_antsel_ovr_rx; 2354 uint8 swap_trig_event_id; 2355 }; 2356 2357 struct wlc_swdiv_stats_v2 { 2358 uint16 version; /* version of the structure 2359 * as defined by SWDIV_STATS_CURRENT_VERSION 2360 */ 2361 uint16 length; /* length of the entire structure */ 2362 uint32 auto_en; 2363 uint32 active_ant; 2364 uint32 rxcount; 2365 int32 avg_snr_per_ant0; 2366 int32 avg_snr_per_ant1; 2367 int32 avg_snr_per_ant2; 2368 uint32 swap_ge_rxcount0; 2369 uint32 swap_ge_rxcount1; 2370 uint32 swap_ge_snrthresh0; 2371 uint32 swap_ge_snrthresh1; 2372 uint32 swap_txfail0; 2373 uint32 swap_txfail1; 2374 uint32 swap_timer0; 2375 uint32 swap_timer1; 2376 uint32 swap_alivecheck0; 2377 uint32 swap_alivecheck1; 2378 uint32 rxcount_per_ant0; 2379 uint32 rxcount_per_ant1; 2380 uint32 acc_rxcount; 2381 uint32 acc_rxcount_per_ant0; 2382 uint32 acc_rxcount_per_ant1; 2383 uint32 tx_auto_en; 2384 uint32 tx_active_ant; 2385 uint32 rx_policy; 2386 uint32 tx_policy; 2387 uint32 cell_policy; 2388 uint32 swap_snrdrop0; 2389 uint32 swap_snrdrop1; 2390 uint32 mws_antsel_ovr_tx; 2391 uint32 mws_antsel_ovr_rx; 2392 uint32 swap_trig_event_id; 2393 }; 2394 2395 #define WLC_NUMRATES 16 /**< max # of rates in a rateset */ 2396 2397 /**Used to get specific STA parameters */ 2398 typedef struct { 2399 uint32 val; 2400 struct ether_addr ea; 2401 uint16 PAD; 2402 } scb_val_t; 2403 2404 /**Used by iovar versions of some ioctls, i.e. WLC_SCB_AUTHORIZE et al */ 2405 typedef struct { 2406 uint32 code; 2407 scb_val_t ioctl_args; 2408 } authops_t; 2409 2410 /** channel encoding */ 2411 typedef struct channel_info { 2412 int32 hw_channel; 2413 int32 target_channel; 2414 int32 scan_channel; 2415 } channel_info_t; 2416 2417 /** For ioctls that take a list of MAC addresses */ 2418 typedef struct maclist { 2419 uint32 count; /**< number of MAC addresses */ 2420 struct ether_addr ea[1]; /**< variable length array of MAC addresses */ 2421 } maclist_t; 2422 2423 typedef struct wds_client_info { 2424 char ifname[INTF_NAME_SIZ]; /* WDS ifname */ 2425 struct ether_addr ea; /* WDS client MAC address */ 2426 } wds_client_info_t; 2427 2428 #define WDS_MACLIST_MAGIC 0xFFFFFFFF 2429 #define WDS_MACLIST_VERSION 1 2430 2431 /* For wds MAC list ioctls */ 2432 typedef struct wds_maclist { 2433 uint32 count; /* Number of WDS clients */ 2434 uint32 magic; /* Magic number */ 2435 uint32 version; /* Version number */ 2436 struct wds_client_info client_list[1]; /* Variable length array of WDS clients */ 2437 } wds_maclist_t; 2438 2439 /**get pkt count struct passed through ioctl */ 2440 typedef struct get_pktcnt { 2441 uint32 rx_good_pkt; 2442 uint32 rx_bad_pkt; 2443 uint32 tx_good_pkt; 2444 uint32 tx_bad_pkt; 2445 uint32 rx_ocast_good_pkt; /**< unicast packets destined for others */ 2446 } get_pktcnt_t; 2447 2448 /* NINTENDO2 */ 2449 #define LQ_IDX_MIN 0 2450 #define LQ_IDX_MAX 1 2451 #define LQ_IDX_AVG 2 2452 #define LQ_IDX_SUM 2 2453 #define LQ_IDX_LAST 3 2454 #define LQ_STOP_MONITOR 0 2455 #define LQ_START_MONITOR 1 2456 2457 /** Get averages RSSI, Rx PHY rate and SNR values */ 2458 /* Link Quality */ 2459 typedef struct { 2460 int32 rssi[LQ_IDX_LAST]; /**< Array to keep min, max, avg rssi */ 2461 int32 snr[LQ_IDX_LAST]; /**< Array to keep min, max, avg snr */ 2462 int32 isvalid; /**< Flag indicating whether above data is valid */ 2463 } wl_lq_t; 2464 2465 typedef enum wl_wakeup_reason_type { 2466 LCD_ON = 1, 2467 LCD_OFF, 2468 DRC1_WAKE, 2469 DRC2_WAKE, 2470 REASON_LAST 2471 } wl_wr_type_t; 2472 2473 typedef struct { 2474 /** Unique filter id */ 2475 uint32 id; 2476 /** stores the reason for the last wake up */ 2477 uint8 reason; 2478 uint8 PAD[3]; 2479 } wl_wr_t; 2480 2481 /** Get MAC specific rate histogram command */ 2482 typedef struct { 2483 struct ether_addr ea; /**< MAC Address */ 2484 uint8 ac_cat; /**< Access Category */ 2485 uint8 num_pkts; /**< Number of packet entries to be averaged */ 2486 } wl_mac_ratehisto_cmd_t; 2487 /** Get MAC rate histogram response */ 2488 /* deprecated after JAGUAR branch */ 2489 typedef struct { 2490 uint32 rate[DOT11_RATE_MAX + 1]; /**< Rates */ 2491 uint32 mcs[WL_RATESET_SZ_HT_IOCTL * WL_TX_CHAINS_MAX]; /**< MCS counts */ 2492 uint32 vht[WL_RATESET_SZ_VHT_MCS][WL_TX_CHAINS_MAX]; /**< VHT counts */ 2493 uint32 tsf_timer[2][2]; /**< Start and End time for 8bytes value */ 2494 uint32 prop11n_mcs[WLC_11N_LAST_PROP_MCS - WLC_11N_FIRST_PROP_MCS + 1]; /** MCS counts */ 2495 } wl_mac_ratehisto_res_t; 2496 2497 /* sta_info ecounters */ 2498 typedef struct { 2499 struct ether_addr ea; /* Station MAC addr */ 2500 struct ether_addr BSSID; /* BSSID of the BSS */ 2501 uint32 tx_pkts_fw_total; /* # FW generated sent successfully */ 2502 uint32 tx_pkts_fw_retries; /* # retries for FW generated frames */ 2503 uint32 tx_pkts_fw_retry_exhausted; /* # FW generated which 2504 * failed after retry 2505 */ 2506 } sta_info_ecounters_t; 2507 2508 #define STAMON_MODULE_VER 1 2509 2510 /**Linux network driver ioctl encoding */ 2511 typedef struct wl_ioctl { 2512 uint32 cmd; /**< common ioctl definition */ 2513 void *buf; /**< pointer to user buffer */ 2514 uint32 len; /**< length of user buffer */ 2515 uint8 set; /**< 1=set IOCTL; 0=query IOCTL */ 2516 uint32 used; /**< bytes read or written (optional) */ 2517 uint32 needed; /**< bytes needed (optional) */ 2518 } wl_ioctl_t; 2519 2520 #ifdef CONFIG_COMPAT 2521 typedef struct compat_wl_ioctl { 2522 uint32 cmd; /**< common ioctl definition */ 2523 uint32 buf; /**< pointer to user buffer */ 2524 uint32 len; /**< length of user buffer */ 2525 uint8 set; /**< 1=set IOCTL; 0=query IOCTL */ 2526 uint32 used; /**< bytes read or written (optional) */ 2527 uint32 needed; /**< bytes needed (optional) */ 2528 } compat_wl_ioctl_t; 2529 #endif /* CONFIG_COMPAT */ 2530 2531 #define WL_NUM_RATES_CCK 4 /**< 1, 2, 5.5, 11 Mbps */ 2532 #define WL_NUM_RATES_OFDM 8 /**< 6, 9, 12, 18, 24, 36, 48, 54 Mbps SISO/CDD */ 2533 #define WL_NUM_RATES_MCS_1STREAM 8 /**< MCS 0-7 1-stream rates - SISO/CDD/STBC/MCS */ 2534 #define WL_NUM_RATES_EXTRA_VHT 2 /**< Additional VHT 11AC rates */ 2535 #define WL_NUM_RATES_VHT 10 2536 #define WL_NUM_RATES_VHT_ALL (WL_NUM_RATES_VHT + WL_NUM_RATES_EXTRA_VHT) 2537 #define WL_NUM_RATES_HE 12 2538 #define WL_NUM_RATES_EHT 14 2539 #define WL_NUM_RATES_MCS32 1 2540 #define UC_PATH_LEN 128u /**< uCode path length */ 2541 2542 /* 2543 * Structure for passing hardware and software 2544 * revision info up from the driver. 2545 */ 2546 typedef struct wlc_rev_info { 2547 uint32 vendorid; /**< PCI vendor id */ 2548 uint32 deviceid; /**< device id of chip */ 2549 uint32 radiorev; /**< radio revision */ 2550 uint32 chiprev; /**< chip revision */ 2551 uint32 corerev; /**< core revision */ 2552 uint32 boardid; /**< board identifier (usu. PCI sub-device id) */ 2553 uint32 boardvendor; /**< board vendor (usu. PCI sub-vendor id) */ 2554 uint32 boardrev; /**< board revision */ 2555 uint32 driverrev; /**< driver version */ 2556 uint32 ucoderev; /**< uCode version */ 2557 uint32 bus; /**< bus type */ 2558 uint32 chipnum; /**< chip number */ 2559 uint32 phytype; /**< phy type */ 2560 uint32 phyrev; /**< phy revision */ 2561 uint32 anarev; /**< anacore rev */ 2562 uint32 chippkg; /**< chip package info */ 2563 uint32 nvramrev; /**< nvram revision number */ 2564 uint32 phyminorrev; /**< phy minor rev */ 2565 uint32 coreminorrev; /**< core minor rev */ 2566 uint32 drvrev_major; /**< driver version: major */ 2567 uint32 drvrev_minor; /**< driver version: minor */ 2568 uint32 drvrev_rc; /**< driver version: rc */ 2569 uint32 drvrev_rc_inc; /**< driver version: rc incremental */ 2570 uint16 ucodeprebuilt; /**< uCode prebuilt flag */ 2571 uint16 ucodediffct; /**< uCode diff count */ 2572 uchar ucodeurl[128u]; /* obsolete, kept for ROM compatiblity */ 2573 uchar ucodepath[UC_PATH_LEN]; /**< uCode URL or path */ 2574 } wlc_rev_info_t; 2575 2576 #define WL_REV_INFO_LEGACY_LENGTH 48 2577 2578 #define WL_BRAND_MAX 10 2579 typedef struct wl_instance_info { 2580 uint32 instance; 2581 int8 brand[WL_BRAND_MAX]; 2582 int8 PAD[4-(WL_BRAND_MAX%4)]; 2583 } wl_instance_info_t; 2584 2585 /** structure to change size of tx fifo */ 2586 typedef struct wl_txfifo_sz { 2587 uint16 magic; 2588 uint16 fifo; 2589 uint16 size; 2590 } wl_txfifo_sz_t; 2591 2592 /* Transfer info about an IOVar from the driver */ 2593 /**Max supported IOV name size in bytes, + 1 for nul termination */ 2594 #define WLC_IOV_NAME_LEN (32 + 1) 2595 2596 typedef struct wlc_iov_trx_s { 2597 uint8 module; 2598 uint8 type; 2599 char name[WLC_IOV_NAME_LEN]; 2600 } wlc_iov_trx_t; 2601 2602 /** bump this number if you change the ioctl interface */ 2603 #define WLC_IOCTL_VERSION 2 2604 #define WLC_IOCTL_VERSION_LEGACY_IOTYPES 1 2605 /* ifdef EXT_STA */ 2606 typedef struct _wl_assoc_result { 2607 ulong associated; 2608 ulong NDIS_auth; 2609 ulong NDIS_infra; 2610 } wl_assoc_result_t; 2611 /* EXT_STA */ 2612 2613 #define WL_PHY_PAVARS_LEN 64 /**< Phytype, Bandrange, chain, a[0], b[0], c[0], d[0] .. */ 2614 2615 #define WL_PHY_PAVAR_VER 1 /**< pavars version */ 2616 #define WL_PHY_PAVARS2_NUM 3 /**< a1, b0, b1 */ 2617 typedef struct wl_pavars2 { 2618 uint16 ver; /**< version of this struct */ 2619 uint16 len; /**< len of this structure */ 2620 uint16 inuse; /**< driver return 1 for a1,b0,b1 in current band range */ 2621 uint16 phy_type; /**< phy type */ 2622 uint16 bandrange; 2623 uint16 chain; 2624 uint16 inpa[WL_PHY_PAVARS2_NUM]; /**< phy pavars for one band range */ 2625 } wl_pavars2_t; 2626 2627 typedef struct wl_po { 2628 uint16 phy_type; /**< Phy type */ 2629 uint16 band; 2630 uint16 cckpo; 2631 uint16 PAD; 2632 uint32 ofdmpo; 2633 uint16 mcspo[8]; 2634 } wl_po_t; 2635 2636 #define WL_NUM_RPCALVARS 5 /**< number of rpcal vars */ 2637 2638 typedef struct wl_rpcal { 2639 uint16 value; 2640 uint16 update; 2641 } wl_rpcal_t; 2642 2643 #define WL_NUM_RPCALPHASEVARS 5 /* number of rpcal phase vars */ 2644 2645 typedef struct wl_rpcal_phase { 2646 uint16 value; 2647 uint16 update; 2648 } wl_rpcal_phase_t; 2649 2650 typedef struct wl_aci_args { 2651 int32 enter_aci_thresh; /* Trigger level to start detecting ACI */ 2652 int32 exit_aci_thresh; /* Trigger level to exit ACI mode */ 2653 int32 usec_spin; /* microsecs to delay between rssi samples */ 2654 int32 glitch_delay; /* interval between ACI scans when glitch count is consistently high */ 2655 uint16 nphy_adcpwr_enter_thresh; /**< ADC power to enter ACI mitigation mode */ 2656 uint16 nphy_adcpwr_exit_thresh; /**< ADC power to exit ACI mitigation mode */ 2657 uint16 nphy_repeat_ctr; /**< Number of tries per channel to compute power */ 2658 uint16 nphy_num_samples; /**< Number of samples to compute power on one channel */ 2659 uint16 nphy_undetect_window_sz; /**< num of undetects to exit ACI Mitigation mode */ 2660 uint16 nphy_b_energy_lo_aci; /**< low ACI power energy threshold for bphy */ 2661 uint16 nphy_b_energy_md_aci; /**< mid ACI power energy threshold for bphy */ 2662 uint16 nphy_b_energy_hi_aci; /**< high ACI power energy threshold for bphy */ 2663 uint16 nphy_noise_noassoc_glitch_th_up; /**< wl interference 4 */ 2664 uint16 nphy_noise_noassoc_glitch_th_dn; 2665 uint16 nphy_noise_assoc_glitch_th_up; 2666 uint16 nphy_noise_assoc_glitch_th_dn; 2667 uint16 nphy_noise_assoc_aci_glitch_th_up; 2668 uint16 nphy_noise_assoc_aci_glitch_th_dn; 2669 uint16 nphy_noise_assoc_enter_th; 2670 uint16 nphy_noise_noassoc_enter_th; 2671 uint16 nphy_noise_assoc_rx_glitch_badplcp_enter_th; 2672 uint16 nphy_noise_noassoc_crsidx_incr; 2673 uint16 nphy_noise_assoc_crsidx_incr; 2674 uint16 nphy_noise_crsidx_decr; 2675 } wl_aci_args_t; 2676 2677 #define WL_ACI_ARGS_LEGACY_LENGTH 16 /**< bytes of pre NPHY aci args */ 2678 2679 #define WL_MACFIFO_PLAY_ARGS_T_VERSION 1u /* version of wl_macfifo_play_args_t struct */ 2680 2681 enum wl_macfifo_play_flags { 2682 WL_MACFIFO_PLAY_STOP = 0x00u, /* stop playing samples */ 2683 WL_MACFIFO_PLAY_START = 0x01u, /* start playing samples */ 2684 WL_MACFIFO_PLAY_LOAD = 0x02u, /* for set: load samples 2685 for get: samples are loaded 2686 */ 2687 WL_MACFIFO_PLAY_GET_MAX_SIZE = 0x10u, /* get the macfifo buffer size */ 2688 WL_MACFIFO_PLAY_GET_STATUS = 0x20u, /* get macfifo play status */ 2689 }; 2690 2691 typedef struct wl_macfifo_play_args { 2692 uint16 version; /* structure version */ 2693 uint16 len; /* size of structure */ 2694 uint16 flags; 2695 uint8 PAD[2]; 2696 uint32 data_len; /* data length */ 2697 } wl_macfifo_play_args_t; 2698 2699 #define WL_MACFIFO_PLAY_DATA_T_VERSION 1u /* version of wl_macfifo_play_data_t struct */ 2700 2701 typedef struct wl_macfifo_play_data { 2702 uint16 version; /* structure version */ 2703 uint16 len; /* size of structure */ 2704 uint32 data_len; /* data length */ 2705 } wl_macfifo_play_data_t; 2706 2707 #define WL_SAMPLECOLLECT_T_VERSION 2 /**< version of wl_samplecollect_args_t struct */ 2708 typedef struct wl_samplecollect_args { 2709 /* version 0 fields */ 2710 uint8 coll_us; 2711 uint8 PAD[3]; 2712 int32 cores; 2713 /* add'l version 1 fields */ 2714 uint16 version; /**< see definition of WL_SAMPLECOLLECT_T_VERSION */ 2715 uint16 length; /**< length of entire structure */ 2716 int8 trigger; 2717 uint8 PAD; 2718 uint16 timeout; 2719 uint16 mode; 2720 uint16 PAD; 2721 uint32 pre_dur; 2722 uint32 post_dur; 2723 uint8 gpio_sel; 2724 uint8 downsamp; 2725 uint8 be_deaf; 2726 uint8 agc; /**< loop from init gain and going down */ 2727 uint8 filter; /**< override high pass corners to lowest */ 2728 /* add'l version 2 fields */ 2729 uint8 trigger_state; 2730 uint8 module_sel1; 2731 uint8 module_sel2; 2732 uint16 nsamps; 2733 uint16 PAD; 2734 int32 bitStart; 2735 uint32 gpioCapMask; 2736 uint8 gpio_collection; 2737 uint8 PAD[3]; 2738 } wl_samplecollect_args_t; 2739 2740 #define WL_SAMPLEDATA_T_VERSION 1 /**< version of wl_samplecollect_args_t struct */ 2741 /* version for unpacked sample data, int16 {(I,Q),Core(0..N)} */ 2742 #define WL_SAMPLEDATA_T_VERSION_SPEC_AN 2 2743 2744 typedef struct wl_sampledata { 2745 uint16 version; /**< structure version */ 2746 uint16 size; /**< size of structure */ 2747 uint16 tag; /**< Header/Data */ 2748 uint16 length; /**< data length */ 2749 uint32 flag; /**< bit def */ 2750 } wl_sampledata_t; 2751 2752 /* WL_OTA START */ 2753 /* OTA Test Status */ 2754 enum { 2755 WL_OTA_TEST_IDLE = 0, /**< Default Idle state */ 2756 WL_OTA_TEST_ACTIVE = 1, /**< Test Running */ 2757 WL_OTA_TEST_SUCCESS = 2, /**< Successfully Finished Test */ 2758 WL_OTA_TEST_FAIL = 3 /**< Test Failed in the Middle */ 2759 }; 2760 2761 /* OTA SYNC Status */ 2762 enum { 2763 WL_OTA_SYNC_IDLE = 0, /**< Idle state */ 2764 WL_OTA_SYNC_ACTIVE = 1, /**< Waiting for Sync */ 2765 WL_OTA_SYNC_FAIL = 2 /**< Sync pkt not recieved */ 2766 }; 2767 2768 /* Various error states dut can get stuck during test */ 2769 enum { 2770 WL_OTA_SKIP_TEST_CAL_FAIL = 1, /**< Phy calibration failed */ 2771 WL_OTA_SKIP_TEST_SYNCH_FAIL = 2, /**< Sync Packet not recieved */ 2772 WL_OTA_SKIP_TEST_FILE_DWNLD_FAIL = 3, /**< Cmd flow file download failed */ 2773 WL_OTA_SKIP_TEST_NO_TEST_FOUND = 4, /**< No test found in Flow file */ 2774 WL_OTA_SKIP_TEST_WL_NOT_UP = 5, /**< WL UP failed */ 2775 WL_OTA_SKIP_TEST_UNKNOWN_CALL /**< Unintentional scheduling on ota test */ 2776 }; 2777 2778 /* Differentiator for ota_tx and ota_rx */ 2779 enum { 2780 WL_OTA_TEST_TX = 0, /**< ota_tx */ 2781 WL_OTA_TEST_RX = 1, /**< ota_rx */ 2782 }; 2783 2784 /* Catch 3 modes of operation: 20Mhz, 40Mhz, 20 in 40 Mhz */ 2785 enum { 2786 WL_OTA_TEST_BW_20_IN_40MHZ = 0, /**< 20 in 40 operation */ 2787 WL_OTA_TEST_BW_20MHZ = 1, /**< 20 Mhz operation */ 2788 WL_OTA_TEST_BW_40MHZ = 2, /**< full 40Mhz operation */ 2789 WL_OTA_TEST_BW_80MHZ = 3 /* full 80Mhz operation */ 2790 }; 2791 #define HT_MCS_INUSE 0x00000080 /* HT MCS in use,indicates b0-6 holds an mcs */ 2792 #define VHT_MCS_INUSE 0x00000100 /* VHT MCS in use,indicates b0-6 holds an mcs */ 2793 #define OTA_RATE_MASK 0x0000007f /* rate/mcs value */ 2794 #define OTA_STF_SISO 0 2795 #define OTA_STF_CDD 1 2796 #define OTA_STF_STBC 2 2797 #define OTA_STF_SDM 3 2798 2799 typedef struct ota_rate_info { 2800 uint8 rate_cnt; /**< Total number of rates */ 2801 uint8 PAD; 2802 uint16 rate_val_mbps[WL_OTA_TEST_MAX_NUM_RATE]; /**< array of rates from 1mbps to 130mbps */ 2803 /**< for legacy rates : ratein mbps * 2 */ 2804 /**< for HT rates : mcs index */ 2805 } ota_rate_info_t; 2806 2807 typedef struct ota_power_info { 2808 int8 pwr_ctrl_on; /**< power control on/off */ 2809 int8 start_pwr; /**< starting power/index */ 2810 int8 delta_pwr; /**< delta power/index */ 2811 int8 end_pwr; /**< end power/index */ 2812 } ota_power_info_t; 2813 2814 typedef struct ota_packetengine { 2815 uint16 delay; /**< Inter-packet delay */ 2816 /**< for ota_tx, delay is tx ifs in micro seconds */ 2817 /* for ota_rx, delay is wait time in milliseconds */ 2818 uint16 nframes; /**< Number of frames */ 2819 uint16 length; /**< Packet length */ 2820 } ota_packetengine_t; 2821 2822 /* 2823 * OTA txant/rxant parameter 2824 * bit7-4: 4 bits swdiv_tx/rx_policy bitmask, specify antenna-policy for SW diversity 2825 * bit3-0: 4 bits TxCore bitmask, specify cores used for transmit frames 2826 * (maximum spatial expansion) 2827 */ 2828 #define WL_OTA_TEST_ANT_MASK 0xF0 2829 #define WL_OTA_TEST_CORE_MASK 0x0F 2830 2831 /* OTA txant/rxant 'ant_mask' field; map to Tx/Rx antenna policy for SW diversity */ 2832 enum { 2833 WL_OTA_TEST_FORCE_ANT0 = 0x10, /* force antenna to Ant 0 */ 2834 WL_OTA_TEST_FORCE_ANT1 = 0x20, /* force antenna to Ant 1 */ 2835 }; 2836 2837 /* antenna/core fields access */ 2838 #define WL_OTA_TEST_GET_ANT(_txant) ((_txant) & WL_OTA_TEST_ANT_MASK) 2839 #define WL_OTA_TEST_GET_CORE(_txant) ((_txant) & WL_OTA_TEST_CORE_MASK) 2840 2841 /** Test info vector */ 2842 typedef struct wl_ota_test_args { 2843 uint8 cur_test; /**< test phase */ 2844 uint8 chan; /**< channel */ 2845 uint8 bw; /**< bandwidth */ 2846 uint8 control_band; /**< control band */ 2847 uint8 stf_mode; /**< stf mode */ 2848 uint8 PAD; 2849 ota_rate_info_t rt_info; /**< Rate info */ 2850 ota_packetengine_t pkteng; /**< packeteng info */ 2851 uint8 txant; /**< tx antenna */ 2852 uint8 rxant; /**< rx antenna */ 2853 ota_power_info_t pwr_info; /**< power sweep info */ 2854 uint8 wait_for_sync; /**< wait for sync or not */ 2855 uint8 ldpc; 2856 uint8 sgi; 2857 uint8 PAD; 2858 /* Update WL_OTA_TESTVEC_T_VERSION for adding new members to this structure */ 2859 } wl_ota_test_args_t; 2860 2861 #define WL_OTA_TESTVEC_T_VERSION 1 /* version of wl_ota_test_vector_t struct */ 2862 typedef struct wl_ota_test_vector { 2863 uint16 version; 2864 wl_ota_test_args_t test_arg[WL_OTA_TEST_MAX_NUM_SEQ]; /**< Test argument struct */ 2865 uint16 test_cnt; /**< Total no of test */ 2866 uint8 file_dwnld_valid; /**< File successfully downloaded */ 2867 uint8 sync_timeout; /**< sync packet timeout */ 2868 int8 sync_fail_action; /**< sync fail action */ 2869 struct ether_addr sync_mac; /**< macaddress for sync pkt */ 2870 struct ether_addr tx_mac; /**< macaddress for tx */ 2871 struct ether_addr rx_mac; /**< macaddress for rx */ 2872 int8 loop_test; /**< dbg feature to loop the test */ 2873 uint16 test_rxcnt; 2874 /* Update WL_OTA_TESTVEC_T_VERSION for adding new members to this structure */ 2875 } wl_ota_test_vector_t; 2876 2877 /** struct copied back form dongle to host to query the status */ 2878 typedef struct wl_ota_test_status { 2879 int16 cur_test_cnt; /**< test phase */ 2880 int8 skip_test_reason; /**< skip test reasoin */ 2881 uint8 PAD; 2882 wl_ota_test_args_t test_arg; /**< cur test arg details */ 2883 uint16 test_cnt; /**< total no of test downloaded */ 2884 uint8 file_dwnld_valid; /**< file successfully downloaded ? */ 2885 uint8 sync_timeout; /**< sync timeout */ 2886 int8 sync_fail_action; /**< sync fail action */ 2887 struct ether_addr sync_mac; /**< macaddress for sync pkt */ 2888 struct ether_addr tx_mac; /**< tx mac address */ 2889 struct ether_addr rx_mac; /**< rx mac address */ 2890 uint8 test_stage; /**< check the test status */ 2891 int8 loop_test; /**< Debug feature to puts test enfine in a loop */ 2892 uint8 sync_status; /**< sync status */ 2893 } wl_ota_test_status_t; 2894 2895 /* FOR ioctl that take the sta monitor information */ 2896 typedef struct stamon_data { 2897 struct ether_addr ea; 2898 uint8 PAD[2]; 2899 int32 rssi; 2900 } stamon_data_t; 2901 2902 typedef struct stamon_info { 2903 int32 version; 2904 uint32 count; 2905 stamon_data_t sta_data[1]; 2906 } stamon_info_t; 2907 2908 typedef struct wl_ota_rx_rssi { 2909 uint16 pktcnt; /* Pkt count used for this rx test */ 2910 chanspec_t chanspec; /* Channel info on which the packets are received */ 2911 int16 rssi; /* Average RSSI of the first 50% packets received */ 2912 } wl_ota_rx_rssi_t; 2913 2914 #define WL_OTARSSI_T_VERSION 1 /* version of wl_ota_test_rssi_t struct */ 2915 #define WL_OTA_TEST_RSSI_FIXED_SIZE OFFSETOF(wl_ota_test_rssi_t, rx_rssi) 2916 2917 typedef struct wl_ota_test_rssi { 2918 uint8 version; 2919 uint8 testcnt; /* total measured RSSI values, valid on output only */ 2920 wl_ota_rx_rssi_t rx_rssi[1]; /* Variable length array of wl_ota_rx_rssi_t */ 2921 } wl_ota_test_rssi_t; 2922 2923 /* WL_OTA END */ 2924 2925 /**wl_radar_args_t */ 2926 typedef struct { 2927 int32 npulses; /**< required number of pulses at n * t_int */ 2928 int32 ncontig; /**< required number of pulses at t_int */ 2929 int32 min_pw; /**< minimum pulse width (20 MHz clocks) */ 2930 int32 max_pw; /**< maximum pulse width (20 MHz clocks) */ 2931 uint16 thresh0; /**< Radar detection, thresh 0 */ 2932 uint16 thresh1; /**< Radar detection, thresh 1 */ 2933 uint16 blank; /**< Radar detection, blank control */ 2934 uint16 fmdemodcfg; /**< Radar detection, fmdemod config */ 2935 int32 npulses_lp; /**< Radar detection, minimum long pulses */ 2936 int32 min_pw_lp; /**< Minimum pulsewidth for long pulses */ 2937 int32 max_pw_lp; /**< Maximum pulsewidth for long pulses */ 2938 int32 min_fm_lp; /**< Minimum fm for long pulses */ 2939 int32 max_span_lp; /**< Maximum deltat for long pulses */ 2940 int32 min_deltat; /**< Minimum spacing between pulses */ 2941 int32 max_deltat; /**< Maximum spacing between pulses */ 2942 uint16 autocorr; /**< Radar detection, autocorr on or off */ 2943 uint16 st_level_time; /**< Radar detection, start_timing level */ 2944 uint16 t2_min; /**< minimum clocks needed to remain in state 2 */ 2945 uint8 PAD[2]; 2946 uint32 version; /**< version */ 2947 uint32 fra_pulse_err; /**< sample error margin for detecting French radar pulsed */ 2948 int32 npulses_fra; /**< Radar detection, minimum French pulses set */ 2949 int32 npulses_stg2; /**< Radar detection, minimum staggered-2 pulses set */ 2950 int32 npulses_stg3; /**< Radar detection, minimum staggered-3 pulses set */ 2951 uint16 percal_mask; /**< defines which period cal is masked from radar detection */ 2952 uint8 PAD[2]; 2953 int32 quant; /**< quantization resolution to pulse positions */ 2954 uint32 min_burst_intv_lp; /**< minimum burst to burst interval for bin3 radar */ 2955 uint32 max_burst_intv_lp; /**< maximum burst to burst interval for bin3 radar */ 2956 int32 nskip_rst_lp; /**< number of skipped pulses before resetting lp buffer */ 2957 int32 max_pw_tol; /* maximum tolerance allowd in detected pulse width for radar detection */ 2958 uint16 feature_mask; /**< 16-bit mask to specify enabled features */ 2959 uint16 thresh0_sc; /**< Radar detection, thresh 0 */ 2960 uint16 thresh1_sc; /**< Radar detection, thresh 1 */ 2961 uint8 PAD[2]; 2962 } wl_radar_args_t; 2963 2964 #define WL_RADAR_ARGS_VERSION 2 2965 2966 typedef struct { 2967 uint32 version; /**< version */ 2968 uint16 thresh0_20_lo; /**< Radar detection, thresh 0 (range 5250-5350MHz) for BW 20MHz */ 2969 uint16 thresh1_20_lo; /**< Radar detection, thresh 1 (range 5250-5350MHz) for BW 20MHz */ 2970 uint16 thresh0_40_lo; /**< Radar detection, thresh 0 (range 5250-5350MHz) for BW 40MHz */ 2971 uint16 thresh1_40_lo; /**< Radar detection, thresh 1 (range 5250-5350MHz) for BW 40MHz */ 2972 uint16 thresh0_80_lo; /**< Radar detection, thresh 0 (range 5250-5350MHz) for BW 80MHz */ 2973 uint16 thresh1_80_lo; /**< Radar detection, thresh 1 (range 5250-5350MHz) for BW 80MHz */ 2974 uint16 thresh0_20_hi; /**< Radar detection, thresh 0 (range 5470-5725MHz) for BW 20MHz */ 2975 uint16 thresh1_20_hi; /**< Radar detection, thresh 1 (range 5470-5725MHz) for BW 20MHz */ 2976 uint16 thresh0_40_hi; /**< Radar detection, thresh 0 (range 5470-5725MHz) for BW 40MHz */ 2977 uint16 thresh1_40_hi; /**< Radar detection, thresh 1 (range 5470-5725MHz) for BW 40MHz */ 2978 uint16 thresh0_80_hi; /**< Radar detection, thresh 0 (range 5470-5725MHz) for BW 80MHz */ 2979 uint16 thresh1_80_hi; /**< Radar detection, thresh 1 (range 5470-5725MHz) for BW 80MHz */ 2980 uint16 thresh0_160_lo; /**< Radar detection, thresh 0 (range 5250-5350MHz) for BW 160MHz */ 2981 uint16 thresh1_160_lo; /**< Radar detection, thresh 1 (range 5250-5350MHz) for BW 160MHz */ 2982 uint16 thresh0_160_hi; /**< Radar detection, thresh 0 (range 5470-5725MHz) for BW 160MHz */ 2983 uint16 thresh1_160_hi; /**< Radar detection, thresh 1 (range 5470-5725MHz) for BW 160MHz */ 2984 } wl_radar_thr_t; 2985 2986 typedef struct { 2987 uint32 version; /* version */ 2988 uint16 thresh0_sc_20_lo; 2989 uint16 thresh1_sc_20_lo; 2990 uint16 thresh0_sc_40_lo; 2991 uint16 thresh1_sc_40_lo; 2992 uint16 thresh0_sc_80_lo; 2993 uint16 thresh1_sc_80_lo; 2994 uint16 thresh0_sc_20_hi; 2995 uint16 thresh1_sc_20_hi; 2996 uint16 thresh0_sc_40_hi; 2997 uint16 thresh1_sc_40_hi; 2998 uint16 thresh0_sc_80_hi; 2999 uint16 thresh1_sc_80_hi; 3000 uint16 fc_varth_sb; 3001 uint16 fc_varth_bin5_sb; 3002 uint16 notradar_enb; 3003 uint16 max_notradar_lp; 3004 uint16 max_notradar; 3005 uint16 max_notradar_lp_sc; 3006 uint16 max_notradar_sc; 3007 uint16 highpow_war_enb; 3008 uint16 highpow_sp_ratio; //unit is 0.5 3009 } wl_radar_thr2_t; 3010 3011 #define WL_RADAR_THR_VERSION 2 3012 3013 typedef struct { 3014 uint32 ver; 3015 uint32 len; 3016 int32 rssi_th[3]; 3017 uint8 rssi_gain_80[4]; 3018 uint8 rssi_gain_160[4]; 3019 } wl_dyn_switch_th_t; 3020 3021 #define WL_PHY_DYN_SWITCH_TH_VERSION 1 3022 3023 /** RSSI per antenna */ 3024 typedef struct { 3025 uint32 version; /**< version field */ 3026 uint32 count; /**< number of valid antenna rssi */ 3027 int8 rssi_ant[WL_RSSI_ANT_MAX]; /**< rssi per antenna */ 3028 int8 rssi_sum; /**< summed rssi across all antennas */ 3029 int8 PAD[3]; 3030 } wl_rssi_ant_t; 3031 3032 /* SNR per antenna */ 3033 typedef struct { 3034 uint32 version; /* version field */ 3035 uint32 count; /* number of valid antenna snr */ 3036 int8 snr_ant[WL_RSSI_ANT_MAX]; /* snr per antenna */ 3037 } wl_snr_ant_t; 3038 3039 /* Weighted average support */ 3040 #define WL_WA_VER 0 /* Initial version - Basic WA algorithm only */ 3041 3042 #define WL_WA_ALGO_BASIC 0 /* Basic weighted average algorithm (all 4 metrics) */ 3043 #define WL_WA_TYPE_RSSI 0 3044 #define WL_WA_TYPE_SNR 1 3045 #define WL_WA_TYPE_TXRATE 2 3046 #define WL_WA_TYPE_RXRATE 3 3047 #define WL_WA_TYPE_MAX 4 3048 3049 typedef struct { /* payload of subcmd in xtlv */ 3050 uint8 id; 3051 uint8 n_total; /* Total number of samples (n_total >= n_recent) */ 3052 uint8 n_recent; /* Number of samples denoted as recent */ 3053 uint8 w_recent; /* Total weight for the recent samples (as percentage) */ 3054 } wl_wa_basic_params_t; 3055 3056 typedef struct { 3057 uint16 ver; 3058 uint16 len; 3059 uint8 subcmd[]; /* sub-cmd in bcm_xtlv_t */ 3060 } wl_wa_cmd_t; 3061 3062 /** data structure used in 'dfs_status' wl interface, which is used to query dfs status */ 3063 typedef struct { 3064 uint32 state; /**< noted by WL_DFS_CACSTATE_XX. */ 3065 uint32 duration; /**< time spent in ms in state. */ 3066 /** 3067 * as dfs enters ISM state, it removes the operational channel from quiet channel 3068 * list and notes the channel in channel_cleared. set to 0 if no channel is cleared 3069 */ 3070 chanspec_t chanspec_cleared; 3071 /** chanspec cleared used to be a uint32, add another to uint16 to maintain size */ 3072 uint16 pad; 3073 } wl_dfs_status_t; 3074 3075 typedef struct { 3076 uint32 state; /* noted by WL_DFS_CACSTATE_XX */ 3077 uint32 duration; /* time spent in ms in state */ 3078 chanspec_t chanspec; /* chanspec of this core */ 3079 chanspec_t chanspec_last_cleared; /* chanspec last cleared for operation by scanning */ 3080 uint16 sub_type; /* currently just the index of the core or the respective PLL */ 3081 uint16 pad; 3082 } wl_dfs_sub_status_t; 3083 3084 #define WL_DFS_STATUS_ALL_VERSION (1) 3085 typedef struct { 3086 uint16 version; /* version field; current max version 1 */ 3087 uint16 num_sub_status; 3088 wl_dfs_sub_status_t dfs_sub_status[1]; /* struct array of length num_sub_status */ 3089 } wl_dfs_status_all_t; 3090 3091 #define WL_DFS_AP_MOVE_VERSION (1) 3092 3093 struct wl_dfs_ap_move_status_v1 { 3094 int16 dfs_status; /* DFS scan status */ 3095 chanspec_t chanspec; /* New AP Chanspec */ 3096 wl_dfs_status_t cac_status; /* CAC status */ 3097 }; 3098 3099 typedef struct wl_dfs_ap_move_status_v2 { 3100 int8 version; /* version field; current max version 1 */ 3101 int8 move_status; /* DFS move status */ 3102 chanspec_t chanspec; /* New AP Chanspec */ 3103 wl_dfs_status_all_t scan_status; /* status; see dfs_status_all for wl_dfs_status_all_t */ 3104 } wl_dfs_ap_move_status_v2_t; 3105 3106 #define WL_DFS_AP_MOVE_ABORT -1 /* Abort any dfs_ap_move in progress immediately */ 3107 #define WL_DFS_AP_MOVE_STUNT -2 /* Stunt move but continue background CSA if in progress */ 3108 3109 /** data structure used in 'radar_status' wl interface, which is use to query radar det status */ 3110 typedef struct { 3111 uint8 detected; 3112 uint8 PAD[3]; 3113 int32 count; 3114 uint8 pretended; 3115 uint8 PAD[3]; 3116 uint32 radartype; 3117 uint32 timenow; 3118 uint32 timefromL; 3119 int32 lp_csect_single; 3120 int32 detected_pulse_index; 3121 int32 nconsecq_pulses; 3122 chanspec_t ch; 3123 uint8 PAD[2]; 3124 int32 pw[10]; 3125 int32 intv[10]; 3126 int32 fm[10]; 3127 } wl_radar_status_t; 3128 3129 #define NUM_PWRCTRL_RATES 12 3130 3131 typedef struct { 3132 uint8 txpwr_band_max[NUM_PWRCTRL_RATES]; /**< User set target */ 3133 uint8 txpwr_limit[NUM_PWRCTRL_RATES]; /**< reg and local power limit */ 3134 uint8 txpwr_local_max; /**< local max according to the AP */ 3135 uint8 txpwr_local_constraint; /**< local constraint according to the AP */ 3136 uint8 txpwr_chan_reg_max; /**< Regulatory max for this channel */ 3137 uint8 txpwr_target[2][NUM_PWRCTRL_RATES]; /**< Latest target for 2.4 and 5 Ghz */ 3138 uint8 txpwr_est_Pout[2]; /**< Latest estimate for 2.4 and 5 Ghz */ 3139 uint8 txpwr_opo[NUM_PWRCTRL_RATES]; /**< On G phy, OFDM power offset */ 3140 uint8 txpwr_bphy_cck_max[NUM_PWRCTRL_RATES]; /**< Max CCK power for this band (SROM) */ 3141 uint8 txpwr_bphy_ofdm_max; /**< Max OFDM power for this band (SROM) */ 3142 uint8 txpwr_aphy_max[NUM_PWRCTRL_RATES]; /**< Max power for A band (SROM) */ 3143 int8 txpwr_antgain[2]; /**< Ant gain for each band - from SROM */ 3144 uint8 txpwr_est_Pout_gofdm; /**< Pwr estimate for 2.4 OFDM */ 3145 } tx_power_legacy_t; 3146 3147 #define WL_TX_POWER_RATES_LEGACY 45 3148 #define WL_TX_POWER_MCS20_FIRST 12 3149 #define WL_TX_POWER_MCS20_NUM 16 3150 #define WL_TX_POWER_MCS40_FIRST 28 3151 #define WL_TX_POWER_MCS40_NUM 17 3152 3153 typedef struct { 3154 uint32 flags; 3155 chanspec_t chanspec; /**< txpwr report for this channel */ 3156 chanspec_t local_chanspec; /**< channel on which we are associated */ 3157 uint8 local_max; /**< local max according to the AP */ 3158 uint8 local_constraint; /**< local constraint according to the AP */ 3159 int8 antgain[2]; /**< Ant gain for each band - from SROM */ 3160 uint8 rf_cores; /**< count of RF Cores being reported */ 3161 uint8 est_Pout[4]; /**< Latest tx power out estimate per RF 3162 * chain without adjustment 3163 */ 3164 uint8 est_Pout_cck; /**< Latest CCK tx power out estimate */ 3165 uint8 user_limit[WL_TX_POWER_RATES_LEGACY]; /**< User limit */ 3166 uint8 reg_limit[WL_TX_POWER_RATES_LEGACY]; /**< Regulatory power limit */ 3167 uint8 board_limit[WL_TX_POWER_RATES_LEGACY]; /**< Max power board can support (SROM) */ 3168 uint8 target[WL_TX_POWER_RATES_LEGACY]; /**< Latest target power */ 3169 uint8 PAD[2]; 3170 } tx_power_legacy2_t; 3171 3172 #define WL_NUM_2x2_ELEMENTS 4 3173 #define WL_NUM_3x3_ELEMENTS 6 3174 #define WL_NUM_4x4_ELEMENTS 10 3175 3176 typedef struct { 3177 uint16 ver; /**< version of this struct */ 3178 uint16 len; /**< length in bytes of this structure */ 3179 uint32 flags; 3180 chanspec_t chanspec; /**< txpwr report for this channel */ 3181 chanspec_t local_chanspec; /**< channel on which we are associated */ 3182 uint32 buflen; /**< ppr buffer length */ 3183 uint8 pprbuf[1]; /**< Latest target power buffer */ 3184 } wl_txppr_t; 3185 3186 #define WL_TXPPR_VERSION 1 3187 #define WL_TXPPR_LENGTH (sizeof(wl_txppr_t)) 3188 #define TX_POWER_T_VERSION 45 3189 #define TX_POWER_T_VERSION_V2 46 3190 3191 /* curpower ppr types */ 3192 enum { 3193 PPRTYPE_TARGETPOWER = 1, 3194 PPRTYPE_BOARDLIMITS = 2, 3195 PPRTYPE_REGLIMITS = 3, 3196 PPRTYPE_RU_REGLIMITS = 4, 3197 PPRTYPE_RU_BOARDLIMITS = 5, 3198 PPRTYPE_RU_TARGETPOWER = 6, 3199 PPRTYPE_DYNAMIC_INFO = 7, 3200 PPRTYPE_LAST 3201 }; 3202 3203 /** number of ppr serialization buffers, it should be reg, board and target */ 3204 #define WL_TXPPR_SER_BUF_NUM (PPRTYPE_LAST - 1) 3205 3206 typedef struct chanspec_txpwr_max { 3207 chanspec_t chanspec; /**< chanspec */ 3208 uint8 txpwr_max; /**< max txpwr in all the rates */ 3209 uint8 padding; 3210 } chanspec_txpwr_max_t; 3211 3212 typedef struct wl_chanspec_txpwr_max { 3213 uint16 ver; /**< version of this struct */ 3214 uint16 len; /**< length in bytes of this structure */ 3215 uint32 count; /**< number of elements of (chanspec, txpwr_max) pair */ 3216 chanspec_txpwr_max_t txpwr[1]; /**< array of (chanspec, max_txpwr) pair */ 3217 } wl_chanspec_txpwr_max_t; 3218 3219 #define WL_CHANSPEC_TXPWR_MAX_VER 1 3220 #define WL_CHANSPEC_TXPWR_MAX_LEN (sizeof(wl_chanspec_txpwr_max_t)) 3221 3222 typedef struct tx_inst_power { 3223 uint8 txpwr_est_Pout[2]; /**< Latest estimate for 2.4 and 5 Ghz */ 3224 uint8 txpwr_est_Pout_gofdm; /**< Pwr estimate for 2.4 OFDM */ 3225 } tx_inst_power_t; 3226 3227 #define WL_NUM_TXCHAIN_MAX 4 3228 typedef struct wl_txchain_pwr_offsets { 3229 int8 offset[WL_NUM_TXCHAIN_MAX]; /**< quarter dBm signed offset for each chain */ 3230 } wl_txchain_pwr_offsets_t; 3231 3232 /** maximum channels returned by the get valid channels iovar */ 3233 #define WL_NUMCHANNELS 64 3234 #define WL_NUMCHANNELS_MANY_CHAN 10 3235 #define WL_ITER_LIMIT_MANY_CHAN 5 3236 3237 #define WL_MIMO_PS_CFG_VERSION_1 1 3238 3239 typedef struct wl_mimops_cfg { 3240 uint8 version; 3241 /* active_chains: 0 for all, 1 for 1 chain. */ 3242 uint8 active_chains; 3243 /* static (0) or dynamic (1).or disabled (3) Mode applies only when active_chains = 0. */ 3244 uint8 mode; 3245 /* bandwidth = Full (0), 20M (1), 40M (2), 80M (3). */ 3246 uint8 bandwidth; 3247 uint8 applychangesafterlearning; 3248 uint8 pad[3]; 3249 } wl_mimops_cfg_t; 3250 3251 /* This event is for tracing MIMO PS metrics snapshot calls. 3252 * It is helpful to debug out-of-sync issue between 3253 * ucode SHM values and FW snapshot calculation. 3254 * It is part of the EVENT_LOG_TAG_MIMO_PS_TRACE. 3255 */ 3256 #define WL_MIMO_PS_METRICS_SNAPSHOT_TRACE_TYPE 0 3257 typedef struct wl_mimo_ps_metrics_snapshot_trace { 3258 /* type field for this TLV: */ 3259 uint16 type; 3260 /* length field for this TLV */ 3261 uint16 len; 3262 uint32 idle_slotcnt_mimo; /* MIMO idle slotcnt raw SHM value */ 3263 uint32 last_idle_slotcnt_mimo; /* stored value snapshot */ 3264 uint32 idle_slotcnt_siso; /* SISO idle slotcnt raw SHM value */ 3265 uint32 last_idle_slotcnt_siso; /* stored value snapshot */ 3266 uint32 rx_time_mimo; /* Rx MIMO raw SHM value */ 3267 uint32 last_rx_time_mimo; /* stored value snapshot */ 3268 uint32 rx_time_siso; /* RX SISO raw SHM value */ 3269 uint32 last_rx_time_siso; /* stored value snapshot */ 3270 uint32 tx_time_1chain; /* Tx 1-chain raw SHM value */ 3271 uint32 last_tx_time_1chain; /* stored value snapshot */ 3272 uint32 tx_time_2chain; /* Tx 2-chain raw SHM value */ 3273 uint32 last_tx_time_2chain; /* stored value snapshot */ 3274 uint32 tx_time_3chain; /* Tx 3-chain raw SHM value */ 3275 uint32 last_tx_time_3chain; /* stored value snapshot */ 3276 uint16 reason; /* reason for snapshot call, see below */ 3277 /* Does the call reset last values after delta calculation */ 3278 uint16 reset_last; 3279 } wl_mimo_ps_metrics_snapshot_trace_t; 3280 /* reason codes for mimo ps metrics snapshot function calls */ 3281 #define WL_MIMOPS_METRICS_SNAPSHOT_REPORT 1 3282 #define WL_MIMOPS_METRICS_SNAPSHOT_RXCHAIN_SET 2 3283 #define WL_MIMOPS_METRICS_SNAPSHOT_ARBI 3 3284 #define WL_MIMOPS_METRICS_SNAPSHOT_SLOTUPD 4 3285 #define WL_MIMOPS_METRICS_SNAPSHOT_PMBCNRX 5 3286 #define WL_MIMOPS_METRICS_SNAPSHOT_BMACINIT 6 3287 #define WL_MIMOPS_METRICS_SNAPSHOT_HT_COMPLETE 7 3288 #define WL_MIMOPS_METRICS_SNAPSHOT_OCL 8 3289 3290 #define WL_MIMO_PS_STATUS_VERSION_2 2 3291 typedef struct wl_mimo_ps_status { 3292 uint8 version; 3293 uint8 ap_cap; /* The associated AP's capability (BW, MIMO/SISO). */ 3294 uint8 association_status; /* How we are associated to the AP (MIMO/SISO). */ 3295 uint8 mimo_ps_state; /* mimo_ps_cfg states: [0-5]. See below for values */ 3296 uint8 mrc_state; /* MRC state: NONE (0), ACTIVE(1) */ 3297 uint8 bss_rxchain; /* bss rxchain bitmask */ 3298 uint8 bss_txchain; /* bss txchain bitmask */ 3299 uint8 bss_bw; /* bandwidth: Full (0), 20M (1), 40M (2), 80M (3), etc */ 3300 uint16 hw_state; /* bitmask of hw state. See below for values */ 3301 uint8 hw_rxchain; /* actual HW rxchain bitmask */ 3302 uint8 hw_txchain; /* actual HW txchain bitmask */ 3303 uint8 hw_bw; /* bandwidth: Full (0), 20M (1), 40M (2), 80M (3), etc */ 3304 uint8 pm_bcnrx_state; /* actual state of ucode flag */ 3305 uint8 basic_rates_present; /* internal flag to trigger siso bcmc rx */ 3306 uint8 siso_bcmc_rx_state; /* actual state of ucode flag */ 3307 } wl_mimo_ps_status_t; 3308 3309 #define WL_MIMO_PS_STATUS_VERSION_1 1 3310 typedef struct wl_mimo_ps_status_v1 { 3311 uint8 version; 3312 uint8 ap_cap; /* The associated AP's capability (BW, MIMO/SISO). */ 3313 uint8 association_status; /* How we are associated to the AP (MIMO/SISO). */ 3314 uint8 mimo_ps_state; /* mimo_ps_cfg states: [0-5]. See below for values */ 3315 uint8 mrc_state; /* MRC state: NONE (0), ACTIVE(1) */ 3316 uint8 bss_rxchain; /* bss rxchain bitmask */ 3317 uint8 bss_txchain; /* bss txchain bitmask */ 3318 uint8 bss_bw; /* bandwidth: Full (0), 20M (1), 40M (2), 80M (3), etc */ 3319 uint16 hw_state; /* bitmask of hw state. See below for values */ 3320 uint8 hw_rxchain; /* actual HW rxchain bitmask */ 3321 uint8 hw_txchain; /* actual HW txchain bitmask */ 3322 uint8 hw_bw; /* bandwidth: Full (0), 20M (1), 40M (2), 80M (3), etc */ 3323 uint8 pad[3]; 3324 } wl_mimo_ps_status_v1_t; 3325 3326 #define WL_MIMO_PS_STATUS_AP_CAP(ap_cap) (ap_cap & 0x0F) 3327 #define WL_MIMO_PS_STATUS_AP_CAP_BW(ap_cap) (ap_cap >> 4) 3328 #define WL_MIMO_PS_STATUS_ASSOC_BW_SHIFT 4 3329 3330 /* version 3: assoc status: low nibble is status enum, high other flags */ 3331 #define WL_MIMO_PS_STATUS_VERSION_3 3 3332 #define WL_MIMO_PS_STATUS_ASSOC_STATUS_MASK 0x0F 3333 #define WL_MIMO_PS_STATUS_ASSOC_STATUS_VHT_WITHOUT_OMN 0x80 3334 3335 /* mimo_ps_status: ap_cap/association status */ 3336 enum { 3337 WL_MIMO_PS_STATUS_ASSOC_NONE = 0, 3338 WL_MIMO_PS_STATUS_ASSOC_SISO = 1, 3339 WL_MIMO_PS_STATUS_ASSOC_MIMO = 2, 3340 WL_MIMO_PS_STATUS_ASSOC_LEGACY = 3 3341 }; 3342 3343 /* mimo_ps_status: mimo_ps_cfg states */ 3344 enum { 3345 WL_MIMO_PS_CFG_STATE_NONE = 0, 3346 WL_MIMO_PS_CFG_STATE_INFORM_AP_INPROGRESS = 1, 3347 WL_MIMO_PS_CFG_STATE_INFORM_AP_DONE = 2, 3348 WL_MIMO_PS_CFG_STATE_LEARNING = 3, 3349 WL_MIMO_PS_CFG_STATE_HW_CONFIGURE = 4, 3350 WL_MIMO_PS_CFG_STATE_INFORM_AP_PENDING = 5 3351 }; 3352 3353 /* mimo_ps_status: hw_state values */ 3354 #define WL_MIMO_PS_STATUS_HW_STATE_NONE 0 3355 #define WL_MIMO_PS_STATUS_HW_STATE_LTECOEX (0x1 << 0) 3356 #define WL_MIMO_PS_STATUS_HW_STATE_MIMOPS_BSS (0x1 << 1) 3357 3358 #ifdef WLAWDL 3359 #define WL_MIMO_PS_STATUS_HW_STATE_AWDL_BSS (0x1 << 2) 3360 #endif /* WLAWDL */ 3361 3362 #define WL_MIMO_PS_STATUS_HW_STATE_SCAN (0x1 << 3) 3363 #define WL_MIMO_PS_STATUS_HW_STATE_TXPPR (0x1 << 4) 3364 #define WL_MIMO_PS_STATUS_HW_STATE_PWRTHOTTLE (0x1 << 5) 3365 #define WL_MIMO_PS_STATUS_HW_STATE_TMPSENSE (0x1 << 6) 3366 #define WL_MIMO_PS_STATUS_HW_STATE_IOVAR (0x1 << 7) 3367 #define WL_MIMO_PS_STATUS_HW_STATE_AP_BSS (0x1 << 8) 3368 3369 /* mimo_ps_status: mrc states */ 3370 #define WL_MIMO_PS_STATUS_MRC_NONE 0 3371 #define WL_MIMO_PS_STATUS_MRC_ACTIVE 1 3372 3373 /* mimo_ps_status: core flag states for single-core beacon and siso-bcmc rx */ 3374 #define WL_MIMO_PS_STATUS_MHF_FLAG_NONE 0 3375 #define WL_MIMO_PS_STATUS_MHF_FLAG_ACTIVE 1 3376 #define WL_MIMO_PS_STATUS_MHF_FLAG_COREDOWN 2 3377 #define WL_MIMO_PS_STATUS_MHF_FLAG_INVALID 3 3378 3379 /* Type values for the REASON */ 3380 #define WL_MIMO_PS_PS_LEARNING_ABORTED (1 << 0) 3381 #define WL_MIMO_PS_PS_LEARNING_COMPLETED (1 << 1) 3382 #define WL_MIMO_PS_PS_LEARNING_ONGOING (1 << 2) 3383 3384 typedef struct wl_mimo_ps_learning_event_data { 3385 uint32 startTimeStamp; 3386 uint32 endTimeStamp; 3387 uint16 reason; 3388 struct ether_addr BSSID; 3389 uint32 totalSISO_below_rssi_threshold; 3390 uint32 totalMIMO_below_rssi_threshold; 3391 uint32 totalSISO_above_rssi_threshold; 3392 uint32 totalMIMO_above_rssi_threshold; 3393 } wl_mimo_ps_learning_event_data_t; 3394 3395 #define WL_MIMO_PS_PS_LEARNING_CFG_ABORT (1 << 0) 3396 #define WL_MIMO_PS_PS_LEARNING_CFG_STATUS (1 << 1) 3397 #define WL_MIMO_PS_PS_LEARNING_CFG_CONFIG (1 << 2) 3398 #define WL_MIMO_PS_PS_LEARNING_CFG_MASK (0x7) 3399 3400 #define WL_MIMO_PS_PS_LEARNING_CFG_V1 1 3401 3402 typedef struct wl_mimops_learning_cfg { 3403 /* flag: bit 0 for abort */ 3404 /* flag: bit 1 for status */ 3405 /* flag: bit 2 for configuring no of packets and rssi */ 3406 uint8 flag; 3407 /* mimo ps learning version, compatible version is 0 */ 3408 uint8 version; 3409 /* if version is 0 or rssi is 0, ignored */ 3410 int8 learning_rssi_threshold; 3411 uint8 reserved; 3412 uint32 no_of_packets_for_learning; 3413 wl_mimo_ps_learning_event_data_t mimops_learning_data; 3414 } wl_mimops_learning_cfg_t; 3415 3416 #define WL_OCL_STATUS_VERSION 1 3417 typedef struct ocl_status_info { 3418 uint8 version; 3419 uint8 len; 3420 uint16 fw_status; /* Bits representing FW disable reasons */ 3421 uint8 hw_status; /* Bits for actual HW config and SISO/MIMO coremask */ 3422 uint8 coremask; /* The ocl core mask (indicating listening core) */ 3423 } ocl_status_info_t; 3424 3425 /* MWS OCL map */ 3426 #define WL_MWS_OCL_OVERRIDE_VERSION 1 3427 typedef struct wl_mws_ocl_override { 3428 uint16 version; /* Structure version */ 3429 uint16 bitmap_2g; /* bitmap for 2.4G channels bits 1-13 */ 3430 uint16 bitmap_5g_lo; /* bitmap for 5G low channels by 2: 3431 *34-48, 52-56, 60-64, 100-102 3432 */ 3433 uint16 bitmap_5g_mid; /* bitmap for 5G mid channels by 2: 3434 * 104, 108-112, 116-120, 124-128, 3435 * 132-136, 140, 149-151 3436 */ 3437 uint16 bitmap_5g_high; /* bitmap for 5G high channels by 2 3438 * 153, 157-161, 165 3439 */ 3440 } wl_mws_ocl_override_t; 3441 3442 /* Bits for fw_status */ 3443 #define OCL_DISABLED_HOST 0x01 /* Host has disabled through ocl_enable */ 3444 #define OCL_DISABLED_RSSI 0x02 /* Disabled because of ocl_rssi_threshold */ 3445 #define OCL_DISABLED_LTEC 0x04 /* Disabled due to LTE Coex activity */ 3446 #define OCL_DISABLED_SISO 0x08 /* Disabled while in SISO mode */ 3447 #define OCL_DISABLED_CAL 0x10 /* Disabled during active calibration */ 3448 #define OCL_DISABLED_CHANSWITCH 0x20 /* Disabled during active channel switch */ 3449 #define OCL_DISABLED_ASPEND 0x40 /* Disabled due to assoc pending */ 3450 #define OCL_DISABLED_SEQ_RANGE 0x80 /* Disabled during SEQ Ranging */ 3451 #define OCL_DISABLED_RXIQ_EST_BTLOWAR 0x100 /* Disabled if the bt-lo-war is active */ 3452 #define OCL_DISABLED_IDLE_TSSICAL 0x200 3453 #define OCL_DISABLED_TONE 0x400 /* Disabled if the tone is active */ 3454 #define OCL_DISABLED_NOISECAL 0x800 /* Disabled if the noise cal is active */ 3455 3456 /* Bits for hw_status */ 3457 #define OCL_HWCFG 0x01 /* State of OCL config bit in phy HW */ 3458 #define OCL_HWMIMO 0x02 /* Set if current coremask is > 1 bit */ 3459 #define OCL_COREDOWN 0x80 /* Set if core is currently down */ 3460 3461 #define WL_OPS_CFG_VERSION_1 1 3462 /* Common IOVAR struct */ 3463 typedef struct wl_ops_cfg_v1 { 3464 uint16 version; 3465 uint16 len; /* total length includes fixed fields and variable data[] */ 3466 uint16 subcmd_id; /* subcommand id */ 3467 uint16 padding; /* reserved / padding for 4 byte align */ 3468 uint8 data[]; /* subcommand data; could be empty */ 3469 } wl_ops_cfg_v1_t; 3470 3471 /* subcommands ids */ 3472 enum { 3473 WL_OPS_CFG_SUBCMD_ENABLE = 0, /* OPS enable/disable mybss and obss 3474 * for nav and plcp options 3475 */ 3476 WL_OPS_CFG_SUBCMD_MAX_SLEEP_DUR = 1, /* Max sleep duration used for OPS */ 3477 WL_OPS_CFG_SUBCMD_RESET_STATS = 2 /* Reset stats part of ops_status 3478 * on both slices 3479 */ 3480 }; 3481 3482 #define WL_OPS_CFG_MASK 0xffff 3483 #define WL_OPS_CFG_CAP_MASK 0xffff0000 3484 #define WL_OPS_CFG_CAP_SHIFT 16 /* Shift bits to locate the OPS CAP */ 3485 #define WL_OPS_MAX_SLEEP_DUR 12500 /* max ops duration in us */ 3486 #define WL_OPS_MINOF_MAX_SLEEP_DUR 512 /* minof max ops duration in us */ 3487 #define WL_OPS_SUPPORTED_CFG (WL_OPS_MYBSS_PLCP_DUR | WL_OPS_MYBSS_NAV_DUR \ 3488 | WL_OPS_OBSS_PLCP_DUR | WL_OPS_OBSS_NAV_DUR) 3489 #define WL_OPS_DEFAULT_CFG WL_OPS_SUPPORTED_CFG 3490 3491 /* WL_OPS_CFG_SUBCMD_ENABLE */ 3492 typedef struct wl_ops_cfg_enable { 3493 uint32 bits; /* selectively enable ops for mybss and obss */ 3494 } wl_ops_cfg_enable_t; 3495 /* Bits for WL_OPS_CFG_SUBCMD_ENABLE Parameter */ 3496 #define WL_OPS_MYBSS_PLCP_DUR 0x1 /* OPS based on mybss 11b & 11n mixed HT frames 3497 * PLCP header duration 3498 */ 3499 #define WL_OPS_MYBSS_NAV_DUR 0x2 /* OPS based on mybss RTS-CTS duration */ 3500 #define WL_OPS_OBSS_PLCP_DUR 0x4 /* OPS based on obss 11b & 11n mixed HT frames 3501 * PLCP header duration 3502 */ 3503 #define WL_OPS_OBSS_NAV_DUR 0x8 /* OPS based on obss RTS-CTS duration */ 3504 3505 /* WL_OPS_CFG_SUBCMD_MAX_SLEEP_DUR */ 3506 typedef struct wl_ops_cfg_max_sleep_dur { 3507 uint32 val; /* maximum sleep duration (us) used for OPS */ 3508 } wl_ops_cfg_max_sleep_dur_t; 3509 3510 /* WL_OPS_CFG_SUBCMD_RESET_STATS */ 3511 typedef struct wl_ops_cfg_reset_stats { 3512 uint32 val; /* bitmap of slices, 0 means all slices */ 3513 } wl_ops_cfg_reset_stats_t; 3514 3515 #define WL_OPS_STATUS_VERSION_1 1 3516 #define OPS_DUR_HIST_BINS 5 /* number of bins used, 0-1, 1-2, 2-4, 4-8, >8 msec */ 3517 typedef struct wl_ops_status_v1 { 3518 uint16 version; 3519 uint16 len; /* Total length including all fixed fields */ 3520 uint8 slice_index; /* Slice for which status is reported */ 3521 uint8 disable_obss; /* indicate if obss cfg is disabled */ 3522 uint8 pad[2]; /* 4-byte alignment */ 3523 uint32 disable_reasons; /* FW disable reasons */ 3524 uint32 disable_duration; /* ops disable time(ms) due to disable reasons */ 3525 uint32 applied_ops_config; /* currently applied ops config */ 3526 uint32 partial_ops_dur; /* Total time (in usec) of partial ops duration */ 3527 uint32 full_ops_dur; /* Total time (in usec) of full ops duration */ 3528 uint32 count_dur_hist[OPS_DUR_HIST_BINS]; /* ops occurrence histogram */ 3529 uint32 nav_cnt; /* number of times ops triggered based NAV duration */ 3530 uint32 plcp_cnt; /* number of times ops triggered based PLCP duration */ 3531 uint32 mybss_cnt; /* number of times mybss ops trigger */ 3532 uint32 obss_cnt; /* number of times obss ops trigger */ 3533 uint32 miss_dur_cnt; /* number of times ops couldn't happen 3534 * due to insufficient duration 3535 */ 3536 uint32 miss_premt_cnt; /* number of times ops couldn't happen due 3537 * to not meeting Phy preemption thresh 3538 */ 3539 uint32 max_dur_cnt; /* number of times ops did not trigger due to 3540 * frames exceeding max sleep duration 3541 */ 3542 uint32 wake_cnt; /* number of ops miss due to wake reason */ 3543 uint32 bcn_wait_cnt; /* number of ops miss due to waiting for bcn */ 3544 } wl_ops_status_v1_t; 3545 /* Bits for disable_reasons */ 3546 #define OPS_DISABLED_HOST 0x01 /* Host has disabled through ops_cfg */ 3547 #define OPS_DISABLED_UNASSOC 0x02 /* Disabled because the slice is in unassociated state */ 3548 #define OPS_DISABLED_SCAN 0x04 /* Disabled because the slice is in scan state */ 3549 #define OPS_DISABLED_BCN_MISS 0x08 /* Disabled because beacon missed for a duration */ 3550 3551 #define WL_PSBW_CFG_VERSION_1 1 3552 /* Common IOVAR struct */ 3553 typedef struct wl_psbw_cfg_v1 { 3554 uint16 version; 3555 uint16 len; /* total length includes fixed fields and variable data[] */ 3556 uint16 subcmd_id; /* subcommand id */ 3557 uint16 pad; /* reserved / padding for 4 byte align */ 3558 uint8 data[]; /* subcommand data */ 3559 } wl_psbw_cfg_v1_t; 3560 3561 /* subcommands ids */ 3562 enum { 3563 /* PSBW enable/disable */ 3564 WL_PSBW_CFG_SUBCMD_ENABLE = 0, 3565 /* override psbw disable requests */ 3566 WL_PSBW_CFG_SUBCMD_OVERRIDE_DISABLE_MASK = 1, 3567 /* Reset stats part of psbw status */ 3568 WL_PSBW_CFG_SUBCMD_RESET_STATS = 2 3569 }; 3570 3571 #define WL_PSBW_OVERRIDE_DISA_CFG_MASK 0x0000ffff 3572 #define WL_PSBW_OVERRIDE_DISA_CAP_MASK 0xffff0000 3573 #define WL_PSBW_OVERRIDE_DISA_CAP_SHIFT 16 /* shift bits for cap */ 3574 3575 /* WL_PSBW_CFG_SUBCMD_ENABLE */ 3576 typedef struct wl_psbw_cfg_enable { 3577 bool enable; /* enable or disable */ 3578 } wl_psbw_cfg_enable_t; 3579 3580 /* WL_PSBW_CFG_SUBCMD_OVERRIDE_DISABLE_MASK */ 3581 typedef struct wl_psbw_cfg_override_disable_mask { 3582 uint32 mask; /* disable requests to override, cap and current cfg */ 3583 } wl_psbw_cfg_override_disable_mask_t; 3584 3585 /* WL_PSBW_CFG_SUBCMD_RESET_STATS */ 3586 typedef struct wl_psbw_cfg_reset_stats { 3587 uint32 val; /* infra interface index, 0 */ 3588 } wl_psbw_cfg_reset_stats_t; 3589 3590 #define WL_PSBW_STATUS_VERSION_1 1 3591 typedef struct wl_psbw_status_v1 { 3592 uint16 version; 3593 uint16 len; /* total length including all fixed fields */ 3594 uint8 curr_slice_index; /* current slice index of the interface */ 3595 uint8 associated; /* interface associatd */ 3596 chanspec_t chspec; /* radio chspec */ 3597 uint32 state; /* psbw state */ 3598 uint32 disable_reasons; /* FW disable reasons */ 3599 uint32 slice_enable_dur; /* time(ms) psbw remains enabled on this slice */ 3600 uint32 total_enable_dur; /* time(ms) psbw remains enabled total */ 3601 uint32 enter_cnt; /* total cnt entering PSBW active */ 3602 uint32 exit_cnt; /* total cnt exiting PSBW active */ 3603 uint32 exit_imd_cnt; /* total cnt imd exit when waited N tbtts */ 3604 uint32 enter_skip_cnt; /* total cnt entering PSBW active skipped */ 3605 } wl_psbw_status_v1_t; 3606 3607 /* Bit for state */ 3608 #define PSBW_ACTIVE 0x1 /* active 20MHz */ 3609 #define PSBW_TTTT_PEND 0x2 /* waiting for TTTT intr */ 3610 #define PSBW_WAIT_ENTER 0x4 /* in wait period before entering */ 3611 #define PSBW_CAL_DONE 0x8 /* 20M channel cal done */ 3612 3613 /* Bits for disable_reasons */ 3614 #define WL_PSBW_DISA_HOST 0x00000001 /* Host has disabled through psbw_cfg */ 3615 #define WL_PSBW_DISA_AP20M 0x00000002 /* AP is operating on 20 MHz */ 3616 #define WL_PSBW_DISA_SLOTTED_BSS 0x00000004 /* slot_bss active */ 3617 #define WL_PSBW_DISA_NOT_PMFAST 0x00000008 /* Not PM_FAST */ 3618 #define WL_PSBW_DISA_BASICRATESET 0x00000010 /* BasicRateSet is empty */ 3619 #define WL_PSBW_DISA_NOT_D3 0x00000020 /* PCIe not in D3 */ 3620 #define WL_PSBW_DISA_CSA 0x00000040 /* CSA IE is present */ 3621 #define WL_PSBW_DISA_ASSOC 0x00000080 /* assoc state is active/or unassoc */ 3622 #define WL_PSBW_DISA_SCAN 0x00000100 /* scan state is active */ 3623 #define WL_PSBW_DISA_CAL 0x00000200 /* cal pending or active */ 3624 #define WL_PSBW_DISA_BCN_OFFLOAD 0x00000400 /* PSBW disabled due to scan 3625 * core beacon offload 3626 */ 3627 #define WL_PSBW_DISA_DISASSOC 0x00000800 /* STA is disassociated */ 3628 /* following are not part of disable reasons */ 3629 #define WL_PSBW_EXIT_PM 0x00001000 /* Out of PM */ 3630 #define WL_PSBW_EXIT_TIM 0x00002000 /* unicast TIM bit present */ 3631 #define WL_PSBW_EXIT_DATA 0x00004000 /* Data for transmission */ 3632 #define WL_PSBW_EXIT_MGMTDATA 0x00008000 /* management frame for transmission */ 3633 #define WL_PSBW_EXIT_BW_UPD 0x00010000 /* BW being updated */ 3634 #define WL_PSBW_DISA_NONE 0x80000000 /* reserved for internal use only */ 3635 3636 /* DVFS */ 3637 #define DVFS_CMND_VERSION_1 1 3638 /* Common IOVAR struct */ 3639 typedef struct dvfs_cmnd_v1 { 3640 uint16 ver; /* version of this structure */ 3641 uint16 len; /* includes both fixed and variable data[] fields */ 3642 uint32 subcmd; /* subcommand id */ 3643 uint8 data[]; /* subcommand data */ 3644 } dvfs_cmnd_v1_t; 3645 3646 /* subcommand ids */ 3647 enum { 3648 DVFS_SUBCMD_ENABLE = 0, /* DVFS enable/disable, 1-byte data 3649 * DVFS enable:1, disable:0 3650 */ 3651 DVFS_SUBCMD_LDV = 1, /* DVFS force arm state to LDV, 1-byte data 3652 * DVFS force LDV ON 1, LDV OFF 0 3653 */ 3654 DVFS_SUBCMD_STATUS = 2, /* DVFS status, data[] contains dvfs_status */ 3655 DVFS_SUBCMD_HIST = 3, /* DVFS history, data[] contains 3656 * history of dvfs state change 3657 */ 3658 DVFS_SUBCMD_LAST 3659 }; 3660 3661 /* DVFS Status */ 3662 /* current DVFS state request for ARM */ 3663 #define DVFS_STATE_BIT_MASK 0x0Fu 3664 #define DVFS_STATE_BIT_SHIFT 0u 3665 /* Bit value for DVFS state request */ 3666 #define DVFS_STATE_LDV 0u 3667 #define DVFS_STATE_NDV 1u 3668 /* current DVFS status */ 3669 #define DVFS_STATUS_BIT_MASK 0xF0u 3670 #define DVFS_STATUS_BIT_SHIFT 4u 3671 /* Bit value for DVFS status */ 3672 #define DVFS_STATUS_LDV 0u 3673 #define DVFS_STATUS_NDV 1u 3674 /* DVFS bits are for status, raw request and active request */ 3675 /* 4387b0 supports only status bits for aux, main, and bt */ 3676 /* 4387c0 supports all eight status and request bits */ 3677 #define DVFS_BIT_AUX_MASK 0x0001u 3678 #define DVFS_BIT_AUX_SHIFT 0u 3679 #define DVFS_BIT_AUX_VAL(_val) (((_val) & DVFS_BIT_AUX_MASK) \ 3680 >> DVFS_BIT_AUX_SHIFT) 3681 #define DVFS_BIT_MAIN_MASK 0x0002u 3682 #define DVFS_BIT_MAIN_SHIFT 1u 3683 #define DVFS_BIT_MAIN_VAL(_val) (((_val) & DVFS_BIT_MAIN_MASK) \ 3684 >> DVFS_BIT_MAIN_SHIFT) 3685 #define DVFS_BIT_BT_MASK 0x0004u 3686 #define DVFS_BIT_BT_SHIFT 2u 3687 #define DVFS_BIT_BT_VAL(_val) (((_val) & DVFS_BIT_BT_MASK) \ 3688 >> DVFS_BIT_BT_SHIFT) 3689 #define DVFS_BIT_CHIPC_MASK 0x0008u 3690 #define DVFS_BIT_CHIPC_SHIFT 3u 3691 #define DVFS_BIT_CHIPC_VAL(_val) (((_val) & DVFS_BIT_CHIPC_MASK) \ 3692 >> DVFS_BIT_CHIPC_SHIFT) 3693 #define DVFS_BIT_PCIE_MASK 0x0010u 3694 #define DVFS_BIT_PCIE_SHIFT 4u 3695 #define DVFS_BIT_PCIE_VAL(_val) (((_val) & DVFS_BIT_PCIE_MASK) \ 3696 >> DVFS_BIT_PCIE_SHIFT) 3697 #define DVFS_BIT_ARM_MASK 0x0020u 3698 #define DVFS_BIT_ARM_SHIFT 5u 3699 #define DVFS_BIT_ARM_VAL(_val) (((_val) & DVFS_BIT_ARM_MASK) \ 3700 >> DVFS_BIT_ARM_SHIFT) 3701 #define DVFS_BIT_SCAN_MASK 0x0040u 3702 #define DVFS_BIT_SCAN_SHIFT 6u 3703 #define DVFS_BIT_SCAN_VAL(_val) (((_val) & DVFS_BIT_SCAN_MASK) \ 3704 >> DVFS_BIT_SCAN_SHIFT) 3705 #define DVFS_BIT_BTSCAN_MASK 0x0080u 3706 #define DVFS_BIT_BTSCAN_SHIFT 7u 3707 #define DVFS_BIT_BTSCAN_VAL(_val) (((_val) & DVFS_BIT_BTSCAN_MASK) \ 3708 >> DVFS_BIT_BTSCAN_SHIFT) 3709 #define DVFS_BIT_HWA_MASK 0x0100u 3710 #define DVFS_BIT_HWA_SHIFT 8u 3711 #define DVFS_BIT_HWA_VAL(_val) (((_val) & DVFS_BIT_HWA_MASK) \ 3712 >> DVFS_BIT_HWA_SHIFT) 3713 #define DVFS_BIT_SYSMEM_MASK 0x0200u 3714 #define DVFS_BIT_SYSMEM_SHIFT 9u 3715 #define DVFS_BIT_SYSMEM_VAL(_val) (((_val) & DVFS_BIT_SYSMEM_MASK) \ 3716 >> DVFS_BIT_SYSMEM_SHIFT) 3717 /* to convert voltage to volt from multiple of 10mVolt */ 3718 #define DVFS_CONVERT_TO_VOLT 100u 3719 3720 /* status version for 4387b0 */ 3721 #define DVFS_STATUS_VERSION_1 1 3722 typedef struct dvfs_status_v1 { 3723 uint16 version; /* version of dvfs_status */ 3724 uint16 len; /* total length including all fixed fields */ 3725 uint8 info; /* current dvfs state request and status */ 3726 uint8 voltage; /* voltage (multiple of 10mV) */ 3727 uint16 freq; /* arm clock frequency (in MHz) */ 3728 uint32 state_change_count; /* total state (LDV/NDV) transition count */ 3729 uint32 ldv_duration; /* total time (ms) in LDV */ 3730 uint32 ndv_duration; /* total time (ms) in NDV */ 3731 uint16 status; /* status bits */ 3732 uint16 pad; /* word aligned for size */ 3733 } dvfs_status_v1_t; 3734 #define DVFS_STATUS_VER_1_LEN (sizeof(dvfs_status_v1_t)) 3735 /* status version for 4387c0 */ 3736 #define DVFS_STATUS_VERSION_2 2 3737 #define DVFS_STATUS_VERSION_3 3 3738 typedef struct dvfs_status_v2 { 3739 uint16 version; /* version of dvfs_status */ 3740 uint16 len; /* total length including all fixed fields */ 3741 uint8 info; /* current dvfs state request and status */ 3742 uint8 voltage; /* voltage (multiple of 10mV) */ 3743 uint16 freq; /* arm clock frequency (in MHz) */ 3744 uint32 state_change_count; /* total state (LDV/NDV) transition count */ 3745 uint32 ldv_duration; /* total time (ms) in LDV */ 3746 uint32 ndv_duration; /* total time (ms) in NDV */ 3747 uint16 status; /* status bits */ 3748 uint16 raw_request; /* raw request bits */ 3749 uint16 active_request; /* active request bits */ 3750 /* DVFS_STATUS_VERSION_3 for pmurev >= 40 */ 3751 uint16 valid_cores; /* bitmap to indicate valid cores status */ 3752 } dvfs_status_v2_t; 3753 #define DVFS_STATUS_V2_VALID_CORES (0xFFu) 3754 #define DVFS_STATUS_VER_3_LEN (sizeof(dvfs_status_v2_t)) 3755 #define DVFS_STATUS_VER_2_LEN (DVFS_STATUS_VER_3_LEN - (sizeof(uint16))) 3756 3757 /* DVFS_SUBCMD_HIST */ 3758 #define DVFS_HIST_CMD_VERSION_1 1 3759 typedef struct dvfs_hist_cmd_v1 { 3760 uint16 version; /* version of this structure */ 3761 uint16 len; /* includes both fixed and variable data[] fields */ 3762 uint8 data[]; /* subcommand data : array of dvfs_hist_v1_t */ 3763 } dvfs_hist_cmd_v1_t; 3764 3765 /* DVFS_SUBCMD_HIST data[] payload */ 3766 typedef struct dvfs_hist_v1 { 3767 uint8 old_state; /* old state */ 3768 uint8 new_state; /* new state */ 3769 uint16 reason; /* reason for state change */ 3770 uint32 timestamp; /* timestamp of state change */ 3771 } dvfs_hist_v1_t; 3772 3773 /* Bits for DVFS state change reason */ 3774 #define WL_DVFS_REASON_NOTPM 0x0001u /* Not PM */ 3775 #define WL_DVFS_REASON_MPC 0x0002u /* MPC */ 3776 #define WL_DVFS_REASON_TX_ACTIVE 0x0004u /* TX Active */ 3777 #define WL_DVFS_REASON_DBGST_ACTIVE 0x0008u /* Power state active */ 3778 #define WL_DVFS_REASON_DBGST_ASLEEP 0x0010u /* Power state asleep */ 3779 #define WL_DVFS_REASON_LTR_ACTIVE 0x0020u /* LTR Active */ 3780 #define WL_DVFS_REASON_HOST 0x0040u /* Host disabled */ 3781 #define WL_DVFS_REASON_SCAN 0x0080u /* Scan */ 3782 #define WL_DVFS_REASON_SLOTTED_BSS 0x0100u /* Slotted BSS */ 3783 #define WL_DVFS_REASON_CHAN 0x0200u /* Channel Change */ 3784 #define WL_DVFS_REASON_CAL 0x0400u /* CAL */ 3785 #define WL_DVFS_REASON_ASSOC 0x0800u /* ASSOC */ 3786 #define WL_DVFS_REASON_WD 0x1000u /* WD */ 3787 #define WL_DVFS_REASON_SOFTAP 0x2000u /* SoftAP */ 3788 3789 /* 3790 * Join preference iovar value is an array of tuples. Each tuple has a one-byte type, 3791 * a one-byte length, and a variable length value. RSSI type tuple must be present 3792 * in the array. 3793 * 3794 * Types are defined in "join preference types" section. 3795 * 3796 * Length is the value size in octets. It is reserved for WL_JOIN_PREF_WPA type tuple 3797 * and must be set to zero. 3798 * 3799 * Values are defined below. 3800 * 3801 * 1. RSSI - 2 octets 3802 * offset 0: reserved 3803 * offset 1: reserved 3804 * 3805 * 2. WPA - 2 + 12 * n octets (n is # tuples defined below) 3806 * offset 0: reserved 3807 * offset 1: # of tuples 3808 * offset 2: tuple 1 3809 * offset 14: tuple 2 3810 * ... 3811 * offset 2 + 12 * (n - 1) octets: tuple n 3812 * 3813 * struct wpa_cfg_tuple { 3814 * uint8 akm[DOT11_OUI_LEN+1]; akm suite 3815 * uint8 ucipher[DOT11_OUI_LEN+1]; unicast cipher suite 3816 * uint8 mcipher[DOT11_OUI_LEN+1]; multicast cipher suite 3817 * }; 3818 * 3819 * multicast cipher suite can be specified as a specific cipher suite or WL_WPA_ACP_MCS_ANY. 3820 * 3821 * 3. BAND - 2 octets 3822 * offset 0: reserved 3823 * offset 1: see "band preference" and "band types" 3824 * 3825 * 4. BAND RSSI - 2 octets 3826 * offset 0: band types 3827 * offset 1: +ve RSSI boost value in dB 3828 */ 3829 3830 struct tsinfo_arg { 3831 uint8 octets[3]; 3832 }; 3833 3834 #define RATE_CCK_1MBPS 0 3835 #define RATE_CCK_2MBPS 1 3836 #define RATE_CCK_5_5MBPS 2 3837 #define RATE_CCK_11MBPS 3 3838 3839 #define RATE_LEGACY_OFDM_6MBPS 0 3840 #define RATE_LEGACY_OFDM_9MBPS 1 3841 #define RATE_LEGACY_OFDM_12MBPS 2 3842 #define RATE_LEGACY_OFDM_18MBPS 3 3843 #define RATE_LEGACY_OFDM_24MBPS 4 3844 #define RATE_LEGACY_OFDM_36MBPS 5 3845 #define RATE_LEGACY_OFDM_48MBPS 6 3846 #define RATE_LEGACY_OFDM_54MBPS 7 3847 3848 #define WL_BSSTRANS_RSSI_RATE_MAP_VERSION 1 3849 #define WL_BSSTRANS_RSSI_RATE_MAP_VERSION_V1 1 3850 #define WL_BSSTRANS_RSSI_RATE_MAP_VERSION_V2 2 3851 #define WL_BSSTRANS_RSSI_RATE_MAP_VERSION_V3 3 3852 3853 typedef struct wl_bsstrans_rssi { 3854 int8 rssi_2g; /**< RSSI in dbm for 2.4 G */ 3855 int8 rssi_5g; /**< RSSI in dbm for 5G, unused for cck */ 3856 } wl_bsstrans_rssi_t; 3857 3858 #define RSSI_RATE_MAP_MAX_STREAMS 4 /**< max streams supported */ 3859 3860 /** RSSI to rate mapping, all 20Mhz, no SGI */ 3861 typedef struct wl_bsstrans_rssi_rate_map_v3 { 3862 uint16 ver; 3863 uint16 len; /**< length of entire structure */ 3864 wl_bsstrans_rssi_t cck[WL_NUM_RATES_CCK]; /**< 2.4G only */ 3865 wl_bsstrans_rssi_t ofdm[WL_NUM_RATES_OFDM]; /**< 6 to 54mbps */ 3866 wl_bsstrans_rssi_t phy_n[RSSI_RATE_MAP_MAX_STREAMS][WL_NUM_RATES_MCS_1STREAM]; /* MCS0-7 */ 3867 wl_bsstrans_rssi_t phy_ac[RSSI_RATE_MAP_MAX_STREAMS][WL_NUM_RATES_VHT_ALL]; /* MCS0-11 */ 3868 wl_bsstrans_rssi_t phy_ax[RSSI_RATE_MAP_MAX_STREAMS][WL_NUM_RATES_HE]; /* MCS0-11 */ 3869 wl_bsstrans_rssi_t phy_be[RSSI_RATE_MAP_MAX_STREAMS][WL_NUM_RATES_EHT]; /* MCS0-13 */ 3870 } wl_bsstrans_rssi_rate_map_v3_t; 3871 3872 /** RSSI to rate mapping, all 20Mhz, no SGI */ 3873 typedef struct wl_bsstrans_rssi_rate_map_v2 { 3874 uint16 ver; 3875 uint16 len; /**< length of entire structure */ 3876 wl_bsstrans_rssi_t cck[WL_NUM_RATES_CCK]; /**< 2.4G only */ 3877 wl_bsstrans_rssi_t ofdm[WL_NUM_RATES_OFDM]; /**< 6 to 54mbps */ 3878 wl_bsstrans_rssi_t phy_n[RSSI_RATE_MAP_MAX_STREAMS][WL_NUM_RATES_MCS_1STREAM]; /* MCS0-7 */ 3879 wl_bsstrans_rssi_t phy_ac[RSSI_RATE_MAP_MAX_STREAMS][WL_NUM_RATES_VHT_ALL]; /**< MCS0-11 */ 3880 wl_bsstrans_rssi_t phy_ax[RSSI_RATE_MAP_MAX_STREAMS][WL_NUM_RATES_HE]; /**< MCS0-11 */ 3881 } wl_bsstrans_rssi_rate_map_v2_t; 3882 3883 /** RSSI to rate mapping, all 20Mhz, no SGI */ 3884 typedef struct wl_bsstrans_rssi_rate_map_v1 { 3885 uint16 ver; 3886 uint16 len; /**< length of entire structure */ 3887 wl_bsstrans_rssi_t cck[WL_NUM_RATES_CCK]; /**< 2.4G only */ 3888 wl_bsstrans_rssi_t ofdm[WL_NUM_RATES_OFDM]; /**< 6 to 54mbps */ 3889 wl_bsstrans_rssi_t phy_n[RSSI_RATE_MAP_MAX_STREAMS][WL_NUM_RATES_MCS_1STREAM]; /* MCS0-7 */ 3890 wl_bsstrans_rssi_t phy_ac[RSSI_RATE_MAP_MAX_STREAMS][WL_NUM_RATES_VHT]; /**< MCS0-9 */ 3891 } wl_bsstrans_rssi_rate_map_v1_t; 3892 3893 /** RSSI to rate mapping, all 20Mhz, no SGI */ 3894 typedef struct wl_bsstrans_rssi_rate_map { 3895 uint16 ver; 3896 uint16 len; /**< length of entire structure */ 3897 wl_bsstrans_rssi_t cck[WL_NUM_RATES_CCK]; /**< 2.4G only */ 3898 wl_bsstrans_rssi_t ofdm[WL_NUM_RATES_OFDM]; /**< 6 to 54mbps */ 3899 wl_bsstrans_rssi_t phy_n[RSSI_RATE_MAP_MAX_STREAMS][WL_NUM_RATES_MCS_1STREAM]; /* MCS0-7 */ 3900 wl_bsstrans_rssi_t phy_ac[RSSI_RATE_MAP_MAX_STREAMS][WL_NUM_RATES_VHT]; /**< MCS0-9 */ 3901 } wl_bsstrans_rssi_rate_map_t; 3902 3903 #define WL_BSSTRANS_ROAMTHROTTLE_VERSION 1 3904 3905 /** Configure number of scans allowed per throttle period */ 3906 typedef struct wl_bsstrans_roamthrottle { 3907 uint16 ver; 3908 uint16 period; 3909 uint16 scans_allowed; 3910 } wl_bsstrans_roamthrottle_t; 3911 3912 #define NFIFO 6 /**< # tx/rx fifopairs */ 3913 3914 #ifndef NFIFO_EXT 3915 #if defined(BCM_AQM_DMA_DESC) && !defined(BCM_AQM_DMA_DESC_DISABLED) 3916 #ifdef WL_LLW 3917 #define NFIFO_EXT 11 /* 4EDCA + 4 TWT + 1 Mcast/Bcast + 1 Spare + 1 LLQ */ 3918 #else 3919 #define NFIFO_EXT 10 /* 4EDCA + 4 TWT + 1 Mcast/Bcast + 1 Spare */ 3920 #endif 3921 #elif defined(WL11AX_TRIGGERQ) && !defined(WL11AX_TRIGGERQ_DISABLED) 3922 #define NFIFO_EXT 10 3923 #else 3924 #define NFIFO_EXT NFIFO 3925 #endif /* BCM_AQM_DMA_DESC && !BCM_AQM_DMA_DESC_DISABLED */ 3926 #endif /* NFIFO_EXT */ 3927 3928 /* When new reason codes are added to list, Please update wl_reinit_names also */ 3929 /* Reinit reason codes */ 3930 enum { 3931 WL_REINIT_RC_NONE = 0, 3932 WL_REINIT_RC_PS_SYNC = 1, 3933 WL_REINIT_RC_PSM_WD = 2, 3934 WL_REINIT_RC_MAC_WAKE = 3, 3935 WL_REINIT_RC_MAC_SUSPEND = 4, 3936 WL_REINIT_RC_MAC_SPIN_WAIT = 5, 3937 WL_REINIT_RC_AXI_BUS_ERROR = 6, 3938 WL_REINIT_RC_DEVICE_REMOVED = 7, 3939 WL_REINIT_RC_PCIE_FATAL_ERROR = 8, 3940 WL_REINIT_RC_OL_FW_TRAP = 9, 3941 WL_REINIT_RC_FIFO_ERR = 10, 3942 WL_REINIT_RC_INV_TX_STATUS = 11, 3943 WL_REINIT_RC_MQ_ERROR = 12, 3944 WL_REINIT_RC_PHYTXERR_THRESH = 13, 3945 WL_REINIT_RC_USER_FORCED = 14, 3946 WL_REINIT_RC_FULL_RESET = 15, 3947 WL_REINIT_RC_AP_BEACON = 16, 3948 WL_REINIT_RC_PM_EXCESSED = 17, 3949 WL_REINIT_RC_NO_CLK = 18, 3950 WL_REINIT_RC_SW_ASSERT = 19, 3951 WL_REINIT_RC_PSM_JMP0 = 20, 3952 WL_REINIT_RC_PSM_RUN = 21, 3953 WL_REINIT_RC_ENABLE_MAC = 22, 3954 WL_REINIT_RC_SCAN_TIMEOUT = 23, 3955 WL_REINIT_RC_JOIN_TIMEOUT = 24, 3956 /* Below error codes are generated during D3 exit validation */ 3957 WL_REINIT_RC_LINK_NOT_ACTIVE = 25, 3958 WL_REINIT_RC_PCI_CFG_RD_FAIL = 26, 3959 WL_REINIT_RC_INV_VEN_ID = 27, 3960 WL_REINIT_RC_INV_DEV_ID = 28, 3961 WL_REINIT_RC_INV_BAR0 = 29, 3962 WL_REINIT_RC_INV_BAR2 = 30, 3963 WL_REINIT_RC_AER_UC_FATAL = 31, 3964 WL_REINIT_RC_AER_UC_NON_FATAL = 32, 3965 WL_REINIT_RC_AER_CORR = 33, 3966 WL_REINIT_RC_AER_DEV_STS = 34, 3967 WL_REINIT_RC_PCIe_STS = 35, 3968 WL_REINIT_RC_MMIO_RD_FAIL = 36, 3969 WL_REINIT_RC_MMIO_RD_INVAL = 37, 3970 WL_REINIT_RC_MMIO_ARM_MEM_RD_FAIL = 38, 3971 WL_REINIT_RC_MMIO_ARM_MEM_INVAL = 39, 3972 WL_REINIT_RC_SROM_LOAD_FAILED = 40, 3973 WL_REINIT_RC_PHY_CRASH = 41, 3974 WL_REINIT_TX_STALL = 42, 3975 WL_REINIT_RC_TX_FLOW_CONTROL_BLOCKED = 43, 3976 WL_REINIT_RC_RX_HC_FAIL = 44, 3977 WL_REINIT_RC_RX_DMA_STALL = 45, 3978 WL_REINIT_UTRACE_BUF_OVERLAP_SR = 46, 3979 WL_REINIT_UTRACE_TPL_OUT_BOUNDS = 47, 3980 WL_REINIT_UTRACE_TPL_OSET_STRT0 = 48, 3981 WL_REINIT_RC_PHYTXERR = 49, 3982 WL_REINIT_RC_PSM_FATAL_SUSP = 50, 3983 WL_REINIT_RC_TX_FIFO_SUSP = 51, 3984 WL_REINIT_RC_MAC_ENABLE = 52, 3985 WL_REINIT_RC_SCAN_STALLED = 53, 3986 WL_REINIT_RC_PHY_HC = 54, 3987 WL_REINIT_RC_LAST, /* DONOT use this any more, kept for legacy reasons */ 3988 WL_REINIT_RC_RADIO_CRASH = 55, 3989 WL_REINIT_RC_SUPPORTED_LAST /* Use for app ONLY, DONOT use this in wlc code. 3990 * For wlc, use WL_REINIT_RC_VERSIONED_LAST 3991 */ 3992 }; 3993 3994 #define WL_REINIT_RC_V2 (2u) 3995 #define WL_REINIT_RC_LAST_V2 (WL_REINIT_RC_RADIO_CRASH) 3996 3997 #define WL_REINIT_RC_INVALID 255 3998 3999 #define NREINITREASONCOUNT 8 4000 /* NREINITREASONCOUNT is 8 in other branches. 4001 * Any change to this will break wl tool compatibility with other branches 4002 * #define NREINITREASONCOUNT WL_REINIT_RC_LAST 4003 */ 4004 /* REINITRSNIDX is kept for legacy reasons. Use REINIT_RSN_IDX for new versioned structure */ 4005 #define REINITRSNIDX(_x) (((_x) < WL_REINIT_RC_LAST) ? (_x) : 0) 4006 #define REINIT_RSN_IDX(_x) (((_x) < WL_REINIT_RC_SUPPORTED_LAST) ? (_x) : 0) /* TBD: move 4007 * this to src 4008 */ 4009 #define REINIT_RSN_IDX_V2(_x) (((_x) <= WL_REINIT_RC_LAST_V2) ? (_x) : 0) 4010 4011 #define WL_CNT_T_VERSION 30 /**< current version of wl_cnt_t struct */ 4012 #define WL_CNT_VERSION_6 6 4013 #define WL_CNT_VERSION_7 7 4014 #define WL_CNT_VERSION_11 11 4015 #define WL_CNT_VERSION_XTLV 30 4016 4017 #define WL_COUNTERS_IOV_VERSION_1 1 4018 #define WL_SUBCNTR_IOV_VER WL_COUNTERS_IOV_VERSION_1 4019 /* First two uint16 are version and lenght fields. So offset of the first counter will be 4 */ 4020 #define FIRST_COUNTER_OFFSET 0x04 4021 4022 /* need for now due to src/wl/ndis automerged to other branches. e.g. BISON */ 4023 #define WLC_WITH_XTLV_CNT 4024 4025 /* Number of xtlv info as required to calculate subcounter offsets */ 4026 #define WL_CNT_XTLV_ID_NUM 12 4027 #define WL_TLV_IOV_VER 1 4028 4029 /** 4030 * tlv IDs uniquely identifies counter component 4031 * packed into wl_cmd_t container 4032 */ 4033 enum wl_cnt_xtlv_id { 4034 WL_CNT_XTLV_SLICE_IDX = 0x1, /**< Slice index */ 4035 WL_CNT_XTLV_WLC = 0x100, /**< WLC layer counters */ 4036 WL_CNT_XTLV_WLC_RINIT_RSN = 0x101, /**< WLC layer reinitreason extension: LEGACY */ 4037 WL_CNT_XTLV_WLC_HE = 0x102, /* he counters */ 4038 WL_CNT_XTLV_WLC_SECVLN = 0x103, /* security vulnerabilities counters */ 4039 WL_CNT_XTLV_WLC_HE_OMI = 0x104, /* he omi counters */ 4040 WL_CNT_XTLV_WLC_RINIT_RSN_V2 = 0x105, /**< WLC layer reinitreason extension */ 4041 WL_CNT_XTLV_CNTV_LE10_UCODE = 0x200, /**< wl counter ver < 11 UCODE MACSTAT */ 4042 WL_CNT_XTLV_LT40_UCODE_V1 = 0x300, /**< corerev < 40 UCODE MACSTAT */ 4043 WL_CNT_XTLV_GE40_UCODE_V1 = 0x400, /**< corerev >= 40 UCODE MACSTAT */ 4044 WL_CNT_XTLV_GE64_UCODEX_V1 = 0x800, /* corerev >= 64 UCODEX MACSTAT */ 4045 WL_CNT_XTLV_GE80_UCODE_V1 = 0x900, /* corerev >= 80 UCODEX MACSTAT */ 4046 WL_CNT_XTLV_GE80_TXFUNFL_UCODE_V1 = 0x1000 /* corerev >= 80 UCODEX MACSTAT */ 4047 }; 4048 4049 /* tlv IDs uniquely identifies periodic state component */ 4050 enum wl_periodic_slice_state_xtlv_id { 4051 WL_STATE_COMPACT_COUNTERS = 0x1, 4052 WL_STATE_TXBF_COUNTERS = 0x2, 4053 WL_STATE_COMPACT_HE_COUNTERS = 0x3 4054 }; 4055 4056 /* Sub tlvs for chan_counters */ 4057 enum wl_periodic_chan_xtlv_id { 4058 WL_CHAN_GENERIC_COUNTERS = 0x1, 4059 WL_CHAN_PERIODIC_COUNTERS = 0x2 4060 }; 4061 4062 #ifdef WLC_CHAN_ECNTR_TEST 4063 #define WL_CHAN_PERIODIC_CNTRS_VER_1 1 4064 typedef struct wlc_chan_periodic_cntr 4065 { 4066 uint16 version; 4067 uint16 pad; 4068 uint32 rxstrt; 4069 } wlc_chan_periodic_cntr_t; 4070 #endif /* WLC_CHAN_ECNTR_TEST */ 4071 4072 #define WL_CHANCNTR_HDR_VER_1 1 4073 typedef struct wlc_chan_cntr_hdr_v1 4074 { 4075 uint16 version; 4076 uint16 pad; 4077 chanspec_t chanspec; /* Dont add any fields above this */ 4078 uint16 pad1; 4079 uint32 total_time; 4080 uint32 chan_entry_cnt; 4081 } wlc_chan_cntr_hdr_v1_t; 4082 4083 /* tlv IDs uniquely identifies periodic state component */ 4084 enum wl_periodic_if_state_xtlv_id { 4085 WL_STATE_IF_COMPACT_STATE = 0x1, 4086 WL_STATE_IF_ADPS_STATE = 0x02, 4087 WL_STATE_IF_ADPS_ENERGY_GAIN = 0x03 4088 }; 4089 4090 enum wl_periodic_tdls_if_state_xtlv_id { 4091 WL_STATE_IF_TDLS_STATE = 0x1 4092 }; 4093 4094 #define TDMTX_CNT_VERSION_V1 1 4095 #define TDMTX_CNT_VERSION_V2 2 4096 4097 /* structure holding tdm counters that interface to iovar */ 4098 typedef struct tdmtx_cnt_v1 { 4099 uint16 ver; 4100 uint16 length; /* length of this structure */ 4101 uint16 wlc_idx; /* index for wlc */ 4102 uint16 enabled; /* tdmtx is enabled on slice */ 4103 uint32 tdmtx_txa_on; /* TXA on requests */ 4104 uint32 tdmtx_txa_tmcnt; /* Total number of TXA timeout */ 4105 uint32 tdmtx_por_on; /* TXA POR requests */ 4106 uint32 tdmtx_txpuen; /* Path enable requests */ 4107 uint32 tdmtx_txpudis; /* Total number of times Tx path is muted on the slice */ 4108 uint32 tdmtx_txpri_on; /* Total number of times Tx priority was obtained by the slice */ 4109 uint32 tdmtx_txdefer; /* Total number of times Tx was deferred on the slice */ 4110 uint32 tdmtx_txmute; /* Total number of times active Tx muted on the slice */ 4111 uint32 tdmtx_actpwrboff; /* Total number of times TX power is backed off by the slice */ 4112 uint32 tdmtx_txa_dur; /* Total time txa on */ 4113 uint32 tdmtx_txpri_dur; /* Total time TXPri */ 4114 uint32 tdmtx_txdefer_dur; /* Total time txdefer */ 4115 /* TDMTX input fields */ 4116 uint32 tdmtx_txpri; 4117 uint32 tdmtx_defer; 4118 uint32 tdmtx_threshold; 4119 uint32 tdmtx_rssi_threshold; 4120 uint32 tdmtx_txpwrboff; 4121 uint32 tdmtx_txpwrboff_dt; 4122 } tdmtx_cnt_v1_t; 4123 4124 typedef struct { 4125 uint16 ver; 4126 uint16 length; /* length of the data portion */ 4127 uint16 cnt; 4128 uint16 pad; /* pad to align to 32 bit */ 4129 uint8 data[]; /* array of tdmtx_cnt_v1_t */ 4130 } tdmtx_status_t; 4131 4132 /* structure holding counters that match exactly shm field sizes */ 4133 typedef struct tdmtx_cnt_shm_v1 { 4134 uint16 tdmtx_txa_on; /* TXA on requests */ 4135 uint16 tdmtx_tmcnt; /* TXA on requests */ 4136 uint16 tdmtx_por_on; /* TXA POR requests */ 4137 uint16 tdmtx_txpuen; /* Path enable requests */ 4138 uint16 tdmtx_txpudis; /* Total number of times Tx path is muted on the slice */ 4139 uint16 tdmtx_txpri_on; /* Total number of times Tx priority was obtained by the slice */ 4140 uint16 tdmtx_txdefer; /* Total number of times Tx was defered by the slice */ 4141 uint16 tdmtx_txmute; /* Total number of times active Tx muted on the slice */ 4142 uint16 tdmtx_actpwrboff; /* Total number of times TX power is backed off by the slice */ 4143 uint16 tdmtx_txa_dur_l; /* Total time (low 16 bits) txa on */ 4144 uint16 tdmtx_txa_dur_h; /* Total time (low 16 bits) txa on */ 4145 uint16 tdmtx_txpri_dur_l; /* Total time (low 16 bits) TXPri */ 4146 uint16 tdmtx_txpri_dur_h; /* Total time (high 16 bits) TXPri */ 4147 uint16 tdmtx_txdefer_dur_l; /* Total time (low 16 bits) txdefer */ 4148 uint16 tdmtx_txdefer_dur_h; /* Total time (high 16 bits) txdefer */ 4149 } tdmtx_cnt_shm_v1_t; 4150 4151 /* structure holding tdm counters that interface to iovar for version 2 */ 4152 typedef struct tdmtx_cnt_v2 { 4153 uint16 ver; 4154 uint16 length; /* length of this structure */ 4155 uint16 wlc_idx; /* index for wlc */ 4156 uint16 enabled; /* tdmtx is enabled on slice */ 4157 uint32 tdmtx_txa_on; /* TXA on requests */ 4158 uint32 tdmtx_txa_tmcnt; /* Total number of TXA timeout */ 4159 uint32 tdmtx_porhi_on; /* TXA PORHI requests */ 4160 uint32 tdmtx_porlo_on; /* TXA PORLO requests */ 4161 uint32 tdmtx_txpuen; /* Path enable requests */ 4162 uint32 tdmtx_txpudis; /* Total number of times Tx path is muted on the slice */ 4163 uint32 tdmtx_txpri_on; /* Total number of times Tx priority was obtained by the slice */ 4164 uint32 tdmtx_txdefer; /* Total number of times Tx was deferred on the slice */ 4165 uint32 tdmtx_txmute; /* Total number of times active Tx muted on the slice */ 4166 uint32 tdmtx_actpwrboff; /* Total number of times TX power is backed off by the slice */ 4167 uint32 tdmtx_txa_dur; /* Total time txa on */ 4168 uint32 tdmtx_txpri_dur; /* Total time TXPri */ 4169 uint32 tdmtx_txdefer_dur; /* Total time txdefer */ 4170 /* TDMTX input fields */ 4171 uint32 tdmtx_txpri; 4172 uint32 tdmtx_defer; 4173 uint32 tdmtx_threshold; 4174 uint32 tdmtx_rssi_threshold; 4175 uint32 tdmtx_txpwrboff; 4176 uint32 tdmtx_txpwrboff_dt; 4177 } tdmtx_cnt_v2_t; 4178 4179 /* structure holding counters that match exactly shm field sizes */ 4180 typedef struct tdmtx_cnt_shm_v2 { 4181 uint16 tdmtx_txa_on; /* TXA on requests */ 4182 uint16 tdmtx_tmcnt; /* TXA on requests */ 4183 uint16 tdmtx_porhi_on; /* TXA PORHI requests */ 4184 uint16 tdmtx_porlo_on; /* TXA PORLO requests */ 4185 uint16 tdmtx_txpuen; /* Path enable requests */ 4186 uint16 tdmtx_txpudis; /* Total number of times Tx path is muted on the slice */ 4187 uint16 tdmtx_txpri_on; /* Total number of times Tx priority was obtained by the slice */ 4188 uint16 tdmtx_txdefer; /* Total number of times Tx was defered by the slice */ 4189 uint16 tdmtx_txmute; /* Total number of times active Tx muted on the slice */ 4190 uint16 tdmtx_actpwrboff; /* Total number of times TX power is backed off by the slice */ 4191 uint16 tdmtx_txa_dur_l; /* Total time (low 16 bits) txa on */ 4192 uint16 tdmtx_txa_dur_h; /* Total time (low 16 bits) txa on */ 4193 uint16 tdmtx_txpri_dur_l; /* Total time (low 16 bits) TXPri */ 4194 uint16 tdmtx_txpri_dur_h; /* Total time (high 16 bits) TXPri */ 4195 uint16 tdmtx_txdefer_dur_l; /* Total time (low 16 bits) txdefer */ 4196 uint16 tdmtx_txdefer_dur_h; /* Total time (high 16 bits) txdefer */ 4197 } tdmtx_cnt_shm_v2_t; 4198 4199 typedef struct wl_tdmtx_ioc { 4200 uint16 id; /* ID of the sub-command */ 4201 uint16 len; /* total length of all data[] */ 4202 uint8 data[]; /* var len payload */ 4203 } wl_tdmtx_ioc_t; 4204 4205 /* 4206 * iovar subcommand ids 4207 */ 4208 enum { 4209 IOV_TDMTX_ENB = 1, 4210 IOV_TDMTX_STATUS = 2, 4211 IOV_TDMTX_TXPRI = 3, 4212 IOV_TDMTX_DEFER = 4, 4213 IOV_TDMTX_TXA = 5, 4214 IOV_TDMTX_CFG = 6, 4215 IOV_TDMTX_LAST 4216 }; 4217 4218 /* iovar structure for beacon simulator */ 4219 typedef struct wl_bcnsim_ioc { 4220 uint16 id; /* ID of the sub-command */ 4221 uint16 len; /* total length of all data[] */ 4222 uint8 data[]; /* var len payload */ 4223 } wl_bcnsim_ioc_t; 4224 4225 /* iovar subcmd ids */ 4226 enum { 4227 IOV_BCNSIM_ENB = 1, 4228 IOV_BCNSIM_ERRMAX = 2, 4229 IOV_BCNSIM_ERRDSTRB = 3, 4230 IOV_BCNSIM_DRIFT = 4, 4231 IOV_BCNSIM_RNDLYMAX = 5, 4232 IOV_BCNSIM_RNDDLY_DSTRB = 6, 4233 IOV_BCNSIM_CONSDLY = 7, 4234 IOV_BCNSIM_OMT_PROB = 8, 4235 IOV_BCNSIM_OMT_MIN_N = 9, 4236 IOV_BCNSIM_OMT_MAX_N = 10, 4237 IOV_BCNSIM_OMT_DSTRB = 11, 4238 IOV_BCNSIM_TSF_JUMP = 12, 4239 IOV_BCNSIM_PATTERN = 13, 4240 IOV_BCNSIM_STATUS = 14, 4241 IOV_BCNSIM_AUTH = 15, 4242 IOV_BCNSIM_RNDDLY_PROB = 16, 4243 IOV_BCNSIM_LAST 4244 }; 4245 4246 /* tlv id for beacon simulator */ 4247 enum wl_bcnsim_xtlv_id { 4248 WL_BCNSIM_XTLV_ENABLE = 0x1, 4249 WL_BCNSIM_XTLV_ERRMAX = 0x2, 4250 WL_BCNSIM_XTLV_ERRDSTRB = 0x3, 4251 WL_BCNSIM_XTLV_DRIFT = 0x4, 4252 WL_BCNSIM_XTLV_RNDLYMAX = 0x5, 4253 WL_BCNSIM_XTLV_RNDDLY_DSTRB = 0x6, 4254 WL_BCNSIM_XTLV_CONSDLY = 0x7, 4255 WL_BCNSIM_XTLV_OMT_PROB = 0x8, 4256 WL_BCNSIM_XTLV_OMT_MIN_N = 0x9, 4257 WL_BCNSIM_XTLV_OMT_MAX_N = 0xa, 4258 WL_BCNSIM_XTLV_OMT_DSTRB = 0xb, 4259 WL_BCNSIM_XTLV_TSF_JUMP = 0xc, 4260 WL_BCNSIM_XTLV_PATTERN = 0xd, 4261 WL_BCNSIM_XTLV_STATUS = 0xe, 4262 WL_BCNSIM_XTLV_AUTH = 0xf, 4263 WL_BCNSIM_XTLV_RNDDLY_PROB = 0x10 4264 }; 4265 4266 /* structure to store different pattern params */ 4267 typedef struct wlc_bcnsim_bcn_diff_v1 { 4268 uint16 version; 4269 uint16 dtim_cnt; 4270 uint32 tx_delta; 4271 uint32 ts_delta; 4272 } wlc_bcnsim_bcn_diff_v1_t; 4273 4274 /* structure to store/pass pattern */ 4275 typedef struct wlc_bcnsim_pattern_info_v1 { 4276 uint16 version; 4277 uint16 pattern_count; 4278 uint16 current_pos; 4279 wlc_bcnsim_bcn_diff_v1_t bcnsim_bcn_diff[]; 4280 } wlc_bcnsim_pattern_info_v1_t; 4281 4282 /* struct to store bcn sim status */ 4283 typedef struct bcnsim_status_v1 { 4284 uint16 ver; 4285 uint16 length; /* length of this structure */ 4286 uint32 rnd_delay_max; /* random delay */ 4287 int32 const_delay; /* cons delay */ 4288 int32 tsf_jump; /* change tsf */ 4289 int16 drift; /* add drift */ 4290 uint16 error_max; /* max error */ 4291 uint8 error_dstrb; /* error dstrb */ 4292 uint8 rnd_delay_dstrb; /* rnd delay distr */ 4293 uint8 rnd_delay_prob; /* random delay prob */ 4294 uint8 omit_prob; /* control omit prob */ 4295 uint8 omit_min_n; /* min omit */ 4296 uint8 omit_max_n; /* max omit */ 4297 uint8 omit_dstrb; /* omit dstrb % */ 4298 uint8 padding1; 4299 } bcnsim_status_v1_t; 4300 4301 /** 4302 * The number of variables in wl macstat cnt struct. 4303 * (wl_cnt_ge40mcst_v1_t, wl_cnt_lt40mcst_v1_t, wl_cnt_v_le10_mcst_t) 4304 */ 4305 #define WL_CNT_MCST_VAR_NUM 64 4306 /* sizeof(wl_cnt_ge40mcst_v1_t), sizeof(wl_cnt_lt40mcst_v1_t), and sizeof(wl_cnt_v_le10_mcst_t) */ 4307 #define WL_CNT_MCST_STRUCT_SZ ((uint32)sizeof(uint32) * WL_CNT_MCST_VAR_NUM) 4308 #define WL_CNT_REV80_MCST_STRUCT_SZ ((uint32)sizeof(wl_cnt_ge80mcst_v1_t)) 4309 #define WL_CNT_REV80_MCST_TXFUNFlW_STRUCT_FIXED_SZ \ 4310 ((uint32)OFFSETOF(wl_cnt_ge80_txfunfl_v1_t, txfunfl)) 4311 #define WL_CNT_REV80_MCST_TXFUNFl_STRUCT_SZ(fcnt) \ 4312 (WL_CNT_REV80_MCST_TXFUNFlW_STRUCT_FIXED_SZ + (fcnt * sizeof(uint32))) 4313 #define WL_CNT_REV80_MCST_TXFUNFlW_STRUCT_SZ (WL_CNT_REV80_MCST_TXFUNFl_STRUCT_SZ(NFIFO_EXT)) 4314 4315 #define WL_CNT_MCXST_STRUCT_SZ ((uint32)sizeof(wl_cnt_ge64mcxst_v1_t)) 4316 4317 #define WL_CNT_HE_STRUCT_SZ ((uint32)sizeof(wl_he_cnt_wlc_t)) 4318 4319 #define WL_CNT_SECVLN_STRUCT_SZ ((uint32)sizeof(wl_secvln_cnt_t)) 4320 4321 #define WL_CNT_HE_OMI_STRUCT_SZ ((uint32)sizeof(wl_he_omi_cnt_wlc_v1_t)) 4322 #define INVALID_CNT_VAL (uint32)(-1) 4323 4324 #define WL_XTLV_CNTBUF_MAX_SIZE ((uint32)(OFFSETOF(wl_cnt_info_t, data)) + \ 4325 (uint32)BCM_XTLV_HDR_SIZE + (uint32)sizeof(wl_cnt_wlc_t) + \ 4326 (uint32)BCM_XTLV_HDR_SIZE + WL_CNT_MCST_STRUCT_SZ + \ 4327 (uint32)BCM_XTLV_HDR_SIZE + WL_CNT_MCXST_STRUCT_SZ) 4328 4329 #define WL_CNTBUF_MAX_SIZE MAX(WL_XTLV_CNTBUF_MAX_SIZE, (uint32)sizeof(wl_cnt_ver_11_t)) 4330 4331 /** Top structure of counters IOVar buffer */ 4332 typedef struct { 4333 uint16 version; /**< see definition of WL_CNT_T_VERSION */ 4334 uint16 datalen; /**< length of data including all paddings. */ 4335 uint8 data []; /**< variable length payload: 4336 * 1 or more bcm_xtlv_t type of tuples. 4337 * each tuple is padded to multiple of 4 bytes. 4338 * 'datalen' field of this structure includes all paddings. 4339 */ 4340 } wl_cnt_info_t; 4341 4342 /* Top structure of subcounters IOVar buffer 4343 * Whenever we make any change in this structure 4344 * WL_SUBCNTR_IOV_VER should be updated accordingly 4345 * The structure definition should remain consistant b/w 4346 * FW and wl/WLM app. 4347 */ 4348 typedef struct { 4349 uint16 version; /* Version of IOVAR structure. Used for backward 4350 * compatibility in future. Whenever we make any 4351 * changes to this structure then value of WL_SUBCNTR_IOV_VER 4352 * needs to be updated properly. 4353 */ 4354 uint16 length; /* length in bytes of this structure */ 4355 uint16 counters_version; /* see definition of WL_CNT_T_VERSION 4356 * wl app will send the version of counters 4357 * which is used to calculate the offset of counters. 4358 * It must match the version of counters FW is using 4359 * else FW will return error with his version of counters 4360 * set in this field. 4361 */ 4362 uint16 num_subcounters; /* Number of counter offset passed by wl app to FW. */ 4363 uint32 data[1]; /* variable length payload: 4364 * Offsets to the counters will be passed to FW 4365 * throught this data field. FW will return the value of counters 4366 * at the offsets passed by wl app in this fiels itself. 4367 */ 4368 } wl_subcnt_info_t; 4369 4370 /* Top structure of counters TLV version IOVar buffer 4371 * The structure definition should remain consistant b/w 4372 * FW and wl/WLM app. 4373 */ 4374 typedef struct { 4375 uint16 version; /* Version of IOVAR structure. Added for backward 4376 * compatibility feature. If any changes are done, 4377 * WL_TLV_IOV_VER need to be updated. 4378 */ 4379 uint16 length; /* total len in bytes of this structure + payload */ 4380 uint16 counters_version; /* See definition of WL_CNT_VERSION_XTLV 4381 * wl app will update counter tlv version to be used 4382 * so to calculate offset of supported TLVs. 4383 * If there is a mismatch in the version, FW will update an error 4384 */ 4385 uint16 num_tlv; /* Max number of TLV info passed by FW to WL app. 4386 * and vice-versa 4387 */ 4388 uint32 data[]; /* variable length payload: 4389 * This stores the tlv as supported by F/W to the wl app. 4390 * This table is required to compute subcounter offsets at WLapp end. 4391 */ 4392 } wl_cntr_tlv_info_t; 4393 4394 /** wlc layer counters */ 4395 typedef struct { 4396 /* transmit stat counters */ 4397 uint32 txframe; /**< tx data frames */ 4398 uint32 txbyte; /**< tx data bytes */ 4399 uint32 txretrans; /**< tx mac retransmits */ 4400 uint32 txerror; /**< tx data errors (derived: sum of others) */ 4401 uint32 txctl; /**< tx management frames */ 4402 uint32 txprshort; /**< tx short preamble frames */ 4403 uint32 txserr; /**< tx status errors */ 4404 uint32 txnobuf; /**< tx out of buffers errors */ 4405 uint32 txnoassoc; /**< tx discard because we're not associated */ 4406 uint32 txrunt; /**< tx runt frames */ 4407 uint32 txchit; /**< tx header cache hit (fastpath) */ 4408 uint32 txcmiss; /**< tx header cache miss (slowpath) */ 4409 4410 /* transmit chip error counters */ 4411 uint32 txuflo; /**< tx fifo underflows */ 4412 uint32 txphyerr; /**< tx phy errors (indicated in tx status) */ 4413 uint32 txphycrs; /**< PR8861/8963 counter */ 4414 4415 /* receive stat counters */ 4416 uint32 rxframe; /**< rx data frames */ 4417 uint32 rxbyte; /**< rx data bytes */ 4418 uint32 rxerror; /**< rx data errors (derived: sum of others) */ 4419 uint32 rxctl; /**< rx management frames */ 4420 uint32 rxnobuf; /**< rx out of buffers errors */ 4421 uint32 rxnondata; /**< rx non data frames in the data channel errors */ 4422 uint32 rxbadds; /**< rx bad DS errors */ 4423 uint32 rxbadcm; /**< rx bad control or management frames */ 4424 uint32 rxfragerr; /**< rx fragmentation errors */ 4425 uint32 rxrunt; /**< rx runt frames */ 4426 uint32 rxgiant; /**< rx giant frames */ 4427 uint32 rxnoscb; /**< rx no scb error */ 4428 uint32 rxbadproto; /**< rx invalid frames */ 4429 uint32 rxbadsrcmac; /**< rx frames with Invalid Src Mac */ 4430 uint32 rxbadda; /**< rx frames tossed for invalid da */ 4431 uint32 rxfilter; /**< rx frames filtered out */ 4432 4433 /* receive chip error counters */ 4434 uint32 rxoflo; /**< rx fifo overflow errors */ 4435 uint32 rxuflo[NFIFO]; /**< rx dma descriptor underflow errors */ 4436 4437 uint32 d11cnt_txrts_off; /**< d11cnt txrts value when reset d11cnt */ 4438 uint32 d11cnt_rxcrc_off; /**< d11cnt rxcrc value when reset d11cnt */ 4439 uint32 d11cnt_txnocts_off; /**< d11cnt txnocts value when reset d11cnt */ 4440 4441 /* misc counters */ 4442 uint32 dmade; /**< tx/rx dma descriptor errors */ 4443 uint32 dmada; /**< tx/rx dma data errors */ 4444 uint32 dmape; /**< tx/rx dma descriptor protocol errors */ 4445 uint32 reset; /**< reset count */ 4446 uint32 tbtt; /**< cnts the TBTT int's */ 4447 uint32 txdmawar; /**< # occurrences of PR15420 workaround */ 4448 uint32 pkt_callback_reg_fail; /**< callbacks register failure */ 4449 4450 /* 802.11 MIB counters, pp. 614 of 802.11 reaff doc. */ 4451 uint32 txfrag; /**< dot11TransmittedFragmentCount */ 4452 uint32 txmulti; /**< dot11MulticastTransmittedFrameCount */ 4453 uint32 txfail; /**< dot11FailedCount */ 4454 uint32 txretry; /**< dot11RetryCount */ 4455 uint32 txretrie; /**< dot11MultipleRetryCount */ 4456 uint32 rxdup; /**< dot11FrameduplicateCount */ 4457 uint32 txrts; /**< dot11RTSSuccessCount */ 4458 uint32 txnocts; /**< dot11RTSFailureCount */ 4459 uint32 txnoack; /**< dot11ACKFailureCount */ 4460 uint32 rxfrag; /**< dot11ReceivedFragmentCount */ 4461 uint32 rxmulti; /**< dot11MulticastReceivedFrameCount */ 4462 uint32 rxcrc; /**< dot11FCSErrorCount */ 4463 uint32 txfrmsnt; /**< dot11TransmittedFrameCount (bogus MIB?) */ 4464 uint32 rxundec; /**< dot11WEPUndecryptableCount */ 4465 4466 /* WPA2 counters (see rxundec for DecryptFailureCount) */ 4467 uint32 tkipmicfaill; /**< TKIPLocalMICFailures */ 4468 uint32 tkipcntrmsr; /**< TKIPCounterMeasuresInvoked */ 4469 uint32 tkipreplay; /**< TKIPReplays */ 4470 uint32 ccmpfmterr; /**< CCMPFormatErrors */ 4471 uint32 ccmpreplay; /**< CCMPReplays */ 4472 uint32 ccmpundec; /**< CCMPDecryptErrors */ 4473 uint32 fourwayfail; /**< FourWayHandshakeFailures */ 4474 uint32 wepundec; /**< dot11WEPUndecryptableCount */ 4475 uint32 wepicverr; /**< dot11WEPICVErrorCount */ 4476 uint32 decsuccess; /**< DecryptSuccessCount */ 4477 uint32 tkipicverr; /**< TKIPICVErrorCount */ 4478 uint32 wepexcluded; /**< dot11WEPExcludedCount */ 4479 4480 uint32 txchanrej; /**< Tx frames suppressed due to channel rejection */ 4481 uint32 psmwds; /**< Count PSM watchdogs */ 4482 uint32 phywatchdog; /**< Count Phy watchdogs (triggered by ucode) */ 4483 4484 /* MBSS counters, AP only */ 4485 uint32 prq_entries_handled; /**< PRQ entries read in */ 4486 uint32 prq_undirected_entries; /**< which were bcast bss & ssid */ 4487 uint32 prq_bad_entries; /**< which could not be translated to info */ 4488 uint32 atim_suppress_count; /**< TX suppressions on ATIM fifo */ 4489 uint32 bcn_template_not_ready; /**< Template marked in use on send bcn ... */ 4490 uint32 bcn_template_not_ready_done; /**< ...but "DMA done" interrupt rcvd */ 4491 uint32 late_tbtt_dpc; /**< TBTT DPC did not happen in time */ 4492 4493 /* per-rate receive stat counters */ 4494 uint32 rx1mbps; /**< packets rx at 1Mbps */ 4495 uint32 rx2mbps; /**< packets rx at 2Mbps */ 4496 uint32 rx5mbps5; /**< packets rx at 5.5Mbps */ 4497 uint32 rx6mbps; /**< packets rx at 6Mbps */ 4498 uint32 rx9mbps; /**< packets rx at 9Mbps */ 4499 uint32 rx11mbps; /**< packets rx at 11Mbps */ 4500 uint32 rx12mbps; /**< packets rx at 12Mbps */ 4501 uint32 rx18mbps; /**< packets rx at 18Mbps */ 4502 uint32 rx24mbps; /**< packets rx at 24Mbps */ 4503 uint32 rx36mbps; /**< packets rx at 36Mbps */ 4504 uint32 rx48mbps; /**< packets rx at 48Mbps */ 4505 uint32 rx54mbps; /**< packets rx at 54Mbps */ 4506 uint32 rx108mbps; /**< packets rx at 108mbps */ 4507 uint32 rx162mbps; /**< packets rx at 162mbps */ 4508 uint32 rx216mbps; /**< packets rx at 216 mbps */ 4509 uint32 rx270mbps; /**< packets rx at 270 mbps */ 4510 uint32 rx324mbps; /**< packets rx at 324 mbps */ 4511 uint32 rx378mbps; /**< packets rx at 378 mbps */ 4512 uint32 rx432mbps; /**< packets rx at 432 mbps */ 4513 uint32 rx486mbps; /**< packets rx at 486 mbps */ 4514 uint32 rx540mbps; /**< packets rx at 540 mbps */ 4515 4516 uint32 rfdisable; /**< count of radio disables */ 4517 4518 uint32 txexptime; /**< Tx frames suppressed due to timer expiration */ 4519 4520 uint32 txmpdu_sgi; /**< count for sgi transmit */ 4521 uint32 rxmpdu_sgi; /**< count for sgi received */ 4522 uint32 txmpdu_stbc; /**< count for stbc transmit */ 4523 uint32 rxmpdu_stbc; /**< count for stbc received */ 4524 4525 uint32 rxundec_mcst; /**< dot11WEPUndecryptableCount */ 4526 4527 /* WPA2 counters (see rxundec for DecryptFailureCount) */ 4528 uint32 tkipmicfaill_mcst; /**< TKIPLocalMICFailures */ 4529 uint32 tkipcntrmsr_mcst; /**< TKIPCounterMeasuresInvoked */ 4530 uint32 tkipreplay_mcst; /**< TKIPReplays */ 4531 uint32 ccmpfmterr_mcst; /**< CCMPFormatErrors */ 4532 uint32 ccmpreplay_mcst; /**< CCMPReplays */ 4533 uint32 ccmpundec_mcst; /**< CCMPDecryptErrors */ 4534 uint32 fourwayfail_mcst; /**< FourWayHandshakeFailures */ 4535 uint32 wepundec_mcst; /**< dot11WEPUndecryptableCount */ 4536 uint32 wepicverr_mcst; /**< dot11WEPICVErrorCount */ 4537 uint32 decsuccess_mcst; /**< DecryptSuccessCount */ 4538 uint32 tkipicverr_mcst; /**< TKIPICVErrorCount */ 4539 uint32 wepexcluded_mcst; /**< dot11WEPExcludedCount */ 4540 4541 uint32 dma_hang; /**< count for dma hang */ 4542 uint32 reinit; /**< count for reinit */ 4543 4544 uint32 pstatxucast; /**< count of ucast frames xmitted on all psta assoc */ 4545 uint32 pstatxnoassoc; /**< count of txnoassoc frames xmitted on all psta assoc */ 4546 uint32 pstarxucast; /**< count of ucast frames received on all psta assoc */ 4547 uint32 pstarxbcmc; /**< count of bcmc frames received on all psta */ 4548 uint32 pstatxbcmc; /**< count of bcmc frames transmitted on all psta */ 4549 4550 uint32 cso_passthrough; /**< hw cso required but passthrough */ 4551 uint32 cso_normal; /**< hw cso hdr for normal process */ 4552 uint32 chained; /**< number of frames chained */ 4553 uint32 chainedsz1; /**< number of chain size 1 frames */ 4554 uint32 unchained; /**< number of frames not chained */ 4555 uint32 maxchainsz; /**< max chain size so far */ 4556 uint32 currchainsz; /**< current chain size */ 4557 uint32 pciereset; /**< Secondary Bus Reset issued by driver */ 4558 uint32 cfgrestore; /**< configspace restore by driver */ 4559 uint32 reinitreason[NREINITREASONCOUNT]; /**< reinitreason counters; 0: Unknown reason */ 4560 uint32 rxrtry; 4561 uint32 rxmpdu_mu; /**< Number of MU MPDUs received */ 4562 4563 /* detailed control/management frames */ 4564 uint32 txbar; /**< Number of TX BAR */ 4565 uint32 rxbar; /**< Number of RX BAR */ 4566 uint32 txpspoll; /**< Number of TX PS-poll */ 4567 uint32 rxpspoll; /**< Number of RX PS-poll */ 4568 uint32 txnull; /**< Number of TX NULL_DATA */ 4569 uint32 rxnull; /**< Number of RX NULL_DATA */ 4570 uint32 txqosnull; /**< Number of TX NULL_QoSDATA */ 4571 uint32 rxqosnull; /**< Number of RX NULL_QoSDATA */ 4572 uint32 txassocreq; /**< Number of TX ASSOC request */ 4573 uint32 rxassocreq; /**< Number of RX ASSOC request */ 4574 uint32 txreassocreq; /**< Number of TX REASSOC request */ 4575 uint32 rxreassocreq; /**< Number of RX REASSOC request */ 4576 uint32 txdisassoc; /**< Number of TX DISASSOC */ 4577 uint32 rxdisassoc; /**< Number of RX DISASSOC */ 4578 uint32 txassocrsp; /**< Number of TX ASSOC response */ 4579 uint32 rxassocrsp; /**< Number of RX ASSOC response */ 4580 uint32 txreassocrsp; /**< Number of TX REASSOC response */ 4581 uint32 rxreassocrsp; /**< Number of RX REASSOC response */ 4582 uint32 txauth; /**< Number of TX AUTH */ 4583 uint32 rxauth; /**< Number of RX AUTH */ 4584 uint32 txdeauth; /**< Number of TX DEAUTH */ 4585 uint32 rxdeauth; /**< Number of RX DEAUTH */ 4586 uint32 txprobereq; /**< Number of TX probe request */ 4587 uint32 rxprobereq; /**< Number of RX probe request */ 4588 uint32 txprobersp; /**< Number of TX probe response */ 4589 uint32 rxprobersp; /**< Number of RX probe response */ 4590 uint32 txaction; /**< Number of TX action frame */ 4591 uint32 rxaction; /**< Number of RX action frame */ 4592 uint32 ampdu_wds; /**< Number of AMPDU watchdogs */ 4593 uint32 txlost; /**< Number of lost packets reported in txs */ 4594 uint32 txdatamcast; /**< Number of TX multicast data packets */ 4595 uint32 txdatabcast; /**< Number of TX broadcast data packets */ 4596 uint32 psmxwds; /**< Number of PSMx watchdogs */ 4597 uint32 rxback; 4598 uint32 txback; 4599 uint32 p2p_tbtt; /**< Number of P2P TBTT Events */ 4600 uint32 p2p_tbtt_miss; /**< Number of P2P TBTT Events Miss */ 4601 uint32 txqueue_start; 4602 uint32 txqueue_end; 4603 uint32 txbcast; /* Broadcast TransmittedFrameCount */ 4604 uint32 txdropped; /* tx dropped pkts */ 4605 uint32 rxbcast; /* BroadcastReceivedFrameCount */ 4606 uint32 rxdropped; /* rx dropped pkts (derived: sum of others) */ 4607 uint32 txq_end_assoccb; /* forced txqueue_end callback fired in assoc */ 4608 uint32 tx_toss_cnt; /* number of tx packets tossed */ 4609 uint32 rx_toss_cnt; /* number of rx packets tossed */ 4610 uint32 last_tx_toss_rsn; /* reason because of which last tx pkt tossed */ 4611 uint32 last_rx_toss_rsn; /* reason because of which last rx pkt tossed */ 4612 uint32 pmk_badlen_cnt; /* number of invalid pmk len */ 4613 uint32 txbar_notx; /* number of TX BAR not sent (maybe supressed or muted) */ 4614 uint32 txbar_noack; /* number of TX BAR sent, but not acknowledged by peer */ 4615 uint32 rxfrag_agedout; /**< # of aged out rx fragmentation */ 4616 uint32 pmkid_mismatch_cnt; /* number of EAPOL msg1 PMKID mismatch */ 4617 uint32 txaction_vndr_attempt; /* Number of VS AFs scheduled successfully for Tx */ 4618 uint32 txaction_vndr_fail; /* Number of VS AFs not sent or not acked */ 4619 uint32 rxnofrag; /* # of nobuf failure due to no pkt availability */ 4620 uint32 rxnocmplid; /* # of nobuf failure due to rxcmplid non-availability */ 4621 uint32 rxnohaddr; /* # of nobuf failure due to host address non-availability */ 4622 4623 /* Do not remove or rename in the middle of this struct. 4624 * All counter variables have to be of uint32. 4625 */ 4626 } wl_cnt_wlc_t; 4627 4628 /* he counters Version 1 */ 4629 #define HE_COUNTERS_V1 (1) 4630 typedef struct wl_he_cnt_wlc_v1 { 4631 uint32 he_rxtrig_myaid; 4632 uint32 he_rxtrig_rand; 4633 uint32 he_colormiss_cnt; 4634 uint32 he_txmampdu; 4635 uint32 he_txmtid_back; 4636 uint32 he_rxmtid_back; 4637 uint32 he_rxmsta_back; 4638 uint32 he_txfrag; 4639 uint32 he_rxdefrag; 4640 uint32 he_txtrig; 4641 uint32 he_rxtrig_basic; 4642 uint32 he_rxtrig_murts; 4643 uint32 he_rxtrig_bsrp; 4644 uint32 he_rxdlmu; 4645 uint32 he_physu_rx; 4646 uint32 he_phyru_rx; 4647 uint32 he_txtbppdu; 4648 } wl_he_cnt_wlc_v1_t; 4649 4650 /* he counters Version 2 */ 4651 #define HE_COUNTERS_V2 (2) 4652 typedef struct wl_he_cnt_wlc_v2 { 4653 uint16 version; 4654 uint16 len; 4655 uint32 he_rxtrig_myaid; /**< rxed valid trigger frame with myaid */ 4656 uint32 he_rxtrig_rand; /**< rxed valid trigger frame with random aid */ 4657 uint32 he_colormiss_cnt; /**< for bss color mismatch cases */ 4658 uint32 he_txmampdu; /**< for multi-TID AMPDU transmission */ 4659 uint32 he_txmtid_back; /**< for multi-TID BACK transmission */ 4660 uint32 he_rxmtid_back; /**< reception of multi-TID BACK */ 4661 uint32 he_rxmsta_back; /**< reception of multi-STA BACK */ 4662 uint32 he_txfrag; /**< transmission of Dynamic fragmented packets */ 4663 uint32 he_rxdefrag; /**< reception of dynamic fragmented packets */ 4664 uint32 he_txtrig; /**< transmission of trigger frames */ 4665 uint32 he_rxtrig_basic; /**< reception of basic trigger frame */ 4666 uint32 he_rxtrig_murts; /**< reception of MU-RTS trigger frame */ 4667 uint32 he_rxtrig_bsrp; /**< reception of BSR poll trigger frame */ 4668 uint32 he_rxdlmu; /**< reception of DL MU PPDU */ 4669 uint32 he_physu_rx; /**< reception of SU frame */ 4670 uint32 he_phyru_rx; /**< reception of RU frame */ 4671 uint32 he_txtbppdu; /**< increments on transmission of every TB PPDU */ 4672 uint32 he_null_tbppdu; /**< null TB PPDU's sent as a response to basic trigger frame */ 4673 } wl_he_cnt_wlc_v2_t; 4674 4675 /* he counters Version 3 */ 4676 #define WL_RU_TYPE_MAX 6 4677 #define HE_COUNTERS_V3 (3) 4678 4679 typedef struct wl_he_cnt_wlc_v3 { 4680 uint16 version; 4681 uint16 len; 4682 uint32 he_rxtrig_myaid; /**< rxed valid trigger frame with myaid */ 4683 uint32 he_rxtrig_rand; /**< rxed valid trigger frame with random aid */ 4684 uint32 he_colormiss_cnt; /**< for bss color mismatch cases */ 4685 uint32 he_txmampdu; /**< for multi-TID AMPDU transmission */ 4686 uint32 he_txmtid_back; /**< for multi-TID BACK transmission */ 4687 uint32 he_rxmtid_back; /**< reception of multi-TID BACK */ 4688 uint32 he_rxmsta_back; /**< reception of multi-STA BACK */ 4689 uint32 he_txfrag; /**< transmission of Dynamic fragmented packets */ 4690 uint32 he_rxdefrag; /**< reception of dynamic fragmented packets */ 4691 uint32 he_txtrig; /**< transmission of trigger frames */ 4692 uint32 he_rxtrig_basic; /**< reception of basic trigger frame */ 4693 uint32 he_rxtrig_murts; /**< reception of MU-RTS trigger frame */ 4694 uint32 he_rxtrig_bsrp; /**< reception of BSR poll trigger frame */ 4695 uint32 he_rxhemuppdu_cnt; /**< rxing HE MU PPDU */ 4696 uint32 he_physu_rx; /**< reception of SU frame */ 4697 uint32 he_phyru_rx; /**< reception of RU frame */ 4698 uint32 he_txtbppdu; /**< increments on transmission of every TB PPDU */ 4699 uint32 he_null_tbppdu; /**< null TB PPDU's sent as a response to basic trigger frame */ 4700 uint32 he_rxhesuppdu_cnt; /**< rxing SU PPDU */ 4701 uint32 he_rxhesureppdu_cnt; /**< rxing Range Extension(RE) SU PPDU */ 4702 uint32 he_null_zero_agg; /**< null AMPDU's transmitted in response to basic trigger 4703 * because of zero aggregation 4704 */ 4705 uint32 he_null_bsrp_rsp; /**< null AMPDU's txed in response to BSR poll */ 4706 uint32 he_null_fifo_empty; /**< null AMPDU's in response to basic trigger 4707 * because of no frames in fifo's 4708 */ 4709 uint32 he_myAID_cnt; 4710 uint32 he_rxtrig_bfm_cnt; 4711 uint32 he_rxtrig_mubar; 4712 uint32 rxheru[WL_RU_TYPE_MAX]; /**< HE of rx pkts */ 4713 uint32 txheru[WL_RU_TYPE_MAX]; 4714 uint32 he_mgmt_tbppdu; 4715 uint32 he_cs_req_tx_cancel; 4716 uint32 he_wrong_nss; 4717 uint32 he_trig_unsupp_rate; 4718 uint32 he_rxtrig_nfrp; 4719 uint32 he_rxtrig_bqrp; 4720 uint32 he_rxtrig_gcrmubar; 4721 } wl_he_cnt_wlc_v3_t; 4722 4723 /* he counters Version 4 */ 4724 #define HE_COUNTERS_V4 (4) 4725 typedef struct wl_he_cnt_wlc_v4 { 4726 uint16 version; 4727 uint16 len; 4728 uint32 he_rxtrig_myaid; /**< rxed valid trigger frame with myaid */ 4729 uint32 he_rxtrig_rand; /**< rxed valid trigger frame with random aid */ 4730 uint32 he_colormiss_cnt; /**< for bss color mismatch cases */ 4731 uint32 he_txmampdu; /**< for multi-TID AMPDU transmission */ 4732 uint32 he_txmtid_back; /**< for multi-TID BACK transmission */ 4733 uint32 he_rxmtid_back; /**< reception of multi-TID BACK */ 4734 uint32 he_rxmsta_back; /**< reception of multi-STA BACK */ 4735 uint32 he_txfrag; /**< transmission of Dynamic fragmented packets */ 4736 uint32 he_rxdefrag; /**< reception of dynamic fragmented packets */ 4737 uint32 he_txtrig; /**< transmission of trigger frames */ 4738 uint32 he_rxtrig_basic; /**< reception of basic trigger frame */ 4739 uint32 he_rxtrig_murts; /**< reception of MU-RTS trigger frame */ 4740 uint32 he_rxtrig_bsrp; /**< reception of BSR poll trigger frame */ 4741 uint32 he_rxtsrt_hemuppdu_cnt; /**< rxing HE MU PPDU */ 4742 uint32 he_physu_rx; /**< reception of SU frame */ 4743 uint32 he_phyru_rx; /**< reception of RU frame */ 4744 uint32 he_txtbppdu; /**< increments on transmission of every TB PPDU */ 4745 uint32 he_null_tbppdu; /**< null TB PPDU's sent as a response to basic trigger frame */ 4746 uint32 he_rxstrt_hesuppdu_cnt; /**< rxing SU PPDU */ 4747 uint32 he_rxstrt_hesureppdu_cnt; /**< rxing Range Extension(RE) SU PPDU */ 4748 uint32 he_null_zero_agg; /**< null AMPDU's transmitted in response to basic trigger 4749 * because of zero aggregation 4750 */ 4751 uint32 he_null_bsrp_rsp; /**< null AMPDU's txed in response to BSR poll */ 4752 uint32 he_null_fifo_empty; /**< null AMPDU's in response to basic trigger 4753 * because of no frames in fifo's 4754 */ 4755 uint32 he_myAID_cnt; 4756 uint32 he_rxtrig_bfm_cnt; 4757 uint32 he_rxtrig_mubar; 4758 uint32 rxheru[WL_RU_TYPE_MAX]; /**< HE of rx pkts */ 4759 uint32 txheru[WL_RU_TYPE_MAX]; 4760 uint32 he_mgmt_tbppdu; 4761 uint32 he_cs_req_tx_cancel; 4762 uint32 he_wrong_nss; 4763 uint32 he_trig_unsupp_rate; 4764 uint32 he_rxtrig_nfrp; 4765 uint32 he_rxtrig_bqrp; 4766 uint32 he_rxtrig_gcrmubar; 4767 uint32 he_rxtrig_basic_htpack; /**< triggers received with HTP ack policy */ 4768 uint32 he_rxtrig_ed_cncl; /**< count of cancelled packets 4769 * becasue of cs_req in trigger frame 4770 */ 4771 uint32 he_rxtrig_suppr_null_tbppdu; /**< count of null frame sent becasue of 4772 * suppression scenarios 4773 */ 4774 uint32 he_ulmu_disable; /**< number of UL MU disable scenario's handled in ucode */ 4775 uint32 he_ulmu_data_disable; /**<number of UL MU data disable scenarios 4776 * handled in ucode 4777 */ 4778 } wl_he_cnt_wlc_v4_t; 4779 4780 /* he counters Version 5 */ 4781 #define HE_COUNTERS_V5 (5) 4782 typedef struct wl_he_cnt_wlc_v5 { 4783 uint16 version; 4784 uint16 len; 4785 uint32 he_rxtrig_myaid; /* rxed valid trigger frame with myaid */ 4786 uint32 he_rxtrig_rand; /* rxed valid trigger frame with random aid */ 4787 uint32 he_colormiss_cnt; /* for bss color mismatch cases */ 4788 uint32 he_txmampdu; /* for multi-TID AMPDU transmission */ 4789 uint32 he_txmtid_back; /* for multi-TID BACK transmission */ 4790 uint32 he_rxmtid_back; /* reception of multi-TID BACK */ 4791 uint32 he_rxmsta_back; /* reception of multi-STA BACK */ 4792 uint32 he_txfrag; /* transmission of Dynamic fragmented packets */ 4793 uint32 he_rxdefrag; /* reception of dynamic fragmented packets */ 4794 uint32 he_txtrig; /* transmission of trigger frames */ 4795 uint32 he_rxtrig_basic; /* reception of basic trigger frame */ 4796 uint32 he_rxtrig_murts; /* reception of MU-RTS trigger frame */ 4797 uint32 he_rxtrig_bsrp; /* reception of BSR poll trigger frame */ 4798 uint32 he_rxtsrt_hemuppdu_cnt; /* rxing HE MU PPDU */ 4799 uint32 he_physu_rx; /* reception of SU frame */ 4800 uint32 he_phyru_rx; /* reception of RU frame */ 4801 uint32 he_txtbppdu; /* increments on transmission of every TB PPDU */ 4802 uint32 he_null_tbppdu; /* null TBPPDU's sent as a response to 4803 * basic trigger frame 4804 */ 4805 uint32 he_rxstrt_hesuppdu_cnt; /* rxing SU PPDU */ 4806 uint32 he_rxstrt_hesureppdu_cnt; /* rxing Range Extension(RE) SU PPDU */ 4807 uint32 he_null_zero_agg; /* nullAMPDU's transmitted in response to 4808 * basic trigger because of zero aggregation 4809 */ 4810 uint32 he_null_bsrp_rsp; /* null AMPDU's txed in response to BSR poll */ 4811 uint32 he_null_fifo_empty; /* null AMPDU's in response to basic trigger 4812 * because of no frames in fifo's 4813 */ 4814 uint32 he_rxtrig_bfm_cnt; 4815 uint32 he_rxtrig_mubar; 4816 uint32 rxheru[WL_RU_TYPE_MAX]; /* HE of rx pkts */ 4817 uint32 txheru[WL_RU_TYPE_MAX]; 4818 uint32 he_mgmt_tbppdu; 4819 uint32 he_cs_req_tx_cancel; 4820 uint32 he_wrong_nss; 4821 uint32 he_trig_unsupp_rate; 4822 uint32 he_rxtrig_nfrp; 4823 uint32 he_rxtrig_bqrp; 4824 uint32 he_rxtrig_gcrmubar; 4825 uint32 he_rxtrig_basic_htpack; /* triggers received with HTP ack policy */ 4826 uint32 he_rxtrig_suppr_null_tbppdu; /* count of null frame sent becasue of 4827 * suppression scenarios 4828 */ 4829 uint32 he_ulmu_disable; /* number of ULMU dis scenario's handled in ucode */ 4830 uint32 he_ulmu_data_disable; /* number of UL MU data disable scenarios 4831 * handled in ucode 4832 */ 4833 uint32 rxheru_2x996T; 4834 } wl_he_cnt_wlc_v5_t; 4835 4836 #ifndef HE_COUNTERS_VERSION_ENABLED 4837 #define HE_COUNTERS_VERSION (HE_COUNTERS_V1) 4838 typedef wl_he_cnt_wlc_v1_t wl_he_cnt_wlc_t; 4839 #endif /* HE_COUNTERS_VERSION_ENABLED */ 4840 4841 /* he omi counters Version 1 */ 4842 #define HE_OMI_COUNTERS_V1 (1) 4843 typedef struct wl_he_omi_cnt_wlc_v1 { 4844 uint16 version; 4845 uint16 len; 4846 uint32 he_omitx_sched; /* Count for total number of OMIs scheduled */ 4847 uint32 he_omitx_success; /* Count for OMI Tx success */ 4848 uint32 he_omitx_retries; /* Count for OMI retries as TxDone not set */ 4849 uint32 he_omitx_dur; /* Accumulated duration of OMI completion time */ 4850 uint32 he_omitx_ulmucfg; /* count for UL MU enable/disable change req */ 4851 uint32 he_omitx_ulmucfg_ack; /* count for UL MU enable/disable req txed successfully */ 4852 uint32 he_omitx_txnsts; /* count for Txnsts change req */ 4853 uint32 he_omitx_txnsts_ack; /* count for Txnsts change req txed successfully */ 4854 uint32 he_omitx_rxnss; /* count for Rxnss change req */ 4855 uint32 he_omitx_rxnss_ack; /* count for Rxnss change req txed successfully */ 4856 uint32 he_omitx_bw; /* count for BW change req */ 4857 uint32 he_omitx_bw_ack; /* count for BW change req txed successfully */ 4858 uint32 he_omitx_ersudis; /* count for ER SU enable/disable req */ 4859 uint32 he_omitx_ersudis_ack; /* count for ER SU enable/disable req txed successfully */ 4860 uint32 he_omitx_dlmursdrec; /* count for Resound recommendation change req */ 4861 uint32 he_omitx_dlmursdrec_ack; /* count for Resound recommendation req txed successfully */ 4862 } wl_he_omi_cnt_wlc_v1_t; 4863 4864 /* WL_IFSTATS_XTLV_WL_SLICE_TXBF */ 4865 /* beamforming counters version 1 */ 4866 #define TXBF_ECOUNTERS_V1 (1u) 4867 #define WL_TXBF_CNT_ARRAY_SZ (8u) 4868 typedef struct wl_txbf_ecounters_v1 { 4869 uint16 version; 4870 uint16 len; 4871 /* transmit beamforming stats */ 4872 uint16 txndpa; /* null data packet announcements */ 4873 uint16 txndp; /* null data packets */ 4874 uint16 txbfpoll; /* beamforming report polls */ 4875 uint16 txsf; /* subframes */ 4876 uint16 txcwrts; /* contention window rts */ 4877 uint16 txcwcts; /* contention window cts */ 4878 uint16 txbfm; 4879 /* receive beamforming stats */ 4880 uint16 rxndpa_u; /* unicast NDPAs */ 4881 uint16 rxndpa_m; /* multicast NDPAs */ 4882 uint16 rxbfpoll; /* unicast bf-polls */ 4883 uint16 bferpt; /* beamforming reports */ 4884 uint16 rxsf; 4885 uint16 rxcwrts; 4886 uint16 rxcwcts; 4887 uint16 rxtrig_bfpoll; 4888 uint16 unused_uint16; /* pad */ 4889 /* sounding stats - interval capture */ 4890 uint16 rxnontb_sound[WL_TXBF_CNT_ARRAY_SZ]; /* non-TB sounding for last 8 captures */ 4891 uint16 rxtb_sound[WL_TXBF_CNT_ARRAY_SZ]; /* TB sounding count for last 8 captures */ 4892 uint32 cap_dur_ms[WL_TXBF_CNT_ARRAY_SZ]; /* last 8 capture durations (in ms) */ 4893 uint32 cap_last_ts; /* timestamp of last sample capture */ 4894 } wl_txbf_ecounters_v1_t; 4895 4896 /* security vulnerabilities counters */ 4897 typedef struct { 4898 uint32 ie_unknown; /* number of unknown IEs */ 4899 uint32 ie_invalid_length; /* number of IEs with invalid length */ 4900 uint32 ie_invalid_data; /* number of IEs with invalid data */ 4901 uint32 ipv6_invalid_length; /* number of IPv6 packets with invalid payload length */ 4902 } wl_secvln_cnt_t; 4903 4904 /* Reinit reasons - do not put anything else other than reinit reasons here */ 4905 /* LEGACY STRUCTURE, DO NO MODIFY, SEE reinit_rsns_v1_t and further versions */ 4906 typedef struct { 4907 uint32 rsn[WL_REINIT_RC_LAST]; 4908 } reinit_rsns_t; 4909 4910 typedef struct { 4911 uint16 version; 4912 uint16 len; 4913 uint32 rsn[WL_REINIT_RC_LAST_V2 + 1u]; /* Note:WL_REINIT_RC_LAST_V2 is last value */ 4914 } reinit_rsns_v2_t; 4915 4916 /* MACXSTAT counters for ucodex (corerev >= 64) */ 4917 typedef struct { 4918 uint32 macxsusp; 4919 uint32 m2vmsg; 4920 uint32 v2mmsg; 4921 uint32 mboxout; 4922 uint32 musnd; 4923 uint32 sfb2v; 4924 } wl_cnt_ge64mcxst_v1_t; 4925 4926 /** MACSTAT counters for ucode (corerev >= 40) */ 4927 typedef struct { 4928 /* MAC counters: 32-bit version of d11.h's macstat_t */ 4929 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 4930 * Control Management (includes retransmissions) 4931 */ 4932 uint32 txrtsfrm; /**< number of RTS sent out by the MAC */ 4933 uint32 txctsfrm; /**< number of CTS sent out by the MAC */ 4934 uint32 txackfrm; /**< number of ACK frames sent out */ 4935 uint32 txdnlfrm; /**< number of Null-Data transmission generated from template */ 4936 uint32 txbcnfrm; /**< beacons transmitted */ 4937 uint32 txfunfl[6]; /**< per-fifo tx underflows */ 4938 uint32 txampdu; /**< number of AMPDUs transmitted */ 4939 uint32 txmpdu; /**< number of MPDUs transmitted */ 4940 uint32 txtplunfl; /**< Template underflows (mac was too slow to transmit ACK/CTS 4941 * or BCN) 4942 */ 4943 uint32 txphyerror; /**< Transmit phy error, type of error is reported in tx-status for 4944 * driver enqueued frames 4945 */ 4946 uint32 pktengrxducast; /**< unicast frames rxed by the pkteng code */ 4947 uint32 pktengrxdmcast; /**< multicast frames rxed by the pkteng code */ 4948 uint32 rxfrmtoolong; /**< Received frame longer than legal limit (2346 bytes) */ 4949 uint32 rxfrmtooshrt; /**< Received frame did not contain enough bytes for its frame type */ 4950 uint32 rxanyerr; /**< Any RX error that is not counted by other counters. */ 4951 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 4952 uint32 rxbadplcp; /**< parity check of the PLCP header failed */ 4953 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 4954 uint32 rxstrt; /**< Number of received frames with a good PLCP 4955 * (i.e. passing parity check) 4956 */ 4957 uint32 rxdtucastmbss; /**< number of received DATA frames with good FCS and matching RA */ 4958 uint32 rxmgucastmbss; /**< number of received mgmt frames with good FCS and matching RA */ 4959 uint32 rxctlucast; /**< number of received CNTRL frames with good FCS and matching RA */ 4960 uint32 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 4961 uint32 rxctsucast; /**< number of unicast CTS addressed to the MAC (good FCS) */ 4962 uint32 rxackucast; /**< number of ucast ACKS received (good FCS) */ 4963 uint32 rxdtocast; /**< number of received DATA frames (good FCS and not matching RA) */ 4964 uint32 rxmgocast; /**< number of received MGMT frames (good FCS and not matching RA) */ 4965 uint32 rxctlocast; /**< number of received CNTRL frame (good FCS and not matching RA) */ 4966 uint32 rxrtsocast; /**< number of received RTS not addressed to the MAC */ 4967 uint32 rxctsocast; /**< number of received CTS not addressed to the MAC */ 4968 uint32 rxdtmcast; /**< number of RX Data multicast frames received by the MAC */ 4969 uint32 rxmgmcast; /**< number of RX Management multicast frames received by the MAC */ 4970 uint32 rxctlmcast; /**< number of RX Control multicast frames received by the MAC 4971 * (unlikely to see these) 4972 */ 4973 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 4974 uint32 rxdtucastobss; /**< number of unicast frames addressed to the MAC from 4975 * other BSS (WDS FRAME) 4976 */ 4977 uint32 rxbeaconobss; /**< beacons received from other BSS */ 4978 uint32 rxrsptmout; /**< number of response timeouts for transmitted frames 4979 * expecting a response 4980 */ 4981 uint32 bcntxcancl; /**< transmit beacons canceled due to receipt of beacon (IBSS) */ 4982 uint32 rxnodelim; /**< number of no valid delimiter detected by ampdu parser */ 4983 uint32 rxf0ovfl; /**< number of receive fifo 0 overflows */ 4984 uint32 rxf1ovfl; /**< number of receive fifo 1 overflows */ 4985 uint32 rxhlovfl; /**< number of length / header fifo overflows */ 4986 uint32 missbcn_dbg; /**< number of beacon missed to receive */ 4987 uint32 pmqovfl; /**< number of PMQ overflows */ 4988 uint32 rxcgprqfrm; /**< number of received Probe requests that made it into 4989 * the PRQ fifo 4990 */ 4991 uint32 rxcgprsqovfl; /**< Rx Probe Request Que overflow in the AP */ 4992 uint32 txcgprsfail; /**< Tx Probe Response Fail. AP sent probe response but did 4993 * not get ACK 4994 */ 4995 uint32 txcgprssuc; /**< Tx Probe Response Success (ACK was received) */ 4996 uint32 prs_timeout; /**< number of probe requests that were dropped from the PRQ 4997 * fifo because a probe response could not be sent out within 4998 * the time limit defined in M_PRS_MAXTIME 4999 */ 5000 uint32 txrtsfail; /**< number of rts transmission failure that reach retry limit */ 5001 uint32 txucast; /**< number of unicast tx expecting response other than cts/cwcts */ 5002 uint32 txinrtstxop; /**< number of data frame transmissions during rts txop */ 5003 uint32 rxback; /**< blockack rxcnt */ 5004 uint32 txback; /**< blockack txcnt */ 5005 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 5006 uint32 rxdrop20s; /**< drop secondary cnt */ 5007 uint32 rxtoolate; /**< receive too late */ 5008 uint32 bphy_badplcp; /**< number of bad PLCP reception on BPHY rate */ 5009 /* All counter variables have to be of uint32. */ 5010 } wl_cnt_ge40mcst_v1_t; 5011 5012 /** MACSTAT counters for ucode (corerev < 40) */ 5013 typedef struct { 5014 /* MAC counters: 32-bit version of d11.h's macstat_t */ 5015 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 5016 * Control Management (includes retransmissions) 5017 */ 5018 uint32 txrtsfrm; /**< number of RTS sent out by the MAC */ 5019 uint32 txctsfrm; /**< number of CTS sent out by the MAC */ 5020 uint32 txackfrm; /**< number of ACK frames sent out */ 5021 uint32 txdnlfrm; /**< number of Null-Data transmission generated from template */ 5022 uint32 txbcnfrm; /**< beacons transmitted */ 5023 uint32 txfunfl[6]; /**< per-fifo tx underflows */ 5024 uint32 txampdu; /**< number of AMPDUs transmitted */ 5025 uint32 txmpdu; /**< number of MPDUs transmitted */ 5026 uint32 txtplunfl; /**< Template underflows (mac was too slow to transmit ACK/CTS 5027 * or BCN) 5028 */ 5029 uint32 txphyerror; /**< Transmit phy error, type of error is reported in tx-status for 5030 * driver enqueued frames 5031 */ 5032 uint32 pktengrxducast; /**< unicast frames rxed by the pkteng code */ 5033 uint32 pktengrxdmcast; /**< multicast frames rxed by the pkteng code */ 5034 uint32 rxfrmtoolong; /**< Received frame longer than legal limit (2346 bytes) */ 5035 uint32 rxfrmtooshrt; /**< Received frame did not contain enough bytes for its frame type */ 5036 uint32 rxanyerr; /**< Any RX error that is not counted by other counters. */ 5037 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 5038 uint32 rxbadplcp; /**< parity check of the PLCP header failed */ 5039 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 5040 uint32 rxstrt; /**< Number of received frames with a good PLCP 5041 * (i.e. passing parity check) 5042 */ 5043 uint32 rxdtucastmbss; /**< number of received DATA frames with good FCS and matching RA */ 5044 uint32 rxmgucastmbss; /**< number of received mgmt frames with good FCS and matching RA */ 5045 uint32 rxctlucast; /**< number of received CNTRL frames with good FCS and matching RA */ 5046 uint32 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 5047 uint32 rxctsucast; /**< number of unicast CTS addressed to the MAC (good FCS) */ 5048 uint32 rxackucast; /**< number of ucast ACKS received (good FCS) */ 5049 uint32 rxdtocast; /**< number of received DATA frames (good FCS and not matching RA) */ 5050 uint32 rxmgocast; /**< number of received MGMT frames (good FCS and not matching RA) */ 5051 uint32 rxctlocast; /**< number of received CNTRL frame (good FCS and not matching RA) */ 5052 uint32 rxrtsocast; /**< number of received RTS not addressed to the MAC */ 5053 uint32 rxctsocast; /**< number of received CTS not addressed to the MAC */ 5054 uint32 rxdtmcast; /**< number of RX Data multicast frames received by the MAC */ 5055 uint32 rxmgmcast; /**< number of RX Management multicast frames received by the MAC */ 5056 uint32 rxctlmcast; /**< number of RX Control multicast frames received by the MAC 5057 * (unlikely to see these) 5058 */ 5059 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 5060 uint32 rxdtucastobss; /**< number of unicast frames addressed to the MAC from 5061 * other BSS (WDS FRAME) 5062 */ 5063 uint32 rxbeaconobss; /**< beacons received from other BSS */ 5064 uint32 rxrsptmout; /**< number of response timeouts for transmitted frames 5065 * expecting a response 5066 */ 5067 uint32 bcntxcancl; /**< transmit beacons canceled due to receipt of beacon (IBSS) */ 5068 uint32 rxnodelim; /**< number of no valid delimiter detected by ampdu parser */ 5069 uint32 rxf0ovfl; /**< number of receive fifo 0 overflows */ 5070 uint32 dbgoff46; /**< BTCX protection failure count, 5071 * getting RX antenna in PHY DEBUG, 5072 * PR84273 timeout count 5073 */ 5074 uint32 dbgoff47; /**< BTCX preemption failure count, 5075 * getting RX antenna in PHY DEBUG, 5076 * PR84273 reset CCA count, 5077 * RATEENGDBG 5078 */ 5079 uint32 dbgoff48; /**< Used for counting txstatus queue overflow (corerev <= 4) */ 5080 uint32 pmqovfl; /**< number of PMQ overflows */ 5081 uint32 rxcgprqfrm; /**< number of received Probe requests that made it into 5082 * the PRQ fifo 5083 */ 5084 uint32 rxcgprsqovfl; /**< Rx Probe Request Que overflow in the AP */ 5085 uint32 txcgprsfail; /**< Tx Probe Response Fail. AP sent probe response but did 5086 * not get ACK 5087 */ 5088 uint32 txcgprssuc; /**< Tx Probe Response Success (ACK was received) */ 5089 uint32 prs_timeout; /**< number of probe requests that were dropped from the PRQ 5090 * fifo because a probe response could not be sent out within 5091 * the time limit defined in M_PRS_MAXTIME 5092 */ 5093 uint32 txrtsfail; /**< number of rts transmission failure that reach retry limit */ 5094 uint32 txucast; /**< number of unicast tx expecting response other than cts/cwcts */ 5095 uint32 txinrtstxop; /**< number of data frame transmissions during rts txop */ 5096 uint32 rxback; /**< blockack rxcnt */ 5097 uint32 txback; /**< blockack txcnt */ 5098 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 5099 uint32 phywatch; /**< number of phywatchdog to kill any pending transmissions. 5100 * (PR 38187 corerev == 11) 5101 */ 5102 uint32 rxtoolate; /**< receive too late */ 5103 uint32 bphy_badplcp; /**< number of bad PLCP reception on BPHY rate */ 5104 /* All counter variables have to be of uint32. */ 5105 } wl_cnt_lt40mcst_v1_t; 5106 5107 /** MACSTAT counters for ucode (corerev >= 80) */ 5108 typedef struct { 5109 /* MAC counters: 32-bit version of d11.h's macstat_t */ 5110 /* Start of PSM2HOST stats(72) block */ 5111 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 5112 * Control Management (includes retransmissions) 5113 */ 5114 uint32 txrtsfrm; /**< number of RTS sent out by the MAC */ 5115 uint32 txctsfrm; /**< number of CTS sent out by the MAC */ 5116 uint32 txackfrm; /**< number of ACK frames sent out */ 5117 uint32 txdnlfrm; /**< number of Null-Data transmission generated from template */ 5118 uint32 txbcnfrm; /**< beacons transmitted */ 5119 uint32 txampdu; /**< number of AMPDUs transmitted */ 5120 uint32 txmpdu; /**< number of MPDUs transmitted */ 5121 uint32 txtplunfl; /**< Template underflows (mac was too slow to transmit ACK/CTS 5122 * or BCN) 5123 */ 5124 uint32 txphyerror; /**< Transmit phy error, type of error is reported in tx-status for 5125 * driver enqueued frames 5126 */ 5127 uint32 pktengrxducast; /**< unicast frames rxed by the pkteng code */ 5128 uint32 pktengrxdmcast; /**< multicast frames rxed by the pkteng code */ 5129 uint32 rxfrmtoolong; /**< Received frame longer than legal limit (2346 bytes) */ 5130 uint32 rxfrmtooshrt; /**< Received frame did not contain enough bytes for its frame type */ 5131 uint32 rxanyerr; /**< Any RX error that is not counted by other counters. */ 5132 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 5133 uint32 rxbadplcp; /**< parity check of the PLCP header failed */ 5134 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 5135 uint32 rxstrt; /**< Number of received frames with a good PLCP 5136 * (i.e. passing parity check) 5137 */ 5138 uint32 rxdtucastmbss; /**< number of received DATA frames with good FCS and matching RA */ 5139 uint32 rxmgucastmbss; /**< number of received mgmt frames with good FCS and matching RA */ 5140 uint32 rxctlucast; /**< number of received CNTRL frames with good FCS and matching RA */ 5141 uint32 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 5142 uint32 rxctsucast; /**< number of unicast CTS addressed to the MAC (good FCS) */ 5143 uint32 rxackucast; /**< number of ucast ACKS received (good FCS) */ 5144 uint32 rxdtocast; /**< number of received DATA frames (good FCS and not matching RA) */ 5145 uint32 rxmgocast; /**< number of received MGMT frames (good FCS and not matching RA) */ 5146 uint32 rxctlocast; /**< number of received CNTRL frame (good FCS and not matching RA) */ 5147 uint32 rxrtsocast; /**< number of received RTS not addressed to the MAC */ 5148 uint32 rxctsocast; /**< number of received CTS not addressed to the MAC */ 5149 uint32 rxdtmcast; /**< number of RX Data multicast frames received by the MAC */ 5150 uint32 rxmgmcast; /**< number of RX Management multicast frames received by the MAC */ 5151 uint32 rxctlmcast; /**< number of RX Control multicast frames received by the MAC 5152 * (unlikely to see these) 5153 */ 5154 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 5155 uint32 rxdtucastobss; /**< number of unicast frames addressed to the MAC from 5156 * other BSS (WDS FRAME) 5157 */ 5158 uint32 rxbeaconobss; /**< beacons received from other BSS */ 5159 uint32 rxrsptmout; /**< number of response timeouts for transmitted frames 5160 * expecting a response 5161 */ 5162 uint32 bcntxcancl; /**< transmit beacons canceled due to receipt of beacon (IBSS) */ 5163 uint32 rxnodelim; /**< number of no valid delimiter detected by ampdu parser */ 5164 uint32 missbcn_dbg; /**< number of beacon missed to receive */ 5165 uint32 pmqovfl; /**< number of PMQ overflows */ 5166 uint32 rxcgprqfrm; /**< number of received Probe requests that made it into 5167 * the PRQ fifo 5168 */ 5169 uint32 rxcgprsqovfl; /**< Rx Probe Request Que overflow in the AP */ 5170 uint32 txcgprsfail; /**< Tx Probe Response Fail. AP sent probe response but did 5171 * not get ACK 5172 */ 5173 uint32 txcgprssuc; /**< Tx Probe Response Success (ACK was received) */ 5174 uint32 prs_timeout; /**< number of probe requests that were dropped from the PRQ 5175 * fifo because a probe response could not be sent out within 5176 * the time limit defined in M_PRS_MAXTIME 5177 */ 5178 uint32 txrtsfail; /**< number of rts transmission failure that reach retry limit */ 5179 uint32 txucast; /**< number of unicast tx expecting response other than cts/cwcts */ 5180 uint32 txinrtstxop; /**< number of data frame transmissions during rts txop */ 5181 uint32 rxback; /**< blockack rxcnt */ 5182 uint32 txback; /**< blockack txcnt */ 5183 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 5184 uint32 rxdrop20s; /**< drop secondary cnt */ 5185 uint32 rxtoolate; /**< receive too late */ 5186 uint32 bphy_badplcp; /**< number of bad PLCP reception on BPHY rate */ 5187 uint32 rxtrig_myaid; /* New counters added in corerev 80 */ 5188 uint32 rxtrig_rand; 5189 uint32 goodfcs; 5190 uint32 colormiss; 5191 uint32 txmampdu; 5192 uint32 rxmtidback; 5193 uint32 rxmstaback; 5194 uint32 txfrag; 5195 /* End of PSM2HOST stats block */ 5196 /* start of rxerror overflow counter(24) block which are modified/added in corerev 80 */ 5197 uint32 phyovfl; 5198 uint32 rxf0ovfl; /**< number of receive fifo 0 overflows */ 5199 uint32 rxf1ovfl; /**< number of receive fifo 1 overflows */ 5200 uint32 lenfovfl; 5201 uint32 weppeof; 5202 uint32 badplcp; 5203 uint32 msduthresh; 5204 uint32 strmeof; 5205 uint32 stsfifofull; 5206 uint32 stsfifoerr; 5207 uint32 PAD[6]; 5208 uint32 rxerr_stat; 5209 uint32 ctx_fifo_full; 5210 uint32 PAD0[9]; 5211 uint32 ctmode_ufc_cnt; 5212 uint32 PAD1[28]; /* PAD added for counter elements to be added soon */ 5213 } wl_cnt_ge80mcst_v1_t; 5214 5215 typedef struct { 5216 uint32 fifocount; 5217 uint32 txfunfl[]; 5218 } wl_cnt_ge80_txfunfl_v1_t; 5219 5220 /** MACSTAT counters for "wl counter" version <= 10 */ 5221 /* With ucode before its macstat cnts cleaned up */ 5222 typedef struct { 5223 /* MAC counters: 32-bit version of d11.h's macstat_t */ 5224 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 5225 * Control Management (includes retransmissions) 5226 */ 5227 uint32 txrtsfrm; /**< number of RTS sent out by the MAC */ 5228 uint32 txctsfrm; /**< number of CTS sent out by the MAC */ 5229 uint32 txackfrm; /**< number of ACK frames sent out */ 5230 uint32 txdnlfrm; /**< number of Null-Data transmission generated from template */ 5231 uint32 txbcnfrm; /**< beacons transmitted */ 5232 uint32 txfunfl[6]; /**< per-fifo tx underflows */ 5233 uint32 txfbw; /**< transmit at fallback bw (dynamic bw) */ 5234 uint32 PAD0; /**< number of MPDUs transmitted */ 5235 uint32 txtplunfl; /**< Template underflows (mac was too slow to transmit ACK/CTS 5236 * or BCN) 5237 */ 5238 uint32 txphyerror; /**< Transmit phy error, type of error is reported in tx-status for 5239 * driver enqueued frames 5240 */ 5241 uint32 pktengrxducast; /**< unicast frames rxed by the pkteng code */ 5242 uint32 pktengrxdmcast; /**< multicast frames rxed by the pkteng code */ 5243 uint32 rxfrmtoolong; /**< Received frame longer than legal limit (2346 bytes) */ 5244 uint32 rxfrmtooshrt; /**< Received frame did not contain enough bytes for its frame type */ 5245 uint32 rxinvmachdr; /**< Either the protocol version != 0 or frame type not 5246 * data/control/management 5247 */ 5248 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 5249 uint32 rxbadplcp; /**< parity check of the PLCP header failed */ 5250 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 5251 uint32 rxstrt; /**< Number of received frames with a good PLCP 5252 * (i.e. passing parity check) 5253 */ 5254 uint32 rxdfrmucastmbss; /* number of received DATA frames with good FCS and matching RA */ 5255 uint32 rxmfrmucastmbss; /* number of received mgmt frames with good FCS and matching RA */ 5256 uint32 rxcfrmucast; /**< number of received CNTRL frames with good FCS and matching RA */ 5257 uint32 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 5258 uint32 rxctsucast; /**< number of unicast CTS addressed to the MAC (good FCS) */ 5259 uint32 rxackucast; /**< number of ucast ACKS received (good FCS) */ 5260 uint32 rxdfrmocast; /**< number of received DATA frames (good FCS and not matching RA) */ 5261 uint32 rxmfrmocast; /**< number of received MGMT frames (good FCS and not matching RA) */ 5262 uint32 rxcfrmocast; /**< number of received CNTRL frame (good FCS and not matching RA) */ 5263 uint32 rxrtsocast; /**< number of received RTS not addressed to the MAC */ 5264 uint32 rxctsocast; /**< number of received CTS not addressed to the MAC */ 5265 uint32 rxdfrmmcast; /**< number of RX Data multicast frames received by the MAC */ 5266 uint32 rxmfrmmcast; /**< number of RX Management multicast frames received by the MAC */ 5267 uint32 rxcfrmmcast; /**< number of RX Control multicast frames received by the MAC 5268 * (unlikely to see these) 5269 */ 5270 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 5271 uint32 rxdfrmucastobss; /**< number of unicast frames addressed to the MAC from 5272 * other BSS (WDS FRAME) 5273 */ 5274 uint32 rxbeaconobss; /**< beacons received from other BSS */ 5275 uint32 rxrsptmout; /**< number of response timeouts for transmitted frames 5276 * expecting a response 5277 */ 5278 uint32 bcntxcancl; /**< transmit beacons canceled due to receipt of beacon (IBSS) */ 5279 uint32 PAD1; 5280 uint32 rxf0ovfl; /**< number of receive fifo 0 overflows */ 5281 uint32 rxf1ovfl; /**< Number of receive fifo 1 overflows (obsolete) */ 5282 uint32 rxf2ovfl; /**< Number of receive fifo 2 overflows (obsolete) */ 5283 uint32 txsfovfl; /**< Number of transmit status fifo overflows (obsolete) */ 5284 uint32 pmqovfl; /**< number of PMQ overflows */ 5285 uint32 rxcgprqfrm; /**< number of received Probe requests that made it into 5286 * the PRQ fifo 5287 */ 5288 uint32 rxcgprsqovfl; /**< Rx Probe Request Que overflow in the AP */ 5289 uint32 txcgprsfail; /**< Tx Probe Response Fail. AP sent probe response but did 5290 * not get ACK 5291 */ 5292 uint32 txcgprssuc; /**< Tx Probe Response Success (ACK was received) */ 5293 uint32 prs_timeout; /**< number of probe requests that were dropped from the PRQ 5294 * fifo because a probe response could not be sent out within 5295 * the time limit defined in M_PRS_MAXTIME 5296 */ 5297 uint32 rxnack; /**< obsolete */ 5298 uint32 frmscons; /**< obsolete */ 5299 uint32 txnack; /**< obsolete */ 5300 uint32 rxback; /**< blockack rxcnt */ 5301 uint32 txback; /**< blockack txcnt */ 5302 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 5303 uint32 rxdrop20s; /**< drop secondary cnt */ 5304 uint32 rxtoolate; /**< receive too late */ 5305 uint32 bphy_badplcp; /**< number of bad PLCP reception on BPHY rate */ 5306 /* All counter variables have to be of uint32. */ 5307 } wl_cnt_v_le10_mcst_t; 5308 5309 #define MAX_RX_FIFO 3 5310 #define WL_RXFIFO_CNT_VERSION 1 /* current version of wl_rxfifo_cnt_t */ 5311 typedef struct { 5312 /* Counters for frames received from rx fifos */ 5313 uint16 version; 5314 uint16 length; /* length of entire structure */ 5315 uint32 rxf_data[MAX_RX_FIFO]; /* data frames from rx fifo */ 5316 uint32 rxf_mgmtctl[MAX_RX_FIFO]; /* mgmt/ctl frames from rx fifo */ 5317 } wl_rxfifo_cnt_t; 5318 5319 typedef struct { 5320 uint16 version; /**< see definition of WL_CNT_T_VERSION */ 5321 uint16 length; /**< length of entire structure */ 5322 5323 /* transmit stat counters */ 5324 uint32 txframe; /**< tx data frames */ 5325 uint32 txbyte; /**< tx data bytes */ 5326 uint32 txretrans; /**< tx mac retransmits */ 5327 uint32 txerror; /**< tx data errors (derived: sum of others) */ 5328 uint32 txctl; /**< tx management frames */ 5329 uint32 txprshort; /**< tx short preamble frames */ 5330 uint32 txserr; /**< tx status errors */ 5331 uint32 txnobuf; /**< tx out of buffers errors */ 5332 uint32 txnoassoc; /**< tx discard because we're not associated */ 5333 uint32 txrunt; /**< tx runt frames */ 5334 uint32 txchit; /**< tx header cache hit (fastpath) */ 5335 uint32 txcmiss; /**< tx header cache miss (slowpath) */ 5336 5337 /* transmit chip error counters */ 5338 uint32 txuflo; /**< tx fifo underflows */ 5339 uint32 txphyerr; /**< tx phy errors (indicated in tx status) */ 5340 uint32 txphycrs; /**< PR8861/8963 counter */ 5341 5342 /* receive stat counters */ 5343 uint32 rxframe; /**< rx data frames */ 5344 uint32 rxbyte; /**< rx data bytes */ 5345 uint32 rxerror; /**< rx data errors (derived: sum of others) */ 5346 uint32 rxctl; /**< rx management frames */ 5347 uint32 rxnobuf; /**< rx out of buffers errors */ 5348 uint32 rxnondata; /**< rx non data frames in the data channel errors */ 5349 uint32 rxbadds; /**< rx bad DS errors */ 5350 uint32 rxbadcm; /**< rx bad control or management frames */ 5351 uint32 rxfragerr; /**< rx fragmentation errors */ 5352 uint32 rxrunt; /**< rx runt frames */ 5353 uint32 rxgiant; /**< rx giant frames */ 5354 uint32 rxnoscb; /**< rx no scb error */ 5355 uint32 rxbadproto; /**< rx invalid frames */ 5356 uint32 rxbadsrcmac; /**< rx frames with Invalid Src Mac */ 5357 uint32 rxbadda; /**< rx frames tossed for invalid da */ 5358 uint32 rxfilter; /**< rx frames filtered out */ 5359 5360 /* receive chip error counters */ 5361 uint32 rxoflo; /**< rx fifo overflow errors */ 5362 uint32 rxuflo[NFIFO]; /**< rx dma descriptor underflow errors */ 5363 5364 uint32 d11cnt_txrts_off; /**< d11cnt txrts value when reset d11cnt */ 5365 uint32 d11cnt_rxcrc_off; /**< d11cnt rxcrc value when reset d11cnt */ 5366 uint32 d11cnt_txnocts_off; /**< d11cnt txnocts value when reset d11cnt */ 5367 5368 /* misc counters */ 5369 uint32 dmade; /**< tx/rx dma descriptor errors */ 5370 uint32 dmada; /**< tx/rx dma data errors */ 5371 uint32 dmape; /**< tx/rx dma descriptor protocol errors */ 5372 uint32 reset; /**< reset count */ 5373 uint32 tbtt; /**< cnts the TBTT int's */ 5374 uint32 txdmawar; /**< # occurrences of PR15420 workaround */ 5375 uint32 pkt_callback_reg_fail; /**< callbacks register failure */ 5376 5377 /* MAC counters: 32-bit version of d11.h's macstat_t */ 5378 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 5379 * Control Management (includes retransmissions) 5380 */ 5381 uint32 txrtsfrm; /**< number of RTS sent out by the MAC */ 5382 uint32 txctsfrm; /**< number of CTS sent out by the MAC */ 5383 uint32 txackfrm; /**< number of ACK frames sent out */ 5384 uint32 txdnlfrm; /**< Not used */ 5385 uint32 txbcnfrm; /**< beacons transmitted */ 5386 uint32 txfunfl[6]; /**< per-fifo tx underflows */ 5387 uint32 rxtoolate; /**< receive too late */ 5388 uint32 txfbw; /**< transmit at fallback bw (dynamic bw) */ 5389 uint32 txtplunfl; /**< Template underflows (mac was too slow to transmit ACK/CTS 5390 * or BCN) 5391 */ 5392 uint32 txphyerror; /**< Transmit phy error, type of error is reported in tx-status for 5393 * driver enqueued frames 5394 */ 5395 uint32 rxfrmtoolong; /**< Received frame longer than legal limit (2346 bytes) */ 5396 uint32 rxfrmtooshrt; /**< Received frame did not contain enough bytes for its frame type */ 5397 uint32 rxinvmachdr; /**< Either the protocol version != 0 or frame type not 5398 * data/control/management 5399 */ 5400 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 5401 uint32 rxbadplcp; /**< parity check of the PLCP header failed */ 5402 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 5403 uint32 rxstrt; /**< Number of received frames with a good PLCP 5404 * (i.e. passing parity check) 5405 */ 5406 uint32 rxdfrmucastmbss; /* Number of received DATA frames with good FCS and matching RA */ 5407 uint32 rxmfrmucastmbss; /* number of received mgmt frames with good FCS and matching RA */ 5408 uint32 rxcfrmucast; /**< number of received CNTRL frames with good FCS and matching RA */ 5409 uint32 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 5410 uint32 rxctsucast; /**< number of unicast CTS addressed to the MAC (good FCS) */ 5411 uint32 rxackucast; /**< number of ucast ACKS received (good FCS) */ 5412 uint32 rxdfrmocast; /**< number of received DATA frames (good FCS and not matching RA) */ 5413 uint32 rxmfrmocast; /**< number of received MGMT frames (good FCS and not matching RA) */ 5414 uint32 rxcfrmocast; /**< number of received CNTRL frame (good FCS and not matching RA) */ 5415 uint32 rxrtsocast; /**< number of received RTS not addressed to the MAC */ 5416 uint32 rxctsocast; /**< number of received CTS not addressed to the MAC */ 5417 uint32 rxdfrmmcast; /**< number of RX Data multicast frames received by the MAC */ 5418 uint32 rxmfrmmcast; /**< number of RX Management multicast frames received by the MAC */ 5419 uint32 rxcfrmmcast; /**< number of RX Control multicast frames received by the MAC 5420 * (unlikely to see these) 5421 */ 5422 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 5423 uint32 rxdfrmucastobss; /**< number of unicast frames addressed to the MAC from 5424 * other BSS (WDS FRAME) 5425 */ 5426 uint32 rxbeaconobss; /**< beacons received from other BSS */ 5427 uint32 rxrsptmout; /**< Number of response timeouts for transmitted frames 5428 * expecting a response 5429 */ 5430 uint32 bcntxcancl; /**< transmit beacons canceled due to receipt of beacon (IBSS) */ 5431 uint32 rxf0ovfl; /**< Number of receive fifo 0 overflows */ 5432 uint32 rxf1ovfl; /**< Number of receive fifo 1 overflows (obsolete) */ 5433 uint32 rxf2ovfl; /**< Number of receive fifo 2 overflows (obsolete) */ 5434 uint32 txsfovfl; /**< Number of transmit status fifo overflows (obsolete) */ 5435 uint32 pmqovfl; /**< Number of PMQ overflows */ 5436 uint32 rxcgprqfrm; /**< Number of received Probe requests that made it into 5437 * the PRQ fifo 5438 */ 5439 uint32 rxcgprsqovfl; /**< Rx Probe Request Que overflow in the AP */ 5440 uint32 txcgprsfail; /**< Tx Probe Response Fail. AP sent probe response but did 5441 * not get ACK 5442 */ 5443 uint32 txcgprssuc; /**< Tx Probe Response Success (ACK was received) */ 5444 uint32 prs_timeout; /**< Number of probe requests that were dropped from the PRQ 5445 * fifo because a probe response could not be sent out within 5446 * the time limit defined in M_PRS_MAXTIME 5447 */ 5448 uint32 rxnack; /**< obsolete */ 5449 uint32 frmscons; /**< obsolete */ 5450 uint32 txnack; /**< obsolete */ 5451 uint32 rxback; /**< blockack rxcnt */ 5452 uint32 txback; /**< blockack txcnt */ 5453 5454 /* 802.11 MIB counters, pp. 614 of 802.11 reaff doc. */ 5455 uint32 txfrag; /**< dot11TransmittedFragmentCount */ 5456 uint32 txmulti; /**< dot11MulticastTransmittedFrameCount */ 5457 uint32 txfail; /**< dot11FailedCount */ 5458 uint32 txretry; /**< dot11RetryCount */ 5459 uint32 txretrie; /**< dot11MultipleRetryCount */ 5460 uint32 rxdup; /**< dot11FrameduplicateCount */ 5461 uint32 txrts; /**< dot11RTSSuccessCount */ 5462 uint32 txnocts; /**< dot11RTSFailureCount */ 5463 uint32 txnoack; /**< dot11ACKFailureCount */ 5464 uint32 rxfrag; /**< dot11ReceivedFragmentCount */ 5465 uint32 rxmulti; /**< dot11MulticastReceivedFrameCount */ 5466 uint32 rxcrc; /**< dot11FCSErrorCount */ 5467 uint32 txfrmsnt; /**< dot11TransmittedFrameCount (bogus MIB?) */ 5468 uint32 rxundec; /**< dot11WEPUndecryptableCount */ 5469 5470 /* WPA2 counters (see rxundec for DecryptFailureCount) */ 5471 uint32 tkipmicfaill; /**< TKIPLocalMICFailures */ 5472 uint32 tkipcntrmsr; /**< TKIPCounterMeasuresInvoked */ 5473 uint32 tkipreplay; /**< TKIPReplays */ 5474 uint32 ccmpfmterr; /**< CCMPFormatErrors */ 5475 uint32 ccmpreplay; /**< CCMPReplays */ 5476 uint32 ccmpundec; /**< CCMPDecryptErrors */ 5477 uint32 fourwayfail; /**< FourWayHandshakeFailures */ 5478 uint32 wepundec; /**< dot11WEPUndecryptableCount */ 5479 uint32 wepicverr; /**< dot11WEPICVErrorCount */ 5480 uint32 decsuccess; /**< DecryptSuccessCount */ 5481 uint32 tkipicverr; /**< TKIPICVErrorCount */ 5482 uint32 wepexcluded; /**< dot11WEPExcludedCount */ 5483 5484 uint32 txchanrej; /**< Tx frames suppressed due to channel rejection */ 5485 uint32 psmwds; /**< Count PSM watchdogs */ 5486 uint32 phywatchdog; /**< Count Phy watchdogs (triggered by ucode) */ 5487 5488 /* MBSS counters, AP only */ 5489 uint32 prq_entries_handled; /**< PRQ entries read in */ 5490 uint32 prq_undirected_entries; /**< which were bcast bss & ssid */ 5491 uint32 prq_bad_entries; /**< which could not be translated to info */ 5492 uint32 atim_suppress_count; /**< TX suppressions on ATIM fifo */ 5493 uint32 bcn_template_not_ready; /**< Template marked in use on send bcn ... */ 5494 uint32 bcn_template_not_ready_done; /**< ...but "DMA done" interrupt rcvd */ 5495 uint32 late_tbtt_dpc; /**< TBTT DPC did not happen in time */ 5496 5497 /* per-rate receive stat counters */ 5498 uint32 rx1mbps; /**< packets rx at 1Mbps */ 5499 uint32 rx2mbps; /**< packets rx at 2Mbps */ 5500 uint32 rx5mbps5; /**< packets rx at 5.5Mbps */ 5501 uint32 rx6mbps; /**< packets rx at 6Mbps */ 5502 uint32 rx9mbps; /**< packets rx at 9Mbps */ 5503 uint32 rx11mbps; /**< packets rx at 11Mbps */ 5504 uint32 rx12mbps; /**< packets rx at 12Mbps */ 5505 uint32 rx18mbps; /**< packets rx at 18Mbps */ 5506 uint32 rx24mbps; /**< packets rx at 24Mbps */ 5507 uint32 rx36mbps; /**< packets rx at 36Mbps */ 5508 uint32 rx48mbps; /**< packets rx at 48Mbps */ 5509 uint32 rx54mbps; /**< packets rx at 54Mbps */ 5510 uint32 rx108mbps; /**< packets rx at 108mbps */ 5511 uint32 rx162mbps; /**< packets rx at 162mbps */ 5512 uint32 rx216mbps; /**< packets rx at 216 mbps */ 5513 uint32 rx270mbps; /**< packets rx at 270 mbps */ 5514 uint32 rx324mbps; /**< packets rx at 324 mbps */ 5515 uint32 rx378mbps; /**< packets rx at 378 mbps */ 5516 uint32 rx432mbps; /**< packets rx at 432 mbps */ 5517 uint32 rx486mbps; /**< packets rx at 486 mbps */ 5518 uint32 rx540mbps; /**< packets rx at 540 mbps */ 5519 5520 /* pkteng rx frame stats */ 5521 uint32 pktengrxducast; /**< unicast frames rxed by the pkteng code */ 5522 uint32 pktengrxdmcast; /**< multicast frames rxed by the pkteng code */ 5523 5524 uint32 rfdisable; /**< count of radio disables */ 5525 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 5526 uint32 bphy_badplcp; 5527 5528 uint32 txexptime; /**< Tx frames suppressed due to timer expiration */ 5529 5530 uint32 txmpdu_sgi; /**< count for sgi transmit */ 5531 uint32 rxmpdu_sgi; /**< count for sgi received */ 5532 uint32 txmpdu_stbc; /**< count for stbc transmit */ 5533 uint32 rxmpdu_stbc; /**< count for stbc received */ 5534 5535 uint32 rxundec_mcst; /**< dot11WEPUndecryptableCount */ 5536 5537 /* WPA2 counters (see rxundec for DecryptFailureCount) */ 5538 uint32 tkipmicfaill_mcst; /**< TKIPLocalMICFailures */ 5539 uint32 tkipcntrmsr_mcst; /**< TKIPCounterMeasuresInvoked */ 5540 uint32 tkipreplay_mcst; /**< TKIPReplays */ 5541 uint32 ccmpfmterr_mcst; /**< CCMPFormatErrors */ 5542 uint32 ccmpreplay_mcst; /**< CCMPReplays */ 5543 uint32 ccmpundec_mcst; /**< CCMPDecryptErrors */ 5544 uint32 fourwayfail_mcst; /**< FourWayHandshakeFailures */ 5545 uint32 wepundec_mcst; /**< dot11WEPUndecryptableCount */ 5546 uint32 wepicverr_mcst; /**< dot11WEPICVErrorCount */ 5547 uint32 decsuccess_mcst; /**< DecryptSuccessCount */ 5548 uint32 tkipicverr_mcst; /**< TKIPICVErrorCount */ 5549 uint32 wepexcluded_mcst; /**< dot11WEPExcludedCount */ 5550 5551 uint32 dma_hang; /**< count for dma hang */ 5552 uint32 reinit; /**< count for reinit */ 5553 5554 uint32 pstatxucast; /**< count of ucast frames xmitted on all psta assoc */ 5555 uint32 pstatxnoassoc; /**< count of txnoassoc frames xmitted on all psta assoc */ 5556 uint32 pstarxucast; /**< count of ucast frames received on all psta assoc */ 5557 uint32 pstarxbcmc; /**< count of bcmc frames received on all psta */ 5558 uint32 pstatxbcmc; /**< count of bcmc frames transmitted on all psta */ 5559 5560 uint32 cso_passthrough; /**< hw cso required but passthrough */ 5561 uint32 cso_normal; /**< hw cso hdr for normal process */ 5562 uint32 chained; /**< number of frames chained */ 5563 uint32 chainedsz1; /**< number of chain size 1 frames */ 5564 uint32 unchained; /**< number of frames not chained */ 5565 uint32 maxchainsz; /**< max chain size so far */ 5566 uint32 currchainsz; /**< current chain size */ 5567 uint32 rxdrop20s; /**< drop secondary cnt */ 5568 uint32 pciereset; /**< Secondary Bus Reset issued by driver */ 5569 uint32 cfgrestore; /**< configspace restore by driver */ 5570 uint32 reinitreason[NREINITREASONCOUNT]; /**< reinitreason counters; 0: Unknown reason */ 5571 uint32 rxrtry; /**< num of received packets with retry bit on */ 5572 uint32 txmpdu; /**< macstat cnt only valid in ver 11. number of MPDUs txed. */ 5573 uint32 rxnodelim; /**< macstat cnt only valid in ver 11. 5574 * number of occasions that no valid delimiter is detected 5575 * by ampdu parser. 5576 */ 5577 uint32 rxmpdu_mu; /**< Number of MU MPDUs received */ 5578 5579 /* detailed control/management frames */ 5580 uint32 txbar; /**< Number of TX BAR */ 5581 uint32 rxbar; /**< Number of RX BAR */ 5582 uint32 txpspoll; /**< Number of TX PS-poll */ 5583 uint32 rxpspoll; /**< Number of RX PS-poll */ 5584 uint32 txnull; /**< Number of TX NULL_DATA */ 5585 uint32 rxnull; /**< Number of RX NULL_DATA */ 5586 uint32 txqosnull; /**< Number of TX NULL_QoSDATA */ 5587 uint32 rxqosnull; /**< Number of RX NULL_QoSDATA */ 5588 uint32 txassocreq; /**< Number of TX ASSOC request */ 5589 uint32 rxassocreq; /**< Number of RX ASSOC request */ 5590 uint32 txreassocreq; /**< Number of TX REASSOC request */ 5591 uint32 rxreassocreq; /**< Number of RX REASSOC request */ 5592 uint32 txdisassoc; /**< Number of TX DISASSOC */ 5593 uint32 rxdisassoc; /**< Number of RX DISASSOC */ 5594 uint32 txassocrsp; /**< Number of TX ASSOC response */ 5595 uint32 rxassocrsp; /**< Number of RX ASSOC response */ 5596 uint32 txreassocrsp; /**< Number of TX REASSOC response */ 5597 uint32 rxreassocrsp; /**< Number of RX REASSOC response */ 5598 uint32 txauth; /**< Number of TX AUTH */ 5599 uint32 rxauth; /**< Number of RX AUTH */ 5600 uint32 txdeauth; /**< Number of TX DEAUTH */ 5601 uint32 rxdeauth; /**< Number of RX DEAUTH */ 5602 uint32 txprobereq; /**< Number of TX probe request */ 5603 uint32 rxprobereq; /**< Number of RX probe request */ 5604 uint32 txprobersp; /**< Number of TX probe response */ 5605 uint32 rxprobersp; /**< Number of RX probe response */ 5606 uint32 txaction; /**< Number of TX action frame */ 5607 uint32 rxaction; /**< Number of RX action frame */ 5608 uint32 ampdu_wds; /**< Number of AMPDU watchdogs */ 5609 uint32 txlost; /**< Number of lost packets reported in txs */ 5610 uint32 txdatamcast; /**< Number of TX multicast data packets */ 5611 uint32 txdatabcast; /**< Number of TX broadcast data packets */ 5612 uint32 txbcast; /* Broadcast TransmittedFrameCount */ 5613 uint32 txdropped; /* tx dropped pkts */ 5614 uint32 rxbcast; /* BroadcastReceivedFrameCount */ 5615 uint32 rxdropped; /* rx dropped pkts (derived: sum of others) */ 5616 5617 /* This structure is deprecated and used only for ver <= 11. 5618 * All counter variables have to be of uint32. 5619 */ 5620 } wl_cnt_ver_11_t; 5621 5622 typedef struct { 5623 uint16 version; /* see definition of WL_CNT_T_VERSION */ 5624 uint16 length; /* length of entire structure */ 5625 5626 /* transmit stat counters */ 5627 uint32 txframe; /* tx data frames */ 5628 uint32 txbyte; /* tx data bytes */ 5629 uint32 txretrans; /* tx mac retransmits */ 5630 uint32 txerror; /* tx data errors (derived: sum of others) */ 5631 uint32 txctl; /* tx management frames */ 5632 uint32 txprshort; /* tx short preamble frames */ 5633 uint32 txserr; /* tx status errors */ 5634 uint32 txnobuf; /* tx out of buffers errors */ 5635 uint32 txnoassoc; /* tx discard because we're not associated */ 5636 uint32 txrunt; /* tx runt frames */ 5637 uint32 txchit; /* tx header cache hit (fastpath) */ 5638 uint32 txcmiss; /* tx header cache miss (slowpath) */ 5639 5640 /* transmit chip error counters */ 5641 uint32 txuflo; /* tx fifo underflows */ 5642 uint32 txphyerr; /* tx phy errors (indicated in tx status) */ 5643 uint32 txphycrs; /* PR8861/8963 counter */ 5644 5645 /* receive stat counters */ 5646 uint32 rxframe; /* rx data frames */ 5647 uint32 rxbyte; /* rx data bytes */ 5648 uint32 rxerror; /* rx data errors (derived: sum of others) */ 5649 uint32 rxctl; /* rx management frames */ 5650 uint32 rxnobuf; /* rx out of buffers errors */ 5651 uint32 rxnondata; /* rx non data frames in the data channel errors */ 5652 uint32 rxbadds; /* rx bad DS errors */ 5653 uint32 rxbadcm; /* rx bad control or management frames */ 5654 uint32 rxfragerr; /* rx fragmentation errors */ 5655 uint32 rxrunt; /* rx runt frames */ 5656 uint32 rxgiant; /* rx giant frames */ 5657 uint32 rxnoscb; /* rx no scb error */ 5658 uint32 rxbadproto; /* rx invalid frames */ 5659 uint32 rxbadsrcmac; /* rx frames with Invalid Src Mac */ 5660 uint32 rxbadda; /* rx frames tossed for invalid da */ 5661 uint32 rxfilter; /* rx frames filtered out */ 5662 5663 /* receive chip error counters */ 5664 uint32 rxoflo; /* rx fifo overflow errors */ 5665 uint32 rxuflo[NFIFO]; /* rx dma descriptor underflow errors */ 5666 5667 uint32 d11cnt_txrts_off; /* d11cnt txrts value when reset d11cnt */ 5668 uint32 d11cnt_rxcrc_off; /* d11cnt rxcrc value when reset d11cnt */ 5669 uint32 d11cnt_txnocts_off; /* d11cnt txnocts value when reset d11cnt */ 5670 5671 /* misc counters */ 5672 uint32 dmade; /* tx/rx dma descriptor errors */ 5673 uint32 dmada; /* tx/rx dma data errors */ 5674 uint32 dmape; /* tx/rx dma descriptor protocol errors */ 5675 uint32 reset; /* reset count */ 5676 uint32 tbtt; /* cnts the TBTT int's */ 5677 uint32 txdmawar; /* # occurrences of PR15420 workaround */ 5678 uint32 pkt_callback_reg_fail; /* callbacks register failure */ 5679 5680 /* MAC counters: 32-bit version of d11.h's macstat_t */ 5681 uint32 txallfrm; /* total number of frames sent, incl. Data, ACK, RTS, CTS, 5682 * Control Management (includes retransmissions) 5683 */ 5684 uint32 txrtsfrm; /* number of RTS sent out by the MAC */ 5685 uint32 txctsfrm; /* number of CTS sent out by the MAC */ 5686 uint32 txackfrm; /* number of ACK frames sent out */ 5687 uint32 txdnlfrm; /* Not used */ 5688 uint32 txbcnfrm; /* beacons transmitted */ 5689 uint32 txfunfl[8]; /* per-fifo tx underflows */ 5690 uint32 txtplunfl; /* Template underflows (mac was too slow to transmit ACK/CTS 5691 * or BCN) 5692 */ 5693 uint32 txphyerror; /* Transmit phy error, type of error is reported in tx-status for 5694 * driver enqueued frames 5695 */ 5696 uint32 rxfrmtoolong; /* Received frame longer than legal limit (2346 bytes) */ 5697 uint32 rxfrmtooshrt; /* Received frame did not contain enough bytes for its frame type */ 5698 uint32 rxinvmachdr; /* Either the protocol version != 0 or frame type not 5699 * data/control/management 5700 */ 5701 uint32 rxbadfcs; /* number of frames for which the CRC check failed in the MAC */ 5702 uint32 rxbadplcp; /* parity check of the PLCP header failed */ 5703 uint32 rxcrsglitch; /* PHY was able to correlate the preamble but not the header */ 5704 uint32 rxstrt; /* Number of received frames with a good PLCP 5705 * (i.e. passing parity check) 5706 */ 5707 uint32 rxdfrmucastmbss; /* Number of received DATA frames with good FCS and matching RA */ 5708 uint32 rxmfrmucastmbss; /* number of received mgmt frames with good FCS and matching RA */ 5709 uint32 rxcfrmucast; /* number of received CNTRL frames with good FCS and matching RA */ 5710 uint32 rxrtsucast; /* number of unicast RTS addressed to the MAC (good FCS) */ 5711 uint32 rxctsucast; /* number of unicast CTS addressed to the MAC (good FCS) */ 5712 uint32 rxackucast; /* number of ucast ACKS received (good FCS) */ 5713 uint32 rxdfrmocast; /* number of received DATA frames (good FCS and not matching RA) */ 5714 uint32 rxmfrmocast; /* number of received MGMT frames (good FCS and not matching RA) */ 5715 uint32 rxcfrmocast; /* number of received CNTRL frame (good FCS and not matching RA) */ 5716 uint32 rxrtsocast; /* number of received RTS not addressed to the MAC */ 5717 uint32 rxctsocast; /* number of received CTS not addressed to the MAC */ 5718 uint32 rxdfrmmcast; /* number of RX Data multicast frames received by the MAC */ 5719 uint32 rxmfrmmcast; /* number of RX Management multicast frames received by the MAC */ 5720 uint32 rxcfrmmcast; /* number of RX Control multicast frames received by the MAC 5721 * (unlikely to see these) 5722 */ 5723 uint32 rxbeaconmbss; /* beacons received from member of BSS */ 5724 uint32 rxdfrmucastobss; /* number of unicast frames addressed to the MAC from 5725 * other BSS (WDS FRAME) 5726 */ 5727 uint32 rxbeaconobss; /* beacons received from other BSS */ 5728 uint32 rxrsptmout; /* Number of response timeouts for transmitted frames 5729 * expecting a response 5730 */ 5731 uint32 bcntxcancl; /* transmit beacons canceled due to receipt of beacon (IBSS) */ 5732 uint32 rxf0ovfl; /* Number of receive fifo 0 overflows */ 5733 uint32 rxf1ovfl; /* Number of receive fifo 1 overflows (obsolete) */ 5734 uint32 rxf2ovfl; /* Number of receive fifo 2 overflows (obsolete) */ 5735 uint32 txsfovfl; /* Number of transmit status fifo overflows (obsolete) */ 5736 uint32 pmqovfl; /* Number of PMQ overflows */ 5737 uint32 rxcgprqfrm; /* Number of received Probe requests that made it into 5738 * the PRQ fifo 5739 */ 5740 uint32 rxcgprsqovfl; /* Rx Probe Request Que overflow in the AP */ 5741 uint32 txcgprsfail; /* Tx Probe Response Fail. AP sent probe response but did 5742 * not get ACK 5743 */ 5744 uint32 txcgprssuc; /* Tx Probe Response Success (ACK was received) */ 5745 uint32 prs_timeout; /* Number of probe requests that were dropped from the PRQ 5746 * fifo because a probe response could not be sent out within 5747 * the time limit defined in M_PRS_MAXTIME 5748 */ 5749 uint32 rxnack; /* obsolete */ 5750 uint32 frmscons; /* obsolete */ 5751 uint32 txnack; /* obsolete */ 5752 uint32 txglitch_nack; /* obsolete */ 5753 uint32 txburst; /* obsolete */ 5754 5755 /* 802.11 MIB counters, pp. 614 of 802.11 reaff doc. */ 5756 uint32 txfrag; /* dot11TransmittedFragmentCount */ 5757 uint32 txmulti; /* dot11MulticastTransmittedFrameCount */ 5758 uint32 txfail; /* dot11FailedCount */ 5759 uint32 txretry; /* dot11RetryCount */ 5760 uint32 txretrie; /* dot11MultipleRetryCount */ 5761 uint32 rxdup; /* dot11FrameduplicateCount */ 5762 uint32 txrts; /* dot11RTSSuccessCount */ 5763 uint32 txnocts; /* dot11RTSFailureCount */ 5764 uint32 txnoack; /* dot11ACKFailureCount */ 5765 uint32 rxfrag; /* dot11ReceivedFragmentCount */ 5766 uint32 rxmulti; /* dot11MulticastReceivedFrameCount */ 5767 uint32 rxcrc; /* dot11FCSErrorCount */ 5768 uint32 txfrmsnt; /* dot11TransmittedFrameCount (bogus MIB?) */ 5769 uint32 rxundec; /* dot11WEPUndecryptableCount */ 5770 5771 /* WPA2 counters (see rxundec for DecryptFailureCount) */ 5772 uint32 tkipmicfaill; /* TKIPLocalMICFailures */ 5773 uint32 tkipcntrmsr; /* TKIPCounterMeasuresInvoked */ 5774 uint32 tkipreplay; /* TKIPReplays */ 5775 uint32 ccmpfmterr; /* CCMPFormatErrors */ 5776 uint32 ccmpreplay; /* CCMPReplays */ 5777 uint32 ccmpundec; /* CCMPDecryptErrors */ 5778 uint32 fourwayfail; /* FourWayHandshakeFailures */ 5779 uint32 wepundec; /* dot11WEPUndecryptableCount */ 5780 uint32 wepicverr; /* dot11WEPICVErrorCount */ 5781 uint32 decsuccess; /* DecryptSuccessCount */ 5782 uint32 tkipicverr; /* TKIPICVErrorCount */ 5783 uint32 wepexcluded; /* dot11WEPExcludedCount */ 5784 5785 uint32 txchanrej; /* Tx frames suppressed due to channel rejection */ 5786 uint32 psmwds; /* Count PSM watchdogs */ 5787 uint32 phywatchdog; /* Count Phy watchdogs (triggered by ucode) */ 5788 5789 /* MBSS counters, AP only */ 5790 uint32 prq_entries_handled; /* PRQ entries read in */ 5791 uint32 prq_undirected_entries; /* which were bcast bss & ssid */ 5792 uint32 prq_bad_entries; /* which could not be translated to info */ 5793 uint32 atim_suppress_count; /* TX suppressions on ATIM fifo */ 5794 uint32 bcn_template_not_ready; /* Template marked in use on send bcn ... */ 5795 uint32 bcn_template_not_ready_done; /* ...but "DMA done" interrupt rcvd */ 5796 uint32 late_tbtt_dpc; /* TBTT DPC did not happen in time */ 5797 5798 /* per-rate receive stat counters */ 5799 uint32 rx1mbps; /* packets rx at 1Mbps */ 5800 uint32 rx2mbps; /* packets rx at 2Mbps */ 5801 uint32 rx5mbps5; /* packets rx at 5.5Mbps */ 5802 uint32 rx6mbps; /* packets rx at 6Mbps */ 5803 uint32 rx9mbps; /* packets rx at 9Mbps */ 5804 uint32 rx11mbps; /* packets rx at 11Mbps */ 5805 uint32 rx12mbps; /* packets rx at 12Mbps */ 5806 uint32 rx18mbps; /* packets rx at 18Mbps */ 5807 uint32 rx24mbps; /* packets rx at 24Mbps */ 5808 uint32 rx36mbps; /* packets rx at 36Mbps */ 5809 uint32 rx48mbps; /* packets rx at 48Mbps */ 5810 uint32 rx54mbps; /* packets rx at 54Mbps */ 5811 uint32 rx108mbps; /* packets rx at 108mbps */ 5812 uint32 rx162mbps; /* packets rx at 162mbps */ 5813 uint32 rx216mbps; /* packets rx at 216 mbps */ 5814 uint32 rx270mbps; /* packets rx at 270 mbps */ 5815 uint32 rx324mbps; /* packets rx at 324 mbps */ 5816 uint32 rx378mbps; /* packets rx at 378 mbps */ 5817 uint32 rx432mbps; /* packets rx at 432 mbps */ 5818 uint32 rx486mbps; /* packets rx at 486 mbps */ 5819 uint32 rx540mbps; /* packets rx at 540 mbps */ 5820 5821 /* pkteng rx frame stats */ 5822 uint32 pktengrxducast; /* unicast frames rxed by the pkteng code */ 5823 uint32 pktengrxdmcast; /* multicast frames rxed by the pkteng code */ 5824 5825 uint32 rfdisable; /* count of radio disables */ 5826 uint32 bphy_rxcrsglitch; /* PHY count of bphy glitches */ 5827 5828 uint32 txexptime; /* Tx frames suppressed due to timer expiration */ 5829 5830 uint32 txmpdu_sgi; /* count for sgi transmit */ 5831 uint32 rxmpdu_sgi; /* count for sgi received */ 5832 uint32 txmpdu_stbc; /* count for stbc transmit */ 5833 uint32 rxmpdu_stbc; /* count for stbc received */ 5834 5835 uint32 rxundec_mcst; /* dot11WEPUndecryptableCount */ 5836 5837 /* WPA2 counters (see rxundec for DecryptFailureCount) */ 5838 uint32 tkipmicfaill_mcst; /* TKIPLocalMICFailures */ 5839 uint32 tkipcntrmsr_mcst; /* TKIPCounterMeasuresInvoked */ 5840 uint32 tkipreplay_mcst; /* TKIPReplays */ 5841 uint32 ccmpfmterr_mcst; /* CCMPFormatErrors */ 5842 uint32 ccmpreplay_mcst; /* CCMPReplays */ 5843 uint32 ccmpundec_mcst; /* CCMPDecryptErrors */ 5844 uint32 fourwayfail_mcst; /* FourWayHandshakeFailures */ 5845 uint32 wepundec_mcst; /* dot11WEPUndecryptableCount */ 5846 uint32 wepicverr_mcst; /* dot11WEPICVErrorCount */ 5847 uint32 decsuccess_mcst; /* DecryptSuccessCount */ 5848 uint32 tkipicverr_mcst; /* TKIPICVErrorCount */ 5849 uint32 wepexcluded_mcst; /* dot11WEPExcludedCount */ 5850 5851 uint32 dma_hang; /* count for stbc received */ 5852 uint32 rxrtry; /* number of packets with retry bit set to 1 */ 5853 } wl_cnt_ver_7_t; 5854 5855 typedef struct { 5856 uint16 version; /**< see definition of WL_CNT_T_VERSION */ 5857 uint16 length; /**< length of entire structure */ 5858 5859 /* transmit stat counters */ 5860 uint32 txframe; /**< tx data frames */ 5861 uint32 txbyte; /**< tx data bytes */ 5862 uint32 txretrans; /**< tx mac retransmits */ 5863 uint32 txerror; /**< tx data errors (derived: sum of others) */ 5864 uint32 txctl; /**< tx management frames */ 5865 uint32 txprshort; /**< tx short preamble frames */ 5866 uint32 txserr; /**< tx status errors */ 5867 uint32 txnobuf; /**< tx out of buffers errors */ 5868 uint32 txnoassoc; /**< tx discard because we're not associated */ 5869 uint32 txrunt; /**< tx runt frames */ 5870 uint32 txchit; /**< tx header cache hit (fastpath) */ 5871 uint32 txcmiss; /**< tx header cache miss (slowpath) */ 5872 5873 /* transmit chip error counters */ 5874 uint32 txuflo; /**< tx fifo underflows */ 5875 uint32 txphyerr; /**< tx phy errors (indicated in tx status) */ 5876 uint32 txphycrs; /**< PR8861/8963 counter */ 5877 5878 /* receive stat counters */ 5879 uint32 rxframe; /**< rx data frames */ 5880 uint32 rxbyte; /**< rx data bytes */ 5881 uint32 rxerror; /**< rx data errors (derived: sum of others) */ 5882 uint32 rxctl; /**< rx management frames */ 5883 uint32 rxnobuf; /**< rx out of buffers errors */ 5884 uint32 rxnondata; /**< rx non data frames in the data channel errors */ 5885 uint32 rxbadds; /**< rx bad DS errors */ 5886 uint32 rxbadcm; /**< rx bad control or management frames */ 5887 uint32 rxfragerr; /**< rx fragmentation errors */ 5888 uint32 rxrunt; /**< rx runt frames */ 5889 uint32 rxgiant; /**< rx giant frames */ 5890 uint32 rxnoscb; /**< rx no scb error */ 5891 uint32 rxbadproto; /**< rx invalid frames */ 5892 uint32 rxbadsrcmac; /**< rx frames with Invalid Src Mac */ 5893 uint32 rxbadda; /**< rx frames tossed for invalid da */ 5894 uint32 rxfilter; /**< rx frames filtered out */ 5895 5896 /* receive chip error counters */ 5897 uint32 rxoflo; /**< rx fifo overflow errors */ 5898 uint32 rxuflo[NFIFO]; /**< rx dma descriptor underflow errors */ 5899 5900 uint32 d11cnt_txrts_off; /**< d11cnt txrts value when reset d11cnt */ 5901 uint32 d11cnt_rxcrc_off; /**< d11cnt rxcrc value when reset d11cnt */ 5902 uint32 d11cnt_txnocts_off; /**< d11cnt txnocts value when reset d11cnt */ 5903 5904 /* misc counters */ 5905 uint32 dmade; /**< tx/rx dma descriptor errors */ 5906 uint32 dmada; /**< tx/rx dma data errors */ 5907 uint32 dmape; /**< tx/rx dma descriptor protocol errors */ 5908 uint32 reset; /**< reset count */ 5909 uint32 tbtt; /**< cnts the TBTT int's */ 5910 uint32 txdmawar; /**< # occurrences of PR15420 workaround */ 5911 uint32 pkt_callback_reg_fail; /**< callbacks register failure */ 5912 5913 /* MAC counters: 32-bit version of d11.h's macstat_t */ 5914 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 5915 * Control Management (includes retransmissions) 5916 */ 5917 uint32 txrtsfrm; /**< number of RTS sent out by the MAC */ 5918 uint32 txctsfrm; /**< number of CTS sent out by the MAC */ 5919 uint32 txackfrm; /**< number of ACK frames sent out */ 5920 uint32 txdnlfrm; /**< Not used */ 5921 uint32 txbcnfrm; /**< beacons transmitted */ 5922 uint32 txfunfl[6]; /**< per-fifo tx underflows */ 5923 uint32 rxtoolate; /**< receive too late */ 5924 uint32 txfbw; /**< transmit at fallback bw (dynamic bw) */ 5925 uint32 txtplunfl; /**< Template underflows (mac was too slow to transmit ACK/CTS 5926 * or BCN) 5927 */ 5928 uint32 txphyerror; /**< Transmit phy error, type of error is reported in tx-status for 5929 * driver enqueued frames 5930 */ 5931 uint32 rxfrmtoolong; /**< Received frame longer than legal limit (2346 bytes) */ 5932 uint32 rxfrmtooshrt; /**< Received frame did not contain enough bytes for its frame type */ 5933 uint32 rxinvmachdr; /**< Either the protocol version != 0 or frame type not 5934 * data/control/management 5935 */ 5936 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 5937 uint32 rxbadplcp; /**< parity check of the PLCP header failed */ 5938 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 5939 uint32 rxstrt; /**< Number of received frames with a good PLCP 5940 * (i.e. passing parity check) 5941 */ 5942 uint32 rxdfrmucastmbss; /**< # of received DATA frames with good FCS and matching RA */ 5943 uint32 rxmfrmucastmbss; /**< # of received mgmt frames with good FCS and matching RA */ 5944 uint32 rxcfrmucast; /**< # of received CNTRL frames with good FCS and matching RA */ 5945 uint32 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 5946 uint32 rxctsucast; /**< number of unicast CTS addressed to the MAC (good FCS) */ 5947 uint32 rxackucast; /**< number of ucast ACKS received (good FCS) */ 5948 uint32 rxdfrmocast; /**< # of received DATA frames (good FCS and not matching RA) */ 5949 uint32 rxmfrmocast; /**< # of received MGMT frames (good FCS and not matching RA) */ 5950 uint32 rxcfrmocast; /**< # of received CNTRL frame (good FCS and not matching RA) */ 5951 uint32 rxrtsocast; /**< number of received RTS not addressed to the MAC */ 5952 uint32 rxctsocast; /**< number of received CTS not addressed to the MAC */ 5953 uint32 rxdfrmmcast; /**< number of RX Data multicast frames received by the MAC */ 5954 uint32 rxmfrmmcast; /**< number of RX Management multicast frames received by the MAC */ 5955 uint32 rxcfrmmcast; /**< number of RX Control multicast frames received by the MAC 5956 * (unlikely to see these) 5957 */ 5958 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 5959 uint32 rxdfrmucastobss; /**< number of unicast frames addressed to the MAC from 5960 * other BSS (WDS FRAME) 5961 */ 5962 uint32 rxbeaconobss; /**< beacons received from other BSS */ 5963 uint32 rxrsptmout; /**< Number of response timeouts for transmitted frames 5964 * expecting a response 5965 */ 5966 uint32 bcntxcancl; /**< transmit beacons canceled due to receipt of beacon (IBSS) */ 5967 uint32 rxf0ovfl; /**< Number of receive fifo 0 overflows */ 5968 uint32 rxf1ovfl; /**< Number of receive fifo 1 overflows (obsolete) */ 5969 uint32 rxf2ovfl; /**< Number of receive fifo 2 overflows (obsolete) */ 5970 uint32 txsfovfl; /**< Number of transmit status fifo overflows (obsolete) */ 5971 uint32 pmqovfl; /**< Number of PMQ overflows */ 5972 uint32 rxcgprqfrm; /**< Number of received Probe requests that made it into 5973 * the PRQ fifo 5974 */ 5975 uint32 rxcgprsqovfl; /**< Rx Probe Request Que overflow in the AP */ 5976 uint32 txcgprsfail; /**< Tx Probe Response Fail. AP sent probe response but did 5977 * not get ACK 5978 */ 5979 uint32 txcgprssuc; /**< Tx Probe Response Success (ACK was received) */ 5980 uint32 prs_timeout; /**< Number of probe requests that were dropped from the PRQ 5981 * fifo because a probe response could not be sent out within 5982 * the time limit defined in M_PRS_MAXTIME 5983 */ 5984 uint32 rxnack; /**< Number of NACKS received (Afterburner) */ 5985 uint32 frmscons; /**< Number of frames completed without transmission because of an 5986 * Afterburner re-queue 5987 */ 5988 uint32 txnack; /**< obsolete */ 5989 uint32 rxback; /**< blockack rxcnt */ 5990 uint32 txback; /**< blockack txcnt */ 5991 5992 /* 802.11 MIB counters, pp. 614 of 802.11 reaff doc. */ 5993 uint32 txfrag; /**< dot11TransmittedFragmentCount */ 5994 uint32 txmulti; /**< dot11MulticastTransmittedFrameCount */ 5995 uint32 txfail; /**< dot11FailedCount */ 5996 uint32 txretry; /**< dot11RetryCount */ 5997 uint32 txretrie; /**< dot11MultipleRetryCount */ 5998 uint32 rxdup; /**< dot11FrameduplicateCount */ 5999 uint32 txrts; /**< dot11RTSSuccessCount */ 6000 uint32 txnocts; /**< dot11RTSFailureCount */ 6001 uint32 txnoack; /**< dot11ACKFailureCount */ 6002 uint32 rxfrag; /**< dot11ReceivedFragmentCount */ 6003 uint32 rxmulti; /**< dot11MulticastReceivedFrameCount */ 6004 uint32 rxcrc; /**< dot11FCSErrorCount */ 6005 uint32 txfrmsnt; /**< dot11TransmittedFrameCount (bogus MIB?) */ 6006 uint32 rxundec; /**< dot11WEPUndecryptableCount */ 6007 6008 /* WPA2 counters (see rxundec for DecryptFailureCount) */ 6009 uint32 tkipmicfaill; /**< TKIPLocalMICFailures */ 6010 uint32 tkipcntrmsr; /**< TKIPCounterMeasuresInvoked */ 6011 uint32 tkipreplay; /**< TKIPReplays */ 6012 uint32 ccmpfmterr; /**< CCMPFormatErrors */ 6013 uint32 ccmpreplay; /**< CCMPReplays */ 6014 uint32 ccmpundec; /**< CCMPDecryptErrors */ 6015 uint32 fourwayfail; /**< FourWayHandshakeFailures */ 6016 uint32 wepundec; /**< dot11WEPUndecryptableCount */ 6017 uint32 wepicverr; /**< dot11WEPICVErrorCount */ 6018 uint32 decsuccess; /**< DecryptSuccessCount */ 6019 uint32 tkipicverr; /**< TKIPICVErrorCount */ 6020 uint32 wepexcluded; /**< dot11WEPExcludedCount */ 6021 6022 uint32 rxundec_mcst; /**< dot11WEPUndecryptableCount */ 6023 6024 /* WPA2 counters (see rxundec for DecryptFailureCount) */ 6025 uint32 tkipmicfaill_mcst; /**< TKIPLocalMICFailures */ 6026 uint32 tkipcntrmsr_mcst; /**< TKIPCounterMeasuresInvoked */ 6027 uint32 tkipreplay_mcst; /**< TKIPReplays */ 6028 uint32 ccmpfmterr_mcst; /**< CCMPFormatErrors */ 6029 uint32 ccmpreplay_mcst; /**< CCMPReplays */ 6030 uint32 ccmpundec_mcst; /**< CCMPDecryptErrors */ 6031 uint32 fourwayfail_mcst; /**< FourWayHandshakeFailures */ 6032 uint32 wepundec_mcst; /**< dot11WEPUndecryptableCount */ 6033 uint32 wepicverr_mcst; /**< dot11WEPICVErrorCount */ 6034 uint32 decsuccess_mcst; /**< DecryptSuccessCount */ 6035 uint32 tkipicverr_mcst; /**< TKIPICVErrorCount */ 6036 uint32 wepexcluded_mcst; /**< dot11WEPExcludedCount */ 6037 6038 uint32 txchanrej; /**< Tx frames suppressed due to channel rejection */ 6039 uint32 txexptime; /**< Tx frames suppressed due to timer expiration */ 6040 uint32 psmwds; /**< Count PSM watchdogs */ 6041 uint32 phywatchdog; /**< Count Phy watchdogs (triggered by ucode) */ 6042 6043 /* MBSS counters, AP only */ 6044 uint32 prq_entries_handled; /**< PRQ entries read in */ 6045 uint32 prq_undirected_entries; /**< which were bcast bss & ssid */ 6046 uint32 prq_bad_entries; /**< which could not be translated to info */ 6047 uint32 atim_suppress_count; /**< TX suppressions on ATIM fifo */ 6048 uint32 bcn_template_not_ready; /**< Template marked in use on send bcn ... */ 6049 uint32 bcn_template_not_ready_done; /**< ...but "DMA done" interrupt rcvd */ 6050 uint32 late_tbtt_dpc; /**< TBTT DPC did not happen in time */ 6051 6052 /* per-rate receive stat counters */ 6053 uint32 rx1mbps; /**< packets rx at 1Mbps */ 6054 uint32 rx2mbps; /**< packets rx at 2Mbps */ 6055 uint32 rx5mbps5; /**< packets rx at 5.5Mbps */ 6056 uint32 rx6mbps; /**< packets rx at 6Mbps */ 6057 uint32 rx9mbps; /**< packets rx at 9Mbps */ 6058 uint32 rx11mbps; /**< packets rx at 11Mbps */ 6059 uint32 rx12mbps; /**< packets rx at 12Mbps */ 6060 uint32 rx18mbps; /**< packets rx at 18Mbps */ 6061 uint32 rx24mbps; /**< packets rx at 24Mbps */ 6062 uint32 rx36mbps; /**< packets rx at 36Mbps */ 6063 uint32 rx48mbps; /**< packets rx at 48Mbps */ 6064 uint32 rx54mbps; /**< packets rx at 54Mbps */ 6065 uint32 rx108mbps; /**< packets rx at 108mbps */ 6066 uint32 rx162mbps; /**< packets rx at 162mbps */ 6067 uint32 rx216mbps; /**< packets rx at 216 mbps */ 6068 uint32 rx270mbps; /**< packets rx at 270 mbps */ 6069 uint32 rx324mbps; /**< packets rx at 324 mbps */ 6070 uint32 rx378mbps; /**< packets rx at 378 mbps */ 6071 uint32 rx432mbps; /**< packets rx at 432 mbps */ 6072 uint32 rx486mbps; /**< packets rx at 486 mbps */ 6073 uint32 rx540mbps; /**< packets rx at 540 mbps */ 6074 6075 /* pkteng rx frame stats */ 6076 uint32 pktengrxducast; /**< unicast frames rxed by the pkteng code */ 6077 uint32 pktengrxdmcast; /**< multicast frames rxed by the pkteng code */ 6078 6079 uint32 rfdisable; /**< count of radio disables */ 6080 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 6081 uint32 bphy_badplcp; 6082 6083 uint32 txmpdu_sgi; /**< count for sgi transmit */ 6084 uint32 rxmpdu_sgi; /**< count for sgi received */ 6085 uint32 txmpdu_stbc; /**< count for stbc transmit */ 6086 uint32 rxmpdu_stbc; /**< count for stbc received */ 6087 6088 uint32 rxdrop20s; /**< drop secondary cnt */ 6089 /* All counter variables have to be of uint32. */ 6090 } wl_cnt_ver_6_t; 6091 6092 #define WL_DELTA_STATS_T_VERSION 2 /**< current version of wl_delta_stats_t struct */ 6093 6094 typedef struct { 6095 uint16 version; /**< see definition of WL_DELTA_STATS_T_VERSION */ 6096 uint16 length; /**< length of entire structure */ 6097 6098 /* transmit stat counters */ 6099 uint32 txframe; /**< tx data frames */ 6100 uint32 txbyte; /**< tx data bytes */ 6101 uint32 txretrans; /**< tx mac retransmits */ 6102 uint32 txfail; /**< tx failures */ 6103 6104 /* receive stat counters */ 6105 uint32 rxframe; /**< rx data frames */ 6106 uint32 rxbyte; /**< rx data bytes */ 6107 6108 /* per-rate receive stat counters */ 6109 uint32 rx1mbps; /**< packets rx at 1Mbps */ 6110 uint32 rx2mbps; /**< packets rx at 2Mbps */ 6111 uint32 rx5mbps5; /**< packets rx at 5.5Mbps */ 6112 uint32 rx6mbps; /**< packets rx at 6Mbps */ 6113 uint32 rx9mbps; /**< packets rx at 9Mbps */ 6114 uint32 rx11mbps; /**< packets rx at 11Mbps */ 6115 uint32 rx12mbps; /**< packets rx at 12Mbps */ 6116 uint32 rx18mbps; /**< packets rx at 18Mbps */ 6117 uint32 rx24mbps; /**< packets rx at 24Mbps */ 6118 uint32 rx36mbps; /**< packets rx at 36Mbps */ 6119 uint32 rx48mbps; /**< packets rx at 48Mbps */ 6120 uint32 rx54mbps; /**< packets rx at 54Mbps */ 6121 uint32 rx108mbps; /**< packets rx at 108mbps */ 6122 uint32 rx162mbps; /**< packets rx at 162mbps */ 6123 uint32 rx216mbps; /**< packets rx at 216 mbps */ 6124 uint32 rx270mbps; /**< packets rx at 270 mbps */ 6125 uint32 rx324mbps; /**< packets rx at 324 mbps */ 6126 uint32 rx378mbps; /**< packets rx at 378 mbps */ 6127 uint32 rx432mbps; /**< packets rx at 432 mbps */ 6128 uint32 rx486mbps; /**< packets rx at 486 mbps */ 6129 uint32 rx540mbps; /**< packets rx at 540 mbps */ 6130 6131 /* phy stats */ 6132 uint32 rxbadplcp; 6133 uint32 rxcrsglitch; 6134 uint32 bphy_rxcrsglitch; 6135 uint32 bphy_badplcp; 6136 6137 uint32 slice_index; /**< Slice for which stats are reported */ 6138 6139 } wl_delta_stats_t; 6140 6141 /* Partial statistics counter report */ 6142 #define WL_CNT_CTL_MGT_FRAMES 0 6143 6144 typedef struct { 6145 uint16 type; 6146 uint16 len; 6147 6148 /* detailed control/management frames */ 6149 uint32 txnull; 6150 uint32 rxnull; 6151 uint32 txqosnull; 6152 uint32 rxqosnull; 6153 uint32 txassocreq; 6154 uint32 rxassocreq; 6155 uint32 txreassocreq; 6156 uint32 rxreassocreq; 6157 uint32 txdisassoc; 6158 uint32 rxdisassoc; 6159 uint32 txassocrsp; 6160 uint32 rxassocrsp; 6161 uint32 txreassocrsp; 6162 uint32 rxreassocrsp; 6163 uint32 txauth; 6164 uint32 rxauth; 6165 uint32 txdeauth; 6166 uint32 rxdeauth; 6167 uint32 txprobereq; 6168 uint32 rxprobereq; 6169 uint32 txprobersp; 6170 uint32 rxprobersp; 6171 uint32 txaction; 6172 uint32 rxaction; 6173 uint32 txrts; 6174 uint32 rxrts; 6175 uint32 txcts; 6176 uint32 rxcts; 6177 uint32 txack; 6178 uint32 rxack; 6179 uint32 txbar; 6180 uint32 rxbar; 6181 uint32 txback; 6182 uint32 rxback; 6183 uint32 txpspoll; 6184 uint32 rxpspoll; 6185 } wl_ctl_mgt_cnt_t; 6186 6187 typedef struct { 6188 uint32 packets; 6189 uint32 bytes; 6190 } wl_traffic_stats_t; 6191 6192 typedef struct { 6193 uint16 version; /**< see definition of WL_WME_CNT_VERSION */ 6194 uint16 length; /**< length of entire structure */ 6195 6196 wl_traffic_stats_t tx[AC_COUNT]; /**< Packets transmitted */ 6197 wl_traffic_stats_t tx_failed[AC_COUNT]; /**< Packets dropped or failed to transmit */ 6198 wl_traffic_stats_t rx[AC_COUNT]; /**< Packets received */ 6199 wl_traffic_stats_t rx_failed[AC_COUNT]; /**< Packets failed to receive */ 6200 6201 wl_traffic_stats_t forward[AC_COUNT]; /**< Packets forwarded by AP */ 6202 6203 wl_traffic_stats_t tx_expired[AC_COUNT]; /**< packets dropped due to lifetime expiry */ 6204 6205 } wl_wme_cnt_t; 6206 6207 struct wl_msglevel2 { 6208 uint32 low; 6209 uint32 high; 6210 }; 6211 6212 /* A versioned structure for setting and retrieving debug message levels. */ 6213 #define WL_MSGLEVEL_STRUCT_VERSION_1 1 6214 6215 typedef struct wl_msglevel_v1 { 6216 uint16 version; 6217 uint16 length; 6218 uint32 msglevel1; 6219 uint32 msglevel2; 6220 uint32 msglevel3; 6221 /* add another uint32 when full */ 6222 } wl_msglevel_v1_t; 6223 6224 #define WL_ICMP_IPV6_CFG_VERSION 1 6225 #define WL_ICMP_IPV6_CLEAR_ALL (1 << 0) 6226 6227 typedef struct wl_icmp_ipv6_cfg { 6228 uint16 version; 6229 uint16 length; 6230 uint16 fixed_length; 6231 uint16 flags; 6232 uint32 num_ipv6; 6233 /* num_ipv6 to follow */ 6234 struct ipv6_addr host_ipv6[]; 6235 } wl_icmp_ipv6_cfg_t; 6236 6237 #define WL_ICMP_CFG_IPV6_FIXED_LEN OFFSETOF(wl_icmp_ipv6_cfg_t, host_ipv6) 6238 #define WL_ICMP_CFG_IPV6_LEN(count) (WL_ICMP_CFG_IPV6_FIXED_LEN + \ 6239 ((count) * sizeof(struct ipv6_addr))) 6240 6241 typedef struct wl_mkeep_alive_pkt_v1 { 6242 uint16 version; /* Version for mkeep_alive */ 6243 uint16 length; /* length of fixed parameters in the structure */ 6244 uint32 period_msec; /* high bit on means immediate send */ 6245 uint16 len_bytes; 6246 uint8 keep_alive_id; /* 0 - 3 for N = 4 */ 6247 uint8 data[BCM_FLEX_ARRAY]; 6248 } wl_mkeep_alive_pkt_v1_t; 6249 6250 typedef struct wl_mkeep_alive_pkt { 6251 uint16 version; /* Version for mkeep_alive */ 6252 uint16 length; /* length of fixed parameters in the structure */ 6253 uint32 period_msec; /* high bit on means immediate send */ 6254 uint16 len_bytes; 6255 uint8 keep_alive_id; /* 0 - 3 for N = 4 */ 6256 uint8 data[1]; 6257 } wl_mkeep_alive_pkt_t; 6258 6259 #define WL_MKEEP_ALIVE_VERSION_1 1u 6260 #define WL_MKEEP_ALIVE_VERSION 1 6261 #define WL_MKEEP_ALIVE_FIXED_LEN OFFSETOF(wl_mkeep_alive_pkt_t, data) 6262 /* 1/2 second precision since idle time is a seconds counter anyway */ 6263 #define WL_MKEEP_ALIVE_PRECISION 500 6264 #define WL_MKEEP_ALIVE_PERIOD_MASK 0x7FFFFFFF 6265 #define WL_MKEEP_ALIVE_IMMEDIATE 0x80000000 6266 6267 typedef struct wl_mkeep_alive_hist_info_v1 { 6268 uint32 first_pktsend_ts; /**< timestamp(ms): packet was sent */ 6269 uint32 first_txs_ts; /**< timestamp(ms): received the first txstatus */ 6270 uint32 last_retry_txs_ts; /**< timestamp(ms): received the last txstatus */ 6271 uint32 first_retry_ts; /**< timestamp(ms): resent the packet first time */ 6272 uint32 last_retry_ts; /**< timestamp(ms): resent the packet last time */ 6273 uint32 first_txs; /**< txstatus when dongle received first time */ 6274 uint32 last_retry_txs; /**< txstatus when dongle received last time */ 6275 uint32 retry_cnt; /**< number of retries for the packet */ 6276 } wl_mkeep_alive_hist_info_v1_t; 6277 6278 typedef struct wl_mkeep_alive_hist_req_v1 { 6279 uint16 version; /**< version of structure */ 6280 uint16 length; /**< length of this structure */ 6281 uint16 flags; /**< mkeepalive idx, operation codes */ 6282 uint16 count; /**< number of results */ 6283 uint16 max; /**< maximum number of history */ 6284 wl_mkeep_alive_hist_info_v1_t info[]; /**< struct array of length count */ 6285 } wl_mkeep_alive_hist_req_v1_t; 6286 6287 /* version of the mkeep_alive_hist IOVAR */ 6288 #define WL_MKEEP_ALIVE_HIST_REQ_VER_1 1u 6289 /* Fixed length of wl_mkeep_alive_hist_req_v1_t */ 6290 #define WL_MKEEP_ALIVE_HIST_REQ_FIXED_LEN_VER_1 OFFSETOF(wl_mkeep_alive_hist_req_v1_t, info) 6291 /* Keepalive ID */ 6292 #define WL_MKEEP_ALIVE_HIST_ID_MASK 0xFF00u /**< ID mask */ 6293 #define WL_MKEEP_ALIVE_HIST_ID_SHIFT 8u /**< Offset of keepalive ID */ 6294 /* OP Codes */ 6295 #define WL_MKEEP_ALIVE_HIST_OP_MASK 0x00FFu /**< OP code mask */ 6296 #define WL_MKEEP_ALIVE_HIST_RESET (0x1u << 0u) /**< Clear history of specified ID */ 6297 #define WL_MKEEP_ALIVE_HIST_RESET_ALL (0x1u << 1u) /**< Clear all history */ 6298 6299 /** TCP Keep-Alive conn struct */ 6300 typedef struct wl_mtcpkeep_alive_conn_pkt { 6301 struct ether_addr saddr; /**< src mac address */ 6302 struct ether_addr daddr; /**< dst mac address */ 6303 struct ipv4_addr sipaddr; /**< source IP addr */ 6304 struct ipv4_addr dipaddr; /**< dest IP addr */ 6305 uint16 sport; /**< src port */ 6306 uint16 dport; /**< dest port */ 6307 uint32 seq; /**< seq number */ 6308 uint32 ack; /**< ACK number */ 6309 uint16 tcpwin; /**< TCP window */ 6310 uint16 PAD; 6311 } wl_mtcpkeep_alive_conn_pkt_t; 6312 6313 /** TCP Keep-Alive interval struct */ 6314 typedef struct wl_mtcpkeep_alive_timers_pkt { 6315 uint16 interval; /**< interval timer */ 6316 uint16 retry_interval; /**< retry_interval timer */ 6317 uint16 retry_count; /**< retry_count */ 6318 } wl_mtcpkeep_alive_timers_pkt_t; 6319 6320 typedef struct wake_info { 6321 uint32 wake_reason; 6322 uint32 wake_info_len; /**< size of packet */ 6323 uint8 packet[]; 6324 } wake_info_t; 6325 6326 typedef struct wake_pkt { 6327 uint32 wake_pkt_len; /**< size of packet */ 6328 uint8 packet[]; 6329 } wake_pkt_t; 6330 6331 #define WL_MTCPKEEP_ALIVE_VERSION 1 6332 6333 /* #ifdef WLBA */ 6334 6335 #define WLC_BA_CNT_VERSION 1 /**< current version of wlc_ba_cnt_t */ 6336 6337 /** block ack related stats */ 6338 typedef struct wlc_ba_cnt { 6339 uint16 version; /**< WLC_BA_CNT_VERSION */ 6340 uint16 length; /**< length of entire structure */ 6341 6342 /* transmit stat counters */ 6343 uint32 txpdu; /**< pdus sent */ 6344 uint32 txsdu; /**< sdus sent */ 6345 uint32 txfc; /**< tx side flow controlled packets */ 6346 uint32 txfci; /**< tx side flow control initiated */ 6347 uint32 txretrans; /**< retransmitted pdus */ 6348 uint32 txbatimer; /**< ba resend due to timer */ 6349 uint32 txdrop; /**< dropped packets */ 6350 uint32 txaddbareq; /**< addba req sent */ 6351 uint32 txaddbaresp; /**< addba resp sent */ 6352 uint32 txdelba; /**< delba sent */ 6353 uint32 txba; /**< ba sent */ 6354 uint32 txbar; /**< bar sent */ 6355 uint32 txpad[4]; /**< future */ 6356 6357 /* receive side counters */ 6358 uint32 rxpdu; /**< pdus recd */ 6359 uint32 rxqed; /**< pdus buffered before sending up */ 6360 uint32 rxdup; /**< duplicate pdus */ 6361 uint32 rxnobuf; /**< pdus discarded due to no buf */ 6362 uint32 rxaddbareq; /**< addba req recd */ 6363 uint32 rxaddbaresp; /**< addba resp recd */ 6364 uint32 rxdelba; /**< delba recd */ 6365 uint32 rxba; /**< ba recd */ 6366 uint32 rxbar; /**< bar recd */ 6367 uint32 rxinvba; /**< invalid ba recd */ 6368 uint32 rxbaholes; /**< ba recd with holes */ 6369 uint32 rxunexp; /**< unexpected packets */ 6370 uint32 rxpad[4]; /**< future */ 6371 } wlc_ba_cnt_t; 6372 /* #endif WLBA */ 6373 6374 /** structure for per-tid ampdu control */ 6375 struct ampdu_tid_control { 6376 uint8 tid; /* tid */ 6377 uint8 enable; /* enable/disable */ 6378 }; 6379 6380 /** Support for ampdu_tx_ba_window_cfg */ 6381 #define WL_AMPDU_TX_BA_WINDOW_CFG_VER_1 1u 6382 #define WL_AMPDU_TX_BA_WINDOW_CFG_CUR_VER WL_AMPDU_TX_BA_WINDOW_CFG_VER_1 6383 6384 /* 16 bits Config (5 bits reserved) and Status (2 bits reserved) */ 6385 #define WL_AMPDU_TX_BA_WINDOW_CFG_BA_WSIZE_IDX 0u 6386 #define WL_AMPDU_TX_BA_WINDOW_CFG_BA_WSIZE_FSZ 9u 6387 6388 #define WL_AMPDU_TX_BA_WINDOW_CFG_ASSOC_TYPE_IDX 9u 6389 #define WL_AMPDU_TX_BA_WINDOW_CFG_ASSOC_TYPE_FSZ 2u 6390 6391 #define WL_AMPDU_TX_BA_WINDOW_CFG_STATE_IDX 11u 6392 #define WL_AMPDU_TX_BA_WINDOW_CFG_STATE_FSZ 3u 6393 6394 #define WL_AMPDU_TX_BA_WINDOW_CFG_BA_WSIZE_MASK \ 6395 (MAXBITVAL(WL_AMPDU_TX_BA_WINDOW_CFG_BA_WSIZE_FSZ) << \ 6396 WL_AMPDU_TX_BA_WINDOW_CFG_BA_WSIZE_IDX) 6397 6398 #define WL_AMPDU_TX_BA_WINDOW_CFG_ASSOC_TYPE_MASK \ 6399 (MAXBITVAL(WL_AMPDU_TX_BA_WINDOW_CFG_ASSOC_TYPE_FSZ) << \ 6400 WL_AMPDU_TX_BA_WINDOW_CFG_ASSOC_TYPE_IDX) 6401 6402 #define WL_AMPDU_TX_BA_WINDOW_CFG_STATE_MASK \ 6403 (MAXBITVAL(WL_AMPDU_TX_BA_WINDOW_CFG_STATE_FSZ) << \ 6404 WL_AMPDU_TX_BA_WINDOW_CFG_STATE_IDX) 6405 6406 /* code for config assoc_type */ 6407 enum { 6408 WL_AMPDU_TX_BA_WINDOW_CFG_ASSOC_TYPE_AX = 0, 6409 WL_AMPDU_TX_BA_WINDOW_CFG_ASSOC_TYPE_UNIVERSAL = 1, 6410 WL_AMPDU_TX_BA_WINDOW_CFG_ASSOC_TYPE_MAX = 2 6411 }; 6412 6413 /* ampdu_tx_ba_window_cfg states */ 6414 enum { 6415 WL_AMPDU_TX_BA_WINDOW_CFG_STATE_OFF = 0, 6416 WL_AMPDU_TX_BA_WINDOW_CFG_STATE_NEGOTIATING = 1, 6417 WL_AMPDU_TX_BA_WINDOW_CFG_STATE_NEGOTIATED = 2, 6418 WL_AMPDU_TX_BA_WINDOW_CFG_STATE_MAX = 3 6419 }; 6420 6421 /** structure for per tid ampdu BA window configuration */ 6422 typedef struct wl_ampdu_tx_ba_window_cfg_v1 { 6423 uint16 version; 6424 uint16 length; /* length of the entire structure ver+len+payload. */ 6425 /* tid bitmap: 6426 * input (SET): select tid to configure. 6427 * output (GET): TID that is currently configured. 6428 */ 6429 uint8 tidbmp; 6430 uint8 flag; /* currently not used. Reserved. 32-bit alignment. */ 6431 uint16 PAD; 6432 6433 /* Per-tid configuration tuple (tx_ba_wsize, assoctype). Used for GET and SET. 6434 * bit0 - bit8: User configured TX BA window size. Range {0, max. FW supported}. 6435 * bit9 - bit10: User configured association type. 0: 11ax association, 1: universal. 6436 * bit11 - bit15: Reserved. 6437 */ 6438 uint16 config[NUMPRIO]; 6439 6440 /* Status of the per-tid configuration: GET only 6441 * bit0 - bit8: Resulted TX BA window size. 6442 * bit9 - bit10: Reserved. 6443 * bit11 - bit13: TX BA configuration state. 6444 * bit14 - bit15: Reserved. 6445 */ 6446 uint16 status[NUMPRIO]; 6447 } wl_ampdu_tx_ba_window_cfg_v1_t; 6448 6449 /** struct for ampdu tx/rx aggregation control */ 6450 struct ampdu_aggr { 6451 int8 aggr_override; /**< aggr overrided by dongle. Not to be set by host. */ 6452 uint16 conf_TID_bmap; /**< bitmap of TIDs to configure */ 6453 uint16 enab_TID_bmap; /**< enable/disable per TID */ 6454 }; 6455 6456 /** structure for identifying ea/tid for sending addba/delba */ 6457 struct ampdu_ea_tid { 6458 struct ether_addr ea; /**< Station address */ 6459 uint8 tid; /**< tid */ 6460 uint8 initiator; /**< 0 is recipient, 1 is originator */ 6461 }; 6462 6463 /** structure for identifying retry/tid for retry_limit_tid/rr_retry_limit_tid */ 6464 struct ampdu_retry_tid { 6465 uint8 tid; /**< tid */ 6466 uint8 retry; /**< retry value */ 6467 }; 6468 6469 #define BDD_FNAME_LEN 32 /**< Max length of friendly name */ 6470 typedef struct bdd_fname { 6471 uint8 len; /**< length of friendly name */ 6472 uchar name[BDD_FNAME_LEN]; /**< friendly name */ 6473 } bdd_fname_t; 6474 6475 /* structure for addts arguments */ 6476 /** For ioctls that take a list of TSPEC */ 6477 struct tslist { 6478 int32 count; /**< number of tspecs */ 6479 struct tsinfo_arg tsinfo[]; /**< variable length array of tsinfo */ 6480 }; 6481 6482 /* WLTDLS */ 6483 /**structure for tdls iovars */ 6484 typedef struct tdls_iovar { 6485 struct ether_addr ea; /**< Station address */ 6486 uint8 mode; /**< mode: depends on iovar */ 6487 uint8 PAD; 6488 chanspec_t chanspec; 6489 uint8 PAD[6]; 6490 } tdls_iovar_t; 6491 6492 #define TDLS_WFD_IE_SIZE 512 6493 /**structure for tdls wfd ie */ 6494 typedef struct tdls_wfd_ie_iovar { 6495 struct ether_addr ea; /**< Station address */ 6496 uint8 mode; 6497 uint8 PAD; 6498 uint16 length; 6499 uint8 data[TDLS_WFD_IE_SIZE]; 6500 } tdls_wfd_ie_iovar_t; 6501 /* #endif WLTDLS */ 6502 6503 /** structure for addts/delts arguments */ 6504 typedef struct tspec_arg { 6505 uint16 version; /**< see definition of TSPEC_ARG_VERSION */ 6506 uint16 length; /**< length of entire structure */ 6507 uint32 flag; /**< bit field */ 6508 /* TSPEC Arguments */ 6509 struct tsinfo_arg tsinfo; /**< TS Info bit field */ 6510 uint8 PAD; 6511 uint16 nom_msdu_size; /**< (Nominal or fixed) MSDU Size (bytes) */ 6512 uint16 max_msdu_size; /**< Maximum MSDU Size (bytes) */ 6513 uint32 min_srv_interval; /**< Minimum Service Interval (us) */ 6514 uint32 max_srv_interval; /**< Maximum Service Interval (us) */ 6515 uint32 inactivity_interval; /**< Inactivity Interval (us) */ 6516 uint32 suspension_interval; /**< Suspension Interval (us) */ 6517 uint32 srv_start_time; /**< Service Start Time (us) */ 6518 uint32 min_data_rate; /**< Minimum Data Rate (bps) */ 6519 uint32 mean_data_rate; /**< Mean Data Rate (bps) */ 6520 uint32 peak_data_rate; /**< Peak Data Rate (bps) */ 6521 uint32 max_burst_size; /**< Maximum Burst Size (bytes) */ 6522 uint32 delay_bound; /**< Delay Bound (us) */ 6523 uint32 min_phy_rate; /**< Minimum PHY Rate (bps) */ 6524 uint16 surplus_bw; /**< Surplus Bandwidth Allowance (range 1.0 to 8.0) */ 6525 uint16 medium_time; /**< Medium Time (32 us/s periods) */ 6526 uint8 dialog_token; /**< dialog token */ 6527 uint8 PAD[3]; 6528 } tspec_arg_t; 6529 6530 /** tspec arg for desired station */ 6531 typedef struct tspec_per_sta_arg { 6532 struct ether_addr ea; 6533 uint8 PAD[2]; 6534 struct tspec_arg ts; 6535 } tspec_per_sta_arg_t; 6536 6537 /** structure for max bandwidth for each access category */ 6538 typedef struct wme_max_bandwidth { 6539 uint32 ac[AC_COUNT]; /**< max bandwidth for each access category */ 6540 } wme_max_bandwidth_t; 6541 6542 #define WL_WME_MBW_PARAMS_IO_BYTES (sizeof(wme_max_bandwidth_t)) 6543 6544 /* current version of wl_tspec_arg_t struct */ 6545 #define TSPEC_ARG_VERSION 2 /**< current version of wl_tspec_arg_t struct */ 6546 #define TSPEC_ARG_LENGTH 55 /**< argument length from tsinfo to medium_time */ 6547 #define TSPEC_DEFAULT_DIALOG_TOKEN 42 /**< default dialog token */ 6548 #define TSPEC_DEFAULT_SBW_FACTOR 0x3000 /**< default surplus bw */ 6549 6550 #define WL_WOWL_KEEPALIVE_MAX_PACKET_SIZE 80 6551 #define WLC_WOWL_MAX_KEEPALIVE 2 6552 6553 /** Packet lifetime configuration per ac */ 6554 typedef struct wl_lifetime { 6555 uint32 ac; /**< access class */ 6556 uint32 lifetime; /**< Packet lifetime value in ms */ 6557 } wl_lifetime_t; 6558 6559 /** Management time configuration */ 6560 typedef struct wl_lifetime_mg { 6561 uint32 mgmt_bitmap; /**< Mgmt subtype */ 6562 uint32 lifetime; /**< Packet lifetime value in us */ 6563 } wl_lifetime_mg_t; 6564 6565 /* MAC Sample Capture related */ 6566 #define WL_MACCAPTR_DEFSTART_PTR 0xA00 6567 #define WL_MACCAPTR_DEFSTOP_PTR 0xA3F 6568 #define WL_MACCAPTR_DEFSZ 0x3F 6569 6570 #define WL_MACCAPTR_DEF_MASK 0xFFFFFFFF 6571 6572 typedef enum { 6573 WL_MACCAPT_TRIG = 0, 6574 WL_MACCAPT_STORE = 1, 6575 WL_MACCAPT_TRANS = 2, 6576 WL_MACCAPT_MATCH = 3 6577 } maccaptr_optn; 6578 6579 typedef enum { 6580 WL_MACCAPT_STRT = 1, 6581 WL_MACCAPT_STOP = 2, 6582 WL_MACCAPT_RST = 3 6583 } maccaptr_cmd_t; 6584 6585 /* MAC Sample Capture Set-up Paramters */ 6586 typedef struct wl_maccapture_params { 6587 uint8 gpio_sel; 6588 uint8 la_mode; /* TRUE: GPIO Out Enabled */ 6589 uint8 PAD[2]; 6590 uint32 start_ptr; /* Start address to store */ 6591 uint32 stop_ptr; /* Stop address to store */ 6592 uint8 optn_bmp; /* Options */ 6593 uint8 PAD[3]; 6594 /* Don't change the order after this nor 6595 * add anything in betw. Code uses offsets to populate 6596 * registers 6597 */ 6598 uint32 tr_mask; /* Trigger Mask */ 6599 uint32 tr_val; /* Trigger Value */ 6600 uint32 s_mask; /* Store Mode Mask */ 6601 uint32 x_mask; /* Trans. Mode Mask */ 6602 uint32 m_mask; /* Match Mode Mask */ 6603 uint32 m_val; /* Match Value */ 6604 maccaptr_cmd_t cmd; /* Start / Stop */ 6605 } wl_maccapture_params_t; 6606 6607 /** Channel Switch Announcement param */ 6608 typedef struct wl_chan_switch { 6609 uint8 mode; /**< value 0 or 1 */ 6610 uint8 count; /**< count # of beacons before switching */ 6611 chanspec_t chspec; /**< chanspec */ 6612 uint8 reg; /**< regulatory class */ 6613 uint8 frame_type; /**< csa frame type, unicast or broadcast */ 6614 } wl_chan_switch_t; 6615 6616 enum { 6617 PFN_LIST_ORDER, 6618 PFN_RSSI 6619 }; 6620 6621 enum { 6622 DISABLE, 6623 ENABLE 6624 }; 6625 6626 enum { 6627 OFF_ADAPT, 6628 SMART_ADAPT, 6629 STRICT_ADAPT, 6630 SLOW_ADAPT 6631 }; 6632 6633 #define SORT_CRITERIA_BIT 0 6634 #define AUTO_NET_SWITCH_BIT 1 6635 #define ENABLE_BKGRD_SCAN_BIT 2 6636 #define IMMEDIATE_SCAN_BIT 3 6637 #define AUTO_CONNECT_BIT 4 6638 #define ENABLE_BD_SCAN_BIT 5 6639 #define ENABLE_ADAPTSCAN_BIT 6 6640 #define IMMEDIATE_EVENT_BIT 8 6641 #define SUPPRESS_SSID_BIT 9 6642 #define ENABLE_NET_OFFLOAD_BIT 10 6643 /** report found/lost events for SSID and BSSID networks seperately */ 6644 #define REPORT_SEPERATELY_BIT 11 6645 6646 #define SORT_CRITERIA_MASK 0x0001 6647 #define AUTO_NET_SWITCH_MASK 0x0002 6648 #define ENABLE_BKGRD_SCAN_MASK 0x0004 6649 #define IMMEDIATE_SCAN_MASK 0x0008 6650 #define AUTO_CONNECT_MASK 0x0010 6651 6652 #define ENABLE_BD_SCAN_MASK 0x0020 6653 #define ENABLE_ADAPTSCAN_MASK 0x00c0 6654 #define IMMEDIATE_EVENT_MASK 0x0100 6655 #define SUPPRESS_SSID_MASK 0x0200 6656 #define ENABLE_NET_OFFLOAD_MASK 0x0400 6657 /** report found/lost events for SSID and BSSID networks seperately */ 6658 #define REPORT_SEPERATELY_MASK 0x0800 6659 6660 #define PFN_COMPLETE 1 6661 #define PFN_INCOMPLETE 0 6662 6663 #define DEFAULT_BESTN 2 6664 #define DEFAULT_MSCAN 0 6665 #define DEFAULT_REPEAT 10 6666 #define DEFAULT_EXP 2 6667 6668 #define PFN_PARTIAL_SCAN_BIT 0 6669 #define PFN_PARTIAL_SCAN_MASK 1 6670 6671 #define PFN_SWC_RSSI_WINDOW_MAX 8 6672 #define PFN_SWC_MAX_NUM_APS 16 6673 #define PFN_HOTLIST_MAX_NUM_APS 64 6674 6675 #define MAX_EPNO_HIDDEN_SSID 8 6676 #define MAX_WHITELIST_SSID 2 6677 6678 /* Version 1 and 2 for various scan results structures defined below */ 6679 #define PFN_SCANRESULTS_VERSION_V1 1u 6680 #define PFN_SCANRESULTS_VERSION_V2 2u 6681 #define PFN_SCANRESULTS_VERSION_V3 3u 6682 #define PFN_SCANRESULTS_VERSION_V4 4u 6683 6684 /** PFN network info structure */ 6685 typedef struct wl_pfn_subnet_info_v1 { 6686 struct ether_addr BSSID; 6687 uint8 channel; /**< channel number only */ 6688 uint8 SSID_len; 6689 uint8 SSID[32]; 6690 } wl_pfn_subnet_info_v1_t; 6691 6692 typedef struct wl_pfn_subnet_info_v2 { 6693 struct ether_addr BSSID; 6694 uint8 channel; /**< channel number only */ 6695 uint8 SSID_len; 6696 union { 6697 uint8 SSID[32]; 6698 uint16 index; 6699 } u; 6700 } wl_pfn_subnet_info_v2_t; 6701 6702 typedef struct wl_pfn_subnet_info_v3 { 6703 struct ether_addr BSSID; 6704 chanspec_t chanspec; /**< with 6G chanspec only */ 6705 uint8 SSID_len; 6706 uint8 PAD[3]; 6707 union { 6708 uint8 SSID[32]; 6709 uint16 index; 6710 } u; 6711 } wl_pfn_subnet_info_v3_t; 6712 6713 typedef struct wl_pfn_net_info_v1 { 6714 wl_pfn_subnet_info_v1_t pfnsubnet; 6715 int16 RSSI; /**< receive signal strength (in dBm) */ 6716 uint16 timestamp; /**< age in seconds */ 6717 } wl_pfn_net_info_v1_t; 6718 6719 typedef struct wl_pfn_net_info_v2 { 6720 wl_pfn_subnet_info_v2_t pfnsubnet; 6721 int16 RSSI; /**< receive signal strength (in dBm) */ 6722 uint16 timestamp; /**< age in seconds */ 6723 } wl_pfn_net_info_v2_t; 6724 6725 typedef struct wl_pfn_net_info_v3 { 6726 wl_pfn_subnet_info_v3_t pfnsubnet; 6727 int16 RSSI; /**< receive signal strength (in dBm) */ 6728 uint16 timestamp; /**< age in seconds */ 6729 } wl_pfn_net_info_v3_t; 6730 6731 /* Version 1 and 2 for various lbest scan results structures below */ 6732 #define PFN_LBEST_SCAN_RESULT_VERSION_V1 1 6733 #define PFN_LBEST_SCAN_RESULT_VERSION_V2 2 6734 #define PFN_LBEST_SCAN_RESULT_VERSION_V3 3 6735 6736 #define MAX_CHBKT_PER_RESULT 4 6737 6738 typedef struct wl_pfn_lnet_info_v1 { 6739 wl_pfn_subnet_info_v1_t pfnsubnet; /**< BSSID + channel + SSID len + SSID */ 6740 uint16 flags; /**< partial scan, etc */ 6741 int16 RSSI; /**< receive signal strength (in dBm) */ 6742 uint32 timestamp; /**< age in miliseconds */ 6743 uint16 rtt0; /**< estimated distance to this AP in centimeters */ 6744 uint16 rtt1; /**< standard deviation of the distance to this AP in centimeters */ 6745 } wl_pfn_lnet_info_v1_t; 6746 6747 typedef struct wl_pfn_lnet_info_v2 { 6748 wl_pfn_subnet_info_v2_t pfnsubnet; /**< BSSID + channel + SSID len + SSID */ 6749 uint16 flags; /**< partial scan, etc */ 6750 int16 RSSI; /**< receive signal strength (in dBm) */ 6751 uint32 timestamp; /**< age in miliseconds */ 6752 uint16 rtt0; /**< estimated distance to this AP in centimeters */ 6753 uint16 rtt1; /**< standard deviation of the distance to this AP in centimeters */ 6754 } wl_pfn_lnet_info_v2_t; 6755 6756 typedef struct wl_pfn_lnet_info_v3 { 6757 wl_pfn_subnet_info_v3_t pfnsubnet; /**< BSSID + channel + SSID len + SSID */ 6758 uint16 flags; /**< partial scan, etc */ 6759 int16 RSSI; /**< receive signal strength (in dBm) */ 6760 uint32 timestamp; /**< age in miliseconds */ 6761 uint16 rtt0; /**< estimated distance to this AP in centimeters */ 6762 uint16 rtt1; /**< standard deviation of the distance to this AP in centimeters */ 6763 } wl_pfn_lnet_info_v3_t; 6764 6765 typedef struct wl_pfn_lscanresults_v1 { 6766 uint32 version; 6767 uint32 status; 6768 uint32 count; 6769 wl_pfn_lnet_info_v1_t netinfo[1]; 6770 } wl_pfn_lscanresults_v1_t; 6771 6772 typedef struct wl_pfn_lscanresults_v2 { 6773 uint32 version; 6774 uint16 status; 6775 uint16 count; 6776 uint32 scan_ch_buckets[MAX_CHBKT_PER_RESULT]; 6777 wl_pfn_lnet_info_v2_t netinfo[1]; 6778 } wl_pfn_lscanresults_v2_t; 6779 6780 typedef struct wl_pfn_lscanresults_v3 { 6781 uint32 version; 6782 uint16 status; 6783 uint16 count; 6784 uint32 scan_ch_buckets[MAX_CHBKT_PER_RESULT]; 6785 wl_pfn_lnet_info_v3_t netinfo[1]; 6786 } wl_pfn_lscanresults_v3_t; 6787 6788 /**this is used to report on 1-* pfn scan results */ 6789 typedef struct wl_pfn_scanresults_v1 { 6790 uint32 version; 6791 uint32 status; 6792 uint32 count; 6793 wl_pfn_net_info_v1_t netinfo[1]; 6794 } wl_pfn_scanresults_v1_t; 6795 6796 typedef struct wl_pfn_scanresults_v2 { 6797 uint32 version; 6798 uint32 status; 6799 uint32 count; 6800 uint32 scan_ch_bucket; 6801 wl_pfn_net_info_v2_t netinfo[1]; 6802 } wl_pfn_scanresults_v2_t; 6803 6804 typedef struct wl_pfn_scanresults_v3 { 6805 uint32 version; 6806 uint32 status; 6807 uint32 count; 6808 uint32 scan_ch_bucket; 6809 wl_pfn_net_info_v3_t netinfo[1]; 6810 } wl_pfn_scanresults_v3_t; 6811 6812 #define WL_PFN_SCANRESULTS_SCAN_TYPE_HA 0u 6813 #define WL_PFN_SCANRESULTS_SCAN_TYPE_LP 1u 6814 6815 /* In version 4, the status field is split between status and flags from version 2. 6816 * This does not include changes from version 3. 6817 */ 6818 typedef struct wl_pfn_scanresults_v4 { 6819 uint32 version; 6820 uint16 status; 6821 uint16 flags; 6822 uint32 count; 6823 uint32 scan_ch_bucket; 6824 wl_pfn_net_info_v2_t netinfo[1]; 6825 } wl_pfn_scanresults_v4_t; 6826 6827 typedef struct wl_pfn_significant_net { 6828 uint16 flags; 6829 uint16 channel; 6830 struct ether_addr BSSID; 6831 int8 rssi[PFN_SWC_RSSI_WINDOW_MAX]; 6832 } wl_pfn_significant_net_t; 6833 6834 #define PFN_SWC_SCANRESULT_VERSION 1 6835 6836 typedef struct wl_pfn_swc_results { 6837 uint32 version; 6838 uint32 pkt_count; /**< No. of results in current frame */ 6839 uint32 total_count; /**< Total expected results */ 6840 wl_pfn_significant_net_t list[]; 6841 } wl_pfn_swc_results_t; 6842 typedef struct wl_pfn_net_info_bssid_v1 { 6843 struct ether_addr BSSID; 6844 uint8 channel; /**< channel number only */ 6845 int8 RSSI; /**< receive signal strength (in dBm) */ 6846 uint16 flags; /**< (e.g. partial scan, off channel) */ 6847 uint16 timestamp; /**< age in seconds */ 6848 } wl_pfn_net_info_bssid_v1_t; 6849 6850 typedef struct wl_pfn_scanhist_bssid_v1 { 6851 uint32 version; 6852 uint32 status; 6853 uint32 count; 6854 wl_pfn_net_info_bssid_v1_t netinfo[1]; 6855 } wl_pfn_scanhist_bssid_v1_t; 6856 6857 /* v2 for this struct is skiped to match with other struct v3 version */ 6858 typedef struct wl_pfn_net_info_bssid_v3 { 6859 struct ether_addr BSSID; 6860 chanspec_t chanspec; /**<with 6G chanspec only */ 6861 uint16 flags; /**< (e.g. partial scan, off channel) */ 6862 uint16 timestamp; /**< age in seconds */ 6863 int8 RSSI; /**< receive signal strength (in dBm) */ 6864 uint8 PAD[2]; 6865 } wl_pfn_net_info_bssid_v3_t; 6866 6867 typedef struct wl_pfn_scanhist_bssid_v3 { 6868 uint32 version; 6869 uint32 status; 6870 uint32 count; 6871 wl_pfn_net_info_bssid_v3_t netinfo[1]; 6872 } wl_pfn_scanhist_bssid_v3_t; 6873 6874 #ifndef WL_PFN_NET_INFO_BSSID_TYPEDEF_HAS_ALIAS 6875 typedef wl_pfn_net_info_bssid_v1_t wl_pfn_net_info_bssid_t; 6876 typedef wl_pfn_scanhist_bssid_v1_t wl_pfn_scanhist_bssid_t; 6877 #endif /* WL_PFN_NET_INFO_BSSID_TYPEDEF_HAS_ALIAS */ 6878 6879 /* Version 1 and 2 for various single scan result */ 6880 #define PFN_SCANRESULT_VERSION_V1 1 6881 #define PFN_SCANRESULT_VERSION_V2 2 6882 #define PFN_SCANRESULT_VERSION_V3 3 6883 6884 /* used to report exactly one scan result */ 6885 /* plus reports detailed scan info in bss_info */ 6886 typedef struct wl_pfn_scanresult_v1 { 6887 uint32 version; 6888 uint32 status; 6889 uint32 count; 6890 wl_pfn_net_info_v1_t netinfo; 6891 wl_bss_info_v109_t bss_info; 6892 } wl_pfn_scanresult_v1_t; 6893 6894 typedef struct wl_pfn_scanresult_v2 { 6895 uint32 version; 6896 uint32 status; 6897 uint32 count; 6898 wl_pfn_net_info_v2_t netinfo; 6899 wl_bss_info_v109_t bss_info; 6900 } wl_pfn_scanresult_v2_t; 6901 6902 typedef struct wl_pfn_scanresult_v2_1 { 6903 uint32 version; 6904 uint32 status; 6905 uint32 count; 6906 wl_pfn_net_info_v2_t netinfo; 6907 uint8 bss_info[]; /* var length wl_bss_info_X structures */ 6908 } wl_pfn_scanresult_v2_1_t; 6909 6910 typedef struct wl_pfn_scanresult_v3_1 { 6911 uint32 version; 6912 uint32 status; 6913 uint32 count; 6914 wl_pfn_net_info_v3_t netinfo; 6915 uint8 bss_info[]; /* var length wl_bss_info_X structures */ 6916 } wl_pfn_scanresult_v3_1_t; 6917 6918 #define PFN_SCAN_ALLGONE_VERSION_V1 1u 6919 6920 typedef struct wl_pfn_scan_all_gone_event_v1 { 6921 uint16 version; 6922 uint16 length; 6923 uint16 flags; 6924 uint16 pad; 6925 } wl_pfn_scan_all_gone_event_v1_t; 6926 6927 #define WL_PFN_MAX_RAND_LIMIT 20u 6928 #define PFN_VERSION_V2 2u 6929 /**PFN data structure */ 6930 typedef struct wl_pfn_param_v2 { 6931 int32 version; /**< PNO parameters version */ 6932 int32 scan_freq; /**< Scan frequency */ 6933 int32 lost_network_timeout; /**< Timeout in sec. to declare 6934 * discovered network as lost 6935 */ 6936 int16 flags; /**< Bit field to control features 6937 * of PFN such as sort criteria auto 6938 * enable switch and background scan 6939 */ 6940 int16 rssi_margin; /**< Margin to avoid jitter for choosing a 6941 * PFN based on RSSI sort criteria 6942 */ 6943 uint8 bestn; /**< number of best networks in each scan */ 6944 uint8 mscan; /**< number of scans recorded */ 6945 uint8 repeat; /**< Minimum number of scan intervals 6946 *before scan frequency changes in adaptive scan 6947 */ 6948 uint8 exp; /**< Exponent of 2 for maximum scan interval */ 6949 int32 slow_freq; /**< slow scan period */ 6950 } wl_pfn_param_v2_t; 6951 6952 #define PFN_VERSION_V3 3u 6953 typedef struct wl_pfn_param_v3 { 6954 int16 version; /**< PNO parameters version */ 6955 int16 length; /* length of the structure */ 6956 int32 scan_freq; /**< Scan frequency */ 6957 int32 lost_network_timeout; /**< Timeout in sec. to declare 6958 * discovered network as lost 6959 */ 6960 int16 flags; /**< Bit field to control features 6961 * of PFN such as sort criteria auto 6962 * enable switch and background scan 6963 */ 6964 int16 rssi_margin; /**< Margin to avoid jitter for choosing a 6965 * PFN based on RSSI sort criteria 6966 */ 6967 uint8 bestn; /**< number of best networks in each scan */ 6968 uint8 mscan; /**< number of scans recorded */ 6969 uint8 repeat; /**< Minimum number of scan intervals 6970 *before scan frequency changes in adaptive scan 6971 */ 6972 uint8 exp; /**< Exponent of 2 for maximum scan interval */ 6973 int32 slow_freq; /**< slow scan period */ 6974 uint8 min_bound; /**< pfn scan period randomization - lower bound % */ 6975 uint8 max_bound; /**< pfn scan period randomization - upper bound % */ 6976 uint8 pfn_lp_scan_disable; /* add support to enable/disable scan-core scan for PNO */ 6977 uint8 PAD[1]; /**< Pad to 32-bit alignment */ 6978 } wl_pfn_param_v3_t; 6979 6980 #ifndef PFN_PARAM_HAS_ALIAS 6981 typedef wl_pfn_param_v2_t wl_pfn_param_t; 6982 #define PFN_VERSION PFN_VERSION_V2 6983 #endif 6984 6985 typedef struct wl_pfn_bssid { 6986 struct ether_addr macaddr; 6987 /* Bit4: suppress_lost, Bit3: suppress_found */ 6988 uint16 flags; 6989 } wl_pfn_bssid_t; 6990 typedef struct wl_pfn_significant_bssid { 6991 struct ether_addr macaddr; 6992 int8 rssi_low_threshold; 6993 int8 rssi_high_threshold; 6994 } wl_pfn_significant_bssid_t; 6995 #define WL_PFN_SUPPRESSFOUND_MASK 0x08 6996 #define WL_PFN_SUPPRESSLOST_MASK 0x10 6997 #define WL_PFN_SSID_IMPRECISE_MATCH 0x80 6998 #define WL_PFN_SSID_SAME_NETWORK 0x10000 6999 #define WL_PFN_SUPPRESS_AGING_MASK 0x20000 7000 #define WL_PFN_FLUSH_ALL_SSIDS 0x40000 7001 7002 #define WL_PFN_IOVAR_FLAG_MASK 0xFFFF00FF 7003 #define WL_PFN_RSSI_MASK 0xff00 7004 #define WL_PFN_RSSI_SHIFT 8 7005 7006 typedef struct wl_pfn_cfg { 7007 uint32 reporttype; 7008 int32 channel_num; 7009 uint16 channel_list[WL_NUMCHANNELS]; 7010 uint32 flags; 7011 } wl_pfn_cfg_t; 7012 7013 #define WL_PFN_SSID_CFG_VERSION 1 7014 #define WL_PFN_SSID_CFG_CLEAR 0x1 7015 7016 typedef struct wl_pfn_ssid_params { 7017 int8 min5G_rssi; /* minimum 5GHz RSSI for a BSSID to be considered */ 7018 int8 min2G_rssi; /* minimum 2.4GHz RSSI for a BSSID to be considered */ 7019 int16 init_score_max; /* The maximum score that a network can have before bonuses */ 7020 7021 int16 cur_bssid_bonus; /* Add to current bssid */ 7022 int16 same_ssid_bonus; /* score bonus for all networks with the same network flag */ 7023 int16 secure_bonus; /* score bonus for networks that are not open */ 7024 int16 band_5g_bonus; 7025 } wl_pfn_ssid_params_t; 7026 7027 typedef struct wl_ssid_ext_params { 7028 int8 min5G_rssi; /* minimum 5GHz RSSI for a BSSID to be considered */ 7029 int8 min2G_rssi; /* minimum 2.4GHz RSSI for a BSSID to be considered */ 7030 int16 init_score_max; /* The maximum score that a network can have before bonuses */ 7031 int16 cur_bssid_bonus; /* Add to current bssid */ 7032 int16 same_ssid_bonus; /* score bonus for all networks with the same network flag */ 7033 int16 secure_bonus; /* score bonus for networks that are not open */ 7034 int16 band_5g_bonus; 7035 } wl_ssid_ext_params_t; 7036 7037 typedef struct wl_pfn_ssid_cfg { 7038 uint16 version; 7039 uint16 flags; 7040 wl_ssid_ext_params_t params; 7041 } wl_pfn_ssid_cfg_t; 7042 7043 #define CH_BUCKET_REPORT_NONE 0 7044 #define CH_BUCKET_REPORT_SCAN_COMPLETE_ONLY 1 7045 #define CH_BUCKET_REPORT_FULL_RESULT 2 7046 #define CH_BUCKET_REPORT_SCAN_COMPLETE (CH_BUCKET_REPORT_SCAN_COMPLETE_ONLY | \ 7047 CH_BUCKET_REPORT_FULL_RESULT) 7048 #define CH_BUCKET_REPORT_REGULAR 0 7049 #define CH_BUCKET_GSCAN 4 7050 7051 typedef struct wl_pfn_gscan_ch_bucket_cfg { 7052 uint8 bucket_end_index; 7053 uint8 bucket_freq_multiple; 7054 uint8 flag; 7055 uint8 reserved; 7056 uint16 repeat; 7057 uint16 max_freq_multiple; 7058 } wl_pfn_gscan_ch_bucket_cfg_t; 7059 7060 typedef struct wl_pfn_capabilities { 7061 uint16 max_mscan; 7062 uint16 max_bestn; 7063 uint16 max_swc_bssid; 7064 uint16 max_hotlist_bssid; 7065 } wl_pfn_capabilities_t; 7066 7067 #define GSCAN_SEND_ALL_RESULTS_MASK (1 << 0) 7068 #define GSCAN_ALL_BUCKETS_IN_FIRST_SCAN_MASK (1 << 3) 7069 #define GSCAN_CFG_FLAGS_ONLY_MASK (1 << 7) 7070 #define WL_GSCAN_CFG_VERSION 1 7071 typedef struct wl_pfn_gscan_cfg { 7072 uint16 version; 7073 /** 7074 * BIT0 1 = send probes/beacons to HOST 7075 * BIT1 Reserved 7076 * BIT2 Reserved 7077 * Add any future flags here 7078 * BIT7 1 = no other useful cfg sent 7079 */ 7080 uint8 flags; 7081 /** Buffer filled threshold in % to generate an event */ 7082 uint8 buffer_threshold; 7083 /** 7084 * No. of BSSIDs with "change" to generate an evt 7085 * change - crosses rssi threshold/lost 7086 */ 7087 uint8 swc_nbssid_threshold; 7088 /* Max=8 (for now) Size of rssi cache buffer */ 7089 uint8 swc_rssi_window_size; 7090 uint8 count_of_channel_buckets; 7091 uint8 retry_threshold; 7092 uint16 lost_ap_window; 7093 wl_pfn_gscan_ch_bucket_cfg_t channel_bucket[1]; 7094 } wl_pfn_gscan_cfg_t; 7095 7096 #define WL_PFN_REPORT_ALLNET 0 7097 #define WL_PFN_REPORT_SSIDNET 1 7098 #define WL_PFN_REPORT_BSSIDNET 2 7099 7100 #define WL_PFN_CFG_FLAGS_PROHIBITED 0x00000001 /* Accept and use prohibited channels */ 7101 #define WL_PFN_CFG_FLAGS_RESERVED 0xfffffffe /**< Remaining reserved for future use */ 7102 7103 typedef struct wl_pfn { 7104 wlc_ssid_t ssid; /**< ssid name and its length */ 7105 int32 flags; /**< bit2: hidden */ 7106 int32 infra; /**< BSS Vs IBSS */ 7107 int32 auth; /**< Open Vs Closed */ 7108 int32 wpa_auth; /**< WPA type */ 7109 int32 wsec; /**< wsec value */ 7110 } wl_pfn_t; 7111 7112 typedef struct wl_pfn_list { 7113 uint32 version; 7114 uint32 enabled; 7115 uint32 count; 7116 wl_pfn_t pfn[1]; 7117 } wl_pfn_list_t; 7118 7119 #define PFN_SSID_EXT_VERSION 1 7120 7121 typedef struct wl_pfn_ext { 7122 uint8 flags; 7123 int8 rssi_thresh; /* RSSI threshold, track only if RSSI > threshold */ 7124 uint16 wpa_auth; /* Match the wpa auth type defined in wlioctl_defs.h */ 7125 uint8 ssid[DOT11_MAX_SSID_LEN]; 7126 uint8 ssid_len; 7127 uint8 pad; 7128 } wl_pfn_ext_t; 7129 typedef struct wl_pfn_ext_list { 7130 uint16 version; 7131 uint16 count; 7132 wl_pfn_ext_t pfn_ext[1]; 7133 } wl_pfn_ext_list_t; 7134 7135 #define WL_PFN_SSID_EXT_FOUND 0x1 7136 #define WL_PFN_SSID_EXT_LOST 0x2 7137 typedef struct wl_pfn_result_ssid { 7138 uint8 flags; 7139 int8 rssi; 7140 /* channel number */ 7141 uint16 channel; 7142 /* Assume idx in order of cfg */ 7143 uint32 index; 7144 } wl_pfn_result_ssid_crc32_t; 7145 7146 typedef struct wl_pfn_ssid_ext_result { 7147 uint16 version; 7148 uint16 count; 7149 wl_pfn_result_ssid_crc32_t net[1]; 7150 } wl_pfn_ssid_ext_result_t; 7151 7152 #define PFN_EXT_AUTH_CODE_OPEN 1 /* open */ 7153 #define PFN_EXT_AUTH_CODE_PSK 2 /* WPA_PSK or WPA2PSK */ 7154 #define PFN_EXT_AUTH_CODE_EAPOL 4 /* any EAPOL */ 7155 7156 #define WL_PFN_HIDDEN_BIT 2 7157 #define WL_PFN_HIDDEN_MASK 0x4 7158 7159 #ifndef BESTN_MAX 7160 #define BESTN_MAX 10 7161 #endif 7162 7163 #ifndef MSCAN_MAX 7164 #define MSCAN_MAX 32 7165 #endif 7166 7167 /* Dynamic scan configuration for motion profiles */ 7168 7169 #define WL_PFN_MPF_VERSION 1 7170 7171 /* Valid group IDs, may be expanded in the future */ 7172 #define WL_PFN_MPF_GROUP_SSID 0 7173 #define WL_PFN_MPF_GROUP_BSSID 1 7174 #define WL_PFN_MPF_MAX_GROUPS 2 7175 7176 /* Max number of MPF states supported in this time */ 7177 #define WL_PFN_MPF_STATES_MAX 4u 7178 #define WL_PFN_MPF_LP_CNT_MAX 7u 7179 7180 /* Flags for the mpf-specific stuff */ 7181 #define WL_PFN_MPF_ADAPT_ON_BIT 0u 7182 #define WL_PFN_MPF_ADAPTSCAN_BIT 1u 7183 #define WL_PFN_MPF_LP_SCAN_BIT 3u 7184 7185 #define WL_PFN_MPF_ADAPT_ON_MASK 0x0001 /* Bit 0 */ 7186 #define WL_PFN_MPF_ADAPTSCAN_MASK 0x0006 /* Bits [2:1] */ 7187 #define WL_PFN_MPF_LP_SCAN_CNT_MASK 0x0038 /* Bits [5:3] */ 7188 7189 /* Per-state timing values */ 7190 typedef struct wl_pfn_mpf_state_params { 7191 int32 scan_freq; /* Scan frequency (secs) */ 7192 int32 lost_network_timeout; /* Timeout to declare net lost (secs) */ 7193 int16 flags; /* Space for flags: ADAPT, LP_SCAN cnt etc */ 7194 uint8 exp; /* Exponent of 2 for max interval for SMART/STRICT_ADAPT */ 7195 uint8 repeat; /* Number of scans before changing adaptation level */ 7196 int32 slow_freq; /* Slow scan period for SLOW_ADAPT */ 7197 } wl_pfn_mpf_state_params_t; 7198 7199 typedef struct wl_pfn_mpf_param { 7200 uint16 version; /* Structure version */ 7201 uint16 groupid; /* Group ID: 0 (SSID), 1 (BSSID), other: reserved */ 7202 wl_pfn_mpf_state_params_t state[WL_PFN_MPF_STATES_MAX]; 7203 } wl_pfn_mpf_param_t; 7204 7205 /* Structure for setting pfn_override iovar */ 7206 typedef struct wl_pfn_override_param { 7207 uint16 version; /* Structure version */ 7208 uint16 start_offset; /* Seconds from now to apply new params */ 7209 uint16 duration; /* Seconds to keep new params applied */ 7210 uint16 reserved; 7211 wl_pfn_mpf_state_params_t override; 7212 } wl_pfn_override_param_t; 7213 #define WL_PFN_OVERRIDE_VERSION 1 7214 7215 /* 7216 * Definitions for base MPF configuration 7217 */ 7218 7219 #define WL_MPF_VERSION 1 7220 #define WL_MPF_MAX_BITS 3 7221 #define WL_MPF_MAX_STATES (1 << WL_MPF_MAX_BITS) 7222 7223 #define WL_MPF_STATE_NAME_MAX 12 7224 7225 typedef struct wl_mpf_val { 7226 uint16 val; /* Value of GPIO bits */ 7227 uint16 state; /* State identifier */ 7228 char name[WL_MPF_STATE_NAME_MAX]; /* Optional name */ 7229 } wl_mpf_val_t; 7230 7231 typedef struct wl_mpf_map { 7232 uint16 version; 7233 uint16 type; 7234 uint16 mask; /* Which GPIO bits to use */ 7235 uint8 count; /* Count of state/value mappings */ 7236 uint8 PAD; 7237 wl_mpf_val_t vals[WL_MPF_MAX_STATES]; 7238 } wl_mpf_map_t; 7239 7240 #define WL_MPF_STATE_AUTO (0xFFFF) /* (uint16)-1) */ 7241 7242 typedef struct wl_mpf_state { 7243 uint16 version; 7244 uint16 type; 7245 uint16 state; /* Get/Set */ 7246 uint8 force; /* 0 - auto (HW) state, 1 - forced state */ 7247 char name[WL_MPF_STATE_NAME_MAX]; /* Get/Set: Optional/actual name */ 7248 uint8 PAD; 7249 } wl_mpf_state_t; 7250 /* 7251 * WLFCTS definition 7252 */ 7253 typedef struct wl_txstatus_additional_info { 7254 uint32 rspec; 7255 uint32 enq_ts; 7256 uint32 last_ts; 7257 uint32 entry_ts; 7258 uint16 seq; 7259 uint8 rts_cnt; 7260 uint8 tx_cnt; 7261 } wl_txstatus_additional_info_t; 7262 7263 /** Service discovery */ 7264 typedef struct { 7265 uint8 transaction_id; /**< Transaction id */ 7266 uint8 protocol; /**< Service protocol type */ 7267 uint16 query_len; /**< Length of query */ 7268 uint16 response_len; /**< Length of response */ 7269 uint8 qrbuf[]; 7270 } wl_p2po_qr_t; 7271 7272 typedef struct { 7273 uint16 period; /**< extended listen period */ 7274 uint16 interval; /**< extended listen interval */ 7275 uint16 count; /* count to repeat */ 7276 uint16 pad; /* pad for 32bit align */ 7277 } wl_p2po_listen_t; 7278 7279 /** GAS state machine tunable parameters. Structure field values of 0 means use the default. */ 7280 typedef struct wl_gas_config { 7281 uint16 max_retransmit; /**< Max # of firmware/driver retransmits on no Ack 7282 * from peer (on top of the ucode retries). 7283 */ 7284 uint16 response_timeout; /**< Max time to wait for a GAS-level response 7285 * after sending a packet. 7286 */ 7287 uint16 max_comeback_delay; /**< Max GAS response comeback delay. 7288 * Exceeding this fails the GAS exchange. 7289 */ 7290 uint16 max_retries; /**< Max # of GAS state machine retries on failure 7291 * of a GAS frame exchange. 7292 */ 7293 } wl_gas_config_t; 7294 7295 /** P2P Find Offload parameters */ 7296 typedef struct wl_p2po_find_config { 7297 uint16 version; /**< Version of this struct */ 7298 uint16 length; /**< sizeof(wl_p2po_find_config_t) */ 7299 int32 search_home_time; /**< P2P search state home time when concurrent 7300 * connection exists. -1 for default. 7301 */ 7302 uint8 num_social_channels; 7303 /**< Number of social channels up to WL_P2P_SOCIAL_CHANNELS_MAX. 7304 * 0 means use default social channels. 7305 */ 7306 uint8 flags; 7307 uint16 social_channels[1]; /**< Variable length array of social channels */ 7308 } wl_p2po_find_config_t; 7309 #define WL_P2PO_FIND_CONFIG_VERSION 2 /**< value for version field */ 7310 7311 /** wl_p2po_find_config_t flags */ 7312 #define P2PO_FIND_FLAG_SCAN_ALL_APS 0x01 /**< Whether to scan for all APs in the p2po_find 7313 * periodic scans of all channels. 7314 * 0 means scan for only P2P devices. 7315 * 1 means scan for P2P devices plus non-P2P APs. 7316 */ 7317 7318 /** For adding a WFDS service to seek */ 7319 typedef struct { 7320 uint32 seek_hdl; /**< unique id chosen by host */ 7321 uint8 addr[6]; /**< Seek service from a specific device with this 7322 * MAC address, all 1's for any device. 7323 */ 7324 uint8 service_hash[P2P_WFDS_HASH_LEN]; 7325 uint8 service_name_len; 7326 uint8 service_name[MAX_WFDS_SEEK_SVC_NAME_LEN]; 7327 /**< Service name to seek, not null terminated */ 7328 uint8 service_info_req_len; 7329 uint8 service_info_req[1]; /**< Service info request, not null terminated. 7330 * Variable length specified by service_info_req_len. 7331 * Maximum length is MAX_WFDS_SEEK_SVC_INFO_LEN. 7332 */ 7333 } wl_p2po_wfds_seek_add_t; 7334 7335 /** For deleting a WFDS service to seek */ 7336 typedef struct { 7337 uint32 seek_hdl; /**< delete service specified by id */ 7338 } wl_p2po_wfds_seek_del_t; 7339 7340 /** For adding a WFDS service to advertise */ 7341 #include <packed_section_start.h> 7342 typedef BWL_PRE_PACKED_STRUCT struct { 7343 uint32 advertise_hdl; /**< unique id chosen by host */ 7344 uint8 service_hash[P2P_WFDS_HASH_LEN]; 7345 uint32 advertisement_id; 7346 uint16 service_config_method; 7347 uint8 service_name_len; 7348 uint8 service_name[MAX_WFDS_SVC_NAME_LEN]; 7349 /**< Service name , not null terminated */ 7350 uint8 service_status; 7351 uint16 service_info_len; 7352 uint8 service_info[1]; /**< Service info, not null terminated. 7353 * Variable length specified by service_info_len. 7354 * Maximum length is MAX_WFDS_ADV_SVC_INFO_LEN. 7355 */ 7356 } BWL_POST_PACKED_STRUCT wl_p2po_wfds_advertise_add_t; 7357 #include <packed_section_end.h> 7358 7359 /** For deleting a WFDS service to advertise */ 7360 typedef struct { 7361 uint32 advertise_hdl; /**< delete service specified by hdl */ 7362 } wl_p2po_wfds_advertise_del_t; 7363 7364 /** P2P Offload discovery mode for the p2po_state iovar */ 7365 typedef enum { 7366 WL_P2PO_DISC_STOP, 7367 WL_P2PO_DISC_LISTEN, 7368 WL_P2PO_DISC_DISCOVERY 7369 } disc_mode_t; 7370 7371 /* ANQP offload */ 7372 7373 #define ANQPO_MAX_QUERY_SIZE 256 7374 typedef struct { 7375 uint16 max_retransmit; /**< ~0 use default, max retransmit on no ACK from peer */ 7376 uint16 response_timeout; /**< ~0 use default, msec to wait for resp after tx packet */ 7377 uint16 max_comeback_delay; /**< ~0 use default, max comeback delay in resp else fail */ 7378 uint16 max_retries; /**< ~0 use default, max retries on failure */ 7379 uint16 query_len; /**< length of ANQP query */ 7380 uint8 query_data[1]; /**< ANQP encoded query (max ANQPO_MAX_QUERY_SIZE) */ 7381 } wl_anqpo_set_t; 7382 7383 #define WL_ANQPO_FLAGS_BSSID_WILDCARD 0x0001 7384 #define WL_ANQPO_PEER_LIST_VERSION_2 2 7385 typedef struct { 7386 uint16 channel; /**< channel of the peer */ 7387 struct ether_addr addr; /**< addr of the peer */ 7388 } wl_anqpo_peer_v1_t; 7389 typedef struct { 7390 uint16 channel; /**< channel of the peer */ 7391 struct ether_addr addr; /**< addr of the peer */ 7392 uint32 flags; /**< 0x01-Peer is MBO Capable */ 7393 } wl_anqpo_peer_v2_t; 7394 7395 #define WL_ANQPO_PEER_LIST_VERSION_3 3 7396 typedef struct { 7397 uint16 chanspec; /**< chanspec of the peer */ 7398 struct ether_addr addr; /**< addr of the peer */ 7399 uint32 flags; /**< 0x01-Peer is MBO Capable */ 7400 } wl_anqpo_peer_v3_t; 7401 7402 #define ANQPO_MAX_PEER_LIST 64 7403 typedef struct { 7404 uint16 count; /**< number of peers in list */ 7405 wl_anqpo_peer_v1_t peer[1]; /**< max ANQPO_MAX_PEER_LIST */ 7406 } wl_anqpo_peer_list_v1_t; 7407 7408 typedef struct { 7409 uint16 version; /**<VERSION */ 7410 uint16 length; /**< length of entire structure */ 7411 uint16 count; /**< number of peers in list */ 7412 wl_anqpo_peer_v2_t peer[1]; /**< max ANQPO_MAX_PEER_LIST */ 7413 } wl_anqpo_peer_list_v2_t; 7414 7415 typedef struct { 7416 uint16 version; /**< VERSION */ 7417 uint16 length; /**< length of entire structure */ 7418 uint16 count; /**< number of peers in list */ 7419 wl_anqpo_peer_v3_t peer[]; /**< max ANQPO_MAX_PEER_LIST */ 7420 } wl_anqpo_peer_list_v3_t; 7421 7422 #ifndef WL_ANQPO_PEER_LIST_TYPEDEF_HAS_ALIAS 7423 typedef wl_anqpo_peer_list_v1_t wl_anqpo_peer_list_t; 7424 typedef wl_anqpo_peer_v1_t wl_anqpo_peer_t; 7425 #endif /* WL_ANQPO_PEER_LIST_TYPEDEF_HAS_ALIAS */ 7426 7427 #define ANQPO_MAX_IGNORE_SSID 64 7428 typedef struct { 7429 uint8 is_clear; /**< set to clear list (not used on GET) */ 7430 uint8 PAD; 7431 uint16 count; /**< number of SSID in list */ 7432 wlc_ssid_t ssid[1]; /**< max ANQPO_MAX_IGNORE_SSID */ 7433 } wl_anqpo_ignore_ssid_list_t; 7434 7435 #define ANQPO_MAX_IGNORE_BSSID 64 7436 typedef struct { 7437 uint8 is_clear; /**< set to clear list (not used on GET) */ 7438 uint8 PAD; 7439 uint16 count; /**< number of addr in list */ 7440 struct ether_addr bssid[]; /**< max ANQPO_MAX_IGNORE_BSSID */ 7441 } wl_anqpo_ignore_bssid_list_t; 7442 7443 struct toe_ol_stats_t { 7444 /** Num of tx packets that don't need to be checksummed */ 7445 uint32 tx_summed; 7446 7447 /* Num of tx packets where checksum is filled by offload engine */ 7448 uint32 tx_iph_fill; 7449 uint32 tx_tcp_fill; 7450 uint32 tx_udp_fill; 7451 uint32 tx_icmp_fill; 7452 7453 /* Num of rx packets where toe finds out if checksum is good or bad */ 7454 uint32 rx_iph_good; 7455 uint32 rx_iph_bad; 7456 uint32 rx_tcp_good; 7457 uint32 rx_tcp_bad; 7458 uint32 rx_udp_good; 7459 uint32 rx_udp_bad; 7460 uint32 rx_icmp_good; 7461 uint32 rx_icmp_bad; 7462 7463 /* Num of tx packets in which csum error is injected */ 7464 uint32 tx_tcp_errinj; 7465 uint32 tx_udp_errinj; 7466 uint32 tx_icmp_errinj; 7467 7468 /* Num of rx packets in which csum error is injected */ 7469 uint32 rx_tcp_errinj; 7470 uint32 rx_udp_errinj; 7471 uint32 rx_icmp_errinj; 7472 }; 7473 7474 /** Arp offload statistic counts */ 7475 struct arp_ol_stats_t { 7476 uint32 host_ip_entries; /**< Host IP table addresses (more than one if multihomed) */ 7477 uint32 host_ip_overflow; /**< Host IP table additions skipped due to overflow */ 7478 7479 uint32 arp_table_entries; /**< ARP table entries */ 7480 uint32 arp_table_overflow; /**< ARP table additions skipped due to overflow */ 7481 7482 uint32 host_request; /**< ARP requests from host */ 7483 uint32 host_reply; /**< ARP replies from host */ 7484 uint32 host_service; /**< ARP requests from host serviced by ARP Agent */ 7485 7486 uint32 peer_request; /**< ARP requests received from network */ 7487 uint32 peer_request_drop; /**< ARP requests from network that were dropped */ 7488 uint32 peer_reply; /**< ARP replies received from network */ 7489 uint32 peer_reply_drop; /**< ARP replies from network that were dropped */ 7490 uint32 peer_service; /**< ARP request from host serviced by ARP Agent */ 7491 }; 7492 7493 /** NS offload statistic counts */ 7494 struct nd_ol_stats_t { 7495 uint32 host_ip_entries; /**< Host IP table addresses (more than one if multihomed) */ 7496 uint32 host_ip_overflow; /**< Host IP table additions skipped due to overflow */ 7497 uint32 peer_request; /**< NS requests received from network */ 7498 uint32 peer_request_drop; /**< NS requests from network that were dropped */ 7499 uint32 peer_reply_drop; /**< NA replies from network that were dropped */ 7500 uint32 peer_service; /**< NS request from host serviced by firmware */ 7501 }; 7502 7503 /* 7504 * Neighbor Discovery Offloading 7505 */ 7506 enum { 7507 WL_ND_IPV6_ADDR_TYPE_UNICAST = 0, 7508 WL_ND_IPV6_ADDR_TYPE_ANYCAST 7509 }; 7510 7511 typedef struct wl_nd_host_ip_addr { 7512 struct ipv6_addr ip_addr; /* host ip address */ 7513 uint8 type; /* type of address */ 7514 uint8 pad[3]; 7515 } wl_nd_host_ip_addr_t; 7516 7517 typedef struct wl_nd_host_ip_list { 7518 uint32 count; 7519 wl_nd_host_ip_addr_t host_ip[1]; 7520 } wl_nd_host_ip_list_t; 7521 7522 #define WL_ND_HOSTIP_IOV_VER 1 7523 7524 enum { 7525 WL_ND_HOSTIP_OP_VER = 0, /* get version */ 7526 WL_ND_HOSTIP_OP_ADD, /* add address */ 7527 WL_ND_HOSTIP_OP_DEL, /* delete specified address */ 7528 WL_ND_HOSTIP_OP_DEL_UC, /* delete all unicast address */ 7529 WL_ND_HOSTIP_OP_DEL_AC, /* delete all anycast address */ 7530 WL_ND_HOSTIP_OP_DEL_ALL, /* delete all addresses */ 7531 WL_ND_HOSTIP_OP_LIST, /* get list of host ip address */ 7532 WL_ND_HOSTIP_OP_MAX 7533 }; 7534 7535 typedef struct wl_nd_hostip { 7536 uint16 version; /* version of iovar buf */ 7537 uint16 op_type; /* operation type */ 7538 uint32 length; /* length of entire structure */ 7539 union { 7540 wl_nd_host_ip_addr_t host_ip; /* set param for add */ 7541 uint16 version; /* get return for ver */ 7542 } u; 7543 } wl_nd_hostip_t; 7544 7545 #define WL_ND_HOSTIP_FIXED_LEN OFFSETOF(wl_nd_hostip_t, u) 7546 #define WL_ND_HOSTIP_WITH_ADDR_LEN (WL_ND_HOSTIP_FIXED_LEN + sizeof(wl_nd_host_ip_addr_t)) 7547 7548 /* 7549 * Keep-alive packet offloading. 7550 */ 7551 7552 /** 7553 * NAT keep-alive packets format: specifies the re-transmission period, the packet 7554 * length, and packet contents. 7555 */ 7556 typedef struct wl_keep_alive_pkt { 7557 uint32 period_msec; /** Retransmission period (0 to disable packet re-transmits) */ 7558 uint16 len_bytes; /* Size of packet to transmit (0 to disable packet re-transmits) */ 7559 uint8 data[1]; /** Variable length packet to transmit. Contents should include 7560 * entire ethernet packet (enet header, IP header, UDP header, 7561 * and UDP payload) in network byte order. 7562 */ 7563 } wl_keep_alive_pkt_t; 7564 7565 #define WL_KEEP_ALIVE_FIXED_LEN OFFSETOF(wl_keep_alive_pkt_t, data) 7566 7567 #define MAX_RSSI_COUNT 8 7568 typedef struct rssi_struct { 7569 int8 val[MAX_RSSI_COUNT]; /**< rssi values in AFs */ 7570 int16 sum; /**< total rssi sum */ 7571 uint8 cnt; /**< number rssi samples */ 7572 uint8 idx; /**< next rssi location */ 7573 } rssi_struct_t; 7574 7575 #ifdef WLDFSP 7576 #define DFSP_EVT_OFFSET OFFSETOF(dfsp_event_data_t, ie) 7577 #define DFSP_EVT_FLAGS_AP_ASSOC (1 << 0) 7578 #define DFSP_EVT_FLAGS_AP_BCNMON (1 << 1) 7579 #define DFSP_EVT_FLAGS_PROXY_BCSA (1 << 2) 7580 #define DFSP_EVT_FLAGS_PROXY_UCSA (1 << 3) 7581 #define DFSP_EVT_FLAGS_PROXY_PCSA (1 << 4) 7582 7583 typedef struct dfsp_event_data { 7584 uint16 flags; /* indicate what triggers the event */ 7585 uint16 ie_len; 7586 uint8 ie[]; /* variable length */ 7587 } dfsp_event_data_t; 7588 7589 /* Proxy Channel Switch Announcement is a collection of IEs */ 7590 typedef struct dfsp_pcsa { 7591 dot11_ext_csa_ie_t ecsa; 7592 dot11_mesh_csp_ie_t mcsp; 7593 dot11_wide_bw_chan_switch_ie_t wbcs; 7594 } dfsp_pcsa_t; 7595 7596 /* DFS Proxy */ 7597 #define DFSP_CFG_VERSION 1 7598 #define DFSP_FLAGS_ENAB 0x1 7599 typedef struct dfsp_cfg { 7600 uint16 version; 7601 uint16 len; 7602 uint16 flags; /**< bit 1 to enable/disable the feature */ 7603 uint16 max_bcn_miss_dur; /**< maximum beacon miss duration before ceasing data tx */ 7604 uint8 mcsp_ttl; /**< remaining number of hops allowed for pcsa message */ 7605 uint8 bcsa_cnt; /**< repeat numbers of broadcast CSA */ 7606 chanspec_t mon_chan; /**< passive monitoring channel spec */ 7607 struct ether_addr mon_bssid; /**< broadcast means monitoring all */ 7608 uint16 max_bcn_miss_dur_af; /**< maximum beacon miss duration before ceasing AF tx */ 7609 } dfsp_cfg_t; 7610 7611 #define DFSP_UCSA_VERSION 1 7612 typedef struct dfsp_ucsa { 7613 uint16 version; 7614 uint16 len; 7615 struct ether_addr address; 7616 uint8 enable; 7617 uint8 retry_cnt; /**< just in case host needs to control the value */ 7618 } dfsp_ucsa_t; 7619 7620 typedef struct dfsp_ucsa_tbl { 7621 uint8 tbl_num; 7622 uint8 tbl[]; 7623 } dfsp_ucsa_tbl_t; 7624 7625 typedef struct dfsp_stats { 7626 uint32 dfsp_csainfra; 7627 uint32 dfsp_csabcnmon; 7628 uint32 dfsp_bcsarx; 7629 uint32 dfsp_ucsarx; 7630 uint32 dfsp_pcsarx; 7631 uint32 dfsp_bcsatx; 7632 uint32 dfsp_ucsatx; 7633 uint32 dfsp_pcsatx; 7634 uint32 dfsp_ucsatxfail; 7635 uint32 dfsp_evtnotif; 7636 uint32 dfsp_evtsuspect; 7637 uint32 dfsp_evtresume; 7638 } dfsp_stats_t; 7639 #endif /* WLDFSP */ 7640 7641 #ifdef WLAWDL 7642 #include <packed_section_start.h> 7643 typedef BWL_PRE_PACKED_STRUCT struct awdl_dfsp_params_tlv { 7644 uint8 type; 7645 uint16 len; 7646 uint8 ie[]; /* variable length */ 7647 } BWL_POST_PACKED_STRUCT awdl_dfsp_params_tlv_t; 7648 #include <packed_section_end.h> 7649 7650 #define AWDL_DFSP_BCN_TLV_VALUE_OFFSET OFFSETOF(awdl_dfsp_bcn_tlv_t, time_since_bcn) 7651 #include <packed_section_start.h> 7652 typedef BWL_PRE_PACKED_STRUCT struct awdl_dfsp_bcn_tlv { 7653 uint8 type; 7654 uint16 len; 7655 uint16 time_since_bcn; /* last time beacon seen in ms */ 7656 } BWL_POST_PACKED_STRUCT awdl_dfsp_bcn_tlv_t; 7657 #include <packed_section_end.h> 7658 7659 #if !defined(WLDFSP) 7660 #define AWDL_DFSP_EVT_OFFSET OFFSETOF(awdl_dfsp_event_data_t, ie) 7661 #define AWDL_DFSP_EVT_FLAGS_AP_ASSOC (1 << 0) 7662 #define AWDL_DFSP_EVT_FLAGS_AP_BCNMON (1 << 1) 7663 #define AWDL_DFSP_EVT_FLAGS_PROXY_BCSA (1 << 2) 7664 #define AWDL_DFSP_EVT_FLAGS_PROXY_UCSA (1 << 3) 7665 #define AWDL_DFSP_EVT_FLAGS_PROXY_PCSA (1 << 4) 7666 7667 typedef struct awdl_dfsp_event_data { 7668 uint16 flags; /* indicate what triggers the event */ 7669 uint16 ie_len; 7670 uint8 ie[]; /* variable length */ 7671 } awdl_dfsp_event_data_t; 7672 7673 typedef struct awdl_dfsp_stats { 7674 uint32 dfsp_csainfra; 7675 uint32 dfsp_csabcnmon; 7676 uint32 dfsp_bcsarx; 7677 uint32 dfsp_ucsarx; 7678 uint32 dfsp_pcsarx; 7679 uint32 dfsp_bcsatx; 7680 uint32 dfsp_ucsatx; 7681 uint32 dfsp_pcsatx; 7682 uint32 dfsp_ucsatxfail; 7683 uint32 dfsp_evtnotif; 7684 uint32 dfsp_evtsuspect; 7685 uint32 dfsp_evtresume; 7686 } awdl_dfsp_stats_t; 7687 7688 /* awdl peer as a DFS Proxy */ 7689 #define AWDL_DFSP_CFG_VERSION 1 7690 #define AWDL_DFSP_FLAGS_ENAB 0x1 7691 typedef struct awdl_dfsp_cfg { 7692 uint16 version; 7693 uint16 len; 7694 uint16 flags; /**< bit 1 to enable/disable the feature */ 7695 uint16 max_bcn_miss_dur; /**< maximum beacon miss duration before ceasing data tx */ 7696 uint8 mcsp_ttl; /**< remaining number of hops allowed for pcsa message */ 7697 uint8 bcsa_cnt; /**< repeat numbers of broadcast CSA */ 7698 chanspec_t mon_chan; /**< passive monitoring channel spec */ 7699 struct ether_addr mon_bssid; /**< broadcast means monitoring all */ 7700 uint16 max_bcn_miss_dur_af; /**< maximum beacon miss duration before ceasing AF tx */ 7701 } awdl_dfsp_cfg_t; 7702 7703 #define AWDL_DFSP_UCSA_VERSION 1 7704 typedef struct awdl_dfsp_ucsa { 7705 uint16 version; 7706 uint16 len; 7707 struct ether_addr address; 7708 uint8 enable; 7709 uint8 retry_cnt; /**< just in case host needs to control the value */ 7710 } awdl_dfsp_ucsa_t; 7711 7712 typedef struct awdl_dfsp_ucsa_tbl { 7713 uint8 tbl_num; 7714 uint8 tbl[]; 7715 } awdl_dfsp_ucsa_tbl_t; 7716 #endif /* defined(WLDFSP) */ 7717 7718 #if defined(WLDFSP) 7719 /* backward compatibility */ 7720 typedef dfsp_stats_t awdl_dfsp_stats_t; 7721 #define AWDL_DFSP_EVT_OFFSET DFSP_EVT_OFFSET 7722 #define AWDL_DFSP_EVT_FLAGS_AP_ASSOC DFSP_EVT_FLAGS_AP_ASSOC 7723 #define AWDL_DFSP_EVT_FLAGS_AP_BCNMON DFSP_EVT_FLAGS_AP_BCNMON 7724 #define AWDL_DFSP_EVT_FLAGS_PROXY_BCSA DFSP_EVT_FLAGS_PROXY_BCSA 7725 #define AWDL_DFSP_EVT_FLAGS_PROXY_UCSA DFSP_EVT_FLAGS_PROXY_UCSA 7726 #define AWDL_DFSP_EVT_FLAGS_PROXY_PCSA DFSP_EVT_FLAGS_PROXY_PCSA 7727 #define AWDL_DFSP_CFG_VERSION 1 7728 #define AWDL_DFSP_FLAGS_ENAB DFSP_FLAGS_ENAB 7729 typedef dfsp_cfg_t awdl_dfsp_cfg_t; 7730 #define AWDL_DFSP_UCSA_VERSION 1 7731 typedef dfsp_ucsa_t awdl_dfsp_ucsa_t; 7732 typedef dfsp_ucsa_tbl_t awdl_dfsp_ucsa_tbl_t; 7733 #endif /* !WLDFSP */ 7734 7735 /* AWDL additional capability indicator */ 7736 typedef uint32 awdl_cap_mask_t; 7737 7738 #define WLC_AWDL_CAP_SEC_PAYLOAD 0x1u 7739 #define WLC_AWDL_CAP_CCA_STATS 0x2u 7740 #define WLC_AWDL_CAP_VERSION 2u 7741 #define WLC_AWDL_CAP_BMAP_SIZE sizeof(awdl_cap_mask_t) 7742 7743 typedef struct awdl_cap_info { 7744 uint16 version; /* Cap structure version */ 7745 uint16 length; /* Length: Includes version 7746 + length + variable 7747 data - 1byte(uint8) 7748 */ 7749 uint8 awdl_cap[0]; /* Variable size data */ 7750 } awdl_cap_info_t; 7751 7752 typedef struct awdl_af_sec_payload { 7753 uint16 version; /* Version of this structure */ 7754 uint16 length; /* Length of this entire struct including payload */ 7755 uint16 pri_pload_bm; /* Primary payload bitmask */ 7756 uint16 sec_pload_bm; /* Secondary payload bitmask */ 7757 uint8 payload[]; /* Secondary Payload */ 7758 } awdl_af_sec_payload_t; 7759 7760 typedef struct awdl_config_params { 7761 uint32 version; 7762 uint8 awdl_chan; /**< awdl channel */ 7763 uint8 guard_time; /**< Guard Time */ 7764 uint16 aw_period; /**< AW interval period */ 7765 uint16 aw_cmn_length; /**< Radio on Time AW */ 7766 uint16 action_frame_period; /**< awdl action frame period */ 7767 uint16 awdl_pktlifetime; /**< max packet life time in msec for awdl action frames */ 7768 uint16 awdl_maxnomaster; /**< max master missing time */ 7769 uint16 awdl_extcount; /**< Max extended period count for traffic */ 7770 uint16 aw_ext_length; /**< AW ext period */ 7771 uint16 awdl_nmode; /**< Operation mode of awdl interface; * 0 - Legacy mode 7772 * 1 - 11n rate only * 2 - 11n + ampdu rx/tx 7773 */ 7774 struct ether_addr ea; /**< destination bcast/mcast address to which action frame 7775 * need to be sent 7776 */ 7777 } awdl_config_params_t; 7778 7779 typedef struct wl_awdl_action_frame { 7780 uint16 len_bytes; 7781 uint8 awdl_action_frame_data[1]; 7782 } wl_awdl_action_frame_t; 7783 7784 #define WL_AWDL_ACTION_FRAME_FIXED_LEN OFFSETOF(wl_awdl_action_frame_t, awdl_sync_frame) 7785 7786 typedef struct awdl_peer_node { 7787 uint32 type_state; /**< Master, slave , etc.. */ 7788 uint16 aw_counter; /**< avail window counter */ 7789 int8 rssi; /**< rssi last af was received at */ 7790 int8 last_rssi; /**< rssi in the last AF */ 7791 uint16 tx_counter; /**<count down timer to next AW */ 7792 uint16 tx_delay; /**< ts_hw - ts_fw */ 7793 uint16 period_tu; 7794 uint16 aw_period; /**< AW period - aw_cmn + ext * ext_len */ 7795 uint16 aw_cmn_length; /**< Common AW length */ 7796 uint16 aw_ext_length; /**< AW_EXT length */ 7797 uint32 self_metrics; /**< Election Metric */ 7798 uint32 top_master_metrics; /**< Top Master Metric */ 7799 struct ether_addr addr; 7800 struct ether_addr top_master; 7801 uint8 dist_top; /**< Distance from Top */ 7802 uint8 has_private_election_params; 7803 struct ether_addr private_top_master; 7804 uint32 private_top_master_metric; 7805 uint32 private_election_ID; 7806 uint8 private_distance_from_top; 7807 uint8 PAD[3]; 7808 } awdl_peer_node_t; 7809 7810 typedef struct awdl_peer_table { 7811 uint16 version; 7812 uint16 len; 7813 uint8 peer_nodes[1]; 7814 } awdl_peer_table_t; 7815 7816 /* structure for adding advertisers from host */ 7817 typedef struct awdl_peer_advet_add { 7818 uint16 aw_counter; /* avail window counter */ 7819 uint16 tx_counter; /* Down counter */ 7820 uint16 tx_delay; /* ts_hw - ts_fw */ 7821 uint16 period_tu; 7822 uint16 aw_cmn_length; 7823 uint16 aw_ext_length; 7824 uint16 aw_period; 7825 int8 rssi; /* RSSI value */ 7826 uint8 guard_time; 7827 uint8 presence_mode; 7828 uint8 age; /* age of this record */ 7829 uint8 dist_top; /* Distance from Top */ 7830 uint8 PAD; 7831 uint32 ms; /* time at which we received the AF */ 7832 uint32 self_metrics; /* election metric */ 7833 uint32 top_master_metrics; 7834 struct ether_addr top_master; /* Top Master address */ 7835 struct ether_addr addr; /* Peer address to be added */ 7836 } awdl_peer_advet_add_t; 7837 7838 typedef struct awdl_af_hdr { 7839 struct ether_addr dst_mac; 7840 uint8 action_hdr[4]; /**< Category + OUI[3] */ 7841 } awdl_af_hdr_t; 7842 7843 typedef struct awdl_oui { 7844 uint8 oui[3]; /**< default: 0x00 0x17 0xf2 */ 7845 uint8 oui_type; /**< AWDL: 0x08 */ 7846 } awdl_oui_t; 7847 7848 typedef struct awdl_hdr { 7849 uint8 type; /**< 0x08 AWDL */ 7850 uint8 version; 7851 uint8 sub_type; /**< Sub type */ 7852 uint8 rsvd; /**< Reserved */ 7853 uint32 phy_timestamp; /**< PHY Tx time */ 7854 uint32 fw_timestamp; /**< Target Tx time */ 7855 } awdl_hdr_t; 7856 7857 #ifndef AWDL_DEFAULT_MAX_PEERS 7858 #define AWDL_DEFAULT_MAX_PEERS 8 7859 #endif /* AWDL_DEFAULT_MAX_PEERS */ 7860 7861 /* AWDL AF flags for awdl_oob_af iovar */ 7862 #define AWDL_OOB_AF_FILL_TSF_PARAMS 0x00000001 7863 #define AWDL_OOB_AF_FILL_SYNC_PARAMS 0x00000002 7864 #define AWDL_OOB_AF_FILL_ELECT_PARAMS 0x00000004 7865 #define AWDL_OOB_AF_PARAMS_SIZE 38 7866 7867 #include <packed_section_start.h> 7868 typedef BWL_PRE_PACKED_STRUCT struct awdl_oob_af_params { 7869 struct ether_addr bssid; 7870 struct ether_addr dst_mac; 7871 uint32 channel; 7872 uint32 dwell_time; 7873 uint32 flags; 7874 uint32 pkt_lifetime; 7875 uint32 tx_rate; 7876 uint32 max_retries; /**< for unicast frames only */ 7877 uint16 payload_len; 7878 uint8 payload[1]; /**< complete AF payload */ 7879 } BWL_POST_PACKED_STRUCT awdl_oob_af_params_t; 7880 #include <packed_section_end.h> 7881 7882 #include <packed_section_start.h> 7883 typedef BWL_PRE_PACKED_STRUCT struct awdl_oob_af_params_async { 7884 uint32 tx_time; /**< tsf time to transmit, in usec */ 7885 uint16 tag; /**< packet tag */ 7886 struct ether_addr bssid; 7887 struct ether_addr dst_mac; 7888 uint32 channel; 7889 uint32 dwell_time; 7890 uint32 flags; 7891 uint32 pkt_lifetime; 7892 uint32 tx_rate; 7893 uint32 max_retries; /**< for unicast frames only */ 7894 uint16 payload_len; 7895 uint8 payload[1]; /**< complete AF payload */ 7896 } BWL_POST_PACKED_STRUCT awdl_oob_af_params_async_t; 7897 #include <packed_section_end.h> 7898 7899 #include <packed_section_start.h> 7900 typedef BWL_PRE_PACKED_STRUCT struct awdl_oob_af_params_auto { 7901 uint32 tx_chan_map; /**< bitmap for the channels in the chan seq to transmit the af */ 7902 uint32 tx_aws_offset; /**< time to transmit from the aw start, in usec */ 7903 struct ether_addr bssid; 7904 struct ether_addr dst_mac; 7905 uint32 channel; 7906 uint32 dwell_time; 7907 uint32 flags; 7908 uint32 pkt_lifetime; 7909 uint32 tx_rate; 7910 uint32 max_retries; /**< for unicast frames only */ 7911 uint16 payload_len; 7912 uint8 payload[1]; /**< complete AF payload */ 7913 } BWL_POST_PACKED_STRUCT awdl_oob_af_params_auto_t; 7914 #include <packed_section_end.h> 7915 7916 #include <packed_section_start.h> 7917 typedef BWL_PRE_PACKED_STRUCT struct awdl_sync_params { 7918 uint8 type; /**< Type */ 7919 uint16 param_len; /**< sync param length */ 7920 uint8 tx_chan; /**< tx channel */ 7921 uint16 tx_counter; /**< tx down counter */ 7922 uint8 master_chan; /**< master home channel */ 7923 uint8 guard_time; /**< Guard Time */ 7924 uint16 aw_period; /**< AW period */ 7925 uint16 action_frame_period; /**< awdl action frame period */ 7926 uint16 awdl_flags; /**< AWDL Flags */ 7927 uint16 aw_ext_length; /**< AW extention len */ 7928 uint16 aw_cmn_length; /**< AW common len */ 7929 uint16 aw_remaining; /**< Remaining AW length */ 7930 uint8 min_ext; /**< Minimum Extention count */ 7931 uint8 max_ext_multi; /**< Max multicast Extention count */ 7932 uint8 max_ext_uni; /**< Max unicast Extention count */ 7933 uint8 max_ext_af; /**< Max af Extention count */ 7934 struct ether_addr current_master; /**< Current Master mac addr */ 7935 uint8 presence_mode; /**< Presence mode */ 7936 uint8 reserved; 7937 uint16 aw_counter; /**< AW seq# */ 7938 uint16 ap_bcn_alignment_delta; /**< AP Beacon alignment delta */ 7939 } BWL_POST_PACKED_STRUCT awdl_sync_params_t; 7940 #include <packed_section_end.h> 7941 7942 #include <packed_section_start.h> 7943 typedef BWL_PRE_PACKED_STRUCT struct awdl_channel_sequence { 7944 uint8 aw_seq_len; /**< AW seq length */ 7945 uint8 aw_seq_enc; /**< AW seq encoding */ 7946 uint8 aw_seq_duplicate_cnt; /**< AW seq dupilcate count */ 7947 uint8 seq_step_cnt; /**< Seq spet count */ 7948 uint16 seq_fill_chan; /**< channel to fill in; 0xffff repeat current channel */ 7949 uint8 chan_sequence[1]; /**< Variable list of channel Sequence */ 7950 } BWL_POST_PACKED_STRUCT awdl_channel_sequence_t; 7951 #include <packed_section_end.h> 7952 #define WL_AWDL_CHAN_SEQ_FIXED_LEN OFFSETOF(awdl_channel_sequence_t, chan_sequence) 7953 7954 #include <packed_section_start.h> 7955 typedef BWL_PRE_PACKED_STRUCT struct awdl_election_info { 7956 uint8 election_flags; /**< Election Flags */ 7957 uint16 election_ID; /**< Election ID */ 7958 uint32 self_metrics; 7959 } BWL_POST_PACKED_STRUCT awdl_election_info_t; 7960 #include <packed_section_end.h> 7961 7962 /* This is the super set of the one above. Will retire that one once this one is established */ 7963 #include <packed_section_start.h> 7964 typedef BWL_PRE_PACKED_STRUCT struct awdl_election_tree_info { 7965 uint8 election_flags; /**< Election Flags */ 7966 uint16 election_ID; /**< Election ID */ 7967 uint32 self_metrics; 7968 int8 close_sync_rssi_thld; 7969 int8 master_rssi_boost; 7970 int8 edge_sync_rssi_thld; 7971 int8 close_range_rssi_thld; 7972 int8 mid_range_rssi_thld; 7973 uint8 max_higher_masters_close_range; 7974 uint8 max_higher_masters_mid_range; 7975 uint8 max_tree_depth; 7976 /* read only */ 7977 struct ether_addr top_master; /**< top Master mac addr */ 7978 uint32 top_master_self_metric; 7979 uint8 current_tree_depth; 7980 7981 uint8 edge_master_dwell_cnt; 7982 struct ether_addr private_top_master; /**< private top Master mac addr */ 7983 uint32 private_top_master_metric; 7984 uint32 private_election_ID; 7985 uint8 private_distance_from_top; 7986 } BWL_POST_PACKED_STRUCT awdl_election_tree_info_t; 7987 #include <packed_section_end.h> 7988 7989 #include <packed_section_start.h> 7990 typedef BWL_PRE_PACKED_STRUCT struct awdl_election_params_tlv { 7991 uint8 type; /**< Type */ 7992 uint16 param_len; /**< Election param length */ 7993 uint8 election_flags; /**< Election Flags */ 7994 uint16 election_ID; /**< Election ID */ 7995 uint8 dist_top; /**< Distance from Top */ 7996 uint8 rsvd; /**< Reserved */ 7997 struct ether_addr top_master; /**< Top Master mac addr */ 7998 uint32 top_master_metrics; 7999 uint32 self_metrics; 8000 uint8 pad[2]; /**< Padding */ 8001 } BWL_POST_PACKED_STRUCT awdl_election_params_tlv_t; 8002 #include <packed_section_end.h> 8003 8004 /* 8005 * Definition in DINGO 8006 */ 8007 typedef struct awdl_opmode_v2 { 8008 uint8 mode; /* 0 - Auto; 1 - Fixed; 2 - Forced */ 8009 uint8 role; /* 0 - slave; 1 - non-elect master; 2 - master */ 8010 uint16 bcast_tu; /* Bcasting period(TU) for non-elect master */ 8011 struct ether_addr master; /* Address of master to sync to */ 8012 uint16 cur_bcast_tu; /* Current Bcasting Period(TU) */ 8013 uint8 master_type; 8014 uint8 dist_top; 8015 uint16 cluster_id; 8016 uint32 tsf_offset_h; 8017 uint32 tsf_offset_l; 8018 } awdl_opmode_v2_t; 8019 8020 typedef struct awdl_payload { 8021 uint16 len; /**< Payload length */ 8022 uint8 payload[1]; /**< Payload */ 8023 } awdl_payload_t; 8024 8025 typedef struct awdl_long_payload { 8026 uint8 long_psf_period; /**< transmit every long_psf_perios AWs */ 8027 uint8 long_psf_tx_offset; /**< delay from aw_start */ 8028 uint16 len; /**< Payload length */ 8029 uint8 payload[1]; /**< Payload */ 8030 } awdl_long_payload_t; 8031 8032 /* Values for awdl_opmode_t.role */ 8033 #define AWDL_ROLE_SLAVE 0 8034 #define AWDL_ROLE_NE_MASTER 1 8035 #define AWDL_ROLE_MASTER 2 8036 8037 #define SYNC_ROLE(role) (role & 0x0f) 8038 8039 /* For NAN-AWDL concurrent master type */ 8040 /* 8041 SELF: self master, mac address can be NULL and mgmt interface mac is used 8042 AWDL: align to AWDL master, AWDL desired mac master address must be provided. 8043 NAN: align to NAN master, NAN target master mac address must be provided. 8044 BOTH: align to both NAN/AWDL master, both mac addresses must be provided. 8045 has to guarantee the NAN and AWDL master is in the same tree. 8046 */ 8047 #define SYNC_MASTER_SELF 1 8048 #define SYNC_MASTER_AWDL 2 8049 #define SYNC_MASTER_NAN 3 8050 #define SYNC_MASTER_BOTH 4 8051 8052 /* use uper 4-bit to be the SYNC_MASTER_TYPE */ 8053 #define SYNC_MASTER_TYPE(role) ((role & 0xf0) >> 4) 8054 8055 /* 8056 * Definitions on PHO, BIS, TRUNK & IGU branches 8057 */ 8058 typedef struct awdl_opmode_v1 { 8059 uint8 mode; /* 0 - Auto; 1 - Fixed */ 8060 uint8 role; /* 0 - slave; 1 - non-elect master; 2 - master */ 8061 uint16 bcast_tu; /* Bcasting period(TU) for non-elect master */ 8062 struct ether_addr master; /* Address of master to sync to */ 8063 uint16 cur_bcast_tu; /* Current Bcasting Period(TU) */ 8064 } awdl_opmode_v1_t; 8065 8066 typedef awdl_opmode_v1_t awdl_opmode_t; 8067 8068 typedef union awdl_opmode_un { 8069 awdl_opmode_v1_t opmode_v1; 8070 awdl_opmode_v2_t opmode_v2; 8071 } awdl_opmode_un_t; 8072 8073 typedef struct awdl_extcount { 8074 uint8 minExt; /**< Min extension count */ 8075 uint8 maxExtMulti; /**< Max extension count for mcast packets */ 8076 uint8 maxExtUni; /**< Max extension count for unicast packets */ 8077 uint8 maxAfExt; /**< Max extension count */ 8078 } awdl_extcount_t; 8079 8080 #define AWDL_OPMODE_AUTO 0 8081 #define AWDL_OPMODE_FIXED 1 8082 #define AWDL_OPMODE_FORCED 2 /* Fixed Mode with Forced_mode on */ 8083 8084 /** peer add/del operation */ 8085 typedef struct awdl_peer_op { 8086 uint8 version; 8087 uint8 opcode; /**< see opcode definition */ 8088 struct ether_addr addr; 8089 uint8 mode; 8090 /* add other fixed fields here and increase the version number */ 8091 /* 0 or more TLVs at the end */ 8092 } awdl_peer_op_t; 8093 8094 /** peer op table */ 8095 typedef struct awdl_peer_op_tbl { 8096 uint16 len; /**< length */ 8097 uint8 tbl[1]; /**< Peer table */ 8098 } awdl_peer_op_tbl_t; 8099 8100 #include <packed_section_start.h> 8101 typedef BWL_PRE_PACKED_STRUCT struct awdl_peer_op_node { 8102 struct ether_addr addr; 8103 uint32 flags; /**< Flags to indicate various states */ 8104 uint16 chanseq_len; 8105 uint8 chanseq[1]; 8106 } BWL_POST_PACKED_STRUCT awdl_peer_op_node_t; 8107 #include <packed_section_end.h> 8108 8109 /* awdl_peer_op_node_t flags */ 8110 #define AWDL_PEER_NODE_OP_FLAG_HT 0x01 8111 #define AWDL_PEER_NODE_OP_FLAG_AMPDU 0x02 8112 #define AWDL_PEER_NODE_OP_FLAG_PM 0x04 8113 #define AWDL_PEER_NODE_OP_FLAG_ABAND 0x08 8114 #define AWDL_PEER_NODE_OP_FLAG_QOS 0x10 8115 #define AWDL_PEER_NODE_OP_FLAG_AWDL 0x20 8116 #define AWDL_PEER_NODE_OP_FLAG_VHT 0x40 8117 #define AWDL_PEER_OP_CUR_VER 0 8118 8119 #define AWDL_STATS_VERSION_3 3 8120 #define AWDL_STATS_CURRENT_VERSION AWDL_STATS_VERSION_3 8121 8122 /** AWDL related statistics */ 8123 typedef struct awdl_stats_core_v3 { 8124 uint32 slotstart; /* AW slot_start */ 8125 uint32 slotend; /* AW slot_end */ 8126 uint32 slotskip; /* AW slot_skip */ 8127 uint32 slotstart_partial; /* AW slot resume */ 8128 uint32 slotend_partial; /* AW slot pre-empt */ 8129 uint32 psfstart; /* PSF slot_start */ 8130 uint32 psfend; /* PSF slot_end */ 8131 uint32 psfskip; /* PSF slot_skip */ 8132 uint32 psfreqfail; /* PSF timeslot register fail */ 8133 uint32 psfcnt; /* Number of PSFs */ 8134 uint32 micnt; /* Number of MI frames */ 8135 uint32 chansw; /* Total number of chan switches */ 8136 uint32 awrealignfail; /* No of awrealign failures */ 8137 uint32 datatx; 8138 uint32 datarx; 8139 uint32 txdrop; 8140 uint32 rxdrop; 8141 uint32 monrx; 8142 uint32 txsupr; 8143 uint32 rx80211; 8144 } awdl_stats_core_v3_t; 8145 8146 typedef struct awdl_stats_cmn_v3 { 8147 uint32 afrx; 8148 uint32 aftx; 8149 uint32 lostmaster; 8150 uint32 misalign; 8151 uint32 aws; 8152 uint32 aw_dur; 8153 uint32 debug; 8154 uint32 afrxdrop; 8155 uint32 awdrop; 8156 uint32 noawchansw; 8157 uint32 peeropdrop; 8158 uint16 chancal; /* Used as a counter to track AWDL slots < 60TU */ 8159 uint16 nopreawint; 8160 uint32 awdropchsw; 8161 uint32 nopreawchsw; 8162 uint32 nopreawprep; 8163 uint32 aws_misalign; 8164 uint32 txeval_fail; 8165 uint32 infra_reqrcq; 8166 uint32 awdl_reqtxq; 8167 uint32 psfchanswtchskip; /* # chan. sw skipped during PSF xmit */ 8168 uint32 psfstateupdskip; /* # of PM updates skipped */ 8169 uint32 infra_offchpsf; 8170 uint32 awdl_offchpsf; 8171 uint32 chseqreq; 8172 uint32 peerdelreq; 8173 uint32 awend; 8174 uint32 awrealign; /* No of AW realigns */ 8175 uint32 awchmismatch; /* Channel mismatch between expcted ch and scheduled ch */ 8176 } awdl_stats_cmn_v3_t; 8177 8178 typedef struct awdl_stats_v3 { 8179 uint16 version; 8180 uint16 length; 8181 awdl_stats_cmn_v3_t cmnstats; 8182 awdl_stats_core_v3_t corestats[MAX_NUM_D11CORES]; 8183 awdl_dfsp_stats_t dfspstats; 8184 } awdl_stats_v3_t; 8185 8186 typedef struct awdl_stats_v2 { 8187 uint32 afrx; 8188 uint32 aftx; 8189 uint32 datatx; 8190 uint32 datarx; 8191 uint32 txdrop; 8192 uint32 rxdrop; 8193 uint32 monrx; 8194 uint32 lostmaster; 8195 uint32 misalign; 8196 uint32 aws; 8197 uint32 aw_dur; 8198 uint32 debug; 8199 uint32 txsupr; 8200 uint32 afrxdrop; 8201 uint32 awdrop; 8202 uint32 noawchansw; 8203 uint32 rx80211; 8204 uint32 peeropdrop; 8205 uint16 chancal; 8206 uint16 nopreawint; 8207 uint32 awdropchsw; 8208 uint32 nopreawchsw; 8209 uint32 nopreawprep; 8210 uint32 aws_misalign; 8211 uint32 txeval_fail; 8212 uint32 infra_reqrcq; 8213 uint32 awdl_reqtxq; 8214 uint32 psfchanswtchskip; /* # chan. sw skipped during PSF xmit */ 8215 uint32 psfstateupdskip; /* # of PM updates skipped */ 8216 uint32 dfsp_csainfra; 8217 uint32 dfsp_csabcnmon; 8218 uint32 dfsp_bcsarx; 8219 uint32 dfsp_ucsarx; 8220 uint32 dfsp_pcsarx; 8221 uint32 dfsp_bcsatx; 8222 uint32 dfsp_ucsatx; 8223 uint32 dfsp_pcsatx; 8224 uint32 dfsp_ucsatxfail; 8225 uint32 dfsp_evtnotif; 8226 uint32 dfsp_evtsuspect; 8227 uint32 dfsp_evtresume; 8228 } awdl_stats_v2_t; 8229 8230 typedef struct awdl_stats_v1 { 8231 uint32 afrx; 8232 uint32 aftx; 8233 uint32 datatx; 8234 uint32 datarx; 8235 uint32 txdrop; 8236 uint32 rxdrop; 8237 uint32 monrx; 8238 uint32 lostmaster; 8239 uint32 misalign; 8240 uint32 aws; 8241 uint32 aw_dur; 8242 uint32 debug; 8243 uint32 txsupr; 8244 uint32 afrxdrop; 8245 uint32 awdrop; 8246 uint32 noawchansw; 8247 uint32 rx80211; 8248 uint32 peeropdrop; 8249 uint16 chancal; 8250 uint16 nopreawint; 8251 uint32 awdropchsw; 8252 uint32 nopreawchsw; 8253 uint32 nopreawprep; 8254 uint32 infra_offchpsf; 8255 uint32 awdl_offchpsf; 8256 uint32 pmnoack; 8257 uint32 scanreq; 8258 uint32 chseqreq; 8259 uint32 peerdelreq; 8260 uint32 aws_misalign; 8261 uint32 txeval_fail; 8262 uint32 infra_reqrcq; 8263 uint32 awdl_reqtxq; 8264 uint32 psfchanswtchskip; /* # chan. sw skipped during PSF xmit */ 8265 uint32 psfstateupdskip; /* # of PM updates skipped */ 8266 uint32 dfsp_csainfra; 8267 uint32 dfsp_csabcnmon; 8268 uint32 dfsp_bcsarx; 8269 uint32 dfsp_ucsarx; 8270 uint32 dfsp_pcsarx; 8271 uint32 dfsp_bcsatx; 8272 uint32 dfsp_ucsatx; 8273 uint32 dfsp_pcsatx; 8274 uint32 dfsp_ucsatxfail; 8275 uint32 dfsp_evtnotif; 8276 uint32 dfsp_evtsuspect; 8277 uint32 dfsp_evtresume; 8278 } awdl_stats_v1_t; 8279 8280 typedef struct awdl_uct_stats { 8281 uint32 aw_proc_in_aw_sched; 8282 uint32 aw_upd_in_pre_aw_proc; 8283 uint32 pre_aw_proc_in_aw_set; 8284 uint32 ignore_pre_aw_proc; 8285 uint32 miss_pre_aw_intr; 8286 uint32 aw_dur_zero; 8287 uint32 aw_sched; 8288 uint32 aw_proc; 8289 uint32 pre_aw_proc; 8290 uint32 not_init; 8291 uint32 null_awdl; 8292 } awdl_uct_stats_t; 8293 8294 /* peer opcode */ 8295 #define AWDL_PEER_OP_ADD 0 8296 #define AWDL_PEER_OP_DEL 1 8297 #define AWDL_PEER_OP_INFO 2 8298 #define AWDL_PEER_OP_UPD 3 8299 8300 /**AWDL Piggy backed scan */ 8301 typedef struct wl_awdl_pscan_params { 8302 wlc_ssid_t ssid; /**< default: {0, ""} */ 8303 struct ether_addr bssid; /**< default: bcast */ 8304 uint8 scan_type; /**< active or passive, 0 use default */ 8305 uint8 pad; /**< pad */ 8306 int32 nprobes; /**< -1 use default, number of probes per channel */ 8307 int32 aw_seq_num; /**< count AW sequence nunbers to be piggy backed for scan */ 8308 int32 nssid; /**< count of ssid in list */ 8309 int32 rsvd; /**< Reserved */ 8310 uint16 aw_counter_list[1]; /**< This is a list contains in following order 8311 * - List aw seq numbers 8312 * - List of SSID's 4 byte aligned. 8313 */ 8314 } wl_awdl_pscan_params_t; 8315 8316 typedef struct wl_pscan_params { 8317 uint32 version; 8318 uint16 action; /**< PSCAN action type: FW or Host initiated pscan or abort pscan */ 8319 uint16 sync_id; 8320 wl_awdl_pscan_params_t params; 8321 } wl_pscan_params_t; 8322 8323 #define WL_AWDL_PSCAN_PARAMS_FIXED_SIZE (OFFSETOF(wl_awdl_pscan_params_t, aw_counter_list)) 8324 #define WL_AWDL_MAX_NUM_AWSEQ 64 8325 #define AWDL_PSCAN_REQ_VERSION 1 8326 8327 /** awdl pscan action type values */ 8328 #define AWDL_HOST_PSCAN 0 /**< Host Initiated PSCAN */ 8329 #define AWDL_FW_PSCAN 1 /**< Firmware Initiated PSCAN */ 8330 #define AWDL_ABORT_PSCAN 2 /**< Abort any PSCAN */ 8331 8332 /* "aftxmode" iovar values */ 8333 #define AWDL_AFTXMODE_AUTO 0 /**< Send AF on AWDL channel best effort while outside AW */ 8334 8335 /* --- Deprecated ---- */ 8336 #define AWDL_AFTXMODE_INFRA 1 /**< Send AF on Infra channel while outside AW */ 8337 #define AWDL_AFTXMODE_CUR_CHAN 2 /**< Send AF on Current channel while outside AW */ 8338 /* --- Deprecated ---- */ 8339 8340 #define AWDL_AFTXMODE_SUPPRESS 3 /**< Suppress AF Tx */ 8341 #define AWDL_AFTXMODE_SYNC_PREAW 4 /**< Send AF on master channel/s always in pre AW time */ 8342 #define AWDL_AFTXMODE_LAST 4 /**< Last AWDL_AFTXMODE_XXX */ 8343 8344 typedef struct awdl_pw_opmode { 8345 struct ether_addr top_master; /**< Peer mac addr */ 8346 uint8 mode; /**< 0 - normal; 1 - fast mode */ 8347 } awdl_pw_opmode_t; 8348 8349 /** i/f request */ 8350 typedef struct wl_awdl_if2 { 8351 int32 cfg_idx; 8352 int32 up; 8353 struct ether_addr bssid; 8354 struct ether_addr if_addr; 8355 } wl_awdl_if2_t; 8356 8357 typedef struct _aw_start { 8358 uint8 role; 8359 struct ether_addr master; 8360 uint8 aw_seq_num; 8361 } aw_start_t; 8362 8363 typedef struct _aw_extension_start { 8364 uint8 aw_ext_num; 8365 } aw_extension_start_t; 8366 8367 typedef struct _awdl_peer_state { 8368 struct ether_addr peer; 8369 uint8 state; 8370 } awdl_peer_state_t; 8371 #define AWDL_PEER_STATE_OPEN 0 8372 #define AWDL_PEER_STATE_CLOSE 1 8373 8374 typedef struct _awdl_sync_state_changed { 8375 uint8 new_role; 8376 struct ether_addr master; 8377 } awdl_sync_state_changed_t; 8378 8379 typedef struct _awdl_sync_state { 8380 uint8 role; 8381 struct ether_addr master; 8382 uint8 PAD; 8383 uint32 continuous_election_enable; 8384 } awdl_sync_state_t; 8385 8386 typedef struct _awdl_aw_ap_alignment { 8387 uint32 enabled; 8388 int32 offset; 8389 uint32 align_on_dtim; 8390 } awdl_aw_ap_alignment_t; 8391 8392 typedef struct _awdl_peer_stats { 8393 uint32 version; 8394 struct ether_addr address; 8395 uint8 clear; 8396 int8 rssi; 8397 int8 avg_rssi; 8398 uint8 txRate; 8399 uint8 rxRate; 8400 uint8 PAD; 8401 uint32 numTx; 8402 uint32 numTxRetries; 8403 uint32 numTxFailures; 8404 } awdl_peer_stats_t; 8405 8406 #define MAX_NUM_AWDL_KEYS 4 8407 typedef struct _awdl_aes_key { 8408 uint32 version; 8409 int32 enable; 8410 struct ether_addr awdl_peer; 8411 uint8 keys[MAX_NUM_AWDL_KEYS][16]; 8412 uint8 PAD[2]; 8413 } awdl_aes_key_t; 8414 8415 /* AWDL CCA Stats */ 8416 8417 /* CCA Counters Delta @ Chan. boundary sent by FW to host */ 8418 8419 typedef struct wlc_awdl_cca_stats { 8420 chanspec_t chanspec; /* Chanspec when CCA stats were read */ 8421 uint16 pad; 8422 uint32 sample_dur; /* Duration in MS for which stats were sampled */ 8423 uint32 congest_ibss; /* Delta between IBSS - TxDUR */ 8424 uint32 congest_obss; /* Delta between OBSS - noctg */ 8425 uint32 interference; /* Delta between nopkt */ 8426 } wlc_awdl_cca_stats_t; 8427 8428 /* AWDL TLVs */ 8429 typedef enum wl_awdl_tlv { 8430 WL_AWDL_XTLV_CCA_STATS = 0x1u /* CCA Stats sent to host on chan. boundary */ 8431 } wl_awdl_tlv_t; 8432 8433 #include <packed_section_start.h> 8434 typedef BWL_PRE_PACKED_STRUCT struct awdl_scan_event_data { 8435 uint8 scan_usage; /**< Kind of scan in progress */ 8436 uint8 nscan_chans; /**< number of channels to be scanned */ 8437 uint8 ncached_chans; /**< number of cached channels */ 8438 uint8 flags; 8439 uint8 chan_list[1]; /**< List of cached channels followed by 8440 * channels to be scanned 8441 */ 8442 } BWL_POST_PACKED_STRUCT awdl_scan_event_data_t; 8443 8444 /* Flags */ 8445 /* bit-0 : Used to indicate if the flags/pad is valid 8446 * bit-1 : Slice-0 is blocked on scan. 8447 * bit-2 : Slice-1 is blocked on scan. 8448 * bit-7 : reserved 8449 */ 8450 8451 #define AWDL_SCAN_EVT_DATA_FLAGS_VALID (1<<0) 8452 #define AWDL_SCAN_EVT_DATA_FLAGS_SLICE0_BLOCKED (1<<1) 8453 #define AWDL_SCAN_EVT_DATA_FLAGS_SLICE1_BLOCKED (1<<2) 8454 8455 #include <packed_section_end.h> 8456 8457 /* 8458 * This structure will be supported only for pre-Koala builds. 8459 * From Koala onwards use local adv_struct_master_local_t structure 8460 * defined in wlc_awdl.c 8461 */ 8462 8463 #ifndef WLAWDL_USE_MASTER_LOCAL 8464 typedef struct adv_struct_norm { 8465 uint16 aw_counter; /**< avail window counter */ 8466 uint16 tx_counter; 8467 uint16 tx_delay; /**< ts_hw - ts_fw */ 8468 uint16 period_tu; 8469 uint16 aw_cmn_length; 8470 uint16 aw_ext_length; 8471 uint16 aw_period; 8472 uint16 chan_seq0; 8473 int8 rssi; /**< averaged RSSI value */ 8474 uint8 guard_time; 8475 uint8 presence_mode; 8476 uint8 age; /**< age of this record */ 8477 uint8 dist_top; /**< Distance from Top */ 8478 uint8 PAD[3]; 8479 uint32 ms; /**< time at which we received the AF */ 8480 uint32 self_metrics; /**< election metric */ 8481 uint32 top_master_metrics; 8482 struct ether_addr top_master; /**< Top Master address */ 8483 struct ether_addr addr; 8484 struct rssi_struct rssi_win; /**< RSSI values */ 8485 } adv_struct_norm_t; 8486 #endif /* WLAWDL_USE_MASTER_LOCAL */ 8487 8488 /* AWDL configuration/operation flags */ 8489 #define AWDL_CONFIG_NON_AWDL_INTERFACE_FLOW_CONTROL 0x00000001 8490 #define AWDL_CONFIG_AWDL_INTERFACE_UPDATE 0x00000002 8491 /* While scanning configure channel from chan seq */ 8492 #define AWDL_CONFIG_CHANNEL_HOP_FROM_CHAN_SEQ 0x00000004 8493 #define AWDL_CONFIG_TX_OFF_BEFORE_INFRA_BEACON 0x00000008 8494 #define AWDL_CONFIG_SUPP_PSFTX_PREAW 0x00000010 8495 #define AWDL_CONFIG_SUPP_PSFTX_NOACK 0x00000020 8496 #define AWDL_CONFIG_SUPP_PSFTX_CHANSW 0x00000040 8497 /* 8498 * awdl ranging 8499 * all the fields with multple bytes are in the little Endian order 8500 */ 8501 8502 /* Bit defines for global flags */ 8503 #define AWDL_RANGING_ENABLE (1<<0) /**< Global enable bit */ 8504 #define AWDL_RANGING_RESPOND (1<<1) /**< Enable responding to peer's range req */ 8505 #define AWDL_RANGING_RANGED (1<<2) /**< V2: Report to host if ranged as target */ 8506 8507 #include <packed_section_start.h> 8508 typedef BWL_PRE_PACKED_STRUCT struct awdl_ranging_config { 8509 uint16 flags; 8510 uint8 sounding_count; /**< self initiated ranging: number of probes per peer */ 8511 uint8 reserved; 8512 struct ether_addr allow_mac; 8513 /**< peer initiated ranging: the allowed peer mac 8514 * address, a unicast (for one peer) or 8515 * a broadcast for all. Setting it to all zeros 8516 * means responding to none,same as not setting 8517 * the flag bit AWDL_RANGING_RESPOND 8518 */ 8519 } BWL_POST_PACKED_STRUCT awdl_ranging_config_t; 8520 #include <packed_section_end.h> 8521 8522 /* list of peers for self initiated ranging */ 8523 /* Bit defines for per peer flags */ 8524 #define AWDL_RANGING_REPORT (1<<0) /**< V2: Enable reporting range to target */ 8525 #define AWDL_SEQ_EN (1<<1) 8526 8527 #include <packed_section_start.h> 8528 typedef BWL_PRE_PACKED_STRUCT struct awdl_ranging_peer { 8529 chanspec_t ranging_chanspec; /**< desired chanspec for this peer */ 8530 uint16 flags; /**< per peer flags, report or not */ 8531 struct ether_addr ea; /**< peer MAC address */ 8532 } BWL_POST_PACKED_STRUCT awdl_ranging_peer_t; 8533 #include <packed_section_end.h> 8534 8535 #include <packed_section_start.h> 8536 typedef BWL_PRE_PACKED_STRUCT struct awdl_ranging_list { 8537 uint8 count; /**< number of MAC addresses */ 8538 uint8 num_peers_done; /**< host set to 0, when read, shows number of peers 8539 * completed, success or fail 8540 */ 8541 uint8 num_aws; /**< time period to do the ranging, specified in aws */ 8542 awdl_ranging_peer_t rp[1]; /**< variable length array of peers */ 8543 } BWL_POST_PACKED_STRUCT awdl_ranging_list_t; 8544 #include <packed_section_end.h> 8545 8546 /* ranging results, a list for self initiated ranging and one for peer initiated ranging */ 8547 /* There will be one structure for each peer */ 8548 #define AWDL_RANGING_STATUS_SUCCESS 1 8549 #define AWDL_RANGING_STATUS_FAIL 2 8550 #define AWDL_RANGING_STATUS_TIMEOUT 3 8551 #define AWDL_RANGING_STATUS_ABORT 4 /**< with partial results if sounding count > 0 */ 8552 #include <packed_section_start.h> 8553 typedef BWL_PRE_PACKED_STRUCT struct awdl_ranging_result { 8554 uint8 status; /**< 1: Success, 2: Fail 3: Timeout 4: Aborted */ 8555 uint8 sounding_count; /**< number of measurements completed (0 = failure) */ 8556 struct ether_addr ea; /**< peer MAC address */ 8557 chanspec_t ranging_chanspec; /**< Chanspec where the ranging was done */ 8558 uint32 timestamp; /**< 32bits of the TSF timestamp ranging was completed at */ 8559 uint32 distance; /**< mean distance in meters expressed as Q4 number. 8560 * Only valid when sounding_count > 0. Examples: 8561 * 0x08 = 0.5m 8562 * 0x10 = 1m 8563 * 0x18 = 1.5m 8564 * set to 0xffffffff to indicate invalid number 8565 */ 8566 int32 rtt_var; /**< standard deviation in 10th of ns of RTTs measured. 8567 * Only valid when sounding_count > 0 8568 */ 8569 } BWL_POST_PACKED_STRUCT awdl_ranging_result_t; 8570 #include <packed_section_end.h> 8571 #define AWDL_RANGING_TYPE_HOST 1 8572 #define AWDL_RANGING_TYPE_PEER 2 8573 8574 #include <packed_section_start.h> 8575 typedef BWL_PRE_PACKED_STRUCT struct awdl_ranging_event_data { 8576 uint8 type; /**< 1: Result of host initiated ranging */ 8577 /* V2: 2: Result of peer initiated ranging */ 8578 uint8 reserved; 8579 uint8 success_count; /**< number of peers completed successfully */ 8580 uint8 count; /**< number of peers in the list */ 8581 awdl_ranging_result_t rr[1]; /**< variable array of ranging peers */ 8582 } BWL_POST_PACKED_STRUCT awdl_ranging_event_data_t; 8583 typedef BWL_PRE_PACKED_STRUCT struct awdl_ftm_ranging_config { 8584 uint16 flags; /* config flags */ 8585 uint8 num_aws; /* time period to do the ranging, specified in aws */ 8586 } BWL_POST_PACKED_STRUCT awdl_ftm_ranging_config_t; 8587 #include <packed_section_end.h> 8588 8589 /** awdl event config bit mask definitions */ 8590 #define AWDL_EVENT_AW_EXT 0x01 8591 #define AWDL_EVENT_RANGING 0x02 8592 #define AWDL_RANGING_MAX_PEERS 8 8593 #endif /* WLAWDL */ 8594 8595 /* 8596 * ptk_start: iovar to start 4-way handshake for secured ranging 8597 */ 8598 8599 /* ptk negotiation security type - determines negotiation parameters */ 8600 typedef enum { 8601 WL_PTK_START_SEC_TYPE_PMK = 1 8602 } wl_ptk_start_sec_type_t; 8603 8604 /* ptk negotiation role */ 8605 typedef enum { 8606 ROLE_NONE = 0x0, 8607 ROLE_AUTH = 0x1, 8608 ROLE_SUP = 0x2, 8609 ROLE_STATIC = 0x3, 8610 ROLE_INVALID = 0xff, 8611 WL_PTK_START_ROLE_NONE = ROLE_NONE, 8612 WL_PTK_START_ROLE_AUTH = ROLE_AUTH, 8613 WL_PTK_START_ROLE_SUP = ROLE_SUP, 8614 WL_PTK_START_ROLE_STATIC = ROLE_STATIC, 8615 WL_PTK_START_ROLE_INVALID = ROLE_INVALID 8616 } wl_ptk_start_role_t; 8617 8618 typedef struct wl_ptk_start_tlv { 8619 uint16 id; 8620 uint16 len; 8621 uint8 data[1]; 8622 } wl_ptk_start_tlv_t; 8623 8624 typedef enum { 8625 WL_PTK_START_TLV_PMK = 1 /* uint8[] */ 8626 } wl_ptk_start_tlv_type; 8627 8628 typedef enum { 8629 WL_PTK_START_FLAG_NO_DATA_PROT = 1, /* data frame protection disabled */ 8630 WL_PTK_START_FLAG_GEN_FTM_TPK = 2 /* Generate FTM Toast/Seq Protection Key */ 8631 } wl_ptk_start_flags_t; 8632 8633 typedef struct wl_ptk_start_iov { 8634 uint16 version; 8635 uint16 len; /* length of entire iov from version */ 8636 wl_ptk_start_flags_t flags; 8637 wl_ptk_start_sec_type_t sec_type; 8638 wl_ptk_start_role_t role; 8639 struct ether_addr peer_addr; 8640 uint16 pad; /* reserved/32 bit alignment */ 8641 wl_ptk_start_tlv_t tlvs[1]; 8642 } wl_ptk_start_iov_t; 8643 8644 /* 8645 * Dongle pattern matching filter. 8646 */ 8647 8648 #define MAX_WAKE_PACKET_CACHE_BYTES 128 /**< Maximum cached wake packet */ 8649 8650 #define MAX_WAKE_PACKET_BYTES (DOT11_A3_HDR_LEN + \ 8651 DOT11_QOS_LEN + \ 8652 sizeof(struct dot11_llc_snap_header) + \ 8653 ETHER_MAX_DATA) 8654 8655 typedef struct pm_wake_packet { 8656 uint32 status; /**< Is the wake reason a packet (if all the other field's valid) */ 8657 uint32 pattern_id; /**< Pattern ID that matched */ 8658 uint32 original_packet_size; 8659 uint32 saved_packet_size; 8660 uint8 packet[MAX_WAKE_PACKET_CACHE_BYTES]; 8661 } pm_wake_packet_t; 8662 8663 /* Packet filter types. Currently, only pattern matching is supported. */ 8664 typedef enum wl_pkt_filter_type { 8665 WL_PKT_FILTER_TYPE_PATTERN_MATCH=0, /**< Pattern matching filter */ 8666 WL_PKT_FILTER_TYPE_MAGIC_PATTERN_MATCH=1, /**< Magic packet match */ 8667 WL_PKT_FILTER_TYPE_PATTERN_LIST_MATCH=2, /**< A pattern list (match all to match filter) */ 8668 WL_PKT_FILTER_TYPE_ENCRYPTED_PATTERN_MATCH=3, /**< SECURE WOWL magic / net pattern match */ 8669 WL_PKT_FILTER_TYPE_APF_MATCH=4, /* Android packet filter match */ 8670 WL_PKT_FILTER_TYPE_PATTERN_MATCH_TIMEOUT=5, /* Pattern matching filter with timeout event */ 8671 WL_PKT_FILTER_TYPE_IMMEDIATE_PATTERN_MATCH=6, /* Immediately pattern matching filter */ 8672 WL_PKT_FILTYER_TYPE_MAX = 7, /* Pkt filter type MAX */ 8673 } wl_pkt_filter_type_t; 8674 8675 #define WL_PKT_FILTER_TYPE wl_pkt_filter_type_t /* backward compatibility; remove */ 8676 8677 /* String mapping for types that may be used by applications or debug */ 8678 #define WL_PKT_FILTER_TYPE_NAMES \ 8679 { "PATTERN", WL_PKT_FILTER_TYPE_PATTERN_MATCH }, \ 8680 { "MAGIC", WL_PKT_FILTER_TYPE_MAGIC_PATTERN_MATCH }, \ 8681 { "PATLIST", WL_PKT_FILTER_TYPE_PATTERN_LIST_MATCH }, \ 8682 { "SECURE WOWL", WL_PKT_FILTER_TYPE_ENCRYPTED_PATTERN_MATCH }, \ 8683 { "APF", WL_PKT_FILTER_TYPE_APF_MATCH }, \ 8684 { "PATTERN TIMEOUT", WL_PKT_FILTER_TYPE_PATTERN_MATCH_TIMEOUT }, \ 8685 { "IMMEDIATE", WL_PKT_FILTER_TYPE_IMMEDIATE_PATTERN_MATCH } 8686 8687 /** Secured WOWL packet was encrypted, need decrypted before check filter match */ 8688 typedef struct wl_pkt_decrypter { 8689 uint8* (*dec_cb)(void* dec_ctx, const void *sdu, int sending); 8690 void* dec_ctx; 8691 } wl_pkt_decrypter_t; 8692 8693 /** 8694 * Pattern matching filter. Specifies an offset within received packets to 8695 * start matching, the pattern to match, the size of the pattern, and a bitmask 8696 * that indicates which bits within the pattern should be matched. 8697 */ 8698 typedef struct wl_pkt_filter_pattern { 8699 uint32 offset; /**< Offset within received packet to start pattern matching. 8700 * Offset '0' is the first byte of the ethernet header. 8701 */ 8702 uint32 size_bytes; /**< Size of the pattern. Bitmask must be the same size. */ 8703 uint8 mask_and_pattern[]; /**< Variable length mask and pattern data. mask starts 8704 * at offset 0. Pattern immediately follows mask. for 8705 * secured pattern, put the descrypter pointer to the 8706 * beginning, mask and pattern postponed correspondingly 8707 */ 8708 } wl_pkt_filter_pattern_t; 8709 8710 /** A pattern list is a numerically specified list of modified pattern structures. */ 8711 typedef struct wl_pkt_filter_pattern_listel { 8712 uint16 rel_offs; /**< Offset to begin match (relative to 'base' below) */ 8713 uint16 base_offs; /**< Base for offset (defined below) */ 8714 uint16 size_bytes; /**< Size of mask/pattern */ 8715 uint16 match_flags; /**< Addition flags controlling the match */ 8716 uint8 mask_and_data[]; /**< Variable length mask followed by data, each size_bytes */ 8717 } wl_pkt_filter_pattern_listel_t; 8718 8719 typedef struct wl_pkt_filter_pattern_list { 8720 uint8 list_cnt; /**< Number of elements in the list */ 8721 uint8 PAD1[1]; /**< Reserved (possible version: reserved) */ 8722 uint16 totsize; /**< Total size of this pattern list (includes this struct) */ 8723 uint8 patterns[]; /**< Variable number of wl_pkt_filter_pattern_listel_t elements */ 8724 } wl_pkt_filter_pattern_list_t; 8725 8726 typedef struct wl_apf_program { 8727 uint16 version; 8728 uint16 instr_len; /* number of instruction blocks */ 8729 uint32 inst_ts; /* program installation timestamp */ 8730 uint8 instrs[]; /* variable length instructions */ 8731 } wl_apf_program_t; 8732 8733 typedef struct wl_pkt_filter_pattern_timeout { 8734 uint32 offset; /* Offset within received packet to start pattern matching. 8735 * Offset '0' is the first byte of the ethernet header. 8736 */ 8737 uint32 size_bytes; /* Size of the pattern. Bitmask must be the same size. */ 8738 uint32 timeout; /* Timeout(seconds) */ 8739 uint8 mask_and_pattern[]; /* Variable length mask and pattern data. 8740 * mask starts at offset 0. Pattern 8741 * immediately follows mask. 8742 */ 8743 } wl_pkt_filter_pattern_timeout_t; 8744 8745 /** IOVAR "pkt_filter_add" parameter. Used to install packet filters. */ 8746 typedef struct wl_pkt_filter { 8747 uint32 id; /**< Unique filter id, specified by app. */ 8748 uint32 type; /**< Filter type (WL_PKT_FILTER_TYPE_xxx). */ 8749 uint32 negate_match; /**< Negate the result of filter matches */ 8750 union { /* Filter definitions */ 8751 wl_pkt_filter_pattern_t pattern; /**< Pattern matching filter */ 8752 wl_pkt_filter_pattern_list_t patlist; /**< List of patterns to match */ 8753 wl_apf_program_t apf_program; /* apf program */ 8754 wl_pkt_filter_pattern_timeout_t pattern_timeout; /* Pattern timeout event filter */ 8755 } u; 8756 /* Do NOT add structure members after the filter definitions, since they 8757 * may include variable length arrays. 8758 */ 8759 } wl_pkt_filter_t; 8760 8761 /** IOVAR "tcp_keep_set" parameter. Used to install tcp keep_alive stuff. */ 8762 typedef struct wl_tcp_keep_set { 8763 uint32 val1; 8764 uint32 val2; 8765 } wl_tcp_keep_set_t; 8766 8767 #define WL_PKT_FILTER_FIXED_LEN OFFSETOF(wl_pkt_filter_t, u) 8768 #define WL_PKT_FILTER_PATTERN_FIXED_LEN OFFSETOF(wl_pkt_filter_pattern_t, mask_and_pattern) 8769 #define WL_PKT_FILTER_PATTERN_LIST_FIXED_LEN OFFSETOF(wl_pkt_filter_pattern_list_t, patterns) 8770 #define WL_PKT_FILTER_PATTERN_LISTEL_FIXED_LEN \ 8771 OFFSETOF(wl_pkt_filter_pattern_listel_t, mask_and_data) 8772 #define WL_PKT_FILTER_PATTERN_TIMEOUT_FIXED_LEN \ 8773 OFFSETOF(wl_pkt_filter_pattern_timeout_t, mask_and_pattern) 8774 8775 #define WL_APF_INTERNAL_VERSION 1 8776 #define WL_APF_PROGRAM_MAX_SIZE (2 * 1024) 8777 #define WL_APF_PROGRAM_FIXED_LEN OFFSETOF(wl_apf_program_t, instrs) 8778 #define WL_APF_PROGRAM_LEN(apf_program) \ 8779 ((apf_program)->instr_len * sizeof((apf_program)->instrs[0])) 8780 #define WL_APF_PROGRAM_TOTAL_LEN(apf_program) \ 8781 (WL_APF_PROGRAM_FIXED_LEN + WL_APF_PROGRAM_LEN(apf_program)) 8782 8783 /** IOVAR "pkt_filter_enable" parameter. */ 8784 typedef struct wl_pkt_filter_enable { 8785 uint32 id; /**< Unique filter id */ 8786 uint32 enable; /**< Enable/disable bool */ 8787 } wl_pkt_filter_enable_t; 8788 8789 /** IOVAR "pkt_filter_list" parameter. Used to retrieve a list of installed filters. */ 8790 typedef struct wl_pkt_filter_list { 8791 uint32 num; /**< Number of installed packet filters */ 8792 uint8 filter[]; /**< Variable array of packet filters. */ 8793 } wl_pkt_filter_list_t; 8794 8795 #define WL_PKT_FILTER_LIST_FIXED_LEN OFFSETOF(wl_pkt_filter_list_t, filter) 8796 8797 /** IOVAR "pkt_filter_stats" parameter. Used to retrieve debug statistics. */ 8798 typedef struct wl_pkt_filter_stats { 8799 uint32 num_pkts_matched; /**< # filter matches for specified filter id */ 8800 uint32 num_pkts_forwarded; /**< # packets fwded from dongle to host for all filters */ 8801 uint32 num_pkts_discarded; /**< # packets discarded by dongle for all filters */ 8802 } wl_pkt_filter_stats_t; 8803 8804 /** IOVAR "pkt_filter_ports" parameter. Configure TCP/UDP port filters. */ 8805 typedef struct wl_pkt_filter_ports { 8806 uint8 version; /**< Be proper */ 8807 uint8 reserved; /**< Be really proper */ 8808 uint16 count; /**< Number of ports following */ 8809 /* End of fixed data */ 8810 uint16 ports[1]; /**< Placeholder for ports[<count>] */ 8811 } wl_pkt_filter_ports_t; 8812 8813 #define WL_PKT_FILTER_PORTS_FIXED_LEN OFFSETOF(wl_pkt_filter_ports_t, ports) 8814 8815 #define WL_PKT_FILTER_PORTS_VERSION 0 8816 #if defined(WL_PKT_FLTR_EXT) && !defined(WL_PKT_FLTR_EXT_DISABLED) 8817 #define WL_PKT_FILTER_PORTS_MAX 256 8818 #else 8819 #define WL_PKT_FILTER_PORTS_MAX 128 8820 #endif /* WL_PKT_FLTR_EXT && !WL_PKT_FLTR_EXT_DISABLED */ 8821 8822 #define RSN_REPLAY_LEN 8 8823 typedef struct _gtkrefresh { 8824 uint8 KCK[RSN_KCK_LENGTH]; 8825 uint8 KEK[RSN_KEK_LENGTH]; 8826 uint8 ReplayCounter[RSN_REPLAY_LEN]; 8827 } gtk_keyinfo_t, *pgtk_keyinfo_t; 8828 8829 /** Sequential Commands ioctl */ 8830 typedef struct wl_seq_cmd_ioctl { 8831 uint32 cmd; /**< common ioctl definition */ 8832 uint32 len; /**< length of user buffer */ 8833 } wl_seq_cmd_ioctl_t; 8834 8835 #define WL_SEQ_CMD_ALIGN_BYTES 4 8836 8837 /** 8838 * These are the set of get IOCTLs that should be allowed when using 8839 * IOCTL sequence commands. These are issued implicitly by wl.exe each time 8840 * it is invoked. We never want to buffer these, or else wl.exe will stop working. 8841 */ 8842 #define WL_SEQ_CMDS_GET_IOCTL_FILTER(cmd) \ 8843 (((cmd) == WLC_GET_MAGIC) || \ 8844 ((cmd) == WLC_GET_VERSION) || \ 8845 ((cmd) == WLC_GET_AP) || \ 8846 ((cmd) == WLC_GET_INSTANCE)) 8847 8848 #define MAX_PKTENG_SWEEP_STEPS 40 8849 typedef struct wl_pkteng { 8850 uint32 flags; 8851 uint32 delay; /**< Inter-packet delay */ 8852 uint32 nframes; /**< Number of frames */ 8853 uint32 length; /**< Packet length */ 8854 uint8 seqno; /**< Enable/disable sequence no. */ 8855 struct ether_addr dest; /**< Destination address */ 8856 struct ether_addr src; /**< Source address */ 8857 uint8 sweep_steps; /**< Number of sweep power */ 8858 uint8 est_pwr_cnt; /**< Number of packets to collect est. pwr */ 8859 uint8 PAD[1]; 8860 } wl_pkteng_t; 8861 8862 typedef struct wl_pkteng_est_pwr { 8863 uint32 ratespec; /* Ratespec of the packets */ 8864 uint8 est_pwr_required; /* Requested Number of packets to collect est power */ 8865 uint8 est_pwr_collected; /* Actual collected packets */ 8866 uint8 core_num; /* Total number of Tx cores */ 8867 uint8 PAD; 8868 int8 est_pwr[]; /* The est power buffer */ 8869 } wl_pkteng_est_pwr_t; 8870 8871 /* The wl_pkteng_est_pwr_t is encapsulated in a xtlv buffer with the following ID */ 8872 enum wl_pkgeng_estpwr_id { 8873 wl_pkteng_estpwr_data = 0u, 8874 wl_pkteng_estpwr_clear = 1u 8875 }; 8876 8877 /* IOVAR pkteng_sweep_counters response structure */ 8878 #define WL_PKTENG_SWEEP_COUNTERS_VERSION 1 8879 typedef struct wl_pkteng_sweep_ctrs { 8880 uint16 version; /**< Version - 1 */ 8881 uint16 size; /**< Complete Size including sweep_counters */ 8882 uint16 sweep_steps; /**< Number of steps */ 8883 uint16 PAD; 8884 uint16 sweep_counter[]; /**< Array of frame counters */ 8885 } wl_pkteng_sweep_ctrs_t; 8886 8887 /* IOVAR pkteng_rx_pkt response structure */ 8888 #define WL_PKTENG_RX_PKT_VERSION 1 8889 typedef struct wl_pkteng_rx_pkt { 8890 uint16 version; /**< Version - 1 */ 8891 uint16 size; /**< Complete Size including the packet */ 8892 uint8 payload[]; /**< Packet payload */ 8893 } wl_pkteng_rx_pkt_t; 8894 8895 #define WL_PKTENG_RU_FILL_VER_1 1u 8896 #define WL_PKTENG_RU_FILL_VER_2 2u 8897 #define WL_PKTENG_RU_FILL_VER_3 3u 8898 8899 // struct for ru packet engine 8900 typedef struct wl_pkteng_ru_v1 { 8901 uint16 version; /* ver is 1 */ 8902 uint16 length; /* size of complete structure */ 8903 uint8 bw; /* bandwidth info */ 8904 uint8 ru_alloc_val; /* ru allocation index number */ 8905 uint8 mcs_val; /* mcs allocated value */ 8906 uint8 nss_val; /* num of spatial streams */ 8907 uint32 num_bytes; /* approx num of bytes to calculate other required params */ 8908 uint8 cp_ltf_val ; /* GI and LTF symbol size */ 8909 uint8 he_ltf_symb ; /* num of HE-LTF symbols */ 8910 uint8 stbc; /* STBC support */ 8911 uint8 coding_val; /* BCC/LDPC coding support */ 8912 uint8 pe_category; /* PE duration 0/8/16usecs */ 8913 uint8 dcm; /* dual carrier modulation */ 8914 uint8 mumimo_ltfmode; /* ltf mode */ 8915 uint8 trig_tx; /* form and transmit the trigger frame */ 8916 uint8 trig_type; /* type of trigger frame */ 8917 uint8 trig_period; /* trigger tx periodicity TBD */ 8918 struct ether_addr dest; /* destination address for un-associated mode */ 8919 } wl_pkteng_ru_v1_t; 8920 8921 typedef struct wl_pkteng_ru_v2 { 8922 uint16 version; /* ver is 1 */ 8923 uint16 length; /* size of complete structure */ 8924 uint8 bw; /* bandwidth info */ 8925 uint8 ru_alloc_val; /* ru allocation index number */ 8926 uint8 mcs_val; /* mcs allocated value */ 8927 uint8 nss_val; /* num of spatial streams */ 8928 uint32 num_bytes; /* approx num of bytes to calculate other required params */ 8929 struct ether_addr dest; /* destination address for un-associated mode */ 8930 uint8 cp_ltf_val ; /* GI and LTF symbol size */ 8931 uint8 he_ltf_symb ; /* num of HE-LTF symbols */ 8932 uint8 stbc; /* STBC support */ 8933 uint8 coding_val; /* BCC/LDPC coding support */ 8934 uint8 pe_category; /* PE duration 0/8/16usecs */ 8935 uint8 dcm; /* dual carrier modulation */ 8936 uint8 mumimo_ltfmode; /* ltf mode */ 8937 uint8 trig_tx; /* form and transmit the trigger frame */ 8938 uint8 trig_type; /* type of trigger frame */ 8939 uint8 trig_period; /* trigger tx periodicity TBD */ 8940 uint8 tgt_rssi; /* target rssi value in encoded format */ 8941 uint8 pad[3]; /* 2 byte padding to make structure size a multiple of 32bits */ 8942 } wl_pkteng_ru_v2_t; 8943 8944 typedef struct wl_pkteng_ru_v3 { 8945 uint16 version; /* ver is 3 */ 8946 uint16 length; /* size of complete structure */ 8947 uint8 bw; /* bandwidth info */ 8948 uint8 ru_alloc_val; /* ru allocation index number */ 8949 uint8 mcs_val; /* mcs allocated value */ 8950 uint8 nss_val; /* num of spatial streams */ 8951 uint32 num_bytes; /* approx num of bytes to calculate other required params */ 8952 struct ether_addr dest; /* destination address for un-associated mode */ 8953 uint8 cp_ltf_val ; /* GI and LTF symbol size */ 8954 uint8 he_ltf_symb ; /* num of HE-LTF symbols */ 8955 uint8 stbc; /* STBC support */ 8956 uint8 coding_val; /* BCC/LDPC coding support */ 8957 uint8 pe_category; /* PE duration 0/8/16usecs */ 8958 uint8 dcm; /* dual carrier modulation */ 8959 uint8 mumimo_ltfmode; /* ltf mode */ 8960 uint8 trig_tx; /* form and transmit the trigger frame */ 8961 uint8 trig_type; /* type of trigger frame */ 8962 uint8 trig_period; /* trigger tx periodicity TBD */ 8963 uint8 tgt_rssi; /* target rssi value in encoded format */ 8964 uint8 sub_band; /* in 160MHz case, 80L, 80U */ 8965 uint8 pad[2]; /* 2 byte padding to make structure size a multiple of 32bits */ 8966 } wl_pkteng_ru_v3_t; 8967 8968 #ifndef WL_PKTENG_RU_VER 8969 /* App uses the latest version - source picks it up from wlc_types.h */ 8970 typedef wl_pkteng_ru_v3_t wl_pkteng_ru_fill_t; 8971 #endif 8972 8973 typedef struct wl_trig_frame_info { 8974 /* Structure versioning and structure length params */ 8975 uint16 version; 8976 uint16 length; 8977 /* Below params are the fields related to trigger frame contents */ 8978 /* Common Info Params Figure 9-52d - 11ax Draft 1.1 */ 8979 uint16 lsig_len; 8980 uint16 trigger_type; 8981 uint16 cascade_indication; 8982 uint16 cs_req; 8983 uint16 bw; 8984 uint16 cp_ltf_type; 8985 uint16 mu_mimo_ltf_mode; 8986 uint16 num_he_ltf_syms; 8987 uint16 stbc; 8988 uint16 ldpc_extra_symb; 8989 uint16 ap_tx_pwr; 8990 uint16 afactor; 8991 uint16 pe_disambiguity; 8992 uint16 spatial_resuse; 8993 uint16 doppler; 8994 uint16 he_siga_rsvd; 8995 uint16 cmn_info_rsvd; 8996 /* User Info Params Figure 9-52e - 11ax Draft 1.1 */ 8997 uint16 aid12; 8998 uint16 ru_alloc; 8999 uint16 coding_type; 9000 uint16 mcs; 9001 uint16 dcm; 9002 uint16 ss_alloc; 9003 uint16 tgt_rssi; 9004 uint16 usr_info_rsvd; 9005 } wl_trig_frame_info_t; 9006 9007 /* wl pkteng_stats related definitions */ 9008 #define WL_PKTENG_STATS_V1 (1) 9009 #define WL_PKTENG_STATS_V2 (2) 9010 9011 typedef struct wl_pkteng_stats_v1 { 9012 uint32 lostfrmcnt; /**< RX PER test: no of frames lost (skip seqno) */ 9013 int32 rssi; /**< RSSI */ 9014 int32 snr; /**< signal to noise ratio */ 9015 uint16 rxpktcnt[NUM_80211_RATES+1]; 9016 uint8 rssi_qdb; /**< qdB portion of the computed rssi */ 9017 uint8 version; 9018 } wl_pkteng_stats_v1_t; 9019 9020 typedef struct wl_pkteng_stats_v2 { 9021 uint32 lostfrmcnt; /**< RX PER test: no of frames lost (skip seqno) */ 9022 int32 rssi; /**< RSSI */ 9023 int32 snr; /**< signal to noise ratio */ 9024 uint16 rxpktcnt[NUM_80211_RATES+1]; 9025 uint8 rssi_qdb; /**< qdB portion of the computed rssi */ 9026 uint8 version; 9027 uint16 length; 9028 uint16 pad; 9029 int32 rssi_per_core[WL_RSSI_ANT_MAX]; 9030 int32 rssi_per_core_qdb[WL_RSSI_ANT_MAX]; 9031 } wl_pkteng_stats_v2_t; 9032 9033 #ifndef WL_PKTENG_STATS_TYPEDEF_HAS_ALIAS 9034 typedef wl_pkteng_stats_v1_t wl_pkteng_stats_t; 9035 #endif /* WL_PKTENG_STATS_TYPEDEF_HAS_ALIAS */ 9036 9037 typedef struct wl_txcal_params { 9038 wl_pkteng_t pkteng; 9039 uint8 gidx_start; 9040 int8 gidx_step; 9041 uint8 gidx_stop; 9042 uint8 PAD; 9043 } wl_txcal_params_t; 9044 9045 typedef struct wl_txcal_gainidx { 9046 uint8 num_actv_cores; 9047 uint8 gidx_start_percore[WL_STA_ANT_MAX]; 9048 uint8 gidx_stop_percore[WL_STA_ANT_MAX]; 9049 uint8 PAD[3]; 9050 } wl_txcal_gainidx_t; 9051 9052 typedef struct wl_txcal_params_v2 { 9053 wl_pkteng_t pkteng; 9054 int8 gidx_step; 9055 uint8 pwr_start[WL_STA_ANT_MAX]; 9056 uint8 pwr_stop[WL_STA_ANT_MAX]; 9057 uint8 init_start_idx; 9058 uint8 gidx_start_percore[WL_STA_ANT_MAX]; 9059 uint8 gidx_stop_percore[WL_STA_ANT_MAX]; 9060 uint16 version; 9061 } wl_txcal_params_v2_t; 9062 9063 typedef struct wl_txtone_idxsweep_params { 9064 int8 gidx_step; 9065 uint8 gidx_start_percore[WL_STA_ANT_MAX]; 9066 uint8 gidx_stop_percore[WL_STA_ANT_MAX]; 9067 uint32 dwell_time; 9068 } wl_txtone_idxsweep_params; 9069 9070 typedef wl_txcal_params_t wl_txcal_params_v1_t; 9071 9072 typedef struct wl_rssilog_params { 9073 uint8 enable; 9074 uint8 rssi_threshold; 9075 uint8 time_threshold; 9076 uint8 pad; 9077 } wl_rssilog_params_t; 9078 9079 typedef struct wl_sslpnphy_papd_debug_data { 9080 uint8 psat_pwr; 9081 uint8 psat_indx; 9082 uint8 final_idx; 9083 uint8 start_idx; 9084 int32 min_phase; 9085 int32 voltage; 9086 int8 temperature; 9087 uint8 PAD[3]; 9088 } wl_sslpnphy_papd_debug_data_t; 9089 typedef struct wl_sslpnphy_debug_data { 9090 int16 papdcompRe [64]; 9091 int16 papdcompIm [64]; 9092 } wl_sslpnphy_debug_data_t; 9093 typedef struct wl_sslpnphy_spbdump_data { 9094 uint16 tbl_length; 9095 int16 spbreal[256]; 9096 int16 spbimg[256]; 9097 } wl_sslpnphy_spbdump_data_t; 9098 typedef struct wl_sslpnphy_percal_debug_data { 9099 uint32 cur_idx; 9100 uint32 tx_drift; 9101 uint8 prev_cal_idx; 9102 uint8 PAD[3]; 9103 uint32 percal_ctr; 9104 int32 nxt_cal_idx; 9105 uint32 force_1idxcal; 9106 uint32 onedxacl_req; 9107 int32 last_cal_volt; 9108 int8 last_cal_temp; 9109 uint8 PAD[3]; 9110 uint32 vbat_ripple; 9111 uint32 exit_route; 9112 int32 volt_winner; 9113 } wl_sslpnphy_percal_debug_data_t; 9114 9115 typedef enum { 9116 wowl_pattern_type_bitmap = 0, 9117 wowl_pattern_type_arp, 9118 wowl_pattern_type_na 9119 } wowl_pattern_type_t; 9120 9121 typedef struct wl_wowl_pattern { 9122 uint32 masksize; /**< Size of the mask in #of bytes */ 9123 uint32 offset; /**< Pattern byte offset in packet */ 9124 uint32 patternoffset; /**< Offset of start of pattern in the structure */ 9125 uint32 patternsize; /**< Size of the pattern itself in #of bytes */ 9126 uint32 id; /**< id */ 9127 uint32 reasonsize; /**< Size of the wakeup reason code */ 9128 wowl_pattern_type_t type; /**< Type of pattern */ 9129 /* Mask follows the structure above */ 9130 /* Pattern follows the mask is at 'patternoffset' from the start */ 9131 } wl_wowl_pattern_t; 9132 9133 typedef struct wl_wowl_pattern_list { 9134 uint32 count; 9135 wl_wowl_pattern_t pattern[1]; 9136 } wl_wowl_pattern_list_t; 9137 9138 typedef struct wl_wowl_wakeind { 9139 uint8 pci_wakeind; /**< Whether PCI PMECSR PMEStatus bit was set */ 9140 uint32 ucode_wakeind; /**< What wakeup-event indication was set by ucode */ 9141 } wl_wowl_wakeind_t; 9142 9143 /** per AC rate control related data structure */ 9144 typedef struct wl_txrate_class { 9145 uint8 init_rate; 9146 uint8 min_rate; 9147 uint8 max_rate; 9148 } wl_txrate_class_t; 9149 9150 /** structure for Overlap BSS scan arguments */ 9151 typedef struct wl_obss_scan_arg { 9152 int16 passive_dwell; 9153 int16 active_dwell; 9154 int16 bss_widthscan_interval; 9155 int16 passive_total; 9156 int16 active_total; 9157 int16 chanwidth_transition_delay; 9158 int16 activity_threshold; 9159 } wl_obss_scan_arg_t; 9160 9161 #define WL_OBSS_SCAN_PARAM_LEN sizeof(wl_obss_scan_arg_t) 9162 9163 /** RSSI event notification configuration. */ 9164 typedef struct wl_rssi_event { 9165 uint32 rate_limit_msec; /**< # of events posted to application will be limited to 9166 * one per specified period (0 to disable rate limit). 9167 */ 9168 uint8 num_rssi_levels; /**< Number of entries in rssi_levels[] below */ 9169 int8 rssi_levels[MAX_RSSI_LEVELS]; /**< Variable number of RSSI levels. An event 9170 * will be posted each time the RSSI of received 9171 * beacons/packets crosses a level. 9172 */ 9173 int8 pad[3]; 9174 } wl_rssi_event_t; 9175 9176 #define RSSI_MONITOR_VERSION 1 9177 #define RSSI_MONITOR_STOP (1 << 0) 9178 typedef struct wl_rssi_monitor_cfg { 9179 uint8 version; 9180 uint8 flags; 9181 int8 max_rssi; 9182 int8 min_rssi; 9183 } wl_rssi_monitor_cfg_t; 9184 9185 typedef struct wl_rssi_monitor_evt { 9186 uint8 version; 9187 int8 cur_rssi; 9188 uint16 pad; 9189 } wl_rssi_monitor_evt_t; 9190 9191 /* CCA based channel quality event configuration (ID values for both config and report) */ 9192 #define WL_CHAN_QUAL_CCA 0 9193 #define WL_CHAN_QUAL_NF 1 9194 #define WL_CHAN_QUAL_NF_LTE 2 9195 #define WL_CHAN_QUAL_TOTAL 3 /* The total IDs supported in both config and report */ 9196 /* Additional channel quality event support in report only (>= 0x100) 9197 * Notice that uint8 is used in configuration struct wl_chan_qual_metric_t, but uint16 is 9198 * used for report in struct cca_chan_qual_event_t. So the ID values beyond 8-bit are used 9199 * for reporting purpose only. 9200 */ 9201 #define WL_CHAN_QUAL_FULL_CCA (0x100u | WL_CHAN_QUAL_CCA) /* CCA: ibss vs. obss */ 9202 #define WL_CHAN_QUAL_FULLPM_CCA (0x200u | WL_CHAN_QUAL_CCA) /* CCA: me vs. notme, PM vs. !PM */ 9203 #define WL_CHAN_QUAL_FULLPM_CCA_OFDM_DESENSE (0x400u | WL_CHAN_QUAL_CCA) 9204 /* CCA: me vs. notme, PM vs. !PM with OFDM Desense */ 9205 9206 #define MAX_CHAN_QUAL_LEVELS 8 9207 9208 typedef struct wl_chan_qual_metric { 9209 uint8 id; /**< metric ID */ 9210 uint8 num_levels; /**< Number of entries in rssi_levels[] below */ 9211 uint16 flags; 9212 int16 htol[MAX_CHAN_QUAL_LEVELS]; /**< threshold level array: hi-to-lo */ 9213 int16 ltoh[MAX_CHAN_QUAL_LEVELS]; /**< threshold level array: lo-to-hi */ 9214 } wl_chan_qual_metric_t; 9215 9216 typedef struct wl_chan_qual_event { 9217 uint32 rate_limit_msec; /**< # of events posted to application will be limited to 9218 * one per specified period (0 to disable rate limit). 9219 */ 9220 uint16 flags; 9221 uint16 num_metrics; 9222 wl_chan_qual_metric_t metric[WL_CHAN_QUAL_TOTAL]; /**< metric array */ 9223 } wl_chan_qual_event_t; 9224 typedef struct wl_action_obss_coex_req { 9225 uint8 info; 9226 uint8 num; 9227 uint8 ch_list[1]; 9228 } wl_action_obss_coex_req_t; 9229 9230 /** IOVar parameter block for small MAC address array with type indicator */ 9231 #define WL_IOV_MAC_PARAM_LEN 4 9232 9233 /** This value is hardcoded to be 16 and MUST match PKTQ_MAX_PREC value defined elsewhere */ 9234 #define WL_IOV_PKTQ_LOG_PRECS 16 9235 9236 #include <packed_section_start.h> 9237 typedef BWL_PRE_PACKED_STRUCT struct { 9238 uint32 num_addrs; 9239 uint8 addr_type[WL_IOV_MAC_PARAM_LEN]; 9240 struct ether_addr ea[WL_IOV_MAC_PARAM_LEN]; 9241 } BWL_POST_PACKED_STRUCT wl_iov_mac_params_t; 9242 #include <packed_section_end.h> 9243 9244 /** This is extra info that follows wl_iov_mac_params_t */ 9245 typedef struct { 9246 uint32 addr_info[WL_IOV_MAC_PARAM_LEN]; 9247 } wl_iov_mac_extra_params_t; 9248 9249 /** Combined structure */ 9250 typedef struct { 9251 wl_iov_mac_params_t params; 9252 wl_iov_mac_extra_params_t extra_params; 9253 } wl_iov_mac_full_params_t; 9254 9255 /** Parameter block for PKTQ_LOG statistics */ 9256 /* NOTE: this structure cannot change! It is exported to wlu as a binary format 9257 * A new format revision number must be created if the interface changes 9258 * The latest is v05; previous v01...v03 are no longer supported, v04 has 9259 * common base with v05 9260 */ 9261 #define PKTQ_LOG_COUNTERS_V4 \ 9262 /* packets requested to be stored */ \ 9263 uint32 requested; \ 9264 /* packets stored */ \ 9265 uint32 stored; \ 9266 /* packets saved, because a lowest priority queue has given away one packet */ \ 9267 uint32 saved; \ 9268 /* packets saved, because an older packet from the same queue has been dropped */ \ 9269 uint32 selfsaved; \ 9270 /* packets dropped, because pktq is full with higher precedence packets */ \ 9271 uint32 full_dropped; \ 9272 /* packets dropped because pktq per that precedence is full */ \ 9273 uint32 dropped; \ 9274 /* packets dropped, in order to save one from a queue of a highest priority */ \ 9275 uint32 sacrificed; \ 9276 /* packets droped because of hardware/transmission error */ \ 9277 uint32 busy; \ 9278 /* packets re-sent because they were not received */ \ 9279 uint32 retry; \ 9280 /* packets retried again (ps pretend) prior to moving power save mode */ \ 9281 uint32 ps_retry; \ 9282 /* suppressed packet count */ \ 9283 uint32 suppress; \ 9284 /* packets finally dropped after retry limit */ \ 9285 uint32 retry_drop; \ 9286 /* the high-water mark of the queue capacity for packets - goes to zero as queue fills */ \ 9287 uint32 max_avail; \ 9288 /* the high-water mark of the queue utilisation for packets - ('inverse' of max_avail) */ \ 9289 uint32 max_used; \ 9290 /* the maximum capacity of the queue */ \ 9291 uint32 queue_capacity; \ 9292 /* count of rts attempts that failed to receive cts */ \ 9293 uint32 rtsfail; \ 9294 /* count of packets sent (acked) successfully */ \ 9295 uint32 acked; \ 9296 /* running total of phy rate of packets sent successfully */ \ 9297 uint32 txrate_succ; \ 9298 /* running total of phy 'main' rate */ \ 9299 uint32 txrate_main; \ 9300 /* actual data transferred successfully */ \ 9301 uint32 throughput; \ 9302 /* time difference since last pktq_stats */ \ 9303 uint32 time_delta; 9304 9305 typedef struct { 9306 PKTQ_LOG_COUNTERS_V4 9307 } pktq_log_counters_v04_t; 9308 9309 /** v5 is the same as V4 with extra parameter */ 9310 typedef struct { 9311 PKTQ_LOG_COUNTERS_V4 9312 /** cumulative time to transmit */ 9313 uint32 airtime; 9314 } pktq_log_counters_v05_t; 9315 9316 typedef struct { 9317 uint8 num_prec[WL_IOV_MAC_PARAM_LEN]; 9318 pktq_log_counters_v04_t counters[WL_IOV_MAC_PARAM_LEN][WL_IOV_PKTQ_LOG_PRECS]; 9319 uint32 counter_info[WL_IOV_MAC_PARAM_LEN]; 9320 uint32 pspretend_time_delta[WL_IOV_MAC_PARAM_LEN]; 9321 char headings[]; 9322 } pktq_log_format_v04_t; 9323 9324 typedef struct { 9325 uint8 num_prec[WL_IOV_MAC_PARAM_LEN]; 9326 pktq_log_counters_v05_t counters[WL_IOV_MAC_PARAM_LEN][WL_IOV_PKTQ_LOG_PRECS]; 9327 uint32 counter_info[WL_IOV_MAC_PARAM_LEN]; 9328 uint32 pspretend_time_delta[WL_IOV_MAC_PARAM_LEN]; 9329 char headings[]; 9330 } pktq_log_format_v05_t; 9331 9332 typedef struct { 9333 uint32 version; 9334 wl_iov_mac_params_t params; 9335 union { 9336 pktq_log_format_v04_t v04; 9337 pktq_log_format_v05_t v05; 9338 } pktq_log; 9339 } wl_iov_pktq_log_t; 9340 9341 /* PKTQ_LOG_AUTO, PKTQ_LOG_DEF_PREC flags introduced in v05, they are ignored by v04 */ 9342 #define PKTQ_LOG_AUTO (1 << 31) 9343 #define PKTQ_LOG_DEF_PREC (1 << 30) 9344 9345 typedef struct wl_pfn_macaddr_cfg_0 { 9346 uint8 version; 9347 uint8 reserved; 9348 struct ether_addr macaddr; 9349 } wl_pfn_macaddr_cfg_0_t; 9350 #define LEGACY1_WL_PFN_MACADDR_CFG_VER 0 9351 #define WL_PFN_MAC_OUI_ONLY_MASK 1 9352 #define WL_PFN_SET_MAC_UNASSOC_MASK 2 9353 #define WL_PFN_RESTRICT_LA_MAC_MASK 4 9354 #define WL_PFN_MACADDR_FLAG_MASK 0x7 9355 /** To configure pfn_macaddr */ 9356 typedef struct wl_pfn_macaddr_cfg { 9357 uint8 version; 9358 uint8 flags; 9359 struct ether_addr macaddr; 9360 } wl_pfn_macaddr_cfg_t; 9361 #define WL_PFN_MACADDR_CFG_VER 1 9362 9363 /* 9364 * SCB_BS_DATA iovar definitions start. 9365 */ 9366 #define SCB_BS_DATA_STRUCT_VERSION 1 9367 9368 /** The actual counters maintained for each station */ 9369 typedef struct { 9370 /* The following counters are a subset of what pktq_stats provides per precedence. */ 9371 uint32 retry; /**< packets re-sent because they were not received */ 9372 uint32 retry_drop; /**< packets finally dropped after retry limit */ 9373 uint32 rtsfail; /**< count of rts attempts that failed to receive cts */ 9374 uint32 acked; /**< count of packets sent (acked) successfully */ 9375 uint32 txrate_succ; /**< running total of phy rate of packets sent successfully */ 9376 uint32 txrate_main; /**< running total of phy 'main' rate */ 9377 uint32 throughput; /**< actual data transferred successfully */ 9378 uint32 time_delta; /**< time difference since last pktq_stats */ 9379 uint32 airtime; /**< cumulative total medium access delay in useconds */ 9380 } iov_bs_data_counters_t; 9381 9382 /** The structure for individual station information. */ 9383 #include <packed_section_start.h> 9384 typedef BWL_PRE_PACKED_STRUCT struct { 9385 struct ether_addr station_address; /**< The station MAC address */ 9386 uint16 station_flags; /**< Bit mask of flags, for future use. */ 9387 iov_bs_data_counters_t station_counters; /**< The actual counter values */ 9388 } BWL_POST_PACKED_STRUCT iov_bs_data_record_t; 9389 #include <packed_section_end.h> 9390 9391 #include <packed_section_start.h> 9392 typedef BWL_PRE_PACKED_STRUCT struct { 9393 uint16 structure_version; /**< Structure version number (for wl/wlu matching) */ 9394 uint16 structure_count; /**< Number of iov_bs_data_record_t records following */ 9395 iov_bs_data_record_t structure_record[1]; /**< 0 - structure_count records */ 9396 } BWL_POST_PACKED_STRUCT iov_bs_data_struct_t; 9397 #include <packed_section_end.h> 9398 9399 /* Bitmask of options that can be passed in to the iovar. */ 9400 enum { 9401 SCB_BS_DATA_FLAG_NO_RESET = (1<<0) /**< Do not clear the counters after reading */ 9402 }; 9403 /* 9404 * SCB_BS_DATA iovar definitions end. 9405 */ 9406 9407 typedef struct wlc_extlog_cfg { 9408 int32 max_number; 9409 uint16 module; /**< bitmap */ 9410 uint8 level; 9411 uint8 flag; 9412 uint16 version; 9413 uint16 PAD; 9414 } wlc_extlog_cfg_t; 9415 9416 typedef struct log_record { 9417 uint32 time; 9418 uint16 module; 9419 uint16 id; 9420 uint8 level; 9421 uint8 sub_unit; 9422 uint8 seq_num; 9423 uint8 pad; 9424 int32 arg; 9425 char str[MAX_ARGSTR_LEN]; 9426 char PAD[4-MAX_ARGSTR_LEN%4]; 9427 } log_record_t; 9428 9429 typedef struct wlc_extlog_req { 9430 uint32 from_last; 9431 uint32 num; 9432 } wlc_extlog_req_t; 9433 9434 typedef struct wlc_extlog_results { 9435 uint16 version; 9436 uint16 record_len; 9437 uint32 num; 9438 log_record_t logs[1]; 9439 } wlc_extlog_results_t; 9440 9441 typedef struct log_idstr { 9442 uint16 id; 9443 uint16 flag; 9444 uint8 arg_type; 9445 const char *fmt_str; 9446 } log_idstr_t; 9447 9448 #define FMTSTRF_USER 1 9449 9450 /* flat ID definitions 9451 * New definitions HAVE TO BE ADDED at the end of the table. Otherwise, it will 9452 * affect backward compatibility with pre-existing apps 9453 */ 9454 typedef enum { 9455 FMTSTR_DRIVER_UP_ID = 0, 9456 FMTSTR_DRIVER_DOWN_ID = 1, 9457 FMTSTR_SUSPEND_MAC_FAIL_ID = 2, 9458 FMTSTR_NO_PROGRESS_ID = 3, 9459 FMTSTR_RFDISABLE_ID = 4, 9460 FMTSTR_REG_PRINT_ID = 5, 9461 FMTSTR_EXPTIME_ID = 6, 9462 FMTSTR_JOIN_START_ID = 7, 9463 FMTSTR_JOIN_COMPLETE_ID = 8, 9464 FMTSTR_NO_NETWORKS_ID = 9, 9465 FMTSTR_SECURITY_MISMATCH_ID = 10, 9466 FMTSTR_RATE_MISMATCH_ID = 11, 9467 FMTSTR_AP_PRUNED_ID = 12, 9468 FMTSTR_KEY_INSERTED_ID = 13, 9469 FMTSTR_DEAUTH_ID = 14, 9470 FMTSTR_DISASSOC_ID = 15, 9471 FMTSTR_LINK_UP_ID = 16, 9472 FMTSTR_LINK_DOWN_ID = 17, 9473 FMTSTR_RADIO_HW_OFF_ID = 18, 9474 FMTSTR_RADIO_HW_ON_ID = 19, 9475 FMTSTR_EVENT_DESC_ID = 20, 9476 FMTSTR_PNP_SET_POWER_ID = 21, 9477 FMTSTR_RADIO_SW_OFF_ID = 22, 9478 FMTSTR_RADIO_SW_ON_ID = 23, 9479 FMTSTR_PWD_MISMATCH_ID = 24, 9480 FMTSTR_FATAL_ERROR_ID = 25, 9481 FMTSTR_AUTH_FAIL_ID = 26, 9482 FMTSTR_ASSOC_FAIL_ID = 27, 9483 FMTSTR_IBSS_FAIL_ID = 28, 9484 FMTSTR_EXTAP_FAIL_ID = 29, 9485 FMTSTR_MAX_ID 9486 } log_fmtstr_id_t; 9487 9488 /** 11k Neighbor Report element (unversioned, deprecated) */ 9489 typedef struct nbr_element { 9490 uint8 id; 9491 uint8 len; 9492 struct ether_addr bssid; 9493 uint32 bssid_info; 9494 uint8 reg; 9495 uint8 channel; 9496 uint8 phytype; 9497 uint8 pad; 9498 } nbr_element_t; 9499 #define NBR_ADD_STATIC 0 9500 #define NBR_ADD_DYNAMIC 1 9501 9502 #define WL_RRM_NBR_RPT_VER 1 9503 9504 #define WL_NBR_RPT_FLAG_BSS_PREF_FROM_AP 0x01 9505 /** 11k Neighbor Report element */ 9506 typedef struct nbr_rpt_elem { 9507 uint8 version; 9508 uint8 id; 9509 uint8 len; 9510 uint8 pad; 9511 struct ether_addr bssid; 9512 uint8 pad_1[2]; 9513 uint32 bssid_info; 9514 uint8 reg; 9515 uint8 channel; 9516 uint8 phytype; 9517 uint8 addtype; /* static for manual add or dynamic if auto-learning of neighbors */ 9518 wlc_ssid_t ssid; 9519 chanspec_t chanspec; 9520 uint8 bss_trans_preference; 9521 uint8 flags; 9522 } nbr_rpt_elem_t; 9523 9524 typedef enum event_msgs_ext_command { 9525 EVENTMSGS_NONE = 0, 9526 EVENTMSGS_SET_BIT = 1, 9527 EVENTMSGS_RESET_BIT = 2, 9528 EVENTMSGS_SET_MASK = 3 9529 } event_msgs_ext_command_t; 9530 9531 #define EVENTMSGS_VER 1 9532 #define EVENTMSGS_EXT_STRUCT_SIZE ((uint)(sizeof(eventmsgs_ext_t) - 1)) 9533 9534 /* len- for SET it would be mask size from the application to the firmware */ 9535 /* for GET it would be actual firmware mask size */ 9536 /* maxgetsize - is only used for GET. indicate max mask size that the */ 9537 /* application can read from the firmware */ 9538 typedef struct eventmsgs_ext 9539 { 9540 uint8 ver; 9541 uint8 command; 9542 uint8 len; 9543 uint8 maxgetsize; 9544 uint8 mask[1]; 9545 } eventmsgs_ext_t; 9546 9547 #include <packed_section_start.h> 9548 typedef BWL_PRE_PACKED_STRUCT struct pcie_bus_tput_params { 9549 /** no of host dma descriptors programmed by the firmware before a commit */ 9550 uint16 max_dma_descriptors; 9551 9552 uint16 host_buf_len; /**< length of host buffer */ 9553 dmaaddr_t host_buf_addr; /**< physical address for bus_throughput_buf */ 9554 } BWL_POST_PACKED_STRUCT pcie_bus_tput_params_t; 9555 #include <packed_section_end.h> 9556 9557 typedef struct pcie_bus_tput_stats { 9558 uint16 time_taken; /**< no of secs the test is run */ 9559 uint16 nbytes_per_descriptor; /**< no of bytes of data dma ed per descriptor */ 9560 9561 /** no of desciptors for which dma is sucessfully completed within the test time */ 9562 uint32 count; 9563 } pcie_bus_tput_stats_t; 9564 9565 #define HOST_WAKEUP_DATA_VER 1 9566 #include <packed_section_start.h> 9567 /* Bus interface host wakeup data */ 9568 typedef BWL_PRE_PACKED_STRUCT struct wl_host_wakeup_data { 9569 uint16 ver; 9570 uint16 len; 9571 uchar data[1]; /* wakeup data */ 9572 } BWL_POST_PACKED_STRUCT wl_host_wakeup_data_t; 9573 #include <packed_section_end.h> 9574 9575 #define HOST_WAKEUP_DATA_VER_2 2 9576 #include <packed_section_start.h> 9577 /* Bus interface host wakeup data */ 9578 typedef BWL_PRE_PACKED_STRUCT struct wl_host_wakeup_data_v2 { 9579 uint16 ver; 9580 uint16 len; 9581 uint32 gpio_toggle_time; /* gpio toggle time in ms */ 9582 uchar data[1]; /* wakeup data */ 9583 } BWL_POST_PACKED_STRUCT wl_host_wakeup_data_v2_t; 9584 #include <packed_section_end.h> 9585 9586 typedef struct keepalives_max_idle { 9587 uint16 keepalive_count; /**< nmbr of keepalives per bss_max_idle period */ 9588 uint8 mkeepalive_index; /**< mkeepalive_index for keepalive frame to be used */ 9589 uint8 PAD; /**< to align next field */ 9590 uint16 max_interval; /**< seconds */ 9591 } keepalives_max_idle_t; 9592 9593 #define PM_IGNORE_BCMC_PROXY_ARP (1 << 0) 9594 #define PM_IGNORE_BCMC_ALL_DMS_ACCEPTED (1 << 1) 9595 9596 /* ##### HMAP section ##### */ 9597 #define PCIE_MAX_HMAP_WINDOWS 8 9598 #define PCIE_HMAPTEST_VERSION 2 9599 #define HMAPTEST_INVALID_OFFSET 0xFFFFFFFFu 9600 #define HMAPTEST_DEFAULT_WRITE_PATTERN 0xBABECAFEu 9601 #define HMAPTEST_ACCESS_ARM 0 9602 #define HMAPTEST_ACCESS_M2M 1 9603 #define HMAPTEST_ACCESS_D11 2 9604 #define HMAPTEST_ACCESS_NONE 3 9605 9606 typedef struct pcie_hmaptest { 9607 uint16 version; /* Version */ 9608 uint16 length; /* Length of entire structure */ 9609 uint32 xfer_len; 9610 uint32 accesstype; 9611 uint32 is_write; 9612 uint32 is_invalid; 9613 uint32 host_addr_hi; 9614 uint32 host_addr_lo; 9615 uint32 host_offset; 9616 uint32 value; /* 4 byte value to be filled in case of write access test */ 9617 uint32 delay; /* wait time in seconds before initiating access from dongle */ 9618 } pcie_hmaptest_t; 9619 9620 /* HMAP window register set */ 9621 typedef struct hmapwindow { 9622 uint32 baseaddr_lo; /* BaseAddrLower */ 9623 uint32 baseaddr_hi; /* BaseAddrUpper */ 9624 uint32 windowlength; /* Window Length */ 9625 } hmapwindow_t; 9626 9627 #define PCIE_HMAP_VERSION 1 9628 typedef struct pcie_hmap { 9629 uint16 version; /**< Version */ 9630 uint16 length; /**< Length of entire structure */ 9631 uint32 enable; /**< status of HMAP enabled/disabled */ 9632 uint32 nwindows; /* no. of HMAP windows enabled */ 9633 uint32 window_config; /* HMAP window_config register */ 9634 uint32 hmap_violationaddr_lo; /* violating address lo */ 9635 uint32 hmap_violationaddr_hi; /* violating addr hi */ 9636 uint32 hmap_violation_info; /* violation info */ 9637 hmapwindow_t hwindows[]; /* Multiple hwindows */ 9638 } pcie_hmap_t; 9639 9640 /* ##### Power Stats section ##### */ 9641 9642 #define WL_PWRSTATS_VERSION 2 9643 9644 /** Input structure for pwrstats IOVAR */ 9645 typedef struct wl_pwrstats_query { 9646 uint16 length; /**< Number of entries in type array. */ 9647 uint16 type[1]; /**< Types (tags) to retrieve. 9648 * Length 0 (no types) means get all. 9649 */ 9650 } wl_pwrstats_query_t; 9651 9652 /** This structure is for version 2; version 1 will be deprecated in by FW */ 9653 #include <packed_section_start.h> 9654 typedef BWL_PRE_PACKED_STRUCT struct wl_pwrstats { 9655 uint16 version; /**< Version = 2 is TLV format */ 9656 uint16 length; /**< Length of entire structure */ 9657 uint8 data[1]; /**< TLV data, a series of structures, 9658 * each starting with type and length. 9659 * 9660 * Padded as necessary so each section 9661 * starts on a 4-byte boundary. 9662 * 9663 * Both type and len are uint16, but the 9664 * upper nibble of length is reserved so 9665 * valid len values are 0-4095. 9666 */ 9667 } BWL_POST_PACKED_STRUCT wl_pwrstats_t; 9668 #include <packed_section_end.h> 9669 #define WL_PWR_STATS_HDRLEN OFFSETOF(wl_pwrstats_t, data) 9670 9671 /* Bits for wake reasons */ 9672 #define WLC_PMD_WAKE_SET 0x1u 9673 #define WLC_PMD_PM_AWAKE_BCN 0x2u 9674 /* BIT:3 is no longer being used */ 9675 #define WLC_PMD_SCAN_IN_PROGRESS 0x8u 9676 #define WLC_PMD_RM_IN_PROGRESS 0x10u 9677 #define WLC_PMD_AS_IN_PROGRESS 0x20u 9678 #define WLC_PMD_PM_PEND 0x40u 9679 #define WLC_PMD_PS_POLL 0x80u 9680 #define WLC_PMD_CHK_UNALIGN_TBTT 0x100u 9681 #define WLC_PMD_APSD_STA_UP 0x200u 9682 #define WLC_PMD_TX_PEND_WAR 0x400u /* obsolete, can be reused */ 9683 #define WLC_PMD_NAN_AWAKE 0x400u /* Reusing for NAN */ 9684 #define WLC_PMD_GPTIMER_STAY_AWAKE 0x800u 9685 9686 #ifdef WLAWDL 9687 #define WLC_PMD_AWDL_AWAKE 0x1000u 9688 #endif /* WLAWDL */ 9689 9690 #define WLC_PMD_PM2_RADIO_SOFF_PEND 0x2000u 9691 #define WLC_PMD_NON_PRIM_STA_UP 0x4000u 9692 #define WLC_PMD_AP_UP 0x8000u 9693 #define WLC_PMD_TX_IN_PROGRESS 0x10000u /* Dongle awake due to packet TX */ 9694 #define WLC_PMD_4WAYHS_IN_PROGRESS 0x20000u /* Dongle awake due to 4 way handshake */ 9695 #define WLC_PMD_PM_OVERRIDE 0x40000u /* Dongle awake due to PM override */ 9696 #define WLC_PMD_WAKE_OTHER 0x80000u 9697 9698 typedef struct wlc_pm_debug { 9699 uint32 timestamp; /**< timestamp in millisecond */ 9700 uint32 reason; /**< reason(s) for staying awake */ 9701 } wlc_pm_debug_t; 9702 9703 /** WL_PWRSTATS_TYPE_PM_AWAKE1 structures (for 6.25 firmware) */ 9704 #define WLC_STA_AWAKE_STATES_MAX_V1 30 9705 #define WLC_PMD_EVENT_MAX_V1 32 9706 /** Data sent as part of pwrstats IOVAR (and EXCESS_PM_WAKE event) */ 9707 #include <packed_section_start.h> 9708 typedef BWL_PRE_PACKED_STRUCT struct pm_awake_data_v1 { 9709 uint32 curr_time; /**< ms */ 9710 uint32 hw_macc; /**< HW maccontrol */ 9711 uint32 sw_macc; /**< SW maccontrol */ 9712 uint32 pm_dur; /**< Total sleep time in PM, msecs */ 9713 uint32 mpc_dur; /**< Total sleep time in MPC, msecs */ 9714 9715 /* int32 drifts = remote - local; +ve drift => local-clk slow */ 9716 int32 last_drift; /**< Most recent TSF drift from beacon */ 9717 int32 min_drift; /**< Min TSF drift from beacon in magnitude */ 9718 int32 max_drift; /**< Max TSF drift from beacon in magnitude */ 9719 9720 uint32 avg_drift; /**< Avg TSF drift from beacon */ 9721 9722 /* Wake history tracking */ 9723 uint8 pmwake_idx; /**< for stepping through pm_state */ 9724 wlc_pm_debug_t pm_state[WLC_STA_AWAKE_STATES_MAX_V1]; /**< timestamped wake bits */ 9725 uint32 pmd_event_wake_dur[WLC_PMD_EVENT_MAX_V1]; /**< cumulative usecs per wake reason */ 9726 uint32 drift_cnt; /**< Count of drift readings over which avg_drift was computed */ 9727 } BWL_POST_PACKED_STRUCT pm_awake_data_v1_t; 9728 #include <packed_section_end.h> 9729 9730 #include <packed_section_start.h> 9731 typedef BWL_PRE_PACKED_STRUCT struct wl_pwr_pm_awake_stats_v1 { 9732 uint16 type; /**< WL_PWRSTATS_TYPE_PM_AWAKE */ 9733 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 9734 9735 pm_awake_data_v1_t awake_data; 9736 uint32 frts_time; /**< Cumulative ms spent in frts since driver load */ 9737 uint32 frts_end_cnt; /**< No of times frts ended since driver load */ 9738 } BWL_POST_PACKED_STRUCT wl_pwr_pm_awake_stats_v1_t; 9739 #include <packed_section_end.h> 9740 9741 /** WL_PWRSTATS_TYPE_PM_AWAKE2 structures. Data sent as part of pwrstats IOVAR */ 9742 typedef struct pm_awake_data_v2 { 9743 uint32 curr_time; /**< ms */ 9744 uint32 hw_macc; /**< HW maccontrol */ 9745 uint32 sw_macc; /**< SW maccontrol */ 9746 uint32 pm_dur; /**< Total sleep time in PM, msecs */ 9747 uint32 mpc_dur; /**< Total sleep time in MPC, msecs */ 9748 9749 /* int32 drifts = remote - local; +ve drift => local-clk slow */ 9750 int32 last_drift; /**< Most recent TSF drift from beacon */ 9751 int32 min_drift; /**< Min TSF drift from beacon in magnitude */ 9752 int32 max_drift; /**< Max TSF drift from beacon in magnitude */ 9753 9754 uint32 avg_drift; /**< Avg TSF drift from beacon */ 9755 9756 /* Wake history tracking */ 9757 9758 /* pmstate array (type wlc_pm_debug_t) start offset */ 9759 uint16 pm_state_offset; 9760 /** pmstate number of array entries */ 9761 uint16 pm_state_len; 9762 9763 /** array (type uint32) start offset */ 9764 uint16 pmd_event_wake_dur_offset; 9765 /** pmd_event_wake_dur number of array entries */ 9766 uint16 pmd_event_wake_dur_len; 9767 9768 uint32 drift_cnt; /**< Count of drift readings over which avg_drift was computed */ 9769 uint8 pmwake_idx; /**< for stepping through pm_state */ 9770 uint8 flags; /**< bit0: 1-sleep, 0- wake. bit1: 0-bit0 invlid, 1-bit0 valid */ 9771 uint8 pad[2]; 9772 uint32 frts_time; /**< Cumulative ms spent in frts since driver load */ 9773 uint32 frts_end_cnt; /**< No of times frts ended since driver load */ 9774 } pm_awake_data_v2_t; 9775 9776 typedef struct wl_pwr_pm_awake_stats_v2 { 9777 uint16 type; /**< WL_PWRSTATS_TYPE_PM_AWAKE */ 9778 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 9779 9780 pm_awake_data_v2_t awake_data; 9781 } wl_pwr_pm_awake_stats_v2_t; 9782 9783 /* bit0: 1-sleep, 0- wake. bit1: 0-bit0 invlid, 1-bit0 valid */ 9784 #define WL_PWR_PM_AWAKE_STATS_WAKE 0x02 9785 #define WL_PWR_PM_AWAKE_STATS_ASLEEP 0x03 9786 #define WL_PWR_PM_AWAKE_STATS_WAKE_MASK 0x03 9787 9788 /* WL_PWRSTATS_TYPE_PM_AWAKE Version 2 structures taken from 4324/43342 */ 9789 /* These structures are only to be used with 4324/43342 devices */ 9790 9791 #define WL_STA_AWAKE_STATES_MAX_V2 30 9792 #define WL_PMD_EVENT_MAX_V2 32 9793 #define MAX_P2P_BSS_DTIM_PRD 4 9794 9795 /** WL_PWRSTATS_TYPE_PM_ACCUMUL structures. Data sent as part of pwrstats IOVAR */ 9796 typedef struct pm_accum_data_v1 { 9797 uint64 current_ts; 9798 uint64 pm_cnt; 9799 uint64 pm_dur; 9800 uint64 pm_last_entry_us; 9801 uint64 awake_cnt; 9802 uint64 awake_dur; 9803 uint64 awake_last_entry_us; 9804 } pm_accum_data_v1_t; 9805 9806 typedef struct wl_pwr_pm_accum_stats_v1 { 9807 uint16 type; /**< WL_PWRSTATS_TYPE_PM_ACCUMUL */ 9808 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 9809 uint8 PAD[4]; 9810 pm_accum_data_v1_t accum_data; 9811 } wl_pwr_pm_accum_stats_v1_t; 9812 9813 #include <packed_section_start.h> 9814 typedef BWL_PRE_PACKED_STRUCT struct ucode_dbg_v2 { 9815 uint32 macctrl; 9816 uint16 m_p2p_hps; 9817 uint16 m_p2p_bss_dtim_prd[MAX_P2P_BSS_DTIM_PRD]; 9818 uint32 psmdebug[20]; 9819 uint32 phydebug[20]; 9820 uint32 psm_brc; 9821 uint32 ifsstat; 9822 } BWL_POST_PACKED_STRUCT ucode_dbg_v2_t; 9823 #include <packed_section_end.h> 9824 9825 #include <packed_section_start.h> 9826 typedef BWL_PRE_PACKED_STRUCT struct pmalert_awake_data_v2 { 9827 uint32 curr_time; /* ms */ 9828 uint32 hw_macc; /* HW maccontrol */ 9829 uint32 sw_macc; /* SW maccontrol */ 9830 uint32 pm_dur; /* Total sleep time in PM, msecs */ 9831 uint32 mpc_dur; /* Total sleep time in MPC, msecs */ 9832 9833 /* int32 drifts = remote - local; +ve drift => local-clk slow */ 9834 int32 last_drift; /* Most recent TSF drift from beacon */ 9835 int32 min_drift; /* Min TSF drift from beacon in magnitude */ 9836 int32 max_drift; /* Max TSF drift from beacon in magnitude */ 9837 9838 uint32 avg_drift; /* Avg TSF drift from beacon */ 9839 9840 /* Wake history tracking */ 9841 uint8 pmwake_idx; /* for stepping through pm_state */ 9842 wlc_pm_debug_t pm_state[WL_STA_AWAKE_STATES_MAX_V2]; /* timestamped wake bits */ 9843 uint32 pmd_event_wake_dur[WL_PMD_EVENT_MAX_V2]; /* cumulative usecs per wake reason */ 9844 uint32 drift_cnt; /* Count of drift readings over which avg_drift was computed */ 9845 uint32 start_event_dur[WL_PMD_EVENT_MAX_V2]; /* start event-duration */ 9846 ucode_dbg_v2_t ud; 9847 uint32 frts_time; /* Cumulative ms spent in frts since driver load */ 9848 uint32 frts_end_cnt; /* No of times frts ended since driver load */ 9849 } BWL_POST_PACKED_STRUCT pmalert_awake_data_v2_t; 9850 #include <packed_section_end.h> 9851 9852 #include <packed_section_start.h> 9853 typedef BWL_PRE_PACKED_STRUCT struct pm_alert_data_v2 { 9854 uint32 version; 9855 uint32 length; /* Length of entire structure */ 9856 uint32 reasons; /* reason(s) for pm_alert */ 9857 /* Following fields are present only for reasons 9858 * PM_DUR_EXCEEDED, MPC_DUR_EXCEEDED & CONST_AWAKE_DUR_EXCEEDED 9859 */ 9860 uint32 prev_stats_time; /* msecs */ 9861 uint32 prev_pm_dur; /* msecs */ 9862 uint32 prev_mpc_dur; /* msecs */ 9863 pmalert_awake_data_v2_t awake_data; 9864 } BWL_POST_PACKED_STRUCT pm_alert_data_v2_t; 9865 #include <packed_section_end.h> 9866 9867 #include <packed_section_start.h> 9868 typedef BWL_PRE_PACKED_STRUCT struct wl_pwr_pm_awake_status_v2 { 9869 uint16 type; /* WL_PWRSTATS_TYPE_PM_AWAKE */ 9870 uint16 len; /* Up to 4K-1, top 4 bits are reserved */ 9871 9872 pmalert_awake_data_v2_t awake_data; 9873 uint32 frts_time; /* Cumulative ms spent in frts since driver load */ 9874 uint32 frts_end_cnt; /* No of times frts ended since driver load */ 9875 } BWL_POST_PACKED_STRUCT wl_pwr_pm_awake_status_v2_t; 9876 #include <packed_section_end.h> 9877 9878 /* Below are latest definitions from PHO25178RC100_BRANCH_6_50 */ 9879 /* wl_pwr_pm_awake_stats_v1_t is used for WL_PWRSTATS_TYPE_PM_AWAKE */ 9880 /* Use regs from d11.h instead of raw addresses for */ 9881 /* (at least) the chip independent registers */ 9882 typedef struct ucode_dbg_ext { 9883 uint32 x120; 9884 uint32 x124; 9885 uint32 x154; 9886 uint32 x158; 9887 uint32 x15c; 9888 uint32 x180; 9889 uint32 x184; 9890 uint32 x188; 9891 uint32 x18c; 9892 uint32 x1a0; 9893 uint32 x1a8; 9894 uint32 x1e0; 9895 uint32 scr_x14; 9896 uint32 scr_x2b; 9897 uint32 scr_x2c; 9898 uint32 scr_x2d; 9899 uint32 scr_x2e; 9900 9901 uint16 x40a; 9902 uint16 x480; 9903 uint16 x490; 9904 uint16 x492; 9905 uint16 x4d8; 9906 uint16 x4b8; 9907 uint16 x4ba; 9908 uint16 x4bc; 9909 uint16 x4be; 9910 uint16 x500; 9911 uint16 x50e; 9912 uint16 x522; 9913 uint16 x546; 9914 uint16 x578; 9915 uint16 x602; 9916 uint16 x646; 9917 uint16 x648; 9918 uint16 x666; 9919 uint16 x670; 9920 uint16 x690; 9921 uint16 x692; 9922 uint16 x6a0; 9923 uint16 x6a2; 9924 uint16 x6a4; 9925 uint16 x6b2; 9926 uint16 x7c0; 9927 9928 uint16 shm_x20; 9929 uint16 shm_x4a; 9930 uint16 shm_x5e; 9931 uint16 shm_x5f; 9932 uint16 shm_xaab; 9933 uint16 shm_x74a; 9934 uint16 shm_x74b; 9935 uint16 shm_x74c; 9936 uint16 shm_x74e; 9937 uint16 shm_x756; 9938 uint16 shm_x75b; 9939 uint16 shm_x7b9; 9940 uint16 shm_x7d4; 9941 9942 uint16 shm_P2P_HPS; 9943 uint16 shm_P2P_intr[16]; 9944 uint16 shm_P2P_perbss[48]; 9945 } ucode_dbg_ext_t; 9946 9947 #include <packed_section_start.h> 9948 typedef BWL_PRE_PACKED_STRUCT struct pm_alert_data_v1 { 9949 uint32 version; 9950 uint32 length; /**< Length of entire structure */ 9951 uint32 reasons; /**< reason(s) for pm_alert */ 9952 /* Following fields are present only for reasons 9953 * PM_DUR_EXCEEDED, MPC_DUR_EXCEEDED & CONST_AWAKE_DUR_EXCEEDED 9954 */ 9955 uint32 prev_stats_time; /**< msecs */ 9956 uint32 prev_pm_dur; /**< msecs */ 9957 uint32 prev_mpc_dur; /**< msecs */ 9958 pm_awake_data_v1_t awake_data; 9959 uint32 start_event_dur[WLC_PMD_EVENT_MAX_V1]; /**< start event-duration */ 9960 ucode_dbg_v2_t ud; 9961 uint32 frts_time; /**< Cumulative ms spent in frts since driver load */ 9962 uint32 frts_end_cnt; /**< No of times frts ended since driver load */ 9963 ucode_dbg_ext_t ud_ext; 9964 uint32 prev_frts_dur; /**< ms */ 9965 } BWL_POST_PACKED_STRUCT pm_alert_data_v1_t; 9966 #include <packed_section_end.h> 9967 9968 /* End of 43342/4324 v2 structure definitions */ 9969 9970 /* Original bus structure is for HSIC */ 9971 9972 typedef struct bus_metrics { 9973 uint32 suspend_ct; /**< suspend count */ 9974 uint32 resume_ct; /**< resume count */ 9975 uint32 disconnect_ct; /**< disconnect count */ 9976 uint32 reconnect_ct; /**< reconnect count */ 9977 uint32 active_dur; /**< msecs in bus, usecs for user */ 9978 uint32 suspend_dur; /**< msecs in bus, usecs for user */ 9979 uint32 disconnect_dur; /**< msecs in bus, usecs for user */ 9980 } bus_metrics_t; 9981 9982 /** Bus interface info for USB/HSIC */ 9983 #include <packed_section_start.h> 9984 typedef BWL_PRE_PACKED_STRUCT struct wl_pwr_usb_hsic_stats { 9985 uint16 type; /**< WL_PWRSTATS_TYPE_USB_HSIC */ 9986 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 9987 9988 bus_metrics_t hsic; /**< stats from hsic bus driver */ 9989 } BWL_POST_PACKED_STRUCT wl_pwr_usb_hsic_stats_t; 9990 #include <packed_section_end.h> 9991 9992 /* PCIe Event counter tlv IDs */ 9993 enum pcie_cnt_xtlv_id { 9994 PCIE_CNT_XTLV_METRICS = 0x1, /**< PCIe Bus Metrics */ 9995 PCIE_CNT_XTLV_BUS_CNT = 0x2 /**< PCIe Bus counters */ 9996 }; 9997 9998 typedef struct pcie_bus_metrics { 9999 uint32 d3_suspend_ct; /**< suspend count */ 10000 uint32 d0_resume_ct; /**< resume count */ 10001 uint32 perst_assrt_ct; /**< PERST# assert count */ 10002 uint32 perst_deassrt_ct; /**< PERST# de-assert count */ 10003 uint32 active_dur; /**< msecs */ 10004 uint32 d3_suspend_dur; /**< msecs */ 10005 uint32 perst_dur; /**< msecs */ 10006 uint32 l0_cnt; /**< L0 entry count */ 10007 uint32 l0_usecs; /**< L0 duration in usecs */ 10008 uint32 l1_cnt; /**< L1 entry count */ 10009 uint32 l1_usecs; /**< L1 duration in usecs */ 10010 uint32 l1_1_cnt; /**< L1_1ss entry count */ 10011 uint32 l1_1_usecs; /**< L1_1ss duration in usecs */ 10012 uint32 l1_2_cnt; /**< L1_2ss entry count */ 10013 uint32 l1_2_usecs; /**< L1_2ss duration in usecs */ 10014 uint32 l2_cnt; /**< L2 entry count */ 10015 uint32 l2_usecs; /**< L2 duration in usecs */ 10016 uint32 timestamp; /**< Timestamp on when stats are collected */ 10017 uint32 num_h2d_doorbell; /**< # of doorbell interrupts - h2d */ 10018 uint32 num_d2h_doorbell; /**< # of doorbell interrupts - d2h */ 10019 uint32 num_submissions; /**< # of submissions */ 10020 uint32 num_completions; /**< # of completions */ 10021 uint32 num_rxcmplt; /**< # of rx completions */ 10022 uint32 num_rxcmplt_drbl; /**< of drbl interrupts for rx complt. */ 10023 uint32 num_txstatus; /**< # of tx completions */ 10024 uint32 num_txstatus_drbl; /**< of drbl interrupts for tx complt. */ 10025 uint32 deepsleep_count; /**< # of times chip went to deepsleep */ 10026 uint32 deepsleep_dur; /**< # of msecs chip was in deepsleep */ 10027 uint32 ltr_active_ct; /**< # of times chip went to LTR ACTIVE */ 10028 uint32 ltr_active_dur; /**< # of msecs chip was in LTR ACTIVE */ 10029 uint32 ltr_sleep_ct; /**< # of times chip went to LTR SLEEP */ 10030 uint32 ltr_sleep_dur; /**< # of msecs chip was in LTR SLEEP */ 10031 } pcie_bus_metrics_t; 10032 10033 typedef struct pcie_cnt { 10034 uint32 ltr_state; /**< Current LTR state */ 10035 uint32 l0_sr_cnt; /**< SR count during L0 */ 10036 uint32 l2l3_sr_cnt; /**< SR count during L2L3 */ 10037 uint32 d3_ack_sr_cnt; /**< srcount during last D3-ACK */ 10038 uint32 d3_sr_cnt; /**< SR count during D3 */ 10039 uint32 d3_info_start; /**< D3 INFORM received time */ 10040 uint32 d3_info_enter_cnt; /**< # of D3 INFORM received */ 10041 uint32 d3_cnt; /**< # of real D3 */ 10042 uint32 d3_ack_sent_cnt; /**< # of D3 ACK sent count */ 10043 uint32 d3_drop_cnt_event; /**< # of events dropped during D3 */ 10044 uint32 d2h_req_q_len; /**< # of Packet pending in D2H request queue */ 10045 uint32 hw_reason; /**< Last Host wake assert reason */ 10046 uint32 hw_assert_cnt; /**< # of times Host wake Asserted */ 10047 uint32 host_ready_cnt; /**< # of Host ready interrupts */ 10048 uint32 hw_assert_reason_0; /**< timestamp when hw_reason is TRAP */ 10049 uint32 hw_assert_reason_1; /**< timestamp when hw_reason is WL_EVENT */ 10050 uint32 hw_assert_reason_2; /**< timestamp when hw_reason is DATA */ 10051 uint32 hw_assert_reason_3; /**< timestamp when hw_reason is DELAYED_WAKE */ 10052 uint32 last_host_ready; /**< Timestamp of last Host ready */ 10053 bool hw_asserted; /**< Flag to indicate if Host wake is Asserted */ 10054 bool event_delivery_pend; /**< No resources to send event */ 10055 uint16 pad; /**< Word alignment for scripts */ 10056 } pcie_cnt_t; 10057 10058 /** Bus interface info for PCIE */ 10059 typedef struct wl_pwr_pcie_stats { 10060 uint16 type; /**< WL_PWRSTATS_TYPE_PCIE */ 10061 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 10062 pcie_bus_metrics_t pcie; /**< stats from pcie bus driver */ 10063 } wl_pwr_pcie_stats_t; 10064 10065 /** Scan information history per category */ 10066 typedef struct scan_data { 10067 uint32 count; /**< Number of scans performed */ 10068 uint32 dur; /**< Total time (in us) used */ 10069 } scan_data_t; 10070 10071 typedef struct wl_pwr_scan_stats { 10072 uint16 type; /**< WL_PWRSTATS_TYPE_SCAN */ 10073 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 10074 10075 /* Scan history */ 10076 scan_data_t user_scans; /**< User-requested scans: (i/e/p)scan */ 10077 scan_data_t assoc_scans; /**< Scans initiated by association requests */ 10078 scan_data_t roam_scans; /**< Scans initiated by the roam engine */ 10079 scan_data_t pno_scans[8]; /**< For future PNO bucketing (BSSID, SSID, etc) */ 10080 scan_data_t other_scans; /**< Scan engine usage not assigned to the above */ 10081 } wl_pwr_scan_stats_t; 10082 10083 typedef struct wl_pwr_connect_stats { 10084 uint16 type; /**< WL_PWRSTATS_TYPE_SCAN */ 10085 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 10086 10087 /* Connection (Association + Key exchange) data */ 10088 uint32 count; /**< Number of connections performed */ 10089 uint32 dur; /**< Total time (in ms) used */ 10090 } wl_pwr_connect_stats_t; 10091 10092 typedef struct wl_pwr_phy_stats { 10093 uint16 type; /**< WL_PWRSTATS_TYPE_PHY */ 10094 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 10095 uint32 tx_dur; /**< TX Active duration in us */ 10096 uint32 rx_dur; /**< RX Active duration in us */ 10097 } wl_pwr_phy_stats_t; 10098 10099 #ifdef WLAWDL 10100 typedef struct wl_pwr_awdl_stats { 10101 uint16 type; /**< WL_PWRSTATS_TYPE_AWDL */ 10102 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 10103 uint32 tx_dur; /**< AWDL TX Active duration in usec */ 10104 uint32 rx_dur; /**< AWDL RX Active duration in usec */ 10105 uint32 aw_dur; /**< AWDL AW duration in msec */ 10106 uint32 awpscan_dur; /**< AWDL pscans dur in msec */ 10107 } wl_pwr_awdl_stats_t; 10108 #endif /* WLAWDL */ 10109 10110 typedef struct wl_mimo_meas_metrics_v1 { 10111 uint16 type; 10112 uint16 len; 10113 /* Total time(us) idle in MIMO RX chain configuration */ 10114 uint32 total_idle_time_mimo; 10115 /* Total time(us) idle in SISO RX chain configuration */ 10116 uint32 total_idle_time_siso; 10117 /* Total receive time (us) in SISO RX chain configuration */ 10118 uint32 total_rx_time_siso; 10119 /* Total receive time (us) in MIMO RX chain configuration */ 10120 uint32 total_rx_time_mimo; 10121 /* Total 1-chain transmit time(us) */ 10122 uint32 total_tx_time_1chain; 10123 /* Total 2-chain transmit time(us) */ 10124 uint32 total_tx_time_2chain; 10125 /* Total 3-chain transmit time(us) */ 10126 uint32 total_tx_time_3chain; 10127 } wl_mimo_meas_metrics_v1_t; 10128 10129 typedef struct wl_mimo_meas_metrics { 10130 uint16 type; 10131 uint16 len; 10132 /* Total time(us) idle in MIMO RX chain configuration */ 10133 uint32 total_idle_time_mimo; 10134 /* Total time(us) idle in SISO RX chain configuration */ 10135 uint32 total_idle_time_siso; 10136 /* Total receive time (us) in SISO RX chain configuration */ 10137 uint32 total_rx_time_siso; 10138 /* Total receive time (us) in MIMO RX chain configuration */ 10139 uint32 total_rx_time_mimo; 10140 /* Total 1-chain transmit time(us) */ 10141 uint32 total_tx_time_1chain; 10142 /* Total 2-chain transmit time(us) */ 10143 uint32 total_tx_time_2chain; 10144 /* Total 3-chain transmit time(us) */ 10145 uint32 total_tx_time_3chain; 10146 /* End of original, OCL fields start here */ 10147 /* Total time(us) idle in ocl mode */ 10148 uint32 total_idle_time_ocl; 10149 /* Total receive time (us) in ocl mode */ 10150 uint32 total_rx_time_ocl; 10151 /* End of OCL fields, internal adjustment fields here */ 10152 /* Total SIFS idle time in MIMO mode */ 10153 uint32 total_sifs_time_mimo; 10154 /* Total SIFS idle time in SISO mode */ 10155 uint32 total_sifs_time_siso; 10156 } wl_mimo_meas_metrics_t; 10157 10158 typedef struct wl_pwr_slice_index { 10159 uint16 type; /* WL_PWRSTATS_TYPE_SLICE_INDEX */ 10160 uint16 len; 10161 10162 uint32 slice_index; /* Slice index for which stats are meant for */ 10163 } wl_pwr_slice_index_t; 10164 10165 typedef struct wl_pwr_tsync_stats { 10166 uint16 type; /**< WL_PWRSTATS_TYPE_TSYNC */ 10167 uint16 len; 10168 uint32 avb_uptime; /**< AVB uptime in msec */ 10169 } wl_pwr_tsync_stats_t; 10170 10171 typedef struct wl_pwr_ops_stats { 10172 uint16 type; /* WL_PWRSTATS_TYPE_OPS_STATS */ 10173 uint16 len; /* total length includes fixed fields */ 10174 uint32 partial_ops_dur; /* Total time(in usec) partial ops duration */ 10175 uint32 full_ops_dur; /* Total time(in usec) full ops duration */ 10176 } wl_pwr_ops_stats_t; 10177 10178 typedef struct wl_pwr_bcntrim_stats { 10179 uint16 type; /* WL_PWRSTATS_TYPE_BCNTRIM_STATS */ 10180 uint16 len; /* total length includes fixed fields */ 10181 uint8 associated; /* STA is associated ? */ 10182 uint8 slice_idx; /* on which slice STA is associated */ 10183 uint16 pad; /* padding */ 10184 uint32 slice_beacon_seen; /* number of beacons seen on the Infra 10185 * interface on this slice 10186 */ 10187 uint32 slice_beacon_trimmed; /* number beacons actually trimmed on this slice */ 10188 uint32 total_beacon_seen; /* total number of beacons seen on the Infra interface */ 10189 uint32 total_beacon_trimmed; /* total beacons actually trimmed */ 10190 } wl_pwr_bcntrim_stats_t; 10191 10192 typedef struct wl_pwr_slice_index_band { 10193 uint16 type; /* WL_PWRSTATS_TYPE_SLICE_INDEX_BAND_INFO */ 10194 uint16 len; /* Total length includes fixed fields */ 10195 uint16 index; /* Slice Index */ 10196 int16 bandtype; /* Slice Bandtype */ 10197 } wl_pwr_slice_index_band_t; 10198 10199 typedef struct wl_pwr_psbw_stats { 10200 uint16 type; /* WL_PWRSTATS_TYPE_PSBW_STATS */ 10201 uint16 len; /* total length includes fixed fields */ 10202 uint8 slice_idx; /* on which slice STA is associated */ 10203 uint8 pad[3]; 10204 uint32 slice_enable_dur; /* time(ms) psbw remains enabled on this slice */ 10205 uint32 total_enable_dur; /* time(ms) psbw remains enabled total */ 10206 } wl_pwr_psbw_stats_t; 10207 10208 /* ##### End of Power Stats section ##### */ 10209 10210 /** IPV4 Arp offloads for ndis context */ 10211 #include <packed_section_start.h> 10212 BWL_PRE_PACKED_STRUCT struct hostip_id { 10213 struct ipv4_addr ipa; 10214 uint8 id; 10215 } BWL_POST_PACKED_STRUCT; 10216 #include <packed_section_end.h> 10217 10218 /* Return values */ 10219 #define ND_REPLY_PEER 0x1 /**< Reply was sent to service NS request from peer */ 10220 #define ND_REQ_SINK 0x2 /**< Input packet should be discarded */ 10221 #define ND_FORCE_FORWARD 0X3 /**< For the dongle to forward req to HOST */ 10222 10223 /** Neighbor Solicitation Response Offload IOVAR param */ 10224 #include <packed_section_start.h> 10225 typedef BWL_PRE_PACKED_STRUCT struct nd_param { 10226 struct ipv6_addr host_ip[2]; 10227 struct ipv6_addr solicit_ip; 10228 struct ipv6_addr remote_ip; 10229 uint8 host_mac[ETHER_ADDR_LEN]; 10230 uint32 offload_id; 10231 } BWL_POST_PACKED_STRUCT nd_param_t; 10232 #include <packed_section_end.h> 10233 10234 typedef struct wl_pfn_roam_thresh { 10235 uint32 pfn_alert_thresh; /**< time in ms */ 10236 uint32 roam_alert_thresh; /**< time in ms */ 10237 } wl_pfn_roam_thresh_t; 10238 10239 /* Reasons for wl_pmalert_t */ 10240 #define PM_DUR_EXCEEDED (1<<0) 10241 #define MPC_DUR_EXCEEDED (1<<1) 10242 #define ROAM_ALERT_THRESH_EXCEEDED (1<<2) 10243 #define PFN_ALERT_THRESH_EXCEEDED (1<<3) 10244 #define CONST_AWAKE_DUR_ALERT (1<<4) 10245 #define CONST_AWAKE_DUR_RECOVERY (1<<5) 10246 10247 #define MIN_PM_ALERT_LEN 9 10248 10249 /** Data sent in EXCESS_PM_WAKE event */ 10250 #define WL_PM_ALERT_VERSION 3 10251 10252 /** This structure is for version 3; version 2 will be deprecated in by FW */ 10253 #include <packed_section_start.h> 10254 typedef BWL_PRE_PACKED_STRUCT struct wl_pmalert { 10255 uint16 version; /**< Version = 3 is TLV format */ 10256 uint16 length; /**< Length of entire structure */ 10257 uint32 reasons; /**< reason(s) for pm_alert */ 10258 uint8 data[1]; /**< TLV data, a series of structures, 10259 * each starting with type and length. 10260 * 10261 * Padded as necessary so each section 10262 * starts on a 4-byte boundary. 10263 * 10264 * Both type and len are uint16, but the 10265 * upper nibble of length is reserved so 10266 * valid len values are 0-4095. 10267 */ 10268 } BWL_POST_PACKED_STRUCT wl_pmalert_t; 10269 #include <packed_section_end.h> 10270 10271 #define NUM_P2P_BSS_UCODE_DBG 3 10272 #define IDX_P2P_BSS_UCODE_DBG 12 10273 #define NUM_PSM_PHY_DBG 20 10274 10275 /* Type values for the data section */ 10276 #define WL_PMALERT_FIXED 0 /**< struct wl_pmalert_fixed_t, fixed fields */ 10277 #define WL_PMALERT_PMSTATE 1 /**< struct wl_pmalert_pmstate_t, variable */ 10278 #define WL_PMALERT_EVENT_DUR 2 /**< struct wl_pmalert_event_dur_t, variable */ 10279 #define WL_PMALERT_UCODE_DBG 3 /**< struct wl_pmalert_ucode_dbg_v1, variable */ 10280 #define WL_PMALERT_PS_ALLOWED_HIST 4 /**< struct wl_pmalert_ps_allowed_history, variable */ 10281 #define WL_PMALERT_EXT_UCODE_DBG 5 /**< struct wl_pmalert_ext_ucode_dbg_t, variable */ 10282 #define WL_PMALERT_EPM_START_EVENT_DUR 6 /**< struct wl_pmalert_event_dur_t, variable */ 10283 #define WL_PMALERT_UCODE_DBG_V2 7 /**< struct wl_pmalert_ucode_dbg_v2, variable */ 10284 #define WL_PMALERT_FIXED_SC 8 /**< struct wl_pmalert_fixed_sc_t, fixed fields */ 10285 #define WL_PMALERT_UCODE_DBG_SC 9 /**< struct wl_pmalert_ucode_dbg_v2, variable */ 10286 10287 typedef struct wl_pmalert_fixed { 10288 uint16 type; /**< WL_PMALERT_FIXED */ 10289 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 10290 uint32 prev_stats_time; /**< msecs */ 10291 uint32 curr_time; /**< ms */ 10292 uint32 prev_pm_dur; /**< msecs */ 10293 uint32 pm_dur; /**< Total sleep time in PM, msecs */ 10294 uint32 prev_mpc_dur; /**< msecs */ 10295 uint32 mpc_dur; /**< Total sleep time in MPC, msecs */ 10296 uint32 hw_macc; /**< HW maccontrol */ 10297 uint32 sw_macc; /**< SW maccontrol */ 10298 10299 /* int32 drifts = remote - local; +ve drift -> local-clk slow */ 10300 int32 last_drift; /**< Most recent TSF drift from beacon */ 10301 int32 min_drift; /**< Min TSF drift from beacon in magnitude */ 10302 int32 max_drift; /**< Max TSF drift from beacon in magnitude */ 10303 10304 uint32 avg_drift; /**< Avg TSF drift from beacon */ 10305 uint32 drift_cnt; /**< Count of drift readings over which avg_drift was computed */ 10306 uint32 frts_time; /**< Cumulative ms spent in data frts since driver load */ 10307 uint32 frts_end_cnt; /**< No of times frts ended since driver load */ 10308 uint32 prev_frts_dur; /**< Data frts duration at start of pm-period */ 10309 uint32 cal_dur; /**< Cumulative ms spent in calibration */ 10310 uint32 prev_cal_dur; /**< cal duration at start of pm-period */ 10311 } wl_pmalert_fixed_t; 10312 10313 #define WL_PMALERT_SC_FLAG_SC_DOWN (1u << 0u) 10314 #define WL_PMALERT_SC_FLAG_SC_HIBERNATE (1u << 1u) 10315 10316 typedef struct wl_pmalert_fixed_sc { 10317 uint16 type; /* WL_PMALERT_FIXED_SC */ 10318 uint16 len; /* Up to 4K-1, top 4 bits are reserved */ 10319 uint32 flags; 10320 uint32 prev_stats_time; /* msecs */ 10321 uint32 curr_time; /* msecs */ 10322 uint32 prev_pm_dur; /* msecs */ 10323 uint32 pm_dur; /* Total sleep time in PM, msecs */ 10324 uint32 win_down_time; /* Total down time in the window in ms */ 10325 uint32 hw_macc; /* HW maccontrol */ 10326 uint32 sw_macc; /* SW maccontrol */ 10327 10328 /* int32 drifts = remote - local; +ve drift -> local-clk slow */ 10329 int32 last_drift; /* Most recent TSF drift from beacon */ 10330 int32 min_drift; /* Min TSF drift from beacon in magnitude */ 10331 int32 max_drift; /* Max TSF drift from beacon in magnitude */ 10332 uint32 avg_drift; /* Avg TSF drift from beacon */ 10333 uint32 drift_cnt; /* Count of drift readings over which avg_drift was computed */ 10334 10335 uint32 cal_dur; /* Cumulative ms spent in calibration */ 10336 uint32 prev_cal_dur; /* cal duration at start of pm-period */ 10337 } wl_pmalert_fixed_sc_t; 10338 10339 typedef struct wl_pmalert_pmstate { 10340 uint16 type; /**< WL_PMALERT_PMSTATE */ 10341 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 10342 10343 uint8 pmwake_idx; /**< for stepping through pm_state */ 10344 uint8 pad[3]; 10345 /* Array of pmstate; len of array is based on tlv len */ 10346 wlc_pm_debug_t pmstate[1]; 10347 } wl_pmalert_pmstate_t; 10348 10349 typedef struct wl_pmalert_event_dur { 10350 uint16 type; /**< WL_PMALERT_EVENT_DUR */ 10351 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 10352 10353 /* Array of event_dur, len of array is based on tlv len */ 10354 uint32 event_dur[1]; 10355 } wl_pmalert_event_dur_t; 10356 10357 #include <packed_section_start.h> 10358 BWL_PRE_PACKED_STRUCT struct wl_pmalert_ucode_dbg_v1 { 10359 uint16 type; /* WL_PMALERT_UCODE_DBG */ 10360 uint16 len; /* Up to 4K-1, top 4 bits are reserved */ 10361 uint32 macctrl; 10362 uint16 m_p2p_hps; 10363 uint32 psm_brc; 10364 uint32 ifsstat; 10365 uint16 m_p2p_bss_dtim_prd[MAX_P2P_BSS_DTIM_PRD]; 10366 uint32 psmdebug[NUM_PSM_PHY_DBG]; 10367 uint32 phydebug[NUM_PSM_PHY_DBG]; 10368 uint16 M_P2P_BSS[NUM_P2P_BSS_UCODE_DBG][IDX_P2P_BSS_UCODE_DBG]; 10369 uint16 M_P2P_PRE_TBTT[NUM_P2P_BSS_UCODE_DBG]; 10370 10371 /* Following is valid only for corerevs<40 */ 10372 uint16 xmtfifordy; 10373 10374 /* Following 3 are valid only for 11ac corerevs (>=40) */ 10375 uint16 psm_maccommand; 10376 uint16 txe_status1; 10377 uint16 AQMFifoReady; 10378 } BWL_POST_PACKED_STRUCT; 10379 #include <packed_section_end.h> 10380 10381 #include <packed_section_start.h> 10382 BWL_PRE_PACKED_STRUCT struct wl_pmalert_ucode_dbg_v2 { 10383 uint16 type; /**< WL_PMALERT_UCODE_DBG_V2 */ 10384 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 10385 uint32 macctrl; 10386 uint16 m_p2p_hps; 10387 uint32 psm_brc; 10388 uint32 ifsstat; 10389 uint16 m_p2p_bss_dtim_prd[MAX_P2P_BSS_DTIM_PRD]; 10390 uint32 psmdebug[NUM_PSM_PHY_DBG]; 10391 uint32 phydebug[NUM_PSM_PHY_DBG]; 10392 uint16 M_P2P_BSS[NUM_P2P_BSS_UCODE_DBG][IDX_P2P_BSS_UCODE_DBG]; 10393 uint16 M_P2P_PRE_TBTT[NUM_P2P_BSS_UCODE_DBG]; 10394 10395 /* Following is valid only for corerevs<40 */ 10396 uint16 xmtfifordy; 10397 10398 /* Following 3 are valid only for 11ac corerevs (>=40) */ 10399 uint16 psm_maccommand; 10400 uint16 txe_status1; 10401 uint32 AQMFifoReady; 10402 } BWL_POST_PACKED_STRUCT; 10403 #include <packed_section_end.h> 10404 10405 #include <packed_section_start.h> 10406 BWL_PRE_PACKED_STRUCT struct wl_pmalert_ucode_dbg_sc_v1 { 10407 uint16 type; /**< WL_PMALERT_UCODE_DBG_SC */ 10408 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 10409 /* ucode SHM and registers */ 10410 uint32 macctrl; 10411 uint16 m_p2p_hps; 10412 uint32 psm_brc; 10413 uint32 ifsstat; 10414 uint16 m_p2p_bss_dtim_prd[MAX_P2P_BSS_DTIM_PRD]; 10415 uint32 psmdebug[NUM_PSM_PHY_DBG]; 10416 uint32 phydebug[NUM_PSM_PHY_DBG]; 10417 uint16 M_P2P_BSS[NUM_P2P_BSS_UCODE_DBG][IDX_P2P_BSS_UCODE_DBG]; 10418 uint16 M_P2P_PRE_TBTT[NUM_P2P_BSS_UCODE_DBG]; 10419 uint16 psm_maccommand; 10420 } BWL_POST_PACKED_STRUCT; 10421 #include <packed_section_end.h> 10422 10423 typedef struct wlc_ps_debug { 10424 uint32 timestamp; /**< timestamp in millisecond */ 10425 uint32 ps_mask; /**< reason(s) for disallowing ps */ 10426 } wlc_ps_debug_t; 10427 10428 typedef struct wl_pmalert_ps_allowed_hist { 10429 uint16 type; /**< WL_PMALERT_PS_ALLOWED_HIST */ 10430 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 10431 uint32 ps_allowed_start_idx; 10432 /* Array of ps_debug, len of array is based on tlv len */ 10433 wlc_ps_debug_t ps_debug[1]; 10434 } wl_pmalert_ps_allowed_hist_t; 10435 10436 /* Structures and constants used for "vndr_ie" IOVar interface */ 10437 #define VNDR_IE_CMD_LEN 4 /**< length of the set command string: 10438 * "add", "del" (+ NUL) 10439 */ 10440 10441 #define VNDR_IE_INFO_HDR_LEN (sizeof(uint32)) 10442 10443 #include <packed_section_start.h> 10444 typedef BWL_PRE_PACKED_STRUCT struct { 10445 uint32 pktflag; /**< bitmask indicating which packet(s) contain this IE */ 10446 vndr_ie_t vndr_ie_data; /**< vendor IE data */ 10447 } BWL_POST_PACKED_STRUCT vndr_ie_info_t; 10448 #include <packed_section_end.h> 10449 10450 #include <packed_section_start.h> 10451 typedef BWL_PRE_PACKED_STRUCT struct { 10452 int32 iecount; /**< number of entries in the vndr_ie_list[] array */ 10453 vndr_ie_info_t vndr_ie_list[1]; /**< variable size list of vndr_ie_info_t structs */ 10454 } BWL_POST_PACKED_STRUCT vndr_ie_buf_t; 10455 #include <packed_section_end.h> 10456 10457 #include <packed_section_start.h> 10458 typedef BWL_PRE_PACKED_STRUCT struct { 10459 char cmd[VNDR_IE_CMD_LEN]; /**< vndr_ie IOVar set command : "add", "del" + NUL */ 10460 vndr_ie_buf_t vndr_ie_buffer; /**< buffer containing Vendor IE list information */ 10461 } BWL_POST_PACKED_STRUCT vndr_ie_setbuf_t; 10462 #include <packed_section_end.h> 10463 10464 /** tag_ID/length/value_buffer tuple */ 10465 #include <packed_section_start.h> 10466 typedef BWL_PRE_PACKED_STRUCT struct { 10467 uint8 id; 10468 uint8 len; 10469 uint8 data[1]; 10470 } BWL_POST_PACKED_STRUCT tlv_t; 10471 #include <packed_section_end.h> 10472 10473 #include <packed_section_start.h> 10474 typedef BWL_PRE_PACKED_STRUCT struct { 10475 uint32 pktflag; /**< bitmask indicating which packet(s) contain this IE */ 10476 tlv_t ie_data; /**< IE data */ 10477 } BWL_POST_PACKED_STRUCT ie_info_t; 10478 #include <packed_section_end.h> 10479 10480 #include <packed_section_start.h> 10481 typedef BWL_PRE_PACKED_STRUCT struct { 10482 int32 iecount; /**< number of entries in the ie_list[] array */ 10483 ie_info_t ie_list[1]; /**< variable size list of ie_info_t structs */ 10484 } BWL_POST_PACKED_STRUCT ie_buf_t; 10485 #include <packed_section_end.h> 10486 10487 #include <packed_section_start.h> 10488 typedef BWL_PRE_PACKED_STRUCT struct { 10489 char cmd[VNDR_IE_CMD_LEN]; /**< ie IOVar set command : "add" + NUL */ 10490 ie_buf_t ie_buffer; /**< buffer containing IE list information */ 10491 } BWL_POST_PACKED_STRUCT ie_setbuf_t; 10492 #include <packed_section_end.h> 10493 10494 #include <packed_section_start.h> 10495 typedef BWL_PRE_PACKED_STRUCT struct { 10496 uint32 pktflag; /**< bitmask indicating which packet(s) contain this IE */ 10497 uint8 id; /**< IE type */ 10498 } BWL_POST_PACKED_STRUCT ie_getbuf_t; 10499 #include <packed_section_end.h> 10500 10501 /* structures used to define format of wps ie data from probe requests */ 10502 /* passed up to applications via iovar "prbreq_wpsie" */ 10503 typedef struct sta_prbreq_wps_ie_hdr { 10504 struct ether_addr staAddr; 10505 uint16 ieLen; 10506 } sta_prbreq_wps_ie_hdr_t; 10507 10508 #include <packed_section_start.h> 10509 typedef BWL_PRE_PACKED_STRUCT struct sta_prbreq_wps_ie_data { 10510 sta_prbreq_wps_ie_hdr_t hdr; 10511 uint8 ieData[1]; 10512 } BWL_POST_PACKED_STRUCT sta_prbreq_wps_ie_data_t; 10513 #include <packed_section_end.h> 10514 10515 #include <packed_section_start.h> 10516 typedef BWL_PRE_PACKED_STRUCT struct sta_prbreq_wps_ie_list { 10517 uint32 totLen; 10518 uint8 ieDataList[1]; 10519 } BWL_POST_PACKED_STRUCT sta_prbreq_wps_ie_list_t; 10520 #include <packed_section_end.h> 10521 10522 #include <packed_section_start.h> 10523 typedef BWL_PRE_PACKED_STRUCT struct { 10524 uint32 flags; 10525 chanspec_t chanspec; /**< txpwr report for this channel */ 10526 chanspec_t local_chanspec; /**< channel on which we are associated */ 10527 uint8 local_max; /**< local max according to the AP */ 10528 uint8 local_constraint; /**< local constraint according to the AP */ 10529 int8 antgain[2]; /**< Ant gain for each band - from SROM */ 10530 uint8 rf_cores; /**< count of RF Cores being reported */ 10531 uint8 est_Pout[4]; /**< Latest tx power out estimate per RF chain */ 10532 uint8 est_Pout_act[4]; /**< Latest tx power out estimate per RF chain w/o adjustment */ 10533 uint8 est_Pout_cck; /**< Latest CCK tx power out estimate */ 10534 uint8 tx_power_max[4]; /**< Maximum target power among all rates */ 10535 uint32 tx_power_max_rate_ind[4]; /**< Index of the rate with the max target power */ 10536 int8 sar; /**< SAR limit for display by wl executable */ 10537 int8 channel_bandwidth; /**< 20, 40 or 80 MHz bandwidth? */ 10538 uint8 version; /**< Version of the data format wlu <--> driver */ 10539 uint8 display_core; /**< Displayed curpower core */ 10540 int8 target_offsets[4]; /**< Target power offsets for current rate per core */ 10541 uint32 last_tx_ratespec; /**< Ratespec for last transmition */ 10542 uint32 user_target; /**< user limit */ 10543 uint32 ppr_len; /**< length of each ppr serialization buffer */ 10544 int8 SARLIMIT[MAX_STREAMS_SUPPORTED]; 10545 uint8 pprdata[1]; /**< ppr serialization buffer */ 10546 } BWL_POST_PACKED_STRUCT tx_pwr_rpt_t; 10547 10548 typedef BWL_PRE_PACKED_STRUCT struct { 10549 uint32 flags; 10550 chanspec_t chanspec; /**< txpwr report for this channel */ 10551 chanspec_t local_chanspec; /**< channel on which we are associated */ 10552 uint8 local_max; /**< local max according to the AP */ 10553 uint8 local_constraint; /**< local constraint according to the AP */ 10554 int8 pad[2]; /**< unused */ 10555 uint8 rf_cores; /**< count of RF Cores being reported */ 10556 uint8 est_Pout[4]; /**< Latest tx power out estimate per RF chain */ 10557 uint8 est_Pout_act[4]; /**< Latest tx power out estimate per RF chain w/o adjustment */ 10558 uint8 est_Pout_cck; /**< Latest CCK tx power out estimate */ 10559 uint8 tx_power_max[4]; /**< Maximum target power among all rates */ 10560 uint32 tx_power_max_rate_ind[4]; /**< Index of the rate with the max target power */ 10561 int8 sar; /**< SAR limit for display by wl executable */ 10562 int8 channel_bandwidth; /**< 20, 40 or 80 MHz bandwidth? */ 10563 uint8 version; /**< Version of the data format wlu <--> driver */ 10564 uint8 display_core; /**< Displayed curpower core */ 10565 int8 target_offsets[4]; /**< Target power offsets for current rate per core */ 10566 uint32 last_tx_ratespec; /**< Ratespec for last transmition */ 10567 uint32 user_target; /**< user limit */ 10568 uint32 ppr_len; /**< length of each ppr serialization buffer */ 10569 int8 SARLIMIT[MAX_STREAMS_SUPPORTED]; 10570 int8 antgain[3]; /**< Ant gain for each band - from SROM */ 10571 uint8 pprdata[1]; /**< ppr serialization buffer */ 10572 } BWL_POST_PACKED_STRUCT tx_pwr_rpt_v2_t; 10573 #include <packed_section_end.h> 10574 10575 typedef struct tx_pwr_ru_rate_info { 10576 uint16 version; 10577 uint16 ru_alloc; 10578 uint16 mcs; 10579 uint16 nss; 10580 uint16 num_he_ltf_syms; 10581 uint16 ldpc; 10582 uint16 gi; 10583 uint16 txmode; 10584 uint16 dcm; 10585 uint16 tx_chain; 10586 } tx_pwr_ru_rate_info_t; 10587 10588 #define TX_PWR_RU_RATE_INFO_VER 1 10589 10590 /* TLV ID for curpower report, ID < 63 is reserved for ppr module */ 10591 typedef enum tx_pwr_tlv_id { 10592 TX_PWR_RPT_RU_RATE_INFO_ID = 64 10593 } tx_pwr_tlv_id_t; 10594 10595 #include <packed_section_start.h> 10596 typedef BWL_PRE_PACKED_STRUCT struct { 10597 struct ipv4_addr ipv4_addr; 10598 struct ether_addr nexthop; 10599 } BWL_POST_PACKED_STRUCT ibss_route_entry_t; 10600 #include <packed_section_end.h> 10601 10602 #include <packed_section_start.h> 10603 typedef BWL_PRE_PACKED_STRUCT struct { 10604 uint32 num_entry; 10605 ibss_route_entry_t route_entry[1]; 10606 } BWL_POST_PACKED_STRUCT ibss_route_tbl_t; 10607 #include <packed_section_end.h> 10608 10609 #define MAX_IBSS_ROUTE_TBL_ENTRY 64 10610 10611 #define TXPWR_TARGET_VERSION 0 10612 #include <packed_section_start.h> 10613 typedef BWL_PRE_PACKED_STRUCT struct { 10614 int32 version; /**< version number */ 10615 chanspec_t chanspec; /**< txpwr report for this channel */ 10616 int8 txpwr[WL_STA_ANT_MAX]; /**< Max tx target power, in qdb */ 10617 uint8 rf_cores; /**< count of RF Cores being reported */ 10618 } BWL_POST_PACKED_STRUCT txpwr_target_max_t; 10619 #include <packed_section_end.h> 10620 10621 #define BSS_PEER_INFO_PARAM_CUR_VER 0 10622 /** Input structure for IOV_BSS_PEER_INFO */ 10623 #include <packed_section_start.h> 10624 typedef BWL_PRE_PACKED_STRUCT struct { 10625 uint16 version; 10626 struct ether_addr ea; /**< peer MAC address */ 10627 } BWL_POST_PACKED_STRUCT bss_peer_info_param_t; 10628 #include <packed_section_end.h> 10629 10630 #define BSS_PEER_INFO_CUR_VER 0 10631 10632 #include <packed_section_start.h> 10633 typedef BWL_PRE_PACKED_STRUCT struct { 10634 uint16 version; 10635 struct ether_addr ea; 10636 int32 rssi; 10637 uint32 tx_rate; /**< current tx rate */ 10638 uint32 rx_rate; /**< current rx rate */ 10639 wl_rateset_t rateset; /**< rateset in use */ 10640 uint32 age; /**< age in seconds */ 10641 } BWL_POST_PACKED_STRUCT bss_peer_info_t; 10642 #include <packed_section_end.h> 10643 10644 #define BSS_PEER_LIST_INFO_CUR_VER 0 10645 10646 #include <packed_section_start.h> 10647 typedef BWL_PRE_PACKED_STRUCT struct { 10648 uint16 version; 10649 uint16 bss_peer_info_len; /**< length of bss_peer_info_t */ 10650 uint32 count; /**< number of peer info */ 10651 bss_peer_info_t peer_info[1]; /**< peer info */ 10652 } BWL_POST_PACKED_STRUCT bss_peer_list_info_t; 10653 #include <packed_section_end.h> 10654 10655 #define BSS_PEER_LIST_INFO_FIXED_LEN OFFSETOF(bss_peer_list_info_t, peer_info) 10656 10657 #define AIBSS_BCN_FORCE_CONFIG_VER_0 0 10658 10659 /** structure used to configure AIBSS beacon force xmit */ 10660 #include <packed_section_start.h> 10661 typedef BWL_PRE_PACKED_STRUCT struct { 10662 uint16 version; 10663 uint16 len; 10664 uint32 initial_min_bcn_dur; /**< dur in ms to check a bcn in bcn_flood period */ 10665 uint32 min_bcn_dur; /**< dur in ms to check a bcn after bcn_flood period */ 10666 uint32 bcn_flood_dur; /**< Initial bcn xmit period in ms */ 10667 } BWL_POST_PACKED_STRUCT aibss_bcn_force_config_t; 10668 #include <packed_section_end.h> 10669 10670 #define AIBSS_TXFAIL_CONFIG_VER_0 0 10671 #define AIBSS_TXFAIL_CONFIG_VER_1 1 10672 #define AIBSS_TXFAIL_CONFIG_CUR_VER AIBSS_TXFAIL_CONFIG_VER_1 10673 10674 /** structure used to configure aibss tx fail event */ 10675 #include <packed_section_start.h> 10676 typedef BWL_PRE_PACKED_STRUCT struct { 10677 uint16 version; 10678 uint16 len; 10679 uint32 bcn_timeout; /**< dur in seconds to receive 1 bcn */ 10680 uint32 max_tx_retry; /**< no of consecutive no acks to send txfail event */ 10681 uint32 max_atim_failure; /**< no of consecutive atim failure */ 10682 } BWL_POST_PACKED_STRUCT aibss_txfail_config_t; 10683 #include <packed_section_end.h> 10684 10685 #include <packed_section_start.h> 10686 typedef BWL_PRE_PACKED_STRUCT struct wl_aibss_if { 10687 uint16 version; 10688 uint16 len; 10689 uint32 flags; 10690 struct ether_addr addr; 10691 chanspec_t chspec; 10692 } BWL_POST_PACKED_STRUCT wl_aibss_if_t; 10693 #include <packed_section_end.h> 10694 10695 #include <packed_section_start.h> 10696 typedef BWL_PRE_PACKED_STRUCT struct wlc_ipfo_route_entry { 10697 struct ipv4_addr ip_addr; 10698 struct ether_addr nexthop; 10699 } BWL_POST_PACKED_STRUCT wlc_ipfo_route_entry_t; 10700 #include <packed_section_end.h> 10701 10702 #include <packed_section_start.h> 10703 typedef BWL_PRE_PACKED_STRUCT struct wlc_ipfo_route_tbl { 10704 uint32 num_entry; 10705 wlc_ipfo_route_entry_t route_entry[1]; 10706 } BWL_POST_PACKED_STRUCT wlc_ipfo_route_tbl_t; 10707 #include <packed_section_end.h> 10708 10709 /* Version of wlc_btc_stats_t structure. 10710 * Increment whenever a change is made to wlc_btc_stats_t 10711 */ 10712 #define BTCX_STATS_VER_4 4 10713 typedef struct wlc_btc_stats_v4 { 10714 uint16 version; /* version number of struct */ 10715 uint16 valid; /* Size of this struct */ 10716 uint32 stats_update_timestamp; /* tStamp when data is updated. */ 10717 uint32 btc_status; /* Hybrid/TDM indicator: Bit2:Hybrid, Bit1:TDM,Bit0:CoexEnabled */ 10718 uint32 bt_req_type_map; /* BT Antenna Req types since last stats sample */ 10719 uint32 bt_req_cnt; /* #BT antenna requests since last stats sampl */ 10720 uint32 bt_gnt_cnt; /* #BT antenna grants since last stats sample */ 10721 uint32 bt_gnt_dur; /* usec BT owns antenna since last stats sample */ 10722 uint16 bt_abort_cnt; /* #Times WL was preempted due to BT since WL up */ 10723 uint16 bt_rxf1ovfl_cnt; /* #Time PSNULL retry count exceeded since WL up */ 10724 uint16 bt_latency_cnt; /* #Time ucode high latency detected since WL up */ 10725 uint16 bt_succ_pm_protect_cnt; /* successful PM protection */ 10726 uint16 bt_succ_cts_cnt; /* successful CTS2A protection */ 10727 uint16 bt_wlan_tx_preempt_cnt; /* WLAN TX Preemption */ 10728 uint16 bt_wlan_rx_preempt_cnt; /* WLAN RX Preemption */ 10729 uint16 bt_ap_tx_after_pm_cnt; /* AP TX even after PM protection */ 10730 uint16 bt_peraud_cumu_gnt_cnt; /* Grant cnt for periodic audio */ 10731 uint16 bt_peraud_cumu_deny_cnt; /* Deny cnt for periodic audio */ 10732 uint16 bt_a2dp_cumu_gnt_cnt; /* Grant cnt for A2DP */ 10733 uint16 bt_a2dp_cumu_deny_cnt; /* Deny cnt for A2DP */ 10734 uint16 bt_sniff_cumu_gnt_cnt; /* Grant cnt for Sniff */ 10735 uint16 bt_sniff_cumu_deny_cnt; /* Deny cnt for Sniff */ 10736 uint16 bt_dcsn_map; /* Accumulated decision bitmap once Ant grant */ 10737 uint16 bt_dcsn_cnt; /* Accumulated decision bitmap counters once Ant grant */ 10738 uint16 bt_a2dp_hiwat_cnt; /* Ant grant by a2dp high watermark */ 10739 uint16 bt_datadelay_cnt; /* Ant grant by acl/a2dp datadelay */ 10740 uint16 bt_crtpri_cnt; /* Ant grant by critical BT task */ 10741 uint16 bt_pri_cnt; /* Ant grant by high BT task */ 10742 uint16 a2dpbuf1cnt; /* Ant request with a2dp buffercnt 1 */ 10743 uint16 a2dpbuf2cnt; /* Ant request with a2dp buffercnt 2 */ 10744 uint16 a2dpbuf3cnt; /* Ant request with a2dp buffercnt 3 */ 10745 uint16 a2dpbuf4cnt; /* Ant request with a2dp buffercnt 4 */ 10746 uint16 a2dpbuf5cnt; /* Ant request with a2dp buffercnt 5 */ 10747 uint16 a2dpbuf6cnt; /* Ant request with a2dp buffercnt 6 */ 10748 uint16 a2dpbuf7cnt; /* Ant request with a2dp buffercnt 7 */ 10749 uint16 a2dpbuf8cnt; /* Ant request with a2dp buffercnt 8 */ 10750 uint16 antgrant_lt10ms; /* Ant grant duration cnt 0~10ms */ 10751 uint16 antgrant_lt30ms; /* Ant grant duration cnt 10~30ms */ 10752 uint16 antgrant_lt60ms; /* Ant grant duration cnt 30~60ms */ 10753 uint16 antgrant_ge60ms; /* Ant grant duration cnt 60~ms */ 10754 } wlc_btc_stats_v4_t; 10755 10756 #define BTCX_STATS_VER_3 3 10757 10758 typedef struct wlc_btc_stats_v3 { 10759 uint16 version; /* version number of struct */ 10760 uint16 valid; /* Size of this struct */ 10761 uint32 stats_update_timestamp; /* tStamp when data is updated. */ 10762 uint32 btc_status; /* Hybrid/TDM indicator: Bit2:Hybrid, Bit1:TDM,Bit0:CoexEnabled */ 10763 uint32 bt_req_type_map; /* BT Antenna Req types since last stats sample */ 10764 uint32 bt_req_cnt; /* #BT antenna requests since last stats sampl */ 10765 uint32 bt_gnt_cnt; /* #BT antenna grants since last stats sample */ 10766 uint32 bt_gnt_dur; /* usec BT owns antenna since last stats sample */ 10767 uint16 bt_abort_cnt; /* #Times WL was preempted due to BT since WL up */ 10768 uint16 bt_rxf1ovfl_cnt; /* #Time PSNULL retry count exceeded since WL up */ 10769 uint16 bt_latency_cnt; /* #Time ucode high latency detected since WL up */ 10770 uint16 rsvd; /* pad to align struct to 32bit bndry */ 10771 uint16 bt_succ_pm_protect_cnt; /* successful PM protection */ 10772 uint16 bt_succ_cts_cnt; /* successful CTS2A protection */ 10773 uint16 bt_wlan_tx_preempt_cnt; /* WLAN TX Preemption */ 10774 uint16 bt_wlan_rx_preempt_cnt; /* WLAN RX Preemption */ 10775 uint16 bt_ap_tx_after_pm_cnt; /* AP TX even after PM protection */ 10776 uint16 bt_peraud_cumu_gnt_cnt; /* Grant cnt for periodic audio */ 10777 uint16 bt_peraud_cumu_deny_cnt; /* Deny cnt for periodic audio */ 10778 uint16 bt_a2dp_cumu_gnt_cnt; /* Grant cnt for A2DP */ 10779 uint16 bt_a2dp_cumu_deny_cnt; /* Deny cnt for A2DP */ 10780 uint16 bt_sniff_cumu_gnt_cnt; /* Grant cnt for Sniff */ 10781 uint16 bt_sniff_cumu_deny_cnt; /* Deny cnt for Sniff */ 10782 uint8 pad; /* Padding */ 10783 uint8 slice_index; /* Slice to report */ 10784 } wlc_btc_stats_v3_t; 10785 10786 #define BTCX_STATS_VER_2 2 10787 10788 typedef struct wlc_btc_stats_v2 { 10789 uint16 version; /* version number of struct */ 10790 uint16 valid; /* Size of this struct */ 10791 uint32 stats_update_timestamp; /* tStamp when data is updated. */ 10792 uint32 btc_status; /* Hybrid/TDM indicator: Bit2:Hybrid, Bit1:TDM,Bit0:CoexEnabled */ 10793 uint32 bt_req_type_map; /* BT Antenna Req types since last stats sample */ 10794 uint32 bt_req_cnt; /* #BT antenna requests since last stats sampl */ 10795 uint32 bt_gnt_cnt; /* #BT antenna grants since last stats sample */ 10796 uint32 bt_gnt_dur; /* usec BT owns antenna since last stats sample */ 10797 uint16 bt_abort_cnt; /* #Times WL was preempted due to BT since WL up */ 10798 uint16 bt_rxf1ovfl_cnt; /* #Time PSNULL retry count exceeded since WL up */ 10799 uint16 bt_latency_cnt; /* #Time ucode high latency detected since WL up */ 10800 uint16 rsvd; /* pad to align struct to 32bit bndry */ 10801 } wlc_btc_stats_v2_t; 10802 10803 /* Durations for each bt task in millisecond */ 10804 #define WL_BTCX_DURSTATS_VER_1 (1u) 10805 typedef struct wlc_btcx_durstats_v1 { 10806 uint16 version; /* version number of struct */ 10807 uint16 valid; /* validity of this struct */ 10808 uint32 stats_update_timestamp; /* tStamp when data is updated */ 10809 uint16 bt_acl_dur; /* acl duration in ms */ 10810 uint16 bt_sco_dur; /* sco duration in ms */ 10811 uint16 bt_esco_dur; /* esco duration in ms */ 10812 uint16 bt_a2dp_dur; /* a2dp duration in ms */ 10813 uint16 bt_sniff_dur; /* sniff duration in ms */ 10814 uint16 bt_pscan_dur; /* page scan duration in ms */ 10815 uint16 bt_iscan_dur; /* inquiry scan duration in ms */ 10816 uint16 bt_page_dur; /* paging duration in ms */ 10817 uint16 bt_inquiry_dur; /* inquiry duration in ms */ 10818 uint16 bt_mss_dur; /* mss duration in ms */ 10819 uint16 bt_park_dur; /* park duration in ms */ 10820 uint16 bt_rssiscan_dur; /* rssiscan duration in ms */ 10821 uint16 bt_iscan_sco_dur; /* inquiry scan sco duration in ms */ 10822 uint16 bt_pscan_sco_dur; /* page scan sco duration in ms */ 10823 uint16 bt_tpoll_dur; /* tpoll duration in ms */ 10824 uint16 bt_sacq_dur; /* sacq duration in ms */ 10825 uint16 bt_sdata_dur; /* sdata duration in ms */ 10826 uint16 bt_rs_listen_dur; /* rs listen duration in ms */ 10827 uint16 bt_rs_burst_dur; /* rs brust duration in ms */ 10828 uint16 bt_ble_adv_dur; /* ble adv duration in ms */ 10829 uint16 bt_ble_scan_dur; /* ble scan duration in ms */ 10830 uint16 bt_ble_init_dur; /* ble init duration in ms */ 10831 uint16 bt_ble_conn_dur; /* ble connection duration in ms */ 10832 uint16 bt_task_lmp_dur; /* lmp duration in ms */ 10833 uint16 bt_esco_retran_dur; /* esco retransmission duration in ms */ 10834 uint16 bt_task26_dur; /* task26 duration in ms */ 10835 uint16 bt_task27_dur; /* task27 duration in ms */ 10836 uint16 bt_task28_dur; /* task28 duration in ms */ 10837 uint16 bt_task_pred_dur; /* prediction task duration in ms */ 10838 uint16 bt_multihid_dur; /* multihid duration in ms */ 10839 } wlc_btcx_durstats_v1_t; 10840 10841 #define WL_IPFO_ROUTE_TBL_FIXED_LEN 4 10842 #define WL_MAX_IPFO_ROUTE_TBL_ENTRY 64 10843 10844 /* Global ASSERT Logging */ 10845 #define ASSERTLOG_CUR_VER 0x0100 10846 #define MAX_ASSRTSTR_LEN 64 10847 10848 typedef struct assert_record { 10849 uint32 time; 10850 uint8 seq_num; 10851 int8 str[MAX_ASSRTSTR_LEN]; 10852 } assert_record_t; 10853 10854 typedef struct assertlog_results { 10855 uint16 version; 10856 uint16 record_len; 10857 uint32 num; 10858 assert_record_t logs[1]; 10859 } assertlog_results_t; 10860 10861 #define LOGRRC_FIX_LEN 8 10862 #define IOBUF_ALLOWED_NUM_OF_LOGREC(type, len) ((len - LOGRRC_FIX_LEN)/sizeof(type)) 10863 /* BCMWAPI_WAI */ 10864 #define IV_LEN 16 /* same as SMS4_WPI_PN_LEN */ 10865 struct wapi_sta_msg_t 10866 { 10867 uint16 msg_type; 10868 uint16 datalen; 10869 uint8 vap_mac[6]; 10870 uint8 reserve_data1[2]; 10871 uint8 sta_mac[6]; 10872 uint8 reserve_data2[2]; 10873 uint8 gsn[IV_LEN]; 10874 uint8 wie[TLV_BODY_LEN_MAX + TLV_HDR_LEN]; /* 257 */ 10875 uint8 pad[3]; /* padding for alignment */ 10876 }; 10877 /* #endif BCMWAPI_WAI */ 10878 /* chanim acs record */ 10879 typedef struct { 10880 uint8 valid; 10881 uint8 trigger; 10882 chanspec_t selected_chspc; 10883 int8 bgnoise; 10884 uint32 glitch_cnt; 10885 uint8 ccastats; 10886 uint8 chan_idle; 10887 uint32 timestamp; 10888 } chanim_acs_record_t; 10889 10890 typedef struct { 10891 chanim_acs_record_t acs_record[CHANIM_ACS_RECORD]; 10892 uint8 count; 10893 uint32 timestamp; 10894 } wl_acs_record_t; 10895 10896 #define WL_CHANIM_STATS_V2 2 10897 #define CCASTATS_V2_MAX 9 10898 typedef struct chanim_stats_v2 { 10899 uint32 glitchcnt; /**< normalized as per second count */ 10900 uint32 badplcp; /**< normalized as per second count */ 10901 uint8 ccastats[CCASTATS_V2_MAX]; /**< normalized as 0-255 */ 10902 int8 bgnoise; /**< background noise level (in dBm) */ 10903 chanspec_t chanspec; /**< ctrl chanspec of the interface */ 10904 uint32 timestamp; /**< time stamp at which the stats are collected */ 10905 uint32 bphy_glitchcnt; /**< normalized as per second count */ 10906 uint32 bphy_badplcp; /**< normalized as per second count */ 10907 uint8 chan_idle; /**< normalized as 0~255 */ 10908 uint8 PAD[3]; 10909 } chanim_stats_v2_t; 10910 10911 typedef struct chanim_stats { 10912 uint32 glitchcnt; /**< normalized as per second count */ 10913 uint32 badplcp; /**< normalized as per second count */ 10914 uint8 ccastats[CCASTATS_MAX]; /**< normalized as 0-255 */ 10915 int8 bgnoise; /**< background noise level (in dBm) */ 10916 uint8 pad_1[11 - CCASTATS_MAX]; 10917 chanspec_t chanspec; /**< ctrl chanspec of the interface */ 10918 uint8 pad_2[2]; 10919 uint32 timestamp; /**< time stamp at which the stats are collected */ 10920 uint32 bphy_glitchcnt; /**< normalized as per second count */ 10921 uint32 bphy_badplcp; /**< normalized as per second count */ 10922 uint8 chan_idle; /**< normalized as 0~255 */ 10923 uint8 PAD[3]; 10924 } chanim_stats_t; 10925 10926 #define WL_CHANIM_STATS_VERSION 3 10927 typedef struct { 10928 uint32 buflen; 10929 uint32 version; 10930 uint32 count; 10931 chanim_stats_t stats[1]; 10932 } wl_chanim_stats_t; 10933 10934 #define WL_SC_CHANIM_STATS_V1 1u 10935 /* sc chanim interface stats */ 10936 typedef struct sc_chanim_stats_v1 { 10937 uint32 stats_ms; /* duraion for which stats are collected, in ms */ 10938 chanspec_t chanspec; 10939 uint16 PAD; 10940 uint32 sc_only_rx_dur; /* rx only on sc, in ms */ 10941 uint32 sc_rx_mc_rx_dur; /* Rx on SC when MC is active, in ms */ 10942 uint32 sc_rx_ac_rx_dur; /* Rx on SC when AC is active, in ms */ 10943 uint32 sc_rx_mc_tx_dur; /* sc rx with MC tx, in ms */ 10944 uint32 sc_rx_ac_bt_tx_dur; /* sc rx with AC-BT tx, in ms */ 10945 uint32 sc_rx_bt_rx_dur; /* sc rx when BT Main is active, in ms */ 10946 uint32 sc_rx_btsc_rx_dur; /* BT sc and wlan SC rx is active, in ms */ 10947 } sc_chanim_stats_v1_t; 10948 10949 typedef struct { 10950 uint32 version; 10951 uint32 length; 10952 uint8 flags; /* flags: to print the stats, 10953 * WL_CHANIM_COUNT_ONE ==> Query stats for Home channel, 10954 * WL_CHANIM_COUNT_ALL ==> Query stats for all channels 10955 */ 10956 uint8 id; /* Module id, to know which module has sent the stats 10957 * SC_CHANIM_ID_SCAN ==> For SCAN 10958 * SC_CHANIM_ID_STA ==> For STA 10959 */ 10960 uint8 count; /* o/p: Count of channels for which stats needs to be displayed. 10961 * This value is number of channels supported in particular locale when 10962 * flags is WL_CHANIM_COUNT_ALL, one when flag is 10963 * WL_CHANIM_COUNT_ONE 10964 */ 10965 uint8 PAD; 10966 sc_chanim_stats_v1_t sc_stats[1]; 10967 } wl_chanim_sc_stats_v1_t; 10968 10969 /* WL_CHANIM_SC_STATS_FIXED_LEN: when we change size of any field above sc_stats, this macro 10970 * needs versioning. At present it uses offset of v1, which is same for all versions so far 10971 */ 10972 #define WL_CHANIM_SC_STATS_FIXED_LEN OFFSETOF(wl_chanim_sc_stats_v1_t, sc_stats) 10973 #define WL_CHANIM_STATS_FIXED_LEN OFFSETOF(wl_chanim_stats_t, stats) 10974 10975 #define WL_SC_CHANIM_STATS_V2 2u 10976 /* sc chanim interface stats */ 10977 typedef struct sc_chanim_stats_v2 { 10978 uint32 stats_ms; /* duraion for which stats are collected, in ms */ 10979 chanspec_t chanspec; 10980 uint16 PAD; 10981 uint32 sc_only_rx_dur; /* rx only on sc, in ms */ 10982 uint32 sc_rx_mc_rx_dur; /* Rx on SC when MC is active, in ms */ 10983 uint32 sc_rx_ac_rx_dur; /* Rx on SC when AC is active, in ms */ 10984 uint32 sc_rx_mc_tx_dur; /* sc rx with MC tx, in ms */ 10985 uint32 sc_rx_ac_bt_tx_dur; /* sc rx with AC-BT tx, in ms */ 10986 uint32 sc_rx_bt_rx_dur; /* sc rx when BT Main is active, in ms */ 10987 uint32 sc_btle_overlap_dur; /* wlsc was awake and btsc le scan overlapped, in ms */ 10988 uint32 sc_btpage_overlap_dur; /* wlsc was awake and btsc page scan overlapped, in ms */ 10989 uint32 sc_btle_blnk_dur; /* wlauxtx blanked btsc le scan, in ms */ 10990 uint32 sc_btpage_blnk_dur; /* wlauxtx blanked btsc page scan, in ms */ 10991 } sc_chanim_stats_v2_t; 10992 10993 typedef struct { 10994 uint32 version; 10995 uint32 length; 10996 uint8 flags; /* flags: to print the stats, 10997 * WL_CHANIM_COUNT_ONE ==> Query stats for Home channel, 10998 * WL_CHANIM_COUNT_ALL ==> Query stats for all channels 10999 */ 11000 uint8 id; /* Module id, to know which module has sent the stats 11001 * SC_CHANIM_ID_SCAN ==> For SCAN 11002 * SC_CHANIM_ID_STA ==> For STA 11003 */ 11004 uint8 count; /* o/p: Count of channels for which stats needs to be displayed. 11005 * This value is number of channels supported in particular locale when 11006 * flags is WL_CHANIM_COUNT_ALL, one when flag is 11007 * WL_CHANIM_COUNT_ONE 11008 */ 11009 uint8 PAD; 11010 sc_chanim_stats_v2_t sc_stats[1]; 11011 } wl_chanim_sc_stats_v2_t; 11012 11013 #define WL_SC_CHANIM_STATS_V3 3u 11014 /* sc chanim interface stats */ 11015 typedef struct sc_chanim_stats_v3 { 11016 uint32 stats_ms; /* duraion for which stats are collected, in ms */ 11017 chanspec_t chanspec; 11018 uint16 PAD; 11019 uint32 sc_only_rx_dur; /* rx only on sc, in ms */ 11020 uint32 sc_rx_mc_rx_dur; /* Rx on SC when MC is active, in ms */ 11021 uint32 sc_rx_ac_rx_dur; /* Rx on SC when AC is active, in ms */ 11022 uint32 sc_rx_mc_tx_dur; /* sc rx with MC tx, in ms */ 11023 uint32 sc_rx_ac_bt_tx_dur; /* sc rx with AC-BT tx, in ms */ 11024 uint32 sc_rx_bt_rx_dur; /* sc rx when BT Main is active, in ms */ 11025 uint32 sc_btle_overlap_dur; /* wlsc was awake and btsc le scan overlapped, in ms */ 11026 uint32 sc_btpage_overlap_dur; /* wlsc was awake and btsc page scan overlapped, in ms */ 11027 uint32 sc_btle_blnk_dur; /* wlauxtx blanked btsc le scan, in ms */ 11028 uint32 sc_btpage_blnk_dur; /* wlauxtx blanked btsc page scan, in ms */ 11029 uint32 ac_btle_overlap_dur; /* wlaux was awake and btsc le scan overlapped, in ms */ 11030 uint32 ac_btpage_overlap_dur; /* wlaux was awake and btsc page scan overlapped, in ms */ 11031 } sc_chanim_stats_v3_t; 11032 11033 typedef struct { 11034 uint32 version; 11035 uint32 length; 11036 uint8 flags; /* flags: to print the stats, 11037 * WL_CHANIM_COUNT_ONE ==> Query stats for Home channel, 11038 * WL_CHANIM_COUNT_ALL ==> Query stats for all channels 11039 */ 11040 uint8 id; /* Module id, to know which module has sent the stats 11041 * SC_CHANIM_ID_SCAN ==> For SCAN 11042 * SC_CHANIM_ID_STA ==> For STA 11043 */ 11044 uint8 count; /* o/p: Count of channels for which stats needs to be displayed. 11045 * This value is number of channels supported in particular locale when 11046 * flags is WL_CHANIM_COUNT_ALL, one when flag is 11047 * WL_CHANIM_COUNT_ONE 11048 */ 11049 uint8 PAD; 11050 sc_chanim_stats_v3_t sc_stats[1]; 11051 } wl_chanim_sc_stats_v3_t; 11052 11053 #define WL_SC_CHANIM_STATS_V4 4u 11054 /* sc chanim interface stats */ 11055 typedef struct sc_chanim_stats_v4 { 11056 uint32 stats_ms; /* duraion for which stats are collected, in ms */ 11057 chanspec_t chanspec; 11058 uint16 PAD; 11059 uint32 sc_only_rx_dur; /* rx only on sc, in ms */ 11060 uint32 sc_rx_mc_rx_dur; /* Rx on SC when MC is active, in ms */ 11061 uint32 sc_rx_ac_rx_dur; /* Rx on SC when AC is active, in ms */ 11062 uint32 sc_rx_mc_tx_dur; /* sc rx with MC tx, in ms */ 11063 uint32 sc_rx_ac_bt_tx_dur; /* sc rx with AC-BT tx, in ms */ 11064 uint32 sc_rx_bt_rx_dur; /* sc rx when BT Main is active, in ms */ 11065 uint32 sc_btle_overlap_dur; /* wlsc was awake and btsc le scan overlapped, in ms */ 11066 uint32 sc_btpage_overlap_dur; /* wlsc was awake and btsc page scan overlapped, in ms */ 11067 uint32 ac_btle_blnk_dur; /* wlauxtx blanked btsc le scan, in ms */ 11068 uint32 ac_btpage_blnk_dur; /* wlauxtx blanked btsc page scan, in ms */ 11069 uint32 ac_btle_overlap_dur; /* wlaux was awake and btsc le scan overlapped, in ms */ 11070 uint32 ac_btpage_overlap_dur; /* wlaux was awake and btsc page scan overlapped, in ms */ 11071 uint32 timestamp; /* Time when stats last updated */ 11072 } sc_chanim_stats_v4_t; 11073 11074 typedef struct { 11075 uint32 version; 11076 uint32 length; 11077 uint8 flags; /* flags: to print the stats, 11078 * WL_CHANIM_COUNT_ONE ==> Query stats for Home channel, 11079 * WL_CHANIM_COUNT_ALL ==> Query stats for all channels 11080 */ 11081 uint8 id; /* Module id, to know which module has sent the stats 11082 * SC_CHANIM_ID_SCAN ==> For SCAN 11083 * SC_CHANIM_ID_STA ==> For STA 11084 */ 11085 uint8 count; /* o/p: Count of channels for which stats needs to be displayed. 11086 * This value is number of channels supported in particular locale when 11087 * flags is WL_CHANIM_COUNT_ALL, one when flag is 11088 * WL_CHANIM_COUNT_ONE 11089 */ 11090 uint8 PAD; 11091 sc_chanim_stats_v4_t sc_stats[1]; 11092 } wl_chanim_sc_stats_v4_t; 11093 11094 #define WL_SC_CHANIM_STATS_V5 5u 11095 /* sc chanim interface stats */ 11096 typedef struct sc_chanim_stats_v5 { 11097 uint32 stats_ms; /* duraion for which stats are collected, in ms */ 11098 chanspec_t chanspec; 11099 uint16 sc_btrx_trans_cnt; /* BT RX transitions */ 11100 uint32 sc_only_rx_dur; /* rx only on sc, in ms */ 11101 uint32 sc_rx_mc_rx_dur; /* Rx on SC when MC is active, in ms */ 11102 uint32 sc_rx_ac_rx_dur; /* Rx on SC when AC is active, in ms */ 11103 uint32 sc_rx_mc_tx_dur; /* sc rx with MC tx, in ms */ 11104 uint32 sc_rx_ac_bt_tx_dur; /* sc rx with AC-BT tx, in ms */ 11105 uint32 sc_rx_bt_rx_dur; /* sc rx when BT Main is active, in ms */ 11106 uint32 sc_btle_overlap_dur; /* wlsc was awake and btsc le scan overlapped, in ms */ 11107 uint32 sc_btpage_overlap_dur; /* wlsc was awake and btsc page scan overlapped, in ms */ 11108 uint32 ac_btle_blnk_dur; /* wlauxtx blanked btsc le scan, in ms */ 11109 uint32 ac_btpage_blnk_dur; /* wlauxtx blanked btsc page scan, in ms */ 11110 uint32 ac_btle_overlap_dur; /* wlaux was awake and btsc le scan overlapped, in ms */ 11111 uint32 ac_btpage_overlap_dur; /* wlaux was awake and btsc page scan overlapped, in ms */ 11112 uint32 timestamp; /* Time when stats last updated */ 11113 } sc_chanim_stats_v5_t; 11114 11115 typedef struct { 11116 uint32 version; 11117 uint32 length; 11118 uint8 flags; /* flags: to print the stats, 11119 * WL_CHANIM_COUNT_ONE ==> Query stats for Home channel, 11120 * WL_CHANIM_COUNT_ALL ==> Query stats for all channels 11121 */ 11122 uint8 id; /* Module id, to know which module has sent the stats 11123 * SC_CHANIM_ID_SCAN ==> For SCAN 11124 * SC_CHANIM_ID_STA ==> For STA 11125 */ 11126 uint8 count; /* o/p: Count of channels for which stats needs to be displayed. 11127 * This value is number of channels supported in particular locale when 11128 * flags is WL_CHANIM_COUNT_ALL, one when flag is 11129 * WL_CHANIM_COUNT_ONE 11130 */ 11131 uint8 PAD; 11132 sc_chanim_stats_v5_t sc_stats[1]; 11133 } wl_chanim_sc_stats_v5_t; 11134 11135 /* sc_chanim periodic ecounters structs for WL_IFSTATS_XTLV_SC_CHANIM_PERIODIC_STATS 11136 * [similar to wl_chanim_sc_stats_vX_t, but constrained in size due to its known periodicity 11137 * of reporting] 11138 */ 11139 #define WLC_SC_CHANIM_PERIODIC_STATS_V2 (2u) 11140 #define WLC_SC_STATS_MAX_BANDS_V1 2u 11141 11142 typedef struct sc_chanim_stats_perband_periodic_v2 { 11143 uint8 pad[3]; 11144 uint8 band_id; /* band for which stats reported; 0:5G,1:2G */ 11145 uint16 sc_only_rx_dur; /* rx only on sc, in ms */ 11146 uint16 sc_rx_mc_rx_dur; /* Rx on SC when MC is active, in ms */ 11147 uint16 sc_rx_ac_rx_dur; /* Rx on SC when AC is active, in ms */ 11148 uint16 sc_rx_mc_tx_dur; /* sc rx with MC tx, in ms */ 11149 uint16 sc_rx_ac_bt_tx_dur; /* sc rx with AC-BT tx, in ms */ 11150 uint16 sc_rx_bt_rx_dur; /* sc rx when BT Main is active, in ms */ 11151 uint16 sc_btle_overlap_dur; /* wlsc was awake and btsc le scan overlapped, in ms */ 11152 uint16 sc_btpage_overlap_dur; /* wlsc was awake and btsc page scan overlapped, in ms */ 11153 uint16 sc_btle_blnk_dur; /* wlauxtx blanked btsc le scan, in ms */ 11154 uint16 sc_btpage_blnk_dur; /* wlauxtx blanked btsc page scan, in ms */ 11155 } sc_chanim_stats_perband_periodic_v2_t; 11156 11157 typedef struct wl_chanim_sc_periodic_stats_v2 { 11158 uint16 ver; 11159 uint16 len; 11160 uint8 pad[3]; 11161 uint8 count; /* number of sc_stats below */ 11162 /* per band accum stats */ 11163 sc_chanim_stats_perband_periodic_v2_t sc_stats[WLC_SC_STATS_MAX_BANDS_V1]; 11164 } wl_chanim_sc_periodic_stats_v2_t; 11165 11166 #define WLC_SC_CHANIM_PERIODIC_STATS_V3 (3u) 11167 11168 typedef struct sc_chanim_stats_perband_periodic_v3 { 11169 uint8 pad[3]; 11170 uint8 band_id; /* band for which stats reported; 0:5G,1:2G */ 11171 uint16 sc_only_rx_dur; /* rx only on sc, in ms */ 11172 uint16 sc_rx_mc_rx_dur; /* Rx on SC when MC is active, in ms */ 11173 uint16 sc_rx_ac_rx_dur; /* Rx on SC when AC is active, in ms */ 11174 uint16 sc_rx_mc_tx_dur; /* sc rx with MC tx, in ms */ 11175 uint16 sc_rx_ac_bt_tx_dur; /* sc rx with AC-BT tx, in ms */ 11176 uint16 sc_rx_bt_rx_dur; /* sc rx when BT Main is active, in ms */ 11177 uint16 sc_btle_overlap_dur; /* wlsc was awake and btsc le scan overlapped, in ms */ 11178 uint16 sc_btpage_overlap_dur; /* wlsc was awake and btsc page scan overlapped, in ms */ 11179 uint16 sc_btle_blnk_dur; /* wlauxtx blanked btsc le scan, in ms */ 11180 uint16 sc_btpage_blnk_dur; /* wlauxtx blanked btsc page scan, in ms */ 11181 uint16 ac_btle_overlap_dur; /* wlaux was awake and btsc le scan overlapped, in ms */ 11182 uint16 ac_btpage_overlap_dur; /* wlaux was awake and btsc page scan overlapped, in ms */ 11183 } sc_chanim_stats_perband_periodic_v3_t; 11184 11185 typedef struct wl_chanim_sc_periodic_stats_v3 { 11186 uint16 ver; 11187 uint16 len; 11188 uint8 pad[3]; 11189 uint8 count; /* number of sc_stats below */ 11190 /* per band accum stats */ 11191 sc_chanim_stats_perband_periodic_v3_t sc_stats[WLC_SC_STATS_MAX_BANDS_V1]; 11192 } wl_chanim_sc_periodic_stats_v3_t; 11193 11194 /** Noise measurement metrics. */ 11195 #define NOISE_MEASURE_KNOISE 0x1 11196 11197 /** scb probe parameter */ 11198 typedef struct { 11199 uint32 scb_timeout; 11200 uint32 scb_activity_time; 11201 uint32 scb_max_probe; 11202 } wl_scb_probe_t; 11203 11204 /* structure/defines for selective mgmt frame (smf) stats support */ 11205 11206 #define SMFS_VERSION 1 11207 /** selected mgmt frame (smf) stats element */ 11208 typedef struct wl_smfs_elem { 11209 uint32 count; 11210 uint16 code; /**< SC or RC code */ 11211 uint8 PAD[2]; 11212 } wl_smfs_elem_t; 11213 11214 typedef struct wl_smf_stats { 11215 uint32 version; 11216 uint16 length; /**< reserved for future usage */ 11217 uint8 type; 11218 uint8 codetype; 11219 uint32 ignored_cnt; 11220 uint32 malformed_cnt; 11221 uint32 count_total; /**< count included the interested group */ 11222 wl_smfs_elem_t elem[1]; 11223 } wl_smf_stats_t; 11224 11225 #define WL_SMFSTATS_FIXED_LEN OFFSETOF(wl_smf_stats_t, elem); 11226 11227 enum { 11228 SMFS_CODETYPE_SC, 11229 SMFS_CODETYPE_RC 11230 }; 11231 11232 typedef enum smfs_type { 11233 SMFS_TYPE_AUTH, 11234 SMFS_TYPE_ASSOC, 11235 SMFS_TYPE_REASSOC, 11236 SMFS_TYPE_DISASSOC_TX, 11237 SMFS_TYPE_DISASSOC_RX, 11238 SMFS_TYPE_DEAUTH_TX, 11239 SMFS_TYPE_DEAUTH_RX, 11240 SMFS_TYPE_MAX 11241 } smfs_type_t; 11242 11243 /* #ifdef PHYMON */ 11244 11245 #define PHYMON_VERSION 1 11246 11247 typedef struct wl_phycal_core_state { 11248 /* Tx IQ/LO calibration coeffs */ 11249 int16 tx_iqlocal_a; 11250 int16 tx_iqlocal_b; 11251 int8 tx_iqlocal_ci; 11252 int8 tx_iqlocal_cq; 11253 int8 tx_iqlocal_di; 11254 int8 tx_iqlocal_dq; 11255 int8 tx_iqlocal_ei; 11256 int8 tx_iqlocal_eq; 11257 int8 tx_iqlocal_fi; 11258 int8 tx_iqlocal_fq; 11259 11260 /** Rx IQ calibration coeffs */ 11261 int16 rx_iqcal_a; 11262 int16 rx_iqcal_b; 11263 11264 uint8 tx_iqlocal_pwridx; /**< Tx Power Index for Tx IQ/LO calibration */ 11265 uint8 PAD[3]; 11266 uint32 papd_epsilon_table[64]; /**< PAPD epsilon table */ 11267 int16 papd_epsilon_offset; /**< PAPD epsilon offset */ 11268 uint8 curr_tx_pwrindex; /**< Tx power index */ 11269 int8 idle_tssi; /**< Idle TSSI */ 11270 int8 est_tx_pwr; /**< Estimated Tx Power (dB) */ 11271 int8 est_rx_pwr; /**< Estimated Rx Power (dB) from RSSI */ 11272 uint16 rx_gaininfo; /**< Rx gain applied on last Rx pkt */ 11273 uint16 init_gaincode; /**< initgain required for ACI */ 11274 int8 estirr_tx; 11275 int8 estirr_rx; 11276 } wl_phycal_core_state_t; 11277 11278 typedef struct wl_phycal_state { 11279 int32 version; 11280 int8 num_phy_cores; /**< number of cores */ 11281 int8 curr_temperature; /**< on-chip temperature sensor reading */ 11282 chanspec_t chspec; /**< channspec for this state */ 11283 uint8 aci_state; /**< ACI state: ON/OFF */ 11284 uint8 PAD; 11285 uint16 crsminpower; /**< crsminpower required for ACI */ 11286 uint16 crsminpowerl; /**< crsminpowerl required for ACI */ 11287 uint16 crsminpoweru; /**< crsminpoweru required for ACI */ 11288 wl_phycal_core_state_t phycal_core[1]; 11289 } wl_phycal_state_t; 11290 11291 #define WL_PHYCAL_STAT_FIXED_LEN OFFSETOF(wl_phycal_state_t, phycal_core) 11292 /* endif PHYMON */ 11293 11294 /** discovery state */ 11295 typedef struct wl_p2p_disc_st { 11296 uint8 state; /**< see state */ 11297 uint8 PAD; 11298 chanspec_t chspec; /**< valid in listen state */ 11299 uint16 dwell; /**< valid in listen state, in ms */ 11300 } wl_p2p_disc_st_t; 11301 11302 /** scan request */ 11303 typedef struct wl_p2p_scan { 11304 uint8 type; /**< 'S' for WLC_SCAN, 'E' for "escan" */ 11305 uint8 reserved[3]; 11306 /* scan or escan parms... */ 11307 } wl_p2p_scan_t; 11308 11309 /** i/f request */ 11310 typedef struct wl_p2p_if { 11311 struct ether_addr addr; 11312 uint8 type; /**< see i/f type */ 11313 uint8 PAD; 11314 chanspec_t chspec; /**< for p2p_ifadd GO */ 11315 } wl_p2p_if_t; 11316 11317 /** i/f query */ 11318 typedef struct wl_p2p_ifq { 11319 uint32 bsscfgidx; 11320 char ifname[BCM_MSG_IFNAME_MAX]; 11321 } wl_p2p_ifq_t; 11322 11323 /** OppPS & CTWindow */ 11324 typedef struct wl_p2p_ops { 11325 uint8 ops; /**< 0: disable 1: enable */ 11326 uint8 ctw; /**< >= 10 */ 11327 } wl_p2p_ops_t; 11328 11329 /** absence and presence request */ 11330 typedef struct wl_p2p_sched_desc { 11331 uint32 start; 11332 uint32 interval; 11333 uint32 duration; 11334 uint32 count; /**< see count */ 11335 } wl_p2p_sched_desc_t; 11336 11337 typedef struct wl_p2p_sched { 11338 uint8 type; /**< see schedule type */ 11339 uint8 action; /**< see schedule action */ 11340 uint8 option; /**< see schedule option */ 11341 uint8 PAD; 11342 wl_p2p_sched_desc_t desc[1]; 11343 } wl_p2p_sched_t; 11344 11345 typedef struct wl_p2p_wfds_hash { 11346 uint32 advt_id; 11347 uint16 nw_cfg_method; 11348 uint8 wfds_hash[6]; 11349 uint8 name_len; 11350 uint8 service_name[MAX_WFDS_SVC_NAME_LEN]; 11351 uint8 PAD[3]; 11352 } wl_p2p_wfds_hash_t; 11353 11354 typedef struct wl_p2p_config_params { 11355 uint16 enable; /**< 0: disable 1: enable */ 11356 uint16 chanspec; /* GO chanspec */ 11357 wlc_ssid_t ssid; /* SSID */ 11358 } wl_p2p_config_params_t; 11359 11360 typedef struct wl_bcmdcs_data { 11361 uint32 reason; 11362 chanspec_t chspec; 11363 uint8 PAD[2]; 11364 } wl_bcmdcs_data_t; 11365 /* ifdef EXT_STA */ 11366 /** 11367 * Format of IHV data passed to OID_DOT11_NIC_SPECIFIC_EXTENSION. 11368 */ 11369 typedef struct _IHV_NIC_SPECIFIC_EXTENSION { 11370 uint8 oui[4]; /**< vendor specific OUI value */ 11371 uint32 event; /**< event code */ 11372 uint8 ihvData[1]; /**< ihv data */ 11373 } IHV_NIC_SPECIFIC_EXTENSION, *PIHV_NIC_SPECIFIC_EXTENSION; 11374 #define IHV_NIC_SPECIFIC_EXTENTION_HEADER OFFSETOF(IHV_NIC_SPECIFIC_EXTENSION, ihvData[0]) 11375 /* EXT_STA */ 11376 /** NAT configuration */ 11377 typedef struct { 11378 uint32 ipaddr; /**< interface ip address */ 11379 uint32 ipaddr_mask; /**< interface ip address mask */ 11380 uint32 ipaddr_gateway; /**< gateway ip address */ 11381 uint8 mac_gateway[6]; /**< gateway mac address */ 11382 uint8 PAD[2]; 11383 uint32 ipaddr_dns; /**< DNS server ip address, valid only for public if */ 11384 uint8 mac_dns[6]; /**< DNS server mac address, valid only for public if */ 11385 uint8 GUID[38]; /**< interface GUID */ 11386 } nat_if_info_t; 11387 11388 typedef struct { 11389 uint32 op; /**< operation code */ 11390 uint8 pub_if; /**< set for public if, clear for private if */ 11391 uint8 PAD[3]; 11392 nat_if_info_t if_info; /**< interface info */ 11393 } nat_cfg_t; 11394 11395 typedef struct { 11396 int32 state; /**< NAT state returned */ 11397 } nat_state_t; 11398 11399 typedef struct flush_txfifo { 11400 uint32 txfifobmp; 11401 uint32 hwtxfifoflush; 11402 struct ether_addr ea; 11403 uint8 PAD[2]; 11404 } flush_txfifo_t; 11405 11406 enum { 11407 SPATIAL_MODE_2G_IDX = 0, 11408 SPATIAL_MODE_5G_LOW_IDX, 11409 SPATIAL_MODE_5G_MID_IDX, 11410 SPATIAL_MODE_5G_HIGH_IDX, 11411 SPATIAL_MODE_5G_UPPER_IDX, 11412 SPATIAL_MODE_MAX_IDX 11413 }; 11414 11415 #define WLC_TXCORE_MAX 4 /**< max number of txcore supports */ 11416 #define WLC_TXCORE_MAX_OLD 2 /**< backward compatibilty for TXCAL */ 11417 #define WLC_SUBBAND_MAX 4 /**< max number of sub-band supports */ 11418 typedef struct { 11419 uint8 band2g[WLC_TXCORE_MAX]; 11420 uint8 band5g[WLC_SUBBAND_MAX][WLC_TXCORE_MAX]; 11421 } sar_limit_t; 11422 11423 #define MAX_NUM_TXCAL_MEAS 128 11424 #define MAX_NUM_PWR_STEP 40 11425 #define TXCAL_IOVAR_VERSION 0x1 11426 11427 #define TXCAL_GAINSWEEP_VER (TXCAL_GAINSWEEP_VERSION_V2) 11428 #define TXCAL_GAINSWEEP_VERSION_V2 2 11429 11430 /* Below macro defines the latest txcal iovar version updated */ 11431 /* This macro also reflects in the 'txcal_ver' iovar */ 11432 #define TXCAL_IOVAR_LATEST TXCAL_GAINSWEEP_VER 11433 11434 /* below are used for bphy/ofdm separated LSC */ 11435 #define TXCAL_PWR_BPHY 0 11436 #define TXCAL_PWR_OFDM 1 11437 11438 typedef struct wl_txcal_meas_percore { 11439 uint16 tssi[MAX_NUM_TXCAL_MEAS]; 11440 int16 pwr[MAX_NUM_TXCAL_MEAS]; 11441 } wl_txcal_meas_percore_t; 11442 11443 typedef struct wl_txcal_meas_ncore { 11444 uint16 version; 11445 uint8 valid_cnt; 11446 uint8 num_core; 11447 wl_txcal_meas_percore_t txcal_percore[1]; 11448 } wl_txcal_meas_ncore_t; 11449 11450 typedef struct wl_txcal_power_tssi_percore { 11451 int16 tempsense; 11452 int16 pwr_start; 11453 uint8 pwr_start_idx; 11454 uint8 num_entries; 11455 uint16 pad; 11456 uint8 tssi[MAX_NUM_PWR_STEP]; 11457 } wl_txcal_power_tssi_percore_t; 11458 11459 typedef struct wl_txcal_power_tssi_ncore { 11460 uint16 version; 11461 uint8 set_core; 11462 uint8 channel; 11463 uint8 num_core; 11464 uint8 gen_tbl; 11465 uint8 ofdm; 11466 uint8 pad; 11467 wl_txcal_power_tssi_percore_t tssi_percore[WLC_TXCORE_MAX]; 11468 } wl_txcal_power_tssi_ncore_t; 11469 11470 typedef struct wl_txcal_meas { 11471 uint16 tssi[WLC_TXCORE_MAX][MAX_NUM_TXCAL_MEAS]; 11472 int16 pwr[WLC_TXCORE_MAX][MAX_NUM_TXCAL_MEAS]; 11473 uint8 valid_cnt; 11474 uint8 PAD; 11475 } wl_txcal_meas_t; 11476 11477 typedef struct wl_txcal_meas_old { 11478 uint16 tssi[WLC_TXCORE_MAX_OLD][MAX_NUM_TXCAL_MEAS]; 11479 int16 pwr[WLC_TXCORE_MAX_OLD][MAX_NUM_TXCAL_MEAS]; 11480 uint8 valid_cnt; 11481 uint8 PAD; 11482 } wl_txcal_meas_old_t; 11483 11484 typedef struct wl_txcal_power_tssi { 11485 uint8 set_core; 11486 uint8 channel; 11487 int16 tempsense[WLC_TXCORE_MAX]; 11488 int16 pwr_start[WLC_TXCORE_MAX]; 11489 uint8 pwr_start_idx[WLC_TXCORE_MAX]; 11490 uint8 num_entries[WLC_TXCORE_MAX]; 11491 uint8 tssi[WLC_TXCORE_MAX][MAX_NUM_PWR_STEP]; 11492 uint8 gen_tbl; 11493 uint8 ofdm; 11494 } wl_txcal_power_tssi_t; 11495 11496 typedef struct wl_txcal_power_tssi_old { 11497 uint8 set_core; 11498 uint8 channel; 11499 int16 tempsense[WLC_TXCORE_MAX_OLD]; 11500 int16 pwr_start[WLC_TXCORE_MAX_OLD]; 11501 uint8 pwr_start_idx[WLC_TXCORE_MAX_OLD]; 11502 uint8 num_entries[WLC_TXCORE_MAX_OLD]; 11503 uint8 tssi[WLC_TXCORE_MAX_OLD][MAX_NUM_PWR_STEP]; 11504 uint8 gen_tbl; 11505 uint8 ofdm; 11506 } wl_txcal_power_tssi_old_t; 11507 11508 typedef struct wl_olpc_pwr { 11509 uint16 version; 11510 uint8 core; 11511 uint8 channel; 11512 int16 tempsense; 11513 uint8 olpc_idx; 11514 uint8 ofdm; 11515 } wl_olpc_pwr_t; 11516 11517 typedef struct wl_rfem_temp_vdet_temp { 11518 uint8 vdet_fem_t1; 11519 int8 rfem_temp_t1; 11520 uint8 vdet_fem_t2; 11521 int8 rfem_temp_t2; 11522 } wl_rfem_temp_vdet_temp_t; 11523 11524 typedef struct wl_rfem_temp_vin_tssi { 11525 uint16 vin_chip_v1; 11526 int16 tssi_chip_v1; 11527 uint16 vin_chip_v2; 11528 int16 tssi_chip_v2; 11529 } wl_rfem_temp_vin_tssi_t; 11530 11531 typedef struct wl_txcal_tempsense { 11532 uint16 version; 11533 uint8 valid_cnt; 11534 uint8 core; 11535 int16 ref_temperature; 11536 int16 meas_temperature; 11537 wl_rfem_temp_vdet_temp_t vdet_temp; 11538 wl_rfem_temp_vin_tssi_t vin_tssi; 11539 } wl_txcal_tempsense_t; 11540 11541 /** IOVAR "mempool" parameter. Used to retrieve a list of memory pool statistics. */ 11542 typedef struct wl_mempool_stats { 11543 int32 num; /**< Number of memory pools */ 11544 bcm_mp_stats_t s[1]; /**< Variable array of memory pool stats. */ 11545 } wl_mempool_stats_t; 11546 11547 typedef struct { 11548 uint32 ipaddr; 11549 uint32 ipaddr_netmask; 11550 uint32 ipaddr_gateway; 11551 } nwoe_ifconfig_t; 11552 11553 /* Both powersel_params and lpc_params are used by IOVAR lpc_params. 11554 * The powersel_params is replaced by lpc_params in later WLC versions. 11555 */ 11556 typedef struct powersel_params { 11557 /* LPC Params exposed via IOVAR */ 11558 int32 tp_ratio_thresh; /**< Throughput ratio threshold */ 11559 uint8 rate_stab_thresh; /**< Thresh for rate stability based on nupd */ 11560 uint8 pwr_stab_thresh; /**< Number of successes before power step down */ 11561 uint8 pwr_sel_exp_time; /**< Time lapse for expiry of database */ 11562 uint8 PAD; 11563 } powersel_params_t; 11564 11565 #define WL_LPC_PARAMS_VER_2 2 11566 #define WL_LPC_PARAMS_CURRENT_VERSION WL_LPC_PARAMS_VER_2 11567 11568 typedef struct lpc_params { 11569 uint16 version; 11570 uint16 length; 11571 /* LPC Params exposed via IOVAR */ 11572 uint8 rate_stab_thresh; /**< Thresh for rate stability based on nupd */ 11573 uint8 pwr_stab_thresh; /**< Number of successes before power step down */ 11574 uint8 lpc_exp_time; /**< Time lapse for expiry of database */ 11575 uint8 pwrup_slow_step; /**< Step size for slow step up */ 11576 uint8 pwrup_fast_step; /**< Step size for fast step up */ 11577 uint8 pwrdn_slow_step; /**< Step size for slow step down */ 11578 } lpc_params_t; 11579 11580 /* tx pkt delay statistics */ 11581 #define SCB_RETRY_SHORT_DEF 7 /**< Default Short retry Limit */ 11582 #define WLPKTDLY_HIST_NBINS 16 /**< number of bins used in the Delay histogram */ 11583 11584 /** structure to store per-AC delay statistics */ 11585 typedef struct scb_delay_stats { 11586 uint32 txmpdu_lost; /**< number of MPDUs lost */ 11587 uint32 txmpdu_cnt[SCB_RETRY_SHORT_DEF]; /**< retry times histogram */ 11588 uint32 delay_sum[SCB_RETRY_SHORT_DEF]; /**< cumulative packet latency */ 11589 uint32 delay_min; /**< minimum packet latency observed */ 11590 uint32 delay_max; /**< maximum packet latency observed */ 11591 uint32 delay_avg; /**< packet latency average */ 11592 uint32 delay_hist[WLPKTDLY_HIST_NBINS]; /**< delay histogram */ 11593 uint32 delay_count; /**< minimum number of time period units before 11594 consequent packet delay events can be generated 11595 */ 11596 uint32 prev_txmpdu_cnt; /**< Previous value of txmpdu_cnt[] during last iteration */ 11597 uint32 prev_delay_sum; /**< Previous value of delay_sum[] during last iteration */ 11598 } scb_delay_stats_t; 11599 11600 /** structure for txdelay event */ 11601 typedef struct txdelay_event { 11602 uint8 status; 11603 uint8 PAD[3]; 11604 int32 rssi; 11605 chanim_stats_t chanim_stats; 11606 scb_delay_stats_t delay_stats[AC_COUNT]; 11607 } txdelay_event_t; 11608 11609 /** structure for txdelay parameters */ 11610 typedef struct txdelay_params { 11611 uint16 ratio; /**< Avg Txdelay Delta */ 11612 uint8 cnt; /**< Sample cnt */ 11613 uint8 period; /**< Sample period */ 11614 uint8 tune; /**< Debug */ 11615 uint8 PAD; 11616 } txdelay_params_t; 11617 #define MAX_TXDELAY_STATS_SCBS 6 11618 #define TXDELAY_STATS_VERSION 1 11619 11620 enum { 11621 TXDELAY_STATS_PARTIAL_RESULT = 0, 11622 TXDELAY_STATS_FULL_RESULT = 1 11623 }; 11624 11625 typedef struct scb_total_delay_stats { 11626 struct ether_addr ea; 11627 uint8 pad[2]; 11628 scb_delay_stats_t dlystats[AC_COUNT]; 11629 } scb_total_delay_stats_t; 11630 11631 typedef struct txdelay_stats { 11632 uint32 version; 11633 uint32 full_result; /* 0:Partial, 1:full */ 11634 uint32 scb_cnt; /* in:requested, out:returned */ 11635 scb_total_delay_stats_t scb_delay_stats[1]; 11636 } txdelay_stats_t; 11637 11638 #define WL_TXDELAY_STATS_FIXED_SIZE \ 11639 (sizeof(txdelay_stats_t)+(MAX_TXDELAY_STATS_SCBS-1)*sizeof(scb_total_delay_stats_t)) 11640 enum { 11641 WNM_SERVICE_DMS = 1, 11642 WNM_SERVICE_FMS = 2, 11643 WNM_SERVICE_TFS = 3 11644 }; 11645 11646 /** Definitions for WNM/NPS TCLAS */ 11647 typedef struct wl_tclas { 11648 uint8 user_priority; 11649 uint8 fc_len; 11650 dot11_tclas_fc_t fc; 11651 } wl_tclas_t; 11652 11653 #define WL_TCLAS_FIXED_SIZE OFFSETOF(wl_tclas_t, fc) 11654 11655 typedef struct wl_tclas_list { 11656 uint32 num; 11657 wl_tclas_t tclas[]; 11658 } wl_tclas_list_t; 11659 11660 /** Definitions for WNM/NPS Traffic Filter Service */ 11661 typedef struct wl_tfs_req { 11662 uint8 tfs_id; 11663 uint8 tfs_actcode; 11664 uint8 tfs_subelem_id; 11665 uint8 send; 11666 } wl_tfs_req_t; 11667 11668 typedef struct wl_tfs_filter { 11669 uint8 status; /**< Status returned by the AP */ 11670 uint8 tclas_proc; /**< TCLAS processing value (0:and, 1:or) */ 11671 uint8 tclas_cnt; /**< count of all wl_tclas_t in tclas array */ 11672 uint8 tclas[1]; /**< VLA of wl_tclas_t */ 11673 } wl_tfs_filter_t; 11674 #define WL_TFS_FILTER_FIXED_SIZE OFFSETOF(wl_tfs_filter_t, tclas) 11675 11676 typedef struct wl_tfs_fset { 11677 struct ether_addr ea; /**< Address of AP/STA involved with this filter set */ 11678 uint8 tfs_id; /**< TFS ID field chosen by STA host */ 11679 uint8 status; /**< Internal status TFS_STATUS_xxx */ 11680 uint8 actcode; /**< Action code DOT11_TFS_ACTCODE_xxx */ 11681 uint8 token; /**< Token used in last request frame */ 11682 uint8 notify; /**< Notify frame sent/received because of this set */ 11683 uint8 filter_cnt; /**< count of all wl_tfs_filter_t in filter array */ 11684 uint8 filter[1]; /**< VLA of wl_tfs_filter_t */ 11685 } wl_tfs_fset_t; 11686 #define WL_TFS_FSET_FIXED_SIZE OFFSETOF(wl_tfs_fset_t, filter) 11687 11688 enum { 11689 TFS_STATUS_DISABLED = 0, /**< TFS filter set disabled by user */ 11690 TFS_STATUS_DISABLING = 1, /**< Empty request just sent to AP */ 11691 TFS_STATUS_VALIDATED = 2, /**< Filter set validated by AP (but maybe not enabled!) */ 11692 TFS_STATUS_VALIDATING = 3, /**< Filter set just sent to AP */ 11693 TFS_STATUS_NOT_ASSOC = 4, /**< STA not associated */ 11694 TFS_STATUS_NOT_SUPPORT = 5, /**< TFS not supported by AP */ 11695 TFS_STATUS_DENIED = 6, /**< Filter set refused by AP (=> all sets are disabled!) */ 11696 }; 11697 11698 typedef struct wl_tfs_status { 11699 uint8 fset_cnt; /**< count of all wl_tfs_fset_t in fset array */ 11700 wl_tfs_fset_t fset[1]; /**< VLA of wl_tfs_fset_t */ 11701 } wl_tfs_status_t; 11702 11703 typedef struct wl_tfs_set { 11704 uint8 send; /**< Immediatly register registered sets on AP side */ 11705 uint8 tfs_id; /**< ID of a specific set (existing or new), or nul for all */ 11706 uint8 actcode; /**< Action code for this filter set */ 11707 uint8 tclas_proc; /**< TCLAS processing operator for this filter set */ 11708 } wl_tfs_set_t; 11709 11710 typedef struct wl_tfs_term { 11711 uint8 del; /**< Delete internal set once confirmation received */ 11712 uint8 tfs_id; /**< ID of a specific set (existing), or nul for all */ 11713 } wl_tfs_term_t; 11714 11715 #define DMS_DEP_PROXY_ARP (1 << 0) 11716 11717 /* Definitions for WNM/NPS Directed Multicast Service */ 11718 enum { 11719 DMS_STATUS_DISABLED = 0, /**< DMS desc disabled by user */ 11720 DMS_STATUS_ACCEPTED = 1, /**< Request accepted by AP */ 11721 DMS_STATUS_NOT_ASSOC = 2, /**< STA not associated */ 11722 DMS_STATUS_NOT_SUPPORT = 3, /**< DMS not supported by AP */ 11723 DMS_STATUS_DENIED = 4, /**< Request denied by AP */ 11724 DMS_STATUS_TERM = 5, /**< Request terminated by AP */ 11725 DMS_STATUS_REMOVING = 6, /**< Remove request just sent */ 11726 DMS_STATUS_ADDING = 7, /**< Add request just sent */ 11727 DMS_STATUS_ERROR = 8, /**< Non compliant AP behvior */ 11728 DMS_STATUS_IN_PROGRESS = 9, /**< Request just sent */ 11729 DMS_STATUS_REQ_MISMATCH = 10, /**< Conditions for sending DMS req not met */ 11730 DMS_STATUS_TIMEOUT = 11 /**< Request Time out */ 11731 }; 11732 11733 typedef struct wl_dms_desc { 11734 uint8 user_id; 11735 uint8 status; 11736 uint8 token; 11737 uint8 dms_id; 11738 uint8 tclas_proc; 11739 uint8 mac_len; /**< length of all ether_addr in data array, 0 if STA */ 11740 uint8 tclas_len; /**< length of all wl_tclas_t in data array */ 11741 uint8 data[1]; /**< VLA of 'ether_addr' and 'wl_tclas_t' (in this order ) */ 11742 } wl_dms_desc_t; 11743 11744 #define WL_DMS_DESC_FIXED_SIZE OFFSETOF(wl_dms_desc_t, data) 11745 11746 typedef struct wl_dms_status { 11747 uint32 cnt; 11748 wl_dms_desc_t desc[1]; 11749 } wl_dms_status_t; 11750 11751 typedef struct wl_dms_set { 11752 uint8 send; 11753 uint8 user_id; 11754 uint8 tclas_proc; 11755 } wl_dms_set_t; 11756 11757 typedef struct wl_dms_term { 11758 uint8 del; 11759 uint8 user_id; 11760 } wl_dms_term_t; 11761 11762 typedef struct wl_service_term { 11763 uint8 service; 11764 union { 11765 wl_dms_term_t dms; 11766 } u; 11767 } wl_service_term_t; 11768 11769 /** Definitions for WNM/NPS BSS Transistion */ 11770 #define WL_BSSTRANS_QUERY_VERSION_1 1 11771 typedef struct wl_bsstrans_query { 11772 uint16 version; /* structure version */ 11773 uint16 pad0; /* padding for 4-byte allignment */ 11774 wlc_ssid_t ssid; /* SSID of NBR elem to be queried for */ 11775 uint8 reason; /* Reason code of the BTQ */ 11776 uint8 pad1[3]; /* padding for 4-byte allignment */ 11777 } wl_bsstrans_query_t; 11778 11779 #define BTM_QUERY_NBR_COUNT_MAX 16 11780 11781 #define WL_BTQ_NBR_LIST_VERSION_1 1 11782 typedef struct wl_btq_nbr_list { 11783 uint16 version; /* structure version */ 11784 uint8 count; /* No. of BTQ NBRs returned */ 11785 uint8 pad; /* padding for 4-byte allignment */ 11786 nbr_rpt_elem_t btq_nbt_elem[]; /* BTQ NBR elem in a BTQ NBR list */ 11787 } wl_btq_nbr_list_t; 11788 11789 typedef struct wl_bsstrans_req { 11790 uint16 tbtt; /**< time of BSS to end of life, in unit of TBTT */ 11791 uint16 dur; /**< time of BSS to keep off, in unit of minute */ 11792 uint8 reqmode; /**< request mode of BSS transition request */ 11793 uint8 unicast; /**< request by unicast or by broadcast */ 11794 } wl_bsstrans_req_t; 11795 11796 enum { 11797 BSSTRANS_RESP_AUTO = 0, /**< Currently equivalent to ENABLE */ 11798 BSSTRANS_RESP_DISABLE = 1, /**< Never answer BSS Trans Req frames */ 11799 BSSTRANS_RESP_ENABLE = 2, /**< Always answer Req frames with preset data */ 11800 BSSTRANS_RESP_WAIT = 3, /**< Send ind, wait and/or send preset data (NOT IMPL) */ 11801 BSSTRANS_RESP_IMMEDIATE = 4 /**< After an ind, set data and send resp (NOT IMPL) */ 11802 }; 11803 11804 typedef struct wl_bsstrans_resp { 11805 uint8 policy; 11806 uint8 status; 11807 uint8 delay; 11808 struct ether_addr target; 11809 } wl_bsstrans_resp_t; 11810 11811 /* "wnm_bsstrans_policy" argument programs behavior after BSSTRANS Req reception. 11812 * BSS-Transition feature is used by multiple programs such as NPS-PF, VE-PF, 11813 * Band-steering, Hotspot 2.0 and customer requirements. Each PF and its test plan 11814 * mandates different behavior on receiving BSS-transition request. To accomodate 11815 * such divergent behaviors these policies have been created. 11816 */ 11817 typedef enum { 11818 WL_BSSTRANS_POLICY_ROAM_ALWAYS = 0, /**< Roam (or disassociate) in all cases */ 11819 WL_BSSTRANS_POLICY_ROAM_IF_MODE = 1, /**< Roam only if requested by Request Mode field */ 11820 WL_BSSTRANS_POLICY_ROAM_IF_PREF = 2, /**< Roam only if Preferred BSS provided */ 11821 WL_BSSTRANS_POLICY_WAIT = 3, /**< Wait for deauth and send Accepted status */ 11822 WL_BSSTRANS_POLICY_PRODUCT = 4, /**< Policy for real product use cases (Olympic) */ 11823 WL_BSSTRANS_POLICY_PRODUCT_WBTEXT = 5, /**< Policy for real product use cases (SS) */ 11824 WL_BSSTRANS_POLICY_MBO = 6, /**< Policy for MBO certification */ 11825 WL_BSSTRANS_POLICY_MAX = 7 11826 } wnm_bsstrans_policy_type_t; 11827 11828 /** Definitions for WNM/NPS TIM Broadcast */ 11829 typedef struct wl_timbc_offset { 11830 int16 offset; /**< offset in us */ 11831 uint16 fix_intv; /**< override interval sent from STA */ 11832 uint16 rate_override; /**< use rate override to send high rate TIM broadcast frame */ 11833 uint8 tsf_present; /**< show timestamp in TIM broadcast frame */ 11834 uint8 PAD; 11835 } wl_timbc_offset_t; 11836 11837 typedef struct wl_timbc_set { 11838 uint8 interval; /**< Interval in DTIM wished or required. */ 11839 uint8 flags; /**< Bitfield described below */ 11840 uint16 rate_min; /**< Minimum rate required for High/Low TIM frames. Optionnal */ 11841 uint16 rate_max; /**< Maximum rate required for High/Low TIM frames. Optionnal */ 11842 } wl_timbc_set_t; 11843 11844 enum { 11845 WL_TIMBC_SET_TSF_REQUIRED = 1, /**< Enable TIMBC only if TSF in TIM frames */ 11846 WL_TIMBC_SET_NO_OVERRIDE = 2, /**< ... if AP does not override interval */ 11847 WL_TIMBC_SET_PROXY_ARP = 4, /**< ... if AP support Proxy ARP */ 11848 WL_TIMBC_SET_DMS_ACCEPTED = 8 /**< ... if all DMS desc have been accepted */ 11849 }; 11850 11851 typedef struct wl_timbc_status { 11852 uint8 status_sta; /**< Status from internal state machine (check below) */ 11853 uint8 status_ap; /**< From AP response frame (check 8.4.2.86 from 802.11) */ 11854 uint8 interval; 11855 uint8 pad; 11856 int32 offset; 11857 uint16 rate_high; 11858 uint16 rate_low; 11859 } wl_timbc_status_t; 11860 11861 enum { 11862 WL_TIMBC_STATUS_DISABLE = 0, /**< TIMBC disabled by user */ 11863 WL_TIMBC_STATUS_REQ_MISMATCH = 1, /**< AP settings do no match user requirements */ 11864 WL_TIMBC_STATUS_NOT_ASSOC = 2, /**< STA not associated */ 11865 WL_TIMBC_STATUS_NOT_SUPPORT = 3, /**< TIMBC not supported by AP */ 11866 WL_TIMBC_STATUS_DENIED = 4, /**< Req to disable TIMBC sent to AP */ 11867 WL_TIMBC_STATUS_ENABLE = 5 /**< TIMBC enabled */ 11868 }; 11869 11870 /** Definitions for PM2 Dynamic Fast Return To Sleep */ 11871 typedef struct wl_pm2_sleep_ret_ext { 11872 uint8 logic; /**< DFRTS logic: see WL_DFRTS_LOGIC_* below */ 11873 uint8 PAD; 11874 uint16 low_ms; /**< Low FRTS timeout */ 11875 uint16 high_ms; /**< High FRTS timeout */ 11876 uint16 rx_pkts_threshold; /**< switching threshold: # rx pkts */ 11877 uint16 tx_pkts_threshold; /**< switching threshold: # tx pkts */ 11878 uint16 txrx_pkts_threshold; /**< switching threshold: # (tx+rx) pkts */ 11879 uint32 rx_bytes_threshold; /**< switching threshold: # rx bytes */ 11880 uint32 tx_bytes_threshold; /**< switching threshold: # tx bytes */ 11881 uint32 txrx_bytes_threshold; /**< switching threshold: # (tx+rx) bytes */ 11882 } wl_pm2_sleep_ret_ext_t; 11883 11884 #define WL_DFRTS_LOGIC_OFF 0 /**< Feature is disabled */ 11885 #define WL_DFRTS_LOGIC_OR 1 /**< OR all non-zero threshold conditions */ 11886 #define WL_DFRTS_LOGIC_AND 2 /**< AND all non-zero threshold conditions */ 11887 11888 /* Values for the passive_on_restricted_mode iovar. When set to non-zero, this iovar 11889 * disables automatic conversions of a channel from passively scanned to 11890 * actively scanned. These values only have an effect for country codes such 11891 * as XZ where some 5 GHz channels are defined to be passively scanned. 11892 */ 11893 #define WL_PASSACTCONV_DISABLE_NONE 0 /**< Enable permanent and temporary conversions */ 11894 #define WL_PASSACTCONV_DISABLE_ALL 1 /**< Disable permanent and temporary conversions */ 11895 #define WL_PASSACTCONV_DISABLE_PERM 2 /**< Disable only permanent conversions */ 11896 11897 /* Definitions for Reliable Multicast */ 11898 #define WL_RMC_CNT_VERSION 1 11899 #define WL_RMC_TR_VERSION 1 11900 #define WL_RMC_MAX_CLIENT 32 11901 #define WL_RMC_FLAG_INBLACKLIST 1 11902 #define WL_RMC_FLAG_ACTIVEACKER 2 11903 #define WL_RMC_FLAG_RELMCAST 4 11904 #define WL_RMC_MAX_TABLE_ENTRY 4 11905 11906 #define WL_RMC_VER 1 11907 #define WL_RMC_INDEX_ACK_ALL 255 11908 #define WL_RMC_NUM_OF_MC_STREAMS 4 11909 #define WL_RMC_MAX_TRS_PER_GROUP 1 11910 #define WL_RMC_MAX_TRS_IN_ACKALL 1 11911 #define WL_RMC_ACK_MCAST0 0x02 11912 #define WL_RMC_ACK_MCAST_ALL 0x01 11913 #define WL_RMC_ACTF_TIME_MIN 300 /**< time in ms */ 11914 #define WL_RMC_ACTF_TIME_MAX 20000 /**< time in ms */ 11915 #define WL_RMC_MAX_NUM_TRS 32 /**< maximun transmitters allowed */ 11916 #define WL_RMC_ARTMO_MIN 350 /**< time in ms */ 11917 #define WL_RMC_ARTMO_MAX 40000 /**< time in ms */ 11918 11919 /* RMC events in action frames */ 11920 enum rmc_opcodes { 11921 RELMCAST_ENTRY_OP_DISABLE = 0, /**< Disable multi-cast group */ 11922 RELMCAST_ENTRY_OP_DELETE = 1, /**< Delete multi-cast group */ 11923 RELMCAST_ENTRY_OP_ENABLE = 2, /**< Enable multi-cast group */ 11924 RELMCAST_ENTRY_OP_ACK_ALL = 3 /**< Enable ACK ALL bit in AMT */ 11925 }; 11926 11927 /* RMC operational modes */ 11928 enum rmc_modes { 11929 WL_RMC_MODE_RECEIVER = 0, /**< Receiver mode by default */ 11930 WL_RMC_MODE_TRANSMITTER = 1, /**< Transmitter mode using wl ackreq */ 11931 WL_RMC_MODE_INITIATOR = 2 /**< Initiator mode using wl ackreq */ 11932 }; 11933 11934 /** Each RMC mcast client info */ 11935 typedef struct wl_relmcast_client { 11936 uint8 flag; /**< status of client such as AR, R, or blacklisted */ 11937 uint8 PAD; 11938 int16 rssi; /**< rssi value of RMC client */ 11939 struct ether_addr addr; /**< mac address of RMC client */ 11940 } wl_relmcast_client_t; 11941 11942 /** RMC Counters */ 11943 typedef struct wl_rmc_cnts { 11944 uint16 version; /**< see definition of WL_CNT_T_VERSION */ 11945 uint16 length; /**< length of entire structure */ 11946 uint16 dupcnt; /**< counter for duplicate rmc MPDU */ 11947 uint16 ackreq_err; /**< counter for wl ackreq error */ 11948 uint16 af_tx_err; /**< error count for action frame transmit */ 11949 uint16 null_tx_err; /**< error count for rmc null frame transmit */ 11950 uint16 af_unicast_tx_err; /**< error count for rmc unicast frame transmit */ 11951 uint16 mc_no_amt_slot; /**< No mcast AMT entry available */ 11952 /* Unused. Keep for rom compatibility */ 11953 uint16 mc_no_glb_slot; /**< No mcast entry available in global table */ 11954 uint16 mc_not_mirrored; /**< mcast group is not mirrored */ 11955 uint16 mc_existing_tr; /**< mcast group is already taken by transmitter */ 11956 uint16 mc_exist_in_amt; /**< mcast group is already programmed in amt */ 11957 /* Unused. Keep for rom compatibility */ 11958 uint16 mc_not_exist_in_gbl; /**< mcast group is not in global table */ 11959 uint16 mc_not_exist_in_amt; /**< mcast group is not in AMT table */ 11960 uint16 mc_utilized; /**< mcast addressed is already taken */ 11961 uint16 mc_taken_other_tr; /**< multi-cast addressed is already taken */ 11962 uint32 rmc_rx_frames_mac; /**< no of mc frames received from mac */ 11963 uint32 rmc_tx_frames_mac; /**< no of mc frames transmitted to mac */ 11964 uint32 mc_null_ar_cnt; /**< no. of times NULL AR is received */ 11965 uint32 mc_ar_role_selected; /**< no. of times took AR role */ 11966 uint32 mc_ar_role_deleted; /**< no. of times AR role cancelled */ 11967 uint32 mc_noacktimer_expired; /**< no. of times noack timer expired */ 11968 uint16 mc_no_wl_clk; /**< no wl clk detected when trying to access amt */ 11969 uint16 mc_tr_cnt_exceeded; /**< No of transmitters in the network exceeded */ 11970 } wl_rmc_cnts_t; 11971 11972 /** RMC Status */ 11973 typedef struct wl_relmcast_st { 11974 uint8 ver; /**< version of RMC */ 11975 uint8 num; /**< number of clients detected by transmitter */ 11976 wl_relmcast_client_t clients[WL_RMC_MAX_CLIENT]; 11977 uint16 err; /**< error status (used in infra) */ 11978 uint16 actf_time; /**< action frame time period */ 11979 } wl_relmcast_status_t; 11980 11981 /** Entry for each STA/node */ 11982 typedef struct wl_rmc_entry { 11983 /* operation on multi-cast entry such add, 11984 * delete, ack-all 11985 */ 11986 int8 flag; 11987 struct ether_addr addr; /**< multi-cast group mac address */ 11988 } wl_rmc_entry_t; 11989 11990 /** RMC table */ 11991 typedef struct wl_rmc_entry_table { 11992 uint8 index; /**< index to a particular mac entry in table */ 11993 uint8 opcode; /**< opcodes or operation on entry */ 11994 wl_rmc_entry_t entry[WL_RMC_MAX_TABLE_ENTRY]; 11995 } wl_rmc_entry_table_t; 11996 11997 typedef struct wl_rmc_trans_elem { 11998 struct ether_addr tr_mac; /**< transmitter mac */ 11999 struct ether_addr ar_mac; /**< ar mac */ 12000 uint16 artmo; /**< AR timeout */ 12001 uint8 amt_idx; /**< amt table entry */ 12002 uint8 PAD; 12003 uint16 flag; /**< entry will be acked, not acked, programmed, full etc */ 12004 } wl_rmc_trans_elem_t; 12005 12006 /** RMC transmitters */ 12007 typedef struct wl_rmc_trans_in_network { 12008 uint8 ver; /**< version of RMC */ 12009 uint8 num_tr; /**< number of transmitters in the network */ 12010 wl_rmc_trans_elem_t trs[WL_RMC_MAX_NUM_TRS]; 12011 } wl_rmc_trans_in_network_t; 12012 12013 /** To update vendor specific ie for RMC */ 12014 typedef struct wl_rmc_vsie { 12015 uint8 oui[DOT11_OUI_LEN]; 12016 uint8 PAD; 12017 uint16 payload; /**< IE Data Payload */ 12018 } wl_rmc_vsie_t; 12019 12020 /* structures & defines for proximity detection */ 12021 enum proxd_method { 12022 PROXD_UNDEFINED_METHOD = 0, 12023 PROXD_RSSI_METHOD = 1, 12024 PROXD_TOF_METHOD = 2 12025 }; 12026 12027 /* structures for proximity detection device role */ 12028 #define WL_PROXD_MODE_DISABLE 0 12029 #define WL_PROXD_MODE_NEUTRAL 1 12030 #define WL_PROXD_MODE_INITIATOR 2 12031 #define WL_PROXD_MODE_TARGET 3 12032 12033 #define WL_PROXD_ACTION_STOP 0 12034 #define WL_PROXD_ACTION_START 1 12035 12036 #define WL_PROXD_FLAG_TARGET_REPORT 0x1 12037 #define WL_PROXD_FLAG_REPORT_FAILURE 0x2 12038 #define WL_PROXD_FLAG_INITIATOR_REPORT 0x4 12039 #define WL_PROXD_FLAG_NOCHANSWT 0x8 12040 #define WL_PROXD_FLAG_NETRUAL 0x10 12041 #define WL_PROXD_FLAG_INITIATOR_RPTRTT 0x20 12042 #define WL_PROXD_FLAG_ONEWAY 0x40 12043 #define WL_PROXD_FLAG_SEQ_EN 0x80 12044 12045 #define WL_PROXD_SETFLAG_K 0x1 12046 #define WL_PROXD_SETFLAG_N 0x2 12047 #define WL_PROXD_SETFLAG_S 0x4 12048 12049 #define WL_PROXD_SETFLAG_K 0x1 12050 #define WL_PROXD_SETFLAG_N 0x2 12051 #define WL_PROXD_SETFLAG_S 0x4 12052 12053 #define WL_PROXD_RANDOM_WAKEUP 0x8000 12054 #define WL_PROXD_MAXREPORT 8 12055 12056 typedef struct wl_proxd_iovar { 12057 uint16 method; /**< Proximity Detection method */ 12058 uint16 mode; /**< Mode (neutral, initiator, target) */ 12059 } wl_proxd_iovar_t; 12060 12061 /* 12062 * structures for proximity detection parameters 12063 * consists of two parts, common and method specific params 12064 * common params should be placed at the beginning 12065 */ 12066 12067 typedef struct wl_proxd_params_common { 12068 chanspec_t chanspec; /**< channel spec */ 12069 int16 tx_power; /**< tx power of Proximity Detection(PD) frames (in dBm) */ 12070 uint16 tx_rate; /**< tx rate of PD rames (in 500kbps units) */ 12071 uint16 timeout; /**< timeout value */ 12072 uint16 interval; /**< interval between neighbor finding attempts (in TU) */ 12073 uint16 duration; /**< duration of neighbor finding attempts (in ms) */ 12074 } wl_proxd_params_common_t; 12075 12076 typedef struct wl_proxd_params_rssi_method { 12077 chanspec_t chanspec; /**< chanspec for home channel */ 12078 int16 tx_power; /**< tx power of Proximity Detection frames (in dBm) */ 12079 uint16 tx_rate; /**< tx rate of PD frames, 500kbps units */ 12080 uint16 timeout; /**< state machine wait timeout of the frames (in ms) */ 12081 uint16 interval; /**< interval between neighbor finding attempts (in TU) */ 12082 uint16 duration; /**< duration of neighbor finding attempts (in ms) */ 12083 /* method specific ones go after this line */ 12084 int16 rssi_thresh; /**< RSSI threshold (in dBm) */ 12085 uint16 maxconvergtmo; /**< max wait converge timeout (in ms) */ 12086 } wl_proxd_params_rssi_method_t; 12087 12088 #define Q1_NS 25 /**< Q1 time units */ 12089 12090 /* Number of bandwidth that the TOF can support */ 12091 #define TOF_BW_NUM 3 12092 /* Number of total index including seq tx/rx idx */ 12093 #define TOF_BW_SEQ_NUM 5 12094 12095 enum tof_bw_index { 12096 TOF_BW_20MHZ_INDEX = 0, 12097 TOF_BW_40MHZ_INDEX = 1, 12098 TOF_BW_80MHZ_INDEX = 2, 12099 TOF_BW_SEQTX_INDEX = 3, 12100 TOF_BW_SEQRX_INDEX = 4 12101 }; 12102 12103 /* 12104 * Version 2 of above bw defines 12105 * and enum tof_bw_index, 12106 * with advent of 160 MHz 12107 */ 12108 #define TOF_BW_NUM_V2 4u 12109 #define TOF_BW_SEQ_NUM_V2 6u 12110 12111 enum tof_bw_index_v2 { 12112 TOF_BW_20MHZ_INDEX_V2 = 0, 12113 TOF_BW_40MHZ_INDEX_V2 = 1, 12114 TOF_BW_80MHZ_INDEX_V2 = 2, 12115 TOF_BW_160MHZ_INDEX_V2 = 3, 12116 TOF_BW_SEQTX_INDEX_V2 = 4, 12117 TOF_BW_SEQRX_INDEX_V2 = 5 12118 }; 12119 12120 #define BANDWIDTH_BASE 20 /**< base value of bandwidth */ 12121 #define TOF_BW_20MHZ (BANDWIDTH_BASE << TOF_BW_20MHZ_INDEX_V2) 12122 #define TOF_BW_40MHZ (BANDWIDTH_BASE << TOF_BW_40MHZ_INDEX_V2) 12123 #define TOF_BW_80MHZ (BANDWIDTH_BASE << TOF_BW_80MHZ_INDEX_V2) 12124 #define TOF_BW_160MHZ (BANDWIDTH_BASE << TOF_BW_160MHZ_INDEX_V2) 12125 12126 #define TOF_BW_10MHZ 10 12127 12128 #define NFFT_BASE 64 /**< base size of fft */ 12129 #define TOF_NFFT_20MHZ (NFFT_BASE << TOF_BW_20MHZ_INDEX_V2) 12130 #define TOF_NFFT_40MHZ (NFFT_BASE << TOF_BW_40MHZ_INDEX_V2) 12131 #define TOF_NFFT_80MHZ (NFFT_BASE << TOF_BW_80MHZ_INDEX_V2) 12132 #define TOF_NFFT_160MHZ (NFFT_BASE << TOF_BW_160MHZ_INDEX_V2) 12133 12134 typedef struct wl_proxd_params_tof_method { 12135 chanspec_t chanspec; /**< chanspec for home channel */ 12136 int16 tx_power; /**< tx power of Proximity Detection(PD) frames (in dBm) */ 12137 uint16 tx_rate; /**< tx rate of PD rames (in 500kbps units) */ 12138 uint16 timeout; /**< state machine wait timeout of the frames (in ms) */ 12139 uint16 interval; /**< interval between neighbor finding attempts (in TU) */ 12140 uint16 duration; /**< duration of neighbor finding attempts (in ms) */ 12141 /* specific for the method go after this line */ 12142 struct ether_addr tgt_mac; /**< target mac addr for TOF method */ 12143 uint16 ftm_cnt; /**< number of the frames txed by initiator */ 12144 uint16 retry_cnt; /**< number of retransmit attampts for ftm frames */ 12145 int16 vht_rate; /**< ht or vht rate */ 12146 /* add more params required for other methods can be added here */ 12147 } wl_proxd_params_tof_method_t; 12148 12149 typedef struct wl_proxd_seq_config 12150 { 12151 int16 N_tx_log2; 12152 int16 N_rx_log2; 12153 int16 N_tx_scale; 12154 int16 N_rx_scale; 12155 int16 w_len; 12156 int16 w_offset; 12157 } wl_proxd_seq_config_t; 12158 12159 #define WL_PROXD_TUNE_VERSION_1 1 12160 #define WL_PROXD_TUNE_VERSION_2 2 12161 #include <packed_section_start.h> 12162 /* For legacy ranging target (e.g. 43430, 43342) */ 12163 typedef BWL_PRE_PACKED_STRUCT struct wl_proxd_params_tof_tune_v1 { 12164 uint32 version; 12165 uint32 Ki; /**< h/w delay K factor for initiator */ 12166 uint32 Kt; /**< h/w delay K factor for target */ 12167 int16 vhtack; /**< enable/disable VHT ACK */ 12168 int16 N_log2[TOF_BW_SEQ_NUM]; /**< simple threshold crossing */ 12169 int16 w_offset[TOF_BW_NUM]; /**< offset of threshold crossing window(per BW) */ 12170 int16 w_len[TOF_BW_NUM]; /**< length of threshold crossing window(per BW) */ 12171 int32 maxDT; /**< max time difference of T4/T1 or T3/T2 */ 12172 int32 minDT; /**< min time difference of T4/T1 or T3/T2 */ 12173 uint8 totalfrmcnt; /**< total count of transfered measurement frames */ 12174 uint16 rsv_media; /**< reserve media value for TOF */ 12175 uint32 flags; /**< flags */ 12176 uint8 core; /**< core to use for tx */ 12177 uint8 setflags; /* set flags of K, N. S values */ 12178 int16 N_scale[TOF_BW_SEQ_NUM]; /**< simple threshold crossing */ 12179 uint8 sw_adj; /**< enable sw assisted timestamp adjustment */ 12180 uint8 hw_adj; /**< enable hw assisted timestamp adjustment */ 12181 uint8 seq_en; /**< enable ranging sequence */ 12182 uint8 ftm_cnt[TOF_BW_SEQ_NUM]; /**< number of ftm frames based on bandwidth */ 12183 int16 N_log2_2g; /**< simple threshold crossing for 2g channel */ 12184 int16 N_scale_2g; /**< simple threshold crossing for 2g channel */ 12185 wl_proxd_seq_config_t seq_5g20; 12186 wl_proxd_seq_config_t seq_2g20; /* Thresh crossing params for 2G Sequence */ 12187 uint16 bitflip_thresh; /* bitflip threshold */ 12188 uint16 snr_thresh; /* SNR threshold */ 12189 int8 recv_2g_thresh; /* 2g recieve sensitivity threshold */ 12190 uint32 acs_gdv_thresh; 12191 int8 acs_rssi_thresh; 12192 uint8 smooth_win_en; 12193 int32 emu_delay; 12194 } BWL_POST_PACKED_STRUCT wl_proxd_params_tof_tune_v1_t; 12195 #include <packed_section_end.h> 12196 12197 #include <packed_section_start.h> 12198 /* For legacy ranging initiator (including 4364) */ 12199 typedef BWL_PRE_PACKED_STRUCT struct wl_proxd_params_tof_tune_v2 { 12200 uint32 version; 12201 uint32 Ki; /**< h/w delay K factor for initiator */ 12202 uint32 Kt; /**< h/w delay K factor for target */ 12203 int16 vhtack; /**< enable/disable VHT ACK */ 12204 int16 N_log2[TOF_BW_SEQ_NUM]; /**< simple threshold crossing */ 12205 int16 w_offset[TOF_BW_NUM]; /**< offset of threshold crossing window(per BW) */ 12206 int16 w_len[TOF_BW_NUM]; /**< length of threshold crossing window(per BW) */ 12207 int32 maxDT; /**< max time difference of T4/T1 or T3/T2 */ 12208 int32 minDT; /**< min time difference of T4/T1 or T3/T2 */ 12209 uint8 totalfrmcnt; /**< total count of transfered measurement frames */ 12210 uint16 rsv_media; /**< reserve media value for TOF */ 12211 uint32 flags; /**< flags */ 12212 uint8 core; /**< core to use for tx */ 12213 uint8 setflags; /* set flags of K, N. S values */ 12214 int16 N_scale[TOF_BW_SEQ_NUM]; /**< simple threshold crossing */ 12215 uint8 sw_adj; /**< enable sw assisted timestamp adjustment */ 12216 uint8 hw_adj; /**< enable hw assisted timestamp adjustment */ 12217 uint8 seq_en; /**< enable ranging sequence */ 12218 uint8 ftm_cnt[TOF_BW_SEQ_NUM]; /**< number of ftm frames based on bandwidth */ 12219 int16 N_log2_2g; /**< simple threshold crossing for 2g channel */ 12220 int16 N_scale_2g; /**< simple threshold crossing for 2g channel */ 12221 wl_proxd_seq_config_t seq_5g20; 12222 wl_proxd_seq_config_t seq_2g20; /* Thresh crossing params for 2G Sequence */ 12223 uint16 bitflip_thresh; /* bitflip threshold */ 12224 uint16 snr_thresh; /* SNR threshold */ 12225 int8 recv_2g_thresh; /* 2g recieve sensitivity threshold */ 12226 uint32 acs_gdv_thresh; 12227 int8 acs_rssi_thresh; 12228 uint8 smooth_win_en; 12229 int32 acs_gdmm_thresh; 12230 int8 acs_delta_rssi_thresh; 12231 int32 emu_delay; 12232 uint8 core_mask; /* core mask selection */ 12233 } BWL_POST_PACKED_STRUCT wl_proxd_params_tof_tune_v2_t; 12234 #include <packed_section_end.h> 12235 12236 #define WL_PROXD_TUNE_VERSION_3 3 12237 /* Future ranging support */ 12238 typedef struct wl_proxd_params_tof_tune_v3 { 12239 uint16 version; 12240 uint16 len; 12241 uint32 Ki; /**< h/w delay K factor for initiator */ 12242 uint32 Kt; /**< h/w delay K factor for target */ 12243 int16 vhtack; /**< enable/disable VHT ACK */ 12244 uint16 PAD; 12245 int16 N_log2[TOF_BW_SEQ_NUM]; /**< simple threshold crossing */ 12246 uint16 PAD; 12247 int16 w_offset[TOF_BW_NUM]; /**< offset of threshold crossing window(per BW) */ 12248 uint16 PAD; 12249 int16 w_len[TOF_BW_NUM]; /**< length of threshold crossing window(per BW) */ 12250 uint16 PAD; 12251 int32 maxDT; /**< max time difference of T4/T1 or T3/T2 */ 12252 int32 minDT; /**< min time difference of T4/T1 or T3/T2 */ 12253 uint8 totalfrmcnt; /**< total count of transfered measurement frames */ 12254 uint8 PAD[3]; 12255 uint16 rsv_media; /**< reserve media value for TOF */ 12256 uint16 PAD; 12257 uint32 flags; /**< flags */ 12258 uint8 core; /**< core to use for tx */ 12259 uint8 setflags; /* set flags of K, N. S values */ 12260 uint16 PAD; 12261 int16 N_scale[TOF_BW_SEQ_NUM]; /**< simple threshold crossing */ 12262 uint8 sw_adj; /**< enable sw assisted timestamp adjustment */ 12263 uint8 hw_adj; /**< enable hw assisted timestamp adjustment */ 12264 uint8 seq_en; /**< enable ranging sequence */ 12265 uint8 PAD[3]; 12266 uint8 ftm_cnt[TOF_BW_SEQ_NUM]; /**< number of ftm frames based on bandwidth */ 12267 uint8 PAD[3]; 12268 int16 N_log2_2g; /**< simple threshold crossing for 2g channel */ 12269 int16 N_scale_2g; /**< simple threshold crossing for 2g channel */ 12270 wl_proxd_seq_config_t seq_5g20; 12271 wl_proxd_seq_config_t seq_2g20; /* Thresh crossing params for 2G Sequence */ 12272 uint16 bitflip_thresh; /* bitflip threshold */ 12273 uint16 snr_thresh; /* SNR threshold */ 12274 int8 recv_2g_thresh; /* 2g recieve sensitivity threshold */ 12275 uint8 PAD[3]; 12276 uint32 acs_gdv_thresh; 12277 int8 acs_rssi_thresh; 12278 uint8 smooth_win_en; 12279 uint16 PAD; 12280 int32 acs_gdmm_thresh; 12281 int8 acs_delta_rssi_thresh; 12282 uint8 PAD[3]; 12283 int32 emu_delay; 12284 uint8 core_mask; /* core mask selection */ 12285 uint8 PAD[3]; 12286 } wl_proxd_params_tof_tune_v3_t; 12287 12288 /* 12289 * tof tune with 160 MHz support 12290 */ 12291 #define WL_PROXD_TUNE_VERSION_4 4u 12292 typedef struct wl_proxd_params_tof_tune_v4 { 12293 uint16 version; 12294 uint16 len; 12295 uint8 core; /**< core to use for tx */ 12296 uint8 setflags; /* set flags of K, N. S values */ 12297 uint8 totalfrmcnt; /**< total count of transfered measurement frames */ 12298 uint8 sw_adj; /**< enable sw assisted timestamp adjustment */ 12299 uint8 hw_adj; /**< enable hw assisted timestamp adjustment */ 12300 uint8 seq_en; /**< enable ranging sequence */ 12301 uint8 smooth_win_en; 12302 uint8 core_mask; /* core mask selection */ 12303 int8 recv_2g_thresh; /* 2g recieve sensitivity threshold */ 12304 int8 acs_rssi_thresh; 12305 int8 acs_delta_rssi_thresh; 12306 uint8 ftm_cnt[TOF_BW_SEQ_NUM_V2]; /**< no. of ftm frames based on bw */ 12307 uint8 PAD[3]; /* Use this for any int8/16 uint8/16 ext in future */ 12308 uint16 rsv_media; /**< reserve media value for TOF */ 12309 uint16 bitflip_thresh; /* bitflip threshold */ 12310 uint16 snr_thresh; /* SNR threshold */ 12311 int16 vhtack; /**< enable/disable VHT ACK */ 12312 int16 N_log2_2g; /**< simple threshold crossing for 2g channel */ 12313 int16 N_scale_2g; /**< simple threshold crossing for 2g channel */ 12314 int16 N_log2[TOF_BW_SEQ_NUM_V2]; /**< simple threshold crossing */ 12315 int16 w_offset[TOF_BW_NUM_V2]; /**< offset of thresh crossing window(per BW) */ 12316 int16 w_len[TOF_BW_NUM_V2]; /**< length of thresh crossing window(per BW) */ 12317 int16 N_scale[TOF_BW_SEQ_NUM_V2]; /**< simple threshold crossing */ 12318 uint32 Ki; /**< h/w delay K factor for initiator */ 12319 uint32 Kt; /**< h/w delay K factor for target */ 12320 uint32 flags; /**< flags */ 12321 uint32 acs_gdv_thresh; 12322 int32 maxDT; /**< max time difference of T4/T1 or T3/T2 */ 12323 int32 minDT; /**< min time difference of T4/T1 or T3/T2 */ 12324 int32 acs_gdmm_thresh; 12325 int32 emu_delay; 12326 wl_proxd_seq_config_t seq_5g20; /* Thresh crossing params for 2G Sequence */ 12327 wl_proxd_seq_config_t seq_2g20; /* Thresh crossing params for 2G Sequence */ 12328 } wl_proxd_params_tof_tune_v4_t; 12329 12330 typedef struct wl_proxd_params_iovar { 12331 uint16 method; /**< Proximity Detection method */ 12332 uint8 PAD[2]; 12333 union { 12334 /* common params for pdsvc */ 12335 wl_proxd_params_common_t cmn_params; /**< common parameters */ 12336 /* method specific */ 12337 wl_proxd_params_rssi_method_t rssi_params; /**< RSSI method parameters */ 12338 wl_proxd_params_tof_method_t tof_params; /**< TOF method parameters */ 12339 /* tune parameters */ 12340 wl_proxd_params_tof_tune_v3_t tof_tune; /**< TOF tune parameters */ 12341 } u; /**< Method specific optional parameters */ 12342 } wl_proxd_params_iovar_t; 12343 12344 /* 12345 * proxd param iov with 160 MHz support 12346 */ 12347 #define WL_PROXD_IOVAR_VERSION_2 2u 12348 typedef struct wl_proxd_params_iovar_v2 { 12349 uint16 version; 12350 uint16 len; 12351 uint16 method; /**< Proximity Detection method */ 12352 uint16 PAD; 12353 union { 12354 /* common params for pdsvc */ 12355 wl_proxd_params_common_t cmn_params; /**< common parameters */ 12356 /* method specific */ 12357 wl_proxd_params_rssi_method_t rssi_params; /**< RSSI method parameters */ 12358 wl_proxd_params_tof_method_t tof_params; /**< TOF method parameters */ 12359 /* tune parameters */ 12360 wl_proxd_params_tof_tune_v4_t tof_tune; /**< TOF tune parameters */ 12361 } u; /**< Method specific optional parameters */ 12362 uint8 tlv_params[]; /* xtlvs for variable ext params */ 12363 } wl_proxd_params_iovar_v2_t; 12364 12365 #define PROXD_COLLECT_GET_STATUS 0 12366 #define PROXD_COLLECT_SET_STATUS 1 12367 #define PROXD_COLLECT_QUERY_HEADER 2 12368 #define PROXD_COLLECT_QUERY_DATA 3 12369 #define PROXD_COLLECT_QUERY_DEBUG 4 12370 #define PROXD_COLLECT_REMOTE_REQUEST 5 12371 #define PROXD_COLLECT_DONE 6 12372 12373 typedef enum { 12374 WL_PROXD_COLLECT_METHOD_TYPE_DISABLE = 0x0, 12375 WL_PROXD_COLLECT_METHOD_TYPE_IOVAR = 0x1, 12376 WL_PROXD_COLLECT_METHOD_TYPE_EVENT = 0x2, 12377 WL_PROXD_COLLECT_METHOD_TYPE_EVENT_LOG = 0x4 12378 } wl_proxd_collect_method_type_t; 12379 12380 typedef uint16 wl_proxd_collect_method_t; /* query status: method to send proxd collect */ 12381 12382 #include <packed_section_start.h> 12383 typedef BWL_PRE_PACKED_STRUCT struct wl_proxd_collect_query { 12384 uint32 method; /**< method */ 12385 uint8 request; /**< Query request. */ 12386 uint8 status; /**< bitmask 0 -- disable, 0x1 -- enable collection, */ 12387 /* 0x2 -- Use generic event, 0x4 -- use event log */ 12388 uint16 index; /**< The current frame index [0 to total_frames - 1]. */ 12389 uint16 mode; /**< Initiator or Target */ 12390 uint8 busy; /**< tof sm is busy */ 12391 uint8 remote; /**< Remote collect data */ 12392 } BWL_POST_PACKED_STRUCT wl_proxd_collect_query_t; 12393 #include <packed_section_end.h> 12394 12395 #include <packed_section_start.h> 12396 typedef BWL_PRE_PACKED_STRUCT struct wl_proxd_collect_header { 12397 uint16 total_frames; /**< The total frames for this collect. */ 12398 uint16 nfft; /**< nfft value */ 12399 uint16 bandwidth; /**< bandwidth */ 12400 uint16 channel; /**< channel number */ 12401 uint32 chanspec; /**< channel spec */ 12402 uint32 fpfactor; /**< avb timer value factor */ 12403 uint16 fpfactor_shift; /**< avb timer value shift bits */ 12404 int32 distance; /**< distance calculated by fw */ 12405 uint32 meanrtt; /**< mean of RTTs */ 12406 uint32 modertt; /**< mode of RTTs */ 12407 uint32 medianrtt; /**< median of RTTs */ 12408 uint32 sdrtt; /**< standard deviation of RTTs */ 12409 uint32 clkdivisor; /**< clock divisor */ 12410 uint16 chipnum; /**< chip type */ 12411 uint8 chiprev; /**< chip revision */ 12412 uint8 phyver; /**< phy version */ 12413 struct ether_addr localMacAddr; /**< local mac address */ 12414 struct ether_addr remoteMacAddr; /**< remote mac address */ 12415 wl_proxd_params_tof_tune_v3_t params; 12416 } BWL_POST_PACKED_STRUCT wl_proxd_collect_header_t; 12417 #include <packed_section_end.h> 12418 12419 /* 12420 * proxd collect header with 160 MHz support 12421 */ 12422 #define WL_PROXD_COLLECT_HEADER_VERSION_2 2u 12423 typedef struct wl_proxd_collect_header_v2 { 12424 uint16 version; 12425 uint16 len; 12426 uint8 chiprev; /**< chip revision */ 12427 uint8 phyver; /**< phy version */ 12428 uint8 PAD[2]; /* Use this for any int8/16 uint8/16 ext in future */ 12429 uint16 total_frames; /**< The total frames for this collect. */ 12430 uint16 nfft; /**< nfft value */ 12431 uint16 bandwidth; /**< bandwidth */ 12432 uint16 channel; /**< channel number */ 12433 uint16 fpfactor_shift; /**< avb timer value shift bits */ 12434 uint16 chipnum; /**< chip type */ 12435 uint32 chanspec; /**< channel spec */ 12436 uint32 fpfactor; /**< avb timer value factor */ 12437 uint32 meanrtt; /**< mean of RTTs */ 12438 uint32 modertt; /**< mode of RTTs */ 12439 uint32 medianrtt; /**< median of RTTs */ 12440 uint32 sdrtt; /**< standard deviation of RTTs */ 12441 uint32 clkdivisor; /**< clock divisor */ 12442 int32 distance; /**< distance calculated by fw */ 12443 struct ether_addr localMacAddr; /**< local mac address */ 12444 uint16 PAD; /* Use this for any int8/16 uint8/16 ext in future */ 12445 struct ether_addr remoteMacAddr; /**< remote mac address */ 12446 uint16 PAD; /* Use this for any int8/16 uint8/16 ext in future */ 12447 wl_proxd_params_tof_tune_v4_t params; /* TOF tune params */ 12448 uint8 tlv_params[]; /* xtlvs for variable ext params */ 12449 } wl_proxd_collect_header_v2_t; 12450 12451 /* ifdef WL_NAN */ 12452 /* ********************** NAN wl interface struct types and defs ******************** */ 12453 /* 12454 * Uses new common IOVAR batch processing mechanism 12455 */ 12456 12457 /* 12458 * NAN config control 12459 * Bits 0 - 23 can be set by host 12460 * Bits 24 - 31 - Internal use for firmware, host cannot set it 12461 */ 12462 12463 /* 12464 * Bit 0 : If set to 1, means event uses nan bsscfg, 12465 * otherwise uses infra bsscfg. Default is using infra bsscfg 12466 */ 12467 #define WL_NAN_CTRL_ROUTE_EVENT_VIA_NAN_BSSCFG 0x000001 12468 /* If set, discovery beacons are transmitted on 2G band */ 12469 #define WL_NAN_CTRL_DISC_BEACON_TX_2G 0x000002 12470 /* If set, sync beacons are transmitted on 2G band */ 12471 #define WL_NAN_CTRL_SYNC_BEACON_TX_2G 0x000004 12472 /* If set, discovery beacons are transmitted on 5G band */ 12473 #define WL_NAN_CTRL_DISC_BEACON_TX_5G 0x000008 12474 /* If set, sync beacons are transmitted on 5G band */ 12475 #define WL_NAN_CTRL_SYNC_BEACON_TX_5G 0x000010 12476 /* If set, auto datapath responses will be sent by FW */ 12477 #define WL_NAN_CTRL_AUTO_DPRESP 0x000020 12478 /* If set, auto datapath confirms will be sent by FW */ 12479 #define WL_NAN_CTRL_AUTO_DPCONF 0x000040 12480 /* If set, auto schedule responses will be sent by FW */ 12481 #define WL_NAN_CTRL_AUTO_SCHEDRESP 0x000080 12482 /* If set, auto schedule confirms will be sent by FW */ 12483 #define WL_NAN_CTRL_AUTO_SCHEDCONF 0x000100 12484 /* If set, proprietary rates are supported by FW */ 12485 #define WL_NAN_CTRL_PROP_RATE 0x000200 12486 /* If set, service awake_dw overrides global dev awake_dw */ 12487 #define WL_NAN_CTRL_SVC_OVERRIDE_DEV_AWAKE_DW 0x000400 12488 /* If set, merge scan will be disabled */ 12489 #define WL_NAN_CTRL_SCAN_DISABLE 0x000800 12490 /* If set, power save will be disabled */ 12491 #define WL_NAN_CTRL_POWER_SAVE_DISABLE 0x001000 12492 /* If set, device will merge to configured CID only */ 12493 #define WL_NAN_CTRL_MERGE_CONF_CID_ONLY 0x002000 12494 /* If set, 5g core will be brought down in single band NAN */ 12495 #define WL_NAN_CTRL_5G_SLICE_POWER_OPT 0x004000 12496 #define WL_NAN_CTRL_DUMP_HEAP 0x008000 12497 /* If set, host generates and assign ndp id for ndp sessions */ 12498 #define WL_NAN_CTRL_HOST_GEN_NDPID 0x010000 12499 /* If set, nan ndp inactivity watchdog will be activated */ 12500 #define WL_NAN_CTRL_DELETE_INACTIVE_PEERS 0x020000 12501 /* If set, nan assoc coex will be activated */ 12502 #define WL_NAN_CTRL_INFRA_ASSOC_COEX 0x040000 12503 /* If set, dam will accept all NDP/RNG request from the peer including counter */ 12504 #define WL_NAN_CTRL_DAM_ACCEPT_ALL 0x080000 12505 /* If set, nan mac ignores role for tx discovery beacon for periodic config */ 12506 #define WL_NAN_CTRL_FASTDISC_IGNO_ROLE 0x100000 12507 /* If set, include NA in NAN beacons (disc beacons for now) */ 12508 #define WL_NAN_CTRL_INCL_NA_IN_BCNS 0x200000 12509 /* If set, host assist will be enabled */ 12510 #define WL_NAN_CTRL_HOST_ASSIST 0x400000 12511 /* If set, host configures NDI associated with the service */ 12512 #define WL_NAN_CTRL_HOST_CFG_SVC_NDI 0x800000 12513 12514 /* Value when all host-configurable bits set */ 12515 #define WL_NAN_CTRL_MAX_MASK 0xFFFFFF 12516 #define WL_NAN_CFG_CTRL_FW_BITS 8 12517 12518 /* Last 8-bits are firmware controlled bits. 12519 * Bit 31: 12520 * If set - indicates that NAN initialization is successful 12521 * Bit 30: 12522 * If set - indicates that NAN MAC cfg creation is successful 12523 * 12524 * NOTE: These are only ready-only bits for host. 12525 * All sets to these bits from host are masked off 12526 */ 12527 #define WL_NAN_PROTO_INIT_DONE (1u << 31u) 12528 #define WL_NAN_CFG_CREATE_DONE (1u << 30u) 12529 12530 #define WL_NAN_GET_PROTO_INIT_STATUS(x) \ 12531 (((x) & WL_NAN_PROTO_INIT_DONE) ? TRUE:FALSE) 12532 #define WL_NAN_CLEAR_PROTO_INIT_STATUS(x) \ 12533 ((x) &= ~WL_NAN_PROTO_INIT_DONE) 12534 #define WL_NAN_SET_PROTO_INIT_STATUS(x) \ 12535 ((x) |= (WL_NAN_PROTO_INIT_DONE)) 12536 12537 #define WL_NAN_GET_CFG_CREATE_STATUS(x) \ 12538 (((x) & WL_NAN_CFG_CREATE_DONE) ? TRUE:FALSE) 12539 #define WL_NAN_CLEAR_CFG_CREATE_STATUS(x) \ 12540 ((x) &= ~WL_NAN_CFG_CREATE_DONE) 12541 #define WL_NAN_SET_CFG_CREATE_STATUS(x) \ 12542 ((x) |= (WL_NAN_CFG_CREATE_DONE)) 12543 12544 #define WL_NAN_IOCTL_VERSION 0x2 12545 /* < some sufficient ioc buff size for our module */ 12546 #define WL_NAN_IOC_BUFSZ 256 12547 /* some sufficient ioc buff size for dump commands */ 12548 #define WL_NAN_IOC_BUFSZ_EXT 1024 12549 #define WL_NAN_MAX_SIDS_IN_BEACONS 127 /* Max allowed SIDs */ 12550 #define WL_NAN_MASTER_RANK_LEN 8 12551 #define WL_NAN_RANGE_LIMITED 0x0040 /* Publish/Subscribe flags */ 12552 12553 /** The service hash (service id) is exactly this many bytes. */ 12554 #define WL_NAN_SVC_HASH_LEN 6 12555 #define WL_NAN_HASHES_PER_BLOOM 4 /** Number of hash functions per bloom filter */ 12556 12557 /* no. of max last disc results */ 12558 #define WL_NAN_MAX_DISC_RESULTS 3 12559 12560 /* Max len of Rx and Tx filters */ 12561 #define WL_NAN_MAX_SVC_MATCH_FILTER_LEN 255 12562 12563 /* Max service name len */ 12564 #define WL_NAN_MAX_SVC_NAME_LEN 32 12565 12566 /* Type of Data path connection */ 12567 #define WL_NAN_DP_TYPE_UNICAST 0 12568 #define WL_NAN_DP_TYPE_MULTICAST 1 12569 12570 /* MAX security params length PMK field */ 12571 #define WL_NAN_NCS_SK_PMK_LEN 32 12572 12573 /* Post disc attr ID type */ 12574 typedef uint8 wl_nan_post_disc_attr_id_t; 12575 12576 /* 12577 * Component IDs 12578 */ 12579 typedef enum { 12580 WL_NAN_COMPID_CONFIG = 1, 12581 WL_NAN_COMPID_ELECTION = 2, 12582 WL_NAN_COMPID_SD = 3, 12583 WL_NAN_COMPID_TIMESYNC = 4, 12584 WL_NAN_COMPID_DATA_PATH = 5, 12585 WL_NAN_COMPID_DEBUG = 15 /* Keep this at the end */ 12586 } wl_nan_comp_id_t; 12587 12588 #define WL_NAN_COMP_SHIFT 8 12589 #define WL_NAN_COMP_MASK(_c) (0x0F & ((uint8)(_c))) 12590 #define WL_NAN_COMP_ID(_c) (WL_NAN_COMP_MASK(_c) << WL_NAN_COMP_SHIFT) 12591 12592 /* NAN Events */ 12593 12594 /** Instance ID type (unique identifier) */ 12595 typedef uint8 wl_nan_instance_id_t; 12596 12597 /* Publish sent for a subscribe */ 12598 /* WL_NAN_EVENT_REPLIED */ 12599 12600 typedef struct wl_nan_ev_replied { 12601 struct ether_addr sub_mac; /* Subscriber MAC */ 12602 wl_nan_instance_id_t pub_id; /* Publisher Instance ID */ 12603 uint8 sub_id; /* Subscriber ID */ 12604 int8 sub_rssi; /* Subscriber RSSI */ 12605 uint8 pad[3]; 12606 } wl_nan_ev_replied_t; 12607 12608 typedef struct wl_nan_event_replied { 12609 struct ether_addr sub_mac; /* Subscriber MAC */ 12610 wl_nan_instance_id_t pub_id; /* Publisher Instance ID */ 12611 uint8 sub_id; /* Subscriber ID */ 12612 int8 sub_rssi; /* Subscriber RSSI */ 12613 uint8 attr_num; 12614 uint16 attr_list_len; /* sizeof attributes attached to payload */ 12615 uint8 attr_list[0]; /* attributes payload */ 12616 } wl_nan_event_replied_t; 12617 12618 /* NAN Tx status of transmitted frames */ 12619 #define WL_NAN_TXS_FAILURE 0 12620 #define WL_NAN_TXS_SUCCESS 1 12621 12622 /* NAN frame types */ 12623 enum wl_nan_frame_type { 12624 /* discovery frame types */ 12625 WL_NAN_FRM_TYPE_PUBLISH = 1, 12626 WL_NAN_FRM_TYPE_SUBSCRIBE = 2, 12627 WL_NAN_FRM_TYPE_FOLLOWUP = 3, 12628 12629 /* datapath frame types */ 12630 WL_NAN_FRM_TYPE_DP_REQ = 4, 12631 WL_NAN_FRM_TYPE_DP_RESP = 5, 12632 WL_NAN_FRM_TYPE_DP_CONF = 6, 12633 WL_NAN_FRM_TYPE_DP_INSTALL = 7, 12634 WL_NAN_FRM_TYPE_DP_END = 8, 12635 12636 /* schedule frame types */ 12637 WL_NAN_FRM_TYPE_SCHED_REQ = 9, 12638 WL_NAN_FRM_TYPE_SCHED_RESP = 10, 12639 WL_NAN_FRM_TYPE_SCHED_CONF = 11, 12640 WL_NAN_FRM_TYPE_SCHED_UPD = 12, 12641 12642 /* ranging frame types */ 12643 WL_NAN_FRM_TYPE_RNG_REQ = 13, 12644 WL_NAN_FRM_TYPE_RNG_RESP = 14, 12645 WL_NAN_FRM_TYPE_RNG_TERM = 15, 12646 WL_NAN_FRM_TYPE_RNG_REPORT = 16, 12647 12648 WL_NAN_FRM_TYPE_UNSOLICIT_SDF = 17, 12649 WL_NAN_FRM_TYPE_INVALID 12650 }; 12651 typedef uint8 wl_nan_frame_type_t; 12652 12653 /* NAN Reason codes for tx status */ 12654 enum wl_nan_txs_reason_codes { 12655 WL_NAN_REASON_SUCCESS = 1, /* NAN status success */ 12656 WL_NAN_REASON_TIME_OUT = 2, /* timeout reached */ 12657 WL_NAN_REASON_DROPPED = 3, /* pkt dropped due to internal failure */ 12658 WL_NAN_REASON_MAX_RETRIES_DONE = 4 /* Max retries exceeded */ 12659 }; 12660 12661 /* For NAN TX status */ 12662 typedef struct wl_nan_event_txs { 12663 uint8 status; /* For TX status, success or failure */ 12664 uint8 reason_code; /* to identify reason when status is failure */ 12665 uint16 host_seq; /* seq num to keep track of pkts sent by host */ 12666 uint8 type; /* wl_nan_frame_type_t */ 12667 uint8 pad; 12668 uint16 opt_tlvs_len; 12669 uint8 opt_tlvs[]; 12670 } wl_nan_event_txs_t; 12671 12672 /* SD transmit pkt's event status is sent as optional tlv in wl_nan_event_txs_t */ 12673 typedef struct wl_nan_event_sd_txs { 12674 uint8 inst_id; /* Publish or subscribe instance id */ 12675 uint8 req_id; /* Requestor instance id */ 12676 } wl_nan_event_sd_txs_t; 12677 12678 /* nanho fsm tlv WL_NAN_XTLV_NANHO_OOB_TXS(0x0b0a) */ 12679 typedef struct wl_nan_event_nanho_txs { 12680 uint32 fsm_id; /* nho fsm id */ 12681 uint16 seq_id; /* nho seq id */ 12682 uint16 pad; 12683 } wl_nan_event_nanho_txs_t; 12684 12685 /* Subscribe or Publish instance Terminated */ 12686 12687 /* WL_NAN_EVENT_TERMINATED */ 12688 12689 #define NAN_SD_TERM_REASON_TIMEOUT 1 12690 #define NAN_SD_TERM_REASON_HOSTREQ 2 12691 #define NAN_SD_TERM_REASON_FWTERM 3 12692 #define NAN_SD_TERM_REASON_FAIL 4 12693 12694 typedef struct wl_nan_ev_terminated { 12695 uint8 instance_id; /* publish / subscribe instance id */ 12696 uint8 reason; /* 1=timeout, 2=Host/IOVAR, 3=FW Terminated 4=Failure */ 12697 uint8 svctype; /* 0 - Publish, 0x1 - Subscribe */ 12698 uint8 pad; /* Align */ 12699 uint32 tx_cnt; /* Number of SDFs sent */ 12700 } wl_nan_ev_terminated_t; 12701 12702 /* Follow up received against a pub / subscr */ 12703 /* WL_NAN_EVENT_RECEIVE */ 12704 12705 typedef struct wl_nan_ev_receive { 12706 struct ether_addr remote_addr; /* Peer NAN device MAC */ 12707 uint8 local_id; /* Local subscribe or publish ID */ 12708 uint8 remote_id; /* Remote subscribe or publish ID */ 12709 int8 fup_rssi; 12710 uint8 attr_num; 12711 uint16 attr_list_len; /* sizeof attributes attached to payload */ 12712 uint8 attr_list[0]; /* attributes payload */ 12713 } wl_nan_ev_receive_t; 12714 12715 /* WL_NAN_EVENT_DISC_CACHE_TIMEOUT */ 12716 #define WL_NAN_DISC_CACHE_EXPIRY_ENTRIES_MAX 8 12717 12718 typedef struct wl_nan_disc_expired_cache_entry { 12719 uint8 l_sub_id; /* local sub instance_id */ 12720 uint8 r_pub_id; /* remote-matched pub instance_id */ 12721 struct ether_addr r_nmi_addr; /* remote-matched pub nmi addr */ 12722 } wl_nan_disc_expired_cache_entry_t; 12723 12724 typedef struct wl_nan_ev_disc_cache_timeout { 12725 uint16 count; /* no. of expired cache entries */ 12726 uint16 pad; 12727 wl_nan_disc_expired_cache_entry_t cache_exp_list[]; 12728 } wl_nan_ev_disc_cache_timeout_t; 12729 12730 /* For NAN event mask extention */ 12731 #define WL_NAN_EVMASK_EXTN_VER 1 12732 #define WL_NAN_EVMASK_EXTN_LEN 16 /* 16*8 = 128 masks supported */ 12733 12734 typedef struct wl_nan_event_extn { 12735 uint8 ver; 12736 uint8 pad; 12737 uint16 len; 12738 uint8 evmask[]; 12739 } wl_nan_evmask_extn_t; 12740 12741 /* WL_NAN_XTLV_DATA_DP_TXS */ 12742 12743 typedef struct wl_nan_data_dp_txs { 12744 uint8 ndp_id; 12745 uint8 pad; 12746 struct ether_addr indi; /* initiator ndi */ 12747 } wl_nan_data_dp_txs_t; 12748 12749 /* WL_NAN_XTLV_RNG_TXS */ 12750 12751 typedef struct wl_nan_range_txs { 12752 uint8 range_id; 12753 uint8 pad[3]; 12754 } wl_nan_range_txs_t; 12755 12756 #define NAN_MAX_BANDS 2 12757 12758 enum wl_nan_oob_af_txs_reason_code { 12759 WL_NAN_OOB_AF_TX_REASON_BMAP = 0x01, /* Bitmap schedule */ 12760 WL_NAN_OOB_AF_TX_REASON_TIMEOUT = 0x02, /* OOB AF session timeout */ 12761 WL_NAN_OOB_AF_TX_REASON_DISABLED= 0x03, /* OOB disabled while it was scheduled */ 12762 }; 12763 12764 /* WL_NAN_EVENT_OOB_AF_TXS event sent to host after NAN OOB AF transmit attempted */ 12765 typedef struct wl_nan_event_oob_af_txs { 12766 uint8 result; /* For TX status, success or failure */ 12767 uint8 reason; /* wl_nan_oob_af_txs_reason_code */ 12768 uint16 token; /* Token from the host */ 12769 } wl_nan_event_oob_af_txs_t; 12770 12771 /* WL_NAN_EVENT_OOB_AF_TXS status */ 12772 #define NAN_OOB_AF_TXS_ACK 0x1 12773 #define NAN_OOB_AF_TXS_NO_ACK 0x2 12774 #define NAN_OOB_AF_TXS_EXPIRED 0x3 12775 #define NAN_OOB_AF_TXS_DISABLED 0x4 12776 12777 /* WL_NAN_EVENT_OOB_AF_RX event sent to host upon receiving a NAN OOB AF frame */ 12778 typedef struct wl_nan_event_oob_af_rx { 12779 struct ether_addr sa; 12780 struct ether_addr da; 12781 struct ether_addr bssid; 12782 uint16 payload_len; 12783 uint8 payload[]; /* AF hdr + NAN attrbutes in TLV format */ 12784 } wl_nan_event_oob_af_rx_t; 12785 12786 #define WL_NAN_CFG_OOB_AF_BODY_MAX_SIZE 1024u /* Max size of AF payload */ 12787 #define WL_NAN_CFG_OOB_AF_MAX_TIMEOUT 8000u /* 8 Sec. Max timeout(in ms) for OOB AF session */ 12788 12789 /* Max size of the NAN OOB AF information in the IOVAR */ 12790 #define WL_NAN_CFG_OOB_AF_MAX_INFO_SIZE \ 12791 (sizeof(bcm_xtlv_t) + sizeof(wl_nan_oob_af_t) + \ 12792 WL_NAN_CFG_OOB_AF_BODY_MAX_SIZE) 12793 /* 12794 * TLVs - Below XTLV definitions will be deprecated 12795 * in due course (soon as all other branches update 12796 * to the comp ID based XTLVs listed below). 12797 */ 12798 enum wl_nan_cmd_xtlv_id { 12799 WL_NAN_XTLV_MAC_ADDR = 0x120, 12800 WL_NAN_XTLV_MATCH_RX = 0x121, 12801 WL_NAN_XTLV_MATCH_TX = 0x122, 12802 WL_NAN_XTLV_SVC_INFO = 0x123, 12803 WL_NAN_XTLV_SVC_NAME = 0x124, 12804 WL_NAN_XTLV_SR_FILTER = 0x125, 12805 WL_NAN_XTLV_FOLLOWUP = 0x126, 12806 WL_NAN_XTLV_SVC_LIFE_COUNT = 0x127, 12807 WL_NAN_XTLV_AVAIL = 0x128, 12808 WL_NAN_XTLV_SDF_RX = 0x129, 12809 WL_NAN_XTLV_SDE_CONTROL = 0x12a, 12810 WL_NAN_XTLV_SDE_RANGE_LIMIT = 0x12b, 12811 WL_NAN_XTLV_NAN_AF = 0x12c, 12812 WL_NAN_XTLV_SD_TERMINATE = 0x12d, 12813 WL_NAN_XTLV_CLUSTER_ID = 0x12e, 12814 WL_NAN_XTLV_PEER_RSSI = 0x12f, 12815 WL_NAN_XTLV_BCN_RX = 0x130, 12816 WL_NAN_XTLV_REPLIED = 0x131, /* Publish sent for a subscribe */ 12817 WL_NAN_XTLV_RECEIVED = 0x132, /* FUP Received */ 12818 WL_NAN_XTLV_DISC_RESULTS = 0x133, /* Discovery results */ 12819 WL_NAN_XTLV_TXS = 0x134 /* TX status */ 12820 }; 12821 12822 #define WL_NAN_CMD_GLOBAL 0x00 12823 #define WL_NAN_CMD_CFG_COMP_ID 0x01 12824 #define WL_NAN_CMD_ELECTION_COMP_ID 0x02 12825 #define WL_NAN_CMD_SD_COMP_ID 0x03 12826 #define WL_NAN_CMD_SYNC_COMP_ID 0x04 12827 #define WL_NAN_CMD_DATA_COMP_ID 0x05 12828 #define WL_NAN_CMD_DAM_COMP_ID 0x06 12829 #define WL_NAN_CMD_RANGE_COMP_ID 0x07 12830 #define WL_NAN_CMD_GENERIC_COMP_ID 0x08 12831 #define WL_NAN_CMD_SCHED_COMP_ID 0x09 12832 #define WL_NAN_CMD_NSR_COMP_ID 0x0a /* NAN Save Restore */ 12833 #define WL_NAN_CMD_NANHO_COMP_ID 0x0b /* NAN Host offload */ 12834 #define WL_NAN_CMD_DBG_COMP_ID 0x0f 12835 12836 #define WL_NAN_CMD_COMP_SHIFT 8 12837 #define NAN_CMD(x, y) (((x) << WL_NAN_CMD_COMP_SHIFT) | (y)) 12838 12839 /* 12840 * Module based NAN TLV IDs 12841 */ 12842 typedef enum wl_nan_tlv { 12843 12844 WL_NAN_XTLV_CFG_MATCH_RX = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x01), 12845 WL_NAN_XTLV_CFG_MATCH_TX = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x02), 12846 WL_NAN_XTLV_CFG_SR_FILTER = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x03), 12847 WL_NAN_XTLV_CFG_SVC_NAME = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x04), 12848 WL_NAN_XTLV_CFG_NAN_STATUS = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x05), 12849 WL_NAN_XTLV_CFG_SVC_LIFE_COUNT = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x06), 12850 WL_NAN_XTLV_CFG_SVC_HASH = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x07), 12851 WL_NAN_XTLV_CFG_SEC_CSID = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x08), /* Security CSID */ 12852 WL_NAN_XTLV_CFG_SEC_PMK = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x09), /* Security PMK */ 12853 WL_NAN_XTLV_CFG_SEC_PMKID = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0A), 12854 WL_NAN_XTLV_CFG_SEC_SCID = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0B), 12855 WL_NAN_XTLV_CFG_VNDR_PAYLOAD = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0C), 12856 WL_NAN_XTLV_CFG_HOST_INDPID = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0D), 12857 /* when host ndpid is used */ 12858 WL_NAN_XTLV_CFG_MAC_ADDR = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0E), 12859 /* fast disc time bitmap config */ 12860 WL_NAN_XTLV_CFG_FDISC_TBMP = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0F), 12861 12862 WL_NAN_XTLV_SD_SVC_INFO = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x01), 12863 WL_NAN_XTLV_SD_FOLLOWUP = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x02), 12864 WL_NAN_XTLV_SD_SDF_RX = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x03), 12865 WL_NAN_XTLV_SD_SDE_CONTROL = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x04), 12866 WL_NAN_XTLV_SD_SDE_RANGE_LIMIT = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x05), 12867 WL_NAN_XTLV_SD_NAN_AF = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x06), 12868 WL_NAN_XTLV_SD_TERM = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x07), 12869 WL_NAN_XTLV_SD_REPLIED = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x08), /* Pub sent */ 12870 WL_NAN_XTLV_SD_FUP_RECEIVED = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x09), /* FUP Received */ 12871 WL_NAN_XTLV_SD_DISC_RESULTS = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0A), /* Pub RX */ 12872 WL_NAN_XTLV_SD_TXS = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0B), /* Tx status */ 12873 WL_NAN_XTLV_SD_SDE_SVC_INFO = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0C), 12874 WL_NAN_XTLV_SD_SDE_SVC_UPD_IND = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0D), 12875 WL_NAN_XTLV_SD_SVC_NDI = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0E), 12876 WL_NAN_XTLV_SD_NDP_SPEC_INFO = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0F), 12877 WL_NAN_XTLV_SD_NDPE_TLV_LIST = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x10), 12878 WL_NAN_XTLV_SD_NDL_QOS_UPD = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x11), 12879 WL_NAN_XTLV_SD_DISC_CACHE_TIMEOUT = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x12), 12880 WL_NAN_XTLV_SD_PEER_NMI = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x13), 12881 12882 WL_NAN_XTLV_SYNC_BCN_RX = NAN_CMD(WL_NAN_CMD_SYNC_COMP_ID, 0x01), 12883 WL_NAN_XTLV_EV_MR_CHANGED = NAN_CMD(WL_NAN_CMD_SYNC_COMP_ID, 0x02), 12884 12885 WL_NAN_XTLV_DATA_DP_END = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x01), 12886 WL_NAN_XTLV_DATA_DP_INFO = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x02), 12887 WL_NAN_XTLV_DATA_DP_SEC_INST = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x03), 12888 WL_NAN_XTLV_DATA_DP_TXS = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x04), /* txs for dp */ 12889 WL_NAN_XTLV_DATA_DP_OPAQUE_INFO = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x05), 12890 WL_NAN_XTLV_RANGE_INFO = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x01), 12891 WL_NAN_XTLV_RNG_TXS = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x02), 12892 12893 WL_NAN_XTLV_EV_SLOT_INFO = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x01), 12894 WL_NAN_XTLV_EV_GEN_INFO = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x02), 12895 WL_NAN_XTLV_CCA_STATS = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x03), 12896 WL_NAN_XTLV_PER_STATS = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x04), 12897 WL_NAN_XTLV_CHBOUND_INFO = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x05), 12898 WL_NAN_XTLV_SLOT_STATS = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x06), 12899 12900 WL_NAN_XTLV_DAM_NA_ATTR = NAN_CMD(WL_NAN_CMD_DAM_COMP_ID, 0x01), /* na attr */ 12901 WL_NAN_XTLV_HOST_ASSIST_REQ = NAN_CMD(WL_NAN_CMD_DAM_COMP_ID, 0x02), /* host assist */ 12902 12903 /* wl_nan_fw_cap_t */ 12904 WL_NAN_XTLV_GEN_FW_CAP = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x01), 12905 /* wl_nan_fw_cap_v2_t */ 12906 WL_NAN_XTLV_GEN_FW_CAP_V2 = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x02), 12907 12908 /* NAN OOB AF tlv */ 12909 WL_NAN_XTLV_OOB_AF = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x03), 12910 12911 WL_NAN_XTLV_SCHED_INFO = NAN_CMD(WL_NAN_CMD_SCHED_COMP_ID, 0x01), 12912 12913 /* Nan Save-Restore XTLVs */ 12914 WL_NAN_XTLV_NSR2_PEER = NAN_CMD(WL_NAN_CMD_NSR_COMP_ID, 0x21), 12915 WL_NAN_XTLV_NSR2_NDP = NAN_CMD(WL_NAN_CMD_NSR_COMP_ID, 0x22), 12916 12917 /* Host offload XTLVs */ 12918 WL_NAN_XTLV_NANHO_PEER_ENTRY = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x01), 12919 WL_NAN_XTLV_NANHO_DCAPLIST = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x02), 12920 WL_NAN_XTLV_NANHO_DCSLIST = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x03), 12921 WL_NAN_XTLV_NANHO_BLOB = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x04), 12922 WL_NAN_XTLV_NANHO_NDP_STATE = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x05), 12923 WL_NAN_XTLV_NANHO_FRM_TPLT = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x06), 12924 WL_NAN_XTLV_NANHO_OOB_NAF = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x07), 12925 WL_NAN_XTLV_NANHO_LOG_ERR_CTRL = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x08), 12926 WL_NAN_XTLV_NANHO_LOG_DBG_CTRL = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x09), 12927 WL_NAN_XTLV_NANHO_OOB_TXS = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x0A), 12928 WL_NAN_XTLV_NANHO_DCAP_ATTR = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x0B), 12929 WL_NAN_XTLV_NANHO_ELEM_ATTR = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x0C), 12930 WL_NAN_XTLV_NANHO_SEC_SA = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x0D) 12931 } wl_nan_tlv_t; 12932 12933 /* Sub Module ID's for NAN */ 12934 enum { 12935 NAN_MAC = 0, /* nan mac */ 12936 NAN_DISC = 1, /* nan discovery */ 12937 NAN_DBG = 2, /* nan debug */ 12938 NAN_SCHED = 3, /* nan sched */ 12939 NAN_PEER_ENTRY = 4, /* nan peer entry */ 12940 NAN_AVAIL = 5, /* nan avail */ 12941 NAN_DAM = 6, /* nan dam */ 12942 NAN_FSM = 7, /* nan fsm registry */ 12943 NAN_NDP = 8, /* nan ndp */ 12944 NAN_NDL = 9, /* nan ndl */ 12945 NAN_DP = 10, /* nan dp core */ 12946 NAN_RNG = 11, /* nan ranging */ 12947 NAN_SEC = 12, /* nan sec */ 12948 NAN_LAST = 13 12949 }; 12950 12951 enum wl_nan_sub_cmd_xtlv_id { 12952 12953 /* Special command - Tag zero */ 12954 WL_NAN_CMD_GLB_NAN_VER = NAN_CMD(WL_NAN_CMD_GLOBAL, 0x00), 12955 12956 /* nan cfg sub-commands */ 12957 12958 WL_NAN_CMD_CFG_NAN_INIT = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x01), 12959 WL_NAN_CMD_CFG_ROLE = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x02), 12960 WL_NAN_CMD_CFG_HOP_CNT = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x03), 12961 WL_NAN_CMD_CFG_HOP_LIMIT = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x04), 12962 WL_NAN_CMD_CFG_WARMUP_TIME = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x05), 12963 WL_NAN_CMD_CFG_STATUS = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x06), 12964 WL_NAN_CMD_CFG_OUI = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x07), 12965 WL_NAN_CMD_CFG_COUNT = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x08), 12966 WL_NAN_CMD_CFG_CLEARCOUNT = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x09), 12967 WL_NAN_CMD_CFG_CHANNEL = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0A), 12968 WL_NAN_CMD_CFG_BAND = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0B), 12969 WL_NAN_CMD_CFG_CID = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0C), 12970 WL_NAN_CMD_CFG_IF_ADDR = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0D), 12971 WL_NAN_CMD_CFG_BCN_INTERVAL = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0E), 12972 WL_NAN_CMD_CFG_SDF_TXTIME = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0F), 12973 WL_NAN_CMD_CFG_SID_BEACON = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x10), 12974 WL_NAN_CMD_CFG_DW_LEN = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x11), 12975 WL_NAN_CMD_CFG_AVAIL = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x12), 12976 WL_NAN_CMD_CFG_WFA_TM = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x13), 12977 WL_NAN_CMD_CFG_EVENT_MASK = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x14), 12978 WL_NAN_CMD_CFG_NAN_CONFIG = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x15), /* ctrl */ 12979 WL_NAN_CMD_CFG_NAN_ENAB = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x16), 12980 WL_NAN_CMD_CFG_ULW = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x17), 12981 WL_NAN_CMD_CFG_NAN_CONFIG2 = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x18), /* ctrl2 */ 12982 WL_NAN_CMD_CFG_DEV_CAP = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x19), 12983 WL_NAN_CMD_CFG_SCAN_PARAMS = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x1A), 12984 WL_NAN_CMD_CFG_VNDR_PAYLOAD = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x1B), 12985 WL_NAN_CMD_CFG_FASTDISC = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x1C), 12986 WL_NAN_CMD_CFG_MIN_TX_RATE = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x1D), 12987 WL_NAN_CMD_CFG_FSM_TIMEOUT = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x1E), 12988 WL_NAN_CMD_CFG_MAX = WL_NAN_CMD_CFG_FSM_TIMEOUT, 12989 12990 /* Add new commands before and update */ 12991 12992 /* nan election sub-commands */ 12993 WL_NAN_CMD_ELECTION_HOST_ENABLE = NAN_CMD(WL_NAN_CMD_ELECTION_COMP_ID, 0x01), 12994 WL_NAN_CMD_ELECTION_METRICS_CONFIG = NAN_CMD(WL_NAN_CMD_ELECTION_COMP_ID, 0x02), 12995 WL_NAN_CMD_ELECTION_METRICS_STATE = NAN_CMD(WL_NAN_CMD_ELECTION_COMP_ID, 0x03), 12996 WL_NAN_CMD_ELECTION_LEAVE = NAN_CMD(WL_NAN_CMD_ELECTION_COMP_ID, 0x03), 12997 WL_NAN_CMD_ELECTION_MERGE = NAN_CMD(WL_NAN_CMD_ELECTION_COMP_ID, 0x04), 12998 WL_NAN_CMD_ELECTION_ADVERTISERS = NAN_CMD(WL_NAN_CMD_ELECTION_COMP_ID, 0x05), 12999 WL_NAN_CMD_ELECTION_RSSI_THRESHOLD = NAN_CMD(WL_NAN_CMD_ELECTION_COMP_ID, 0x06), 13000 WL_NAN_CMD_ELECTION_MAX = WL_NAN_CMD_ELECTION_RSSI_THRESHOLD, 13001 /* New commands go before and update */ 13002 13003 /* nan SD sub-commands */ 13004 WL_NAN_CMD_SD_PARAMS = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x01), 13005 WL_NAN_CMD_SD_PUBLISH = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x02), 13006 WL_NAN_CMD_SD_PUBLISH_LIST = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x03), 13007 WL_NAN_CMD_SD_CANCEL_PUBLISH = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x04), 13008 WL_NAN_CMD_SD_SUBSCRIBE = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x05), 13009 WL_NAN_CMD_SD_SUBSCRIBE_LIST = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x06), 13010 WL_NAN_CMD_SD_CANCEL_SUBSCRIBE = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x07), 13011 WL_NAN_CMD_SD_VND_INFO = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x08), 13012 WL_NAN_CMD_SD_STATS = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x09), 13013 WL_NAN_CMD_SD_TRANSMIT = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0A), 13014 WL_NAN_CMD_SD_FUP_TRANSMIT = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0B), 13015 WL_NAN_CMD_SD_CONNECTION = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0C), 13016 WL_NAN_CMD_SD_SHOW = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0D), 13017 WL_NAN_CMD_SD_DISC_CACHE_TIMEOUT = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0E), 13018 WL_NAN_CMD_SD_DISC_CACHE_CLEAR = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0F), 13019 WL_NAN_CMD_SD_MAX = WL_NAN_CMD_SD_DISC_CACHE_CLEAR, 13020 13021 /* nan time sync sub-commands */ 13022 13023 WL_NAN_CMD_SYNC_SOCIAL_CHAN = NAN_CMD(WL_NAN_CMD_SYNC_COMP_ID, 0x01), 13024 WL_NAN_CMD_SYNC_AWAKE_DWS = NAN_CMD(WL_NAN_CMD_SYNC_COMP_ID, 0x02), 13025 WL_NAN_CMD_SYNC_BCN_RSSI_NOTIF_THRESHOLD = NAN_CMD(WL_NAN_CMD_SYNC_COMP_ID, 0x03), 13026 WL_NAN_CMD_SYNC_MAX = WL_NAN_CMD_SYNC_BCN_RSSI_NOTIF_THRESHOLD, 13027 13028 /* nan2 commands */ 13029 WL_NAN_CMD_DATA_CONFIG = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x01), 13030 WL_NAN_CMD_DATA_RSVD02 = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x02), 13031 WL_NAN_CMD_DATA_RSVD03 = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x03), 13032 WL_NAN_CMD_DATA_DATAREQ = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x04), 13033 WL_NAN_CMD_DATA_DATARESP = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x05), 13034 WL_NAN_CMD_DATA_DATAEND = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x06), 13035 WL_NAN_CMD_DATA_SCHEDUPD = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x07), 13036 WL_NAN_CMD_DATA_RSVD08 = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x08), 13037 WL_NAN_CMD_DATA_CAP = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x9), 13038 WL_NAN_CMD_DATA_STATUS = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x0A), 13039 WL_NAN_CMD_DATA_STATS = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x0B), 13040 WL_NAN_CMD_DATA_RSVD0C = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x0C), 13041 WL_NAN_CMD_DATA_NDP_SHOW = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x0D), 13042 WL_NAN_CMD_DATA_DATACONF = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x0E), 13043 WL_NAN_CMD_DATA_MIN_TX_RATE = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x0F), 13044 WL_NAN_CMD_DATA_MAX_PEERS = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x10), 13045 WL_NAN_CMD_DATA_DP_IDLE_PERIOD = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x11), 13046 WL_NAN_CMD_DATA_DP_OPAQUE_INFO = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x12), 13047 WL_NAN_CMD_DATA_DP_HB_DURATION = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x13), 13048 WL_NAN_CMD_DATA_DATAEND_V2 = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x14), 13049 WL_NAN_CMD_DATA_PATH_MAX = WL_NAN_CMD_DATA_DATAEND_V2, /* New ones before and update */ 13050 13051 /* nan dam sub-commands */ 13052 WL_NAN_CMD_DAM_CFG = NAN_CMD(WL_NAN_CMD_DAM_COMP_ID, 0x01), 13053 WL_NAN_CMD_DAM_MAX = WL_NAN_CMD_DAM_CFG, /* New ones before and update */ 13054 13055 /* nan2.0 ranging commands */ 13056 WL_NAN_CMD_RANGE_REQUEST = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x01), 13057 WL_NAN_CMD_RANGE_AUTO = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x02), 13058 WL_NAN_CMD_RANGE_RESPONSE = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x03), 13059 WL_NAN_CMD_RANGE_CANCEL = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x04), 13060 WL_NAN_CMD_RANGE_IDLE_COUNT = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x05), 13061 WL_NAN_CMD_RANGE_CANCEL_EXT = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x06), 13062 13063 /* nan debug sub-commands */ 13064 WL_NAN_CMD_DBG_SCAN_PARAMS = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x01), 13065 WL_NAN_CMD_DBG_SCAN = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x02), 13066 WL_NAN_CMD_DBG_SCAN_RESULTS = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x03), 13067 /* This is now moved under CFG */ 13068 WL_NAN_CMD_DBG_EVENT_MASK = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x04), 13069 WL_NAN_CMD_DBG_EVENT_CHECK = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x05), 13070 WL_NAN_CMD_DBG_DUMP = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x06), 13071 WL_NAN_CMD_DBG_CLEAR = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x07), 13072 WL_NAN_CMD_DBG_RSSI = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x08), 13073 WL_NAN_CMD_DBG_DEBUG = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x09), 13074 WL_NAN_CMD_DBG_TEST1 = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x0A), 13075 WL_NAN_CMD_DBG_TEST2 = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x0B), 13076 WL_NAN_CMD_DBG_TEST3 = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x0C), 13077 WL_NAN_CMD_DBG_DISC_RESULTS = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x0D), 13078 WL_NAN_CMD_DBG_STATS = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x0E), 13079 WL_NAN_CMD_DBG_LEVEL = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x0F), 13080 WL_NAN_CMD_DBG_MAX = WL_NAN_CMD_DBG_LEVEL, /* New ones before and update */ 13081 13082 /* Generic componenet */ 13083 WL_NAN_CMD_GEN_STATS = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x01), 13084 WL_NAN_CMD_GEN_FW_CAP = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x02), 13085 WL_NAN_CMD_CFG_OOB_AF = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x03), 13086 WL_NAN_CMD_GEN_MAX = WL_NAN_CMD_CFG_OOB_AF, 13087 13088 /* NAN Save-Restore */ 13089 WL_NAN_CMD_NSR2 = NAN_CMD(WL_NAN_CMD_NSR_COMP_ID, 0x20), 13090 WL_NAN_CMD_NSR2_MAX = WL_NAN_CMD_NSR2, 13091 13092 /* Host offload sub-commands */ 13093 WL_NAN_CMD_NANHO_UPDATE = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x01), /* WILL BE REMOVED */ 13094 WL_NAN_CMD_NANHO_INFO = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x01), 13095 WL_NAN_CMD_NANHO_FRM_TPLT = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x02), /* unused */ 13096 WL_NAN_CMD_NANHO_OOB_NAF = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x03), /* unused */ 13097 WL_NAN_CMD_NANHO_LOG_CTRL = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x04), 13098 WL_NAN_CMD_NANHO_VER = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x05), 13099 WL_NAN_CMD_NANHO_MAX = WL_NAN_CMD_NANHO_VER, 13100 13101 /* Add submodules below, and update WL_NAN_CMD_MAX */ 13102 13103 /* ROML check for this enum should use WL_NAN_CMD_MAX */ 13104 WL_NAN_CMD_MAX = WL_NAN_CMD_NANHO_MAX 13105 }; 13106 13107 /* 13108 * Component/Module based NAN TLV IDs for NAN stats 13109 */ 13110 typedef enum wl_nan_stats_tlv { 13111 WL_NAN_XTLV_SYNC_MAC_STATS = NAN_CMD(WL_NAN_CMD_SYNC_COMP_ID, 0x01), 13112 13113 WL_NAN_XTLV_SD_DISC_STATS = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x01), 13114 13115 WL_NAN_XTLV_DATA_NDP_STATS = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x01), 13116 WL_NAN_XTLV_DATA_NDL_STATS = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x02), 13117 WL_NAN_XTLV_DATA_SEC_STATS = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x03), 13118 13119 WL_NAN_XTLV_GEN_SCHED_STATS = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x01), 13120 WL_NAN_XTLV_GEN_PEER_STATS = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x02), 13121 WL_NAN_XTLV_GEN_PEER_STATS_DEVCAP = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x03), 13122 WL_NAN_XTLV_GEN_PEER_STATS_NDP = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x04), 13123 WL_NAN_XTLV_GEN_PEER_STATS_SCHED = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x05), 13124 WL_NAN_XTLV_GEN_AVAIL_STATS_SCHED = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x06), 13125 WL_NAN_XTLV_GEN_NDP_STATS = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x07), 13126 WL_NAN_XTLV_GEN_PARSE_STATS = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x08), 13127 13128 WL_NAN_XTLV_DAM_STATS = NAN_CMD(WL_NAN_CMD_DAM_COMP_ID, 0x01), 13129 WL_NAN_XTLV_DAM_AVAIL_STATS = NAN_CMD(WL_NAN_CMD_DAM_COMP_ID, 0x02), 13130 13131 WL_NAN_XTLV_RANGE_STATS = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x01) 13132 } wl_nan_stats_tlv_t; 13133 13134 /* NAN stats WL_NAN_CMD_GEN_STATS command */ 13135 /* Input data */ 13136 typedef struct wl_nan_cmn_get_stat { 13137 uint32 modules_btmap; /* Bitmap to indicate module stats are needed: 13138 * See NAN Sub Module ID's above 13139 */ 13140 uint8 operation; /* Get, Get and Clear */ 13141 uint8 arg1; /* Submodule control variable1 */ 13142 uint8 arg2; /* Submodule control variable2 */ 13143 uint8 pad; /* May not be needed as TLV's are aligned,add to pass compile chk */ 13144 } wl_nan_cmn_get_stat_t; 13145 13146 /* Output for Stats container */ 13147 typedef struct wl_nan_cmn_stat { 13148 uint32 n_stats; /* Number of different sub TLV stats present in the container */ 13149 uint32 totlen; /* Total Length of stats data in container */ 13150 uint8 stats_tlvs []; /* Stat TLV's container */ 13151 } wl_nan_cmn_stat_t; 13152 13153 /* Defines for operation */ 13154 #define WLA_NAN_STATS_GET 0 13155 #define WLA_NAN_STATS_GET_CLEAR 1 13156 13157 #define WL_NAN_STAT_ALL 0xFFFFFFFF 13158 13159 /* NAN Mac stats */ 13160 13161 typedef struct wl_nan_mac_band_stats { 13162 uint32 bcn_tx; /* 2g/5g disc/sync beacon tx count */ 13163 uint32 bcn_rx; /* 2g/5g disc/sync beacon rx count */ 13164 uint32 dws; /* Number of 2g/5g DW's */ 13165 } wl_nan_mac_band_stats_t; 13166 13167 /* Note: if this struct is changing update wl_nan_slot_ecounters_vX_t version, 13168 * as this struct is sent as payload in wl_nan_slot_ecounter_vX_ts 13169 */ 13170 typedef struct wl_nan_mac_stats { 13171 wl_nan_mac_band_stats_t band[NAN_MAX_BANDS]; /* MAC sync band specific stats */ 13172 uint32 naf_tx; /* NAN AF tx */ 13173 uint32 naf_rx; /* NAN AF rx */ 13174 uint32 sdf_tx; /* SDF tx */ 13175 uint32 sdf_rx; /* SDF rx */ 13176 uint32 cnt_sync_bcn_rx_tu[3]; /* delta bw */ 13177 uint32 cnt_bcn_tx_out_dw; /* TX sync beacon outside dw */ 13178 uint32 cnt_role_am_dw; /* anchor master role due to dw */ 13179 uint32 cnt_am_hop_err; /* wrong hopcount set for AM */ 13180 } wl_nan_mac_stats_t; 13181 13182 typedef struct wl_nan_mac_stats_v1 { 13183 wl_nan_mac_band_stats_t band[NAN_MAX_BANDS]; /* MAC sync band specific stats */ 13184 uint32 naf_tx; /* NAN AF tx */ 13185 uint32 naf_rx; /* NAN AF rx */ 13186 uint32 sdf_tx; /* SDF tx */ 13187 uint32 sdf_rx; /* SDF rx */ 13188 uint32 cnt_sync_bcn_rx_tu[3]; /* delta bw */ 13189 uint32 cnt_bcn_tx_out_dw; /* TX sync beacon outside dw */ 13190 uint32 cnt_role_am_dw; /* anchor master role due to dw */ 13191 uint32 cnt_am_hop_err; /* wrong hopcount set for AM */ 13192 uint32 merge_scan_cnt_2g; /* 2G band merge scan cnt */ 13193 uint32 merge_scan_cnt_5g; /* 5G band merge scan cnt */ 13194 } wl_nan_mac_stats_v1_t; 13195 13196 /* NAN Sched stats */ 13197 /* Per core Sched stats */ 13198 typedef struct nan_sched_stats_core { 13199 uint32 slotstart; /* slot_start */ 13200 uint32 slotend; /* slot_end */ 13201 uint32 slotskip; /* slot_skip */ 13202 uint32 slotstart_partial; /* slot resume */ 13203 uint32 slotend_partial; /* slot pre-empt */ 13204 uint8 avail_upd_cnt; /* count to track num of times avail has been updated */ 13205 uint8 pad[3]; 13206 } nan_sched_stats_core_t; 13207 /* Common Sched stats */ 13208 typedef struct nan_sched_stats_cmn { 13209 uint32 slot_adj_dw; /* Slot adjusts due to DW changes */ 13210 uint32 slot_dur; /* Total slot duration in TU's */ 13211 } nan_sched_stats_cmn_t; 13212 13213 /* Note: if this struct is changing update wl_nan_slot_ecounters_vX_t version, 13214 * as this struct is sent as payload in wl_nan_slot_ecounters_vX_t 13215 */ 13216 typedef struct nan_sched_stats { 13217 nan_sched_stats_cmn_t cmn; 13218 nan_sched_stats_core_t slice[MAX_NUM_D11CORES]; 13219 } nan_sched_stats_t; 13220 /* End NAN Sched stats */ 13221 13222 /* NAN Discovery stats */ 13223 typedef struct nan_disc_stats { 13224 uint32 pub_tx; /* Publish tx */ 13225 uint32 pub_rx; /* Publish rx */ 13226 uint32 sub_tx; /* Subscribe tx */ 13227 uint32 sub_rx; /* Subscribe rx */ 13228 uint32 fup_tx; /* Followup tx */ 13229 uint32 fup_rx; /* Followup rx */ 13230 uint32 pub_resp_ignored; /* response to incoming publish ignored */ 13231 uint32 sub_resp_ignored; /* response to incoming subscribe ignored */ 13232 } nan_disc_stats_t; 13233 /* NAN Discovery stats end */ 13234 13235 /* statistics for nan sec */ 13236 typedef struct nan_sec_stats_s { 13237 uint32 mic_fail; /* rx mic fail */ 13238 uint32 replay_fail; /* replay counter */ 13239 uint32 tx_fail; /* tx fail (from txstatus) */ 13240 uint32 key_info_err; /* key info field err */ 13241 uint32 ok_sessions; /* successful mx negotiations */ 13242 uint32 fail_sessions; /* failed sessions */ 13243 uint32 keydesc_err; /* key desc error */ 13244 uint32 invalid_cipher; /* cipher suite not valid */ 13245 uint32 pmk_not_found; /* no pmk found for given service or for any reason */ 13246 uint32 no_pmk_for_pmkid; /* no pmk found for give pmkid */ 13247 uint32 key_install_err; /* failed to install keys */ 13248 uint32 no_keydesc_attr; /* key desc attr missing */ 13249 uint32 nonce_mismatch; /* nonce mismatch */ 13250 } nan_sec_stats_t; 13251 13252 /* WL_NAN_XTLV_GEN_PEER_STATS */ 13253 typedef struct wl_nan_peer_stats { 13254 struct ether_addr nmi; 13255 uint8 pad[2]; 13256 uint32 pkt_enq; /* counter for queued pkt of peer */ 13257 13258 /* NDL */ 13259 bool ndl_exist; 13260 uint8 ndl_state; 13261 bool counter_proposed; 13262 uint8 pad1; 13263 13264 /* NDL QoS */ 13265 uint16 local_max_latency; 13266 uint16 peer_max_latency; 13267 uint8 local_min_slots; 13268 uint8 peer_min_slots; 13269 13270 /* security association */ 13271 struct ether_addr sec_laddr; /* local mac addr */ 13272 struct ether_addr sec_raddr; /* remote mac addr */ 13273 uint8 sec_csid; 13274 uint8 pad2; 13275 } wl_nan_peer_stats_t; 13276 13277 /* WL_NAN_XTLV_GEN_PEER_STATS_DEVCAP */ 13278 typedef struct wl_nan_peer_stats_dev_cap { 13279 uint8 mapid; 13280 uint8 awake_dw_2g; 13281 uint8 awake_dw_5g; 13282 uint8 bands_supported; 13283 uint8 op_mode; 13284 uint8 num_antennas; 13285 uint16 chan_switch_time; 13286 uint8 capabilities; 13287 uint8 pad[3]; 13288 } wl_nan_peer_stats_dev_cap_t; 13289 13290 /* WL_NAN_XTLV_GEN_PEER_STATS_NDP */ 13291 typedef struct wl_nan_peer_stats_ndp { 13292 uint8 peer_role; 13293 uint8 ndp_state; 13294 uint8 indp_id; /* initiator ndp id */ 13295 uint8 ndp_ctrl; /* ndp control field */ 13296 struct ether_addr peer_nmi; 13297 struct ether_addr peer_ndi; 13298 struct ether_addr local_ndi; 13299 13300 /* peer scb info */ 13301 bool scb_allocated; 13302 bool scb_found; 13303 uint32 scb_flags; 13304 uint32 scb_flags2; 13305 uint32 scb_flags3; 13306 } wl_nan_peer_stats_ndp_t; 13307 13308 enum { 13309 WL_NAN_SCHED_STAT_SLOT_COMM = 0x01, /* Committed slot */ 13310 WL_NAN_SCHED_STAT_SLOT_COND = 0x02, /* Conditional slot(proposal/counter) */ 13311 WL_NAN_SCHED_STAT_SLOT_NDC = 0x04, /* NDC slot */ 13312 WL_NAN_SCHED_STAT_SLOT_IMMUT = 0x08, /* Immutable slot */ 13313 WL_NAN_SCHED_STAT_SLOT_RANGE = 0x10, /* Ranging slot */ 13314 }; 13315 typedef uint16 wl_nan_stats_sched_slot_info_t; 13316 13317 typedef struct wl_nan_stats_sched_slot { 13318 wl_nan_stats_sched_slot_info_t info; /* capture slot type and more info */ 13319 chanspec_t chanspec; 13320 } wl_nan_stats_sched_slot_t; 13321 13322 /* WL_NAN_XTLV_GEN_PEER_STATS_SCHED, WL_NAN_XTLV_GEN_AVAIL_STATS_SCHED */ 13323 typedef struct wl_nan_stats_sched { 13324 uint8 map_id; 13325 uint8 seq_id; /* seq id from NA attr */ 13326 uint8 slot_dur; 13327 uint8 pad; 13328 uint16 period; 13329 uint16 num_slot; 13330 wl_nan_stats_sched_slot_t slot[]; 13331 } wl_nan_stats_sched_t; 13332 13333 /* WL_NAN_XTLV_GEN_PEER_STATS_SCHED */ 13334 typedef struct wl_nan_peer_stats_sched { 13335 uint8 map_id; 13336 uint8 seq_id; /* seq id from NA attr */ 13337 uint8 slot_dur; 13338 uint8 pad; 13339 uint16 period; 13340 uint16 num_slot; 13341 wl_nan_stats_sched_slot_t slot[]; 13342 } wl_nan_peer_stats_sched_t; 13343 13344 /* WL_NAN_XTLV_RANGE_STATS */ 13345 typedef struct wl_nan_range_stats { 13346 uint16 rng_ssn_estb; 13347 uint16 rng_ssn_fail; 13348 uint16 rng_sched_start; 13349 uint16 rng_sched_end; 13350 uint16 ftm_ssn_success; /* number of succesfull ftm sessions */ 13351 uint16 ftm_ssn_fail; 13352 uint16 num_meas; /* number of ftm frames */ 13353 uint16 num_valid_meas; /* number of ftm frames with valid timestamp */ 13354 } wl_nan_range_stats_t; 13355 13356 /* defines for ndp stats flag */ 13357 13358 #define NAN_NDP_STATS_FLAG_ROLE_MASK 0x01 13359 #define NAN_NDP_STATS_FLAG_ROLE_INIT 0x00 13360 #define NAN_NDP_STATS_FLAG_ROLE_RESP 0x01 13361 13362 #define NAN_NDP_STATS_STATE_BIT_SHIFT 1 13363 #define NAN_NDP_STATS_FLAG_STATE_MASK 0x07 13364 #define NAN_NDP_STATS_FLAG_STATE_IN_PROG 0x00 13365 #define NAN_NDP_STATS_FLAG_STATE_ESTB 0x01 13366 #define NAN_NDP_STATS_FLAG_STATE_TEARDOWN_WAIT 0x02 13367 /* More states can be added here, when needed */ 13368 13369 /* WL_NAN_XTLV_GEN_NDP_STATS */ 13370 typedef struct wl_nan_ndp_stats_s { 13371 uint8 ndp_id; 13372 uint8 indp_id; 13373 uint8 flags; 13374 uint8 nan_sec_csid; 13375 struct ether_addr lndi_addr; 13376 struct ether_addr pnmi_addr; 13377 struct ether_addr pndi_addr; 13378 uint8 PAD[2]; 13379 } wl_nan_ndp_stats_t; 13380 13381 /* WL_NAN_XTLV_EV_SLOT_INFO */ 13382 typedef struct wl_nan_slot_info_s { 13383 /* dw slot start expected */ 13384 uint32 dwst_h; 13385 uint32 dwst_l; 13386 /* dw slot start actual */ 13387 uint32 act_dwst_h; 13388 uint32 act_dwst_l; 13389 uint16 cur_chan[MAX_NUM_D11CORES]; /* sdb channels */ 13390 uint16 dw_chan; /* dw channel */ 13391 uint8 dw_no; /* dw number */ 13392 uint8 slot_seq_no; /* slot seq no. */ 13393 } wl_nan_slot_info_t; 13394 13395 /* WL_NAN_XTLV_DAM_STATS */ 13396 typedef struct wl_nan_dam_stats { 13397 uint32 cnt_rej_crb_inuse; /* DAM rejections because of crb in use already */ 13398 } wl_nan_dam_stats_t; 13399 13400 /* WL_NAN_EVENT_MR_CHANGED */ 13401 typedef uint8 wl_nan_mr_changed_t; 13402 #define WL_NAN_AMR_CHANGED 1 13403 #define WL_NAN_IMR_CHANGED 2 13404 13405 /* 13406 * The macro BCMUTILS_ERR_CODES is defined only 13407 * when using the common header file(a new approach) bcmutils/include/bcmerror.h. 13408 * Otherwise, use the error codes from this file. 13409 */ 13410 #ifndef BCMUTILS_ERR_CODES 13411 13412 /** status - TBD BCME_ vs NAN status - range reserved for BCME_ */ 13413 enum { 13414 /* add new status here... */ 13415 WL_NAN_E_INVALID_TOKEN = -2135, /* invalid token or mismatch */ 13416 WL_NAN_E_INVALID_ATTR = -2134, /* generic invalid attr error */ 13417 WL_NAN_E_INVALID_NDL_ATTR = -2133, /* invalid NDL attribute */ 13418 WL_NAN_E_SCB_NORESOURCE = -2132, /* no more peer scb available */ 13419 WL_NAN_E_PEER_NOTAVAIL = -2131, 13420 WL_NAN_E_SCB_EXISTS = -2130, 13421 WL_NAN_E_INVALID_PEER_NDI = -2129, 13422 WL_NAN_E_INVALID_LOCAL_NDI = -2128, 13423 WL_NAN_E_ALREADY_EXISTS = -2127, /* generic NAN error for duplication */ 13424 WL_NAN_E_EXCEED_MAX_NUM_MAPS = -2126, 13425 WL_NAN_E_INVALID_DEV_CHAN_SCHED = -2125, 13426 WL_NAN_E_INVALID_PEER_BLOB_TYPE = -2124, 13427 WL_NAN_E_INVALID_LCL_BLOB_TYPE = -2123, 13428 WL_NAN_E_BCMC_PDPA = -2122, /* BCMC NAF PDPA */ 13429 WL_NAN_E_TIMEOUT = -2121, 13430 WL_NAN_E_HOST_CFG = -2120, 13431 WL_NAN_E_NO_ACK = -2119, 13432 WL_NAN_E_SECINST_FAIL = -2118, 13433 WL_NAN_E_REJECT_NDL = -2117, /* generic NDL rejection error */ 13434 WL_NAN_E_INVALID_NDP_ATTR = -2116, 13435 WL_NAN_E_HOST_REJECTED = -2115, 13436 WL_NAN_E_PCB_NORESOURCE = -2114, 13437 WL_NAN_E_NDC_EXISTS = -2113, 13438 WL_NAN_E_NO_NDC_ENTRY_AVAIL = -2112, 13439 WL_NAN_E_INVALID_NDC_ENTRY = -2111, 13440 WL_NAN_E_SD_TX_LIST_FULL = -2110, 13441 WL_NAN_E_SVC_SUB_LIST_FULL = -2109, 13442 WL_NAN_E_SVC_PUB_LIST_FULL = -2108, 13443 WL_NAN_E_SDF_MAX_LEN_EXCEEDED = -2107, 13444 WL_NAN_E_ZERO_CRB = -2106, /* no CRB between local and peer */ 13445 WL_NAN_E_PEER_NDC_NOT_SELECTED = -2105, /* peer ndc not selected */ 13446 WL_NAN_E_DAM_CHAN_CONFLICT = -2104, /* dam schedule channel conflict */ 13447 WL_NAN_E_DAM_SCHED_PERIOD = -2103, /* dam schedule period mismatch */ 13448 WL_NAN_E_LCL_NDC_NOT_SELECTED = -2102, /* local selected ndc not configured */ 13449 WL_NAN_E_NDL_QOS_INVALID_NA = -2101, /* na doesn't comply with ndl qos */ 13450 WL_NAN_E_CLEAR_NAF_WITH_SA_AS_RNDI = -2100, /* rx clear naf with peer rndi */ 13451 WL_NAN_E_SEC_CLEAR_PKT = -2099, /* rx clear pkt from a peer with sec_sa */ 13452 WL_NAN_E_PROT_NON_PDPA_NAF = -2098, /* rx protected non PDPA frame */ 13453 WL_NAN_E_DAM_DOUBLE_REMOVE = -2097, /* remove peer schedule already removed */ 13454 WL_NAN_E_DAM_DOUBLE_MERGE = -2096, /* merge peer schedule already merged */ 13455 WL_NAN_E_DAM_REJECT_INVALID = -2095, /* reject for invalid schedule */ 13456 WL_NAN_E_DAM_REJECT_RANGE = -2094, 13457 WL_NAN_E_DAM_REJECT_QOS = -2093, 13458 WL_NAN_E_DAM_REJECT_NDC = -2092, 13459 WL_NAN_E_DAM_REJECT_PEER_IMMUT = -2091, 13460 WL_NAN_E_DAM_REJECT_LCL_IMMUT = -2090, 13461 WL_NAN_E_DAM_EXCEED_NUM_SCHED = -2089, 13462 WL_NAN_E_DAM_INVALID_SCHED_MAP = -2088, /* invalid schedule map list */ 13463 WL_NAN_E_DAM_INVALID_LCL_SCHED = -2087, 13464 WL_NAN_E_INVALID_MAP_ID = -2086, 13465 WL_NAN_E_CHAN_OVERLAP_ACROSS_MAP = -2085, 13466 WL_NAN_E_INVALID_CHAN_LIST = -2084, 13467 WL_NAN_E_INVALID_RANGE_TBMP = -2083, 13468 WL_NAN_E_INVALID_IMMUT_SCHED = -2082, 13469 WL_NAN_E_INVALID_NDC_ATTR = -2081, 13470 WL_NAN_E_INVALID_TIME_BITMAP = -2080, 13471 WL_NAN_E_INVALID_NA_ATTR = -2079, 13472 WL_NAN_E_NO_NA_ATTR_IN_AVAIL_MAP = -2078, /* no na attr saved in avail map */ 13473 WL_NAN_E_INVALID_MAP_IDX = -2077, 13474 WL_NAN_E_SEC_SA_NOTFOUND = -2076, 13475 WL_NAN_E_BSSCFG_NOTFOUND = -2075, 13476 WL_NAN_E_SCB_NOTFOUND = -2074, 13477 WL_NAN_E_NCS_SK_KDESC_TYPE = -2073, 13478 WL_NAN_E_NCS_SK_KEY_DESC_VER = -2072, /* key descr ver */ 13479 WL_NAN_E_NCS_SK_KEY_TYPE = -2071, /* key descr type */ 13480 WL_NAN_E_NCS_SK_KEYINFO_FAIL = -2070, /* key info (generic) */ 13481 WL_NAN_E_NCS_SK_KEY_LEN = -2069, /* key len */ 13482 WL_NAN_E_NCS_SK_KDESC_NOT_FOUND = -2068, /* key desc not found */ 13483 WL_NAN_E_NCS_SK_INVALID_PARAMS = -2067, /* invalid args */ 13484 WL_NAN_E_NCS_SK_KDESC_INVALID = -2066, /* key descr is not valid */ 13485 WL_NAN_E_NCS_SK_NONCE_MISMATCH = -2065, 13486 WL_NAN_E_NCS_SK_KDATA_SAVE_FAIL = -2064, /* not able to save key data */ 13487 WL_NAN_E_NCS_SK_AUTH_TOKEN_CALC_FAIL = -2063, 13488 WL_NAN_E_NCS_SK_PTK_CALC_FAIL = -2062, 13489 WL_NAN_E_INVALID_STARTOFFSET = -2061, 13490 WL_NAN_E_BAD_NA_ENTRY_TYPE = -2060, 13491 WL_NAN_E_INVALID_CHANBMP = -2059, 13492 WL_NAN_E_INVALID_OP_CLASS = -2058, 13493 WL_NAN_E_NO_IES = -2057, 13494 WL_NAN_E_NO_PEER_ENTRY_AVAIL = -2056, 13495 WL_NAN_E_INVALID_PEER = -2055, 13496 WL_NAN_E_PEER_EXISTS = -2054, 13497 WL_NAN_E_PEER_NOTFOUND = -2053, 13498 WL_NAN_E_NO_MEM = -2052, 13499 WL_NAN_E_INVALID_OPTION = -2051, 13500 WL_NAN_E_INVALID_BAND = -2050, 13501 WL_NAN_E_INVALID_MAC = -2049, 13502 WL_NAN_E_BAD_INSTANCE = -2048, 13503 /* NAN status code reserved from -2048 to -3071 */ 13504 /* Do NOT add new status below -2048 */ 13505 WL_NAN_E_ERROR = -1, 13506 WL_NAN_E_OK = 0 13507 }; 13508 13509 #endif /* BCMUTILS_ERR_CODES */ 13510 13511 /* Error codes used in vendor specific attribute in Data Path Termination frames */ 13512 enum { 13513 WL_NAN_DPEND_E_OK = 0, 13514 WL_NAN_DPEND_E_ERROR = 1, 13515 WL_NAN_DPEND_E_HOST_CMD = 2, 13516 WL_NAN_DPEND_E_HOST_REJECTED = 3, /* host rejected rx frame */ 13517 WL_NAN_DPEND_E_RESOURCE_LIMIT = 4, 13518 WL_NAN_DPEND_E_NO_ACK_RCV = 5, 13519 WL_NAN_DPEND_E_TIMEOUT = 6, 13520 WL_NAN_DPEND_E_NO_ELT = 7, /* rx frame missing element container */ 13521 WL_NAN_DPEND_E_NO_NDP_ATTR = 8, 13522 WL_NAN_DPEND_E_NO_AVAIL_ATTR = 9, 13523 WL_NAN_DPEND_E_NO_NDC_ATTR = 10, 13524 WL_NAN_DPEND_E_NO_RANGE_BM = 11, 13525 WL_NAN_DPEND_E_INVALID_NDP_ATTR = 12, 13526 WL_NAN_DPEND_E_INVALID_NDC_ATTR = 13, 13527 WL_NAN_DPEND_E_INVALID_IMMUT = 14, 13528 WL_NAN_DPEND_E_INVALID_NDL_QOS = 15, 13529 WL_NAN_DPEND_E_INVALID_SEC_PARAMS = 16, 13530 WL_NAN_DPEND_E_REJECT_AVAIL = 17, 13531 WL_NAN_DPEND_E_REJECT_NDL = 18, 13532 WL_NAN_DPEND_E_SCB_NORESOURCE = 19 13533 }; 13534 13535 typedef int32 wl_nan_status_t; 13536 13537 /** nan cmd list entry */ 13538 enum wl_nan_sub_cmd_input_flags { 13539 WL_NAN_SUB_CMD_FLAG_NONE = 0, 13540 WL_NAN_SUB_CMD_FLAG_SKIP = 1, /* Skip to next sub-command on error */ 13541 WL_NAN_SUB_CMD_FLAG_TERMINATE = 2, /* Terminate processing and return */ 13542 WL_NAN_SUB_CMD_FLAG_LAST /* Keep this at the end */ 13543 }; 13544 13545 /** container for nan events */ 13546 typedef struct wl_nan_ioc { 13547 uint16 version; /**< interface command or event version */ 13548 uint16 id; /**< nan ioctl cmd ID */ 13549 uint16 len; /**< total length of all tlv records in data[] */ 13550 uint16 pad; /**< pad to be 32 bit aligment */ 13551 uint8 data []; /**< var len payload of bcm_xtlv_t type */ 13552 } wl_nan_ioc_t; 13553 13554 /* 13555 * NAN sub-command data structures 13556 */ 13557 13558 /* 13559 * Config component WL_NAN_CMD_CFG_XXXX sub-commands 13560 * WL_NAN_CMD_CFG_ENABLE 13561 */ 13562 enum wl_nan_config_state { 13563 WL_NAN_CONFIG_STATE_DISABLE = 0, 13564 WL_NAN_CONFIG_STATE_ENABLE = 1 13565 }; 13566 13567 typedef int8 wl_nan_config_state_t; 13568 13569 /* WL_NAN_CMD_CFG_NAN_INIT */ 13570 13571 typedef uint8 wl_nan_init_t; 13572 13573 /* WL_NAN_CMD_CFG_NAN_VERSION */ 13574 typedef uint16 wl_nan_ver_t; 13575 13576 /* WL_NAN_CMD_CFG_NAN_CONFIG */ 13577 typedef uint32 wl_nan_cfg_ctrl_t; 13578 13579 /* WL_NAN_CMD_CFG_NAN_CONFIG2 */ 13580 typedef struct wl_nan_cfg_ctrl2 { 13581 uint32 flags1; /* wl_nan_cfg_ctrl2_flags1 */ 13582 uint32 flags2; /* wl_nan_cfg_ctrl2_flags2 */ 13583 } wl_nan_cfg_ctrl2_t; 13584 13585 enum wl_nan_cfg_ctrl2_flags1 { 13586 /* Allows unicast SDF TX while local device is under NDP/NDL negotiation, 13587 * but Not with the peer SDF destined to. 13588 */ 13589 WL_NAN_CTRL2_FLAG1_ALLOW_SDF_TX_UCAST_IN_PROG = 0x00000001, 13590 /* Allows broadcast SDF TX while local device is under NDP/NDL negotiation */ 13591 WL_NAN_CTRL2_FLAG1_ALLOW_SDF_TX_BCAST_IN_PROG = 0x00000002, 13592 /* Allows the device to send schedule update automatically on local schedule change */ 13593 WL_NAN_CTRL2_FLAG1_AUTO_SCHEDUPD = 0x00000004, 13594 /* Allows the device to handle slot pre_close operations */ 13595 WL_NAN_CTRL2_FLAG1_SLOT_PRE_CLOSE = 0x00000008, 13596 /* Control flag to enable/disable NDPE capability */ 13597 WL_NAN_CTRL2_FLAG1_NDPE_CAP = 0x000000010, 13598 /* Control flag to enable/disable AUTO DAM LWT mode */ 13599 WL_NAN_CTRL2_FLAG1_AUTODAM_LWT_MODE = 0x000000020, 13600 /* Control flag to enable/disable PMK per NDP */ 13601 WL_NAN_CTRL2_FLAG1_PMK_PER_NDP = 0x000000040, 13602 /* Control flag to enable/disable allowing clear Schedule Update on Secured connection */ 13603 WL_NAN_CTRL2_FLAG1_SEC_ALLOW_CLEAR_SCHED_UPD_PKT = 0x000000080, 13604 /* Control flag to disable/enable 5G FAW */ 13605 WL_NAN_CTRL2_FLAG1_DISABLE_5G_FAW = 0x000000100, 13606 /* Control flag to disable/enable AUTO DAM 6G CAP */ 13607 WL_NAN_CTRL2_FLAG1_DISABLE_AUTODAM_6G_CAP = 0x000000200, 13608 /* Control flag to disable/enable allowing of unsecured OOB AF in a secured connection */ 13609 WL_NAN_CTRL2_FLAG1_ALLOW_UNSECURED_OOB_AF = 0x000000400, 13610 /* Control flag to enable/disable 6G FULL avail */ 13611 WL_NAN_CTRL2_FLAG1_6G_FULL_AVAIL = 0x000000800 13612 }; 13613 #define WL_NAN_CTRL2_FLAGS1_MASK 0x00000FFF 13614 13615 #define WL_NAN_CTRL2_FLAGS2_MASK 0x00000000 13616 13617 /* 13618 * WL_NAN_CMD_CFG_BAND, WL_NAN_CMD_CFG_RSSI_THRESHOLD(Get only) 13619 */ 13620 typedef uint8 wl_nan_band_t; 13621 13622 /* 13623 * WL_NAN_CMD_CFG_ROLE 13624 */ 13625 enum wl_nan_role { 13626 WL_NAN_ROLE_AUTO = 0, 13627 WL_NAN_ROLE_NON_MASTER_NON_SYNC = 1, 13628 WL_NAN_ROLE_NON_MASTER_SYNC = 2, 13629 WL_NAN_ROLE_MASTER = 3, 13630 WL_NAN_ROLE_ANCHOR_MASTER = 4 13631 }; 13632 13633 typedef uint8 wl_nan_role_t; 13634 13635 typedef struct wl_nan_device_state 13636 { 13637 wl_nan_role_t role; /* Sync Master, Non-Sync Master */ 13638 uint8 state; /* TBD */ 13639 uint8 hopcount; /* Hops to the Anchor Master */ 13640 struct ether_addr immediate_master; /* Master MAC */ 13641 struct ether_addr anchor_master; /* Anchor Master MAC */ 13642 struct ether_addr cluster_id; /* Cluster ID to which this device belongs to */ 13643 uint8 PAD[3]; 13644 uint32 tsf_high; /* NAN Cluster TSFs */ 13645 uint32 tsf_low; 13646 } wl_nan_device_state_t; 13647 13648 /* 13649 * WL_NAN_CMD_CFG_HOP_CNT, WL_NAN_CMD_CFG_HOP_LIMIT 13650 */ 13651 typedef uint8 wl_nan_hop_count_t; 13652 13653 /* 13654 * WL_NAN_CMD_CFG_WARMUP_TIME 13655 */ 13656 typedef uint32 wl_nan_warmup_time_ticks_t; 13657 13658 /* 13659 * WL_NAN_CMD_CFG_RSSI_THRESHOLD 13660 * rssi_close and rssi_mid are used to transition master to non-master 13661 * role by NAN state machine. rssi thresholds corresponding to the band 13662 * will be updated. 13663 */ 13664 /* To be deprecated */ 13665 typedef struct wl_nan_rssi_threshold { 13666 wl_nan_band_t band; 13667 int8 rssi_close; 13668 int8 rssi_mid; 13669 uint8 pad; 13670 } wl_nan_rssi_threshold_t; 13671 13672 /* WL_NAN_CMD_ELECTION_RSSI_THRESHOLD */ 13673 13674 typedef struct wl_nan_rssi_thld { 13675 int8 rssi_close_2g; 13676 int8 rssi_mid_2g; 13677 int8 rssi_close_5g; 13678 int8 rssi_mid_5g; 13679 } wl_nan_rssi_thld_t; 13680 13681 /* WL_NAN_CMD_DATA_MAX_PEERS */ 13682 13683 typedef uint8 wl_nan_max_peers_t; 13684 13685 /* 13686 * WL_NAN_CMD_CFG_STATUS 13687 */ 13688 13689 typedef enum wl_nan_election_mode { 13690 WL_NAN_ELECTION_RUN_BY_HOST = 1, 13691 WL_NAN_ELECTION_RUN_BY_FW = 2 13692 } wl_nan_election_mode_t; 13693 13694 typedef struct wl_nan_conf_status { 13695 struct ether_addr nmi; /* NAN mgmt interface address */ 13696 uint8 enabled; /* NAN is enabled */ 13697 uint8 role; /* Current nan sync role */ 13698 struct ether_addr cid; /* Current Cluster id */ 13699 uint8 social_chans[2]; /* Social channels */ 13700 uint8 mr[8]; /* Self Master Rank */ 13701 uint8 amr[8]; /* Anchor Master Rank */ 13702 uint32 ambtt; /* Anchor master beacon target time */ 13703 uint32 cluster_tsf_h; /* Current Cluster TSF High */ 13704 uint32 cluster_tsf_l; /* Current Cluster TSF Low */ 13705 uint8 election_mode; /* Election mode, host or firmware */ 13706 uint8 hop_count; /* Current Hop count */ 13707 uint8 imr[8]; /* Immediate Master Rank */ 13708 uint8 pad[4]; /* remove after precommit */ 13709 uint16 opt_tlvs_len; 13710 uint8 opt_tlvs[]; 13711 } wl_nan_conf_status_t; 13712 13713 /* 13714 * WL_NAN_CMD_CFG_OUI 13715 */ 13716 typedef struct wl_nan_oui_type { 13717 uint8 nan_oui[DOT11_OUI_LEN]; 13718 uint8 type; 13719 } wl_nan_oui_type_t; 13720 13721 /* 13722 * WL_NAN_CMD_CFG_COUNT 13723 */ 13724 typedef struct wl_nan_count { 13725 uint32 cnt_bcn_tx; /**< TX disc/sync beacon count */ 13726 uint32 cnt_bcn_rx; /**< RX disc/sync beacon count */ 13727 uint32 cnt_svc_disc_tx; /**< TX svc disc frame count */ 13728 uint32 cnt_svc_disc_rx; /**< RX svc disc frame count */ 13729 } wl_nan_count_t; 13730 /* 13731 * Election component WL_NAN_CMD_ELECTION_XXXX sub-commands 13732 * WL_NAN_CMD_ELECTION_HOST_ENABLE 13733 */ 13734 enum wl_nan_enable_flags { 13735 WL_NAN_DISABLE_FLAG_HOST_ELECTION = 0, 13736 WL_NAN_ENABLE_FLAG_HOST_ELECTION = 1 13737 }; 13738 13739 /* 13740 * 0 - disable host based election 13741 * 1 - enable host based election 13742 */ 13743 typedef uint8 wl_nan_host_enable_t; 13744 13745 /* 13746 * WL_NAN_CMD_ELECTION_METRICS_CONFIG 13747 */ 13748 /* Set only */ 13749 typedef struct wl_nan_election_metric_config { 13750 uint8 random_factor; /* Configured random factor */ 13751 uint8 master_pref; /* configured master preference */ 13752 uint8 pad[2]; 13753 } wl_nan_election_metric_config_t; 13754 13755 /* 13756 * WL_NAN_CMD_ELECTION_METRICS_STATE 13757 */ 13758 /* Get only */ 13759 typedef struct wl_nan_election_metric_state { 13760 uint8 random_factor; /* random factor used in MIs */ 13761 uint8 master_pref; /* Master advertised in MIs */ 13762 uint8 pad[2]; 13763 } wl_nan_election_metric_state_t; 13764 13765 /* 13766 * WL_NAN_CMD_ELECTION_LEAVE 13767 * WL_NAN_CMD_ELECTION_STOP 13768 */ 13769 typedef struct ether_addr wl_nan_cluster_id_t; 13770 13771 #define NHO_SEC_NCS_SK_REPLAY_CNT_LEN 8u 13772 /* kck */ 13773 #define NHO_SEC_NCS_SK_256_KCK_LEN 24u /* refer nan2 r21 7.1.4.1 */ 13774 /* kek */ 13775 #define NHO_SEC_NCS_SK_256_KEK_LEN 32u /* refer nan2 r21 7.1.4.1 */ 13776 /* tk */ 13777 #define NHO_SEC_NCS_SK_256_TK_LEN 32u /* refer nan2 r21 section 7 */ 13778 13779 #define NHO_SEC_NCS_SK_MAX_KEY_LEN (NHO_SEC_NCS_SK_256_KCK_LEN \ 13780 + NHO_SEC_NCS_SK_256_KEK_LEN \ 13781 + NHO_SEC_NCS_SK_256_TK_LEN) 13782 13783 #define NHO_SEC_KEY_INSTALL_FLAG (1 << 0) 13784 #define NHO_SEC_KEY_UNINSTALL_FLAG (1 << 1) 13785 13786 /* WL_NAN_XTLV_NANHO_SEC_SA */ 13787 typedef struct nanho_sec_sa { 13788 int8 csid; /* Cipher suite ID to identify the security type */ 13789 uint8 kck_len; /* KCK len in key_buf */ 13790 uint8 kek_len; /* KEK len in key_buf */ 13791 uint8 tk_len; /* Transient key len in key_buf */ 13792 uint16 flags; 13793 uint16 pad; 13794 struct ether_addr laddr; /* local mac addr */ 13795 struct ether_addr raddr; /* remote mac addr */ 13796 uint8 key_krc[NHO_SEC_NCS_SK_REPLAY_CNT_LEN]; /* Key Replay ctr */ 13797 uint8 key_buf[NHO_SEC_NCS_SK_MAX_KEY_LEN]; /* PTK = KCK + KEK + TK */ 13798 } nanho_sec_sa_t; 13799 13800 /* 13801 * WL_NAN_CMD_ELECTION_MERGE 13802 * 0 - disable cluster merge 13803 * 1 - enable cluster merge 13804 */ 13805 typedef uint8 wl_nan_merge_enable_t; 13806 13807 /* 13808 * WL_NAN_CMD_CFG_ROLE 13809 * role = 0 means configuration by firmware(obsolete); otherwise by host 13810 * when host configures role, also need target master address to sync to 13811 */ 13812 #define NAN_SYNC_MASTER_SELF 1 13813 #define NAN_SYNC_MASTER_USE_TIMING 2 /* Use the tsf timing provided */ 13814 #define NAN_SYNC_MASTER_AMREC_UPD 4 /* provide AM record update */ 13815 13816 /* 13817 struct ether_addr addr: 13818 when NAN_SYNC_MASTER_USE_TIMING is set, addr is the mac of Rx NAN beacon 13819 providing the timing info 13820 ltsf_h, ltsf_l: 13821 The local TSF timestamp filled in by FW in the WL_NAN_EVENT_BCN_RX event; 13822 rtsf_h, rtsf_l: 13823 The timestamp in the Rx beacon frame, filled in by host 13824 uint32 ambtt: 13825 the amtt in the cluster ID attribute in the Rx beacon frame 13826 */ 13827 13828 typedef struct nan_sync_master { 13829 uint8 flag; /* 1: self; 2: use TSF timing; 4: AMR update */ 13830 uint8 hop_count; 13831 struct ether_addr addr; 13832 struct ether_addr cluster_id; 13833 chanspec_t channel; /* bcn reception channel */ 13834 uint32 ltsf_h; 13835 uint32 ltsf_l; 13836 uint32 rtsf_h; 13837 uint32 rtsf_l; 13838 uint8 amr[WL_NAN_MASTER_RANK_LEN]; 13839 uint32 ambtt; 13840 } nan_sync_master_t; 13841 13842 #ifdef WLAWDL 13843 /* 13844 * NAN Sync TLV(NSTLV): 13845 * To keep NAN/AWDL concurrency time sync. 13846 * It is generated at hybrid device, and propogated by AWDL only device. 13847 * It contains the information needed to run NAN election 13848 */ 13849 #include <packed_section_start.h> 13850 typedef BWL_PRE_PACKED_STRUCT struct awdl_nan_sync_tlv { 13851 uint16 hop_count; /* total hop_count */ 13852 struct ether_addr src_addr; /* macaddr of the hybrid originator of nstlv */ 13853 struct ether_addr cluster_id; /* NAN cluster ID of hybrid originator of nstlv */ 13854 uint32 nan_tsf_h; /* NAN cluster TSF of the hybrid originator of nstlv */ 13855 uint32 nan_tsf_l; 13856 uint8 master_preference; 13857 uint8 random_factor; 13858 uint8 amr[WL_NAN_MASTER_RANK_LEN]; 13859 uint8 orig_hop_count; /* hop_count of the origin hybrid NAN device */ 13860 uint32 ambtt; /* Anchor Master Beacon Transmission Time */ 13861 uint8 opt_xtlv_len; /* xtlv len */ 13862 } BWL_POST_PACKED_STRUCT awdl_nan_sync_tlv_t; 13863 13864 typedef BWL_PRE_PACKED_STRUCT struct wl_awdl_nan_sync_tlv { 13865 uint8 type; /* 23 for NTLV */ 13866 uint16 param_len; 13867 awdl_nan_sync_tlv_t ntlv; 13868 } BWL_POST_PACKED_STRUCT wl_awdl_nan_sync_tlv_t; 13869 13870 /* External NAN sync TLV which can be used by other modules to pass NAN sync info */ 13871 typedef awdl_nan_sync_tlv_t external_nan_sync_tlv_t; 13872 #include <packed_section_end.h> 13873 #endif /* WLAWDL */ 13874 13875 /* NAN advertiser structure */ 13876 /* TODO RSDB: add chspec to indicates core corresponds correct core */ 13877 typedef struct nan_adv_entry { 13878 uint8 age; /* used to remove stale entries */ 13879 uint8 hop_count; /* for NTLV support, use bit7 for virtual NAN peer */ 13880 struct ether_addr addr; 13881 struct ether_addr cluster_id; 13882 chanspec_t channel; /* bcn reception channel */ 13883 uint32 ltsf_h; 13884 uint32 ltsf_l; 13885 uint32 rtsf_h; 13886 uint32 rtsf_l; 13887 uint8 amr[WL_NAN_MASTER_RANK_LEN]; 13888 uint32 ambtt; 13889 int8 rssi[NAN_MAX_BANDS]; /* rssi last af was received at */ 13890 int8 last_rssi[NAN_MAX_BANDS]; /* rssi in the last AF */ 13891 } nan_adv_entry_t; 13892 #define NAN_VIRTUAL_PEER_BIT 0x80 13893 13894 typedef enum { 13895 NAC_CNT_NTLV_AF_TX = 0, /* count of AF containing NTLV tx */ 13896 NAC_CNT_NTLV_AF_RX, /* count of AF containing NTLV rx */ 13897 NAC_CNT_NTLV_TMERR_TX, /* count of NTLV tx timing error */ 13898 NAC_CNT_NTLV_TMERR_RX, /* count of NTLV rx timing error */ 13899 NAC_CNT_NTLV_TM_MISMATCH, /* count of TopMaster mismatch in Rx NTLV processing */ 13900 NAC_CNT_NTLV_ADV_EXISTED, /* count of NTLV ignored bc advertiser existed from bcn */ 13901 NAC_CNT_NTLV_STALED_BCN, /* count of staled bcn from NTLV info */ 13902 NAC_CNT_NTLV_MERGE, /* count of NTLV used for NAN cluster merge */ 13903 NAC_CNT_NTLV_ELECTION_DROP, /* count of NTLV dropped in NAN election */ 13904 NAC_CNT_NTLV_TSF_ADOPT, /* count of NTLV used for NAN TSF adoption */ 13905 NAC_CNT_NTLV_LAST 13906 } nac_cnt_enum_t; 13907 13908 #define NAC_MAX_CNT (NAC_CNT_NTLV_LAST) 13909 13910 typedef struct nac_stats { 13911 uint32 nac_cnt[NAC_MAX_CNT]; 13912 } nac_stats_t; 13913 13914 typedef struct nan_adv_table { 13915 uint8 num_adv; 13916 uint8 adv_size; 13917 uint8 pad[2]; 13918 nan_adv_entry_t adv_nodes[0]; 13919 } nan_adv_table_t; 13920 13921 typedef struct wl_nan_role_cfg { 13922 wl_nan_role_t cfg_role; 13923 wl_nan_role_t cur_role; 13924 uint8 pad[2]; 13925 nan_sync_master_t target_master; 13926 } wl_nan_role_cfg_t; 13927 13928 typedef struct wl_nan_role_config { 13929 wl_nan_role_t role; 13930 struct ether_addr target_master; 13931 uint8 pad; 13932 } wl_nan_role_config_t; 13933 13934 typedef int8 wl_nan_sd_optional_field_types_t; 13935 13936 /* Flag bits for Publish and Subscribe (wl_nan_sd_params_t flags) */ 13937 13938 /* First 8 bits are blocked for mapping 13939 * against svc_control flag bits which goes out 13940 * as part of SDA attribute in air in SDF frames 13941 */ 13942 #define WL_NAN_RANGE_LIMITED 0x0040 13943 13944 /* Event generation indicator (default is continuous) */ 13945 13946 #define WL_NAN_MATCH_ONCE 0x100000 13947 #define WL_NAN_MATCH_NEVER 0x200000 13948 13949 /* Bits specific to Publish */ 13950 13951 #define WL_NAN_PUB_UNSOLICIT 0x1000 /* Unsolicited Tx */ 13952 #define WL_NAN_PUB_SOLICIT 0x2000 /* Solicited Tx */ 13953 #define WL_NAN_PUB_BOTH 0x3000 /* Both the above */ 13954 13955 #define WL_NAN_PUB_BCAST 0x4000 /* bcast solicited Tx only */ 13956 #define WL_NAN_PUB_EVENT 0x8000 /* Event on each solicited Tx */ 13957 #define WL_NAN_PUB_SOLICIT_PENDING 0x10000 /* Used for one-time solicited Publish */ 13958 13959 #define WL_NAN_FOLLOWUP 0x20000 /* Follow-up frames */ 13960 #define WL_NAN_TX_FOLLOWUP 0x40000 /* host generated transmit Follow-up frames */ 13961 13962 /* Bits specific to Subscribe */ 13963 13964 #define WL_NAN_SUB_ACTIVE 0x1000 /* Active subscribe mode */ 13965 #define WL_NAN_SUB_MATCH_IF_SVC_INFO 0x2000 /* Service info in publish */ 13966 13967 #define WL_NAN_TTL_UNTIL_CANCEL 0xFFFFFFFF /* Special values for time to live (ttl) parameter */ 13968 13969 /* 13970 * Publish - runs until first transmission 13971 * Subscribe - runs until first DiscoveryResult event 13972 */ 13973 #define WL_NAN_TTL_FIRST 0 13974 13975 /* Nan Service Based control Flags */ 13976 13977 /* If set, dev will take care of dp_resp */ 13978 #define WL_NAN_SVC_CTRL_AUTO_DPRESP 0x1000000 13979 13980 /* If set, host wont rec event "receive" */ 13981 #define WL_NAN_SVC_CTRL_SUPPRESS_EVT_RECEIVE 0x2000000 13982 13983 /* If set, host wont rec event "replied" */ 13984 #define WL_NAN_SVC_CTRL_SUPPRESS_EVT_REPLIED 0x4000000 13985 13986 /* If set, host wont rec event "terminated" */ 13987 #define WL_NAN_SVC_CTRL_SUPPRESS_EVT_TERMINATED 0x8000000 13988 13989 /* 13990 * WL_NAN_CMD_SD_PARAMS 13991 */ 13992 typedef struct wl_nan_sd_params 13993 { 13994 uint16 length; /* length including options */ 13995 uint8 period; /* period of the unsolicited SDF xmission in DWs */ 13996 uint8 awake_dw; /* interval between two DWs where SDF tx/rx are done */ 13997 uint8 svc_hash[WL_NAN_SVC_HASH_LEN]; /* Hash for the service name */ 13998 uint8 instance_id; /* Instance of the current service */ 13999 int8 proximity_rssi; /* RSSI limit to Rx subscribe or pub SDF 0 no effect */ 14000 uint32 flags; /* bitmap representing aforesaid optional flags */ 14001 int32 ttl; /* TTL for this instance id, -1 will run till cancelled */ 14002 tlv_t optional[1]; /* optional fields in the SDF as appropriate */ 14003 } wl_nan_sd_params_t; 14004 14005 /* 14006 * WL_NAN_CMD_SD_PUBLISH_LIST 14007 * WL_NAN_CMD_SD_SUBSCRIBE_LIST 14008 */ 14009 typedef struct wl_nan_service_info 14010 { 14011 uint8 instance_id; /* Publish instance ID */ 14012 uint8 service_hash[WL_NAN_SVC_HASH_LEN]; /* Hash for service name */ 14013 } wl_nan_service_info_t; 14014 14015 typedef struct wl_nan_service_list 14016 { 14017 uint16 id_count; /* Number of registered publish/subscribe services */ 14018 wl_nan_service_info_t list[1]; /* service info defined by nan_service instance */ 14019 } wl_nan_service_list_t; 14020 14021 /* 14022 * WL_NAN_CMD_CFG_BCN_INTERVAL 14023 */ 14024 typedef uint16 wl_nan_disc_bcn_interval_t; 14025 14026 /* 14027 * WL_NAN_CMD_CFG_SDF_TXTIME 14028 */ 14029 typedef uint16 wl_nan_svc_disc_txtime_t; 14030 14031 /* 14032 * WL_NAN_CMD_CFG_STOP_BCN_TX 14033 */ 14034 typedef uint16 wl_nan_stop_bcn_tx_t; 14035 14036 /* 14037 * WL_NAN_CMD_CFG_FSM_TIMEOUT 14038 */ 14039 typedef uint32 wl_nan_fsm_timeout_t; 14040 14041 /* 14042 * WL_NAN_CMD_CFG_SID_BEACON 14043 */ 14044 typedef struct wl_nan_sid_beacon_control { 14045 uint8 sid_enable; /* Flag to indicate the inclusion of Service IDs in Beacons */ 14046 uint8 sid_count; /* Limit for number of publish SIDs to be included in Beacons */ 14047 uint8 sub_sid_count; /* Limit for number of subscribe SIDs to be included in Beacons */ 14048 uint8 pad; 14049 } wl_nan_sid_beacon_control_t; 14050 14051 /* 14052 * WL_NAN_CMD_CFG_DW_LEN 14053 */ 14054 typedef uint16 wl_nan_dw_len_t; 14055 14056 /* 14057 * WL_NAN_CMD_CFG_AWAKE_DW Will be deprecated. 14058 */ 14059 typedef struct wl_nan_awake_dw { 14060 wl_nan_band_t band; /* 0 - b mode 1- a mode */ 14061 uint8 interval; /* 1 or 2 or 4 or 8 or 16 */ 14062 uint16 pad; 14063 } wl_nan_awake_dw_t; 14064 14065 /* 14066 * WL_NAN_CMD_CFG_AWAKE_DWS 14067 */ 14068 typedef struct wl_nan_awake_dws { 14069 uint8 dw_interval_2g; /* 2G DW interval */ 14070 uint8 dw_interval_5g; /* 5G DW interval */ 14071 uint16 pad; 14072 } wl_nan_awake_dws_t; 14073 14074 /* WL_NAN_CMD_SYNC_BCN_RSSI_NOTIF_THRESHOLD */ 14075 14076 typedef struct wl_nan_rssi_notif_thld { 14077 int8 bcn_rssi_2g; 14078 int8 bcn_rssi_5g; 14079 int16 pad; 14080 } wl_nan_rssi_notif_thld_t; 14081 14082 /* 14083 * WL_NAN_CMD_CFG_SOCIAL_CHAN 14084 */ 14085 typedef struct wl_nan_social_channels { 14086 uint8 soc_chan_2g; /* 2G social channel */ 14087 uint8 soc_chan_5g; /* 5G social channel */ 14088 uint16 pad; 14089 } wl_nan_social_channels_t; 14090 14091 /* 14092 * WL_NAN_CMD_SD_CANCEL_PUBLISH 14093 * WL_NAN_CMD_SD_CANCEL_SUBSCRIBE 14094 */ 14095 typedef uint8 wl_nan_instance_id; /* Instance ID of an active publish instance */ 14096 14097 /* 14098 * WL_NAN_CMD_SD_VND_INFO 14099 */ 14100 typedef struct wl_nan_sd_vendor_info 14101 { 14102 uint16 length; /* Size in bytes of the payload following this field */ 14103 uint8 data[]; /* Vendor Information */ 14104 } wl_nan_sd_vendor_info_t; 14105 14106 /* 14107 * WL_NAN_CMD_SD_STATS 14108 */ 14109 typedef struct wl_nan_sd_stats { 14110 uint32 sdftx; 14111 uint32 sdfrx; 14112 uint32 sdsrffail; 14113 uint32 sdrejrssi; 14114 uint32 sdfollowuprx; 14115 uint32 sdsubmatch; 14116 uint32 sdpubreplied; 14117 uint32 sdmftfail1; 14118 uint32 sdmftfail2; 14119 uint32 sdmftfail3; 14120 uint32 sdmftfail4; 14121 } wl_nan_sd_stats_t; 14122 14123 /* Flag bits for sd transmit message (wl_nan_sd_transmit_t flags) */ 14124 14125 /* If set, host wont rec "tx status" event for tx-followup msg */ 14126 #define WL_NAN_FUP_SUPR_EVT_TXS 0x01 14127 /* more flags can be added here */ 14128 14129 /* 14130 * WL_NAN_CMD_SD_TRANSMIT 14131 * WL_NAN_CMD_SD_FUP_TRANSMIT 14132 */ 14133 typedef struct wl_nan_sd_transmit { 14134 uint8 local_service_id; /* Sender Service ID */ 14135 uint8 requestor_service_id; /* Destination Service ID */ 14136 struct ether_addr destination_addr; /* Destination MAC */ 14137 uint16 token; /* follow_up_token when a follow-up 14138 * msg is queued successfully 14139 */ 14140 uint8 priority; /* requested relative prio */ 14141 uint8 flags; /* Flags for tx follow-up msg */ 14142 uint16 opt_len; /* total length of optional tlvs */ 14143 uint8 opt_tlv[]; /* optional tlvs in bcm_xtlv_t type */ 14144 } wl_nan_sd_transmit_t; 14145 14146 /* disc cache timeout for a cache entry */ 14147 typedef uint16 wl_nan_disc_cache_timeout_t; 14148 14149 /* 14150 * WL_NAN_CMD_SYNC_TSRESERVE 14151 */ 14152 /** time slot */ 14153 #define NAN_MAX_TIMESLOT 32 14154 typedef struct wl_nan_timeslot { 14155 uint32 abitmap; /**< available bitmap */ 14156 uint32 chanlist[NAN_MAX_TIMESLOT]; 14157 } wl_nan_timeslot_t; 14158 14159 /* 14160 * Deprecated 14161 * 14162 * WL_NAN_CMD_SYNC_TSRELEASE 14163 */ 14164 typedef uint32 wl_nan_ts_bitmap_t; 14165 14166 /* nan passive scan params */ 14167 #define NAN_SCAN_MAX_CHCNT 8 14168 /* nan merge scan params */ 14169 typedef struct wl_nan_scan_params { 14170 /* dwell time of discovery channel corresponds to band_idx. 14171 * If set to 0 then fw default will be used. 14172 */ 14173 uint16 dwell_time; 14174 /* scan period of discovery channel corresponds to band_idx. 14175 * If set to 0 then fw default will be used. 14176 */ 14177 uint16 scan_period; 14178 /* band index of discovery channel */ 14179 uint8 band_index; 14180 } wl_nan_scan_params_t; 14181 14182 /* 14183 * WL_NAN_CMD_DBG_SCAN 14184 */ 14185 typedef struct wl_nan_dbg_scan { 14186 struct ether_addr cid; 14187 uint8 pad[2]; 14188 } wl_nan_dbg_scan_t; 14189 14190 /* NAN_DBG_LEVEL */ 14191 typedef struct wl_nan_dbg_level { 14192 uint32 nan_err_level; /* for Error levels */ 14193 uint32 nan_dbg_level; /* for bebug logs and trace */ 14194 uint32 nan_info_level; /* for dumps like prhex */ 14195 } wl_nan_dbg_level_t; 14196 14197 /* 14198 * WL_NAN_CMD_DBG_EVENT_MASK 14199 */ 14200 typedef uint32 wl_nan_event_mask_t; 14201 14202 /* 14203 * WL_NAN_CMD_DBG_EVENT_CHECK 14204 */ 14205 typedef uint8 wl_nan_dbg_ifname[BCM_MSG_IFNAME_MAX]; 14206 14207 /* 14208 * WL_NAN_CMD_DBG_DUMP 14209 * WL_NAN_CMD_DBG_CLEAR 14210 */ 14211 enum wl_nan_dbg_dump_type { 14212 WL_NAN_DBG_DT_RSSI_DATA = 1, 14213 WL_NAN_DBG_DT_STATS_DATA = 2, 14214 /* 14215 * Additional enums before this line 14216 */ 14217 WL_NAN_DBG_DT_INVALID 14218 }; 14219 typedef int8 wl_nan_dbg_dump_type_t; 14220 14221 /** various params and ctl swithce for nan_debug instance */ 14222 /* 14223 * WL_NAN_CMD_DBG_DEBUG 14224 */ 14225 typedef struct wl_nan_debug_params { 14226 uint16 cmd; /**< debug cmd to perform a debug action */ 14227 uint16 status; 14228 uint32 msglevel; /**< msg level if enabled */ 14229 uint8 enabled; /**< runtime debuging enabled */ 14230 uint8 collect; 14231 uint8 PAD[2]; 14232 } wl_nan_debug_params_t; 14233 14234 typedef struct wl_nan_sched_svc_timeslot_s { 14235 uint32 abitmap; /* availability bitmap */ 14236 uint32 chanlist[NAN_MAX_TIMESLOT]; 14237 uint8 res; /* resolution: 0 = 16ms, 1 = 32ms, 2 = 64ms 3 = reserved. REfer NAN spec */ 14238 uint8 mapid; /* mapid from NAN spec. Used to differentiate 2G Vs 5G band */ 14239 uint8 PAD[2]; 14240 } wl_nan_sched_svc_timeslot_t; 14241 14242 /* 14243 * WL_NAN_CMD_DATA_DP_IDLE_PERIOD 14244 */ 14245 typedef uint16 wl_nan_ndp_idle_period_t; 14246 14247 /* 14248 * WL_NAN_CMD_DATA_DP_HB_DURATION 14249 */ 14250 typedef uint16 wl_nan_ndp_hb_duration_t; 14251 14252 /* nan cmd IDs */ 14253 enum wl_nan_cmds { 14254 /* nan cfg /disc & dbg ioctls */ 14255 WL_NAN_CMD_ENABLE = 1, 14256 WL_NAN_CMD_ATTR = 2, 14257 WL_NAN_CMD_NAN_JOIN = 3, 14258 WL_NAN_CMD_LEAVE = 4, 14259 WL_NAN_CMD_MERGE = 5, 14260 WL_NAN_CMD_STATUS = 6, 14261 WL_NAN_CMD_TSRESERVE = 7, 14262 WL_NAN_CMD_TSSCHEDULE = 8, 14263 WL_NAN_CMD_TSRELEASE = 9, 14264 WL_NAN_CMD_OUI = 10, 14265 WL_NAN_CMD_OOB_AF = 11, 14266 WL_NAN_CMD_SCAN_PARAMS = 12, 14267 14268 WL_NAN_CMD_COUNT = 15, 14269 WL_NAN_CMD_CLEARCOUNT = 16, 14270 14271 /* discovery engine commands */ 14272 WL_NAN_CMD_PUBLISH = 20, 14273 WL_NAN_CMD_SUBSCRIBE = 21, 14274 WL_NAN_CMD_CANCEL_PUBLISH = 22, 14275 WL_NAN_CMD_CANCEL_SUBSCRIBE = 23, 14276 WL_NAN_CMD_TRANSMIT = 24, 14277 WL_NAN_CMD_CONNECTION = 25, 14278 WL_NAN_CMD_SHOW = 26, 14279 WL_NAN_CMD_STOP = 27, /* stop nan for a given cluster ID */ 14280 /* nan debug iovars & cmds */ 14281 WL_NAN_CMD_SCAN = 47, 14282 WL_NAN_CMD_SCAN_RESULTS = 48, 14283 WL_NAN_CMD_EVENT_MASK = 49, 14284 WL_NAN_CMD_EVENT_CHECK = 50, 14285 WL_NAN_CMD_DUMP = 51, 14286 WL_NAN_CMD_CLEAR = 52, 14287 WL_NAN_CMD_RSSI = 53, 14288 14289 WL_NAN_CMD_DEBUG = 60, 14290 WL_NAN_CMD_TEST1 = 61, 14291 WL_NAN_CMD_TEST2 = 62, 14292 WL_NAN_CMD_TEST3 = 63, 14293 WL_NAN_CMD_DISC_RESULTS = 64, 14294 /* nan 2.0 data path commands */ 14295 WL_NAN_CMD_DATAPATH = 65 14296 }; 14297 14298 /* NAN DP interface commands */ 14299 enum wl_nan_dp_cmds { 14300 /* nan 2.0 ioctls */ 14301 WL_NAN_CMD_DP_CAP = 1000, 14302 WL_NAN_CMD_DP_CONFIG = 1001, 14303 WL_NAN_CMD_DP_CREATE = 1002, 14304 WL_NAN_CMD_DP_AUTO_CONNECT = 1003, 14305 WL_NAN_CMD_DP_DATA_REQ = 1004, 14306 WL_NAN_CMD_DP_DATA_RESP = 1005, 14307 WL_NAN_CMD_DP_SCHED_UPD = 1006, 14308 WL_NAN_CMD_DP_END = 1007, 14309 WL_NAN_CMD_DP_CONNECT = 1008, 14310 WL_NAN_CMD_DP_STATUS = 1009 14311 }; 14312 14313 /* TODO Should remove this fixed length */ 14314 #define WL_NAN_DATA_SVC_SPEC_INFO_LEN 32 /* arbitrary */ 14315 #define WL_NAN_DP_MAX_SVC_INFO 0xFF 14316 #define WL_NAN_DATA_NDP_INST_SUPPORT 16 14317 14318 /* Nan flags (16 bits) */ 14319 #define WL_NAN_DP_FLAG_SVC_INFO 0x0001 14320 #define WL_NAN_DP_FLAG_CONFIRM 0x0002 14321 #define WL_NAN_DP_FLAG_EXPLICIT_CFM 0x0004 14322 #define WL_NAN_DP_FLAG_SECURITY 0x0008 14323 #define WL_NAN_DP_FLAG_HAST_NDL_COUNTER 0x0010 /* Host assisted NDL counter */ 14324 14325 /* NAN Datapath host status */ 14326 #define WL_NAN_DP_STATUS_ACCEPTED 1 14327 #define WL_NAN_DP_STATUS_REJECTED 0 14328 14329 /* to be done */ 14330 typedef struct wl_nan_dp_cap { 14331 uint8 tbd; 14332 } wl_nan_dp_cap_t; 14333 14334 /** The service hash (service id) is exactly this many bytes. */ 14335 #define WL_NAN_SVC_HASH_LEN 6 14336 /** Number of hash functions per bloom filter */ 14337 #define WL_NAN_HASHES_PER_BLOOM 4 14338 /* no. of max last disc results */ 14339 #define WL_NAN_MAX_DISC_RESULTS 3 14340 14341 /* NAN security related defines */ 14342 /* NCS-SK related */ 14343 #define WL_NAN_NCS_SK_PMK_LEN 32 14344 #define WL_NAN_NCS_SK_PMKID_LEN 16 14345 14346 /* recent discovery results */ 14347 typedef struct wl_nan_disc_result_s 14348 { 14349 wl_nan_instance_id_t instance_id; /* instance id of pub/sub req */ 14350 wl_nan_instance_id_t peer_instance_id; /* peer instance id of pub/sub req/resp */ 14351 uint8 svc_hash[WL_NAN_SVC_HASH_LEN]; /* service descp string */ 14352 struct ether_addr peer_mac; /* peer mac address */ 14353 } wl_nan_disc_result_t; 14354 14355 /* list of recent discovery results */ 14356 typedef struct wl_nan_disc_results_s 14357 { 14358 wl_nan_disc_result_t disc_result[WL_NAN_MAX_DISC_RESULTS]; 14359 } wl_nan_disc_results_list_t; 14360 14361 /* nan 1.0 events */ 14362 /* To be deprecated - will be replaced by event_disc_result */ 14363 typedef struct wl_nan_ev_disc_result { 14364 wl_nan_instance_id_t pub_id; 14365 wl_nan_instance_id_t sub_id; 14366 struct ether_addr pub_mac; 14367 uint8 opt_tlvs[0]; 14368 } wl_nan_ev_disc_result_t; 14369 14370 typedef struct wl_nan_event_disc_result { 14371 wl_nan_instance_id_t pub_id; 14372 wl_nan_instance_id_t sub_id; 14373 struct ether_addr pub_mac; 14374 int8 publish_rssi; /* publisher RSSI */ 14375 uint8 attr_num; 14376 uint16 attr_list_len; /* length of the all the attributes in the SDF */ 14377 uint8 attr_list[0]; /* list of NAN attributes */ 14378 } wl_nan_event_disc_result_t; 14379 14380 typedef struct wl_nan_ev_p2p_avail { 14381 struct ether_addr sender; 14382 struct ether_addr p2p_dev_addr; 14383 uint8 dev_role; 14384 uint8 resolution; 14385 uint8 repeat; 14386 uint8 pad[3]; 14387 chanspec_t chanspec; 14388 uint32 avail_bmap; 14389 } wl_nan_ev_p2p_avail_t; 14390 14391 /* 14392 * discovery interface event structures * 14393 */ 14394 14395 enum wl_nan_oob_af_flags { 14396 WL_NAN_OOB_AF_FLAG_SEND_EVENT = 0x0001, /* send tx status event */ 14397 WL_NAN_OOB_AF_FLAG_FLUSH_PCB = 0x0002, /* flush PCB */ 14398 WL_NAN_OOB_AF_FLAG_ADD_DCAP = 0x0004, /* add dev cap attr into NAF body */ 14399 WL_NAN_OOB_AF_FLAG_ADD_ELMT = 0x0008, /* add elmt container attr into NAF body */ 14400 WL_NAN_OOB_AF_FLAG_MFP_REQUIRED = 0x0010 /* MFP required */ 14401 }; 14402 typedef uint16 wl_nan_oob_af_flags_t; 14403 14404 /* mandatory parameters for OOB action frame */ 14405 typedef struct wl_nan_oob_af_params_s 14406 { 14407 uint8 fup_lcl_id; /* local instance ID of follow-up SDF */ 14408 uint8 fup_peer_id; /* peer instance ID of follow-up SDF */ 14409 uint8 sdf_type; /* represented by service control type NAN_SC_XXX */ 14410 uint8 unused_uint8; 14411 uint32 unused_uint32; 14412 struct ether_addr bssid; 14413 struct ether_addr dest; 14414 uint32 pkt_lifetime; 14415 uint8 n2af_sub_type; /* NAN2 AF sub type */ 14416 uint8 retry_cnt; /* NAF tx retry (not 802.11 re-tx) */ 14417 uint16 token; /* NAN host seq num */ 14418 uint16 flags; /* wl_nan_oob_af_flags_t */ 14419 uint32 fsm_id; /* unique fsm id */ 14420 uint16 payload_len; 14421 uint8 payload[1]; 14422 } wl_nan_oob_af_params_t; 14423 14424 /* NAN Ranging */ 14425 14426 /* Bit defines for global flags */ 14427 #define WL_NAN_RANGING_ENABLE 1 /**< enable RTT */ 14428 #define WL_NAN_RANGING_RANGED 2 /**< Report to host if ranged as target */ 14429 typedef struct nan_ranging_config { 14430 uint32 chanspec; /**< Ranging chanspec */ 14431 uint16 timeslot; /**< NAN RTT start time slot 1-511 */ 14432 uint16 duration; /**< NAN RTT duration in ms */ 14433 struct ether_addr allow_mac; /**< peer initiated ranging: the allowed peer mac 14434 * address, a unicast (for one peer) or 14435 * a broadcast for all. Setting it to all zeros 14436 * means responding to none,same as not setting 14437 * the flag bit NAN_RANGING_RESPOND 14438 */ 14439 uint16 flags; 14440 } wl_nan_ranging_config_t; 14441 14442 /** list of peers for self initiated ranging */ 14443 /** Bit defines for per peer flags */ 14444 #define WL_NAN_RANGING_REPORT (1<<0) /**< Enable reporting range to target */ 14445 typedef struct nan_ranging_peer { 14446 uint32 chanspec; /**< desired chanspec for this peer */ 14447 uint32 abitmap; /**< available bitmap */ 14448 struct ether_addr ea; /**< peer MAC address */ 14449 uint8 frmcnt; /**< frame count */ 14450 uint8 retrycnt; /**< retry count */ 14451 uint16 flags; /**< per peer flags, report or not */ 14452 uint16 PAD; 14453 } wl_nan_ranging_peer_t; 14454 typedef struct nan_ranging_list { 14455 uint8 count; /**< number of MAC addresses */ 14456 uint8 num_peers_done; /**< host set to 0, when read, shows number of peers 14457 * completed, success or fail 14458 */ 14459 uint8 num_dws; /**< time period to do the ranging, specified in dws */ 14460 uint8 reserve; /**< reserved field */ 14461 wl_nan_ranging_peer_t rp[1]; /**< variable length array of peers */ 14462 } wl_nan_ranging_list_t; 14463 14464 /* ranging results, a list for self initiated ranging and one for peer initiated ranging */ 14465 /* There will be one structure for each peer */ 14466 #define WL_NAN_RANGING_STATUS_SUCCESS 1 14467 #define WL_NAN_RANGING_STATUS_FAIL 2 14468 #define WL_NAN_RANGING_STATUS_TIMEOUT 3 14469 #define WL_NAN_RANGING_STATUS_ABORT 4 /**< with partial results if sounding count > 0 */ 14470 typedef struct nan_ranging_result { 14471 uint8 status; /**< 1: Success, 2: Fail 3: Timeout 4: Aborted */ 14472 uint8 sounding_count; /**< number of measurements completed (0 = failure) */ 14473 struct ether_addr ea; /**< initiator MAC address */ 14474 uint32 chanspec; /**< Chanspec where the ranging was done */ 14475 uint32 timestamp; /**< 32bits of the TSF timestamp ranging was completed at */ 14476 uint32 distance; /**< mean distance in meters expressed as Q4 number. 14477 * Only valid when sounding_count > 0. Examples: 14478 * 0x08 = 0.5m 14479 * 0x10 = 1m 14480 * 0x18 = 1.5m 14481 * set to 0xffffffff to indicate invalid number 14482 */ 14483 int32 rtt_var; /**< standard deviation in 10th of ns of RTTs measured. 14484 * Only valid when sounding_count > 0 14485 */ 14486 struct ether_addr tgtea; /**< target MAC address */ 14487 uint8 PAD[2]; 14488 } wl_nan_ranging_result_t; 14489 typedef struct nan_ranging_event_data { 14490 uint8 mode; /**< 1: Result of host initiated ranging */ 14491 /* 2: Result of peer initiated ranging */ 14492 uint8 reserved; 14493 uint8 success_count; /**< number of peers completed successfully */ 14494 uint8 count; /**< number of peers in the list */ 14495 wl_nan_ranging_result_t rr[1]; /**< variable array of ranging peers */ 14496 } wl_nan_ranging_event_data_t; 14497 14498 enum { 14499 WL_NAN_STATS_RSSI = 1, 14500 WL_NAN_STATS_DATA = 2, 14501 WL_NAN_STATS_DP = 3, 14502 /* 14503 * ***** ADD before this line **** 14504 */ 14505 WL_NAN_STATS_INVALID 14506 }; 14507 typedef struct wl_nan_dp_stats { 14508 uint32 tbd; /* TBD */ 14509 } wl_nan_dp_stats_t; 14510 14511 typedef struct wl_nan_stats { 14512 /* general */ 14513 uint32 cnt_dw; /* DW slots */ 14514 uint32 cnt_disc_bcn_sch; /* disc beacon slots */ 14515 uint32 cnt_amr_exp; /* count of ambtt expiries resetting roles */ 14516 uint32 cnt_bcn_upd; /* count of beacon template updates */ 14517 uint32 cnt_bcn_tx; /* count of sync & disc bcn tx */ 14518 uint32 cnt_bcn_rx; /* count of sync & disc bcn rx */ 14519 uint32 cnt_sync_bcn_tx; /* count of sync bcn tx within DW */ 14520 uint32 cnt_disc_bcn_tx; /* count of disc bcn tx */ 14521 uint32 cnt_sdftx_bcmc; /* count of bcast/mcast sdf tx */ 14522 uint32 cnt_sdftx_uc; /* count of unicast sdf tx */ 14523 uint32 cnt_sdftx_fail; /* count of unicast sdf tx fails */ 14524 uint32 cnt_sdf_rx; /* count of sdf rx */ 14525 /* NAN roles */ 14526 uint32 cnt_am; /* anchor master */ 14527 uint32 cnt_master; /* master */ 14528 uint32 cnt_nms; /* non master sync */ 14529 uint32 cnt_nmns; /* non master non sync */ 14530 /* TX */ 14531 uint32 cnt_err_txtime; /* txtime in sync bcn frame not a multiple of dw intv */ 14532 uint32 cnt_err_unsch_tx; /* tx while not in DW/ disc bcn slot */ 14533 uint32 cnt_err_bcn_tx; /* beacon tx error */ 14534 uint32 cnt_sync_bcn_tx_miss; /* no. of times time delta between 2 cosequetive 14535 * sync beacons is more than expected 14536 */ 14537 /* MSCH */ 14538 uint32 cnt_err_msch_reg; /* error is Dw/disc reg with msch */ 14539 uint32 cnt_err_wrong_ch_cb; /* count of msch calbacks in wrong channel */ 14540 uint32 cnt_dw_skip; /* count of DW rejected */ 14541 uint32 cnt_disc_skip; /* count of disc bcn rejected */ 14542 uint32 cnt_dw_start_early; /* msch cb not at registered time */ 14543 uint32 cnt_dw_start_late; /* no. of delays in slot start */ 14544 /* SCANS */ 14545 uint32 cnt_mrg_scan; /* count of merge scans completed */ 14546 uint32 cnt_err_ms_rej; /* number of merge scan failed */ 14547 uint32 cnt_scan_results; /* no. of nan beacons scanned */ 14548 uint32 cnt_join_scan_rej; /* no. of join scans rejected */ 14549 uint32 cnt_nan_scan_abort; /* no. of join scans rejected */ 14550 /* enable/disable */ 14551 uint32 cnt_nan_enab; /* no. of times nan feature got enabled */ 14552 uint32 cnt_nan_disab; /* no. of times nan feature got disabled */ 14553 uint32 cnt_sync_bcn_rx; /* count of sync bcn rx within DW */ 14554 uint32 cnt_sync_bcn_rx_tu[3]; /* Delta bw the tsf in bcn & remote */ 14555 uint32 cnt_bcn_tx_out_dw; /* TX sync beacon outside dw */ 14556 uint32 cnt_role_am_dw; /* anchor master role due to dw */ 14557 uint32 cnt_am_hop_err; /* wrong hopcount set for AM */ 14558 } wl_nan_stats_t; 14559 14560 #define WL_NAN_MAC_MAX_NAN_PEERS 6 14561 #define WL_NAN_MAC_MAX_RSSI_DATA_PER_PEER 10 14562 14563 typedef struct wl_nan_nbr_rssi { 14564 uint8 rx_chan; /* channel number on which bcn rcvd */ 14565 uint8 PAD[3]; 14566 int32 rssi_raw; /* received rssi value */ 14567 int32 rssi_avg; /* normalized rssi value */ 14568 } wl_nan_peer_rssi_t; 14569 14570 typedef struct wl_nan_peer_rssi_entry { 14571 struct ether_addr mac; /* peer mac address */ 14572 uint8 flags; /* TODO:rssi data order: latest first, oldest first etc */ 14573 uint8 rssi_cnt; /* rssi data sample present */ 14574 wl_nan_peer_rssi_t rssi[WL_NAN_MAC_MAX_RSSI_DATA_PER_PEER]; /* RSSI data frm peer */ 14575 } wl_nan_peer_rssi_entry_t; 14576 14577 #define WL_NAN_PEER_RSSI 0x1 14578 #define WL_NAN_PEER_RSSI_LIST 0x2 14579 14580 typedef struct wl_nan_nbr_rssi_data { 14581 uint8 flags; /* this is a list or single rssi data */ 14582 uint8 peer_cnt; /* number of peers */ 14583 uint16 pad; /* padding */ 14584 wl_nan_peer_rssi_entry_t peers[1]; /* peers data list */ 14585 } wl_nan_peer_rssi_data_t; 14586 14587 /* WL_NAN_CMD_DBG_DUMP, GET Resp */ 14588 typedef struct wl_nan_dbg_dump_rsp { 14589 wl_nan_dbg_dump_type_t dump_type; /* dump data type */ 14590 uint8 pad[3]; 14591 union { 14592 wl_nan_peer_rssi_data_t peer_rssi; 14593 wl_nan_stats_t nan_stats; 14594 } u; 14595 } wl_nan_dbg_dump_rsp_t; 14596 14597 enum nan_termination_status { 14598 NAN_TERM_REASON_INVALID = 1, 14599 NAN_TERM_REASON_TIMEOUT = 2, 14600 NAN_TERM_REASON_USER_REQ = 3, 14601 NAN_TERM_REASON_FAILURE = 4, 14602 NAN_TERM_REASON_COUNT_REACHED = 5, 14603 NAN_TERM_REASON_DE_SHUTDOWN = 6, 14604 NAN_TERM_REASON_DISABLE_IN_PROGRESS = 7 14605 }; 14606 14607 /* nan2 data iovar */ 14608 /* nan2 qos */ 14609 typedef struct wl_nan_dp_qos 14610 { 14611 uint8 tid; 14612 uint8 pad; 14613 uint16 pkt_size; 14614 uint16 mean_rate; 14615 uint16 svc_interval; 14616 } wl_nan_dp_qos_t; 14617 14618 #define WL_NAN_NDL_QOS_MAX_LAT_NO_PREF 0xFFFF 14619 14620 /* nan2 qos */ 14621 typedef struct wl_nan_ndl_qos 14622 { 14623 uint8 min_slots; /* min slots per dw interval */ 14624 uint8 pad; 14625 uint16 max_latency; /* max latency */ 14626 } wl_nan_ndl_qos_t; 14627 14628 /* ndp config */ 14629 typedef struct wl_nan_ndp_config 14630 { 14631 uint8 ndp_id; 14632 uint8 pub_id; 14633 struct ether_addr pub_addr; 14634 struct ether_addr data_addr; /* configure local data addr */ 14635 struct ether_addr init_data_addr; /* initiator data addr */ 14636 uint8 svc_spec_info[WL_NAN_DATA_SVC_SPEC_INFO_LEN]; 14637 wl_nan_dp_qos_t qos; 14638 uint16 avail_len; 14639 uint8 pad[3]; 14640 uint8 data[1]; 14641 } wl_nan_ndp_config_t; 14642 14643 /* nan2 device capabilities */ 14644 typedef struct wl_nan_ndp_oper_cfg { 14645 uint8 awake_dw_2g; 14646 uint8 awake_dw_5g; 14647 uint8 bands_supported; 14648 uint8 op_mode; 14649 } wl_nan_ndp_oper_cfg_t; 14650 14651 typedef uint8 wl_nan_ndp_ndpid_t; 14652 typedef uint8 wl_nan_ndp_conn_t; 14653 14654 #define WL_NAN_INVALID_NDPID 0 /* reserved ndp id */ 14655 14656 typedef struct wl_nan_dp_req { 14657 uint8 type; /* 0- unicast 1 - multicast */ 14658 uint8 pub_id; /* Publisher ID */ 14659 uint16 flags; 14660 struct ether_addr peer_mac; /* Peer's NMI addr */ 14661 struct ether_addr mcast_mac; /* Multicast addr */ 14662 struct ether_addr ndi; 14663 wl_nan_dp_qos_t qos; 14664 wl_nan_ndl_qos_t ndl_qos; /* ndl qos */ 14665 uint8 tlv_params[]; /* xtlv parameters for command */ 14666 } wl_nan_dp_req_t; 14667 14668 /* TODO Need to replace ndp_id with lndp_id */ 14669 /* Return structure to data req IOVAR */ 14670 typedef struct wl_nan_dp_req_ret { 14671 struct ether_addr indi; /* Initiators data mac addr */ 14672 uint8 ndp_id; /* Initiators ndpid */ 14673 uint8 pad; 14674 } wl_nan_dp_req_ret_t; 14675 14676 typedef struct wl_nan_dp_resp { 14677 uint8 type; /* 0- unicast 1 - multicast */ 14678 uint8 status; /* Accepted or Rejected */ 14679 uint8 reason_code; 14680 /* Local NDP ID for unicast, mc_id for multicast, 0 for implicit NMSG */ 14681 uint8 ndp_id; /* can be host indp id also */ 14682 wl_nan_dp_qos_t qos; 14683 /* Initiator data address for unicast or multicast address for multicast */ 14684 struct ether_addr mac_addr; 14685 struct ether_addr ndi; 14686 uint16 flags; 14687 wl_nan_ndl_qos_t ndl_qos; /* ndl qos */ 14688 uint8 tlv_params[]; /* xtlv parameters for command */ 14689 } wl_nan_dp_resp_t; 14690 14691 /* Return structure to data resp IOVAR */ 14692 typedef struct wl_nan_dp_resp_ret { 14693 uint8 nmsgid; /* NMSG ID or for multicast else 0 */ 14694 uint8 pad[3]; 14695 } wl_nan_dp_resp_ret_t; 14696 14697 typedef struct wl_nan_dp_conf { 14698 uint8 lndp_id; /* can be host ndp id */ 14699 uint8 status; /* Accepted or Rejected */ 14700 uint8 pad[2]; 14701 } wl_nan_dp_conf_t; 14702 14703 /* WL_NAN_CMD_DATA_DATAEND */ 14704 typedef struct wl_nan_dp_end 14705 { 14706 uint8 lndp_id; /* can be host ndp id */ 14707 uint8 status; 14708 struct ether_addr mac_addr; /* initiator's ndi */ 14709 } wl_nan_dp_end_t; 14710 14711 /* wl_nan_dp_end_v2_t flags */ 14712 #define WL_NAN_DP_END_V2_FLAG_NO_TX 0x0001u 14713 #define WL_NAN_DP_END_V2_FLAG_NO_RETRY 0x0002u 14714 14715 /* WL_NAN_CMD_DATA_DATAEND_V2 */ 14716 typedef struct wl_nan_dp_end_v2 14717 { 14718 uint8 ndp_id; /* initiator's NDP ID or local NDP ID */ 14719 uint8 status; 14720 struct ether_addr indi; /* initiator's ndi */ 14721 uint16 flags; /* flags to enable/disable retry, etc. */ 14722 uint16 opt_len; /* total length of optional tlvs */ 14723 uint8 opt_tlv[]; /* optional tlvs in bcm_xtlv_t type */ 14724 } wl_nan_dp_end_v2_t; 14725 14726 typedef struct wl_nan_dp_schedupd { 14727 uint8 type; /* 0: unicast, 1: multicast */ 14728 uint8 flags; 14729 struct ether_addr addr; /* peer NMI or multicast addr */ 14730 wl_nan_dp_qos_t qos; 14731 wl_nan_ndl_qos_t ndl_qos; /* ndl qos */ 14732 uint8 map_id; 14733 uint8 pad; 14734 uint16 hostseq; 14735 } wl_nan_dp_schedupd_t; 14736 14737 /* set: update with notification, unset: NDL setup handshake */ 14738 #define WL_NAN_DP_SCHEDUPD_NOTIF (1 << 0) 14739 14740 /* list ndp ids */ 14741 typedef struct wl_nan_ndp_id_list { 14742 uint16 ndp_count; 14743 uint8 lndp_id[]; 14744 } wl_nan_ndp_id_list_t; 14745 14746 /* nan2 status */ 14747 typedef struct ndp_session { 14748 uint8 lndp_id; 14749 uint8 state; 14750 uint8 pub_id; 14751 uint8 pad; 14752 } ndp_session_t; 14753 14754 typedef struct wl_nan_ndp_status { 14755 struct ether_addr peer_nmi; 14756 struct ether_addr peer_ndi; 14757 ndp_session_t session; 14758 struct ether_addr lndi; 14759 uint8 pad[2]; 14760 } wl_nan_ndp_status_t; 14761 14762 #define NAN_DP_OPAQUE_INFO_DP_RESP 0x01 14763 #define NAN_DP_OPAQUE_INFO_DP_CONF 0x02 14764 14765 typedef struct wl_nan_dp_opaque_info { 14766 uint8 frm_mask; /* dp_resp / dp_conf as defined above. */ 14767 struct ether_addr initiator_ndi; /* NDI to match in the dp_req. */ 14768 uint8 pub_id; /* publish id where the opaque data is included. */ 14769 uint8 len; /* len of opaque_info[]. */ 14770 uint8 pad[3]; 14771 uint8 opaque_info[0]; 14772 } wl_nan_dp_opaque_info_t; 14773 14774 /* events */ 14775 #define NAN_DP_SESSION_UNICAST 0 14776 #define NAN_DP_SESSION_MULTICAST 1 14777 #define NAN_DP_SECURITY_NONE 0 14778 #define NAN_DP_SECURITY_CSID 1 14779 #define NAN_DP_SECURITY_MK 2 14780 #define WL_NAN_DATA_NMSGID_LEN 8 /* 8 bytes as per nan spec */ 14781 14782 /* DP TERM event causes */ 14783 #define WL_NAN_DP_TERM_WITH_INACTIVITY 1u 14784 #define WL_NAN_DP_TERM_WITH_FSM_DESTROY 2u 14785 #define WL_NAN_DP_TERM_WITH_PEER_DP_END 3u 14786 #define WL_NAN_DP_TERM_WITH_STALE_NDP 4u 14787 #define WL_NAN_DP_TERM_WITH_DISABLE 5u 14788 #define WL_NAN_DP_TERM_WITH_NDI_DEL 6u 14789 #define WL_NAN_DP_TERM_WITH_PEER_HB_FAIL 7u 14790 #define WL_NAN_DP_TERM_WITH_HOST_IOVAR 8u 14791 #define WL_NAN_DP_TERM_WITH_ESTB_FAIL 9u 14792 #define WL_NAN_DP_TERM_WITH_SCHED_REJECT 10u 14793 14794 /* Common event structure for Nan Datapath 14795 * Used for sending NDP Indication, Response, Confirmation, Securty Install and Establish events 14796 */ 14797 typedef struct wl_nan_ev_datapath_cmn { 14798 uint8 type; 14799 /* ndp_id is valid only if type is unicast */ 14800 uint8 ndp_id; 14801 uint8 pub_id; 14802 uint8 security; 14803 /* Following two fields are valid only if type is unicast */ 14804 struct ether_addr initiator_ndi; 14805 struct ether_addr responder_ndi; 14806 struct ether_addr peer_nmi; 14807 uint8 status; 14808 uint8 role; 14809 /* Following two fields are valid only if type is multicast */ 14810 uint8 nmsg_id[WL_NAN_DATA_NMSGID_LEN]; 14811 uint8 mc_id; 14812 uint8 event_cause; 14813 uint16 opt_tlv_len; 14814 uint8 opt_tlvs[]; 14815 } wl_nan_ev_datapath_cmn_t; 14816 14817 /* this is obsolete - DON'T USE */ 14818 typedef struct wl_nan_ev_datapath_end { 14819 uint8 ndp_id; 14820 uint8 status; 14821 uint8 pad[2]; 14822 struct ether_addr peer_nmi; 14823 struct ether_addr peer_ndi; 14824 } wl_nan_ev_datapath_end_t; 14825 14826 typedef struct wl_tsf { 14827 uint32 tsf_l; 14828 uint32 tsf_h; 14829 } wl_tsf_t; 14830 14831 typedef struct wl_nan_ev_rx_bcn { 14832 wl_tsf_t tsf; 14833 uint16 bcn_len; 14834 uint8 pad[2]; 14835 uint8 bcn[0]; 14836 } wl_nan_ev_rx_bcn_t; 14837 14838 /* reason of host assist request */ 14839 enum wl_nan_host_assist_reason { 14840 WL_NAN_HAST_REASON_NONE = 0, 14841 14842 /* reason for host assist request */ 14843 WL_NAN_HAST_REASON_NO_CRB = 1, /* NDL: no common NA */ 14844 WL_NAN_HAST_REASON_NDC = 2, /* NDL: NDC not compliant */ 14845 WL_NAN_HAST_REASON_IMMUT = 3, /* NDL: peer immutable schedule */ 14846 WL_NAN_HAST_REASON_RNG = 4, /* NDL: ranging schedule */ 14847 WL_NAN_HAST_REASON_QOS = 5, /* NDL: QoS not satisfied */ 14848 WL_NAN_HAST_REASON_SVC_NDI_MISSING = 6, /* SD: SVC NDI missing */ 14849 WL_NAN_HAST_REASON_PEER_SCB_NORESOURCE = 7, /* NDP: no more peer scb available */ 14850 WL_NAN_HAST_REASON_NDP_PMK_MISSING = 8, /* NDP: PMK needed from host */ 14851 WL_NAN_HAST_REASON_SVC_NDI_AND_PMK_MISSING = 9 /* PMK and SVC NDI needed from host */ 14852 }; 14853 typedef uint8 wl_nan_host_assist_reason_t; 14854 14855 /* WL_NAN_XTLV_HOST_ASSIST_REQ */ 14856 typedef struct wl_nan_host_assist_req { 14857 struct ether_addr peer_nmi; /* peer nmi */ 14858 struct ether_addr initiator_ndi; /* initiator ndi */ 14859 uint8 indp_id; /* initiator NDP ID */ 14860 wl_nan_frame_type_t frm_type; /* received NAF type */ 14861 wl_nan_host_assist_reason_t reason; /* reason of host assist request */ 14862 uint8 pub_id; /* Publish ID (valid for WL_NAN_FRM_TYPE_DP_REQ) */ 14863 uint8 pad[2]; 14864 } wl_nan_host_assist_req_t; 14865 14866 /* nan sub-features */ 14867 enum wl_nan_fw_cap_flag1 { 14868 WL_NAN_FW_CAP_FLAG_NONE = 0x00000000, /* dummy */ 14869 WL_NAN_FW_CAP_FLAG1_AVAIL = 0x00000001, 14870 WL_NAN_FW_CAP_FLAG1_DISC = 0x00000002, 14871 WL_NAN_FW_CAP_FLAG1_DATA = 0x00000004, 14872 WL_NAN_FW_CAP_FLAG1_SEC = 0x00000008, 14873 WL_NAN_FW_CAP_FLAG1_RANGE = 0x00000010, 14874 WL_NAN_FW_CAP_FLAG1_WFA_TB = 0x00000020, 14875 WL_NAN_FW_CAP_FLAG1_DAM = 0x00000040, 14876 WL_NAN_FW_CAP_FLAG1_DAM_STRICT = 0x00000080, 14877 WL_NAN_FW_CAP_FLAG1_DAM_AUTO = 0x00000100, 14878 WL_NAN_FW_CAP_FLAG1_DBG = 0x00000200, 14879 WL_NAN_FW_CAP_FLAG1_BCMC_IN_NDC = 0x00000400, 14880 WL_NAN_FW_CAP_FLAG1_CHSTATS = 0x00000800, 14881 WL_NAN_FW_CAP_FLAG1_ASSOC_COEX = 0x00001000, 14882 WL_NAN_FW_CAP_FLAG1_FASTDISC = 0x00002000, 14883 WL_NAN_FW_CAP_FLAG1_NO_ID_GEN = 0x00004000, 14884 WL_NAN_FW_CAP_FLAG1_DP_OPAQUE_DATA = 0x00008000, 14885 WL_NAN_FW_CAP_FLAG1_NSR2 = 0x00010000, 14886 WL_NAN_FW_CAP_FLAG1_NSR2_SAVE = 0x00020000, 14887 WL_NAN_FW_CAP_FLAG1_NANHO = 0x00040000, 14888 WL_NAN_FW_CAP_FLAG1_NDPE = 0x00080000, 14889 WL_NAN_FW_CAP_FLAG1_OOB_AF = 0x00100000, 14890 WL_NAN_FW_CAP_FLAG1_PMK_PER_NDP = 0x00200000 14891 }; 14892 14893 /* WL_NAN_XTLV_GEN_FW_CAP */ 14894 typedef struct wl_nan_fw_cap { 14895 uint32 flags1; /* nan sub-features compiled in firmware */ 14896 uint32 flags2; /* for more sub-features in future */ 14897 uint8 max_svc_publishes; /* max num of service publish */ 14898 uint8 max_svc_subscribes; /* max num of service subscribe */ 14899 uint8 max_lcl_sched_maps; /* max num of local schedule map */ 14900 uint8 max_lcl_ndc_entries; /* max num of local NDC entry */ 14901 uint8 max_lcl_ndi_interfaces; /* max num of local NDI interface */ 14902 uint8 max_peer_entries; /* max num of peer entry */ 14903 uint8 max_ndp_sessions; /* max num of NDP session */ 14904 uint8 max_concurrent_nan_clusters; /* max num of concurrent clusters */ 14905 uint16 max_service_name_len; /* max service name length */ 14906 uint16 max_match_filter_len; /* max match filter length */ 14907 uint16 max_total_match_filter_len; /* max total match filter length */ 14908 uint16 max_service_specific_info_len; /* max service specific info length */ 14909 uint16 max_vsa_data_len; /* max vendor specific attrib data length */ 14910 uint16 max_mesh_data_len; /* max mesh data length */ 14911 uint16 max_app_info_len; /* max app info length */ 14912 uint16 max_sdea_svc_specific_info_len; /* max sdea ser specific info length */ 14913 uint8 max_queued_tx_followup_msgs; /* max no. of queued tx followup msgs */ 14914 uint8 max_subscribe_address; /* max subscribe addresses supported */ 14915 uint8 ndp_supported_bands; /* number of ndp supported bands */ 14916 uint8 is_ndp_security_supported; /* if secure ndp is supported */ 14917 uint8 cipher_suites_supported_mask; /* bitmask for suites supported */ 14918 uint8 pad[3]; 14919 } wl_nan_fw_cap_t; 14920 14921 /* WL_NAN_XTLV_GEN_FW_CAP_V2 */ 14922 typedef struct wl_nan_fw_cap_v2 { 14923 uint32 flags1; /* nan sub-features compiled in firmware */ 14924 uint32 flags2; /* for more sub-features in future */ 14925 uint8 max_svc_publishes; /* max num of service publish */ 14926 uint8 max_svc_subscribes; /* max num of service subscribe */ 14927 uint8 max_lcl_sched_maps; /* max num of local schedule map */ 14928 uint8 max_lcl_ndc_entries; /* max num of local NDC entry */ 14929 uint8 max_lcl_ndi_interfaces; /* max num of local NDI interface */ 14930 uint8 max_peer_entries; /* max num of peer entry */ 14931 uint8 max_peer_sched_maps; /* max num of peer schedule maps */ 14932 uint8 max_ndp_sessions; /* max num of NDP session */ 14933 uint32 cipher_suites_supported_mask; /* bitmask for supported cipher suites */ 14934 uint32 reserved_uint32_1; /* reserved for future sub-features */ 14935 uint32 reserved_uint32_2; /* reserved for future sub-features */ 14936 uint32 reserved_uint32_3; /* reserved for future sub-features */ 14937 uint32 reserved_uint32_4; /* reserved for future sub-features */ 14938 } wl_nan_fw_cap_v2_t; 14939 14940 /* nan cipher suite support mask bits */ 14941 #define WL_NAN_CIPHER_SUITE_SHARED_KEY_128_MASK 0x01 14942 #define WL_NAN_CIPHER_SUITE_SHARED_KEY_256_MASK 0x02 14943 14944 /* NAN Save Restore */ 14945 #define WL_NAN_NSR2_INFO_MAX_SIZE 2048 /* arbitrary */ 14946 14947 /* WL_NAN_XTLV_NSR2_PEER */ 14948 typedef struct wl_nan_nsr_peer_info { 14949 struct ether_addr nmi; 14950 uint8 l_min_slots; /* local QoS min slots */ 14951 uint8 p_min_slots; /* peer QoS min slots */ 14952 uint16 l_max_latency; /* local QoS max latency */ 14953 uint16 p_max_latency; /* peer QoS max latency */ 14954 uint8 num_map; /* num of NA map */ 14955 uint8 pad; 14956 uint16 attrs_len; /* total len of following attrs */ 14957 uint8 attrs[]; /* peer attributes (NA/NDC/ULW/DevCap/Element container) */ 14958 } wl_nan_nsr_peer_info_t; 14959 14960 enum wl_nan_nsr_ndp_flag { 14961 WL_NAN_NSR_NDP_FLAG_LCL_INITATOR = 0x0001, 14962 WL_NAN_NSR_NDP_FLAG_MCAST = 0x0002 14963 }; 14964 typedef uint16 wl_nan_nsr_ndp_flag_t; 14965 14966 /* WL_NAN_XTLV_NSR2_NDP */ 14967 typedef struct wl_nan_nsr_ndp_info { 14968 struct ether_addr peer_nmi; 14969 struct ether_addr peer_ndi; 14970 struct ether_addr lcl_ndi; 14971 uint16 flags; /* wl_nan_nsr_ndp_flag_t */ 14972 uint8 pub_id; /* publish id */ 14973 uint8 indp_id; /* initiator's ndp id */ 14974 uint8 last_token; /* last NDP dialog token */ 14975 uint8 pad; 14976 } wl_nan_nsr_ndp_info_t; 14977 14978 /* NAN2.0 Ranging definitions */ 14979 14980 /* result indication bit map */ 14981 #define NAN_RANGE_INDICATION_NONE 0 14982 #define NAN_RANGE_INDICATION_CONT (1<<0) 14983 #define NAN_RANGE_INDICATION_INGRESS (1<<1) 14984 #define NAN_RANGE_INDICATION_EGRESS (1<<2) 14985 14986 /* responder flags */ 14987 #define NAN_RANGE_FLAG_AUTO_ACCEPT (1 << 0) 14988 #define NAN_RANGE_FLAG_RESULT_REQUIRED (1 << 1) 14989 14990 typedef struct wl_nan_range_req { 14991 struct ether_addr peer; 14992 uint8 publisher_id; 14993 uint8 indication; /* bit map for result event */ 14994 uint32 resolution; /* default millimeters */ 14995 uint32 ingress; /* ingress limit in mm */ 14996 uint32 egress; /* egress limit in mm */ 14997 uint32 interval; /* max interval(in TU) b/w two ranging measurements */ 14998 } wl_nan_range_req_t; 14999 15000 #define NAN_RNG_REQ_IOV_LEN 24 15001 15002 typedef uint8 wl_nan_range_id; 15003 15004 typedef struct wl_nan_range_resp { 15005 wl_nan_range_id range_id; 15006 uint8 flags; /* auto response, range result required */ 15007 uint8 status; /* accept, reject */ 15008 uint8 indication; /* bit map for result event */ 15009 uint32 resolution; /* default millimeters */ 15010 uint32 ingress; /* ingress limit in mm */ 15011 uint32 egress; /* egress limit in mm */ 15012 uint32 interval; /* max interval(in TU) b/w two ranging measurements */ 15013 } wl_nan_range_resp_t; 15014 15015 #define NAN_RNG_RESP_IOV_LEN 20 15016 15017 #define NAN_RNG_TERM_FLAG_IMMEDIATE (1u << 0u) /* Do not wait for TXS */ 15018 #define NAN_RNG_TERM_FLAG_SILENT_TEARDOWN (1u << 1u) /* Do not TX rng_term */ 15019 #define NAN_RNG_TERM_FLAG_EVENT_HOST (1u << 2u) /* Notify event to host */ 15020 #define NAN_RNG_TERM_FLAG_OPT_TLVS (1u << 3u) /* opt tlvs present */ 15021 15022 typedef struct wl_nan_range_cancel_ext { 15023 wl_nan_range_id range_id; 15024 uint8 flags; 15025 uint8 pad[2]; 15026 } wl_nan_range_cancel_ext_t; 15027 15028 #define NAN_RNG_CANCEL_IOV_FIXED_LEN 4u 15029 15030 #define NAN_RNG_MAX_IOV_LEN 255 15031 15032 typedef struct wl_nan_ev_rng_req_ind { 15033 struct ether_addr peer_m_addr; 15034 uint8 rng_id; 15035 /* ftm parameters */ 15036 uint8 max_burst_dur; 15037 uint8 min_ftm_delta; 15038 uint8 max_num_ftm; 15039 uint8 ftm_format_bw; 15040 /* location info availability bit map */ 15041 uint8 lc_info_avail; 15042 /* Last movement indication */ 15043 uint16 last_movement; 15044 uint8 pad[2]; 15045 } wl_nan_ev_rng_req_ind_t; 15046 15047 #define NAN_RNG_REQ_IND_SIZE 14 15048 15049 typedef struct wl_nan_ev_rng_rpt_ind { 15050 uint32 dist_mm; /* in millimeter */ 15051 struct ether_addr peer_m_addr; 15052 uint8 indication; /* indication definitions mentioned above */ 15053 uint8 rng_id; 15054 } wl_nan_ev_rng_rpt_ind_t; 15055 15056 #define NAN_RNG_RPT_IND_SIZE 12 15057 15058 /* number of continuous ranging crbs which can be idle, 15059 * after which ranging session will be terminated. 15060 * Default value is 5. Set to zero for disabling the 15061 * idle timeout functionality 15062 */ 15063 typedef uint8 wl_nan_range_idle_count_t; 15064 15065 /* nan ranging termination reason codes */ 15066 #define NAN_RNG_TERM_REASON_CODE_BASE 100u 15067 #define NAN_RNG_TERM_REASON_CODE(reason_code) \ 15068 (NAN_RNG_TERM_REASON_CODE_BASE + (reason_code)) 15069 15070 /* Reason Code Unspecified */ 15071 #define NAN_RNG_TERM_UNSPECIFIED NAN_RNG_TERM_REASON_CODE(0u) 15072 /* no ftms from peer */ 15073 #define NAN_RNG_TERM_IDLE_TIMEOUT NAN_RNG_TERM_REASON_CODE(1u) 15074 /* On Peer Termination */ 15075 #define NAN_RNG_TERM_PEER_REQ NAN_RNG_TERM_REASON_CODE(2u) 15076 /* On User or Host Termination */ 15077 #define NAN_RNG_TERM_USER_REQ NAN_RNG_TERM_REASON_CODE(3u) 15078 /* On FSM Timeout, waiting for Resp from peer */ 15079 #define NAN_RNG_TERM_RNG_RESP_TIMEOUT NAN_RNG_TERM_REASON_CODE(4u) 15080 /* On range resp, reject from peer */ 15081 #define NAN_RNG_TERM_RNG_RESP_REJ NAN_RNG_TERM_REASON_CODE(5u) 15082 /* On range req/resp txs fail */ 15083 #define NAN_RNG_TERM_RNG_TXS_FAIL NAN_RNG_TERM_REASON_CODE(6u) 15084 15085 typedef struct wl_nan_ev_rng_term_ind { 15086 struct ether_addr peer_m_addr; 15087 uint8 reason_code; 15088 uint8 rng_id; 15089 } wl_nan_ev_rng_term_ind_t; 15090 15091 #define NAN_RNG_TERM_IND_SIZE 8 15092 15093 typedef struct wl_nan_ev_rng_resp { 15094 struct ether_addr peer_m_addr; 15095 uint8 status; 15096 uint8 rng_id; 15097 } wl_nan_ev_rng_resp_t; 15098 15099 /* Used by NDL schedule events - 15100 * WL_NAN_EVENT_PEER_SCHED_UPD_NOTIF, WL_NAN_EVENT_PEER_SCHED_REQ 15101 * WL_NAN_EVENT_PEER_SCHED_RESP, WL_NAN_EVENT_PEER_SCHED_CONF 15102 */ 15103 typedef struct wl_nan_ev_sched_info { 15104 struct ether_addr peer_nmi; 15105 uint8 ndl_status; /* applies only to sched resp/conf */ 15106 uint8 pad; 15107 uint16 opt_tlv_len; 15108 uint8 opt_tlvs[]; 15109 } wl_nan_ev_sched_info_t; 15110 15111 /* WL_NAN_EVENT_CHAN_BOUNDARY */ 15112 typedef struct wl_nan_chbound_info { 15113 uint32 cluster_tsf_h; /* Current Cluster TSF High */ 15114 uint32 cluster_tsf_l; /* Current Cluster TSF Low */ 15115 uint16 cur_chspec; 15116 uint16 opt_tlvs_len; 15117 uint8 opt_tlvs[]; 15118 } wl_nan_chbound_info_t; 15119 15120 /* channel stats (includes nan & non-nan) */ 15121 15122 /* WL_NAN_XTLV_CCA_STATS */ 15123 typedef struct wl_nan_cca_stats { 15124 uint16 chanspec; 15125 uint8 pad[2]; 15126 uint32 sample_dur; 15127 15128 uint32 congest_ibss; 15129 uint32 congest_obss; 15130 uint32 interference; 15131 } wl_nan_cca_stats_t; 15132 15133 /* WL_NAN_XTLV_PER_STATS */ 15134 typedef struct wl_nan_per_stats_s { 15135 uint16 chanspec; 15136 uint8 pad[2]; 15137 uint32 sample_dur; 15138 15139 uint32 txframe; /* tx data frames */ 15140 uint32 txretrans; /* tx mac retransmits */ 15141 uint32 txerror; /* tx data errors */ 15142 uint32 txctl; /* tx management frames */ 15143 uint32 txserr; /* tx status errors */ 15144 15145 uint32 rxframe; /* rx data frames */ 15146 uint32 rxerror; /* rx data errors */ 15147 uint32 rxctl; /* rx management frames */ 15148 15149 uint32 txbar; /* tx bar */ 15150 uint32 rxbar; /* rx bar */ 15151 uint32 txaction; /* tx action frame */ 15152 uint32 rxaction; /* rx action frame */ 15153 uint32 txlost; /* lost packets reported in txs */ 15154 uint32 rxback; /* rx block ack */ 15155 uint32 txback; /* tx bloak ack */ 15156 } wl_nan_per_stats_t; 15157 15158 /* fast discovery beacon config 15159 * WL_NAN_XTLV_CFG_FDISC_TBMP 15160 */ 15161 typedef struct wl_nan_fastdisc_s { 15162 uint8 id; 15163 uint8 bitmap_len; 15164 uint8 pad[2]; 15165 uint8 bitmap[]; 15166 } wl_nan_fastdisc_t; 15167 15168 #define WL_NAN_FASTDISC_CFG_SIZE 1024 /* arbitrary */ 15169 15170 #ifdef WL_NANHO 15171 /* ****************** NAN Host offload specific strucures ****************** */ 15172 15173 enum wl_nan_rx_mgmt_frm_type { 15174 WL_NAN_RX_MGMT_FRM_BCN = 0, 15175 WL_NAN_RX_MGMT_FRM_SDF = 1, 15176 WL_NAN_RX_MGMT_FRM_NAF = 2 15177 }; 15178 typedef uint8 wl_nan_rx_mgmt_frm_type_t; 15179 15180 /* WL_NAN_EVENT_RX_MGMT_FRM */ 15181 typedef struct wl_nan_event_rx_mgmt_frm { 15182 uint8 frm_type; /* wl_nan_rx_mgmt_frm_type_t */ 15183 uint8 pad; 15184 uint16 frm_len; 15185 uint8 frm[]; 15186 } wl_nan_event_rx_mgmt_frm_t; 15187 15188 #define WL_NAN_NANHO_UPDATE_MAX_SIZE 2048 /* arbitrary */ 15189 15190 enum wl_nan_peer_entry_action { 15191 WL_NAN_PEER_ENTRY_ACT_ADD = 0, /* add peer entry */ 15192 WL_NAN_PEER_ENTRY_ACT_REMOVE = 1 /* remove peer entry */ 15193 }; 15194 typedef uint8 wl_nan_peer_entry_action_t; 15195 15196 /* WL_NAN_XTLV_NANHO_PEER_ENTRY */ 15197 typedef struct wl_nan_peer_entry 15198 { 15199 struct ether_addr nmi; /* nmi of peer device */ 15200 uint8 action; /* wl_nan_peer_entry_action_t */ 15201 uint8 pad; 15202 } wl_nan_peer_entry_t; 15203 15204 enum wl_nan_dcaplist_action { 15205 WL_NAN_DCAPLIST_ACT_UPDATE = 0, /* update or add */ 15206 WL_NAN_DCAPLIST_ACT_REMOVE = 1 /* remove (only for peer dcap cache entry) */ 15207 }; 15208 typedef uint8 wl_nan_dcaplist_action_t; 15209 15210 /* WL_NAN_XTLV_NANHO_DCAPLIST */ 15211 typedef struct wl_nan_dev_cap_list 15212 { 15213 struct ether_addr nmi; /* null for local device */ 15214 uint8 action; /* wl_nan_dcaplist_action_t */ 15215 /* optional fields for WL_NAN_DCAPLIST_ACT_UPDATE */ 15216 uint8 num_maps; 15217 uint8 dcap[]; /* list of nan_dev_cap_t */ 15218 } wl_nan_dev_cap_list_t; 15219 15220 typedef struct wl_nan_dev_chan_sched { 15221 uint16 num_slots; /* number of slot in schedule */ 15222 uint16 period; /* period of channel schedule (TU) */ 15223 uint8 slot_dur; /* slot duration (TU) */ 15224 uint8 map_id; /* map id (TBD) */ 15225 uint8 pad[2]; 15226 uint8 data[]; 15227 /* chanspec_t chan_sched[num_slot] */ 15228 /* uint8 slot_info[num_slot] */ 15229 } wl_nan_dev_chan_sched_t; 15230 15231 /* WL_NAN_XTLV_NANHO_DCSLIST */ 15232 typedef struct wl_nan_dev_chan_sched_list { 15233 struct ether_addr nmi; /* null for local device */ 15234 uint8 num_maps; 15235 uint8 pad; 15236 wl_nan_dev_chan_sched_t dcs[]; 15237 } wl_nan_dev_chan_sched_list_t; 15238 15239 /* WL_NAN_XTLV_NANHO_BLOB */ 15240 typedef struct wl_nan_dev_blob { 15241 struct ether_addr nmi; /* null for local device */ 15242 uint16 blob_len; /* blob len in blob[] buffer */ 15243 uint8 blob_type; 15244 uint8 pad[3]; 15245 uint8 blob[]; 15246 } wl_nan_dev_blob_t; 15247 15248 typedef struct wl_nan_peer_ndl_state { 15249 struct ether_addr nmi; 15250 uint8 ndl_state; /* nan_peer_ndl_state_t */ 15251 uint8 pad; 15252 } wl_nan_peer_ndl_state_t; 15253 15254 enum wl_nan_ndp_state_action { 15255 WL_NAN_NDP_STATE_ACT_ESTABLISHED = 0, 15256 WL_NAN_NDP_STATE_ACT_TERMINATED = 1 15257 }; 15258 typedef uint8 wl_nan_ndp_state_action_t; 15259 15260 /* WL_NAN_XTLV_NANHO_NDP_STATE */ 15261 typedef struct wl_nan_ndp_state { 15262 struct ether_addr peer_nmi; 15263 struct ether_addr peer_ndi; 15264 struct ether_addr lcl_ndi; 15265 uint8 action; /* wl_nan_ndp_state_action_t */ 15266 uint8 pad; 15267 /* TODO: secured NDP information */ 15268 } wl_nan_ndp_state_t; 15269 15270 /* *************** end of NAN Host offload specific strucures ************** */ 15271 #endif /* WL_NANHO */ 15272 15273 /* ********************* end of NAN section ******************************** */ 15274 /* endif WL_NAN */ 15275 15276 #define P2P_NAN_IOC_BUFSZ 512 /* some sufficient ioc buff size */ 15277 #define WL_P2P_NAN_IOCTL_VERSION 0x1 15278 15279 /* container for p2p nan iovtls & events */ 15280 typedef struct wl_p2p_nan_ioc { 15281 uint16 version; /* interface command or event version */ 15282 uint16 id; /* p2p nan ioctl cmd ID */ 15283 uint16 len; /* total length of data[] */ 15284 uint16 pad; /* padding */ 15285 uint8 data []; /* var len payload of bcm_xtlv_t type */ 15286 } wl_p2p_nan_ioc_t; 15287 15288 /* p2p nan cmd IDs */ 15289 enum wl_p2p_nan_cmds { 15290 /* p2p nan cfg ioctls */ 15291 WL_P2P_NAN_CMD_ENABLE = 1, 15292 WL_P2P_NAN_CMD_CONFIG = 2, 15293 WL_P2P_NAN_CMD_DEL_CONFIG = 3, 15294 WL_P2P_NAN_CMD_GET_INSTS = 4 15295 }; 15296 15297 #define WL_P2P_NAN_CONFIG_VERSION 1 15298 15299 #define WL_P2P_NAN_DEVICE_P2P 0x0 15300 #define WL_P2P_NAN_DEVICE_GO 0x1 15301 #define WL_P2P_NAN_DEVICE_GC 0x2 15302 #define WL_P2P_NAN_DEVICE_INVAL 0xFF 15303 15304 /* NAN P2P operation */ 15305 typedef struct p2p_nan_config { 15306 uint16 version; /* wl_p2p_nan_config_t structure version */ 15307 uint16 len; /* total length including version and variable IE */ 15308 uint32 flags; /* 0x1 to NEW, 0x2 to ADD, 0x4 to DEL */ 15309 uint8 inst_id; /* publisher/subscriber id */ 15310 uint8 inst_type; /* publisher/subscriber */ 15311 uint8 dev_role; /* P2P device role: 'P2P','GO' or 'GC' */ 15312 uint8 pad1; /* padding */ 15313 uint8 resolution; /* Availability bitmap resolution */ 15314 uint8 repeat; /* Whether Availabilty repeat across DW */ 15315 uint16 ie_len; /* variable ie len */ 15316 struct ether_addr dev_mac; /* P2P device addres */ 15317 uint16 pad2; /* Padding */ 15318 uint32 avail_bmap; /* availability interval bitmap */ 15319 uint32 chanspec; /* Chanspec */ 15320 uint8 ie[]; /* hex ie data */ 15321 } wl_p2p_nan_config_t; 15322 15323 #define WL_P2P_NAN_SERVICE_LIST_VERSION 1 15324 typedef enum wl_nan_service_type { 15325 WL_NAN_SVC_INST_PUBLISHER = 1, 15326 WL_NAN_SVC_INST_SUBSCRIBER = 2 15327 } wl_nan_service_type_t; 15328 15329 #define WL_P2P_NAN_CONFIG_NEW 0x1 15330 #define WL_P2P_NAN_CONFIG_ADD 0x2 15331 #define WL_P2P_NAN_CONFIG_DEL 0x4 15332 15333 typedef struct wl_nan_svc_inst { 15334 uint8 inst_id; /* publisher/subscriber id */ 15335 uint8 inst_type; /* publisher/subscriber */ 15336 } wl_nan_svc_inst_t; 15337 15338 typedef struct wl_nan_svc_inst_list { 15339 uint16 version; /* this structure version */ 15340 uint16 len; /* total length including version and variable svc list */ 15341 uint16 count; /* service instance count */ 15342 uint16 pad; /* padding */ 15343 wl_nan_svc_inst_t svc[1]; /* service instance list */ 15344 } wl_nan_svc_inst_list_t; 15345 15346 #define NAN_POST_DISC_P2P_DATA_VER 1 15347 /* This structure will be used send peer p2p data with 15348 * NAN discovery result 15349 */ 15350 typedef struct nan_post_disc_p2p_data { 15351 uint8 ver; /* this structure version */ 15352 uint8 dev_role; /* P2P Device role */ 15353 uint8 resolution; /* Availability bitmap resolution */ 15354 uint8 repeat; /* Whether Availabilty repeat across DW */ 15355 struct ether_addr dev_mac; /* P2P device addres */ 15356 uint16 pad1; /* Padding */ 15357 uint32 chanspec; /* Chanspec */ 15358 uint32 avl_bmp; /* availability interval bitmap */ 15359 } nan_post_disc_p2p_data_t; 15360 15361 enum { 15362 WL_AVAIL_NONE = 0x0000, 15363 WL_AVAIL_LOCAL = 0x0001, 15364 WL_AVAIL_PEER = 0x0002, 15365 WL_AVAIL_NDC = 0x0003, 15366 WL_AVAIL_IMMUTABLE = 0x0004, 15367 WL_AVAIL_RESPONSE = 0x0005, 15368 WL_AVAIL_COUNTER = 0x0006, 15369 WL_AVAIL_RANGING = 0x0007, 15370 WL_AVAIL_UPD_POT = 0x0008, /* modify potential, keep committed/conditional */ 15371 WL_AVAIL_UPD_COM_COND = 0x0009, /* modify committed/conditional, keep potential */ 15372 WL_AVAIL_REMOVE_MAP = 0x000A, /* remove map */ 15373 WL_AVAIL_FRM_TYPE = 0x000B, /* specify frame types containing NA */ 15374 WL_AVAIL_TYPE_MAX = WL_AVAIL_FRM_TYPE /* New ones before and update */ 15375 }; 15376 #define WL_AVAIL_TYPE_MASK 0x000F 15377 #define WL_AVAIL_FLAG_REMOVE 0x2000 /* remove schedule attr of given type & map id */ 15378 #define WL_AVAIL_FLAG_SELECTED_NDC 0x4000 15379 #define WL_AVAIL_FLAG_RAW_MODE 0x8000 15380 #define WL_AVAIL_FLAGS_MASK 0xFF00 15381 #define WL_AVAIL_FLAGS_SHIFT 8 15382 15383 typedef int16 wl_avail_flags_t; 15384 15385 /* availability entry flags */ 15386 enum { 15387 WL_AVAIL_ENTRY_NONE = 0x0000, 15388 WL_AVAIL_ENTRY_COM = 0x0001, /* committed */ 15389 WL_AVAIL_ENTRY_POT = 0x0002, /* potential */ 15390 WL_AVAIL_ENTRY_COND = 0x0004, /* conditional */ 15391 WL_AVAIL_ENTRY_PAGED = 0x0008, /* P-NDL */ 15392 WL_AVAIL_ENTRY_USAGE = 0x0030, /* usage preference */ 15393 WL_AVAIL_ENTRY_BIT_DUR = 0x00C0, /* bit duration */ 15394 WL_AVAIL_ENTRY_BAND_PRESENT = 0x0100, /* band present */ 15395 WL_AVAIL_ENTRY_CHAN_PRESENT = 0x0200, /* channel information present */ 15396 WL_AVAIL_ENTRY_CHAN_ENTRY_PRESENT = 0x0400, /* channel entry (opclass+bitmap) */ 15397 /* free to use 0x0800 */ 15398 WL_AVAIL_ENTRY_RXNSS = 0xF000 /* max num of spatial stream RX */ 15399 }; 15400 15401 /* bit duration */ 15402 enum { 15403 WL_AVAIL_BIT_DUR_16 = 0, /* 16TU */ 15404 WL_AVAIL_BIT_DUR_32 = 1, /* 32TU */ 15405 WL_AVAIL_BIT_DUR_64 = 2, /* 64TU */ 15406 WL_AVAIL_BIT_DUR_128 = 3, /* 128TU */ 15407 }; 15408 15409 /* period */ 15410 enum { 15411 WL_AVAIL_PERIOD_0 = 0, /* 0TU */ 15412 WL_AVAIL_PERIOD_128 = 1, /* 128TU */ 15413 WL_AVAIL_PERIOD_256 = 2, /* 256TU */ 15414 WL_AVAIL_PERIOD_512 = 3, /* 512TU */ 15415 WL_AVAIL_PERIOD_1024 = 4, /* 1024TU */ 15416 WL_AVAIL_PERIOD_2048 = 5, /* 2048TU */ 15417 WL_AVAIL_PERIOD_4096 = 6, /* 4096TU */ 15418 WL_AVAIL_PERIOD_8192 = 7, /* 8192TU */ 15419 }; 15420 15421 /* band */ 15422 enum { 15423 WL_AVAIL_BAND_NONE = 0, /* reserved */ 15424 WL_AVAIL_BAND_SUB1G = 1, /* sub-1 GHz */ 15425 WL_AVAIL_BAND_2G = 2, /* 2.4 GHz */ 15426 WL_AVAIL_BAND_3G = 3, /* reserved (for 3.6 GHz) */ 15427 WL_AVAIL_BAND_5G = 4, /* 4.9 and 5 GHz */ 15428 WL_AVAIL_BAND_60G = 5, /* reserved (for 60 GHz) */ 15429 }; 15430 15431 #define WL_AVAIL_ENTRY_TYPE_MASK 0x000F 15432 #define WL_AVAIL_ENTRY_USAGE_MASK 0x0030 /* up to 4 usage preferences */ 15433 #define WL_AVAIL_ENTRY_USAGE_SHIFT 4 15434 #define WL_AVAIL_ENTRY_USAGE_VAL(_flags) (((_flags) & WL_AVAIL_ENTRY_USAGE_MASK) \ 15435 >> WL_AVAIL_ENTRY_USAGE_SHIFT) 15436 15437 #define WL_AVAIL_ENTRY_BIT_DUR_MASK 0x00C0 /* 0:16TU, 1:32TU, 2:64TU, 3:128TU */ 15438 #define WL_AVAIL_ENTRY_BIT_DUR_SHIFT 6 15439 #define WL_AVAIL_ENTRY_BIT_DUR_VAL(_flags) (((_flags) & WL_AVAIL_ENTRY_BIT_DUR_MASK) \ 15440 >> WL_AVAIL_ENTRY_BIT_DUR_SHIFT) 15441 15442 #define WL_AVAIL_ENTRY_BAND_MASK 0x0100 /* 0=band not present, 1=present */ 15443 #define WL_AVAIL_ENTRY_BAND_SHIFT 8 15444 15445 #define WL_AVAIL_ENTRY_CHAN_MASK 0x0200 /* 0=channel info not present, 1=present */ 15446 #define WL_AVAIL_ENTRY_CHAN_SHIFT 9 15447 15448 #define WL_AVAIL_ENTRY_CHAN_ENTRY_MASK 0x0400 /* 0=chanspec, 1=hex channel entry */ 15449 #define WL_AVAIL_ENTRY_CHAN_ENTRY_SHIFT 10 15450 15451 #define WL_AVAIL_ENTRY_RXNSS_MASK 0xF000 15452 #define WL_AVAIL_ENTRY_RXNSS_SHIFT 12 15453 #define WL_AVAIL_ENTRY_RXNSS_VAL(_flags) (((_flags) & WL_AVAIL_ENTRY_RXNSS_MASK) \ 15454 >> WL_AVAIL_ENTRY_RXNSS_SHIFT) 15455 #define WL_AVAIL_ENTRY_RXNSS_MAX 15 /* 0-15 */ 15456 15457 /* mask for channel_entry (to be obsoleted) */ 15458 #define WL_AVAIL_ENTRY_OPCLASS_MASK 0xFF 15459 #define WL_AVAIL_ENTRY_CHAN_BITMAP_MASK 0xFF00 15460 #define WL_AVAIL_ENTRY_CHAN_BITMAP_SHIFT 8 15461 #define WL_AVAIL_ENTRY_CHAN_BITMAP_VAL(_info) (((_info) & WL_AVAIL_ENTRY_CHAN_BITMAP_MASK) \ 15462 >> WL_AVAIL_ENTRY_CHAN_BITMAP_SHIFT) 15463 15464 /* Used for raw channel entry field input */ 15465 #define MAX_CHAN_ENTRY_LEN 6 15466 15467 typedef struct wl_avail_entry { 15468 uint16 length; /* total length */ 15469 uint16 start_offset; /* in TUs, multiply by 16 for total offset */ 15470 union { 15471 uint32 channel_info; /* either chanspec or hex channel entry (opclass + 15472 * bitmap per NAN spec), as indicated by setting 15473 * WL_AVAIL_ENTRY_HEX_CHAN_ENTRY flag 15474 */ 15475 uint32 band; /* defined by WL_BAND enum, 2=2.4GHz, 4=5GHz */ 15476 uint8 channel_entry[MAX_CHAN_ENTRY_LEN]; 15477 uint8 align[8]; /* aligned len of union in structure (not for use) 15478 * if member of union is changed, 15479 * update length of align[] accordingly. 15480 */ 15481 } u; /* band or channel value, 0=all band/channels */ 15482 uint8 sched_map_id; /* avail map id associated with sched entry */ 15483 uint8 pad; 15484 uint8 period; /* in TUs, defined by WL_AVAIL_PERIOD enum 15485 * 1:128, 2:256, 3:512, 4:1024, 5:2048, 6:4096, 15486 * 7:8192 15487 */ 15488 uint8 bitmap_len; 15489 uint16 flags; /* defined by avail entry flags enum: 15490 * type, usage pref, bit duration, rx nss, 15491 * and band, channel or channel entry 15492 */ 15493 uint8 bitmap[]; /* time bitmap */ 15494 } wl_avail_entry_t; 15495 15496 #define WL_AVAIL_VERSION 1 /* current wl_avail version */ 15497 15498 typedef struct wl_avail { 15499 uint16 length; /* total length */ 15500 uint16 flags; /* LSB - avail type (defined by WL_AVAIL enum) 15501 * MSB - avail flags 15502 */ 15503 uint8 id; /* id used for multiple maps/avail */ 15504 uint8 lndc_id; /* ndc id used in multi-ndc case */ 15505 uint8 version; 15506 uint8 pad; 15507 struct ether_addr addr; /* peer mac address or ndc id */ 15508 uint8 num_entries; 15509 uint8 unused_byte; 15510 /* add additional fields above this line */ 15511 uint8 entry[]; 15512 } wl_avail_t; 15513 15514 #define WL_AVAIL_MIN_LEN(n) ((n) ? OFFSETOF(wl_avail_t, entry) + \ 15515 ((n) * OFFSETOF(wl_avail_entry_t, bitmap)) : 0) 15516 15517 /* unaligned schedule (window) */ 15518 typedef struct wl_avail_ulw { 15519 uint8 id; /* schedule ID */ 15520 uint8 overwrite; /* bit 0: overwrite all 15521 * 1-4: map ID if overwrite all is 0 15522 */ 15523 uint16 flags; 15524 uint32 start; /* start time of first ULW, in us */ 15525 uint32 dur; /* duration of ULW, in us */ 15526 uint32 period; /* time between consecutive ULWs, in us */ 15527 union { 15528 uint32 chanspec; 15529 uint32 band; 15530 uint8 chan_entry[MAX_CHAN_ENTRY_LEN]; 15531 uint8 pad[8]; 15532 } u; 15533 uint8 cntdwn; /* remaining ULWs before schedule ends */ 15534 uint8 pad[3]; 15535 } wl_avail_ulw_t; 15536 15537 /* unset: NAN is not available during ULW, set: NAN is avail depending on ctrl flags */ 15538 #define WL_NAN_ULW_CTRL_PRESENT (1 << 0) 15539 /* unset: band, set: channel */ 15540 #define WL_NAN_ULW_CTRL_TYPE (1 << 1) 15541 /* set: NAN is availabile on specified band/channel */ 15542 #define WL_NAN_ULW_CTRL_AVAIL (1 << 2) 15543 /* channel is provided in raw attribute format */ 15544 #define WL_NAN_ULW_CTRL_RAW_CHAN (1 << 3) 15545 15546 /* nan wfa testmode operations */ 15547 enum { 15548 WL_NAN_WFA_TM_IGNORE_TERMINATE_NAF = 0x00000001, 15549 WL_NAN_WFA_TM_IGNORE_RX_DATA_OUTSIDE_CRB = 0x00000002, 15550 WL_NAN_WFA_TM_ALLOW_TX_DATA_OUTSIDE_CRB = 0x00000004, 15551 WL_NAN_WFA_TM_ENFORCE_NDL_COUNTER = 0x00000008, 15552 WL_NAN_WFA_TM_BYPASS_NDL_PROPOSAL_VALIDATION = 0x00000010, 15553 /* allow data(pings) tx while ndp sec negotiation */ 15554 WL_NAN_WFA_TM_SEC_SEND_PINGS_BYPASS_NDP_SM = 0x00000020, 15555 /* generate and insert incorrect mic */ 15556 WL_NAN_WFA_TM_SEC_INCORRECT_MIC = 0x00000040, 15557 /* send m4 reject deliberately */ 15558 WL_NAN_WFA_TM_SEC_REJECT_STATUS4M4 = 0x00000080, 15559 /* send mgmt frame (for eg. ndp terminate) in clear txt (bypass security) */ 15560 WL_NAN_WFA_TM_SEC_SEND_MGMT_CLEAR = 0x00000100, 15561 /* validate qos */ 15562 WL_NAN_WFA_TM_NDL_QOS_VALIDATE = 0x00000200, 15563 /* firmware generated schedule update */ 15564 WL_NAN_WFA_TM_GEN_SCHED_UPD = 0x00000400, 15565 /* add lower 4-bytes of TSF to configured start time */ 15566 WL_NAN_WFA_TM_ULW_START_TIME = 0x00000800, 15567 /* enable schedule validation for SDF */ 15568 WL_NAN_WFA_TM_SDF_SCHED_VALIDATE = 0x00001000, 15569 /* by pass faw na iovar */ 15570 WL_NAN_WFA_TM_SKIP_RAW_NA_BLOB = 0x00002000, 15571 /* overwrite local NA with peer NA in received frame */ 15572 WL_NAN_WFA_TM_LOCAL_NA_OVERWRITE = 0x00004000, 15573 /* randomize and self configure ndl qos(needed at responder in auto mode) */ 15574 WL_NAN_WFA_TM_SELF_CFG_NDL_QOS = 0x00008000, 15575 /* send NAF frames only in DW */ 15576 WL_NAN_WFA_TM_SEND_NAF_IN_DW = 0x00010000, 15577 /* restrict channels used for countered slots to Ch 6/149 only */ 15578 WL_NAN_WFA_TM_RESTRICT_COUNTER_SLOTS_CHAN = 0x00020000, 15579 /* NDPE negative test case (4.2.5 & 4.2.6) */ 15580 WL_NAN_WFA_TM_NDPE_NEGATIVE_TEST_TB = 0x00040000, 15581 /* Set NDPE(NAN3.0) capable bit in dev cap attr */ 15582 WL_NAN_WFA_TM_ENABLE_NDPE_CAP = 0x00080000, 15583 /* NDPE negative test case (4.2.5.2). Enable both NDP and NDPE attributes */ 15584 WL_NAN_WFA_TM_ENABLE_NDP_NDPE_ATTR = 0x00100000, 15585 15586 /* add above & update mask */ 15587 WL_NAN_WFA_TM_FLAG_MASK = 0x001FFFFF 15588 }; 15589 typedef uint32 wl_nan_wfa_testmode_t; 15590 15591 /* To be removed; replaced by wl_nan_vndr_payload */ 15592 typedef struct wl_nan_vndr_ie { 15593 uint32 flags; /* bitmask indicating which packet(s) contain this IE */ 15594 uint16 body_len; /* length of body (does not include oui field) */ 15595 uint8 pad[2]; 15596 uint8 oui[DOT11_OUI_LEN]; 15597 uint8 pad2; 15598 uint8 body[]; /* vendor IE payload */ 15599 } wl_nan_vndr_ie_t; 15600 15601 typedef struct wl_nan_vndr_payload { 15602 uint32 flags; /* bitmask indicating which packet(s) contain payload */ 15603 uint16 payload_len; /* length of payload */ 15604 uint8 pad[2]; 15605 uint8 payload[]; /* payload to be appended to NAN frame */ 15606 } wl_nan_vndr_payload_t; 15607 15608 typedef struct wl_nan_dev_cap { 15609 uint8 bands[NAN_MAX_BANDS]; 15610 uint8 awake_dw[NAN_MAX_BANDS]; 15611 uint8 overwrite_mapid[NAN_MAX_BANDS]; 15612 uint8 mapid; /* dev cap mapid */ 15613 uint8 all_maps; /* applies to device */ 15614 uint8 paging; 15615 uint8 pad[3]; 15616 } wl_nan_dev_cap_t; 15617 15618 /* arbitrary max len for frame template */ 15619 #define WL_NAN_FRM_TPLT_MAX_LEN 1024 15620 15621 typedef struct wl_nan_frm_tplt { 15622 wl_nan_frame_type_t type; 15623 uint8 pad; 15624 uint16 len; /* length of template */ 15625 uint8 data[]; /* template */ 15626 } wl_nan_frm_tplt_t; 15627 15628 #define RSSI_THRESHOLD_SIZE 16 15629 #define MAX_IMP_RESP_SIZE 256 15630 15631 typedef struct wl_proxd_rssi_bias { 15632 int32 version; /**< version */ 15633 int32 threshold[RSSI_THRESHOLD_SIZE]; /**< threshold */ 15634 int32 peak_offset; /**< peak offset */ 15635 int32 bias; /**< rssi bias */ 15636 int32 gd_delta; /**< GD - GD_ADJ */ 15637 int32 imp_resp[MAX_IMP_RESP_SIZE]; /**< (Hi*Hi)+(Hr*Hr) */ 15638 } wl_proxd_rssi_bias_t; 15639 15640 typedef struct wl_proxd_rssi_bias_avg { 15641 int32 avg_threshold[RSSI_THRESHOLD_SIZE]; /**< avg threshold */ 15642 int32 avg_peak_offset; /**< avg peak offset */ 15643 int32 avg_rssi; /**< avg rssi */ 15644 int32 avg_bias; /**< avg bias */ 15645 } wl_proxd_rssi_bias_avg_t; 15646 15647 #include <packed_section_start.h> 15648 typedef BWL_PRE_PACKED_STRUCT struct wl_proxd_collect_info { 15649 uint16 type; /**< type: 0 channel table, 1 channel smoothing table, 2 and 3 seq */ 15650 uint16 index; /**< The current frame index, from 1 to total_frames. */ 15651 uint16 tof_cmd; /**< M_TOF_CMD */ 15652 uint16 tof_rsp; /**< M_TOF_RSP */ 15653 uint16 tof_avb_rxl; /**< M_TOF_AVB_RX_L */ 15654 uint16 tof_avb_rxh; /**< M_TOF_AVB_RX_H */ 15655 uint16 tof_avb_txl; /**< M_TOF_AVB_TX_L */ 15656 uint16 tof_avb_txh; /**< M_TOF_AVB_TX_H */ 15657 uint16 tof_id; /**< M_TOF_ID */ 15658 uint8 tof_frame_type; 15659 uint8 tof_frame_bw; 15660 int8 tof_rssi; 15661 int32 tof_cfo; 15662 int32 gd_adj_ns; /**< gound delay */ 15663 int32 gd_h_adj_ns; /**< group delay + threshold crossing */ 15664 int16 nfft; /**< number of samples stored in H */ 15665 uint8 num_max_cores; 15666 15667 } BWL_POST_PACKED_STRUCT wl_proxd_collect_info_t; 15668 #include <packed_section_end.h> 15669 15670 #define K_TOF_COLLECT_H_PAD 1 15671 #define K_TOF_COLLECT_SC_20MHZ (64) 15672 /* Maximum possible size of sample capture */ 15673 #define K_TOF_COLLECT_SC_80MHZ (2*K_TOF_COLLECT_SC_20MHZ) 15674 /* Maximum possible size of channel dump */ 15675 #define K_TOF_COLLECT_CHAN_SIZE (2*K_TOF_COLLECT_SC_80MHZ) 15676 15677 /* 15678 A few extra samples are required to estimate frequency offset 15679 Right now 16 samples are being used. Can be changed in future. 15680 */ 15681 #define K_TOF_COLLECT_SAMP_SIZE_20MHZ ((2u) * (K_TOF_COLLECT_SC_20MHZ) + \ 15682 (16u) + (K_TOF_COLLECT_H_PAD)) 15683 #define K_TOF_COLLECT_RAW_SAMP_SIZE_20MHZ ((2u) * (K_TOF_COLLECT_SAMP_SIZE_20MHZ)) 15684 #define K_TOF_COLLECT_H_SIZE_20MHZ (K_TOF_COLLECT_SAMP_SIZE_20MHZ) 15685 #define K_TOF_COLLECT_HRAW_SIZE_20MHZ (K_TOF_COLLECT_RAW_SAMP_SIZE_20MHZ) 15686 15687 #define K_TOF_COLLECT_SAMP_SIZE_80MHZ ((2u) * (K_TOF_COLLECT_SC_80MHZ) + \ 15688 (16u) + (K_TOF_COLLECT_H_PAD)) 15689 #define K_TOF_COLLECT_RAW_SAMP_SIZE_80MHZ ((2u) * K_TOF_COLLECT_SAMP_SIZE_80MHZ) 15690 #define K_TOF_COLLECT_H_SIZE_80MHZ (K_TOF_COLLECT_SAMP_SIZE_80MHZ) 15691 #define K_TOF_COLLECT_HRAW_SIZE_80MHZ (K_TOF_COLLECT_RAW_SAMP_SIZE_80MHZ) 15692 #define K_TOF_COLLECT_HRAW_SIZE_20MHZ_1FS (K_TOF_COLLECT_SAMP_SIZE_20MHZ) 15693 #define K_TOF_COLLECT_HRAW_SIZE_80MHZ_1FS ((2u) * (K_TOF_COLLECT_SAMP_SIZE_20MHZ)) 15694 15695 #define WL_PROXD_COLLECT_DATA_VERSION_1 1 15696 #include <packed_section_start.h> 15697 typedef BWL_PRE_PACKED_STRUCT struct wl_proxd_collect_data_v1 { 15698 wl_proxd_collect_info_t info; 15699 uint8 ri_rr[FTM_TPK_RI_RR_LEN]; 15700 /**< raw data read from phy used to adjust timestamps */ 15701 uint32 H[K_TOF_COLLECT_H_SIZE_20MHZ]; 15702 } BWL_POST_PACKED_STRUCT wl_proxd_collect_data_t_v1; 15703 #include <packed_section_end.h> 15704 15705 #define WL_PROXD_COLLECT_DATA_VERSION_2 2 15706 #include <packed_section_start.h> 15707 typedef BWL_PRE_PACKED_STRUCT struct wl_proxd_collect_data_v2 { 15708 wl_proxd_collect_info_t info; 15709 uint8 ri_rr[FTM_TPK_RI_RR_LEN_SECURE_2_0]; 15710 /**< raw data read from phy used to adjust timestamps */ 15711 uint32 H[K_TOF_COLLECT_H_SIZE_20MHZ]; 15712 } BWL_POST_PACKED_STRUCT wl_proxd_collect_data_t_v2; 15713 #include <packed_section_end.h> 15714 15715 #define WL_PROXD_COLLECT_DATA_VERSION_3 3 15716 typedef struct wl_proxd_collect_data_v3 { 15717 uint16 version; 15718 uint16 len; 15719 wl_proxd_collect_info_t info; 15720 uint8 ri_rr[FTM_TPK_RI_RR_LEN_SECURE_2_0]; 15721 /**< raw data read from phy used to adjust timestamps */ 15722 uint32 H[K_TOF_COLLECT_H_SIZE_20MHZ]; 15723 uint32 chan[4 * K_TOF_COLLECT_CHAN_SIZE]; 15724 } wl_proxd_collect_data_t_v3; 15725 15726 #define WL_PROXD_COLLECT_DATA_VERSION_4 4 15727 typedef struct wl_proxd_collect_data_v4 { 15728 uint16 version; 15729 uint16 len; 15730 wl_proxd_collect_info_t info; 15731 uint8 ri_rr[FTM_TPK_RI_RR_LEN_SECURE_2_0_5G]; 15732 /**< raw data read from phy used to adjust timestamps */ 15733 uint32 H[K_TOF_COLLECT_H_SIZE_20MHZ]; 15734 uint32 chan[4 * K_TOF_COLLECT_CHAN_SIZE]; 15735 } wl_proxd_collect_data_t_v4; 15736 #define WL_PROXD_COLLECT_DATA_VERSION_MAX WL_PROXD_COLLECT_DATA_VERSION_4 15737 15738 typedef struct wl_proxd_debug_data { 15739 uint8 count; /**< number of packets */ 15740 uint8 stage; /**< state machone stage */ 15741 uint8 received; /**< received or txed */ 15742 uint8 paket_type; /**< packet type */ 15743 uint8 category; /**< category field */ 15744 uint8 action; /**< action field */ 15745 uint8 token; /**< token number */ 15746 uint8 follow_token; /**< following token number */ 15747 uint16 index; /**< index of the packet */ 15748 uint16 tof_cmd; /**< M_TOF_CMD */ 15749 uint16 tof_rsp; /**< M_TOF_RSP */ 15750 uint16 tof_avb_rxl; /**< M_TOF_AVB_RX_L */ 15751 uint16 tof_avb_rxh; /**< M_TOF_AVB_RX_H */ 15752 uint16 tof_avb_txl; /**< M_TOF_AVB_TX_L */ 15753 uint16 tof_avb_txh; /**< M_TOF_AVB_TX_H */ 15754 uint16 tof_id; /**< M_TOF_ID */ 15755 uint16 tof_status0; /**< M_TOF_STATUS_0 */ 15756 uint16 tof_status2; /**< M_TOF_STATUS_2 */ 15757 uint16 tof_chsm0; /**< M_TOF_CHNSM_0 */ 15758 uint16 tof_phyctl0; /**< M_TOF_PHYCTL0 */ 15759 uint16 tof_phyctl1; /**< M_TOF_PHYCTL1 */ 15760 uint16 tof_phyctl2; /**< M_TOF_PHYCTL2 */ 15761 uint16 tof_lsig; /**< M_TOF_LSIG */ 15762 uint16 tof_vhta0; /**< M_TOF_VHTA0 */ 15763 uint16 tof_vhta1; /**< M_TOF_VHTA1 */ 15764 uint16 tof_vhta2; /**< M_TOF_VHTA2 */ 15765 uint16 tof_vhtb0; /**< M_TOF_VHTB0 */ 15766 uint16 tof_vhtb1; /**< M_TOF_VHTB1 */ 15767 uint16 tof_apmductl; /**< M_TOF_AMPDU_CTL */ 15768 uint16 tof_apmdudlim; /**< M_TOF_AMPDU_DLIM */ 15769 uint16 tof_apmdulen; /**< M_TOF_AMPDU_LEN */ 15770 } wl_proxd_debug_data_t; 15771 15772 /** version of the wl_wsec_info structure */ 15773 #define WL_WSEC_INFO_VERSION 0x01 15774 15775 /** start enum value for BSS properties */ 15776 #define WL_WSEC_INFO_BSS_BASE 0x0100 15777 /* for WFA testing (CTT testbed) */ 15778 #define WL_WSEC_INFO_TEST_BASE 0x0300 15779 /** size of len and type fields of wl_wsec_info_tlv_t struct */ 15780 #define WL_WSEC_INFO_TLV_HDR_LEN OFFSETOF(wl_wsec_info_tlv_t, data) 15781 15782 /** Allowed wl_wsec_info properties; not all of them may be supported. */ 15783 typedef enum { 15784 WL_WSEC_INFO_NONE = 0, 15785 WL_WSEC_INFO_MAX_KEYS = 1, 15786 WL_WSEC_INFO_NUM_KEYS = 2, 15787 WL_WSEC_INFO_NUM_HW_KEYS = 3, 15788 WL_WSEC_INFO_MAX_KEY_IDX = 4, 15789 WL_WSEC_INFO_NUM_REPLAY_CNTRS = 5, 15790 WL_WSEC_INFO_SUPPORTED_ALGOS = 6, 15791 WL_WSEC_INFO_MAX_KEY_LEN = 7, 15792 WL_WSEC_INFO_FLAGS = 8, 15793 /* add global/per-wlc properties above */ 15794 WL_WSEC_INFO_BSS_FLAGS = (WL_WSEC_INFO_BSS_BASE + 1), 15795 WL_WSEC_INFO_BSS_WSEC = (WL_WSEC_INFO_BSS_BASE + 2), 15796 WL_WSEC_INFO_BSS_TX_KEY_ID = (WL_WSEC_INFO_BSS_BASE + 3), 15797 WL_WSEC_INFO_BSS_ALGO = (WL_WSEC_INFO_BSS_BASE + 4), 15798 WL_WSEC_INFO_BSS_KEY_LEN = (WL_WSEC_INFO_BSS_BASE + 5), 15799 WL_WSEC_INFO_BSS_ALGOS = (WL_WSEC_INFO_BSS_BASE + 6), 15800 WL_WSEC_INFO_BSS_WPA_AP_RESTRICT = (WL_WSEC_INFO_BSS_BASE + 7), 15801 WL_WSEC_INFO_BSS_PMK_PASSPHRASE = (WL_WSEC_INFO_BSS_BASE + 8), 15802 WL_WSEC_INFO_BSS_SAE_PWE = (WL_WSEC_INFO_BSS_BASE + 9), 15803 WL_WSEC_INFO_BSS_SAE_PK = (WL_WSEC_INFO_BSS_BASE + 0xA), 15804 WL_WSEC_INFO_6G_LEGACY_SEC = (WL_WSEC_INFO_BSS_BASE + 0xB), 15805 /* 15806 * ADD NEW ENUM ABOVE HERE 15807 */ 15808 /* WPA3 CTT testbed specific requirement. refer to WFA CAPI command list */ 15809 WL_WSEC_INFO_TEST_SAE_GROUPS = (WL_WSEC_INFO_TEST_BASE), /* supported SAE groups */ 15810 WL_WSEC_INFO_TEST_SAE_GROUP_REJ = (WL_WSEC_INFO_TEST_BASE + 1), /* rejected group ID */ 15811 WL_WSEC_INFO_TEST_SAE_INVALID_VEC = (WL_WSEC_INFO_TEST_BASE + 2), /* test SAE vector */ 15812 WL_WSEC_INFO_TEST_PMK = (WL_WSEC_INFO_TEST_BASE + 3), /* query PMK */ 15813 WL_WSEC_INFO_OCV = (WL_WSEC_INFO_TEST_BASE + 4), /* OCV enable/disable */ 15814 WL_WSEC_INFO_TEST_INVALID_OCI = (WL_WSEC_INFO_TEST_BASE + 5), /* OCV invalid OCI */ 15815 WL_WSEC_INFO_TEST_PMKSA_CACHE = (WL_WSEC_INFO_TEST_BASE + 6), /* PMKSA cache on/off */ 15816 WL_WSEC_INFO_TEST_IGNORE_CSA = (WL_WSEC_INFO_TEST_BASE + 7), /* Ignore CSA */ 15817 WL_WSEC_INFO_TEST_IGNORE_ASSOCRESP = (WL_WSEC_INFO_TEST_BASE + 8), /* Ignore reassoc_resp */ 15818 WL_WSEC_INFO_TEST_TD_POLICY = (WL_WSEC_INFO_TEST_BASE + 9), /* set TD policy */ 15819 WL_WSEC_INFO_TEST_DISASSOC_MFP_TMO = (WL_WSEC_INFO_TEST_BASE + 0xA), 15820 /* sending disassoc frame when MFP query timed out */ 15821 15822 /* add per-BSS properties above */ 15823 WL_WSEC_INFO_MAX = 0xffff 15824 } wl_wsec_info_type_t; 15825 15826 #define WL_WSEC_PMK_INFO_VERSION 0x0100 /**< version 1.0 */ 15827 15828 typedef uint16 wl_wsec_info_pmk_info_flags_t; 15829 typedef uint32 wl_wsec_info_pmk_lifetime_t; 15830 typedef uint8 wl_wsec_info_akm_mask_t; 15831 typedef uint16 wl_wsec_info_pmk_info_flags; 15832 15833 enum { 15834 WL_WSEC_PMK_INFO_SSID_PRESENT = 0x1, 15835 WL_WSEC_PMK_DEFAULT_LIFETIME = 0x2 15836 }; 15837 15838 struct bcm_xlo { 15839 uint16 len; 15840 uint16 off; 15841 }; 15842 typedef struct bcm_xlo bcm_xlo_t; 15843 15844 /* 15845 ** all offsets are from the beginning of the structure that starts 15846 ** with the version field and length field is the total length of the structure 15847 ** including the version and length fields 15848 */ 15849 typedef struct wl_wsec_info_pmk_info { 15850 uint16 version; /* WL_WSEC_PMK_INFO_VERSION */ 15851 uint16 len; 15852 uint16 next_offset; /* If non zero, specifies offset of next next_offset field */ 15853 wl_wsec_info_pmk_info_flags_t flags; /* Fill in the input based on the flags */ 15854 wl_wsec_info_pmk_lifetime_t pmk_lifetime; 15855 wl_wsec_info_akm_mask_t akm_mask; /* RSN authenticated key management suite */ 15856 uint8 rsvd[3]; /* reserved for future use */ 15857 bcm_xlo_t ssid; /* ssid - key, zero length is allowed for SSID */ 15858 bcm_xlo_t bssid; /* bssid - key, zero length = broadcast/wildcard */ 15859 bcm_xlo_t pass_id; /* key - optional password id for SAE */ 15860 bcm_xlo_t pmk; /* pmk - either 32 or 48 byte for SuiteB-192 */ 15861 bcm_xlo_t passphrase; /* passphrase info */ 15862 /* data follows */ 15863 } wl_wsec_info_pmk_info_t; 15864 15865 typedef struct { 15866 uint32 algos; /* set algos to be enabled/disabled */ 15867 uint32 mask; /* algos outside mask unaltered */ 15868 } wl_wsec_info_algos_t; 15869 15870 /** tlv used to return wl_wsec_info properties */ 15871 typedef struct { 15872 uint16 type; 15873 uint16 len; /**< data length */ 15874 uint8 data[1]; /**< data follows */ 15875 } wl_wsec_info_tlv_t; 15876 15877 /** input/output data type for wsec_info iovar */ 15878 typedef struct wl_wsec_info { 15879 uint8 version; /**< structure version */ 15880 uint8 pad[2]; 15881 uint8 num_tlvs; 15882 wl_wsec_info_tlv_t tlvs[1]; /**< tlv data follows */ 15883 } wl_wsec_info_t; 15884 #define AP_BLOCK_NONE 0x0000 /* default: No restriction */ 15885 #define AP_ALLOW_WPA2 0x0001 /* allow WPA2PSK AP */ 15886 #define AP_ALLOW_TSN 0x0002 /* WPA3 transition AP */ 15887 #define AP_ALLOW_WPA3_ONLY 0x0004 /* WPA3 only AP */ 15888 #define AP_ALLOW_MAX (AP_ALLOW_WPA2 | AP_ALLOW_TSN | \ 15889 AP_ALLOW_WPA3_ONLY) 15890 typedef struct { 15891 uint32 wpa_ap_restrict; /* set WPA2 / WPA3 AP restriction policy */ 15892 } wl_wsec_info_wpa_ap_restrict_t; 15893 15894 /* SAE PWE derivation method */ 15895 #define SAE_PWE_LOOP 0x1u 15896 #define SAE_PWE_H2E 0x2u 15897 15898 /* SAE PK modes */ 15899 #define WSEC_SAE_PK_NONE 0u 15900 #define WSEC_SAE_PK_ENABLED 0x1u 15901 #define WSEC_SAE_PK_ONLY 0x2u 15902 15903 /* HE 6Ghz security bitmap */ 15904 #define WL_HE_6G_SEC_DISABLE 0x00u /* HE 6G Open Security support disable */ 15905 #define WL_HE_6G_SEC_OPEN 0x01u /* HE 6G Open Security support */ 15906 15907 /* 15908 * randmac definitions 15909 */ 15910 #define WL_RANDMAC_MODULE "randmac" 15911 #define WL_RANDMAC_API_VERSION 0x0100 /**< version 1.0 */ 15912 #define WL_RANDMAC_API_MIN_VERSION 0x0100 /**< version 1.0 */ 15913 15914 /** subcommands that can apply to randmac */ 15915 enum { 15916 WL_RANDMAC_SUBCMD_NONE = 0, 15917 WL_RANDMAC_SUBCMD_GET_VERSION = 1, 15918 WL_RANDMAC_SUBCMD_ENABLE = 2, 15919 WL_RANDMAC_SUBCMD_DISABLE = 3, 15920 WL_RANDMAC_SUBCMD_CONFIG = 4, 15921 WL_RANDMAC_SUBCMD_STATS = 5, 15922 WL_RANDMAC_SUBCMD_CLEAR_STATS = 6, 15923 15924 WL_RANDMAC_SUBCMD_MAX 15925 }; 15926 typedef int16 wl_randmac_subcmd_t; 15927 15928 /* Common IOVAR struct */ 15929 typedef struct wl_randmac { 15930 uint16 version; 15931 uint16 len; /* total length */ 15932 wl_randmac_subcmd_t subcmd_id; /* subcommand id */ 15933 uint8 data[0]; /* subcommand data */ 15934 } wl_randmac_t; 15935 15936 #define WL_RANDMAC_IOV_HDR_SIZE OFFSETOF(wl_randmac_t, data) 15937 15938 /* randmac version subcommand */ 15939 typedef struct wl_randmac_version { 15940 uint16 version; /* Randmac method version info */ 15941 uint8 pad[2]; /* Align on 4 byte boundary */ 15942 } wl_randmac_version_t; 15943 15944 /* 15945 * Bitmask for methods supporting MAC randomization feature 15946 */ 15947 #define WL_RANDMAC_USER_NONE 0x0000 15948 #define WL_RANDMAC_USER_FTM 0x0001 15949 #define WL_RANDMAC_USER_NAN 0x0002 15950 #define WL_RANDMAC_USER_SCAN 0x0004 15951 #define WL_RANDMAC_USER_ANQP 0x0008 15952 #define WL_RANDMAC_USER_ALL 0xFFFF 15953 typedef uint16 wl_randmac_method_t; 15954 15955 enum { 15956 WL_RANDMAC_FLAGS_NONE = 0x00, 15957 WL_RANDMAC_FLAGS_ADDR = 0x01, 15958 WL_RANDMAC_FLAGS_MASK = 0x02, 15959 WL_RANDMAC_FLAGS_METHOD = 0x04, 15960 WL_RANDMAC_FLAGS_ALL = 0xFF 15961 }; 15962 typedef uint8 wl_randmac_flags_t; 15963 15964 /* randmac statistics subcommand */ 15965 typedef struct wl_randmac_stats { 15966 uint32 set_ok; /* Set random addr success count */ 15967 uint32 set_fail; /* Set random addr failed count */ 15968 uint32 set_reqs; /* Set random addr count */ 15969 uint32 reset_reqs; /* Restore random addr count */ 15970 uint32 restore_ok; /* Restore random addr succes count */ 15971 uint32 restore_fail; /* Restore random addr failed count */ 15972 uint32 events_sent; /* randmac module events count */ 15973 uint32 events_rcvd; /* randmac events received count */ 15974 } wl_randmac_stats_t; 15975 15976 /* randmac config subcommand */ 15977 typedef struct wl_randmac_config { 15978 struct ether_addr addr; /* Randomized MAC address */ 15979 struct ether_addr addr_mask; /* bitmask for randomization */ 15980 wl_randmac_method_t method; /* Enabled methods */ 15981 wl_randmac_flags_t flags; /* What config info changed */ 15982 uint8 PAD; 15983 } wl_randmac_config_t; 15984 15985 enum { 15986 WL_RANDMAC_EVENT_NONE = 0, /**< not an event, reserved */ 15987 WL_RANDMAC_EVENT_BSSCFG_ADDR_SET = 1, /* bsscfg addr randomized */ 15988 WL_RANDMAC_EVENT_BSSCFG_ADDR_RESTORE = 2, /* bsscfg addr restored */ 15989 WL_RANDMAC_EVENT_ENABLED = 3, /* randmac module enabled */ 15990 WL_RANDMAC_EVENT_DISABLE = 4, /* randmac module disabled */ 15991 WL_RANDMAC_EVENT_BSSCFG_STATUS = 5, /* bsscfg enable/disable */ 15992 15993 WL_RANDMAC_EVENT_MAX 15994 }; 15995 typedef int16 wl_randmac_event_type_t; 15996 typedef int32 wl_randmac_status_t; 15997 typedef uint32 wl_randmac_event_mask_t; 15998 15999 #define WL_RANDMAC_EVENT_MASK_ALL 0xfffffffe 16000 #define WL_RANDMAC_EVENT_MASK_EVENT(_event_type) (1 << (_event_type)) 16001 #define WL_RANDMAC_EVENT_ENABLED(_mask, _event_type) (\ 16002 ((_mask) & WL_RANDMAC_EVENT_MASK_EVENT(_event_type)) != 0) 16003 16004 /** tlv IDs - data length 4 bytes unless overridden by type, alignment 32 bits */ 16005 enum { 16006 WL_RANDMAC_TLV_NONE = 0, 16007 WL_RANDMAC_TLV_METHOD = 1, 16008 WL_RANDMAC_TLV_ADDR = 2, 16009 WL_RANDMAC_TLV_MASK = 3 16010 }; 16011 typedef uint16 wl_randmac_tlv_id_t; 16012 16013 typedef struct wl_randmac_tlv { 16014 wl_randmac_tlv_id_t id; 16015 uint16 len; /* Length of variable */ 16016 uint8 data[1]; 16017 } wl_randmac_tlv_t; 16018 16019 /** randmac event */ 16020 typedef struct wl_randmac_event { 16021 uint16 version; 16022 uint16 len; /* Length of all variables */ 16023 wl_randmac_event_type_t type; 16024 wl_randmac_method_t method; 16025 uint8 pad[2]; 16026 wl_randmac_tlv_t tlvs[1]; /**< variable */ 16027 } wl_randmac_event_t; 16028 16029 /* 16030 * scan MAC definitions 16031 */ 16032 16033 /** common iovar struct */ 16034 typedef struct wl_scanmac { 16035 uint16 subcmd_id; /**< subcommand id */ 16036 uint16 len; /**< total length of data[] */ 16037 uint8 data[]; /**< subcommand data */ 16038 } wl_scanmac_t; 16039 16040 /* subcommand ids */ 16041 #define WL_SCANMAC_SUBCMD_ENABLE 0 16042 #define WL_SCANMAC_SUBCMD_BSSCFG 1u /**< only GET supported */ 16043 #define WL_SCANMAC_SUBCMD_CONFIG 2u 16044 #define WL_SCANMAC_SUBCMD_MACADDR 3u 16045 16046 /** scanmac enable data struct */ 16047 typedef struct wl_scanmac_enable { 16048 uint8 enable; /**< 1 - enable, 0 - disable */ 16049 uint8 pad[3]; /**< 4-byte struct alignment */ 16050 } wl_scanmac_enable_t; 16051 16052 /** scanmac bsscfg data struct */ 16053 typedef struct wl_scanmac_bsscfg { 16054 uint32 bsscfg; /**< bsscfg index */ 16055 } wl_scanmac_bsscfg_t; 16056 16057 /** scanmac config data struct */ 16058 typedef struct wl_scanmac_config { 16059 struct ether_addr mac; /**< 6 bytes of MAC address or MAC prefix (i.e. OUI) */ 16060 struct ether_addr random_mask; /**< randomized bits on each scan */ 16061 uint16 scan_bitmap; /**< scans to use this MAC address */ 16062 uint8 pad[2]; /**< 4-byte struct alignment */ 16063 } wl_scanmac_config_t; 16064 16065 /** scanmac mac addr data struct */ 16066 typedef struct wl_scanmac_macaddr { 16067 struct ether_addr mac; /* last mac address used for scan. either randomized or permanent */ 16068 } wl_scanmac_macaddr_t; 16069 16070 /* scan bitmap */ 16071 #define WL_SCANMAC_SCAN_UNASSOC (0x01 << 0u) /**< unassociated scans */ 16072 #define WL_SCANMAC_SCAN_ASSOC_ROAM (0x01 << 1u) /**< associated roam scans */ 16073 #define WL_SCANMAC_SCAN_ASSOC_PNO (0x01 << 2u) /**< associated PNO scans */ 16074 #define WL_SCANMAC_SCAN_ASSOC_HOST (0x01 << 3u) /**< associated host scans */ 16075 #define WL_SCANMAC_SCAN_RAND_PERPRQ (0x01 << 4u) /* enable per probe rand */ 16076 #define WL_SCANMAC_SCAN_RAND_SCANCH (0x01 << 5u) /* enable scan chan rand */ 16077 16078 #define WL_SCAN_EVENT_VER1 1 16079 #define WL_SCAN_EVENT_VER2 2 16080 16081 #define WL_SCAN_TYPE_ASSOC 0x1 /* Assoc scan */ 16082 #define WL_SCAN_TYPE_ROAM 0x2 /* Roam scan */ 16083 #define WL_SCAN_TYPE_FWSCAN 0x4 /* Other FW scan */ 16084 #define WL_SCAN_TYPE_HOSTSCAN 0x8 /* Host scan */ 16085 16086 typedef struct scan_event_data { 16087 uint32 version; 16088 uint32 flags; 16089 uint16 num_chan_slice0; 16090 uint16 num_chan_slice1; 16091 /* Will contain num_chan_slice0 followed by num_chan_slice1 chanspecs */ 16092 chanspec_t scan_chan_list[]; 16093 } scan_event_data_v1_t; 16094 16095 /** tlv used to return chanspec list of each slice */ 16096 typedef struct scan_chan_tlv { 16097 uint16 type; /* slice index */ 16098 uint16 len; /* data length */ 16099 uint8 data[1]; /* chanspec list */ 16100 } scan_chan_tlv_t; 16101 16102 typedef struct scan_event_data_v2 { 16103 uint32 version; 16104 uint32 flags; 16105 uint32 num_tlvs; /* no of chanspec list tlvs */ 16106 scan_chan_tlv_t tlvs[1]; 16107 } scan_event_data_v2_t; 16108 16109 #ifdef WL_SCAN_EVENT_V2 16110 typedef scan_event_data_v2_t scan_event_data_t; 16111 #define WL_SCAN_EVENT_FIXED_LEN_V2 OFFSETOF(scan_event_data_t, tlvs) 16112 #define WL_SCAN_EVENT_VERSION WL_SCAN_EVENT_VER2 16113 #else 16114 #define WL_SCAN_EVENT_VERSION WL_SCAN_EVENT_VER1 16115 typedef scan_event_data_v1_t scan_event_data_t; 16116 #endif 16117 16118 /* 16119 * bonjour dongle offload definitions 16120 */ 16121 16122 /* common iovar struct */ 16123 typedef struct wl_bdo { 16124 uint16 subcmd_id; /* subcommand id */ 16125 uint16 len; /* total length of data[] */ 16126 uint8 data[]; /* subcommand data */ 16127 } wl_bdo_t; 16128 16129 /* subcommand ids */ 16130 #define WL_BDO_SUBCMD_DOWNLOAD 0 /* Download flattened database */ 16131 #define WL_BDO_SUBCMD_ENABLE 1 /* Start bonjour after download */ 16132 #define WL_BDO_SUBCMD_MAX_DOWNLOAD 2 /* Get the max download size */ 16133 16134 /* maximum fragment size */ 16135 #define BDO_MAX_FRAGMENT_SIZE 1024 16136 16137 /* download flattened database 16138 * 16139 * BDO must be disabled before database download else fail. 16140 * 16141 * If database size is within BDO_MAX_FRAGMENT_SIZE then only a single fragment 16142 * is required (i.e. frag_num = 0, total_size = frag_size). 16143 * If database size exceeds BDO_MAX_FRAGMENT_SIZE then multiple fragments are required. 16144 */ 16145 typedef struct wl_bdo_download { 16146 uint16 total_size; /* total database size */ 16147 uint16 frag_num; /* fragment number, 0 for first fragment, N-1 for last fragment */ 16148 uint16 frag_size; /* size of fragment (max BDO_MAX_FRAGMENT_SIZE) */ 16149 uint8 pad[2]; /* 4-byte struct alignment */ 16150 uint8 fragment[BDO_MAX_FRAGMENT_SIZE]; /* fragment data */ 16151 } wl_bdo_download_t; 16152 16153 /* enable 16154 * 16155 * Enable requires a downloaded database else fail. 16156 */ 16157 typedef struct wl_bdo_enable { 16158 uint8 enable; /* 1 - enable, 0 - disable */ 16159 uint8 pad[3]; /* 4-byte struct alignment */ 16160 } wl_bdo_enable_t; 16161 16162 /* 16163 * Get the max download size for Bonjour Offload. 16164 */ 16165 typedef struct wl_bdo_max_download { 16166 uint16 size; /* Max download size in bytes */ 16167 uint8 pad[2]; /* 4-byte struct alignment */ 16168 } wl_bdo_max_download_t; 16169 16170 /* 16171 * TCP keepalive offload definitions 16172 */ 16173 16174 /* common iovar struct */ 16175 typedef struct wl_tko { 16176 uint16 subcmd_id; /* subcommand id */ 16177 uint16 len; /* total length of data[] */ 16178 uint8 data[]; /* subcommand data */ 16179 } wl_tko_t; 16180 16181 /* subcommand ids */ 16182 #define WL_TKO_SUBCMD_MAX_TCP 0 /* max TCP connections supported */ 16183 #define WL_TKO_SUBCMD_PARAM 1 /* configure offload common parameters */ 16184 #define WL_TKO_SUBCMD_CONNECT 2 /* TCP connection info */ 16185 #define WL_TKO_SUBCMD_ENABLE 3 /* enable/disable */ 16186 #define WL_TKO_SUBCMD_STATUS 4 /* TCP connection status */ 16187 16188 /* WL_TKO_SUBCMD_MAX_CONNECT subcommand data */ 16189 typedef struct wl_tko_max_tcp { 16190 uint8 max; /* max TCP connections supported */ 16191 uint8 pad[3]; /* 4-byte struct alignment */ 16192 } wl_tko_max_tcp_t; 16193 16194 /* WL_TKO_SUBCMD_PARAM subcommand data */ 16195 typedef struct wl_tko_param { 16196 uint16 interval; /* keepalive tx interval (secs) */ 16197 uint16 retry_interval; /* keepalive retry interval (secs) */ 16198 uint16 retry_count; /* retry_count */ 16199 uint8 pad[2]; /* 4-byte struct alignment */ 16200 } wl_tko_param_t; 16201 16202 /* WL_TKO_SUBCMD_CONNECT subcommand data 16203 * invoke with unique 'index' for each TCP connection 16204 */ 16205 typedef struct wl_tko_connect { 16206 uint8 index; /* TCP connection index, 0 to max-1 */ 16207 uint8 ip_addr_type; /* 0 - IPv4, 1 - IPv6 */ 16208 uint16 local_port; /* local port */ 16209 uint16 remote_port; /* remote port */ 16210 uint16 PAD; 16211 uint32 local_seq; /* local sequence number */ 16212 uint32 remote_seq; /* remote sequence number */ 16213 uint16 request_len; /* TCP keepalive request packet length */ 16214 uint16 response_len; /* TCP keepalive response packet length */ 16215 uint8 data[]; /* variable length field containing local/remote IPv4/IPv6, 16216 * TCP keepalive request packet, TCP keepalive response packet 16217 * For IPv4, length is 4 * 2 + request_length + response_length 16218 * offset 0 - local IPv4 16219 * offset 4 - remote IPv4 16220 * offset 8 - TCP keepalive request packet 16221 * offset 8+request_length - TCP keepalive response packet 16222 * For IPv6, length is 16 * 2 + request_length + response_length 16223 * offset 0 - local IPv6 16224 * offset 16 - remote IPv6 16225 * offset 32 - TCP keepalive request packet 16226 * offset 32+request_length - TCP keepalive response packet 16227 */ 16228 } wl_tko_connect_t; 16229 16230 /* WL_TKO_SUBCMD_CONNECT subcommand data to GET configured info for specific index */ 16231 typedef struct wl_tko_get_connect { 16232 uint8 index; /* TCP connection index, 0 to max-1 */ 16233 uint8 pad[3]; /* 4-byte struct alignment */ 16234 } wl_tko_get_connect_t; 16235 16236 typedef struct wl_tko_enable { 16237 uint8 enable; /* 1 - enable, 0 - disable */ 16238 uint8 pad[3]; /* 4-byte struct alignment */ 16239 } wl_tko_enable_t; 16240 16241 /* WL_TKO_SUBCMD_STATUS subcommand data */ 16242 /* must be invoked before tko is disabled else status is unavailable */ 16243 typedef struct wl_tko_status { 16244 uint8 count; /* number of status entries (i.e. equals 16245 * max TCP connections supported) 16246 */ 16247 uint8 status[1]; /* variable length field contain status for 16248 * each TCP connection index 16249 */ 16250 } wl_tko_status_t; 16251 16252 typedef enum { 16253 TKO_STATUS_NORMAL = 0, /* TCP connection normal, no error */ 16254 TKO_STATUS_NO_RESPONSE = 1, /* no response to TCP keepalive */ 16255 TKO_STATUS_NO_TCP_ACK_FLAG = 2, /* TCP ACK flag not set */ 16256 TKO_STATUS_UNEXPECT_TCP_FLAG = 3, /* unexpect TCP flags set other than ACK */ 16257 TKO_STATUS_SEQ_NUM_INVALID = 4, /* ACK != sequence number */ 16258 TKO_STATUS_REMOTE_SEQ_NUM_INVALID = 5, /* SEQ > remote sequence number */ 16259 TKO_STATUS_TCP_DATA = 6, /* TCP data available */ 16260 TKO_STATUS_UNAVAILABLE = 255, /* not used/configured */ 16261 } tko_status_t; 16262 16263 enum rssi_reason { 16264 RSSI_REASON_UNKNOW = 0, 16265 RSSI_REASON_LOWRSSI = 1, 16266 RSSI_REASON_NSYC = 2, 16267 RSSI_REASON_TIMEOUT = 3 16268 }; 16269 16270 enum tof_reason { 16271 TOF_REASON_OK = 0, 16272 TOF_REASON_REQEND = 1, 16273 TOF_REASON_TIMEOUT = 2, 16274 TOF_REASON_NOACK = 3, 16275 TOF_REASON_INVALIDAVB = 4, 16276 TOF_REASON_INITIAL = 5, 16277 TOF_REASON_ABORT = 6 16278 }; 16279 16280 enum rssi_state { 16281 RSSI_STATE_POLL = 0, 16282 RSSI_STATE_TPAIRING = 1, 16283 RSSI_STATE_IPAIRING = 2, 16284 RSSI_STATE_THANDSHAKE = 3, 16285 RSSI_STATE_IHANDSHAKE = 4, 16286 RSSI_STATE_CONFIRMED = 5, 16287 RSSI_STATE_PIPELINE = 6, 16288 RSSI_STATE_NEGMODE = 7, 16289 RSSI_STATE_MONITOR = 8, 16290 RSSI_STATE_LAST = 9 16291 }; 16292 16293 enum tof_state { 16294 TOF_STATE_IDLE = 0, 16295 TOF_STATE_IWAITM = 1, 16296 TOF_STATE_TWAITM = 2, 16297 TOF_STATE_ILEGACY = 3, 16298 TOF_STATE_IWAITCL = 4, 16299 TOF_STATE_TWAITCL = 5, 16300 TOF_STATE_ICONFIRM = 6, 16301 TOF_STATE_IREPORT = 7 16302 }; 16303 16304 enum tof_mode_type { 16305 TOF_LEGACY_UNKNOWN = 0, 16306 TOF_LEGACY_AP = 1, 16307 TOF_NONLEGACY_AP = 2 16308 }; 16309 16310 enum tof_way_type { 16311 TOF_TYPE_ONE_WAY = 0, 16312 TOF_TYPE_TWO_WAY = 1, 16313 TOF_TYPE_REPORT = 2 16314 }; 16315 16316 enum tof_rate_type { 16317 TOF_FRAME_RATE_VHT = 0, 16318 TOF_FRAME_RATE_LEGACY = 1 16319 }; 16320 16321 #define TOF_ADJ_TYPE_NUM 4 /**< number of assisted timestamp adjustment */ 16322 enum tof_adj_mode { 16323 TOF_ADJ_SOFTWARE = 0, 16324 TOF_ADJ_HARDWARE = 1, 16325 TOF_ADJ_SEQ = 2, 16326 TOF_ADJ_NONE = 3 16327 }; 16328 16329 #define FRAME_TYPE_NUM 4 /**< number of frame type */ 16330 enum frame_type { 16331 FRAME_TYPE_CCK = 0, 16332 FRAME_TYPE_OFDM = 1, 16333 FRAME_TYPE_11N = 2, 16334 FRAME_TYPE_11AC = 3 16335 }; 16336 16337 typedef struct wl_proxd_status_iovar { 16338 uint16 method; /**< method */ 16339 uint8 mode; /**< mode */ 16340 uint8 peermode; /**< peer mode */ 16341 uint8 state; /**< state */ 16342 uint8 reason; /**< reason code */ 16343 uint8 PAD[2]; 16344 uint32 distance; /**< distance */ 16345 uint32 txcnt; /**< tx pkt counter */ 16346 uint32 rxcnt; /**< rx pkt counter */ 16347 struct ether_addr peer; /**< peer mac address */ 16348 int8 avg_rssi; /**< average rssi */ 16349 int8 hi_rssi; /**< highest rssi */ 16350 int8 low_rssi; /**< lowest rssi */ 16351 uint8 PAD[3]; 16352 uint32 dbgstatus; /**< debug status */ 16353 uint16 frame_type_cnt[FRAME_TYPE_NUM]; /**< frame types */ 16354 uint8 adj_type_cnt[TOF_ADJ_TYPE_NUM]; /**< adj types HW/SW */ 16355 } wl_proxd_status_iovar_t; 16356 16357 /* ifdef NET_DETECT */ 16358 typedef struct net_detect_adapter_features { 16359 uint8 wowl_enabled; 16360 uint8 net_detect_enabled; 16361 uint8 nlo_enabled; 16362 } net_detect_adapter_features_t; 16363 16364 typedef enum net_detect_bss_type { 16365 nd_bss_any = 0, 16366 nd_ibss, 16367 nd_ess 16368 } net_detect_bss_type_t; 16369 16370 typedef struct net_detect_profile { 16371 wlc_ssid_t ssid; 16372 net_detect_bss_type_t bss_type; /**< Ignore for now since Phase 1 is only for ESS */ 16373 uint32 cipher_type; /**< DOT11_CIPHER_ALGORITHM enumeration values */ 16374 uint32 auth_type; /**< DOT11_AUTH_ALGORITHM enumeration values */ 16375 } net_detect_profile_t; 16376 16377 typedef struct net_detect_profile_list { 16378 uint32 num_nd_profiles; 16379 net_detect_profile_t nd_profile[]; 16380 } net_detect_profile_list_t; 16381 16382 typedef struct net_detect_config { 16383 uint8 nd_enabled; 16384 uint8 PAD[3]; 16385 uint32 scan_interval; 16386 uint32 wait_period; 16387 uint8 wake_if_connected; 16388 uint8 wake_if_disconnected; 16389 uint8 PAD[2]; 16390 net_detect_profile_list_t nd_profile_list; 16391 } net_detect_config_t; 16392 16393 typedef enum net_detect_wake_reason { 16394 nd_reason_unknown, 16395 nd_net_detected, 16396 nd_wowl_event, 16397 nd_ucode_error 16398 } net_detect_wake_reason_t; 16399 16400 typedef struct net_detect_wake_data { 16401 net_detect_wake_reason_t nd_wake_reason; 16402 uint32 nd_wake_date_length; 16403 uint8 nd_wake_data[0]; /**< Wake data (currently unused) */ 16404 } net_detect_wake_data_t; 16405 16406 /* endif NET_DETECT */ 16407 16408 /* (unversioned, deprecated) */ 16409 typedef struct bcnreq { 16410 uint8 bcn_mode; 16411 uint8 PAD[3]; 16412 int32 dur; 16413 int32 channel; 16414 struct ether_addr da; 16415 uint16 random_int; 16416 wlc_ssid_t ssid; 16417 uint16 reps; 16418 uint8 PAD[2]; 16419 } bcnreq_t; 16420 16421 #define WL_RRM_BCN_REQ_VER 1 16422 typedef struct bcn_req { 16423 uint8 version; 16424 uint8 bcn_mode; 16425 uint8 pad_1[2]; 16426 int32 dur; 16427 int32 channel; 16428 struct ether_addr da; 16429 uint16 random_int; 16430 wlc_ssid_t ssid; 16431 uint16 reps; 16432 uint8 req_elements; 16433 uint8 pad_2; 16434 chanspec_list_t chspec_list; 16435 } bcn_req_t; 16436 16437 typedef struct rrmreq { 16438 struct ether_addr da; 16439 uint8 reg; 16440 uint8 chan; 16441 uint16 random_int; 16442 uint16 dur; 16443 uint16 reps; 16444 } rrmreq_t; 16445 16446 typedef struct framereq { 16447 struct ether_addr da; 16448 uint8 reg; 16449 uint8 chan; 16450 uint16 random_int; 16451 uint16 dur; 16452 struct ether_addr ta; 16453 uint16 reps; 16454 } framereq_t; 16455 16456 typedef struct statreq { 16457 struct ether_addr da; 16458 struct ether_addr peer; 16459 uint16 random_int; 16460 uint16 dur; 16461 uint8 group_id; 16462 uint8 PAD; 16463 uint16 reps; 16464 } statreq_t; 16465 16466 typedef struct txstrmreq { 16467 struct ether_addr da; /* Destination address */ 16468 uint16 random_int; /* Random interval for measurement start */ 16469 uint16 dur; /* Measurement duration */ 16470 uint16 reps; /* number of repetitions */ 16471 struct ether_addr peer; /* Peer MAC address */ 16472 uint8 tid; /* Traffic ID */ 16473 uint8 bin0_range; /* Delay range of the first bin */ 16474 } txstrmreq_t; 16475 16476 typedef struct lcireq { 16477 struct ether_addr da; /* Destination address */ 16478 uint16 reps; /* number of repetitions */ 16479 uint8 subj; /* Local/Remote/Thid party */ 16480 uint8 lat_res; /* Latitude requested Resolution */ 16481 uint8 lon_res; /* Longitude requested Resolution */ 16482 uint8 alt_res; /* Altitude requested Resolution */ 16483 } lcireq_t; 16484 16485 typedef struct civicreq { 16486 struct ether_addr da; /* Destination address */ 16487 uint16 reps; /* number of repetitions */ 16488 uint8 subj; /* Local/Remote/Thid party */ 16489 uint8 civloc_type; /* Format of location info */ 16490 uint8 siu; /* Unit of Location service interval */ 16491 uint8 pad; 16492 uint16 si; /* Location service interval */ 16493 } civicreq_t; 16494 16495 typedef struct locidreq { 16496 struct ether_addr da; /* Destination address */ 16497 uint16 reps; /* number of repetitions */ 16498 uint8 subj; /* Local/Remote/Thid party */ 16499 uint8 siu; /* Unit of Location service interval */ 16500 uint16 si; /* Location service interval */ 16501 } locidreq_t; 16502 16503 typedef struct wl_rrm_config_ioc { 16504 uint16 version; /* command version */ 16505 uint16 id; /* subiovar cmd ID */ 16506 uint16 len; /* total length of all bytes in data[] */ 16507 uint16 pad; /* 4-byte boundary padding */ 16508 uint8 data[1]; /* payload */ 16509 } wl_rrm_config_ioc_t; 16510 16511 enum { 16512 WL_RRM_CONFIG_NONE = 0, /* reserved */ 16513 WL_RRM_CONFIG_GET_LCI = 1, /* get LCI */ 16514 WL_RRM_CONFIG_SET_LCI = 2, /* set LCI */ 16515 WL_RRM_CONFIG_GET_CIVIC = 3, /* get civic location */ 16516 WL_RRM_CONFIG_SET_CIVIC = 4, /* set civic location */ 16517 WL_RRM_CONFIG_GET_LOCID = 5, /* get location identifier */ 16518 WL_RRM_CONFIG_SET_LOCID = 6, /* set location identifier */ 16519 WL_RRM_CONFIG_MAX = 7 16520 }; 16521 16522 #define WL_RRM_CONFIG_NAME "rrm_config" 16523 #define WL_RRM_CONFIG_MIN_LENGTH OFFSETOF(wl_rrm_config_ioc_t, data) 16524 16525 enum { 16526 WL_RRM_EVENT_NONE = 0, /* not an event, reserved */ 16527 WL_RRM_EVENT_FRNG_REQ = 1, /* Receipt of FRNG request frame */ 16528 WL_RRM_EVENT_FRNG_REP = 2, /* Receipt of FRNG report frame */ 16529 16530 WL_RRM_EVENT_MAX 16531 }; 16532 typedef int16 wl_rrm_event_type_t; 16533 16534 typedef struct frngreq_target { 16535 uint32 bssid_info; 16536 uint8 channel; 16537 uint8 phytype; 16538 uint8 reg; 16539 uint8 pad; 16540 struct ether_addr bssid; 16541 chanspec_t chanspec; 16542 uint32 sid; 16543 } frngreq_target_t; 16544 16545 typedef struct frngreq { 16546 wl_rrm_event_type_t event; /* RRM event type */ 16547 struct ether_addr da; 16548 uint16 max_init_delay; /* Upper bound of random delay, in TUs */ 16549 uint8 min_ap_count; /* Min FTM ranges requested (1-15) */ 16550 uint8 num_aps; /* Number of APs to range, at least min_ap_count */ 16551 uint16 max_age; /* Max elapsed time before FTM request, 0xFFFF = any */ 16552 uint16 reps; /* Number of repetitions of this measurement type */ 16553 frngreq_target_t targets[1]; /* Target BSSIDs to range */ 16554 } frngreq_t; 16555 16556 typedef struct frngrep_range { 16557 uint32 start_tsf; /* 4 lsb of tsf */ 16558 struct ether_addr bssid; 16559 uint8 pad[2]; 16560 uint32 range; 16561 uint32 max_err; 16562 uint8 rsvd; 16563 uint8 pad2[3]; 16564 } frngrep_range_t; 16565 16566 typedef struct frngrep_error { 16567 uint32 start_tsf; /* 4 lsb of tsf */ 16568 struct ether_addr bssid; 16569 uint8 code; 16570 uint8 pad[1]; 16571 } frngrep_error_t; 16572 16573 typedef struct frngrep { 16574 wl_rrm_event_type_t event; /* RRM event type */ 16575 struct ether_addr da; 16576 uint8 range_entry_count; 16577 uint8 error_entry_count; 16578 uint16 dialog_token; /* dialog token */ 16579 frngrep_range_t range_entries[DOT11_FTM_RANGE_ENTRY_MAX_COUNT]; 16580 frngrep_error_t error_entries[DOT11_FTM_RANGE_ERROR_ENTRY_MAX_COUNT]; 16581 } frngrep_t; 16582 16583 typedef struct wl_rrm_frng_ioc { 16584 uint16 version; /* command version */ 16585 uint16 id; /* subiovar cmd ID */ 16586 uint16 len; /* total length of all bytes in data[] */ 16587 uint16 pad; /* 4-byte boundary padding */ 16588 uint8 data[]; /* payload */ 16589 } wl_rrm_frng_ioc_t; 16590 16591 enum { 16592 WL_RRM_FRNG_NONE = 0, /* reserved */ 16593 WL_RRM_FRNG_SET_REQ = 1, /* send ftm ranging request */ 16594 WL_RRM_FRNG_MAX = 2 16595 }; 16596 16597 #define WL_RRM_FRNG_NAME "rrm_frng" 16598 #define WL_RRM_FRNG_MIN_LENGTH OFFSETOF(wl_rrm_frng_ioc_t, data) 16599 16600 #define WL_RRM_RPT_VER 0 16601 #define WL_RRM_RPT_MAX_PAYLOAD 256 16602 #define WL_RRM_RPT_MIN_PAYLOAD 7 16603 #define WL_RRM_RPT_FALG_ERR 0 16604 #define WL_RRM_RPT_FALG_GRP_ID_PROPR (1 << 0) 16605 #define WL_RRM_RPT_FALG_GRP_ID_0 (1 << 1) 16606 typedef struct { 16607 uint16 ver; /**< version */ 16608 struct ether_addr addr; /**< STA MAC addr */ 16609 uint32 timestamp; /**< timestamp of the report */ 16610 uint16 flag; /**< flag */ 16611 uint16 len; /**< length of payload data */ 16612 uint8 data[WL_RRM_RPT_MAX_PAYLOAD]; 16613 } statrpt_t; 16614 16615 typedef struct wlc_dwds_config { 16616 uint32 enable; 16617 uint32 mode; /**< STA/AP interface */ 16618 struct ether_addr ea; 16619 uint8 PAD[2]; 16620 } wlc_dwds_config_t; 16621 16622 typedef struct wl_el_set_params_s { 16623 uint8 set; /**< Set number */ 16624 uint8 PAD[3]; 16625 uint32 size; /**< Size to make/expand */ 16626 } wl_el_set_params_t; 16627 16628 typedef struct wl_el_tag_params_s { 16629 uint16 tag; 16630 uint8 set; 16631 uint8 flags; 16632 } wl_el_tag_params_t; 16633 16634 #define EVENT_LOG_SET_TYPE_CURRENT_VERSION 0 16635 typedef struct wl_el_set_type_s { 16636 uint16 version; 16637 uint16 len; 16638 uint8 set; /* Set number */ 16639 uint8 type; /* Type- EVENT_LOG_SET_TYPE_DEFAULT or EVENT_LOG_SET_TYPE_PRSRV */ 16640 uint16 PAD; 16641 } wl_el_set_type_t; 16642 16643 #define EVENT_LOG_SET_TYPE_ALL_V1 1 16644 16645 typedef struct wl_el_set_type_s_v1 { 16646 uint8 set_val; 16647 uint8 type_val; 16648 } wl_el_set_type_v1_t; 16649 16650 typedef struct wl_el_set_all_type_s_v1 { 16651 uint16 version; 16652 uint16 len; 16653 uint32 max_sets; 16654 wl_el_set_type_v1_t set_type[1]; /* set-Type Values Array */ 16655 } wl_el_set_all_type_v1_t; 16656 16657 typedef struct wl_staprio_cfg { 16658 struct ether_addr ea; /**< mac addr */ 16659 uint8 prio; /**< scb priority */ 16660 } wl_staprio_cfg_t; 16661 16662 #define STAMON_STACONFIG_VER 1 16663 /* size of struct wlc_stamon_sta_config_t elements */ 16664 #define STAMON_STACONFIG_LENGTH 20 16665 16666 typedef enum wl_stamon_cfg_cmd_type { 16667 STAMON_CFG_CMD_DEL = 0, 16668 STAMON_CFG_CMD_ADD = 1, 16669 STAMON_CFG_CMD_ENB = 2, 16670 STAMON_CFG_CMD_DSB = 3, 16671 STAMON_CFG_CMD_CNT = 4, 16672 STAMON_CFG_CMD_RSTCNT = 5, 16673 STAMON_CFG_CMD_GET_STATS = 6, 16674 STAMON_CFG_CMD_SET_MONTIME = 7 16675 } wl_stamon_cfg_cmd_type_t; 16676 16677 typedef struct wlc_stamon_sta_config { 16678 wl_stamon_cfg_cmd_type_t cmd; /**< 0 - delete, 1 - add */ 16679 struct ether_addr ea; 16680 uint16 version; /* Command structure version */ 16681 uint16 length; /* Command structure length */ 16682 uint8 pad[2]; 16683 /* Time (ms) for which STA's are monitored. Value ZERO indicates no time limit */ 16684 uint32 monitor_time; 16685 } wlc_stamon_sta_config_t; 16686 16687 /* ifdef SR_DEBUG */ 16688 typedef struct /* pmu_reg */{ 16689 uint32 pmu_control; 16690 uint32 pmu_capabilities; 16691 uint32 pmu_status; 16692 uint32 res_state; 16693 uint32 res_pending; 16694 uint32 pmu_timer1; 16695 uint32 min_res_mask; 16696 uint32 max_res_mask; 16697 uint32 pmu_chipcontrol1[4]; 16698 uint32 pmu_regcontrol[5]; 16699 uint32 pmu_pllcontrol[5]; 16700 uint32 pmu_rsrc_up_down_timer[31]; 16701 uint32 rsrc_dep_mask[31]; 16702 } pmu_reg_t; 16703 /* endif SR_DEBUG */ 16704 16705 typedef struct wl_taf_define { 16706 struct ether_addr ea; /**< STA MAC or 0xFF... */ 16707 uint16 version; /**< version */ 16708 uint32 sch; /**< method index */ 16709 uint32 prio; /**< priority */ 16710 uint32 misc; /**< used for return value */ 16711 uint8 text[]; /**< used to pass and return ascii text */ 16712 } wl_taf_define_t; 16713 16714 /** Received Beacons lengths information */ 16715 #define WL_LAST_BCNS_INFO_FIXED_LEN OFFSETOF(wlc_bcn_len_hist_t, bcnlen_ring) 16716 typedef struct wlc_bcn_len_hist { 16717 uint16 ver; /**< version field */ 16718 uint16 cur_index; /**< current pointed index in ring buffer */ 16719 uint32 max_bcnlen; /**< Max beacon length received */ 16720 uint32 min_bcnlen; /**< Min beacon length received */ 16721 uint32 ringbuff_len; /**< Length of the ring buffer 'bcnlen_ring' */ 16722 uint32 bcnlen_ring[1]; /**< ring buffer storing received beacon lengths */ 16723 } wlc_bcn_len_hist_t; 16724 16725 /* WDS net interface types */ 16726 #define WL_WDSIFTYPE_NONE 0x0 /**< The interface type is neither WDS nor DWDS. */ 16727 #define WL_WDSIFTYPE_WDS 0x1 /**< The interface is WDS type. */ 16728 #define WL_WDSIFTYPE_DWDS 0x2 /**< The interface is DWDS type. */ 16729 16730 typedef struct wl_bssload_static { 16731 uint8 is_static; 16732 uint8 PAD; 16733 uint16 sta_count; 16734 uint8 chan_util; 16735 uint8 PAD; 16736 uint16 aac; 16737 } wl_bssload_static_t; 16738 16739 /* Buffer of size WLC_SAMPLECOLLECT_MAXLEN (=10240 for 4345a0 ACPHY) 16740 * gets copied to this, multiple times 16741 */ 16742 typedef enum wl_gpaio_option { 16743 GPAIO_PMU_AFELDO, 16744 GPAIO_PMU_TXLDO, 16745 GPAIO_PMU_VCOLDO, 16746 GPAIO_PMU_LNALDO, 16747 GPAIO_PMU_ADCLDO, 16748 GPAIO_ICTAT_CAL, 16749 GPAIO_PMU_CLEAR, 16750 GPAIO_OFF, 16751 GPAIO_PMU_LOGENLDO, 16752 GPAIO_PMU_RXLDO2G, 16753 GPAIO_PMU_RXLDO5G, 16754 GPAIO_PMU_LPFTXLDO, 16755 GPAIO_PMU_LDO1P6, 16756 GPAIO_RCAL, 16757 GPAIO_IQDAC_BUF_DC_MEAS, 16758 GPAIO_IQDAC_BUF_DC_CLEAR, 16759 GPAIO_DAC_IQ_DC_RDBK, 16760 GPAIO_DAC_IQ_DC_RDBK_CLEAR, 16761 GPAIO_AFE_LDO_FOR_DAC_DC, 16762 GPAIO_PA5G_VCAS_SOURCE, 16763 GPAIO_BIQ2_DC_MEAS, 16764 GPAIO_BIQ2_DC_CLEAR, 16765 GPAIO_VBATMONITOR, 16766 GPAIO_PA5G_VCAS_GMDRAIN, 16767 GPAIO_PMU_ROLDO, 16768 GPAIO_PMU_PFDLDO, 16769 GPAIO_PMU_LCHLDO, 16770 GPAIO_PMU_MMDLDO, 16771 GPAIO_PMU_VCOCORELDO, 16772 GPAIO_PMU_PLLLDO, 16773 GPAIO_PMU_RXLDO, 16774 GPAIO_IQDAC_DC_TP, 16775 GPAIO_BG_ICTAT_CAL, 16776 GPAIO_BG_ICTAT_UNCAL, 16777 GPAIO_BG_CTAT_UNCAL, 16778 GPAIO_RX_TIA_VDD, 16779 GPAIO_RX_NBIAS_TIA, 16780 GPAIO_RX_NBIAS_LPF, 16781 GPAIO_RX_CMREF_BB, 16782 GPAIO_RX_CMREF_RF, 16783 GPAIO_RX_LDO_RF_V0P8, 16784 GPAIO_RX_IBIAS_N, 16785 GPAIO_RX_IBIAS_P, 16786 GPAIO_DIG_LDO, 16787 GPAIO_IPTAT_UNCAL, 16788 GPAIO_IPTAT_CAL, 16789 GPAIO_VPTAT_UNCAL, 16790 GPAIO_VCTAT_CAL, 16791 GPAIO_VBE, 16792 GPAIO_IOUT_TEST_3U, 16793 GPAIO_VCO_BIAS_N, 16794 GPAIO_VCO_BIAS_P, 16795 GPAIO_VCO_TEMPCO_N, 16796 GPAIO_VCO_TEMPCO_P, 16797 GPAIO_MMD_LDO, 16798 GPAIO_VCO_LDO, 16799 GPAIO_SRO_LDO, 16800 GPAIO_TX_VCTRL, 16801 GPAIO_TX_VCTRL_TC, 16802 GPAIO_GPA_BUF, 16803 GPAIO_LPBK_OUT, 16804 GPAIO_ADC_LPBK_INN, 16805 GPAIO_ADC_LPBK_INP, 16806 GPAIO_ETSSI 16807 } wl_gpaio_option_t; 16808 16809 /** IO Var Operations - the Value of iov_op In wlc_ap_doiovar */ 16810 typedef enum wlc_ap_iov_bss_operation { 16811 WLC_AP_IOV_OP_DELETE = -1, 16812 WLC_AP_IOV_OP_DISABLE = 0, 16813 WLC_AP_IOV_OP_ENABLE = 1, 16814 WLC_AP_IOV_OP_MANUAL_AP_BSSCFG_CREATE = 2, 16815 WLC_AP_IOV_OP_MANUAL_STA_BSSCFG_CREATE = 3, 16816 WLC_AP_IOV_OP_MOVE = 4 16817 } wlc_ap_iov_bss_oper_t; 16818 16819 /* LTE coex info */ 16820 /* Analogue of HCI Set MWS Signaling cmd */ 16821 typedef struct { 16822 int16 mws_rx_assert_offset; 16823 int16 mws_rx_assert_jitter; 16824 int16 mws_rx_deassert_offset; 16825 int16 mws_rx_deassert_jitter; 16826 int16 mws_tx_assert_offset; 16827 int16 mws_tx_assert_jitter; 16828 int16 mws_tx_deassert_offset; 16829 int16 mws_tx_deassert_jitter; 16830 int16 mws_pattern_assert_offset; 16831 int16 mws_pattern_assert_jitter; 16832 int16 mws_inact_dur_assert_offset; 16833 int16 mws_inact_dur_assert_jitter; 16834 int16 mws_scan_freq_assert_offset; 16835 int16 mws_scan_freq_assert_jitter; 16836 int16 mws_prio_assert_offset_req; 16837 } wci2_config_t; 16838 16839 /** Analogue of HCI MWS Channel Params */ 16840 typedef struct { 16841 uint16 mws_rx_center_freq; /**< MHz */ 16842 uint16 mws_tx_center_freq; 16843 uint16 mws_rx_channel_bw; /**< KHz */ 16844 uint16 mws_tx_channel_bw; 16845 uint8 mws_channel_en; 16846 uint8 mws_channel_type; /**< Don't care for WLAN? */ 16847 } mws_params_t; 16848 16849 #define LTECX_MAX_NUM_PERIOD_TYPES 7 16850 16851 /* LTE Frame params */ 16852 typedef struct { 16853 uint16 mws_frame_dur; 16854 int16 mws_framesync_assert_offset; 16855 uint16 mws_framesync_assert_jitter; 16856 uint16 mws_period_dur[LTECX_MAX_NUM_PERIOD_TYPES]; 16857 uint8 mws_period_type[LTECX_MAX_NUM_PERIOD_TYPES]; 16858 uint8 mws_num_periods; 16859 } mws_frame_config_t; 16860 16861 /** MWS wci2 message */ 16862 typedef struct { 16863 uint8 mws_wci2_data; /**< BT-SIG msg */ 16864 uint8 PAD; 16865 uint16 mws_wci2_interval; /**< Interval in us */ 16866 uint16 mws_wci2_repeat; /**< No of msgs to send */ 16867 } mws_wci2_msg_t; 16868 /* MWS ANT map */ 16869 typedef struct { 16870 uint16 combo1; /* mws ant selection 1 */ 16871 uint16 combo2; /* mws ant selection 2 */ 16872 uint16 combo3; /* mws ant selection 3 */ 16873 uint16 combo4; /* mws ant selection 4 */ 16874 } mws_ant_map_t; 16875 16876 /* MWS ANT map 2nd generation */ 16877 typedef struct { 16878 uint16 combo[16]; /* mws ant selection 2nd */ 16879 } mws_ant_map_t_2nd; 16880 16881 /* MWS Coex bitmap v2 map for Type0/Type6 */ 16882 typedef struct { 16883 uint16 bitmap_2G; /* 2G Bitmap */ 16884 uint16 bitmap_5G_lo; /* 5G lo bitmap */ 16885 uint16 bitmap_5G_mid; /* 5G mid bitmap */ 16886 uint16 bitmap_5G_hi; /* 5G hi bitmap */ 16887 } mws_coex_bitmap_v2_t; 16888 16889 /* MWS SCAN_REQ Bitmap */ 16890 typedef struct mws_scanreq_params { 16891 uint16 idx; 16892 uint16 bm_2g; 16893 uint16 bm_5g_lo; 16894 uint16 bm_5g_mid; 16895 uint16 bm_5g_hi; 16896 } mws_scanreq_params_t; 16897 16898 /* MWS NR Coex Channel map */ 16899 #define WL_MWS_NR_COEXMAP_VERSION 1 16900 typedef struct wl_mws_nr_coexmap { 16901 uint16 version; /* Structure version */ 16902 uint16 bitmap_5g_lo; /* bitmap for 5G low channels by 2: 16903 *34-48, 52-56, 60-64, 100-102 16904 */ 16905 uint16 bitmap_5g_mid; /* bitmap for 5G mid channels by 2: 16906 * 104, 108-112, 116-120, 124-128, 16907 * 132-136, 140, 149-151 16908 */ 16909 uint16 bitmap_5g_high; /* bitmap for 5G high channels by 2 16910 * 153, 157-161, 165 16911 */ 16912 } wl_mws_nr_coexmap_t; 16913 16914 typedef struct { 16915 uint32 config; /**< MODE: AUTO (-1), Disable (0), Enable (1) */ 16916 uint32 status; /**< Current state: Disabled (0), Enabled (1) */ 16917 } wl_config_t; 16918 16919 #define WLC_RSDB_MODE_AUTO_MASK 0x80 16920 #define WLC_RSDB_EXTRACT_MODE(val) ((int8)((val) & (~(WLC_RSDB_MODE_AUTO_MASK)))) 16921 16922 typedef struct { 16923 uint16 request; /* type of sensor hub request */ 16924 uint16 enable; /* enable/disable response for specified request */ 16925 uint16 interval; /* interval between responses to the request */ 16926 } shub_req_t; 16927 16928 #define WL_IF_STATS_T_VERSION 1 /**< current version of wl_if_stats structure */ 16929 16930 /** per interface counters */ 16931 typedef struct wl_if_stats { 16932 uint16 version; /**< version of the structure */ 16933 uint16 length; /**< length of the entire structure */ 16934 uint32 PAD; /**< padding */ 16935 16936 /* transmit stat counters */ 16937 uint64 txframe; /**< tx data frames */ 16938 uint64 txbyte; /**< tx data bytes */ 16939 uint64 txerror; /**< tx data errors (derived: sum of others) */ 16940 uint64 txnobuf; /**< tx out of buffer errors */ 16941 uint64 txrunt; /**< tx runt frames */ 16942 uint64 txfail; /**< tx failed frames */ 16943 uint64 txretry; /**< tx retry frames */ 16944 uint64 txretrie; /**< tx multiple retry frames */ 16945 uint64 txfrmsnt; /**< tx sent frames */ 16946 uint64 txmulti; /**< tx mulitcast sent frames */ 16947 uint64 txfrag; /**< tx fragments sent */ 16948 16949 /* receive stat counters */ 16950 uint64 rxframe; /**< rx data frames */ 16951 uint64 rxbyte; /**< rx data bytes */ 16952 uint64 rxerror; /**< rx data errors (derived: sum of others) */ 16953 uint64 rxnobuf; /**< rx out of buffer errors */ 16954 uint64 rxrunt; /**< rx runt frames */ 16955 uint64 rxfragerr; /**< rx fragment errors */ 16956 uint64 rxmulti; /**< rx multicast frames */ 16957 16958 uint64 txexptime; /* DATA Tx frames suppressed due to timer expiration */ 16959 uint64 txrts; /* RTS/CTS succeeeded count */ 16960 uint64 txnocts; /* RTS/CTS faled count */ 16961 16962 uint64 txretrans; /* Number of frame retransmissions */ 16963 } 16964 wl_if_stats_t; 16965 16966 typedef struct wl_band { 16967 uint16 bandtype; /**< WL_BAND_2G, WL_BAND_5G */ 16968 uint16 bandunit; /**< bandstate[] index */ 16969 uint16 phytype; /**< phytype */ 16970 uint16 phyrev; 16971 } 16972 wl_band_t; 16973 16974 #define WL_ROAM_STATS_VER_1 (1u) /**< current version of wl_if_stats structure */ 16975 16976 /** roam statistics counters */ 16977 typedef struct { 16978 uint16 version; /**< version of the structure */ 16979 uint16 length; /**< length of the entire structure */ 16980 uint32 initial_assoc_time; 16981 uint32 prev_roam_time; 16982 uint32 last_roam_event_type; 16983 uint32 last_roam_event_status; 16984 uint32 last_roam_event_reason; 16985 uint16 roam_success_cnt; 16986 uint16 roam_fail_cnt; 16987 uint16 roam_attempt_cnt; 16988 uint16 max_roam_target_cnt; 16989 uint16 min_roam_target_cnt; 16990 uint16 max_cached_ch_cnt; 16991 uint16 min_cached_ch_cnt; 16992 uint16 partial_roam_scan_cnt; 16993 uint16 full_roam_scan_cnt; 16994 uint16 most_roam_reason; 16995 uint16 most_roam_reason_cnt; 16996 } wl_roam_stats_v1_t; 16997 16998 #define WL_WLC_VERSION_T_VERSION 1 /**< current version of wlc_version structure */ 16999 17000 /** wlc interface version */ 17001 typedef struct wl_wlc_version { 17002 uint16 version; /**< version of the structure */ 17003 uint16 length; /**< length of the entire structure */ 17004 17005 /* epi version numbers */ 17006 uint16 epi_ver_major; /**< epi major version number */ 17007 uint16 epi_ver_minor; /**< epi minor version number */ 17008 uint16 epi_rc_num; /**< epi RC number */ 17009 uint16 epi_incr_num; /**< epi increment number */ 17010 17011 /* wlc interface version numbers */ 17012 uint16 wlc_ver_major; /**< wlc interface major version number */ 17013 uint16 wlc_ver_minor; /**< wlc interface minor version number */ 17014 } 17015 wl_wlc_version_t; 17016 17017 #define WL_SCAN_VERSION_T_VERSION 1 /**< current version of scan_version structure */ 17018 /** scan interface version */ 17019 typedef struct wl_scan_version { 17020 uint16 version; /**< version of the structure */ 17021 uint16 length; /**< length of the entire structure */ 17022 17023 /* scan interface version numbers */ 17024 uint16 scan_ver_major; /**< scan interface major version number */ 17025 } wl_scan_version_t; 17026 17027 /* Highest version of WLC_API_VERSION supported */ 17028 #define WLC_API_VERSION_MAJOR_MAX 8 17029 #define WLC_API_VERSION_MINOR_MAX 0 17030 17031 /* begin proxd definitions */ 17032 #include <packed_section_start.h> 17033 17034 #define WL_PROXD_API_VERSION 0x0300u /**< version 3.0 */ 17035 17036 /* proxd version with 11az */ 17037 #define WL_PROXD_11AZ_API_VERSION_1 0x0400u 17038 17039 /** Minimum supported API version */ 17040 #define WL_PROXD_API_MIN_VERSION 0x0300u 17041 17042 /** proximity detection methods */ 17043 enum { 17044 WL_PROXD_METHOD_NONE = 0, 17045 WL_PROXD_METHOD_RSVD1 = 1, /**< backward compatibility - RSSI, not supported */ 17046 WL_PROXD_METHOD_TOF = 2, /**< 11v+BCM proprietary */ 17047 WL_PROXD_METHOD_RSVD2 = 3, /**< 11v only - if needed */ 17048 WL_PROXD_METHOD_FTM = 4, /**< IEEE rev mc/2014 */ 17049 WL_PROXD_METHOD_MAX 17050 }; 17051 typedef int16 wl_proxd_method_t; 17052 17053 /** 11az ftm types */ 17054 enum { 17055 WL_FTM_TYPE_NONE = 0, /* ftm type unspecified */ 17056 WL_FTM_TYPE_MC = 1, /* Legacy MC ftm */ 17057 WL_FTM_TYPE_TB = 2, /* 11az Trigger based */ 17058 WL_FTM_TYPE_NTB = 3, /* 11az Non-trigger based */ 17059 WL_FTM_TYPE_MAX 17060 }; 17061 typedef uint8 wl_ftm_type_t; 17062 17063 /** global and method configuration flags */ 17064 enum { 17065 WL_PROXD_FLAG_NONE = 0x00000000, 17066 WL_PROXD_FLAG_RX_ENABLED = 0x00000001, /**< respond to requests, per bss */ 17067 WL_PROXD_FLAG_RX_RANGE_REQ = 0x00000002, /**< 11mc range requests enabled */ 17068 WL_PROXD_FLAG_TX_LCI = 0x00000004, /**< tx lci, if known */ 17069 WL_PROXD_FLAG_TX_CIVIC = 0x00000008, /**< tx civic, if known */ 17070 WL_PROXD_FLAG_RX_AUTO_BURST = 0x00000010, /**< auto respond w/o host action */ 17071 WL_PROXD_FLAG_TX_AUTO_BURST = 0x00000020, /**< continue tx w/o host action */ 17072 WL_PROXD_FLAG_AVAIL_PUBLISH = 0x00000040, /**< publish availability */ 17073 WL_PROXD_FLAG_AVAIL_SCHEDULE = 0x00000080, /**< schedule using availability */ 17074 WL_PROXD_FLAG_ASAP_CAPABLE = 0x00000100, /* ASAP capable */ 17075 WL_PROXD_FLAG_MBURST_FOLLOWUP = 0x00000200, /* new multi-burst algorithm */ 17076 WL_PROXD_FLAG_SECURE = 0x00000400, /* per bsscfg option */ 17077 WL_PROXD_FLAG_NO_TSF_SYNC = 0x00000800, /* disable tsf sync */ 17078 WL_PROXD_FLAG_ALL = 0xffffffff 17079 }; 17080 typedef uint32 wl_proxd_flags_t; 17081 17082 #define WL_PROXD_FLAGS_AVAIL (WL_PROXD_FLAG_AVAIL_PUBLISH | \ 17083 WL_PROXD_FLAG_AVAIL_SCHEDULE) 17084 17085 typedef enum wl_proxd_session_flags { 17086 WL_PROXD_SESSION_FLAG_NONE = 0x00000000, /**< no flags */ 17087 WL_PROXD_SESSION_FLAG_INITIATOR = 0x00000001, /**< local device is initiator */ 17088 WL_PROXD_SESSION_FLAG_TARGET = 0x00000002, /**< local device is target */ 17089 WL_PROXD_SESSION_FLAG_ONE_WAY = 0x00000004, /**< (initiated) 1-way rtt */ 17090 WL_PROXD_SESSION_FLAG_AUTO_BURST = 0x00000008, /**< created w/ rx_auto_burst */ 17091 WL_PROXD_SESSION_FLAG_PERSIST = 0x00000010, /**< good until cancelled */ 17092 WL_PROXD_SESSION_FLAG_RTT_DETAIL = 0x00000020, /**< rtt detail in results */ 17093 WL_PROXD_SESSION_FLAG_SECURE = 0x00000040, /**< session is secure */ 17094 WL_PROXD_SESSION_FLAG_AOA = 0x00000080, /**< AOA along w/ RTT */ 17095 WL_PROXD_SESSION_FLAG_RX_AUTO_BURST = 0x00000100, /**< Same as proxd flags above */ 17096 WL_PROXD_SESSION_FLAG_TX_AUTO_BURST = 0x00000200, /**< Same as proxd flags above */ 17097 WL_PROXD_SESSION_FLAG_NAN_BSS = 0x00000400, /**< Use NAN BSS, if applicable */ 17098 WL_PROXD_SESSION_FLAG_TS1 = 0x00000800, /**< e.g. FTM1 - ASAP-capable */ 17099 WL_PROXD_SESSION_FLAG_RANDMAC = 0x00001000, /**< use random mac */ 17100 WL_PROXD_SESSION_FLAG_REPORT_FAILURE = 0x00002000, /**< report failure to target */ 17101 WL_PROXD_SESSION_FLAG_INITIATOR_RPT = 0x00004000, /**< report distance to target */ 17102 WL_PROXD_SESSION_FLAG_NOCHANSWT = 0x00008000, 17103 WL_PROXD_SESSION_FLAG_NETRUAL = 0x00010000, /**< netrual mode */ 17104 WL_PROXD_SESSION_FLAG_SEQ_EN = 0x00020000, /**< Toast */ 17105 WL_PROXD_SESSION_FLAG_NO_PARAM_OVRD = 0x00040000, /**< no param override from target */ 17106 WL_PROXD_SESSION_FLAG_ASAP = 0x00080000, /**< ASAP session */ 17107 WL_PROXD_SESSION_FLAG_REQ_LCI = 0x00100000, /**< transmit LCI req */ 17108 WL_PROXD_SESSION_FLAG_REQ_CIV = 0x00200000, /**< transmit civic loc req */ 17109 WL_PROXD_SESSION_FLAG_PRE_SCAN = 0x00400000, /* enable pre-scan for asap=1 */ 17110 WL_PROXD_SESSION_FLAG_AUTO_VHTACK = 0x00800000, /* use vhtack based on brcm ie */ 17111 WL_PROXD_SESSION_FLAG_VHTACK = 0x01000000, /* vht ack is in use - output only */ 17112 WL_PROXD_SESSION_FLAG_BDUR_NOPREF = 0x02000000, /* burst-duration: no preference */ 17113 WL_PROXD_SESSION_FLAG_NUM_FTM_NOPREF = 0x04000000, /* num of FTM frames: no preference */ 17114 WL_PROXD_SESSION_FLAG_FTM_SEP_NOPREF = 0x08000000, /* time btw FTM frams: no pref */ 17115 WL_PROXD_SESSION_FLAG_NUM_BURST_NOPREF = 0x10000000, /* num of bursts: no pref */ 17116 WL_PROXD_SESSION_FLAG_BURST_PERIOD_NOPREF = 0x20000000, /* burst period: no pref */ 17117 WL_PROXD_SESSION_FLAG_MBURST_FOLLOWUP = 0x40000000, /* new mburst algo - reserved */ 17118 WL_PROXD_SESSION_FLAG_MBURST_NODELAY = 0x80000000, /**< good until cancelled */ 17119 /* core rotation on initiator (reuse ONE_WAY bit) */ 17120 WL_PROXD_SESSION_FLAG_CORE_ROTATE = 0x00000004, 17121 WL_PROXD_SESSION_FLAG_ALL = 0xffffffff 17122 } wl_proxd_session_flags_t; 17123 17124 /** session flags for 11AZ */ 17125 17126 /** session flags */ 17127 #define WL_FTM_SESSION_FLAG_NONE 0x0000000000000000llu /* no flags */ 17128 #define WL_FTM_SESSION_FLAG_INITIATOR 0x0000000000000001llu /* local is initiator */ 17129 #define WL_FTM_SESSION_FLAG_TARGET 0x0000000000000002llu /* local is target */ 17130 #define WL_FTM_SESSION_FLAG_CORE_ROTATE 0x0000000000000004llu /* initiator core rotate */ 17131 #define WL_FTM_SESSION_FLAG_AUTO_BURST 0x0000000000000008llu /* rx_auto_burst */ 17132 #define WL_FTM_SESSION_FLAG_PERSIST 0x0000000000000010llu /* good until cancelled */ 17133 #define WL_FTM_SESSION_FLAG_RTT_DETAIL 0x0000000000000020llu /* rtt detail results */ 17134 #define WL_FTM_SESSION_FLAG_SECURE 0x0000000000000040llu /* session is secure */ 17135 #define WL_FTM_SESSION_FLAG_AOA 0x0000000000000080llu /* AOA along w/ RTT */ 17136 #define WL_FTM_SESSION_FLAG_RX_AUTO_BURST 0x0000000000000100llu /* see flags above */ 17137 #define WL_FTM_SESSION_FLAG_TX_AUTO_BURST 0x0000000000000200llu /* see flags above */ 17138 #define WL_FTM_SESSION_FLAG_NAN_BSS 0x0000000000000400llu /* NAN BSS */ 17139 #define WL_FTM_SESSION_FLAG_ASAP_CAPABLE 0x0000000000000800llu /* ASAP-capable */ 17140 #define WL_FTM_SESSION_FLAG_RANDMAC 0x0000000000001000llu /* use random mac */ 17141 #define WL_FTM_SESSION_FLAG_REPORT_FAILURE 0x0000000000002000llu /* failure to target */ 17142 #define WL_FTM_SESSION_FLAG_INITIATOR_RPT 0x0000000000004000llu /* distance to target */ 17143 #define WL_FTM_SESSION_FLAG_NOCHANSWT 0x0000000000008000llu 17144 #define WL_FTM_SESSION_FLAG_NETRUAL 0x0000000000010000llu /* TODO: remove/reserved */ 17145 #define WL_FTM_SESSION_FLAG_SEQ_EN 0x0000000000020000llu /* Toast */ 17146 #define WL_FTM_SESSION_FLAG_NO_PARAM_OVRD 0x0000000000040000llu /* no override from tgt */ 17147 #define WL_FTM_SESSION_FLAG_ASAP 0x0000000000080000llu /* ASAP session */ 17148 #define WL_FTM_SESSION_FLAG_REQ_LCI 0x0000000000100000llu /* tx LCI req */ 17149 #define WL_FTM_SESSION_FLAG_REQ_CIV 0x0000000000200000llu /* tx civic loc req */ 17150 #define WL_FTM_SESSION_FLAG_PRE_SCAN 0x0000000000400000llu /* pre-scan for asap=1 */ 17151 #define WL_FTM_SESSION_FLAG_AUTO_VHTACK 0x0000000000800000llu /* vhtack based on brcmie */ 17152 #define WL_FTM_SESSION_FLAG_VHTACK 0x0000000001000000llu /* vht ack is in use */ 17153 #define WL_FTM_SESSION_FLAG_BDUR_NOPREF 0x0000000002000000llu /* burst-duration no pref */ 17154 #define WL_FTM_SESSION_FLAG_NUM_FTM_NOPREF 0x0000000004000000llu /* num of FTM: no pref */ 17155 #define WL_FTM_SESSION_FLAG_FTM_SEP_NOPREF 0x0000000008000000llu /* time btw FTM: no pref */ 17156 #define WL_FTM_SESSION_FLAG_NUM_BURST_NOPREF 0x0000000010000000llu /* num of bursts: no pref */ 17157 #define WL_FTM_SESSION_FLAG_BURST_PERIOD_NOPREF 0x0000000020000000llu /* burst period: no pref */ 17158 #define WL_FTM_SESSION_FLAG_MBURST_FOLLOWUP 0x0000000040000000llu /* new mburst algo */ 17159 #define WL_FTM_SESSION_FLAG_MBURST_NODELAY 0x0000000080000000llu /* good until cancelled */ 17160 #define WL_FTM_SESSION_FLAG_FULL_BW 0x0000000100000000llu /* use all bandwidth */ 17161 #define WL_FTM_SESSION_FLAG_R2I_TOA_PHASE_SHIFT 0x0000000200000000llu /* phase shft average toa */ 17162 #define WL_FTM_SESSION_FLAG_I2R_TOA_PHASE_SHIFT 0x0000000400000000llu /* phase shft average toa */ 17163 #define WL_FTM_SESSION_FLAG_I2R_IMMEDIATE_RPT 0x0000000800000000llu /* immediate I2R feedback */ 17164 #define WL_FTM_SESSION_FLAG_R2I_IMMEDIATE_RPT 0x0000001000000000llu /* immediate R2R report */ 17165 #define WL_FTM_SESSION_FLAG_DEV_CLASS_A 0x0000002000000000llu /* class A device */ 17166 #define WL_FTM_SESSION_FLAG_ALL 0xffffffffffffffffllu 17167 typedef uint64 wl_ftm_session_flags_t; 17168 typedef uint64 wl_ftm_session_mask_t; 17169 17170 /* flags common across mc/ntb/tb. 17171 * Explicit for the ones that are currently used. 17172 * Currently not used ones still reserve their bits in above. 17173 */ 17174 #define FTM_COMMON_CONFIG_MASK \ 17175 (WL_FTM_SESSION_FLAG_INITIATOR \ 17176 | WL_FTM_SESSION_FLAG_INITIATOR_RPT \ 17177 | WL_FTM_SESSION_FLAG_TARGET \ 17178 | WL_FTM_SESSION_FLAG_SECURE \ 17179 | WL_FTM_SESSION_FLAG_CORE_ROTATE \ 17180 | WL_FTM_SESSION_FLAG_RANDMAC \ 17181 | WL_FTM_SESSION_FLAG_RX_AUTO_BURST \ 17182 | WL_FTM_SESSION_FLAG_TX_AUTO_BURST \ 17183 | WL_FTM_SESSION_FLAG_REQ_LCI \ 17184 | WL_FTM_SESSION_FLAG_REQ_CIV \ 17185 | WL_FTM_SESSION_FLAG_RTT_DETAIL \ 17186 | WL_FTM_SESSION_FLAG_NO_PARAM_OVRD \ 17187 | WL_FTM_SESSION_FLAG_AUTO_BURST) 17188 17189 /* flags relevant to MC sessions */ 17190 #define FTM_MC_CONFIG_MASK \ 17191 (FTM_COMMON_CONFIG_MASK) | \ 17192 (WL_FTM_SESSION_FLAG_AUTO_VHTACK \ 17193 | WL_FTM_SESSION_FLAG_MBURST_NODELAY \ 17194 | WL_FTM_SESSION_FLAG_ASAP_CAPABLE \ 17195 | WL_FTM_SESSION_FLAG_ASAP \ 17196 | WL_FTM_SESSION_FLAG_VHTACK \ 17197 | WL_FTM_SESSION_FLAG_BDUR_NOPREF \ 17198 | WL_FTM_SESSION_FLAG_NUM_FTM_NOPREF \ 17199 | WL_FTM_SESSION_FLAG_FTM_SEP_NOPREF \ 17200 | WL_FTM_SESSION_FLAG_NUM_BURST_NOPREF \ 17201 | WL_FTM_SESSION_FLAG_BURST_PERIOD_NOPREF \ 17202 | WL_FTM_SESSION_FLAG_SEQ_EN \ 17203 | WL_FTM_SESSION_FLAG_MBURST_FOLLOWUP) 17204 17205 /* flags relevant to NTB sessions */ 17206 #define FTM_NTB_CONFIG_MASK \ 17207 (FTM_COMMON_CONFIG_MASK) | \ 17208 (WL_FTM_SESSION_FLAG_R2I_TOA_PHASE_SHIFT \ 17209 | WL_FTM_SESSION_FLAG_I2R_TOA_PHASE_SHIFT \ 17210 | WL_FTM_SESSION_FLAG_I2R_IMMEDIATE_RPT \ 17211 | WL_FTM_SESSION_FLAG_R2I_IMMEDIATE_RPT) 17212 17213 /* flages relevant to TB sessions. To be expanded */ 17214 #define FTM_TB_CONFIG_MASK (FTM_NTB_CONFIG_MASK) 17215 17216 /** time units - mc supports up to 0.1ns resolution */ 17217 enum { 17218 WL_PROXD_TMU_TU = 0, /**< 1024us */ 17219 WL_PROXD_TMU_SEC = 1, 17220 WL_PROXD_TMU_MILLI_SEC = 2, 17221 WL_PROXD_TMU_MICRO_SEC = 3, 17222 WL_PROXD_TMU_NANO_SEC = 4, 17223 WL_PROXD_TMU_PICO_SEC = 5 17224 }; 17225 typedef int16 wl_proxd_tmu_t; 17226 17227 /** time interval e.g. 10ns */ 17228 typedef struct wl_proxd_intvl { 17229 uint32 intvl; 17230 wl_proxd_tmu_t tmu; 17231 uint8 pad[2]; 17232 } wl_proxd_intvl_t; 17233 17234 /** commands that can apply to proxd, method or a session */ 17235 enum { 17236 WL_PROXD_CMD_NONE = 0, 17237 WL_PROXD_CMD_GET_VERSION = 1, 17238 WL_PROXD_CMD_ENABLE = 2, 17239 WL_PROXD_CMD_DISABLE = 3, 17240 WL_PROXD_CMD_CONFIG = 4, 17241 WL_PROXD_CMD_START_SESSION = 5, 17242 WL_PROXD_CMD_BURST_REQUEST = 6, 17243 WL_PROXD_CMD_STOP_SESSION = 7, 17244 WL_PROXD_CMD_DELETE_SESSION = 8, 17245 WL_PROXD_CMD_GET_RESULT = 9, 17246 WL_PROXD_CMD_GET_INFO = 10, 17247 WL_PROXD_CMD_GET_STATUS = 11, 17248 WL_PROXD_CMD_GET_SESSIONS = 12, 17249 WL_PROXD_CMD_GET_COUNTERS = 13, 17250 WL_PROXD_CMD_CLEAR_COUNTERS = 14, 17251 WL_PROXD_CMD_COLLECT = 15, /* not supported, see 'wl proxd_collect' */ 17252 WL_PROXD_CMD_TUNE = 16, /* not supported, see 'wl proxd_tune' */ 17253 WL_PROXD_CMD_DUMP = 17, 17254 WL_PROXD_CMD_START_RANGING = 18, 17255 WL_PROXD_CMD_STOP_RANGING = 19, 17256 WL_PROXD_CMD_GET_RANGING_INFO = 20, 17257 WL_PROXD_CMD_IS_TLV_SUPPORTED = 21, 17258 17259 WL_PROXD_CMD_MAX 17260 }; 17261 typedef int16 wl_proxd_cmd_t; 17262 17263 /* session ids: 17264 * id 0 is reserved 17265 * ids 1..0x7fff - allocated by host/app 17266 * ids 0x8000..0xffff - allocated by firmware, used for auto-rx 17267 */ 17268 enum { 17269 WL_PROXD_SESSION_ID_GLOBAL = 0 17270 }; 17271 17272 /* Externally allocated sids */ 17273 #define WL_PROXD_SID_EXT_MAX 0x7fff 17274 #define WL_PROXD_SID_EXT_ALLOC(_sid) ((_sid) > 0 && (_sid) <= WL_PROXD_SID_EXT_MAX) 17275 17276 /* block size for reserved sid blocks */ 17277 #define WL_PROXD_SID_EXT_BLKSZ 256 17278 #define WL_PROXD_SID_EXT_BLK_START(_i) (WL_PROXD_SID_EXT_MAX - (_i) * WL_PROXD_SID_EXT_BLKSZ + 1) 17279 #define WL_PROXD_SID_EXT_BLK_END(_start) ((_start) + WL_PROXD_SID_EXT_BLKSZ - 1) 17280 17281 /* rrm block */ 17282 #define WL_PROXD_SID_RRM_START WL_PROXD_SID_EXT_BLK_START(1) 17283 #define WL_PROXD_SID_RRM_END WL_PROXD_SID_EXT_BLK_END(WL_PROXD_SID_RRM_START) 17284 17285 /* nan block */ 17286 #define WL_PROXD_SID_NAN_START WL_PROXD_SID_EXT_BLK_START(2) 17287 #define WL_PROXD_SID_NAN_END WL_PROXD_SID_EXT_BLK_END(WL_PROXD_SID_NAN_START) 17288 17289 /** maximum number sessions that can be allocated, may be less if tunable */ 17290 #define WL_PROXD_MAX_SESSIONS 16 17291 17292 typedef uint16 wl_proxd_session_id_t; 17293 17294 /* Use WL_PROXD_E_* errorcodes from this file if BCMUTILS_ERR_CODES not defined */ 17295 #ifndef BCMUTILS_ERR_CODES 17296 17297 /** status - TBD BCME_ vs proxd status - range reserved for BCME_ */ 17298 enum { 17299 WL_PROXD_E_LAST = -1056, 17300 WL_PROXD_E_NOAVAIL = -1056, 17301 WL_PROXD_E_EXT_SCHED = -1055, 17302 WL_PROXD_E_NOT_BCM = -1054, 17303 WL_PROXD_E_FRAME_TYPE = -1053, 17304 WL_PROXD_E_VERNOSUPPORT = -1052, 17305 WL_PROXD_E_SEC_NOKEY = -1051, 17306 WL_PROXD_E_SEC_POLICY = -1050, 17307 WL_PROXD_E_SCAN_INPROCESS = -1049, 17308 WL_PROXD_E_BAD_PARTIAL_TSF = -1048, 17309 WL_PROXD_E_SCANFAIL = -1047, 17310 WL_PROXD_E_NOTSF = -1046, 17311 WL_PROXD_E_POLICY = -1045, 17312 WL_PROXD_E_INCOMPLETE = -1044, 17313 WL_PROXD_E_OVERRIDDEN = -1043, 17314 WL_PROXD_E_ASAP_FAILED = -1042, 17315 WL_PROXD_E_NOTSTARTED = -1041, 17316 WL_PROXD_E_INVALIDMEAS = -1040, 17317 WL_PROXD_E_INCAPABLE = -1039, 17318 WL_PROXD_E_MISMATCH = -1038, 17319 WL_PROXD_E_DUP_SESSION = -1037, 17320 WL_PROXD_E_REMOTE_FAIL = -1036, 17321 WL_PROXD_E_REMOTE_INCAPABLE = -1035, 17322 WL_PROXD_E_SCHED_FAIL = -1034, 17323 WL_PROXD_E_PROTO = -1033, 17324 WL_PROXD_E_EXPIRED = -1032, 17325 WL_PROXD_E_TIMEOUT = -1031, 17326 WL_PROXD_E_NOACK = -1030, 17327 WL_PROXD_E_DEFERRED = -1029, 17328 WL_PROXD_E_INVALID_SID = -1028, 17329 WL_PROXD_E_REMOTE_CANCEL = -1027, 17330 WL_PROXD_E_CANCELED = -1026, /**< local */ 17331 WL_PROXD_E_INVALID_SESSION = -1025, 17332 WL_PROXD_E_BAD_STATE = -1024, 17333 WL_PROXD_E_START = -1024, 17334 WL_PROXD_E_ERROR = -1, 17335 WL_PROXD_E_OK = 0 17336 }; 17337 typedef int32 wl_proxd_status_t; 17338 17339 #endif /* BCMUTILS_ERR_CODES */ 17340 17341 /* proxd errors from phy */ 17342 #define PROXD_TOF_INIT_ERR_BITS 16 17343 17344 enum { 17345 WL_PROXD_PHY_ERR_LB_CORR_THRESH = (1 << 0), /* Loopback Correlation threshold */ 17346 WL_PROXD_PHY_ERR_RX_CORR_THRESH = (1 << 1), /* Received Correlation threshold */ 17347 WL_PROXD_PHY_ERR_LB_PEAK_POWER = (1 << 2), /* Loopback Peak power */ 17348 WL_PROXD_PHY_ERR_RX_PEAK_POWER = (1 << 3), /* Received Peak power */ 17349 WL_PROXD_PHY_ERR_BITFLIP = (1 << 4), /* Bitflips */ 17350 WL_PROXD_PHY_ERR_SNR = (1 << 5), /* SNR */ 17351 WL_PROXD_PHY_RX_STRT_WIN_OFF = (1 << 6), /* Receive start window is off */ 17352 WL_PROXD_PHY_RX_END_WIN_OFF = (1 << 7), /* Receive End window is off */ 17353 WL_PROXD_PHY_ERR_LOW_CONFIDENCE = (1 << 15), /* Low confidence on meas distance */ 17354 }; 17355 typedef uint32 wl_proxd_phy_error_t; 17356 17357 /** session states */ 17358 enum { 17359 WL_PROXD_SESSION_STATE_NONE = 0, 17360 WL_PROXD_SESSION_STATE_CREATED = 1, 17361 WL_PROXD_SESSION_STATE_CONFIGURED = 2, 17362 WL_PROXD_SESSION_STATE_STARTED = 3, 17363 WL_PROXD_SESSION_STATE_DELAY = 4, 17364 WL_PROXD_SESSION_STATE_USER_WAIT = 5, 17365 WL_PROXD_SESSION_STATE_SCHED_WAIT = 6, 17366 WL_PROXD_SESSION_STATE_BURST = 7, 17367 WL_PROXD_SESSION_STATE_STOPPING = 8, 17368 WL_PROXD_SESSION_STATE_ENDED = 9, 17369 WL_PROXD_SESSION_STATE_START_WAIT = 10, 17370 WL_PROXD_SESSION_STATE_DESTROYING = -1 17371 }; 17372 17373 typedef enum wl_ftm_session_state { 17374 WL_FTM_SESSION_STATE_NONE = 0, 17375 WL_FTM_SESSION_STATE_CREATED = 1, 17376 WL_FTM_SESSION_STATE_CONFIGURED = 2, 17377 WL_FTM_SESSION_STATE_STARTED = 3, 17378 WL_FTM_SESSION_STATE_DELAY = 4, 17379 WL_FTM_SESSION_STATE_USER_WAIT = 5, 17380 WL_FTM_SESSION_STATE_SCHED_WAIT = 6, 17381 WL_FTM_SESSION_STATE_BURST = 7, 17382 WL_FTM_SESSION_STATE_ENDED = 8 17383 } wl_ftm_session_state_t; 17384 17385 typedef int16 wl_proxd_session_state_t; 17386 17387 /** RTT sample flags */ 17388 enum { 17389 WL_PROXD_RTT_SAMPLE_NONE = 0x00, 17390 WL_PROXD_RTT_SAMPLE_DISCARD = 0x01 17391 }; 17392 typedef uint8 wl_proxd_rtt_sample_flags_t; 17393 typedef int16 wl_proxd_rssi_t; 17394 typedef uint16 wl_proxd_snr_t; 17395 typedef uint16 wl_proxd_bitflips_t; 17396 17397 /** result flags */ 17398 enum { 17399 WL_PRXOD_RESULT_FLAG_NONE = 0x0000, 17400 WL_PROXD_RESULT_FLAG_NLOS = 0x0001, /**< LOS - if available */ 17401 WL_PROXD_RESULT_FLAG_LOS = 0x0002, /**< NLOS - if available */ 17402 WL_PROXD_RESULT_FLAG_FATAL = 0x0004, /**< Fatal error during burst */ 17403 WL_PROXD_RESULT_FLAG_VHTACK = 0x0008, /* VHTACK or Legacy ACK used */ 17404 WL_PROXD_REQUEST_SENT = 0x0010, /* FTM request was sent */ 17405 WL_PROXD_REQUEST_ACKED = 0x0020, /* FTM request was acked */ 17406 WL_PROXD_LTFSEQ_STARTED = 0x0040, /* LTF sequence started */ 17407 WL_PROXD_RESULT_FLAG_ALL = 0xffff 17408 }; 17409 typedef int16 wl_proxd_result_flags_t; 17410 17411 #define WL_PROXD_RTT_SAMPLE_VERSION_1 1 17412 typedef struct wl_proxd_rtt_sample_v1 { 17413 uint8 id; /**< id for the sample - non-zero */ 17414 wl_proxd_rtt_sample_flags_t flags; 17415 wl_proxd_rssi_t rssi; 17416 wl_proxd_intvl_t rtt; /**< round trip time */ 17417 uint32 ratespec; 17418 wl_proxd_snr_t snr; 17419 wl_proxd_bitflips_t bitflips; 17420 wl_proxd_status_t status; 17421 int32 distance; 17422 wl_proxd_phy_error_t tof_phy_error; 17423 wl_proxd_phy_error_t tof_tgt_phy_error; /* target phy error bit map */ 17424 wl_proxd_snr_t tof_tgt_snr; 17425 wl_proxd_bitflips_t tof_tgt_bitflips; 17426 uint8 coreid; 17427 uint8 pad[3]; 17428 } wl_proxd_rtt_sample_v1_t; 17429 17430 #define WL_PROXD_RTT_RESULT_VERSION_1 1 17431 /** rtt measurement result */ 17432 typedef struct wl_proxd_rtt_result_v1 { 17433 wl_proxd_session_id_t sid; 17434 wl_proxd_result_flags_t flags; 17435 wl_proxd_status_t status; 17436 struct ether_addr peer; 17437 wl_proxd_session_state_t state; /**< current state */ 17438 union { 17439 wl_proxd_intvl_t retry_after; /* hint for errors */ 17440 wl_proxd_intvl_t burst_duration; /* burst duration */ 17441 } u; 17442 wl_proxd_rtt_sample_v1_t avg_rtt; 17443 uint32 avg_dist; /* 1/256m units */ 17444 uint16 sd_rtt; /* RTT standard deviation */ 17445 uint8 num_valid_rtt; /* valid rtt cnt */ 17446 uint8 num_ftm; /* actual num of ftm cnt (Configured) */ 17447 uint16 burst_num; /* in a session */ 17448 uint16 num_rtt; /* 0 if no detail */ 17449 uint16 num_meas; /* number of ftm frames seen OTA */ 17450 uint8 pad[2]; 17451 wl_proxd_rtt_sample_v1_t rtt[1]; /* variable */ 17452 } wl_proxd_rtt_result_v1_t; 17453 17454 #define WL_PROXD_RTT_SAMPLE_VERSION_2 2 17455 typedef struct wl_proxd_rtt_sample_v2 { 17456 uint16 version; 17457 uint16 length; 17458 uint8 id; /**< id for the sample - non-zero */ 17459 wl_proxd_rtt_sample_flags_t flags; 17460 wl_proxd_rssi_t rssi; 17461 wl_proxd_intvl_t rtt; /**< round trip time */ 17462 uint32 ratespec; 17463 wl_proxd_snr_t snr; 17464 wl_proxd_bitflips_t bitflips; 17465 wl_proxd_status_t status; 17466 int32 distance; 17467 wl_proxd_phy_error_t tof_phy_error; 17468 wl_proxd_phy_error_t tof_tgt_phy_error; /* target phy error bit map */ 17469 wl_proxd_snr_t tof_tgt_snr; 17470 wl_proxd_bitflips_t tof_tgt_bitflips; 17471 uint8 coreid; 17472 uint8 pad[3]; 17473 uint32 chanspec; 17474 } wl_proxd_rtt_sample_v2_t; 17475 17476 #define WL_PROXD_RTT_RESULT_VERSION_2 2 17477 /** rtt measurement result */ 17478 typedef struct wl_proxd_rtt_result_v2 { 17479 uint16 version; 17480 uint16 length; /* up to rtt[] */ 17481 wl_proxd_session_id_t sid; 17482 wl_proxd_result_flags_t flags; 17483 wl_proxd_status_t status; 17484 struct ether_addr peer; 17485 wl_proxd_session_state_t state; /**< current state */ 17486 union { 17487 wl_proxd_intvl_t retry_after; /* hint for errors */ 17488 wl_proxd_intvl_t burst_duration; /* burst duration */ 17489 } u; 17490 uint32 avg_dist; /* 1/256m units */ 17491 uint16 sd_rtt; /* RTT standard deviation */ 17492 uint8 num_valid_rtt; /* valid rtt cnt */ 17493 uint8 num_ftm; /* actual num of ftm cnt (Configured) */ 17494 uint16 burst_num; /* in a session */ 17495 uint16 num_rtt; /* 0 if no detail */ 17496 uint16 num_meas; /* number of ftm frames seen OTA */ 17497 uint8 pad[2]; 17498 wl_proxd_rtt_sample_v2_t rtt[1]; /* variable, first element is avg_rtt */ 17499 } wl_proxd_rtt_result_v2_t; 17500 17501 /** aoa measurement result */ 17502 typedef struct wl_proxd_aoa_result { 17503 wl_proxd_session_id_t sid; 17504 wl_proxd_result_flags_t flags; 17505 wl_proxd_status_t status; 17506 struct ether_addr peer; 17507 wl_proxd_session_state_t state; 17508 uint16 burst_num; 17509 uint8 pad[2]; 17510 /* wl_proxd_aoa_sample_t sample_avg; TBD */ 17511 } BWL_POST_PACKED_STRUCT wl_proxd_aoa_result_t; 17512 #include <packed_section_end.h> 17513 17514 /** global stats */ 17515 typedef struct wl_proxd_counters { 17516 uint32 tx; /* tx frame count */ 17517 uint32 rx; /* rx frame count */ 17518 uint32 burst; /* total number of burst */ 17519 uint32 sessions; /* total number of sessions */ 17520 uint32 max_sessions; /* max concurrency */ 17521 uint32 sched_fail; /* scheduling failures */ 17522 uint32 timeouts; /* timeouts */ 17523 uint32 protoerr; /* protocol errors */ 17524 uint32 noack; /* tx w/o ack */ 17525 uint32 txfail; /* any tx falure */ 17526 uint32 lci_req_tx; /* tx LCI requests */ 17527 uint32 lci_req_rx; /* rx LCI requests */ 17528 uint32 lci_rep_tx; /* tx LCI reports */ 17529 uint32 lci_rep_rx; /* rx LCI reports */ 17530 uint32 civic_req_tx; /* tx civic requests */ 17531 uint32 civic_req_rx; /* rx civic requests */ 17532 uint32 civic_rep_tx; /* tx civic reports */ 17533 uint32 civic_rep_rx; /* rx civic reports */ 17534 uint32 rctx; /* ranging contexts created */ 17535 uint32 rctx_done; /* count of ranging done */ 17536 uint32 publish_err; /* availability publishing errors */ 17537 uint32 on_chan; /* count of scheduler onchan */ 17538 uint32 off_chan; /* count of scheduler offchan */ 17539 uint32 tsf_lo; /* local tsf or session tsf */ 17540 uint32 tsf_hi; 17541 uint32 num_meas; 17542 } wl_proxd_counters_t; 17543 17544 typedef struct wl_proxd_counters wl_proxd_session_counters_t; 17545 17546 enum { 17547 WL_PROXD_CAP_NONE = 0x0000, 17548 WL_PROXD_CAP_ALL = 0xffff 17549 }; 17550 typedef int16 wl_proxd_caps_t; 17551 17552 /** method capabilities */ 17553 enum { 17554 WL_PROXD_FTM_CAP_NONE = 0x0000, 17555 WL_PROXD_FTM_CAP_FTM1 = 0x0001 17556 }; 17557 typedef uint16 wl_proxd_ftm_caps_t; 17558 17559 typedef struct wl_proxd_tlv_id_list { 17560 uint16 num_ids; 17561 uint16 ids[1]; 17562 } wl_proxd_tlv_id_list_t; 17563 17564 typedef struct wl_proxd_session_id_list { 17565 uint16 num_ids; 17566 wl_proxd_session_id_t ids[1]; 17567 } wl_proxd_session_id_list_t; 17568 17569 typedef struct wl_proxd_tpk { 17570 struct ether_addr peer; 17571 uint8 tpk[TPK_FTM_LEN]; 17572 } wl_proxd_tpk_t; 17573 17574 /* tlvs returned for get_info on ftm method 17575 * configuration: 17576 * proxd flags 17577 * event mask 17578 * debug mask 17579 * session defaults (session tlvs) 17580 * status tlv - not supported for ftm method 17581 * info tlv 17582 */ 17583 typedef struct wl_proxd_ftm_info { 17584 wl_proxd_ftm_caps_t caps; 17585 uint16 max_sessions; 17586 uint16 num_sessions; 17587 uint16 rx_max_burst; 17588 } wl_proxd_ftm_info_t; 17589 17590 enum { 17591 WL_PROXD_WAIT_NONE = 0x0000, 17592 WL_PROXD_WAIT_KEY = 0x0001, 17593 WL_PROXD_WAIT_SCHED = 0x0002, 17594 WL_PROXD_WAIT_TSF = 0x0004 17595 }; 17596 typedef int16 wl_proxd_wait_reason_t; 17597 17598 /* tlvs returned for get_info on session 17599 * session config (tlvs) 17600 * session info tlv 17601 */ 17602 typedef struct wl_proxd_ftm_session_info { 17603 uint16 sid; 17604 uint8 bss_index; 17605 uint8 pad; 17606 struct ether_addr bssid; 17607 wl_proxd_session_state_t state; 17608 wl_proxd_status_t status; 17609 uint16 burst_num; 17610 wl_proxd_wait_reason_t wait_reason; 17611 uint32 meas_start_lo; /* sn tsf of 1st meas for cur/prev burst */ 17612 uint32 meas_start_hi; 17613 } wl_proxd_ftm_session_info_t; 17614 17615 typedef struct wl_proxd_ftm_session_status { 17616 uint16 sid; 17617 wl_proxd_session_state_t state; 17618 wl_proxd_status_t status; 17619 uint16 burst_num; 17620 uint16 core_info; 17621 } wl_proxd_ftm_session_status_t; 17622 17623 /** rrm range request */ 17624 typedef struct wl_proxd_range_req { 17625 uint16 num_repeat; 17626 uint16 init_delay_range; /**< in TUs */ 17627 uint8 pad; 17628 uint8 num_nbr; /**< number of (possible) neighbors */ 17629 nbr_element_t nbr[1]; 17630 } wl_proxd_range_req_t; 17631 17632 #define WL_PROXD_LCI_LAT_OFF 0 17633 #define WL_PROXD_LCI_LONG_OFF 5 17634 #define WL_PROXD_LCI_ALT_OFF 10 17635 17636 #define WL_PROXD_LCI_GET_LAT(_lci, _lat, _lat_err) { \ 17637 unsigned _off = WL_PROXD_LCI_LAT_OFF; \ 17638 _lat_err = (_lci)->data[(_off)] & 0x3f; \ 17639 _lat = (_lci)->data[(_off)+1]; \ 17640 _lat |= (_lci)->data[(_off)+2] << 8; \ 17641 _lat |= (_lci)->data[_(_off)+3] << 16; \ 17642 _lat |= (_lci)->data[(_off)+4] << 24; \ 17643 _lat <<= 2; \ 17644 _lat |= (_lci)->data[(_off)] >> 6; \ 17645 } 17646 17647 #define WL_PROXD_LCI_GET_LONG(_lci, _lcilong, _long_err) { \ 17648 unsigned _off = WL_PROXD_LCI_LONG_OFF; \ 17649 _long_err = (_lci)->data[(_off)] & 0x3f; \ 17650 _lcilong = (_lci)->data[(_off)+1]; \ 17651 _lcilong |= (_lci)->data[(_off)+2] << 8; \ 17652 _lcilong |= (_lci)->data[_(_off)+3] << 16; \ 17653 _lcilong |= (_lci)->data[(_off)+4] << 24; \ 17654 __lcilong <<= 2; \ 17655 _lcilong |= (_lci)->data[(_off)] >> 6; \ 17656 } 17657 17658 #define WL_PROXD_LCI_GET_ALT(_lci, _alt_type, _alt, _alt_err) { \ 17659 unsigned _off = WL_PROXD_LCI_ALT_OFF; \ 17660 _alt_type = (_lci)->data[_off] & 0x0f; \ 17661 _alt_err = (_lci)->data[(_off)] >> 4; \ 17662 _alt_err |= ((_lci)->data[(_off)+1] & 0x03) << 4; \ 17663 _alt = (_lci)->data[(_off)+2]; \ 17664 _alt |= (_lci)->data[(_off)+3] << 8; \ 17665 _alt |= (_lci)->data[_(_off)+4] << 16; \ 17666 _alt <<= 6; \ 17667 _alt |= (_lci)->data[(_off) + 1] >> 2; \ 17668 } 17669 17670 #define WL_PROXD_LCI_VERSION(_lci) ((_lci)->data[15] >> 6) 17671 17672 /* availability. advertising mechanism bss specific */ 17673 /** availablity flags */ 17674 enum { 17675 WL_PROXD_AVAIL_NONE = 0, 17676 WL_PROXD_AVAIL_NAN_PUBLISHED = 0x0001, 17677 WL_PROXD_AVAIL_SCHEDULED = 0x0002 /**< scheduled by proxd */ 17678 }; 17679 typedef int16 wl_proxd_avail_flags_t; 17680 17681 /** time reference */ 17682 enum { 17683 WL_PROXD_TREF_NONE = 0, 17684 WL_PROXD_TREF_DEV_TSF = 1, 17685 WL_PROXD_TREF_NAN_DW = 2, 17686 WL_PROXD_TREF_TBTT = 3, 17687 WL_PROXD_TREF_MAX /* last entry */ 17688 }; 17689 typedef int16 wl_proxd_time_ref_t; 17690 17691 /** proxd channel-time slot */ 17692 typedef struct { 17693 wl_proxd_intvl_t start; /**< from ref */ 17694 wl_proxd_intvl_t duration; /**< from start */ 17695 uint32 chanspec; 17696 } wl_proxd_time_slot_t; 17697 17698 typedef struct wl_proxd_avail24 { 17699 wl_proxd_avail_flags_t flags; /**< for query only */ 17700 wl_proxd_time_ref_t time_ref; 17701 uint16 max_slots; /**< for query only */ 17702 uint16 num_slots; 17703 wl_proxd_time_slot_t slots[1]; /**< ROM compat - not used */ 17704 wl_proxd_intvl_t repeat; 17705 wl_proxd_time_slot_t ts0[1]; 17706 } wl_proxd_avail24_t; 17707 #define WL_PROXD_AVAIL24_TIMESLOT(_avail24, _i) (&(_avail24)->ts0[(_i)]) 17708 #define WL_PROXD_AVAIL24_TIMESLOT_OFFSET(_avail24) OFFSETOF(wl_proxd_avail24_t, ts0) 17709 #define WL_PROXD_AVAIL24_TIMESLOTS(_avail24) WL_PROXD_AVAIL24_TIMESLOT(_avail24, 0) 17710 #define WL_PROXD_AVAIL24_SIZE(_avail24, _num_slots) (\ 17711 WL_PROXD_AVAIL24_TIMESLOT_OFFSET(_avail24) + \ 17712 (_num_slots) * sizeof(*WL_PROXD_AVAIL24_TIMESLOT(_avail24, 0))) 17713 17714 typedef struct wl_proxd_avail { 17715 wl_proxd_avail_flags_t flags; /**< for query only */ 17716 wl_proxd_time_ref_t time_ref; 17717 uint16 max_slots; /**< for query only */ 17718 uint16 num_slots; 17719 wl_proxd_intvl_t repeat; 17720 wl_proxd_time_slot_t slots[1]; 17721 } wl_proxd_avail_t; 17722 #define WL_PROXD_AVAIL_TIMESLOT(_avail, _i) (&(_avail)->slots[(_i)]) 17723 #define WL_PROXD_AVAIL_TIMESLOT_OFFSET(_avail) OFFSETOF(wl_proxd_avail_t, slots) 17724 17725 #define WL_PROXD_AVAIL_TIMESLOTS(_avail) WL_PROXD_AVAIL_TIMESLOT(_avail, 0) 17726 #define WL_PROXD_AVAIL_SIZE(_avail, _num_slots) (\ 17727 WL_PROXD_AVAIL_TIMESLOT_OFFSET(_avail) + \ 17728 (_num_slots) * sizeof(*WL_PROXD_AVAIL_TIMESLOT(_avail, 0))) 17729 17730 /* collect support TBD */ 17731 17732 /** debugging */ 17733 enum { 17734 WL_PROXD_DEBUG_NONE = 0x00000000, 17735 WL_PROXD_DEBUG_LOG = 0x00000001, 17736 WL_PROXD_DEBUG_IOV = 0x00000002, 17737 WL_PROXD_DEBUG_EVENT = 0x00000004, 17738 WL_PROXD_DEBUG_SESSION = 0x00000008, 17739 WL_PROXD_DEBUG_PROTO = 0x00000010, 17740 WL_PROXD_DEBUG_SCHED = 0x00000020, 17741 WL_PROXD_DEBUG_RANGING = 0x00000040, 17742 WL_PROXD_DEBUG_NAN = 0x00000080, 17743 WL_PROXD_DEBUG_PKT = 0x00000100, 17744 WL_PROXD_DEBUG_SEC = 0x00000200, 17745 WL_PROXD_DEBUG_EVENTLOG = 0x80000000, /* map/enable EVNET_LOG_TAG_PROXD_INFO */ 17746 WL_PROXD_DEBUG_ALL = 0xffffffff 17747 }; 17748 typedef uint32 wl_proxd_debug_mask_t; 17749 17750 /** tlv IDs - data length 4 bytes unless overridden by type, alignment 32 bits */ 17751 typedef enum { 17752 WL_PROXD_TLV_ID_NONE = 0, 17753 WL_PROXD_TLV_ID_METHOD = 1, 17754 WL_PROXD_TLV_ID_FLAGS = 2, 17755 WL_PROXD_TLV_ID_CHANSPEC = 3, /**< note: uint32 */ 17756 WL_PROXD_TLV_ID_TX_POWER = 4, 17757 WL_PROXD_TLV_ID_RATESPEC = 5, 17758 WL_PROXD_TLV_ID_BURST_DURATION = 6, /**< intvl - length of burst */ 17759 WL_PROXD_TLV_ID_BURST_PERIOD = 7, /**< intvl - between bursts */ 17760 WL_PROXD_TLV_ID_BURST_FTM_SEP = 8, /**< intvl - between FTMs */ 17761 WL_PROXD_TLV_ID_BURST_NUM_FTM = 9, /**< uint16 - per burst */ 17762 WL_PROXD_TLV_ID_NUM_BURST = 10, /**< uint16 */ 17763 WL_PROXD_TLV_ID_FTM_RETRIES = 11, /**< uint16 at FTM level */ 17764 WL_PROXD_TLV_ID_BSS_INDEX = 12, /**< uint8 */ 17765 WL_PROXD_TLV_ID_BSSID = 13, 17766 WL_PROXD_TLV_ID_INIT_DELAY = 14, /**< intvl - optional,non-standalone only */ 17767 WL_PROXD_TLV_ID_BURST_TIMEOUT = 15, /**< expect response within - intvl */ 17768 WL_PROXD_TLV_ID_EVENT_MASK = 16, /**< interested events - in/out */ 17769 WL_PROXD_TLV_ID_FLAGS_MASK = 17, /**< interested flags - in only */ 17770 WL_PROXD_TLV_ID_PEER_MAC = 18, /**< mac address of peer */ 17771 WL_PROXD_TLV_ID_FTM_REQ = 19, /**< dot11_ftm_req */ 17772 WL_PROXD_TLV_ID_LCI_REQ = 20, 17773 WL_PROXD_TLV_ID_LCI = 21, 17774 WL_PROXD_TLV_ID_CIVIC_REQ = 22, 17775 WL_PROXD_TLV_ID_CIVIC = 23, 17776 WL_PROXD_TLV_ID_AVAIL24 = 24, /**< ROM compatibility */ 17777 WL_PROXD_TLV_ID_SESSION_FLAGS = 25, 17778 WL_PROXD_TLV_ID_SESSION_FLAGS_MASK = 26, /**< in only */ 17779 WL_PROXD_TLV_ID_RX_MAX_BURST = 27, /**< uint16 - limit bursts per session */ 17780 WL_PROXD_TLV_ID_RANGING_INFO = 28, /**< ranging info */ 17781 WL_PROXD_TLV_ID_RANGING_FLAGS = 29, /**< uint16 */ 17782 WL_PROXD_TLV_ID_RANGING_FLAGS_MASK = 30, /**< uint16, in only */ 17783 WL_PROXD_TLV_ID_NAN_MAP_ID = 31, 17784 WL_PROXD_TLV_ID_DEV_ADDR = 32, 17785 WL_PROXD_TLV_ID_AVAIL = 33, /**< wl_proxd_avail_t */ 17786 WL_PROXD_TLV_ID_TLV_ID = 34, /* uint16 tlv-id */ 17787 WL_PROXD_TLV_ID_FTM_REQ_RETRIES = 35, /* uint16 FTM request retries */ 17788 WL_PROXD_TLV_ID_TPK = 36, /* 32byte TPK */ 17789 WL_PROXD_TLV_ID_RI_RR = 36, /* RI_RR */ 17790 WL_PROXD_TLV_ID_TUNE = 37, /* wl_proxd_pararms_tof_tune_t */ 17791 WL_PROXD_TLV_ID_CUR_ETHER_ADDR = 38, /* Source Address used for Tx */ 17792 17793 /* output - 512 + x */ 17794 WL_PROXD_TLV_ID_STATUS = 512, 17795 WL_PROXD_TLV_ID_COUNTERS = 513, 17796 WL_PROXD_TLV_ID_INFO = 514, 17797 WL_PROXD_TLV_ID_RTT_RESULT = 515, 17798 WL_PROXD_TLV_ID_AOA_RESULT = 516, 17799 WL_PROXD_TLV_ID_SESSION_INFO = 517, 17800 WL_PROXD_TLV_ID_SESSION_STATUS = 518, 17801 WL_PROXD_TLV_ID_SESSION_ID_LIST = 519, 17802 WL_PROXD_TLV_ID_RTT_RESULT_V2 = 520, 17803 17804 /* debug tlvs can be added starting 1024 */ 17805 WL_PROXD_TLV_ID_DEBUG_MASK = 1024, 17806 WL_PROXD_TLV_ID_COLLECT = 1025, /**< output only */ 17807 WL_PROXD_TLV_ID_STRBUF = 1026, 17808 17809 WL_PROXD_TLV_ID_COLLECT_HEADER = 1025, /* wl_proxd_collect_header_t */ 17810 WL_PROXD_TLV_ID_COLLECT_INFO = 1028, /* wl_proxd_collect_info_t */ 17811 WL_PROXD_TLV_ID_COLLECT_DATA = 1029, /* wl_proxd_collect_data_t */ 17812 WL_PROXD_TLV_ID_COLLECT_CHAN_DATA = 1030, /* wl_proxd_collect_data_t */ 17813 WL_PROXD_TLV_ID_MF_STATS_DATA = 1031, /* mf_stats_buffer */ 17814 17815 WL_PROXD_TLV_ID_COLLECT_INLINE_HEADER = 1032, 17816 WL_PROXD_TLV_ID_COLLECT_INLINE_FRAME_INFO = 1033, 17817 WL_PROXD_TLV_ID_COLLECT_INLINE_FRAME_DATA = 1034, 17818 WL_PROXD_TLV_ID_COLLECT_INLINE_RESULTS = 1035, 17819 17820 WL_PROXD_TLV_ID_MAX 17821 } wl_proxd_tlv_types_t; 17822 17823 #define TOF_COLLECT_INLINE_HEADER_INFO_VER_1 1 17824 17825 typedef struct wl_proxd_collect_inline_header_info_v1 17826 { 17827 uint16 version; 17828 uint16 pad1; 17829 uint32 ratespec; /* override */ 17830 chanspec_t chanspec; 17831 uint16 num_ftm; 17832 struct ether_addr peer_mac; 17833 struct ether_addr cur_ether_addr; /* source address for Tx */ 17834 } wl_proxd_collect_inline_header_info_v1_t; 17835 17836 #define TOF_COLLECT_INLINE_RESULTS_VER_1 1 17837 typedef struct wl_proxd_collect_inline_results_info_v1 17838 { 17839 uint16 version; 17840 uint16 pad1; 17841 uint32 meanrtt; 17842 uint32 distance; 17843 uint16 num_rtt; 17844 uint16 pad2; 17845 int32 status; 17846 uint32 ratespec; 17847 } wl_proxd_collect_inline_results_info_v1_t; 17848 17849 #define TOF_COLLECT_INLINE_FRAME_INFO_VER_1 1 17850 typedef struct wl_proxd_collect_inline_frame_info_v1 17851 { 17852 uint16 version; 17853 uint16 pad1; 17854 int32 gd; 17855 uint32 T[4]; 17856 uint32 prev_t1; 17857 uint32 prev_t4; 17858 int32 hadj; 17859 int8 rssi; 17860 uint8 pad[3]; 17861 } wl_proxd_collect_inline_frame_info_v1_t; 17862 17863 #define TOF_COLLECT_INLINE_FRAME_INFO_VER_2 2 17864 typedef struct wl_proxd_collect_inline_frame_info_v2 17865 { 17866 uint16 version; 17867 uint16 pad1; 17868 int32 gd; 17869 uint32 T[4]; 17870 int32 hadj; 17871 int8 rssi; 17872 uint8 pad[3]; 17873 } wl_proxd_collect_inline_frame_info_v2_t; 17874 17875 typedef struct wl_proxd_tlv { 17876 uint16 id; 17877 uint16 len; 17878 uint8 data[1]; 17879 } wl_proxd_tlv_t; 17880 17881 /** proxd iovar - applies to proxd, method or session */ 17882 typedef struct wl_proxd_iov { 17883 uint16 version; 17884 uint16 len; 17885 wl_proxd_cmd_t cmd; 17886 wl_proxd_method_t method; 17887 wl_proxd_session_id_t sid; 17888 wl_ftm_type_t ftm_type; /* 11az ftm type. Only valid with PROXD vers >= 0x0400 */ 17889 uint8 PAD[1]; 17890 wl_proxd_tlv_t tlvs[1]; /**< variable */ 17891 } wl_proxd_iov_t; 17892 17893 #define WL_PROXD_IOV_HDR_SIZE OFFSETOF(wl_proxd_iov_t, tlvs) 17894 17895 /* The following event definitions may move to bcmevent.h, but sharing proxd types 17896 * across needs more invasive changes unrelated to proxd 17897 */ 17898 enum { 17899 WL_PROXD_EVENT_NONE = 0, /**< not an event, reserved */ 17900 WL_PROXD_EVENT_SESSION_CREATE = 1, 17901 WL_PROXD_EVENT_SESSION_START = 2, 17902 WL_PROXD_EVENT_FTM_REQ = 3, 17903 WL_PROXD_EVENT_BURST_START = 4, 17904 WL_PROXD_EVENT_BURST_END = 5, 17905 WL_PROXD_EVENT_SESSION_END = 6, 17906 WL_PROXD_EVENT_SESSION_RESTART = 7, 17907 WL_PROXD_EVENT_BURST_RESCHED = 8, /**< burst rescheduled-e.g. partial TSF */ 17908 WL_PROXD_EVENT_SESSION_DESTROY = 9, 17909 WL_PROXD_EVENT_RANGE_REQ = 10, 17910 WL_PROXD_EVENT_FTM_FRAME = 11, 17911 WL_PROXD_EVENT_DELAY = 12, 17912 WL_PROXD_EVENT_VS_INITIATOR_RPT = 13, /**< (target) rx initiator-report */ 17913 WL_PROXD_EVENT_RANGING = 14, 17914 WL_PROXD_EVENT_LCI_MEAS_REP = 15, /* LCI measurement report */ 17915 WL_PROXD_EVENT_CIVIC_MEAS_REP = 16, /* civic measurement report */ 17916 WL_PROXD_EVENT_COLLECT = 17, 17917 WL_PROXD_EVENT_START_WAIT = 18, /* waiting to start */ 17918 WL_PROXD_EVENT_MF_STATS = 19, /* mf stats event */ 17919 17920 WL_PROXD_EVENT_MAX 17921 }; 17922 typedef int16 wl_proxd_event_type_t; 17923 17924 /** proxd event mask - upto 32 events for now */ 17925 typedef uint32 wl_proxd_event_mask_t; 17926 17927 #define WL_PROXD_EVENT_MASK_ALL 0xfffffffe 17928 #define WL_PROXD_EVENT_MASK_EVENT(_event_type) (1 << (_event_type)) 17929 #define WL_PROXD_EVENT_ENABLED(_mask, _event_type) (\ 17930 ((_mask) & WL_PROXD_EVENT_MASK_EVENT(_event_type)) != 0) 17931 17932 /** proxd event - applies to proxd, method or session */ 17933 typedef struct wl_proxd_event { 17934 uint16 version; 17935 uint16 len; 17936 wl_proxd_event_type_t type; 17937 wl_proxd_method_t method; 17938 wl_proxd_session_id_t sid; 17939 uint8 pad[2]; /* This field is used fragmentation purpose */ 17940 wl_proxd_tlv_t tlvs[1]; /**< variable */ 17941 } wl_proxd_event_t; 17942 17943 enum { 17944 WL_PROXD_RANGING_STATE_NONE = 0, 17945 WL_PROXD_RANGING_STATE_NOTSTARTED = 1, 17946 WL_PROXD_RANGING_STATE_INPROGRESS = 2, 17947 WL_PROXD_RANGING_STATE_DONE = 3 17948 }; 17949 typedef int16 wl_proxd_ranging_state_t; 17950 17951 /** proxd ranging flags */ 17952 enum { 17953 WL_PROXD_RANGING_FLAG_NONE = 0x0000, /**< no flags */ 17954 WL_PROXD_RANGING_FLAG_DEL_SESSIONS_ON_STOP = 0x0001, 17955 WL_PROXD_RANGING_FLAG_ALL = 0xffff 17956 }; 17957 typedef uint16 wl_proxd_ranging_flags_t; 17958 17959 struct wl_proxd_ranging_info { 17960 wl_proxd_status_t status; 17961 wl_proxd_ranging_state_t state; 17962 wl_proxd_ranging_flags_t flags; 17963 uint16 num_sids; 17964 uint16 num_done; 17965 }; 17966 typedef struct wl_proxd_ranging_info wl_proxd_ranging_info_t; 17967 17968 #include <packed_section_start.h> 17969 /* Legacy platform i.e. 43342/43430 */ 17970 #define WL_PROXD_COLLECT_EVENT_DATA_VERSION_1 1 17971 typedef BWL_PRE_PACKED_STRUCT struct wl_proxd_collect_event_data_v1 { 17972 uint32 H_LB[K_TOF_COLLECT_H_SIZE_20MHZ]; 17973 uint32 H_RX[K_TOF_COLLECT_H_SIZE_20MHZ]; 17974 uint8 ri_rr[FTM_TPK_LEN]; 17975 wl_proxd_phy_error_t phy_err_mask; 17976 } BWL_POST_PACKED_STRUCT wl_proxd_collect_event_data_v1_t; 17977 17978 /* Secured 2.0 supoorted devices i.e. 4364 */ 17979 #define WL_PROXD_COLLECT_EVENT_DATA_VERSION_2 2 17980 typedef BWL_PRE_PACKED_STRUCT struct wl_proxd_collect_event_data_v2 { 17981 uint32 H_LB[K_TOF_COLLECT_H_SIZE_20MHZ]; 17982 uint32 H_RX[K_TOF_COLLECT_H_SIZE_20MHZ]; 17983 uint8 ri_rr[FTM_TPK_RI_RR_LEN_SECURE_2_0]; 17984 wl_proxd_phy_error_t phy_err_mask; 17985 } BWL_POST_PACKED_STRUCT wl_proxd_collect_event_data_v2_t; 17986 #include <packed_section_end.h> 17987 17988 #define WL_PROXD_COLLECT_EVENT_DATA_VERSION_3 3 17989 typedef struct wl_proxd_collect_event_data_v3 { 17990 uint16 version; 17991 uint16 length; 17992 uint32 H_LB[K_TOF_COLLECT_H_SIZE_20MHZ]; 17993 uint32 H_RX[K_TOF_COLLECT_H_SIZE_20MHZ]; 17994 uint8 ri_rr[FTM_TPK_RI_RR_LEN_SECURE_2_0]; 17995 wl_proxd_phy_error_t phy_err_mask; 17996 } wl_proxd_collect_event_data_v3_t; 17997 17998 #define WL_PROXD_COLLECT_EVENT_DATA_VERSION_4 4 17999 typedef struct wl_proxd_collect_event_data_v4 { 18000 uint16 version; 18001 uint16 length; 18002 uint32 H_LB[K_TOF_COLLECT_H_SIZE_20MHZ]; 18003 uint32 H_RX[K_TOF_COLLECT_H_SIZE_20MHZ]; 18004 uint8 ri_rr[FTM_TPK_RI_RR_LEN_SECURE_2_0_5G]; 18005 wl_proxd_phy_error_t phy_err_mask; 18006 } wl_proxd_collect_event_data_v4_t; 18007 18008 #define WL_PROXD_COLLECT_EVENT_DATA_VERSION_MAX WL_PROXD_COLLECT_EVENT_DATA_VERSION_4 18009 18010 /** Data returned by the bssload_report iovar. This is also the WLC_E_BSS_LOAD event data */ 18011 #include <packed_section_start.h> 18012 typedef BWL_PRE_PACKED_STRUCT struct wl_bssload { 18013 uint16 sta_count; /**< station count */ 18014 uint16 aac; /**< available admission capacity */ 18015 uint8 chan_util; /**< channel utilization */ 18016 } BWL_POST_PACKED_STRUCT wl_bssload_t; 18017 #include <packed_section_end.h> 18018 18019 /** 18020 * Maximum number of configurable BSS Load levels. The number of BSS Load 18021 * ranges is always 1 more than the number of configured levels. eg. if 18022 * 3 levels of 10, 20, 30 are configured then this defines 4 load ranges: 18023 * 0-10, 11-20, 21-30, 31-255. A WLC_E_BSS_LOAD event is generated each time 18024 * the utilization level crosses into another range, subject to the rate limit. 18025 */ 18026 #define MAX_BSSLOAD_LEVELS 8 18027 #define MAX_BSSLOAD_RANGES (MAX_BSSLOAD_LEVELS + 1) 18028 18029 /** BSS Load event notification configuration. */ 18030 typedef struct wl_bssload_cfg { 18031 uint32 rate_limit_msec; /**< # of events posted to application will be limited to 18032 * one per specified period (0 to disable rate limit). 18033 */ 18034 uint8 num_util_levels; /**< Number of entries in util_levels[] below */ 18035 uint8 util_levels[MAX_BSSLOAD_LEVELS]; 18036 /**< Variable number of BSS Load utilization levels in 18037 * low to high order. An event will be posted each time 18038 * a received beacon's BSS Load IE channel utilization 18039 * value crosses a level. 18040 */ 18041 uint8 PAD[3]; 18042 } wl_bssload_cfg_t; 18043 18044 /** User roam cache support */ 18045 #define WL_USER_ROAM_CACHE_VER_1 1u 18046 #define WL_USER_ROAM_CACHE_VER WL_USER_ROAM_CACHE_VER_1 18047 18048 #define WL_USER_ROAM_CACHE_GET 0u /**< Read back the chanspec[s] */ 18049 #define WL_USER_ROAM_CACHE_ADD 1u /**< Add chanspec[s] */ 18050 #define WL_USER_ROAM_CACHE_DEL 2u /**< Delete chanspec[s] */ 18051 #define WL_USER_ROAM_CACHE_CLR 3u /**< Delete all chanspec[s] */ 18052 #define WL_USER_ROAM_CACHE_OVERRIDE 4u /**< Set to use roam cached chanspec only */ 18053 18054 typedef struct wl_user_roamcache { 18055 uint16 version; 18056 uint16 length; /**< Total length including version and length */ 18057 uint32 subcmd; /**< Sub-command for chanspec add/rel etc.. */ 18058 union { 18059 uint32 val; /**< Command value when applicable */ 18060 struct { 18061 uint16 num_ch; /**< Number of chanspecs in the following array */ 18062 chanspec_t chanspecs[]; 18063 } chlist; 18064 } u; 18065 } wl_user_roamcache_t; 18066 18067 /** Multiple roaming profile suport */ 18068 #define WL_MAX_ROAM_PROF_BRACKETS 4 18069 18070 #define WL_ROAM_PROF_VER_0 0 18071 #define WL_ROAM_PROF_VER_1 1 18072 #define WL_ROAM_PROF_VER_2 2 18073 #define WL_ROAM_PROF_VER_3 3 18074 18075 #define WL_MAX_ROAM_PROF_VER WL_ROAM_PROF_VER_1 18076 18077 #define WL_ROAM_PROF_NONE (0 << 0) 18078 #define WL_ROAM_PROF_LAZY (1 << 0) 18079 #define WL_ROAM_PROF_NO_CI (1 << 1) 18080 #define WL_ROAM_PROF_SUSPEND (1 << 2) 18081 #define WL_ROAM_PROF_EXTSCAN (1 << 3) 18082 #define WL_ROAM_PROF_SYNC_DTIM (1 << 6) 18083 #define WL_ROAM_PROF_DEFAULT (1 << 7) /**< backward compatible single default profile */ 18084 18085 #define WL_FACTOR_TABLE_MAX_LIMIT 5 18086 18087 #define WL_CU_2G_ROAM_TRIGGER (-60) 18088 #define WL_CU_5G_ROAM_TRIGGER (-70) 18089 18090 #define WL_CU_SCORE_DELTA_DEFAULT 20 18091 18092 #define WL_MAX_CHANNEL_USAGE 0x0FF 18093 #define WL_CU_PERCENTAGE_DISABLE 0 18094 #define WL_CU_PERCENTAGE_DEFAULT 70 18095 #define WL_CU_PERCENTAGE_MAX 100 18096 #define WL_CU_CALC_DURATION_DEFAULT 10 /* seconds */ 18097 #define WL_CU_CALC_DURATION_MAX 60 /* seconds */ 18098 18099 #define WL_ESTM_LOW_TRIGGER_DISABLE 0 18100 #define WL_ESTM_LOW_TRIGGER_DEFAULT 5 /* Mbps */ 18101 #define WL_ESTM_LOW_TRIGGER_MAX 250 /* Mbps */ 18102 #define WL_ESTM_ROAM_DELTA_DEFAULT 10 18103 18104 typedef struct wl_roam_prof_v4 { 18105 uint8 roam_flags; /**< bit flags */ 18106 int8 roam_trigger; /**< RSSI trigger level per profile/RSSI bracket */ 18107 int8 rssi_lower; 18108 int8 roam_delta; 18109 18110 /* if channel_usage if zero, roam_delta is rssi delta required for new AP */ 18111 /* if channel_usage if non-zero, roam_delta is score delta(%) required for new AP */ 18112 int8 rssi_boost_thresh; /**< Min RSSI to qualify for RSSI boost */ 18113 int8 rssi_boost_delta; /**< RSSI boost for AP in the other band */ 18114 uint16 nfscan; /**< number of full scan to start with */ 18115 uint16 fullscan_period; 18116 uint16 init_scan_period; 18117 uint16 backoff_multiplier; 18118 uint16 max_scan_period; 18119 uint8 channel_usage; 18120 uint8 cu_avg_calc_dur; 18121 uint16 estm_low_trigger; /**< ESTM low throughput roam trigger */ 18122 int8 estm_roam_delta; /**< ESTM low throughput roam delta */ 18123 int8 pad[3]; 18124 uint16 lp_roamscan_period; 18125 uint16 max_fullscan_period; 18126 } wl_roam_prof_v4_t; 18127 18128 typedef struct wl_roam_prof_v3 { 18129 uint8 roam_flags; /**< bit flags */ 18130 int8 roam_trigger; /**< RSSI trigger level per profile/RSSI bracket */ 18131 int8 rssi_lower; 18132 int8 roam_delta; 18133 18134 /* if channel_usage if zero, roam_delta is rssi delta required for new AP */ 18135 /* if channel_usage if non-zero, roam_delta is score delta(%) required for new AP */ 18136 int8 rssi_boost_thresh; /**< Min RSSI to qualify for RSSI boost */ 18137 int8 rssi_boost_delta; /**< RSSI boost for AP in the other band */ 18138 uint16 nfscan; /**< number of full scan to start with */ 18139 uint16 fullscan_period; 18140 uint16 init_scan_period; 18141 uint16 backoff_multiplier; 18142 uint16 max_scan_period; 18143 uint8 channel_usage; 18144 uint8 cu_avg_calc_dur; 18145 uint16 estm_low_trigger; /**< ESTM low throughput roam trigger */ 18146 int8 estm_roam_delta; /**< ESTM low throughput roam delta */ 18147 uint8 pad; 18148 } wl_roam_prof_v3_t; 18149 18150 typedef struct wl_roam_prof_v2 { 18151 int8 roam_flags; /**< bit flags */ 18152 int8 roam_trigger; /**< RSSI trigger level per profile/RSSI bracket */ 18153 int8 rssi_lower; 18154 int8 roam_delta; 18155 18156 /* if channel_usage if zero, roam_delta is rssi delta required for new AP */ 18157 /* if channel_usage if non-zero, roam_delta is score delta(%) required for new AP */ 18158 int8 rssi_boost_thresh; /**< Min RSSI to qualify for RSSI boost */ 18159 int8 rssi_boost_delta; /**< RSSI boost for AP in the other band */ 18160 uint16 nfscan; /**< number of full scan to start with */ 18161 uint16 fullscan_period; 18162 uint16 init_scan_period; 18163 uint16 backoff_multiplier; 18164 uint16 max_scan_period; 18165 uint8 channel_usage; 18166 uint8 cu_avg_calc_dur; 18167 uint8 pad[2]; 18168 } wl_roam_prof_v2_t; 18169 18170 typedef struct wl_roam_prof_v1 { 18171 int8 roam_flags; /**< bit flags */ 18172 int8 roam_trigger; /**< RSSI trigger level per profile/RSSI bracket */ 18173 int8 rssi_lower; 18174 int8 roam_delta; 18175 18176 /* if channel_usage if zero, roam_delta is rssi delta required for new AP */ 18177 /* if channel_usage if non-zero, roam_delta is score delta(%) required for new AP */ 18178 int8 rssi_boost_thresh; /**< Min RSSI to qualify for RSSI boost */ 18179 int8 rssi_boost_delta; /**< RSSI boost for AP in the other band */ 18180 uint16 nfscan; /**< number of full scan to start with */ 18181 uint16 fullscan_period; 18182 uint16 init_scan_period; 18183 uint16 backoff_multiplier; 18184 uint16 max_scan_period; 18185 } wl_roam_prof_v1_t; 18186 18187 typedef struct wl_roam_prof_band_v4 { 18188 uint32 band; /**< Must be just one band */ 18189 uint16 ver; /**< version of this struct */ 18190 uint16 len; /**< length in bytes of this structure */ 18191 wl_roam_prof_v4_t roam_prof[WL_MAX_ROAM_PROF_BRACKETS]; 18192 } wl_roam_prof_band_v4_t; 18193 18194 typedef struct wl_roam_prof_band_v3 { 18195 uint32 band; /**< Must be just one band */ 18196 uint16 ver; /**< version of this struct */ 18197 uint16 len; /**< length in bytes of this structure */ 18198 wl_roam_prof_v3_t roam_prof[WL_MAX_ROAM_PROF_BRACKETS]; 18199 } wl_roam_prof_band_v3_t; 18200 18201 typedef struct wl_roam_prof_band_v2 { 18202 uint32 band; /**< Must be just one band */ 18203 uint16 ver; /**< version of this struct */ 18204 uint16 len; /**< length in bytes of this structure */ 18205 wl_roam_prof_v2_t roam_prof[WL_MAX_ROAM_PROF_BRACKETS]; 18206 } wl_roam_prof_band_v2_t; 18207 18208 typedef struct wl_roam_prof_band_v1 { 18209 uint32 band; /**< Must be just one band */ 18210 uint16 ver; /**< version of this struct */ 18211 uint16 len; /**< length in bytes of this structure */ 18212 wl_roam_prof_v1_t roam_prof[WL_MAX_ROAM_PROF_BRACKETS]; 18213 } wl_roam_prof_band_v1_t; 18214 18215 #define BSS_MAXTABLE_SIZE 10 18216 #define WNM_BSS_SELECT_FACTOR_VERSION 1 18217 typedef struct wnm_bss_select_factor_params { 18218 uint8 low; 18219 uint8 high; 18220 uint8 factor; 18221 uint8 pad; 18222 } wnm_bss_select_factor_params_t; 18223 18224 #define WNM_BSS_SELECT_FIXED_SIZE OFFSETOF(wnm_bss_select_factor_cfg_t, params) 18225 typedef struct wnm_bss_select_factor_cfg { 18226 uint8 version; 18227 uint8 band; 18228 uint16 type; 18229 uint16 pad; 18230 uint16 count; 18231 wnm_bss_select_factor_params_t params[1]; 18232 } wnm_bss_select_factor_cfg_t; 18233 18234 #define WNM_BSS_SELECT_WEIGHT_VERSION 1 18235 typedef struct wnm_bss_select_weight_cfg { 18236 uint8 version; 18237 uint8 band; 18238 uint16 type; 18239 uint16 weight; /* weightage for each type between 0 to 100 */ 18240 } wnm_bss_select_weight_cfg_t; 18241 18242 /* For branches before koala .. wbtext is part 18243 * of wnm need to use below type only 18244 */ 18245 typedef struct wnm_btm_default_score_cfg { 18246 uint32 default_score; /* default score */ 18247 uint8 band; 18248 } wnm_btm_default_score_cfg_t; 18249 18250 /* For branches from koala and above .. wbtext is 18251 * seperate module..need to use below type only 18252 */ 18253 typedef struct wbtext_btm_default_score_cfg { 18254 uint32 default_score; /* default score */ 18255 uint8 band; 18256 } wbtext_btm_default_score_cfg_t; 18257 18258 #define WNM_BSS_SELECT_TYPE_RSSI 0 18259 #define WNM_BSS_SELECT_TYPE_CU 1 18260 #define WNM_BSS_SELECT_TYPE_ESTM_DL 2 18261 18262 #define WNM_BSSLOAD_MONITOR_VERSION 1 18263 typedef struct wnm_bssload_monitor_cfg { 18264 uint8 version; 18265 uint8 band; 18266 uint8 duration; /* duration between 1 to 20sec */ 18267 } wnm_bssload_monitor_cfg_t; 18268 18269 #define WNM_ROAM_TRIGGER_VERSION 1 18270 typedef struct wnm_roam_trigger_cfg { 18271 uint8 version; 18272 uint8 band; 18273 uint16 type; 18274 int16 trigger; /* trigger for each type in new roam algorithm */ 18275 } wnm_roam_trigger_cfg_t; 18276 18277 /* Data structures for Interface Create/Remove */ 18278 18279 #define WL_INTERFACE_CREATE_VER_0 0 18280 #define WL_INTERFACE_CREATE_VER_1 1 18281 #define WL_INTERFACE_CREATE_VER_2 2 18282 #define WL_INTERFACE_CREATE_VER_3 3 18283 18284 /* 18285 * The flags filed of the wl_interface_create is designed to be 18286 * a Bit Mask. As of now only Bit 0 and Bit 1 are used as mentioned below. 18287 * The rest of the bits can be used, incase we have to provide 18288 * more information to the dongle 18289 */ 18290 18291 /* 18292 * Bit 0 of flags field is used to inform whether the interface requested to 18293 * be created is STA or AP. 18294 * 0 - Create a STA interface 18295 * 1 - Create an AP interface 18296 * NOTE: This Bit 0 is applicable for the WL_INTERFACE_CREATE_VER < 2 18297 */ 18298 #define WL_INTERFACE_CREATE_STA (0 << 0) 18299 #define WL_INTERFACE_CREATE_AP (1 << 0) 18300 18301 /* 18302 * From revision >= 2 Bit 0 of flags field will not used be for STA or AP interface creation. 18303 * "iftype" field shall be used for identifying the interface type. 18304 */ 18305 typedef enum wl_interface_type { 18306 WL_INTERFACE_TYPE_STA = 0, 18307 WL_INTERFACE_TYPE_AP = 1, 18308 18309 #ifdef WLAWDL 18310 WL_INTERFACE_TYPE_AWDL = 2, 18311 #endif /* WLAWDL */ 18312 18313 WL_INTERFACE_TYPE_NAN = 3, 18314 WL_INTERFACE_TYPE_P2P_GO = 4, 18315 WL_INTERFACE_TYPE_P2P_GC = 5, 18316 WL_INTERFACE_TYPE_P2P_DISC = 6, 18317 WL_INTERFACE_TYPE_IBSS = 7, 18318 WL_INTERFACE_TYPE_MESH = 8, 18319 WL_INTERFACE_TYPE_MAX 18320 } wl_interface_type_t; 18321 18322 /* 18323 * Bit 1 of flags field is used to inform whether MAC is present in the 18324 * data structure or not. 18325 * 0 - Ignore mac_addr field 18326 * 1 - Use the mac_addr field 18327 */ 18328 #define WL_INTERFACE_MAC_DONT_USE (0 << 1) 18329 #define WL_INTERFACE_MAC_USE (1 << 1) 18330 18331 /* 18332 * Bit 2 of flags field is used to inform whether core or wlc index 18333 * is present in the data structure or not. 18334 * 0 - Ignore wlc_index field 18335 * 1 - Use the wlc_index field 18336 */ 18337 #define WL_INTERFACE_WLC_INDEX_DONT_USE (0 << 2) 18338 #define WL_INTERFACE_WLC_INDEX_USE (1 << 2) 18339 18340 /* 18341 * Bit 3 of flags field is used to create interface on the host requested interface index 18342 * 0 - Ignore if_index field 18343 * 1 - Use the if_index field 18344 */ 18345 #define WL_INTERFACE_IF_INDEX_USE (1 << 3) 18346 18347 /* 18348 * Bit 4 of flags field is used to assign BSSID 18349 * 0 - Ignore bssid field 18350 * 1 - Use the bssid field 18351 */ 18352 #define WL_INTERFACE_BSSID_INDEX_USE (1 << 4) 18353 18354 typedef struct wl_interface_create_v0 { 18355 uint16 ver; /**< version of this struct */ 18356 uint32 flags; /**< flags that defines the operation */ 18357 struct ether_addr mac_addr; /**< Optional Mac address */ 18358 } wl_interface_create_v0_t; 18359 18360 typedef struct wl_interface_create { 18361 uint16 ver; /**< version of this struct */ 18362 uint8 pad1[2]; /**< Padding bytes */ 18363 uint32 flags; /**< flags that defines the operation */ 18364 struct ether_addr mac_addr; /**< Optional Mac address */ 18365 uint8 pad2[2]; /**< Padding bytes */ 18366 uint32 wlc_index; /**< Optional wlc index */ 18367 } wl_interface_create_v1_t; 18368 18369 typedef struct wl_interface_create_v2 { 18370 uint16 ver; /**< version of this struct */ 18371 uint8 pad1[2]; /**< Padding bytes */ 18372 uint32 flags; /**< flags that defines the operation */ 18373 struct ether_addr mac_addr; /**< Optional Mac address */ 18374 uint8 iftype; /**< Type of interface created */ 18375 uint8 pad2; /**< Padding bytes */ 18376 uint32 wlc_index; /**< Optional wlc index */ 18377 } wl_interface_create_v2_t; 18378 18379 typedef struct wl_interface_create_v3 { 18380 uint16 ver; /**< version of this struct */ 18381 uint16 len; /**< length of whole structure including variable length */ 18382 uint16 fixed_len; /**< Fixed length of this structure excluding data[] */ 18383 uint8 iftype; /**< Type of interface created */ 18384 uint8 wlc_index; /**< Optional wlc index */ 18385 uint32 flags; /**< flags that defines the operation */ 18386 struct ether_addr mac_addr; /**< Optional Mac address */ 18387 struct ether_addr bssid; /**< Optional BSSID */ 18388 uint8 if_index; /**< interface index requested by Host */ 18389 uint8 pad[3]; /**< Padding bytes to ensure data[] is at 32 bit aligned */ 18390 uint8 data[]; /**< Optional application/Module specific data */ 18391 } wl_interface_create_v3_t; 18392 18393 #define WL_INTERFACE_INFO_VER_0 0 18394 #define WL_INTERFACE_INFO_VER_1 1 18395 #define WL_INTERFACE_INFO_VER_2 2 18396 18397 typedef struct wl_interface_info_v0 { 18398 uint16 ver; /**< version of this struct */ 18399 struct ether_addr mac_addr; /**< MAC address of the interface */ 18400 char ifname[BCM_MSG_IFNAME_MAX]; /**< name of interface */ 18401 uint8 bsscfgidx; /**< source bsscfg index */ 18402 } wl_interface_info_v0_t; 18403 18404 typedef struct wl_interface_info_v1 { 18405 uint16 ver; /**< version of this struct */ 18406 struct ether_addr mac_addr; /**< MAC address of the interface */ 18407 char ifname[BCM_MSG_IFNAME_MAX]; /**< name of interface */ 18408 uint8 bsscfgidx; /**< source bsscfg index */ 18409 uint8 PAD; 18410 } wl_interface_info_v1_t; 18411 18412 typedef struct wl_interface_info_v2 { 18413 uint16 ver; /**< version of this struct */ 18414 uint16 length; /**< length of the whole structure */ 18415 struct ether_addr mac_addr; /**< MAC address of the interface */ 18416 uint8 bsscfgidx; /**< source bsscfg index */ 18417 uint8 if_index; /**< Interface index allocated by FW */ 18418 char ifname[BCM_MSG_IFNAME_MAX]; /**< name of interface */ 18419 } wl_interface_info_v2_t; 18420 18421 #define PHY_RXIQEST_AVERAGING_DELAY 10 18422 18423 typedef struct wl_iqest_params { 18424 uint32 rxiq; 18425 uint8 niter; 18426 uint8 delay; 18427 uint8 PAD[2]; 18428 } wl_iqest_params_t; 18429 18430 typedef struct wl_iqest_sweep_params { 18431 wl_iqest_params_t params; 18432 uint8 nchannels; 18433 uint8 channel[3]; /** variable */ 18434 } wl_iqest_sweep_params_t; 18435 18436 typedef struct wl_iqest_value { 18437 uint8 channel; 18438 uint8 PAD[3]; 18439 uint32 rxiq; 18440 } wl_iqest_value_t; 18441 18442 typedef struct wl_iqest_result { 18443 uint8 nvalues; 18444 uint8 PAD[3]; 18445 wl_iqest_value_t value[1]; 18446 } wl_iqest_result_t; 18447 18448 #define WL_PRIO_ROAM_PROF_V1 (1u) 18449 18450 typedef struct wl_prio_roam_prof_v1 { 18451 uint16 version; /* Version info */ 18452 uint16 length; /* byte length of this structure */ 18453 uint8 prio_roam_mode; /* Roam mode RCC/RCC+Full Scan */ 18454 uint8 PAD[3]; 18455 } wl_prio_roam_prof_v1_t; 18456 18457 typedef enum wl_prio_roam_mode { 18458 PRIO_ROAM_MODE_OFF = 0, /* Prio_Roam feature disable */ 18459 PRIO_ROAM_MODE_RCC_ONLY = 1, /* Scan RCC list only */ 18460 PRIO_ROAM_MODE_RCC_FULLSCAN = 2, /* Scan RCC list + Full scan */ 18461 PRIO_ROAM_MODE_FULLSCAN_ONLY = 3 /* Full Scan only */ 18462 } wl_prio_roam_mode_t; 18463 18464 /* BTCX AIBSS (Oxygen) Status */ 18465 typedef struct wlc_btc_aibss_info { 18466 uint32 prev_tsf_l; // Lower 32 bits of last read of TSF 18467 uint32 prev_tsf_h; // Higher 32 bits of last read of TSF 18468 uint32 last_btinfo; // Last read of BT info 18469 uint32 local_btinfo; // Local BT INFO BitMap 18470 uint8 bt_out_of_sync_cnt; // BT not in sync with strobe 18471 uint8 esco_off_cnt; // Count incremented when ESCO is off 18472 uint8 strobe_enabled; // Set only in AIBSS mode 18473 uint8 strobe_on; // strobe to BT is on for Oxygen 18474 uint8 local_bt_in_sync; // Sync status of local BT when strobe is on 18475 uint8 other_bt_in_sync; // Sync state of BT in other devices in AIBSS 18476 uint8 local_bt_is_master; // Local BT is master 18477 uint8 sco_prot_on; // eSCO Protection on in local device 18478 uint8 other_esco_present; // eSCO status in other devices in AIBSS 18479 uint8 rx_agg_change; // Indicates Rx Agg size needs to change 18480 uint8 rx_agg_modified; // Rx Agg size modified 18481 uint8 acl_grant_set; // ACL grants on for speeding up sync 18482 uint8 write_ie_err_cnt; // BTCX Ie write error cnt 18483 uint8 parse_ie_err_cnt; // BTCX IE parse error cnt 18484 uint8 wci2_fail_cnt; // WCI2 init failure cnt 18485 uint8 strobe_enable_err_cnt; // Strobe enable err cnt 18486 uint8 strobe_init_err_cnt; // Strobe init err cnt 18487 uint8 tsf_jump_cnt; // TSF jump cnt 18488 uint8 acl_grant_cnt; // ALC grant cnt 18489 uint8 pad1; 18490 uint16 ibss_tsf_shm; // SHM address of strobe TSF 18491 uint16 pad2; 18492 } wlc_btc_aibss_info_t; 18493 18494 #define WLC_BTC_AIBSS_STATUS_VER 1 18495 #define WLC_BTC_AIBSS_STATUS_LEN (sizeof(wlc_btc_aibss_status_t) - 2 * (sizeof(uint16))) 18496 18497 typedef struct wlc_btc_aibss_status { 18498 uint16 version; // Version # 18499 uint16 len; // Length of the structure(excluding len & version) 18500 int32 mode; // Current value of btc_mode 18501 uint16 bth_period; // bt coex period. read from shm. 18502 uint16 agg_off_bm; // AGG OFF BM read from SHM 18503 uint8 bth_active; // bt active session 18504 uint8 pad[3]; 18505 wlc_btc_aibss_info_t aibss_info; // Structure definition above 18506 } wlc_btc_aibss_status_t; 18507 18508 typedef enum { 18509 STATE_NONE = 0, 18510 18511 /* WLAN -> BT */ 18512 W2B_DATA_SET = 21, 18513 B2W_ACK_SET = 22, 18514 W2B_DATA_CLEAR = 23, 18515 B2W_ACK_CLEAR = 24, 18516 18517 /* BT -> WLAN */ 18518 B2W_DATA_SET = 31, 18519 W2B_ACK_SET = 32, 18520 B2W_DATA_CLEAR = 33, 18521 W2B_ACK_CLEAR = 34 18522 } bwte_gci_intstate_t; 18523 18524 #define WL_BWTE_STATS_VERSION 1 /* version of bwte_stats_t */ 18525 typedef struct { 18526 uint32 version; 18527 18528 bwte_gci_intstate_t inttobt; 18529 bwte_gci_intstate_t intfrombt; 18530 18531 uint32 bt2wl_intrcnt; /* bt->wlan interrrupt count */ 18532 uint32 wl2bt_intrcnt; /* wlan->bt interrupt count */ 18533 18534 uint32 wl2bt_dset_cnt; 18535 uint32 wl2bt_dclear_cnt; 18536 uint32 wl2bt_aset_cnt; 18537 uint32 wl2bt_aclear_cnt; 18538 18539 uint32 bt2wl_dset_cnt; 18540 uint32 bt2wl_dclear_cnt; 18541 uint32 bt2wl_aset_cnt; 18542 uint32 bt2wl_aclear_cnt; 18543 18544 uint32 state_error_1; 18545 uint32 state_error_2; 18546 uint32 state_error_3; 18547 uint32 state_error_4; 18548 } bwte_stats_t; 18549 18550 #define TBOW_MAX_SSID_LEN 32 18551 #define TBOW_MAX_PASSPHRASE_LEN 63 18552 18553 #define WL_TBOW_SETUPINFO_T_VERSION 1 /* version of tbow_setup_netinfo_t */ 18554 typedef struct tbow_setup_netinfo { 18555 uint32 version; 18556 uint8 opmode; 18557 uint8 pad; 18558 uint8 macaddr[ETHER_ADDR_LEN]; 18559 uint32 ssid_len; 18560 uint8 ssid[TBOW_MAX_SSID_LEN]; 18561 uint8 passphrase_len; 18562 uint8 passphrase[TBOW_MAX_PASSPHRASE_LEN]; 18563 chanspec_t chanspec; 18564 uint8 PAD[2]; 18565 uint32 channel; 18566 } tbow_setup_netinfo_t; 18567 18568 typedef enum tbow_ho_opmode { 18569 TBOW_HO_MODE_START_GO = 0, 18570 TBOW_HO_MODE_START_STA, 18571 TBOW_HO_MODE_START_GC, 18572 TBOW_HO_MODE_TEST_GO, 18573 TBOW_HO_MODE_STOP_GO = 0x10, 18574 TBOW_HO_MODE_STOP_STA, 18575 TBOW_HO_MODE_STOP_GC, 18576 TBOW_HO_MODE_TEARDOWN 18577 } tbow_ho_opmode_t; 18578 18579 /* Beacon trim feature statistics */ 18580 /* configuration */ 18581 #define BCNTRIMST_PER 0 /* Number of beacons to trim (0: disable) */ 18582 #define BCNTRIMST_TIMEND 1 /* Number of bytes till TIM IE */ 18583 #define BCNTRIMST_TSFLMT 2 /* TSF tolerance value (usecs) */ 18584 /* internal use */ 18585 #define BCNTRIMST_CUR 3 /* PSM's local beacon trim counter */ 18586 #define BCNTRIMST_PREVLEN 4 /* Beacon length excluding the TIM IE */ 18587 #define BCNTRIMST_TIMLEN 5 /* TIM IE Length */ 18588 #define BCNTRIMST_RSSI 6 /* Partial beacon RSSI */ 18589 #define BCNTRIMST_CHAN 7 /* Partial beacon channel */ 18590 /* debug stat (off by default) */ 18591 #define BCNTRIMST_DUR 8 /* RX duration until beacon trimmed */ 18592 #define BCNTRIMST_RXMBSS 9 /* MYBSSID beacon received */ 18593 #define BCNTRIMST_CANTRIM 10 /* # beacons which were trimmed */ 18594 #define BCNTRIMST_LENCHG 11 /* # beacons not trimmed due to length change */ 18595 #define BCNTRIMST_TSFDRF 12 /* # beacons not trimmed due to large TSF delta */ 18596 #define BCNTRIMST_NOTIM 13 /* # beacons not trimmed due to TIM missing */ 18597 18598 #define BCNTRIMST_NUM 14 18599 18600 #define WL_BCNTRIM_STATUS_VERSION_1 1 18601 #define WL_BCNTRIM_STATUS_VERSION_2 2 /* current version of 18602 * struct wl_bcntrim_status_v2_t and 18603 * struct wl_bcntrim_status_query_v2_t 18604 * changes in v2: curr_slice_id also include 18605 * beacon offload state 18606 */ 18607 18608 typedef struct wl_bcntrim_status_query_v1 { 18609 uint16 version; 18610 uint16 len; /* Total length includes fixed fields */ 18611 uint8 reset; /* reset after reading the stats */ 18612 uint8 pad[3]; /* 4-byte alignment */ 18613 } wl_bcntrim_status_query_v1_t; 18614 18615 /* bits for curr_slice_id */ 18616 #define WL_BCNTRIM_CURR_SLICE_ID_MASK 0x0Fu /* bits 0-3 for curr_slice_id */ 18617 #define WL_BCNTRIM_SC_OFFLOAD_ACTIVE_MASK 0x80u /* mask for sc beacon offload */ 18618 #define WL_BCNTRIM_SC_OFFLOAD_ACTIVE_FLAG (1u << 7u) /* MSB of curr_slice_id is used 18619 * to indicate if the offload is 18620 * currently active or not 18621 */ 18622 typedef struct wl_bcntrim_status_v1 { 18623 uint16 version; 18624 uint16 len; /* Total length includes fixed fields and variable data[] */ 18625 uint8 curr_slice_id; /* slice index of the interface */ 18626 uint8 applied_cfg; /* applied bcntrim N threshold */ 18627 uint8 pad[2]; /* 4-byte alignment */ 18628 uint32 fw_status; /* Bits representing bcntrim disable reason in FW */ 18629 uint32 total_disable_dur; /* total duration (msec) bcntrim remains 18630 disabled due to FW disable reasons 18631 */ 18632 uint32 data[]; /* variable length data containing stats */ 18633 } wl_bcntrim_status_v1_t; 18634 18635 /* v1 and v2 struct format for query and status are identical */ 18636 typedef wl_bcntrim_status_v1_t wl_bcntrim_status_v2_t; 18637 typedef wl_bcntrim_status_query_v1_t wl_bcntrim_status_query_v2_t; 18638 18639 #define BCNTRIM_STATS_MAX 10 /* Total stats part of the status data[] */ 18640 18641 /* Bits for FW status */ 18642 #define WL_BCNTRIM_DISABLE_HOST 0x1 /* Host disabled bcntrim through bcntrim IOVar */ 18643 #define WL_BCNTRIM_DISABLE_PHY_RATE 0x2 /* bcntrim disabled because beacon rx rate is 18644 * higher than phy_rate_thresh 18645 */ 18646 #define WL_BCNTRIM_DISABLE_QUIET_IE 0x4 /* bcntrim disable when Quiet IE present */ 18647 #define WL_BCNTRIM_DISABLE_QBSSLOAD_IE 0x8 /* bcntrim disable when QBSS Load IE present */ 18648 #define WL_BCNTRIM_DISABLE_OPERMODE_IE 0x10 /* bcntrim disable when opermode IE is present */ 18649 #define WL_BCNTRIM_DISABLE_CSA_IE 0x20 /* bcntrim dsiable when CSA IE is present */ 18650 #define WL_BCNTRIM_DISABLE_SC_OFFLOAD 0x40 /* bcntrim disable on SC */ 18651 18652 #define BCNTRIM_DISABLE_THRESHOLD_TIME 1000 * 10 /* enable bcntrim after a threshold (10sec) 18653 * when disabled due to above mentioned IE's 18654 */ 18655 #define WL_BCNTRIM_CFG_VERSION_1 1 18656 /* Common IOVAR struct */ 18657 typedef struct wl_bcntrim_cfg_v1 { 18658 uint16 version; 18659 uint16 len; /* Total length includes fixed fields and variable data[] */ 18660 uint16 subcmd_id; /* subcommand id */ 18661 uint16 pad; /* pad/reserved */ 18662 uint8 data[]; /* subcommand data; could be empty */ 18663 } wl_bcntrim_cfg_v1_t; 18664 18665 /* subcommands ids */ 18666 enum { 18667 WL_BCNTRIM_CFG_SUBCMD_PHY_RATE_THRESH = 0, /* PHY rate threshold above 18668 * which bcntrim is not applied 18669 */ 18670 WL_BCNTRIM_CFG_SUBCMD_OVERRIDE_DISABLE_MASK = 1, /* Override bcntrim disable reasons */ 18671 WL_BCNTRIM_CFG_SUBCMD_TSF_DRIFT_LIMIT = 2, /* TSF drift limit to consider bcntrim */ 18672 WL_BCNTRIM_CFG_SUBCMD_SC_BCNTRIM = 3 /* config bcntrim on SC */ 18673 }; 18674 18675 #define BCNTRIM_MAX_PHY_RATE 48 /* in 500Kbps */ 18676 #define BCNTRIM_MAX_TSF_DRIFT 65535 /* in usec */ 18677 #define WL_BCNTRIM_OVERRIDE_DISABLE_MASK \ 18678 (WL_BCNTRIM_DISABLE_QUIET_IE | WL_BCNTRIM_DISABLE_QBSSLOAD_IE) 18679 18680 /* WL_BCNTRIM_CFG_SUBCMD_PHY_RATE_TRESH */ 18681 typedef struct wl_bcntrim_cfg_phy_rate_thresh { 18682 uint32 rate; /* beacon rate (in 500kbps units) */ 18683 } wl_bcntrim_cfg_phy_rate_thresh_t; 18684 18685 /* WL_BCNTRIM_CFG_SUBCMD_OVERRIDE_DISABLE_MASK */ 18686 typedef struct wl_bcntrim_cfg_override_disable_mask { 18687 uint32 mask; /* bits representing individual disable reason to override */ 18688 } wl_bcntrim_cfg_override_disable_mask_t; 18689 18690 /* WL_BCNTRIM_CFG_SUBCMD_TSF_DRIFT_LIMIT */ 18691 typedef struct wl_bcntrim_cfg_tsf_drift_limit { 18692 uint16 drift; /* tsf drift limit specified in usec */ 18693 uint8 pad[2]; /* 4-byte alignment */ 18694 } wl_bcntrim_cfg_tsf_drift_limit_t; 18695 18696 /* WL_BCNTRIM_CFG_SUBCMD_SC_BCNTRIM */ 18697 typedef struct wl_bcntrim_cfg_sc_bcntrim { 18698 uint32 sc_config; /* 0 disable or 1 enable sc bcntrim */ 18699 } wl_bcntrim_cfg_sc_bcntrim_t; 18700 18701 /* -------------- TX Power Cap --------------- */ 18702 #define TXPWRCAP_MAX_NUM_CORES 8 18703 #define TXPWRCAP_MAX_NUM_ANTENNAS (TXPWRCAP_MAX_NUM_CORES * 2) 18704 18705 #define TXPWRCAP_MAX_NUM_CORES_V3 4 18706 #define TXPWRCAP_MAX_NUM_ANTENNAS_V3 (TXPWRCAP_MAX_NUM_CORES_V3 * 2) 18707 18708 #define TXPWRCAP_NUM_SUBBANDS 5 18709 #define TXPWRCAP_MAX_NUM_SUBGRPS 10 18710 18711 /* IOVAR txcapconfig enum's */ 18712 #define TXPWRCAPCONFIG_WCI2 0u 18713 #define TXPWRCAPCONFIG_HOST 1u 18714 #define TXPWRCAPCONFIG_WCI2_AND_HOST 2u 18715 #define TXPWRCAPCONFIG_NONE 0xFFu 18716 18717 /* IOVAR txcapstate enum's */ 18718 #define TXPWRCAPSTATE_LOW_CAP 0 18719 #define TXPWRCAPSTATE_HIGH_CAP 1 18720 #define TXPWRCAPSTATE_HOST_LOW_WCI2_LOW_CAP 0 18721 #define TXPWRCAPSTATE_HOST_LOW_WCI2_HIGH_CAP 1 18722 #define TXPWRCAPSTATE_HOST_HIGH_WCI2_LOW_CAP 2 18723 #define TXPWRCAPSTATE_HOST_HIGH_WCI2_HIGH_CAP 3 18724 18725 /* IOVAR txcapconfig and txcapstate structure is shared: SET and GET */ 18726 #define TXPWRCAPCTL_VERSION 2 18727 #define TXPWRCAPCTL_VERSION_3 3 18728 18729 typedef struct wl_txpwrcap_ctl { 18730 uint8 version; 18731 uint8 ctl[TXPWRCAP_NUM_SUBBANDS]; 18732 } wl_txpwrcap_ctl_t; 18733 18734 typedef struct wl_txpwrcap_ctl_v3 { 18735 uint8 version; 18736 uint8 ctl[TXPWRCAP_MAX_NUM_SUBGRPS]; 18737 } wl_txpwrcap_ctl_v3_t; 18738 18739 /* IOVAR txcapdump structure: GET only */ 18740 #define TXPWRCAP_DUMP_VERSION 2 18741 typedef struct wl_txpwrcap_dump { 18742 uint8 version; 18743 uint8 pad0; 18744 uint8 current_country[2]; 18745 uint32 current_channel; 18746 uint8 config[TXPWRCAP_NUM_SUBBANDS]; 18747 uint8 state[TXPWRCAP_NUM_SUBBANDS]; 18748 uint8 high_cap_state_enabled; 18749 uint8 wci2_cell_status_last; 18750 uint8 download_present; 18751 uint8 num_subbands; 18752 uint8 num_antennas; 18753 uint8 num_antennas_per_core[TXPWRCAP_MAX_NUM_CORES]; 18754 uint8 num_cc_groups; 18755 uint8 current_country_cc_group_info_index; 18756 int8 low_cap[TXPWRCAP_MAX_NUM_ANTENNAS*TXPWRCAP_NUM_SUBBANDS]; 18757 int8 high_cap[TXPWRCAP_MAX_NUM_ANTENNAS*TXPWRCAP_NUM_SUBBANDS]; 18758 uint8 PAD[3]; 18759 } wl_txpwrcap_dump_t; 18760 18761 typedef struct wl_txpwrcap_dump_v3 { 18762 uint8 version; 18763 uint8 pad0; 18764 uint8 current_country[2]; 18765 uint32 current_channel; 18766 uint8 config[TXPWRCAP_NUM_SUBBANDS]; 18767 uint8 state[TXPWRCAP_NUM_SUBBANDS]; 18768 uint8 high_cap_state_enabled; 18769 uint8 wci2_cell_status_last; 18770 uint8 download_present; 18771 uint8 num_subbands; 18772 uint8 num_antennas; 18773 uint8 num_antennas_per_core[TXPWRCAP_MAX_NUM_CORES]; 18774 uint8 num_cc_groups; 18775 uint8 current_country_cc_group_info_index; 18776 uint8 cap_states_per_cc_group; 18777 int8 host_low_wci2_low_cap[TXPWRCAP_MAX_NUM_ANTENNAS*TXPWRCAP_NUM_SUBBANDS]; 18778 int8 host_low_wci2_high_cap[TXPWRCAP_MAX_NUM_ANTENNAS*TXPWRCAP_NUM_SUBBANDS]; 18779 int8 host_high_wci2_low_cap[TXPWRCAP_MAX_NUM_ANTENNAS*TXPWRCAP_NUM_SUBBANDS]; 18780 int8 host_high_wci2_high_cap[TXPWRCAP_MAX_NUM_ANTENNAS*TXPWRCAP_NUM_SUBBANDS]; 18781 uint8 PAD[2]; 18782 } wl_txpwrcap_dump_v3_t; 18783 18784 /* 18785 * Capability flag for wl_txpwrcap_tbl_v2_t and wl_txpwrcap_t 18786 * The index into pwrs will be: 0: onbody-cck, 1: onbody-ofdm, 2:offbody-cck, 3:offbody-ofdm 18787 * 18788 * For 5G power in SDB case as well as for non-SDB case, the value of flag will be: CAP_ONOFF_BODY 18789 * The index into pwrs will be: 0: onbody, 1: offbody-ofdm 18790 */ 18791 18792 #define CAP_ONOFF_BODY (0x1) /* on/off body only */ 18793 #define CAP_CCK_OFDM (0x2) /* cck/ofdm capability only */ 18794 #define CAP_LTE_CELL (0x4) /* cell on/off capability; required for iOS builds */ 18795 #define CAP_HEAD_BODY (0x8) /* head/body capability */ 18796 #define CAP_2G_DEPON_5G (0x10) /* 2G pwr caps depend on other slice 5G subband */ 18797 #define CAP_SISO_MIMO (0x20) /* Siso/Mimo Separate Power Caps */ 18798 #define CAP_ANT_TX (0x40) /* Separate Power Caps based on cell ant tx value */ 18799 #define CAP_LTE_PQBIT (0x100u) /* QPBit is enabled */ 18800 #define CAP_ONOFF_BODY_CCK_OFDM (CAP_ONOFF_BODY | CAP_CCK_OFDM) 18801 #define CAP_TXPWR_ALL (CAP_ONOFF_BODY|CAP_CCK_OFDM|CAP_LTE_CELL|\ 18802 CAP_SISO_MIMO|CAP_HEAD_BODY|CAP_ANT_TX) 18803 18804 #define TXHDR_SEC_MAX 5u /* Deprecated. Kept till removed in all branches */ 18805 #define TXPWRCAP_MAX_STATES 4u 18806 #define TXPWRCAP_MAX_STATES_V3 10u 18807 #define TXPWRCAP_CCKOFDM_ONOFFBODY_MAX_STATES 4u 18808 #define TXPWRCAP_ONOFFBODY_MAX_STATES 2u 18809 #define TXPWRCAP_ONOFFCELL_MAX_STATES 2u 18810 18811 #define TXHDR_SEC_NONSDB_MAIN_2G 0 18812 #define TXHDR_SEC_NONSDB_MAIN_5G 1 18813 #define TXHDR_SEC_NONSDB_AUX_2G 2 18814 #define TXHDR_SEC_NONSDB_AUX_5G 3 18815 #define TXHDR_SEC_SDB_MAIN_2G 4 18816 #define TXHDR_SEC_SDB_MAIN_5G 5 18817 #define TXHDR_SEC_SDB_AUX_2G 6 18818 #define TXHDR_SEC_SDB_AUX_5G 7 18819 #define TXHDR_MAX_SECTION 8 18820 18821 #define WL_TXPWRCAP_MAX_SLICES 2 18822 #define WL_TXPWRCAPDUMP_VER 4 18823 18824 #define WL_TXPWRCAP_VERSION_2 2 18825 #define WL_TXPWRCAP_VERSION_3 3 18826 18827 typedef struct wl_txpwrcap { 18828 uint8 capability; 18829 uint8 num_cap_states; 18830 uint8 section; /* Index from above,eg. TXHDR_SEC_NONSDB */ 18831 int8 pwrs[][TXPWRCAP_NUM_SUBBANDS][TXPWRCAP_MAX_NUM_CORES]; 18832 } wl_txpwrcap_t; 18833 18834 typedef struct { 18835 uint8 capability; 18836 uint8 num_cap_states; 18837 uint8 num_subgrps; 18838 uint8 section; /* Index from above,eg. TXHDR_SEC_NONSDB */ 18839 int8 pwrs[][TXPWRCAP_MAX_NUM_SUBGRPS][TXPWRCAP_MAX_NUM_ANTENNAS_V3]; 18840 } wl_txpwrcap_v2_t; 18841 18842 #define TXPWRCAP_DUMP_VERSION_4 4u 18843 #define TXPWRCAP_DUMP_VERSION_5 5u 18844 #define TXPWRCAP_DUMP_VERSION_6 6u 18845 18846 typedef struct wl_txpwrcap_dump_v4 { 18847 uint8 version; 18848 uint8 num_pwrcap; 18849 uint8 current_country[2]; 18850 uint32 current_channel; 18851 uint8 download_present; 18852 uint8 num_cores; /* number cores on slice */ 18853 uint8 num_cc_groups; /* number cc groups */ 18854 uint8 current_country_cc_group_info_index; 18855 /* first power cap always exist 18856 * On main,-non-sdb follows by sdb2g and then sdb5g 18857 * On aux slice - aux2g then aux5g. 18858 */ 18859 wl_txpwrcap_t pwrcap; /* first power cap */ 18860 } wl_txpwrcap_dump_v4_t; 18861 18862 typedef struct wl_txpwrcap_dump_v5 { 18863 uint8 version; 18864 uint8 num_pwrcap; 18865 uint8 current_country[2]; 18866 uint8 current_channel; 18867 uint8 high_cap_state_enabled; 18868 uint8 reserved[2]; 18869 uint8 download_present; 18870 uint8 num_ants; /* number antenna slice */ 18871 uint8 num_cc_groups; /* number cc groups */ 18872 uint8 current_country_cc_group_info_index; 18873 uint8 ant_tx; /* current value of ant_tx */ 18874 uint8 cell_status; /* current value of cell status */ 18875 int8 pwrcap[]; /* variable size power caps (wl_txpwrcap_v2_t) */ 18876 } wl_txpwrcap_dump_v5_t; 18877 18878 typedef struct wl_txpwrcap_dump_v6 { 18879 uint8 version; 18880 uint8 num_pwrcap; 18881 uint8 current_country[2]; 18882 uint8 current_channel; 18883 uint8 high_cap_state_enabled; 18884 uint8 reserved[2]; 18885 uint8 download_present; 18886 uint8 num_ants; /* number antenna slice */ 18887 uint8 num_cc_groups; /* number cc groups */ 18888 uint8 current_country_cc_group_info_index; 18889 uint8 ant_tx; /* current value of ant_tx */ 18890 uint8 cell_status; /* current value of cell status */ 18891 uint16 capability[TXHDR_MAX_SECTION]; /* capabilities */ 18892 int8 pwrcap[]; /* variable size power caps (wl_txpwrcap_v2_t) */ 18893 } wl_txpwrcap_dump_v6_t; 18894 18895 #define TXCAPINFO_VERSION_1 1 18896 typedef struct wl_txpwrcap_ccgrp_info { 18897 uint8 num_cc; 18898 char cc_list[1][2]; /* 2 letters for each country. At least one country */ 18899 } wl_txpwrcap_ccgrp_info_t; 18900 18901 typedef struct { 18902 uint16 version; 18903 uint16 length; /* length in bytes */ 18904 uint8 num_ccgrp; 18905 /* followed by one or more wl_txpwrcap_ccgrp_info_t */ 18906 wl_txpwrcap_ccgrp_info_t ccgrp_data[1]; 18907 } wl_txpwrcap_info_t; 18908 18909 typedef struct wl_txpwrcap_tbl { 18910 uint8 num_antennas_per_core[TXPWRCAP_MAX_NUM_CORES]; 18911 /* Stores values for valid antennas */ 18912 int8 pwrcap_cell_on[TXPWRCAP_MAX_NUM_ANTENNAS]; /* qdBm units */ 18913 int8 pwrcap_cell_off[TXPWRCAP_MAX_NUM_ANTENNAS]; /* qdBm units */ 18914 } wl_txpwrcap_tbl_t; 18915 18916 typedef struct wl_txpwrcap_tbl_v2 { 18917 uint8 version; 18918 uint8 length; /* size of entire structure, including the pwrs */ 18919 uint8 capability; /* capability bitmap */ 18920 uint8 num_cores; /* number of cores i.e. entries in each cap state row */ 18921 /* 18922 * pwrs array has TXPWRCAP_MAX_STATES rows - one for each cap state. 18923 * Each row has up to TXPWRCAP_MAX_NUM_CORES entries - one for each core. 18924 */ 18925 uint8 pwrs[][TXPWRCAP_MAX_NUM_CORES]; /* qdBm units */ 18926 } wl_txpwrcap_tbl_v2_t; 18927 18928 typedef struct wl_txpwrcap_tbl_v3 { 18929 uint8 version; 18930 uint8 length; /* size of entire structure, including the pwrs */ 18931 uint8 capability; /* capability bitmap */ 18932 uint8 num_cores; /* number of cores */ 18933 uint8 num_antennas_per_core[TXPWRCAP_MAX_NUM_CORES_V3]; 18934 /* 18935 * pwrs array has TXPWRCAP_MAX_STATES rows - one for each cap state. 18936 * Each row has up to TXPWRCAP_MAX_NUM_ANTENNAS entries - for each antenna. 18937 * Included in the rows of powers are rows for fail safe. 18938 */ 18939 int8 pwrs[][TXPWRCAP_MAX_NUM_ANTENNAS_V3]; /* qdBm units */ 18940 } wl_txpwrcap_tbl_v3_t; 18941 18942 /* dynamic sar iovar subcommand ids */ 18943 enum { 18944 IOV_DYNSAR_MODE = 1, 18945 IOV_DYNSAR_PWR_OFF = 2, 18946 IOV_DYNSAR_STAT_SUM = 3, 18947 IOV_DYNSAR_STAT_DET = 4, 18948 IOV_DYNSAR_TS = 5, 18949 IOV_DYNSAR_OPT_DUR = 6, 18950 IOV_DYNSAR_OPT_TXDC = 7, 18951 IOV_DYNSAR_STATUS = 8, 18952 IOV_DYNSAR_EVENT = 9, 18953 IOV_DYNSAR_VAR = 10, 18954 IOV_DYNSAR_SUM_AGG = 11, 18955 IOV_DYNSAR_CMD_LAST 18956 }; 18957 18958 /* when subcommand is IOV_DYNSAR_MODE, the mode can be one of the below */ 18959 enum { 18960 IOV_DYNSAR_MODE_OFF = 0, /* DSA optimization turned off */ 18961 IOV_DYNSAR_MODE_PWR = 1, /* DSA Power optimization mode */ 18962 IOV_DYNSAR_MODE_HBR_NOMUTE = 2, /* DSA Hybrid power and nomute optimization mode */ 18963 18964 IOV_DYNSAR_MODE_MAX 18965 }; 18966 18967 #define DYNSAR_CNT_VERSION_V1 1u 18968 #define DYNSAR_CNT_VERSION_V2 2u 18969 #define DYNSAR_STS_OBS_WIN 20u 18970 #define DYNSAR_MAX_ANT WL_STA_ANT_MAX 18971 #define DYNSAR_MAX_AGG_IDX (DYNSAR_MAX_ANT << 1u) /* max antenna aggregation index */ 18972 #define DYNSAR_MAC_NUM 2u 18973 18974 /* Error bits */ 18975 #define DYNSAR_NO_TXCAP (1u << 0u) 18976 #define DYNSAR_NO_CLM (1u << 1u) 18977 #define DYNSAR_TDMTX_DISABLED (1u << 2u) 18978 #define DYNSAR_VIOLATION (1u << 3u) 18979 #define DYNSAR_ANT_NUM_MISMATCH (1u << 4u) 18980 #define DYNSAR_COUNTRY_DISABLED (1u << 5u) 18981 18982 typedef struct wlc_dynsar_sts_mon_ctr_st { 18983 uint32 tx_dur; /* in usec */ 18984 uint32 tx_dur_raw; /* in usec */ 18985 uint32 plim_avg; /* In uw. plim averaged over mon win. */ 18986 uint32 energy; /* pavg * dur in mw * ms */ 18987 uint32 qsar; /* plim * dur in mw * ms */ 18988 uint16 fs; /* failsafe duration in usec */ 18989 uint8 util_hist; /* utilization in past observe sec */ 18990 uint8 util_pred; /* utilization of past (observe - budget) & predicted budget sec */ 18991 } wlc_dynsar_sts_mon_ctr_t; 18992 18993 typedef struct wlc_dynsar_sts_obs_win { 18994 uint8 opt; 18995 uint8 valid; 18996 uint16 pad; 18997 uint32 dur; /* monitor duration in usec */ 18998 uint64 ts; /* timestamp in usec */ 18999 } wlc_dynsar_sts_obs_win_t; 19000 19001 typedef struct dynsar_agg_entry { 19002 uint32 util; 19003 uint32 util_sqr; 19004 uint32 mean_util; 19005 uint32 var; 19006 } dynsar_agg_ent_t; 19007 19008 typedef struct dynsar_agg_stat { 19009 /* variable length */ 19010 uint16 len; /* length of this structure including data */ 19011 uint16 num_ent; /* number of entries per aggregated slot */ 19012 uint16 num_agg; /* number of aggregated slots */ 19013 uint16 pad; /* pad */ 19014 uint64 buf[]; /* num_ent entries wlc_dynsar_sts_obs_win_t 19015 * followed by num_ent entries dynsar_agg_ent_t 19016 */ 19017 } dynsar_agg_stat_t; 19018 19019 /* structure holding dynsar per slice counters that interface to iovar */ 19020 typedef struct dynsar_cnt_v1 { 19021 uint16 ver; 19022 uint16 len; /* length of this structure */ 19023 uint8 num_ant; /* num_antennas */ 19024 uint8 win; /* number of valid entries in the observe window */ 19025 uint8 slice; 19026 uint8 pad; /* num_antennas */ 19027 uint64 sync_ts; /* time of first mon period collection after last sync */ 19028 wlc_dynsar_sts_obs_win_t obs[DYNSAR_STS_OBS_WIN]; 19029 wlc_dynsar_sts_mon_ctr_t mon_ctr[DYNSAR_STS_OBS_WIN][DYNSAR_MAX_ANT]; 19030 } dynsar_cnt_v1_t; 19031 19032 typedef struct dynsar_shared_ant_stats { 19033 uint32 tx_dur; /* tx duration */ 19034 uint8 sar_util; /* sar utilization */ 19035 uint8 pad[3]; /* pad */ 19036 } dynsar_shared_ant_stats_t; 19037 19038 typedef struct dynsar_unshared_ant_stats { 19039 uint32 qsar; /* mw * ms */ 19040 uint32 energy; /* mw * ms */ 19041 uint32 tx_dur; /* tx duration */ 19042 } dynsar_unshared_ant_stats_t; 19043 19044 typedef struct dynsar_sum_v1 { 19045 uint16 ver; 19046 uint16 len; /* length of this structure */ 19047 uint32 dur; /* duration in us */ 19048 uint64 ts; /* time stamp of report in us */ 19049 uint64 sync_ts; /* time of first mon period collection after last sync */ 19050 uint8 slice; 19051 uint8 num_ant; 19052 uint8 opt; 19053 uint8 sync; 19054 /* per antenna counters aggregated if shared between radios */ 19055 struct { 19056 uint32 tx_dur; /* tx duration */ 19057 uint8 sar_util; /* sar utilization */ 19058 uint8 PAD[3]; /* pad */ 19059 } shared[DYNSAR_MAX_ANT]; 19060 19061 /* per antenna counters not aggregated between radios */ 19062 struct { 19063 uint32 qsar; /* mw * ms */ 19064 uint32 energy; /* mw * ms */ 19065 } unshared[DYNSAR_MAX_ANT]; 19066 } dynsar_sum_v1_t; 19067 19068 typedef struct dynsar_sum_v2 { 19069 uint16 ver; 19070 uint16 len; /* length of this structure */ 19071 uint32 dur; /* duration in us */ 19072 uint64 ts; /* time stamp of report in us */ 19073 uint64 sync_ts; /* time of first mon period collection after last sync */ 19074 uint8 num_ant; /* max number of antennas between 2 slices */ 19075 uint8 opt; 19076 uint8 sync; 19077 uint8 max_mac; /* number of slices */ 19078 uint8 num_agg; /* number of aggregated antennas */ 19079 uint8 offset_shared; /* offset from beginning of structure to shared antenna data */ 19080 uint8 offset_unshared; /* offset from beginning of structure to unshared antenna data */ 19081 uint8 pad; 19082 /* Variable length data sections follow as per above offsets: 19083 * dynsar_unshared_ant_stats_t [max_mac][num_ant] 19084 * dynsar_shared_ant_stats_t [num_agg] 19085 */ 19086 } dynsar_sum_v2_t; 19087 19088 typedef struct dynsar_status { 19089 uint16 ver; 19090 uint16 len; /* length of this structure */ 19091 uint8 slice; /* slice number */ 19092 uint8 mode; /* optimization mode */ 19093 uint8 util_thrhd; /* utilization threshold */ 19094 uint8 opt_txdc; /* txdc prediction percentage */ 19095 uint8 opt_dur; /* optimization prediction duration */ 19096 uint8 event; /* if wl event is configured */ 19097 uint8 time_sync; /* if gpio pulse is configured */ 19098 uint8 power_off; /* power offset in db */ 19099 uint8 num_ant; /* num antenna */ 19100 uint8 status; /* status bitmap. e.g. WL_DYNSAR_STS_PWR_OPT. 19101 * These are same as status field in wl_event 19102 */ 19103 uint8 error; /* error bits */ 19104 uint8 gpio_pin; /* gpio pin */ 19105 /* aggregation index array of num_ant entries */ 19106 uint8 agg[]; /* aggregation indices */ 19107 } dynsar_status_t; 19108 19109 typedef struct dynsar_var_info { 19110 uint lim; /* variance limit */ 19111 uint off; /* hysterysis offset applied to variance while optimized */ 19112 } dynsar_var_info_t; 19113 19114 typedef struct dynsar_status_v2 { 19115 uint16 ver; 19116 uint16 len; /* length of this structure */ 19117 uint8 slice; /* slice number */ 19118 uint8 mode; /* optimization mode */ 19119 uint8 util_thrhd; /* utilization threshold */ 19120 uint8 opt_txdc; /* txdc prediction percentage */ 19121 uint8 opt_dur; /* optimization prediction duration */ 19122 uint8 event; /* if wl event is configured */ 19123 uint8 time_sync; /* if gpio pulse is configured */ 19124 uint8 power_off; /* power offset in db */ 19125 uint8 num_ant; /* num antenna */ 19126 uint8 status; /* status bitmap. e.g. WL_DYNSAR_STS_PWR_OPT. 19127 * These are same as status field in wl_event 19128 */ 19129 uint8 error; /* error bits */ 19130 uint8 gpio_pin; /* gpio pin */ 19131 dynsar_var_info_t var; /* variance information */ 19132 /* aggregation index array of num_ant entries */ 19133 uint8 agg[]; /* aggregation indices */ 19134 } dynsar_status_v2_t; 19135 19136 typedef struct wl_dynsar_ioc { 19137 uint16 id; /* ID of the sub-command */ 19138 uint16 len; /* total length of all data[] */ 19139 union { /* var len payload */ 19140 uint8 cnt; 19141 dynsar_cnt_v1_t det; 19142 dynsar_agg_stat_t agg_stat; 19143 dynsar_sum_v1_t sum; 19144 dynsar_sum_v2_t sumv2; 19145 dynsar_status_t status; 19146 dynsar_status_v2_t statusv2; 19147 dynsar_var_info_t var; 19148 } data; 19149 } wl_dynsar_ioc_t; 19150 19151 typedef struct wlc_dynsar_status { 19152 uint16 ver; 19153 uint16 len; /* length of this structure */ 19154 } wl_dynsar_status_t; 19155 19156 /* ##### Ecounters section ##### */ 19157 #define ECOUNTERS_VERSION_1 1 19158 19159 /* Input structure for ecounters IOVAR */ 19160 typedef struct ecounters_config_request { 19161 uint16 version; /* config version */ 19162 uint16 set; /* Set where data will go. */ 19163 uint16 size; /* Size of the set. */ 19164 uint16 timeout; /* timeout in seconds. */ 19165 uint16 num_events; /* Number of events to report. */ 19166 uint16 ntypes; /* Number of entries in type array. */ 19167 uint16 type[1]; /* Statistics Types (tags) to retrieve. */ 19168 } ecounters_config_request_t; 19169 19170 #define ECOUNTERS_EVENTMSGS_VERSION_1 1 19171 #define ECOUNTERS_TRIGGER_CONFIG_VERSION_1 1 19172 19173 #define ECOUNTERS_EVENTMSGS_EXT_MASK_OFFSET \ 19174 OFFSETOF(ecounters_eventmsgs_ext_t, mask[0]) 19175 19176 #define ECOUNTERS_TRIG_CONFIG_TYPE_OFFSET \ 19177 OFFSETOF(ecounters_trigger_config_t, type[0]) 19178 19179 typedef struct ecounters_eventmsgs_ext { 19180 uint8 version; 19181 uint8 len; 19182 uint8 mask[1]; 19183 } ecounters_eventmsgs_ext_t; 19184 19185 typedef struct ecounters_trigger_config { 19186 uint16 version; /* version */ 19187 uint16 set; /* set where data should go */ 19188 uint16 rsvd; /* reserved */ 19189 uint16 pad; /* pad/reserved */ 19190 uint16 ntypes; /* number of types/tags */ 19191 uint16 type[1]; /* list of types */ 19192 } ecounters_trigger_config_t; 19193 19194 #define ECOUNTERS_TRIGGER_REASON_VERSION_1 1 19195 typedef enum { 19196 /* Triggered due to timer based ecounters */ 19197 ECOUNTERS_TRIGGER_REASON_TIMER = 0, 19198 /* Triggered due to event based configuration */ 19199 ECOUNTERS_TRIGGER_REASON_EVENTS = 1, 19200 ECOUNTERS_TRIGGER_REASON_D2H_EVENTS = 2, 19201 ECOUNTERS_TRIGGER_REASON_H2D_EVENTS = 3, 19202 ECOUNTERS_TRIGGER_REASON_USER_EVENTS = 4, 19203 ECOUNTERS_TRIGGER_REASON_MAX = 5 19204 } ecounters_trigger_reasons_list_t; 19205 19206 typedef struct ecounters_trigger_reason { 19207 uint16 version; /* version */ 19208 uint16 trigger_reason; /* trigger reason */ 19209 uint32 sub_reason_code; /* sub reason code */ 19210 uint32 trigger_time_now; /* time in ms at trigger */ 19211 uint32 host_ref_time; /* host ref time */ 19212 } ecounters_trigger_reason_t; 19213 19214 #define WL_LQM_VERSION_1 1 19215 19216 /* For wl_lqm_t flags field */ 19217 #define WL_LQM_CURRENT_BSS_VALID 0x1 19218 #define WL_LQM_TARGET_BSS_VALID 0x2 19219 19220 #define WL_PERIODIC_COMPACT_CNTRS_VER_1 (1) 19221 #define WL_PERIODIC_TXBF_CNTRS_VER_1 (1) 19222 typedef struct { 19223 uint16 version; 19224 uint16 pad; 19225 /* taken from wl_wlc_cnt_t */ 19226 uint32 txfail; 19227 /* taken from wl_cnt_ge40mcst_v1_t */ 19228 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 19229 * Control Management (includes retransmissions) 19230 */ 19231 uint32 txrtsfrm; /**< number of RTS sent out by the MAC */ 19232 uint32 txctsfrm; /**< number of CTS sent out by the MAC */ 19233 uint32 txback; /**< blockack txcnt */ 19234 uint32 txucast; /**< number of unicast tx expecting response other than cts/cwcts */ 19235 uint32 txnoack; /**< dot11ACKFailureCount */ 19236 uint32 txframe; /**< tx data frames */ 19237 uint32 txretrans; /**< tx mac retransmits */ 19238 uint32 txpspoll; /**< Number of TX PS-poll */ 19239 19240 uint32 rxrsptmout; /**< number of response timeouts for transmitted frames 19241 * expecting a response 19242 */ 19243 uint32 txrtsfail; /**< number of rts transmission failure that reach retry limit */ 19244 uint32 rxstrt; /**< number of received frames with a good PLCP */ 19245 uint32 rxbadplcp; /**< number of parity check of the PLCP header failed */ 19246 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 19247 uint32 rxnodelim; /**< number of no valid delimiter detected by ampdu parser */ 19248 uint32 bphy_badplcp; /**< number of bad PLCP reception on BPHY rate */ 19249 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 19250 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 19251 uint32 rxf0ovfl; /**< number of receive fifo 0 overflows */ 19252 uint32 rxf1ovfl; /**< number of receive fifo 0 overflows */ 19253 uint32 rxhlovfl; /**< number of length / header fifo overflows */ 19254 uint32 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 19255 uint32 rxctsucast; /**< number of unicast CTS addressed to the MAC (good FCS) */ 19256 uint32 rxackucast; /**< number of ucast ACKS received (good FCS) */ 19257 uint32 rxback; /**< blockack rxcnt */ 19258 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 19259 uint32 rxdtucastmbss; /**< number of received DATA frames with good FCS and matching RA */ 19260 uint32 rxbeaconobss; /**< beacons received from other BSS */ 19261 uint32 rxdtucastobss; /**< number of unicast frames addressed to the MAC from 19262 * other BSS (WDS FRAME) 19263 */ 19264 uint32 rxdtocast; /**< number of received DATA frames (good FCS and no matching RA) */ 19265 uint32 rxrtsocast; /**< number of received RTS not addressed to the MAC */ 19266 uint32 rxctsocast; /**< number of received CTS not addressed to the MAC */ 19267 uint32 rxdtmcast; /**< number of RX Data multicast frames received by the MAC */ 19268 uint32 rxmpdu_mu; /**< Number of MU MPDUs received */ 19269 uint32 rxtoolate; /**< receive too late */ 19270 uint32 rxframe; /**< rx data frames */ 19271 uint32 lqcm_report; /**< lqcm metric tx/rx idx */ 19272 uint32 tx_toss_cnt; /* number of tx packets tossed */ 19273 uint32 rx_toss_cnt; /* number of rx packets tossed */ 19274 uint32 last_tx_toss_rsn; /* reason because of which last tx pkt tossed */ 19275 uint32 last_rx_toss_rsn; /* reason because of which last rx pkt tossed */ 19276 uint32 txbcnfrm; /**< beacons transmitted */ 19277 } wl_periodic_compact_cntrs_v1_t; 19278 19279 #define WL_PERIODIC_COMPACT_CNTRS_VER_2 (2) 19280 typedef struct { 19281 uint16 version; 19282 uint16 pad; 19283 /* taken from wl_wlc_cnt_t */ 19284 uint32 txfail; 19285 /* taken from wl_cnt_ge40mcst_v1_t */ 19286 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 19287 * Control Management (includes retransmissions) 19288 */ 19289 uint32 txrtsfrm; /**< number of RTS sent out by the MAC */ 19290 uint32 txctsfrm; /**< number of CTS sent out by the MAC */ 19291 uint32 txback; /**< blockack txcnt */ 19292 uint32 txucast; /**< number of unicast tx expecting response other than cts/cwcts */ 19293 uint32 txnoack; /**< dot11ACKFailureCount */ 19294 uint32 txframe; /**< tx data frames */ 19295 uint32 txretrans; /**< tx mac retransmits */ 19296 uint32 txpspoll; /**< Number of TX PS-poll */ 19297 19298 uint32 rxrsptmout; /**< number of response timeouts for transmitted frames 19299 * expecting a response 19300 */ 19301 uint32 txrtsfail; /**< number of rts transmission failure that reach retry limit */ 19302 uint32 rxstrt; /**< number of received frames with a good PLCP */ 19303 uint32 rxbadplcp; /**< number of parity check of the PLCP header failed */ 19304 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 19305 uint32 rxnodelim; /**< number of no valid delimiter detected by ampdu parser */ 19306 uint32 bphy_badplcp; /**< number of bad PLCP reception on BPHY rate */ 19307 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 19308 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 19309 uint32 rxf0ovfl; /**< number of receive fifo 0 overflows */ 19310 uint32 rxf1ovfl; /**< number of receive fifo 0 overflows */ 19311 uint32 rxhlovfl; /**< number of length / header fifo overflows */ 19312 uint32 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 19313 uint32 rxctsucast; /**< number of unicast CTS addressed to the MAC (good FCS) */ 19314 uint32 rxackucast; /**< number of ucast ACKS received (good FCS) */ 19315 uint32 rxback; /**< blockack rxcnt */ 19316 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 19317 uint32 rxdtucastmbss; /**< number of received DATA frames with good FCS and matching RA */ 19318 uint32 rxbeaconobss; /**< beacons received from other BSS */ 19319 uint32 rxdtucastobss; /**< number of unicast frames addressed to the MAC from 19320 * other BSS (WDS FRAME) 19321 */ 19322 uint32 rxdtocast; /**< number of received DATA frames (good FCS and no matching RA) */ 19323 uint32 rxrtsocast; /**< number of received RTS not addressed to the MAC */ 19324 uint32 rxctsocast; /**< number of received CTS not addressed to the MAC */ 19325 uint32 rxdtmcast; /**< number of RX Data multicast frames received by the MAC */ 19326 uint32 rxmpdu_mu; /**< Number of MU MPDUs received */ 19327 uint32 rxtoolate; /**< receive too late */ 19328 uint32 rxframe; /**< rx data frames */ 19329 uint32 lqcm_report; /**< lqcm metric tx/rx idx */ 19330 uint32 tx_toss_cnt; /* number of tx packets tossed */ 19331 uint32 rx_toss_cnt; /* number of rx packets tossed */ 19332 uint32 last_tx_toss_rsn; /* reason because of which last tx pkt tossed */ 19333 uint32 last_rx_toss_rsn; /* reason because of which last rx pkt tossed */ 19334 uint32 txbcnfrm; /**< beacons transmitted */ 19335 uint32 rxretry; /* Number of rx packets received after retry */ 19336 uint32 rxdup; /* Number of dump packet. Indicates whether peer is receiving ack */ 19337 uint32 chswitch_cnt; /* Number of channel switches */ 19338 uint32 pm_dur; /* Total sleep time in PM, msecs */ 19339 } wl_periodic_compact_cntrs_v2_t; 19340 19341 #define WL_PERIODIC_COMPACT_CNTRS_VER_3 (3) 19342 typedef struct { 19343 uint16 version; 19344 uint16 pad; 19345 /* taken from wl_wlc_cnt_t */ 19346 uint32 txfail; 19347 /* taken from wl_cnt_ge40mcst_v1_t */ 19348 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 19349 * Control Management (includes retransmissions) 19350 */ 19351 uint32 txrtsfrm; /**< number of RTS sent out by the MAC */ 19352 uint32 txctsfrm; /**< number of CTS sent out by the MAC */ 19353 uint32 txback; /**< blockack txcnt */ 19354 uint32 txucast; /**< number of unicast tx expecting response other than cts/cwcts */ 19355 uint32 txnoack; /**< dot11ACKFailureCount */ 19356 uint32 txframe; /**< tx data frames */ 19357 uint32 txretrans; /**< tx mac retransmits */ 19358 uint32 txpspoll; /**< Number of TX PS-poll */ 19359 19360 uint32 rxrsptmout; /**< number of response timeouts for transmitted frames 19361 * expecting a response 19362 */ 19363 uint32 txrtsfail; /**< number of rts transmission failure that reach retry limit */ 19364 uint32 rxstrt; /**< number of received frames with a good PLCP */ 19365 uint32 rxbadplcp; /**< number of parity check of the PLCP header failed */ 19366 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 19367 uint32 rxnodelim; /**< number of no valid delimiter detected by ampdu parser */ 19368 uint32 bphy_badplcp; /**< number of bad PLCP reception on BPHY rate */ 19369 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 19370 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 19371 uint32 rxf0ovfl; /**< number of receive fifo 0 overflows */ 19372 uint32 rxf1ovfl; /**< number of receive fifo 0 overflows */ 19373 uint32 rxhlovfl; /**< number of length / header fifo overflows */ 19374 uint32 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 19375 uint32 rxctsucast; /**< number of unicast CTS addressed to the MAC (good FCS) */ 19376 uint32 rxackucast; /**< number of ucast ACKS received (good FCS) */ 19377 uint32 rxback; /**< blockack rxcnt */ 19378 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 19379 uint32 rxdtucastmbss; /**< number of received DATA frames with good FCS and matching RA */ 19380 uint32 rxbeaconobss; /**< beacons received from other BSS */ 19381 uint32 rxdtucastobss; /**< number of unicast frames addressed to the MAC from 19382 * other BSS (WDS FRAME) 19383 */ 19384 uint32 rxdtocast; /**< number of received DATA frames (good FCS and no matching RA) */ 19385 uint32 rxrtsocast; /**< number of received RTS not addressed to the MAC */ 19386 uint32 rxctsocast; /**< number of received CTS not addressed to the MAC */ 19387 uint32 rxdtmcast; /**< number of RX Data multicast frames received by the MAC */ 19388 uint32 rxmpdu_mu; /**< Number of MU MPDUs received */ 19389 uint32 rxtoolate; /**< receive too late */ 19390 uint32 rxframe; /**< rx data frames */ 19391 uint32 lqcm_report; /**< lqcm metric tx/rx idx */ 19392 uint32 tx_toss_cnt; /* number of tx packets tossed */ 19393 uint32 rx_toss_cnt; /* number of rx packets tossed */ 19394 uint32 last_tx_toss_rsn; /* reason because of which last tx pkt tossed */ 19395 uint32 last_rx_toss_rsn; /* reason because of which last rx pkt tossed */ 19396 uint32 txbcnfrm; /**< beacons transmitted */ 19397 uint32 rxretry; /* Number of rx packets received after retry */ 19398 uint32 rxdup; /* Number of dump packet. Indicates whether peer is receiving ack */ 19399 uint32 chswitch_cnt; /* Number of channel switches */ 19400 uint32 pm_dur; /* Total sleep time in PM, msecs */ 19401 uint32 rxholes; /* Count of missed packets from peer */ 19402 } wl_periodic_compact_cntrs_v3_t; 19403 19404 #define WL_PERIODIC_COMPACT_CNTRS_VER_4 (4) 19405 typedef struct { 19406 uint16 version; 19407 uint16 pad; 19408 /* taken from wl_wlc_cnt_t */ 19409 uint32 txfail; 19410 /* taken from wl_cnt_ge40mcst_v1_t */ 19411 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 19412 * Control Management (includes retransmissions) 19413 */ 19414 uint32 txrtsfrm; /**< number of RTS sent out by the MAC */ 19415 uint32 txctsfrm; /**< number of CTS sent out by the MAC */ 19416 uint32 txback; /**< blockack txcnt */ 19417 uint32 txucast; /**< number of unicast tx expecting response other than cts/cwcts */ 19418 uint32 txnoack; /**< dot11ACKFailureCount */ 19419 uint32 txframe; /**< tx data frames */ 19420 uint32 txretrans; /**< tx mac retransmits */ 19421 uint32 txpspoll; /**< Number of TX PS-poll */ 19422 19423 uint32 rxrsptmout; /**< number of response timeouts for transmitted frames 19424 * expecting a response 19425 */ 19426 uint32 txrtsfail; /**< number of rts transmission failure that reach retry limit */ 19427 uint32 rxstrt; /**< number of received frames with a good PLCP */ 19428 uint32 rxbadplcp; /**< number of parity check of the PLCP header failed */ 19429 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 19430 uint32 rxnodelim; /**< number of no valid delimiter detected by ampdu parser */ 19431 uint32 bphy_badplcp; /**< number of bad PLCP reception on BPHY rate */ 19432 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 19433 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 19434 uint32 rxf0ovfl; /**< number of receive fifo 0 overflows */ 19435 uint32 rxf1ovfl; /**< number of receive fifo 0 overflows */ 19436 uint32 rxhlovfl; /**< number of length / header fifo overflows */ 19437 uint32 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 19438 uint32 rxctsucast; /**< number of unicast CTS addressed to the MAC (good FCS) */ 19439 uint32 rxackucast; /**< number of ucast ACKS received (good FCS) */ 19440 uint32 rxback; /**< blockack rxcnt */ 19441 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 19442 uint32 rxdtucastmbss; /**< number of received DATA frames with good FCS and matching RA */ 19443 uint32 rxbeaconobss; /**< beacons received from other BSS */ 19444 uint32 rxdtucastobss; /**< number of unicast frames addressed to the MAC from 19445 * other BSS (WDS FRAME) 19446 */ 19447 uint32 rxdtocast; /**< number of received DATA frames (good FCS and no matching RA) */ 19448 uint32 rxrtsocast; /**< number of received RTS not addressed to the MAC */ 19449 uint32 rxctsocast; /**< number of received CTS not addressed to the MAC */ 19450 uint32 rxdtmcast; /**< number of RX Data multicast frames received by the MAC */ 19451 uint32 rxmpdu_mu; /**< Number of MU MPDUs received */ 19452 uint32 rxtoolate; /**< receive too late */ 19453 uint32 rxframe; /**< rx data frames */ 19454 uint32 lqcm_report; /**< lqcm metric tx/rx idx */ 19455 uint32 tx_toss_cnt; /* number of tx packets tossed */ 19456 uint32 rx_toss_cnt; /* number of rx packets tossed */ 19457 uint32 last_tx_toss_rsn; /* reason because of which last tx pkt tossed */ 19458 uint32 last_rx_toss_rsn; /* reason because of which last rx pkt tossed */ 19459 uint32 txbcnfrm; /**< beacons transmitted */ 19460 uint32 rxretry; /* Number of rx packets received after retry */ 19461 uint32 rxdup; /* Number of dump packet. Indicates whether peer is receiving ack */ 19462 uint32 chswitch_cnt; /* Number of channel switches */ 19463 uint32 pm_dur; /* Total sleep time in PM, msecs */ 19464 uint32 rxholes; /* Count of missed packets from peer */ 19465 19466 uint32 rxundec; /* Decrypt failures */ 19467 uint32 rxundec_mcst; /* Decrypt failures multicast */ 19468 uint16 replay; /* replay failures */ 19469 uint16 replay_mcst; /* ICV failures */ 19470 19471 uint32 pktfilter_discard; /* Filtered packtets by pkt filter */ 19472 uint32 pktfilter_forward; /* Forwared packets by pkt filter */ 19473 uint32 mac_rxfilter; /* Pkts filtered due to class/auth state mismatch */ 19474 19475 } wl_periodic_compact_cntrs_v4_t; 19476 19477 #define WL_PERIODIC_COMPACT_HE_CNTRS_VER_1 (1) 19478 typedef struct { 19479 uint16 version; 19480 uint16 len; 19481 uint32 he_rxtrig_rand; 19482 uint32 he_colormiss_cnt; 19483 uint32 he_txmtid_back; 19484 uint32 he_rxmtid_back; 19485 uint32 he_rxmsta_back; 19486 uint32 he_rxtrig_basic; 19487 uint32 he_rxtrig_murts; 19488 uint32 he_rxtrig_bsrp; 19489 uint32 he_rxdlmu; 19490 uint32 he_physu_rx; 19491 uint32 he_txtbppdu; 19492 } wl_compact_he_cnt_wlc_v1_t; 19493 19494 #define WL_PERIODIC_COMPACT_HE_CNTRS_VER_2 (2) 19495 typedef struct { 19496 uint16 version; 19497 uint16 len; 19498 uint32 he_rxtrig_myaid; 19499 uint32 he_rxtrig_rand; 19500 uint32 he_colormiss_cnt; 19501 uint32 he_txmampdu; 19502 uint32 he_txmtid_back; 19503 uint32 he_rxmtid_back; 19504 uint32 he_rxmsta_back; 19505 uint32 he_txfrag; 19506 uint32 he_rxdefrag; 19507 uint32 he_txtrig; 19508 uint32 he_rxtrig_basic; 19509 uint32 he_rxtrig_murts; 19510 uint32 he_rxtrig_bsrp; 19511 uint32 he_rxhemuppdu_cnt; 19512 uint32 he_physu_rx; 19513 uint32 he_phyru_rx; 19514 uint32 he_txtbppdu; 19515 uint32 he_null_tbppdu; 19516 uint32 he_rxhesuppdu_cnt; 19517 uint32 he_rxhesureppdu_cnt; 19518 uint32 he_null_zero_agg; 19519 uint32 he_null_bsrp_rsp; 19520 uint32 he_null_fifo_empty; 19521 } wl_compact_he_cnt_wlc_v2_t; 19522 19523 /* for future versions of this data structure, can consider wl_txbf_ecounters_t 19524 * which contains the full list of txbf dump counters 19525 */ 19526 typedef struct { 19527 uint16 version; 19528 uint16 coreup; 19529 uint32 txndpa; 19530 uint32 txndp; 19531 uint32 rxsf; 19532 uint32 txbfm; 19533 uint32 rxndpa_u; 19534 uint32 rxndpa_m; 19535 uint32 bferpt; 19536 uint32 rxbfpoll; 19537 uint32 txsf; 19538 } wl_periodic_txbf_cntrs_v1_t; 19539 19540 typedef struct { 19541 struct ether_addr BSSID; 19542 chanspec_t chanspec; 19543 int32 rssi; 19544 int32 snr; 19545 } wl_rx_signal_metric_t; 19546 19547 typedef struct { 19548 uint8 version; 19549 uint8 flags; 19550 uint16 pad; 19551 int32 noise_level; /* current noise level */ 19552 wl_rx_signal_metric_t current_bss; 19553 wl_rx_signal_metric_t target_bss; 19554 } wl_lqm_t; 19555 19556 #define WL_PERIODIC_IF_STATE_VER_1 (1) 19557 typedef struct wl_if_state_compact { 19558 uint8 version; 19559 uint8 assoc_state; 19560 uint8 antenna_count; /**< number of valid antenna rssi */ 19561 int8 noise_level; /**< noise right after tx (in dBm) */ 19562 int8 snr; /* current noise level */ 19563 int8 rssi_sum; /**< summed rssi across all antennas */ 19564 uint16 pad16; 19565 int8 rssi_ant[WL_RSSI_ANT_MAX]; /**< rssi per antenna */ 19566 struct ether_addr BSSID; 19567 chanspec_t chanspec; 19568 } wl_if_state_compact_t; 19569 19570 #define WL_EVENT_STATISTICS_VER_1 (1) 19571 /* Event based statistics ecounters */ 19572 typedef struct { 19573 uint16 version; 19574 uint16 pad; 19575 struct ether_addr BSSID; /* BSSID of the BSS */ 19576 uint32 txdeauthivalclass; 19577 } wl_event_based_statistics_v1_t; 19578 19579 #define WL_EVENT_STATISTICS_VER_2 (2) 19580 /* Event based statistics ecounters */ 19581 typedef struct { 19582 uint16 version; 19583 uint16 pad; 19584 struct ether_addr BSSID; /* BSSID of the BSS */ 19585 uint32 txdeauthivalclass; 19586 /* addition for v2 */ 19587 int32 timestamp; /* last deauth time */ 19588 struct ether_addr last_deauth; /* wrong deauth MAC */ 19589 uint16 misdeauth; /* wrong deauth count every 1sec */ 19590 int16 cur_rssi; /* current bss rssi */ 19591 int16 deauth_rssi; /* deauth pkt rssi */ 19592 } wl_event_based_statistics_v2_t; 19593 19594 #define WL_EVENT_STATISTICS_VER_3 (3) 19595 /* Event based statistics ecounters */ 19596 typedef struct { 19597 uint16 version; 19598 uint16 pad; 19599 struct ether_addr BSSID; /* BSSID of the BSS */ 19600 uint16 PAD; 19601 uint32 txdeauthivalclass; 19602 /* addition for v2 */ 19603 int32 timestamp; /* last deauth time */ 19604 struct ether_addr last_deauth; /* wrong deauth MAC */ 19605 uint16 misdeauth; /* wrong deauth count every 1sec */ 19606 int16 cur_rssi; /* current bss rssi */ 19607 int16 deauth_rssi; /* deauth pkt rssi */ 19608 /* addition for v3 (roam statistics) */ 19609 uint32 initial_assoc_time; 19610 uint32 prev_roam_time; 19611 uint32 last_roam_event_type; 19612 uint32 last_roam_event_status; 19613 uint32 last_roam_event_reason; 19614 uint16 roam_success_cnt; 19615 uint16 roam_fail_cnt; 19616 uint16 roam_attempt_cnt; 19617 uint16 max_roam_target_cnt; 19618 uint16 min_roam_target_cnt; 19619 uint16 max_cached_ch_cnt; 19620 uint16 min_cached_ch_cnt; 19621 uint16 partial_roam_scan_cnt; 19622 uint16 full_roam_scan_cnt; 19623 uint16 most_roam_reason; 19624 uint16 most_roam_reason_cnt; 19625 } wl_event_based_statistics_v3_t; 19626 19627 #define WL_EVENT_STATISTICS_VER_4 (4u) 19628 /* Event based statistics ecounters */ 19629 typedef struct { 19630 uint16 version; 19631 uint16 pad; 19632 struct ether_addr BSSID; /* BSSID of the BSS */ 19633 uint16 PAD; 19634 uint32 txdeauthivalclass; 19635 /* addition for v2 */ 19636 int32 timestamp; /* last deauth time */ 19637 struct ether_addr last_deauth; /* wrong deauth MAC */ 19638 uint16 misdeauth; /* wrong deauth count every 1sec */ 19639 int16 cur_rssi; /* current bss rssi */ 19640 int16 deauth_rssi; /* deauth pkt rssi */ 19641 } wl_event_based_statistics_v4_t; 19642 19643 /* ##### SC/ Sc offload/ WBUS related ecounters */ 19644 19645 #define WL_SC_PERIODIC_COMPACT_CNTRS_VER_1 (1) 19646 typedef struct { 19647 uint16 version; 19648 uint16 pad; 19649 uint32 rxstrt; /**< number of received frames with a good PLCP */ 19650 uint32 rxbadplcp; /**< number of parity check of the PLCP header failed */ 19651 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 19652 uint32 rxnodelim; /**< number of no valid delimiter detected by ampdu parser */ 19653 uint32 bphy_badplcp; /**< number of bad PLCP reception on BPHY rate */ 19654 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 19655 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 19656 uint16 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 19657 uint16 rxf0ovfl; /**< number of receive fifo 0 overflows */ 19658 uint16 rxf1ovfl; /**< number of receive fifo 0 overflows */ 19659 uint16 rxhlovfl; /**< number of length / header fifo overflows */ 19660 uint16 rxbeaconmbss; /**< beacons received from member of BSS */ 19661 uint16 rxdtucastmbss; /**< number of received DATA frames with good FCS and matching RA */ 19662 uint16 rxbeaconobss; /**< beacons received from other BSS */ 19663 uint16 rxdtmcast; /**< number of RX Data multicast frames received by the MAC */ 19664 uint16 rxtoolate; /**< receive too late */ 19665 uint16 chswitch_cnt; /* Number of channel switches */ 19666 uint32 pm_dur; /* Total sleep time in PM, msecs */ 19667 uint16 hibernate_cnt; /* Number of times sc went to hibernate */ 19668 uint16 awake_cnt; /* Number of times sc awake is called */ 19669 uint16 sc_up_cnt; /* Number of times sc up/down happened */ 19670 uint16 sc_down_cnt; /* Number of times sc down happened */ 19671 } wl_sc_periodic_compact_cntrs_v1_t; 19672 19673 #define WL_WBUS_PERIODIC_CNTRS_VER_1 (1) 19674 typedef struct { 19675 uint16 version; 19676 uint16 pad; 19677 uint16 num_register; /* Number of registrations */ 19678 uint16 num_deregister; /* Number of deregistrations */ 19679 uint8 num_pending; /* Number of pending non-bt */ 19680 uint8 num_active; /* Number of active non-bt */ 19681 uint8 num_bt; /* Number of bt users */ 19682 uint8 pad1; 19683 uint16 num_rej; /* Number of reject */ 19684 uint16 num_rej_bt; /* Number of rejects for bt */ 19685 uint16 num_accept_attempt; /* Numbber of accept attempt */ 19686 uint16 num_accept_ok; /* Number of accept ok */ 19687 } wl_wbus_periodic_cntrs_v1_t; 19688 19689 #define WL_STA_OFLD_CNTRS_VER_1 (1) 19690 typedef struct { 19691 uint16 version; 19692 uint16 pad; 19693 19694 uint16 sc_ofld_enter_cnt; 19695 uint16 sc_ofld_exit_cnt; 19696 uint16 sc_ofld_wbus_reject_cnt; 19697 uint16 sc_ofld_wbus_cb_fail_cnt; 19698 uint16 sc_ofld_missed_bcn_cnt; 19699 uint8 sc_ofld_last_exit_reason; 19700 uint8 sc_ofld_last_enter_fail_reason; 19701 } wl_sta_ofld_cntrs_v1_t; 19702 19703 /* ##### Ecounters v2 section ##### */ 19704 19705 #define ECOUNTERS_VERSION_2 2 19706 19707 /* Enumeration of various ecounters request types. This namespace is different from 19708 * global reportable stats namespace. 19709 */ 19710 enum { 19711 WL_ECOUNTERS_XTLV_REPORT_REQ = 1 19712 }; 19713 19714 /* Input structure for ecounters IOVAR */ 19715 typedef struct ecounters_config_request_v2 { 19716 uint16 version; /* config version */ 19717 uint16 len; /* Length of this struct including variable len */ 19718 uint16 logset; /* Set where data will go. */ 19719 uint16 reporting_period; /* reporting_period */ 19720 uint16 num_reports; /* Number of timer expirations to report on */ 19721 uint8 pad[2]; /* Reserved for future use */ 19722 uint8 ecounters_xtlvs[]; /* Statistics Types (tags) to retrieve. */ 19723 } ecounters_config_request_v2_t; 19724 19725 #define ECOUNTERS_STATS_TYPES_FLAG_SLICE 0x1 19726 #define ECOUNTERS_STATS_TYPES_FLAG_IFACE 0x2 19727 #define ECOUNTERS_STATS_TYPES_FLAG_GLOBAL 0x4 19728 #define ECOUNTERS_STATS_TYPES_DEFAULT 0x8 19729 19730 /* Slice mask bits */ 19731 #define ECOUNTERS_STATS_TYPES_SLICE_MASK_SLICE0 0x1u 19732 #define ECOUNTERS_STATS_TYPES_SLICE_MASK_SLICE1 0x2u 19733 #define ECOUNTERS_STATS_TYPES_SLICE_MASK_SLICE_SC 0x4u 19734 19735 typedef struct ecounters_stats_types_report_req { 19736 /* flags: bit0 = slice, bit1 = iface, bit2 = global, 19737 * rest reserved 19738 */ 19739 uint16 flags; 19740 uint16 if_index; /* host interface index */ 19741 uint16 slice_mask; /* bit0 = slice0, bit1=slice1, rest reserved */ 19742 uint8 pad[2]; /* padding */ 19743 uint8 stats_types_req[]; /* XTLVs of requested types */ 19744 } ecounters_stats_types_report_req_t; 19745 19746 /* ##### Ecounters_Eventmsgs v2 section ##### */ 19747 19748 #define ECOUNTERS_EVENTMSGS_VERSION_2 2 19749 19750 typedef struct event_ecounters_config_request_v2 { 19751 uint16 version; /* config version */ 19752 uint16 len; /* Length of this struct including variable len */ 19753 uint16 logset; /* Set where data will go. */ 19754 uint16 event_id; /* Event id for which this config is meant for */ 19755 uint8 flags; /* Config flags */ 19756 uint8 pad[3]; /* Reserved for future use */ 19757 uint8 ecounters_xtlvs[]; /* Statistics Types (tags) to retrieve. */ 19758 } event_ecounters_config_request_v2_t; 19759 19760 #define EVENT_ECOUNTERS_FLAGS_ADD (1 << 0) /* Add configuration for the event_id if set */ 19761 #define EVENT_ECOUNTERS_FLAGS_DEL (1 << 1) /* Delete configuration for event_id if set */ 19762 #define EVENT_ECOUNTERS_FLAGS_ANYIF (1 << 2) /* Interface filtering disable / off bit */ 19763 #define EVENT_ECOUNTERS_FLAGS_BE (1 << 3) /* If cleared report stats of 19764 * one event log buffer 19765 */ 19766 #define EVENT_ECOUNTERS_FLAGS_DEL_ALL (1 << 4) /* Delete all the configurations of 19767 * event ecounters if set 19768 */ 19769 19770 #define EVENT_ECOUNTERS_FLAGS_BUS (1 << 5) /* Add configuration for the bus events */ 19771 #define EVENT_ECOUNTERS_FLAGS_BUS_H2D (1 << 6) /* Add configuration for the bus direction 19772 * 0 - D2H and 1 - H2D 19773 */ 19774 19775 #define EVENT_ECOUNTERS_FLAGS_DELAYED_FLUSH (1 << 7) /* Flush only when half of the total size 19776 * of blocks gets filled. This is to avoid 19777 * many interrupts to host. 19778 */ 19779 #define EVENT_ECOUNTERS_FLAGS_USER (1 << 6) /* Add configuration for user defined events 19780 * Reuse the same flag as H2D 19781 */ 19782 19783 /* Ecounters suspend resume */ 19784 #define ECOUNTERS_SUSPEND_VERSION_V1 1 19785 /* To be used in populating suspend_mask and suspend_bitmap */ 19786 #define ECOUNTERS_SUSPEND_TIMER (1 << ECOUNTERS_TRIGGER_REASON_TIMER) 19787 #define ECOUNTERS_SUSPEND_EVENTS (1 << ECOUNTERS_TRIGGER_REASON_EVENTS) 19788 19789 typedef struct ecounters_suspend { 19790 uint16 version; 19791 uint16 len; 19792 uint32 suspend_bitmap; /* type of ecounter reporting to be suspended */ 19793 uint32 suspend_mask; /* type of ecounter reporting to be suspended */ 19794 } ecounters_suspend_t; 19795 19796 /* -------------- dynamic BTCOEX --------------- */ 19797 #define DCTL_TROWS 2 /**< currently practical number of rows */ 19798 #define DCTL_TROWS_MAX 4 /**< 2 extra rows RFU */ 19799 /* DYNCTL profile flags */ 19800 #define DCTL_FLAGS_DISABLED 0 /**< default value: all features disabled */ 19801 #define DCTL_FLAGS_DYNCTL (1 << 0) /**< 1 - enabled, 0 - legacy only */ 19802 #define DCTL_FLAGS_DESENSE (1 << 1) /**< auto desense is enabled */ 19803 #define DCTL_FLAGS_MSWITCH (1 << 2) /**< mode switching is enabled */ 19804 #define DCTL_FLAGS_PWRCTRL (1 << 3) /**< Tx power control is enabled */ 19805 /* for now AGG on/off is handled separately */ 19806 #define DCTL_FLAGS_TX_AGG_OFF (1 << 4) /**< TBD: allow TX agg Off */ 19807 #define DCTL_FLAGS_RX_AGG_OFF (1 << 5) /**< TBD: allow RX agg Off */ 19808 /* used for dry run testing only */ 19809 #define DCTL_FLAGS_DRYRUN (1 << 7) /**< Enables dynctl dry run mode */ 19810 #define IS_DYNCTL_ON(prof) ((prof->flags & DCTL_FLAGS_DYNCTL) != 0) 19811 #define IS_DESENSE_ON(prof) ((prof->flags & DCTL_FLAGS_DESENSE) != 0) 19812 #define IS_MSWITCH_ON(prof) ((prof->flags & DCTL_FLAGS_MSWITCH) != 0) 19813 #define IS_PWRCTRL_ON(prof) ((prof->flags & DCTL_FLAGS_PWRCTRL) != 0) 19814 /* desense level currently in use */ 19815 #define DESENSE_OFF 0 19816 #define DFLT_DESENSE_MID 12 19817 #define DFLT_DESENSE_HIGH 2 19818 19819 /** 19820 * dynctl data points(a set of btpwr & wlrssi thresholds) 19821 * for mode & desense switching 19822 */ 19823 typedef struct btc_thr_data { 19824 int8 mode; /**< used by desense sw */ 19825 int8 bt_pwr; /**< BT tx power threshold */ 19826 int8 bt_rssi; /**< BT rssi threshold */ 19827 /* wl rssi range when mode or desense change may be needed */ 19828 int8 wl_rssi_high; 19829 int8 wl_rssi_low; 19830 } btc_thr_data_t; 19831 19832 /* dynctl. profile data structure */ 19833 #define DCTL_PROFILE_VER 0x01 19834 #include <packed_section_start.h> 19835 typedef BWL_PRE_PACKED_STRUCT struct dctl_prof { 19836 uint8 version; /**< dynctl profile version */ 19837 /* dynctl profile flags bit:0 - dynctl On, bit:1 dsns On, bit:2 mode sw On, */ 19838 uint8 flags; /**< bit[6:3] reserved, bit7 - Dryrun (sim) - On */ 19839 /** wl desense levels to apply */ 19840 uint8 dflt_dsns_level; 19841 uint8 low_dsns_level; 19842 uint8 mid_dsns_level; 19843 uint8 high_dsns_level; 19844 /** mode switching hysteresis in dBm */ 19845 int8 msw_btrssi_hyster; 19846 /** default btcoex mode */ 19847 uint8 default_btc_mode; 19848 /** num of active rows in mode switching table */ 19849 uint8 msw_rows; 19850 /** num of rows in desense table */ 19851 uint8 dsns_rows; 19852 /** dynctl mode switching data table */ 19853 btc_thr_data_t msw_data[DCTL_TROWS_MAX]; 19854 /** dynctl desense switching data table */ 19855 btc_thr_data_t dsns_data[DCTL_TROWS_MAX]; 19856 } BWL_POST_PACKED_STRUCT dctl_prof_t; 19857 #include <packed_section_end.h> 19858 19859 /** dynctl status info */ 19860 #include <packed_section_start.h> 19861 typedef BWL_PRE_PACKED_STRUCT struct dynctl_status { 19862 uint8 sim_on; /**< true if simulation is On */ 19863 uint16 bt_pwr_shm; /**< BT per/task power as read from ucode */ 19864 int8 bt_pwr; /**< BT pwr extracted & converted to dBm */ 19865 int8 bt_rssi; /**< BT rssi in dBm */ 19866 int8 wl_rssi; /**< last wl rssi reading used by btcoex */ 19867 uint8 dsns_level; /**< current desense level */ 19868 uint8 btc_mode; /**< current btcoex mode */ 19869 /* add more status items if needed, pad to 4 BB if needed */ 19870 } BWL_POST_PACKED_STRUCT dynctl_status_t; 19871 #include <packed_section_end.h> 19872 19873 /** dynctl simulation (dryrun data) */ 19874 #include <packed_section_start.h> 19875 typedef BWL_PRE_PACKED_STRUCT struct dynctl_sim { 19876 uint8 sim_on; /**< simulation mode on/off */ 19877 int8 btpwr; /**< simulated BT power in dBm */ 19878 int8 btrssi; /**< simulated BT rssi in dBm */ 19879 int8 wlrssi; /**< simulated WL rssi in dBm */ 19880 } BWL_POST_PACKED_STRUCT dynctl_sim_t; 19881 /* no default structure packing */ 19882 #include <packed_section_end.h> 19883 19884 /** PTK key maintained per SCB */ 19885 #define RSN_TEMP_ENCR_KEY_LEN 16 19886 typedef struct wpa_ptk { 19887 uint8 kck[RSN_KCK_LENGTH]; /**< EAPOL-Key Key Confirmation Key (KCK) */ 19888 uint8 kek[RSN_KEK_LENGTH]; /**< EAPOL-Key Key Encryption Key (KEK) */ 19889 uint8 tk1[RSN_TEMP_ENCR_KEY_LEN]; /**< Temporal Key 1 (TK1) */ 19890 uint8 tk2[RSN_TEMP_ENCR_KEY_LEN]; /**< Temporal Key 2 (TK2) */ 19891 } wpa_ptk_t; 19892 19893 /** GTK key maintained per SCB */ 19894 typedef struct wpa_gtk { 19895 uint32 idx; 19896 uint32 key_len; 19897 uint8 key[DOT11_MAX_KEY_SIZE]; 19898 } wpa_gtk_t; 19899 19900 /** FBT Auth Response Data structure */ 19901 typedef struct wlc_fbt_auth_resp { 19902 uint8 macaddr[ETHER_ADDR_LEN]; /**< station mac address */ 19903 uint8 pad[2]; 19904 uint8 pmk_r1_name[WPA2_PMKID_LEN]; 19905 wpa_ptk_t ptk; /**< pairwise key */ 19906 wpa_gtk_t gtk; /**< group key */ 19907 uint32 ie_len; 19908 uint8 status; /**< Status of parsing FBT authentication 19909 Request in application 19910 */ 19911 uint8 ies[1]; /**< IEs contains MDIE, RSNIE, 19912 FBTIE (ANonce, SNonce,R0KH-ID, R1KH-ID) 19913 */ 19914 } wlc_fbt_auth_resp_t; 19915 19916 /** FBT Action Response frame */ 19917 typedef struct wlc_fbt_action_resp { 19918 uint16 version; /**< structure version */ 19919 uint16 length; /**< length of structure */ 19920 uint8 macaddr[ETHER_ADDR_LEN]; /**< station mac address */ 19921 uint8 data_len; /**< len of ie from Category */ 19922 uint8 data[1]; /**< data contains category, action, sta address, target ap, 19923 status code,fbt response frame body 19924 */ 19925 } wlc_fbt_action_resp_t; 19926 19927 #define MACDBG_PMAC_ADDR_INPUT_MAXNUM 16 19928 #define MACDBG_PMAC_OBJ_TYPE_LEN 8 19929 19930 typedef struct _wl_macdbg_pmac_param_t { 19931 char type[MACDBG_PMAC_OBJ_TYPE_LEN]; 19932 uint8 step; 19933 uint8 w_en; 19934 uint16 num; 19935 uint32 bitmap; 19936 uint8 addr_raw; 19937 uint8 addr_num; 19938 uint16 addr[MACDBG_PMAC_ADDR_INPUT_MAXNUM]; 19939 uint8 pad0[2]; 19940 uint32 w_val; 19941 } wl_macdbg_pmac_param_t; 19942 19943 /** IOVAR 'svmp_sampcol' parameter. Used to set and read SVMP_SAMPLE_COLLECT's setting */ 19944 typedef struct wl_svmp_sampcol_param { 19945 uint32 version; /* version */ 19946 uint8 enable; 19947 uint8 trigger_mode; /* SVMP_SAMPCOL_TRIGGER */ 19948 uint8 trigger_mode_s[2]; /* SVMP_SAMPCOL_PKTPROC */ 19949 uint8 data_samplerate; /* SVMP_SAMPCOL_SAMPLERATE */ 19950 uint8 data_sel_phy1; /* SVMP_SAMPCOL_PHY1MUX */ 19951 uint8 data_sel_rx1; /* SVMP_SAMPCOL_RX1MUX without iqCompOut */ 19952 uint8 data_sel_dualcap; /* SVMP_SAMPCOL_RX1MUX */ 19953 uint8 pack_mode; /* SVMP_SAMPCOL_PACK */ 19954 uint8 pack_order; 19955 uint8 pack_cfix_fmt; 19956 uint8 pack_1core_sel; 19957 uint16 waitcnt; 19958 uint16 caplen; 19959 uint32 buff_addr_start; /* in word-size (2-bytes) */ 19960 uint32 buff_addr_end; /* note: Tcl in byte-size, HW in vector-size (8-bytes) */ 19961 uint8 int2vasip; 19962 uint8 PAD; 19963 uint16 status; 19964 } wl_svmp_sampcol_t; 19965 19966 #define WL_SVMP_SAMPCOL_PARAMS_VERSION 1 19967 19968 enum { 19969 SVMP_SAMPCOL_TRIGGER_PKTPROC_TRANSITION = 0, 19970 SVMP_SAMPCOL_TRIGGER_FORCE_IMMEDIATE, 19971 SVMP_SAMPCOL_TRIGGER_RADAR_DET 19972 }; 19973 19974 enum { 19975 SVMP_SAMPCOL_PHY1MUX_GPIOOUT = 0, 19976 SVMP_SAMPCOL_PHY1MUX_FFT, 19977 SVMP_SAMPCOL_PHY1MUX_DBGHX, 19978 SVMP_SAMPCOL_PHY1MUX_RX1MUX 19979 }; 19980 19981 enum { 19982 SVMP_SAMPCOL_RX1MUX_FARROWOUT = 4, 19983 SVMP_SAMPCOL_RX1MUX_IQCOMPOUT, 19984 SVMP_SAMPCOL_RX1MUX_DCFILTEROUT, 19985 SVMP_SAMPCOL_RX1MUX_RXFILTEROUT, 19986 SVMP_SAMPCOL_RX1MUX_ACIFILTEROUT 19987 }; 19988 19989 enum { 19990 SVMP_SAMPCOL_SAMPLERATE_1XBW = 0, 19991 SVMP_SAMPCOL_SAMPLERATE_2XBW 19992 }; 19993 19994 enum { 19995 SVMP_SAMPCOL_PACK_DUALCAP = 0, 19996 SVMP_SAMPCOL_PACK_4CORE, 19997 SVMP_SAMPCOL_PACK_2CORE, 19998 SVMP_SAMPCOL_PACK_1CORE 19999 }; 20000 20001 enum { 20002 SVMP_SAMPCOL_PKTPROC_RESET = 0, 20003 SVMP_SAMPCOL_PKTPROC_CARRIER_SEARCH, 20004 SVMP_SAMPCOL_PKTPROC_WAIT_FOR_NB_PWR, 20005 SVMP_SAMPCOL_PKTPROC_WAIT_FOR_W1_PWR, 20006 SVMP_SAMPCOL_PKTPROC_WAIT_FOR_W2_PWR, 20007 SVMP_SAMPCOL_PKTPROC_OFDM_PHY, 20008 SVMP_SAMPCOL_PKTPROC_TIMING_SEARCH, 20009 SVMP_SAMPCOL_PKTPROC_CHAN_EST_1, 20010 SVMP_SAMPCOL_PKTPROC_LEG_SIG_DEC, 20011 SVMP_SAMPCOL_PKTPROC_SIG_DECODE_1, 20012 SVMP_SAMPCOL_PKTPROC_SIG_DECODE_2, 20013 SVMP_SAMPCOL_PKTPROC_HT_AGC, 20014 SVMP_SAMPCOL_PKTPROC_CHAN_EST_2, 20015 SVMP_SAMPCOL_PKTPROC_PAY_DECODE, 20016 SVMP_SAMPCOL_PKTPROC_DSSS_CCK_PHY, 20017 SVMP_SAMPCOL_PKTPROC_WAIT_ENERGY_DROP, 20018 SVMP_SAMPCOL_PKTPROC_WAIT_NCLKS, 20019 SVMP_SAMPCOL_PKTPROC_PAY_DEC_EXT, 20020 SVMP_SAMPCOL_PKTPROC_SIG_FAIL_DELAY, 20021 SVMP_SAMPCOL_PKTPROC_RIFS_SEARCH, 20022 SVMP_SAMPCOL_PKTPROC_BOARD_SWITCH_DIV_SEARCH, 20023 SVMP_SAMPCOL_PKTPROC_DSSS_CCK_BOARD_SWITCH_DIV_SEARCH, 20024 SVMP_SAMPCOL_PKTPROC_CHAN_EST_3, 20025 SVMP_SAMPCOL_PKTPROC_CHAN_EST_4, 20026 SVMP_SAMPCOL_PKTPROC_FINE_TIMING_SEARCH, 20027 SVMP_SAMPCOL_PKTPROC_SET_CLIP_GAIN, 20028 SVMP_SAMPCOL_PKTPROC_NAP, 20029 SVMP_SAMPCOL_PKTPROC_VHT_SIGA_DEC, 20030 SVMP_SAMPCOL_PKTPROC_VHT_SIGB_DEC, 20031 SVMP_SAMPCOL_PKTPROC_PKT_ABORT, 20032 SVMP_SAMPCOL_PKTPROC_DCCAL 20033 }; 20034 20035 /** IOVAR 'svmp_mem' parameter. Used to read/clear svmp memory */ 20036 typedef struct svmp_mem { 20037 uint32 addr; /**< offset to read svmp memory from vasip base address */ 20038 uint16 len; /**< length in count of uint16's */ 20039 uint16 val; /**< set the range of addr/len with a value */ 20040 } svmp_mem_t; 20041 20042 /** IOVAR 'mu_rate' parameter. read/set mu rate for upto four users */ 20043 #define MU_RATE_CFG_VERSION 1 20044 typedef struct mu_rate { 20045 uint16 version; /**< version of the structure as defined by MU_RATE_CFG_VERSION */ 20046 uint16 length; /**< length of entire structure */ 20047 uint8 auto_rate; /**< enable/disable auto rate */ 20048 uint8 PAD; 20049 uint16 rate_user[4]; /**< rate per each of four users, set to -1 for no change */ 20050 } mu_rate_t; 20051 20052 /** IOVAR 'mu_group' parameter. Used to set and read MU group recommendation setting */ 20053 #define WL_MU_GROUP_AUTO_COMMAND -1 20054 #define WL_MU_GROUP_PARAMS_VERSION 3 20055 #define WL_MU_GROUP_METHOD_NAMELEN 64 20056 #define WL_MU_GROUP_NGROUP_MAX 15 20057 #define WL_MU_GROUP_NUSER_MAX 4 20058 #define WL_MU_GROUP_METHOD_MIN 0 20059 #define WL_MU_GROUP_NUMBER_AUTO_MIN 1 20060 #define WL_MU_GROUP_NUMBER_AUTO_MAX 15 20061 #define WL_MU_GROUP_NUMBER_FORCED_MAX 8 20062 #define WL_MU_GROUP_METHOD_OLD 0 20063 #define WL_MU_GROUP_MODE_AUTO 0 20064 #define WL_MU_GROUP_MODE_FORCED 1 20065 #define WL_MU_GROUP_FORCED_1GROUP 1 20066 #define WL_MU_GROUP_ENTRY_EMPTY -1 20067 typedef struct mu_group { 20068 uint32 version; /* version */ 20069 int16 forced; /* forced group recommendation */ 20070 int16 forced_group_mcs; /* forced group with mcs */ 20071 int16 forced_group_num; /* forced group number */ 20072 int16 group_option[WL_MU_GROUP_NGROUP_MAX][WL_MU_GROUP_NUSER_MAX]; 20073 /* set mode for forced grouping and read mode for auto grouping */ 20074 int16 group_GID[WL_MU_GROUP_NGROUP_MAX]; 20075 int16 group_method; /* methof for VASIP group recommendation */ 20076 int16 group_number; /* requested number for VASIP group recommendation */ 20077 int16 auto_group_num; /* exact number from VASIP group recommendation */ 20078 int8 group_method_name[WL_MU_GROUP_METHOD_NAMELEN]; 20079 uint8 PAD[2]; 20080 } mu_group_t; 20081 20082 typedef struct mupkteng_sta { 20083 struct ether_addr ea; 20084 uint8 PAD[2]; 20085 int32 nrxchain; 20086 int32 idx; 20087 } mupkteng_sta_t; 20088 20089 typedef struct mupkteng_client { 20090 int32 rspec; 20091 int32 idx; 20092 int32 flen; 20093 int32 nframes; 20094 } mupkteng_client_t; 20095 20096 typedef struct mupkteng_tx { 20097 mupkteng_client_t client[8]; 20098 int32 nclients; 20099 int32 ntx; 20100 } mupkteng_tx_t; 20101 20102 /* 20103 * MU Packet engine interface. 20104 * The following two definitions will go into 20105 * wlioctl_defs.h 20106 * when wl utility changes are merged to EAGLE TOB & Trunk 20107 */ 20108 20109 #define WL_MUPKTENG_PER_TX_START 0x10 20110 #define WL_MUPKTENG_PER_TX_STOP 0x20 20111 20112 /** IOVAR 'mu_policy' parameter. Used to configure MU admission control policies */ 20113 #define WL_MU_POLICY_PARAMS_VERSION 1 20114 #define WL_MU_POLICY_SCHED_DEFAULT 60 20115 #define WL_MU_POLICY_DISABLED 0 20116 #define WL_MU_POLICY_ENABLED 1 20117 #define WL_MU_POLICY_NRX_MIN 1 20118 #define WL_MU_POLICY_NRX_MAX 2 20119 typedef struct mu_policy { 20120 uint16 version; 20121 uint16 length; 20122 uint32 sched_timer; 20123 uint32 pfmon; 20124 uint32 pfmon_gpos; 20125 uint32 samebw; 20126 uint32 nrx; 20127 uint32 max_muclients; 20128 } mu_policy_t; 20129 20130 #define WL_NAN_BAND_STR_SIZE 5 /* sizeof ("auto") */ 20131 20132 /** Definitions of different NAN Bands */ 20133 /* do not change the order */ 20134 enum { 20135 NAN_BAND_B = 0, 20136 NAN_BAND_A, 20137 NAN_BAND_AUTO, 20138 NAN_BAND_INVALID = 0xFF 20139 }; 20140 20141 /* ifdef WL11ULB */ 20142 /* ULB Mode configured via "ulb_mode" IOVAR */ 20143 enum { 20144 ULB_MODE_DISABLED = 0, 20145 ULB_MODE_STD_ALONE_MODE = 1, /* Standalone ULB Mode */ 20146 ULB_MODE_DYN_MODE = 2, /* Dynamic ULB Mode */ 20147 /* Add all other enums before this */ 20148 MAX_SUPP_ULB_MODES 20149 }; 20150 20151 /* ULB BWs configured via "ulb_bw" IOVAR during Standalone Mode Only. 20152 * Values of this enumeration are also used to specify 'Current Operational Bandwidth' 20153 * and 'Primary Operational Bandwidth' sub-fields in 'ULB Operations' field (used in 20154 * 'ULB Operations' Attribute or 'ULB Mode Switch' Attribute) 20155 */ 20156 typedef enum { 20157 ULB_BW_DISABLED = 0, 20158 ULB_BW_10MHZ = 1, /* Standalone ULB BW in 10 MHz BW */ 20159 ULB_BW_5MHZ = 2, /* Standalone ULB BW in 5 MHz BW */ 20160 ULB_BW_2P5MHZ = 3, /* Standalone ULB BW in 2.5 MHz BW */ 20161 /* Add all other enums before this */ 20162 MAX_SUPP_ULB_BW 20163 } ulb_bw_type_t; 20164 /* endif WL11ULB */ 20165 20166 #define WL_MESH_IOCTL_VERSION 1 20167 #define MESH_IOC_BUFSZ 512 /* sufficient ioc buff size for mesh */ 20168 20169 /* container for mesh ioctls & events */ 20170 typedef struct wl_mesh_ioc { 20171 uint16 version; /* interface command or event version */ 20172 uint16 id; /* mesh ioctl cmd ID */ 20173 uint16 len; /* total length of all tlv records in data[] */ 20174 uint16 pad; /* pad to be 32 bit aligment */ 20175 uint8 data[]; /* var len payload of bcm_xtlv_t type */ 20176 } wl_mesh_ioc_t; 20177 20178 enum wl_mesh_cmds { 20179 WL_MESH_CMD_ENABLE = 1, 20180 WL_MESH_CMD_JOIN = 2, 20181 WL_MESH_CMD_PEER_STATUS = 3, 20182 WL_MESH_CMD_ADD_ROUTE = 4, 20183 WL_MESH_CMD_DEL_ROUTE = 5, 20184 WL_MESH_CMD_ADD_FILTER = 6, 20185 WL_MESH_CMD_ENAB_AL_METRIC = 7, 20186 WL_MESH_CMD_START_AUTOPEER = 8 20187 }; 20188 20189 enum wl_mesh_cmd_xtlv_id { 20190 WL_MESH_XTLV_ENABLE = 1, 20191 WL_MESH_XTLV_JOIN = 2, 20192 WL_MESH_XTLV_STATUS = 3, 20193 WL_MESH_XTLV_ADD_ROUTE = 4, 20194 WL_MESH_XTLV_DEL_ROUTE = 5, 20195 WL_MESH_XTLV_ADD_FILTER = 6, 20196 WL_MESH_XTLV_ENAB_AIRLINK = 7, 20197 WL_MESH_XTLV_START_AUTOPEER = 8 20198 }; 20199 /* endif WLMESH */ 20200 20201 /* Fast BSS Transition parameter configuration */ 20202 #define FBT_PARAM_CURRENT_VERSION 0 20203 20204 typedef struct _wl_fbt_params { 20205 uint16 version; /* version of the structure 20206 * as defined by FBT_PARAM_CURRENT_VERSION 20207 */ 20208 uint16 length; /* length of the entire structure */ 20209 20210 uint16 param_type; /* type of parameter defined below */ 20211 uint16 param_len; /* length of the param_value */ 20212 uint8 param_value[1]; /* variable length */ 20213 } wl_fbt_params_t; 20214 20215 #define WL_FBT_PARAM_TYPE_RSNIE 0 20216 #define WL_FBT_PARAM_TYPE_FTIE 0x1 20217 #define WL_FBT_PARAM_TYPE_SNONCE 0x2 20218 #define WL_FBT_PARAM_TYPE_MDE 0x3 20219 #define WL_FBT_PARAM_TYPE_PMK_R0_NAME 0x4 20220 #define WL_FBT_PARAM_TYPE_R0_KHID 0x5 20221 #define WL_FBT_PARAM_TYPE_R1_KHID 0x6 20222 #define WL_FBT_PARAM_TYPE_FIRST_INVALID 0x7 20223 20224 /* Assoc Mgr commands for fine control of assoc */ 20225 #define WL_ASSOC_MGR_CURRENT_VERSION 0x0 20226 20227 typedef struct { 20228 uint16 version; /* version of the structure as 20229 * defined by WL_ASSOC_MGR_CURRENT_VERSION 20230 */ 20231 uint16 length; /* length of the entire structure */ 20232 20233 uint16 cmd; 20234 uint16 params; 20235 } wl_assoc_mgr_cmd_t; 20236 20237 enum wl_sae_auth_xtlv_id { 20238 WL_SAE_AUTH_XTLV_CONTAINER = 0xa1, 20239 WL_SAE_AUTH_XTLV_BSSID = 0xa2, 20240 WL_SAE_AUTH_XTLV_CYCLIC_GROUP = 0xa3, 20241 WL_SAE_AUTH_XTLV_SCALAR = 0xa4, 20242 WL_SAE_AUTH_XTLV_ELEMENTS = 0xa5, 20243 WL_SAE_AUTH_XTLV_ANTI_CLOGGING = 0xa6, 20244 WL_SAE_AUTH_XTLV_SEND_CONFIRM = 0xa7, 20245 WL_SAE_AUTH_XTLV_CONFIRM = 0xa8, 20246 WL_SAE_AUTH_XTLV_STATUS = 0xa9, 20247 WL_SAE_AUTH_XTLV_LAST = 0xac 20248 }; 20249 20250 #define WL_ASSOC_MGR_CMD_PAUSE_ON_EVT 0 /* have assoc pause on certain events */ 20251 #define WL_ASSOC_MGR_CMD_ABORT_ASSOC 1 20252 #define WL_ASSOC_MGR_CMD_SET_SAE_FRAME 2 20253 #define WL_ASSOC_MGR_CMD_SEND_AUTH 3 20254 20255 #define WL_ASSOC_MGR_PARAMS_EVENT_NONE 0 /* use this to resume as well as clear */ 20256 #define WL_ASSOC_MGR_PARAMS_PAUSE_EVENT_AUTH_RESP 1 20257 20258 #define WL_WINVER_STRUCT_VER_1 (1) 20259 20260 typedef struct wl_winver { 20261 20262 /* Version and length of this structure. Length includes all fields in wl_winver_t */ 20263 uint16 struct_version; 20264 uint16 struct_length; 20265 20266 /* Windows operating system version info (Microsoft provided) */ 20267 struct { 20268 uint32 major_ver; 20269 uint32 minor_ver; 20270 uint32 build; 20271 } os_runtime; 20272 20273 /* NDIS runtime version (Microsoft provided) */ 20274 struct { 20275 uint16 major_ver; 20276 uint16 minor_ver; 20277 } ndis_runtime; 20278 20279 /* NDIS Driver version (Broadcom provided) */ 20280 struct { 20281 uint16 major_ver; 20282 uint16 minor_ver; 20283 } ndis_driver; 20284 20285 /* WDI Upper Edge (UE) Driver version (Microsoft provided) */ 20286 struct { 20287 uint8 major_ver; 20288 uint8 minor_ver; 20289 uint8 suffix; 20290 } wdi_ue; 20291 20292 /* WDI Lower Edge (LE) Driver version (Broadcom provided) */ 20293 struct { 20294 uint8 major_ver; 20295 uint8 minor_ver; 20296 uint8 suffix; 20297 } wdi_le; 20298 uint8 PAD[2]; 20299 } wl_winver_t; 20300 20301 /* defined(WLRCC) || defined(ROAM_CHANNEL_CACHE) */ 20302 #define MAX_ROAM_CHANNEL 20 20303 typedef struct { 20304 int32 n; 20305 chanspec_t channels[MAX_ROAM_CHANNEL]; 20306 } wl_roam_channel_list_t; 20307 /* endif RCC || ROAM_CHANNEL_CACHE */ 20308 20309 /* values for IOV_MFP arg */ 20310 enum { 20311 WL_MFP_NONE = 0, 20312 WL_MFP_CAPABLE, 20313 WL_MFP_REQUIRED 20314 }; 20315 20316 typedef enum { 20317 CHANSW_UNKNOWN = 0, /* channel switch due to unknown reason */ 20318 CHANSW_SCAN = 1, /* channel switch due to scan */ 20319 CHANSW_PHYCAL = 2, /* channel switch due to phy calibration */ 20320 CHANSW_INIT = 3, /* channel set at WLC up time */ 20321 CHANSW_ASSOC = 4, /* channel switch due to association */ 20322 CHANSW_ROAM = 5, /* channel switch due to roam */ 20323 CHANSW_MCHAN = 6, /* channel switch triggered by mchan module */ 20324 CHANSW_IOVAR = 7, /* channel switch due to IOVAR */ 20325 CHANSW_CSA_DFS = 8, /* channel switch due to chan switch announcement from AP */ 20326 CHANSW_APCS = 9, /* Channel switch from AP channel select module */ 20327 20328 #ifdef WLAWDL 20329 CHANSW_AWDL = 10, /* channel switch due to AWDL */ 20330 #endif /* WLAWDL */ 20331 20332 CHANSW_FBT = 11, /* Channel switch from FBT module for action frame response */ 20333 CHANSW_UPDBW = 12, /* channel switch at update bandwidth */ 20334 CHANSW_ULB = 13, /* channel switch at ULB */ 20335 CHANSW_LAST = 14 /* last channel switch reason */ 20336 } chansw_reason_t; 20337 20338 /* 20339 * WOWL unassociated mode power svae pattern. 20340 */ 20341 typedef struct wowl_radio_duty_cycle { 20342 uint16 wake_interval; 20343 uint16 sleep_interval; 20344 } wowl_radio_duty_cycle_t; 20345 20346 typedef struct nd_ra_ol_limits { 20347 uint16 version; /* version of the iovar buffer */ 20348 uint16 type; /* type of data provided */ 20349 uint16 length; /* length of the entire structure */ 20350 uint16 pad1; /* pad union to 4 byte boundary */ 20351 union { 20352 struct { 20353 uint16 min_time; /* seconds, min time for RA offload hold */ 20354 uint16 lifetime_percent; 20355 /* percent, lifetime percentage for offload hold time */ 20356 } lifetime_relative; 20357 struct { 20358 uint16 hold_time; /* seconds, RA offload hold time */ 20359 uint16 pad2; /* unused */ 20360 } fixed; 20361 } limits; 20362 } nd_ra_ol_limits_t; 20363 20364 #define ND_RA_OL_LIMITS_VER 1 20365 20366 /* nd_ra_ol_limits sub-types */ 20367 #define ND_RA_OL_LIMITS_REL_TYPE 0 /* relative, percent of RA lifetime */ 20368 #define ND_RA_OL_LIMITS_FIXED_TYPE 1 /* fixed time */ 20369 20370 /* buffer lengths for the different nd_ra_ol_limits types */ 20371 #define ND_RA_OL_LIMITS_REL_TYPE_LEN 12 20372 #define ND_RA_OL_LIMITS_FIXED_TYPE_LEN 10 20373 20374 /* 20375 * Temperature Throttling control mode 20376 */ 20377 typedef struct wl_temp_control { 20378 uint8 enable; 20379 uint8 PAD; 20380 uint16 control_bit; 20381 } wl_temp_control_t; 20382 20383 /* SensorHub Interworking mode */ 20384 20385 #define SHUB_CONTROL_VERSION 1 20386 #define SHUB_CONTROL_LEN 12 20387 20388 typedef struct { 20389 uint16 verison; 20390 uint16 length; 20391 uint16 cmd; 20392 uint16 op_mode; 20393 uint16 interval; 20394 uint16 enable; 20395 } shub_control_t; 20396 20397 /* WLC_MAJOR_VER <= 5 */ 20398 /* Data structures for non-TLV format */ 20399 20400 /* Data structures for rsdb caps */ 20401 /* 20402 * The flags field of the rsdb_caps_response is designed to be 20403 * a Bit Mask. As of now only Bit 0 is used as mentioned below. 20404 */ 20405 20406 /* Bit-0 in flags is used to indicate if the cores can operate synchronously 20407 * i.e either as 2x2 MIMO or 2(1x1 SISO). This is true only for 4349 variants 20408 * 0 - device can operate only in rsdb mode (eg: 4364) 20409 * 1 - device can operate in both rsdb and mimo (eg : 4359 variants) 20410 */ 20411 20412 #define WL_RSDB_CAPS_VER 2 20413 #define SYNCHRONOUS_OPERATION_TRUE (1 << 0) 20414 #define WL_RSDB_CAPS_FIXED_LEN OFFSETOF(rsdb_caps_response_t, num_chains) 20415 20416 typedef struct rsdb_caps_response { 20417 uint8 ver; /* Version */ 20418 uint8 len; /* length of this structure excluding ver and len */ 20419 uint8 rsdb; /* TRUE for rsdb chip */ 20420 uint8 num_of_cores; /* no of d11 cores */ 20421 uint16 flags; /* Flags to indicate various capabilities */ 20422 uint8 num_chains[1]; /* Tx/Rx chains for each core */ 20423 } rsdb_caps_response_t; 20424 20425 /* Data structures for rsdb bands */ 20426 20427 #define WL_RSDB_BANDS_VER 2 20428 #define WL_RSDB_BANDS_FIXED_LEN OFFSETOF(rsdb_bands_t, band) 20429 20430 typedef struct rsdb_bands 20431 { 20432 uint8 ver; 20433 uint8 len; 20434 uint16 num_cores; /* num of D11 cores */ 20435 int16 band[1]; /* The band operating on each of the d11 cores */ 20436 } rsdb_bands_t; 20437 20438 /* rsdb config */ 20439 20440 #define WL_RSDB_CONFIG_VER 3 20441 #define ALLOW_SIB_PARALLEL_SCAN (1 << 0) 20442 #define MAX_BANDS 2 20443 20444 #define WL_RSDB_CONFIG_LEN sizeof(rsdb_config_t) 20445 20446 typedef uint8 rsdb_opmode_t; 20447 typedef uint32 rsdb_flags_t; 20448 20449 typedef enum rsdb_modes { 20450 WLC_SDB_MODE_NOSDB_MAIN = 1, /* 2X2 or MIMO mode (applicable only for 4355) */ 20451 WLC_SDB_MODE_NOSDB_AUX = 2, 20452 WLC_SDB_MODE_SDB_MAIN = 3, /* This is RSDB mode(default) applicable only for 4364 */ 20453 WLC_SDB_MODE_SDB_AUX = 4, 20454 WLC_SDB_MODE_SDB_AUTO = 5, /* Same as WLC_RSDB_MODE_RSDB(1+1) mode above */ 20455 } rsdb_modes_t; 20456 20457 typedef struct rsdb_config { 20458 uint8 ver; 20459 uint8 len; 20460 uint16 reserved; 20461 rsdb_opmode_t non_infra_mode; 20462 rsdb_opmode_t infra_mode[MAX_BANDS]; 20463 rsdb_flags_t flags[MAX_BANDS]; 20464 rsdb_opmode_t current_mode; /* Valid only in GET, returns the current mode */ 20465 uint8 pad[3]; 20466 } rsdb_config_t; 20467 20468 /* WLC_MAJOR_VER > =5 */ 20469 /* TLV definitions and data structures for rsdb subcmds */ 20470 20471 enum wl_rsdb_cmd_ids { 20472 /* RSDB ioctls */ 20473 WL_RSDB_CMD_VER = 0, 20474 WL_RSDB_CMD_CAPS = 1, 20475 WL_RSDB_CMD_BANDS = 2, 20476 WL_RSDB_CMD_CONFIG = 3, 20477 /* Add before this !! */ 20478 WL_RSDB_CMD_LAST 20479 }; 20480 #define WL_RSDB_IOV_VERSION 0x1 20481 20482 typedef struct rsdb_caps_response_v1 { 20483 uint8 rsdb; /* TRUE for rsdb chip */ 20484 uint8 num_of_cores; /* no of d11 cores */ 20485 uint16 flags; /* Flags to indicate various capabilities */ 20486 uint8 num_chains[MAX_NUM_D11CORES]; /* Tx/Rx chains for each core */ 20487 uint8 band_cap[MAX_NUM_D11CORES]; /* band cap bitmask per slice */ 20488 } rsdb_caps_response_v1_t; 20489 20490 typedef struct rsdb_bands_v1 20491 { 20492 uint8 num_cores; /* num of D11 cores */ 20493 uint8 pad; /* padding bytes for 4 byte alignment */ 20494 int8 band[MAX_NUM_D11CORES]; /* The band operating on each of the d11 cores */ 20495 } rsdb_bands_v1_t; 20496 20497 typedef struct rsdb_config_xtlv { 20498 rsdb_opmode_t reserved1; /* Non_infra mode is no more applicable */ 20499 rsdb_opmode_t infra_mode[MAX_BANDS]; /* Target mode for Infra association */ 20500 uint8 pad; /* pad bytes for 4 byte alignment */ 20501 rsdb_flags_t flags[MAX_BANDS]; 20502 rsdb_opmode_t current_mode; /* GET only; has current mode of operation */ 20503 uint8 pad1[3]; 20504 } rsdb_config_xtlv_t; 20505 20506 /* Definitions for slot_bss chanseq iovar */ 20507 #define WL_SLOT_BSS_VERSION 1 20508 20509 /* critical slots max size */ 20510 #define WL_SLOTTED_BSS_CS_BMP_CFG_MAX_SZ 128 /* arbitrary */ 20511 20512 enum wl_slotted_bss_cmd_id { 20513 WL_SLOTTED_BSS_CMD_VER = 0, 20514 WL_SLOTTED_BSS_CMD_CHANSEQ = 1, 20515 WL_SLOTTED_BSS_CMD_CS_BMP = 2 /* critical slots bitmap */ 20516 }; 20517 20518 typedef uint16 chan_seq_type_t; 20519 enum chan_seq_type { 20520 CHAN_SEQ_TYPE_AWDL = 1, 20521 CHAN_SEQ_TYPE_SLICE = 2, 20522 CHAN_SEQ_TYPE_NAN = 3, /* NAN avail XTLV */ 20523 CHAN_SEQ_TYPE_NANHO = 4 /* NANHO channel schedule XTLV */ 20524 }; 20525 20526 typedef uint8 sched_flag_t; 20527 enum sched_flag { 20528 NO_SDB_SCHED = 0x1, 20529 SDB_TDM_SCHED = 0x2, 20530 SDB_SPLIT_BAND_SCHED = 0x4, /* default mode for 4357 */ 20531 MAIN_ONLY = 0x8, 20532 AUX_ONLY = 0x10, 20533 SDB_DUAL_TIME = (MAIN_ONLY | AUX_ONLY), 20534 NO_SDB_MAIN_ONLY = (NO_SDB_SCHED | MAIN_ONLY), /* default mode for 4364 */ 20535 SDB_TDM_SCHED_MAIN = (SDB_TDM_SCHED | MAIN_ONLY), 20536 SDB_TDM_SCHED_AUX = (SDB_TDM_SCHED | AUX_ONLY), 20537 SDB_TDM_SCHED_DUAL_TIME = (SDB_TDM_SCHED | SDB_DUAL_TIME), 20538 SDB_SPLIT_BAND_SCHED_DUAL_TIME = (SDB_SPLIT_BAND_SCHED | SDB_DUAL_TIME) 20539 }; 20540 20541 typedef struct chan_seq_tlv_data { 20542 uint32 flags; 20543 uint8 data[1]; 20544 } chan_seq_tlv_data_t; 20545 20546 typedef struct chan_seq_tlv { 20547 chan_seq_type_t type; 20548 uint16 len; 20549 chan_seq_tlv_data_t chanseq_data[1]; 20550 } chan_seq_tlv_t; 20551 20552 typedef struct sb_channel_sequence { 20553 sched_flag_t sched_flags; /* (sdb-tdm or sdb-sb or Dual-Time) */ 20554 uint8 num_seq; /* number of chan_seq_tlv following */ 20555 uint16 pad; 20556 chan_seq_tlv_t seq[1]; 20557 } sb_channel_sequence_t; 20558 20559 typedef struct slice_chan_seq { 20560 uint8 slice_index; /* 0(Main) or 1 (Aux) */ 20561 uint8 num_chanspecs; 20562 uint8 dur; 20563 uint8 pad; 20564 chanspec_t chanspecs[1]; 20565 } slice_chan_seq_t; 20566 20567 #define SLOT_BSS_SLICE_TYPE_DUR_MAX_RANGE 2u 20568 #define SLOTTED_BSS_AGGR_EN (1 << 0) /* Bitmap of mode */ 20569 #define SLOTTED_BSS_AGGR_LIMIT_DUR (1 << 1) /* Jira 49554 */ 20570 #define SLOTTED_BSS_HE_1024_QAM_SUPPORT (1 << 2) /* MCS10-11 Support */ 20571 20572 #define WL_SLICE_CHAN_SEQ_FIXED_LEN OFFSETOF(slice_chan_seq_t, chanspecs) 20573 /* Definitions for slotted_bss stats */ 20574 #define SBSS_STATS_VERSION 1 20575 #define SBSS_STATS_CURRENT_VERSION SBSS_STATS_VERSION 20576 20577 #define SBSS_MAX_CHAN_STATS 4 20578 20579 typedef struct sbss_core_stats { 20580 uint32 sb_slot_start; 20581 uint32 sb_slot_end; 20582 uint32 sb_slot_skip; 20583 uint32 mismatch_count; 20584 } sbss_core_stats_t; 20585 20586 typedef struct sbss_chan_stats { 20587 chanspec_t chanspec; 20588 uint32 slot_start; 20589 uint32 slot_end; 20590 uint32 slot_skip; 20591 } sbss_chan_stats_t; 20592 20593 typedef struct sbss_stats_v1 { 20594 uint16 version; 20595 uint16 length; 20596 sbss_core_stats_t corestats[MAX_NUM_D11CORES]; 20597 sbss_chan_stats_t sbss_chanstats[MAX_NUM_D11CORES][SBSS_MAX_CHAN_STATS]; 20598 } sbss_stats_t; 20599 20600 /* slotted bss critical slots */ 20601 typedef struct wl_sbss_cs_bmp_s { 20602 uint8 bitmap_len; 20603 uint8 pad[3]; 20604 uint8 bitmap[]; 20605 } wl_sbss_cs_bmp_t; 20606 20607 typedef struct sim_pm_params { 20608 uint32 enabled; 20609 uint16 cycle; 20610 uint16 up; 20611 } sim_pm_params_t; 20612 20613 /* Digital napping status */ 20614 #define WL_NAP_STATUS_VERSION_1 1 20615 typedef struct wl_nap_status_v1 { 20616 uint16 version; /* structure version */ 20617 uint16 len; /* length of returned data */ 20618 uint16 fw_status; /* bitmask of FW disable reasons */ 20619 uint8 hw_status; /* bitmask for actual HW state info */ 20620 uint8 slice_index; /* which slice this represents */ 20621 uint32 total_disable_dur; /* total time (ms) disabled for fw_status */ 20622 } wl_nap_status_v1_t; 20623 20624 /* Bits for fw_status */ 20625 #define NAP_DISABLED_HOST 0x0001 /* Host has disabled through nap_enable */ 20626 #define NAP_DISABLED_RSSI 0x0002 /* Disabled because of nap_rssi_threshold */ 20627 #define NAP_DISABLED_SCAN 0x0004 /* Disabled because of scan */ 20628 #define NAP_DISABLED_ASSOC 0x0008 /* Disabled because of association */ 20629 #define NAP_DISABLED_LTE 0x0010 /* Disabled because of LTE */ 20630 #define NAP_DISABLED_ACI 0x0020 /* Disabled because of ACI mitigation */ 20631 #define NAP_DISABLED_SEQ_RANGE 0x0040 /* Disabled during SEQ Ranging */ 20632 #define NAP_DISABLED_CHANSWITCH 0x0080 /* Disabled during channel switch */ 20633 20634 /* Bits for hw_status */ 20635 #define NAP_HWCFG 0x01 /* State of NAP config bit in phy HW */ 20636 #define NAP_NOCLK 0x80 /* No clock to read HW (e.g. core down) */ 20637 20638 /* ifdef WL_NATOE */ 20639 #define WL_NATOE_IOCTL_VERSION 1 20640 #define WL_NATOE_IOC_BUFSZ 512 /* sufficient ioc buff size for natoe */ 20641 #define WL_NATOE_DBG_STATS_BUFSZ 2048 20642 #define NATOE_FLAGS_ENAB_MASK 0x1 20643 #define NATOE_FLAGS_ACTIVE_MASK 0x2 20644 #define NATOE_FLAGS_PUBNW_MASK 0x4 20645 #define NATOE_FLAGS_PVTNW_MASK 0x8 20646 #define NATOE_FLAGS_ENAB_SHFT_MASK 0 20647 #define NATOE_FLAGS_ACTIVE_SHFT_MASK 1 20648 #define NATOE_FLAGS_PUBNW_SHFT_MASK 2 20649 #define NATOE_FLAGS_PVTNW_SHFT_MASK 3 20650 #define NATOE_FLAGS_PUB_NW_UP (1 << NATOE_FLAGS_PUBNW_SHFT_MASK) 20651 #define NATOE_FLAGS_PVT_NW_UP (1 << NATOE_FLAGS_PVTNW_SHFT_MASK) 20652 20653 #define PCIE_FRWDPKT_STATS_VERSION 1 20654 20655 /* Module version is 1 for IGUANA */ 20656 #define WL_NATOE_MODULE_VER_1 1 20657 /* Module version is 2 for Lemur */ 20658 #define WL_NATOE_MODULE_VER_2 2 20659 20660 /* WL_NATOE_CMD_MOD_VER */ 20661 typedef uint16 wl_natoe_ver_t; 20662 /* config natoe STA and AP IP's structure */ 20663 typedef struct { 20664 uint32 sta_ip; 20665 uint32 sta_netmask; 20666 uint32 sta_router_ip; 20667 uint32 sta_dnsip; 20668 uint32 ap_ip; 20669 uint32 ap_netmask; 20670 } wl_natoe_config_ips_t; 20671 20672 /* natoe ports config structure */ 20673 typedef struct { 20674 uint16 start_port_num; 20675 uint16 no_of_ports; 20676 } wl_natoe_ports_config_t; 20677 20678 /* natoe ports exception info */ 20679 typedef struct { 20680 uint16 sta_port_num; 20681 uint16 dst_port_num; /* for SIP type protocol, dst_port_num info can be ignored by FW */ 20682 uint32 ip; /* for SIP ip is APcli_ip and for port clash it is dst_ip */ 20683 uint8 entry_type; /* Create/Destroy */ 20684 uint8 pad[3]; 20685 } wl_natoe_exception_port_t; 20686 20687 /* container for natoe ioctls & events */ 20688 typedef struct wl_natoe_ioc { 20689 uint16 version; /* interface command or event version */ 20690 uint16 id; /* natoe ioctl cmd ID */ 20691 uint16 len; /* total length of all tlv records in data[] */ 20692 uint16 pad; /* pad to be 32 bit aligment */ 20693 uint8 data[]; /* var len payload of bcm_xtlv_t type */ 20694 } wl_natoe_ioc_t; 20695 20696 typedef struct wl_natoe_pool_stats_v1 { 20697 /* For debug purposes */ 20698 uint16 poolreorg_cnt; 20699 uint16 poolrevert_cnt; 20700 uint16 txfrag_state; 20701 uint16 rxfrag_state; 20702 uint16 txfrag_plen; 20703 uint16 rxfrag_plen; 20704 uint16 tx_pavail; 20705 uint16 rx_pavail; 20706 uint16 txmin_bkup_bufs; 20707 uint16 rxmin_bkup_bufs; 20708 uint16 pktpool_sbuf_alloc; 20709 uint16 pktpool_plen; 20710 uint16 pktpool_pavail; 20711 /* Peak shared buffer count in all iterations */ 20712 uint16 sbuf_peak; 20713 /* Peak shared buffer count in current D3 iteration */ 20714 uint16 sbuf_peak_cur; 20715 } wl_natoe_pool_stats_v1_t; 20716 20717 typedef struct wl_natoe_arp_entry_v1 { 20718 struct ipv4_addr ip; 20719 struct ether_addr mac_addr; 20720 uint8 lifetime; 20721 uint8 flags; 20722 } wl_natoe_arp_entry_v1_t; 20723 20724 typedef struct wl_natoe_dbg_arp_tbl_info_v1 { 20725 uint8 valid_arp_entries; 20726 uint8 PAD[3]; 20727 wl_natoe_arp_entry_v1_t arp_ent[]; 20728 } wl_natoe_dbg_arp_tbl_info_v1_t; 20729 20730 typedef struct wl_natoe_skip_port_entry_v1 { 20731 struct ipv4_addr srcip; 20732 uint16 src_port; 20733 uint16 lifetime; 20734 } wl_natoe_skip_port_entry_v1_t; 20735 20736 typedef struct wl_natoe_skip_port_info_v1 { 20737 uint8 valid_entries; 20738 uint8 PAD[3]; 20739 wl_natoe_skip_port_entry_v1_t skip_port_ent[]; 20740 } wl_natoe_skip_port_info_v1_t; 20741 20742 typedef struct wl_natoe_dbg_stats_v1 { 20743 uint16 active_nat_entries; 20744 uint16 active_dns_entries; 20745 uint16 active_icmp_entries; 20746 uint16 valid_arp_entries; 20747 uint16 prev_nat_entries; 20748 uint16 prev_dns_entries; 20749 uint16 tcp_fast_reclaim_cnt; 20750 uint16 mcast_packets; 20751 uint16 bcast_packets; 20752 uint16 port_commands_rcvd; 20753 uint16 unsupported_prot; 20754 uint16 arp_req_sent; 20755 uint16 arp_rsp_rcvd; 20756 uint16 non_ether_frames; 20757 uint16 port_alloc_fail; 20758 uint16 srcip_tbl_full; 20759 uint16 dstip_tbl_full; 20760 uint16 nat_tbl_full; 20761 uint16 icmp_error_cnt; 20762 uint16 pkt_drops_resource; 20763 uint32 frwd_nat_pkt_cnt; 20764 uint32 reverse_nat_pkt_cnt; 20765 uint16 pub_nw_chspec; 20766 uint16 pvt_nw_chspec; 20767 uint8 pubnw_cfg_idx; 20768 uint8 pvtnw_cfg_idx; 20769 uint8 pubnw_cfg_ID; 20770 uint8 pvtnw_cfg_ID; 20771 uint16 natoe_flags; 20772 } wl_natoe_dbg_stats_v1_t; 20773 20774 typedef struct wl_natoe_exception_port_inf_v1 { 20775 uint16 except_bmap_size; 20776 uint8 port_except_bmap[]; 20777 } wl_natoe_exception_port_inf_v1_t; 20778 20779 typedef struct wl_natoe_dstnat_entry_v1 { 20780 struct ipv4_addr clientip; 20781 struct ether_addr client_mac_addr; 20782 uint16 client_listenport; 20783 uint8 opcode; 20784 } wl_natoe_dstnat_entry_v1_t; 20785 20786 typedef struct wl_pcie_frwd_stats_v1 { 20787 uint16 version; 20788 uint16 len; 20789 uint16 frwd_txfrag_q_cnt; /* no. of txfrags in frwd_txfrag_list */ 20790 /* no. of outstanding lbufs in txpath on if0/ifx */ 20791 uint16 tx_frwd_n_lb_if0; 20792 uint16 tx_frwd_n_lb_ifx; 20793 /* no. of outstanding lfrags in txpath on if0/ifx */ 20794 uint16 tx_frwd_n_lf_if0; 20795 uint16 tx_frwd_n_lf_ifx; 20796 /* no. of pending frwd pkts dropped upon d3 entry */ 20797 uint16 tx_frwd_d3_drop_cnt; 20798 /* Total no. of lbufs frwded in txpath on if0/ifx */ 20799 uint32 tx_frwd_n_lb_if0_cnt; 20800 uint32 tx_frwd_n_lb_ifx_cnt; 20801 /* Total no. of lfrags frwded in txpath on if0/ifx */ 20802 uint32 tx_frwd_n_lf_if0_cnt; 20803 uint32 tx_frwd_n_lf_ifx_cnt; 20804 uint32 frwd_tx_drop_thr_cnt; /* no. of pkts dropped due to txfrag threshold */ 20805 uint32 frwd_tx_drop_err_cnt; /* no. of pkts dropped due to txfrags not avail / errors */ 20806 } wl_pcie_frwd_stats_v1_t; 20807 20808 enum wl_natoe_cmds { 20809 WL_NATOE_CMD_MOD_VER = 0, 20810 WL_NATOE_CMD_ENABLE = 1, 20811 WL_NATOE_CMD_CONFIG_IPS = 2, 20812 WL_NATOE_CMD_CONFIG_PORTS = 3, 20813 WL_NATOE_CMD_DBG_STATS = 4, 20814 WL_NATOE_CMD_EXCEPTION_PORT = 5, 20815 WL_NATOE_CMD_SKIP_PORT = 6, 20816 WL_NATOE_CMD_TBL_CNT = 7, 20817 WL_NATOE_CMD_CONFIG_DSTNAT = 8, 20818 WL_NATOE_CMD_CTRL = 9 20819 }; 20820 20821 enum wl_natoe_cmd_xtlv_id { 20822 WL_NATOE_XTLV_MOD_VER = 0, 20823 WL_NATOE_XTLV_ENABLE = 1, 20824 WL_NATOE_XTLV_CONFIG_IPS = 2, 20825 WL_NATOE_XTLV_CONFIG_PORTS = 3, 20826 WL_NATOE_XTLV_DBG_STATS = 4, 20827 WL_NATOE_XTLV_EXCEPTION_PORT = 5, 20828 WL_NATOE_XTLV_SKIP_PORT = 6, 20829 WL_NATOE_XTLV_TBL_CNT = 7, 20830 WL_NATOE_XTLV_ARP_TBL = 8, 20831 WL_NATOE_XTLV_POOLREORG = 9, 20832 WL_NATOE_XTLV_CONFIG_DSTNAT = 10, 20833 WL_NATOE_XTLV_CTRL = 11 20834 }; 20835 20836 /* endif WL_NATOE */ 20837 20838 enum wl_idauth_cmd_ids { 20839 WL_IDAUTH_CMD_CONFIG = 1, 20840 WL_IDAUTH_CMD_PEER_INFO = 2, 20841 WL_IDAUTH_CMD_COUNTERS = 3, 20842 WL_IDAUTH_CMD_LAST 20843 }; 20844 enum wl_idauth_xtlv_id { 20845 WL_IDAUTH_XTLV_AUTH_ENAB = 0x1, 20846 WL_IDAUTH_XTLV_GTK_ROTATION = 0x2, 20847 WL_IDAUTH_XTLV_EAPOL_COUNT = 0x3, 20848 WL_IDAUTH_XTLV_EAPOL_INTRVL = 0x4, 20849 WL_IDAUTH_XTLV_BLKLIST_COUNT = 0x5, 20850 WL_IDAUTH_XTLV_BLKLIST_AGE = 0x6, 20851 WL_IDAUTH_XTLV_PEERS_INFO = 0x7, 20852 WL_IDAUTH_XTLV_COUNTERS = 0x8 20853 }; 20854 enum wl_idauth_stats { 20855 WL_AUTH_PEER_STATE_AUTHORISED = 0x01, 20856 WL_AUTH_PEER_STATE_BLACKLISTED = 0x02, 20857 WL_AUTH_PEER_STATE_4WAY_HS_ONGOING = 0x03, 20858 WL_AUTH_PEER_STATE_LAST 20859 }; 20860 typedef struct { 20861 uint16 state; /* Peer State: Authorised or Blacklisted */ 20862 struct ether_addr peer_addr; /* peer Address */ 20863 uint32 blklist_end_time; /* Time of blacklist end */ 20864 } auth_peer_t; 20865 typedef struct wl_idauth_counters { 20866 uint32 auth_reqs; /* No of auth req recvd */ 20867 uint32 mic_fail; /* No of mic fails */ 20868 uint32 four_way_hs_fail; /* No of 4-way handshake fails */ 20869 } wl_idauth_counters_t; 20870 20871 #define WLC_UTRACE_LEN (1024u * 4u) // default length 20872 #define WLC_UTRACE_LEN_AUX (1024u * 3u) // reduced length to fit smaller AUX BM 20873 #define WLC_UTRACE_LEN_SC (1024u * 3u) // reduced length to fit smaller Scan core BM 20874 20875 #define WLC_UTRACE_READ_END 0 20876 #define WLC_UTRACE_MORE_DATA 1 20877 20878 typedef struct wl_utrace_capture_args_v1 { 20879 uint32 length; 20880 uint32 flag; 20881 } wl_utrace_capture_args_v1_t; 20882 20883 #define UTRACE_CAPTURE_VER_2 2 20884 typedef struct wl_utrace_capture_args_v2 { 20885 /* structure control */ 20886 uint16 version; /**< structure version */ 20887 uint16 length; /**< length of the response */ 20888 uint32 flag; /* Indicates if there is more data or not */ 20889 } wl_utrace_capture_args_v2_t; 20890 20891 /* Signal read end. */ 20892 #define WLC_REGVAL_READ_END 0 20893 /* Signal more data pending. */ 20894 #define WLC_REGVAL_MORE_DATA 1 20895 /* Internal read state. */ 20896 #define WLC_REGVAL_READ_CONTINUE 2 20897 20898 #define WLC_REGVAL_DUMP_PHYREG 0 20899 #define WLC_REGVAL_DUMP_RADREG 1 20900 20901 #define PHYREGVAL_CAPTURE_BUFFER_LEN 2048 20902 20903 typedef struct wl_regval_capture_args { 20904 uint32 control_flag; /* Carries status information. */ 20905 } wl_regval_capture_args_t; 20906 20907 /* XTLV IDs for the Health Check "hc" iovar top level container */ 20908 enum { 20909 WL_HC_XTLV_ID_CAT_HC = 1, /* category for HC as a whole */ 20910 WL_HC_XTLV_ID_CAT_DATAPATH_TX = 2, /* Datapath Tx */ 20911 WL_HC_XTLV_ID_CAT_DATAPATH_RX = 3, /* Datapath Rx */ 20912 WL_HC_XTLV_ID_CAT_SCAN = 4, /* Scan */ 20913 WL_HC_XTLV_ID_CAT_EVENTMASK = 5, /* Health Check event mask. */ 20914 }; 20915 20916 /* Health Check: Common XTLV IDs for sub-elements in the top level container 20917 * Number starts at 0x8000 to be out of the way for category specific IDs. 20918 */ 20919 enum { 20920 WL_HC_XTLV_ID_ERR = 0x8000, /* for sub-command err return */ 20921 WL_HC_XTLV_ID_IDLIST = 0x8001, /* container for uint16 IDs */ 20922 }; 20923 20924 /* Health Check: Datapath TX IDs */ 20925 enum { 20926 WL_HC_TX_XTLV_ID_VAL_STALL_THRESHOLD = 1, /* stall_threshold */ 20927 WL_HC_TX_XTLV_ID_VAL_STALL_SAMPLE_SIZE = 2, /* stall_sample_size */ 20928 WL_HC_TX_XTLV_ID_VAL_STALL_TIMEOUT = 3, /* stall_timeout */ 20929 WL_HC_TX_XTLV_ID_VAL_STALL_FORCE = 4, /* stall_force */ 20930 WL_HC_TX_XTLV_ID_VAL_STALL_EXCLUDE = 5, /* stall_exclude */ 20931 WL_HC_TX_XTLV_ID_VAL_FC_TIMEOUT = 6, /* flow ctl timeout */ 20932 WL_HC_TX_XTLV_ID_VAL_FC_FORCE = 7, /* flow ctl force failure */ 20933 WL_HC_TX_XTLV_ID_VAL_DELAY_TO_TRAP = 8, /* delay threshold for forced trap */ 20934 WL_HC_TX_XTLV_ID_VAL_DELAY_TO_RPT = 9, /* delay threshold for event log report */ 20935 WL_HC_TX_XTLV_ID_VAL_FAILURE_TO_RPT = 10, /* threshold for consecutive TX failures */ 20936 }; 20937 20938 /* Health Check: Datapath RX IDs */ 20939 enum { 20940 WL_HC_RX_XTLV_ID_VAL_DMA_STALL_TIMEOUT = 1, /* dma_stall_timeout */ 20941 WL_HC_RX_XTLV_ID_VAL_DMA_STALL_FORCE = 2, /* dma_stall test trigger */ 20942 WL_HC_RX_XTLV_ID_VAL_STALL_THRESHOLD = 3, /* stall_threshold */ 20943 WL_HC_RX_XTLV_ID_VAL_STALL_SAMPLE_SIZE = 4, /* stall_sample_size */ 20944 WL_HC_RX_XTLV_ID_VAL_STALL_FORCE = 5, /* stall test trigger */ 20945 WL_HC_RX_XTLV_ID_VAL_STALL_UC_DECRYPT_FAIL = 6, /* trigger uc decrypt failures */ 20946 WL_HC_RX_XTLV_ID_VAL_STALL_BCMC_DECRYPT_FAIL = 7, /* trigger bcmc decrypt failures */ 20947 }; 20948 20949 /* Health Check: Datapath SCAN IDs */ 20950 enum { 20951 WL_HC_XTLV_ID_VAL_SCAN_STALL_THRESHOLD = 1, /* scan stall threshold */ 20952 }; 20953 20954 /* Health check: PHY IDs */ 20955 /* Needed for iguana 13.35 branch */ 20956 typedef enum { 20957 PHY_HC_DD_ALL = 0, 20958 PHY_HC_DD_TEMPSENSE = 1, 20959 PHY_HC_DD_VCOCAL = 2, 20960 PHY_HC_DD_RX = 3, 20961 PHY_HC_DD_TX = 4, 20962 PHY_HC_DD_LAST /* This must be the last entry */ 20963 } phy_hc_dd_type_t; 20964 20965 typedef enum { 20966 PHY_HC_DD_TEMP_FAIL = 0, 20967 PHY_HC_DD_VCO_FAIL = 1, 20968 PHY_HC_DD_RXDSN_FAIL = 2, 20969 PHY_HC_DD_TXPOW_FAIL = 3, 20970 PHY_HC_DD_END /* This must be the last entry */ 20971 } phy_hc_dd_type_v2_t; 20972 20973 /* IDs of Health Check report structures for sub types of health checks within WL */ 20974 typedef enum wl_hc_dd_type { 20975 WL_HC_DD_PCIE = 0, /* PCIe */ 20976 WL_HC_DD_RX_DMA_STALL = 1, /* RX DMA stall check */ 20977 WL_HC_DD_RX_STALL = 2, /* RX stall check */ 20978 WL_HC_DD_TX_STALL = 3, /* TX stall check */ 20979 WL_HC_DD_SCAN_STALL = 4, /* SCAN stall check */ 20980 WL_HC_DD_PHY = 5, /* PHY health check */ 20981 WL_HC_DD_REINIT = 6, /* Reinit due to other reasons */ 20982 WL_HC_DD_TXQ_STALL = 7, /* TXQ stall */ 20983 WL_HC_DD_RX_STALL_V2 = 8, /* RX stall check v2 */ 20984 20985 #ifdef WLAWDL 20986 WL_HC_DD_AWDL = 9, /* AWDL health check */ 20987 #endif /* WLAWDL */ 20988 20989 WL_HC_DD_SBSS =10, /* Slotted bss health check */ 20990 WL_HC_DD_NAN =11, /* NAN health check */ 20991 WL_HC_DD_MAX 20992 } wl_hc_dd_type_t; 20993 20994 /* RX stall reason codes sent with wl_rx_hc_info_v2_t */ 20995 typedef enum bcm_rx_hc_stall_reason { 20996 BCM_RX_HC_RESERVED = 0, 20997 BCM_RX_HC_UNSPECIFIED = 1, /* All other. Catch all */ 20998 BCM_RX_HC_UNICAST_DECRYPT_FAIL = 2, /* Unicast decrypt fail */ 20999 BCM_RX_HC_BCMC_DECRYPT_FAIL = 3, /* BCMC decrypt fail */ 21000 BCM_RX_HC_UNICAST_REPLAY = 4, /* Unicast replay */ 21001 BCM_RX_HC_BCMC_REPLAY = 5, /* BCMC replay */ 21002 BCM_RX_HC_AMPDU_DUP = 6, /* AMPDU DUP */ 21003 BCM_RX_HC_MAX 21004 } bcm_rx_hc_stall_reason_t; 21005 21006 /* 21007 * Health Check report structures for sub types of health checks within WL 21008 */ 21009 21010 /* Health Check report structure for Rx DMA Stall check */ 21011 typedef struct { 21012 uint16 type; 21013 uint16 length; 21014 uint16 timeout; 21015 uint16 stalled_dma_bitmap; 21016 } wl_rx_dma_hc_info_t; 21017 21018 /* Health Check report structure for Tx packet failure check */ 21019 typedef struct { 21020 uint16 type; 21021 uint16 length; 21022 uint32 stall_bitmap; 21023 uint32 stall_bitmap1; 21024 uint32 failure_ac; 21025 uint32 threshold; 21026 uint32 tx_all; 21027 uint32 tx_failure_all; 21028 } wl_tx_hc_info_t; 21029 21030 /* Health Check report structure for Rx dropped packet failure check */ 21031 typedef struct { 21032 uint16 type; /* WL_HC_RX_DD_STALL */ 21033 uint16 length; 21034 uint32 bsscfg_idx; 21035 uint32 rx_hc_pkts; 21036 uint32 rx_hc_dropped_all; 21037 uint32 rx_hc_alert_th; 21038 } wl_rx_hc_info_t; 21039 21040 /* Health Check report structure for Rx dropped packet failure check */ 21041 typedef struct { 21042 uint16 type; /* WL_HC_RX_DD_STALL_V2 */ 21043 uint16 length; 21044 uint8 if_idx; /* interface index on which issue is reported */ 21045 uint8 ac; /* access category on which this problem is seen */ 21046 uint8 pad[2]; /* Reserved */ 21047 uint32 rx_hc_pkts; 21048 uint32 rx_hc_dropped_all; 21049 uint32 rx_hc_alert_th; 21050 uint32 reason; /* refer to bcm_rx_hc_stall_reason_t above */ 21051 struct ether_addr peer_ea; 21052 } wl_rx_hc_info_v2_t; 21053 21054 /* HE top level command IDs */ 21055 enum { 21056 WL_HE_CMD_ENAB = 0u, 21057 WL_HE_CMD_FEATURES = 1u, 21058 WL_HE_CMD_TWT_SETUP = 2u, 21059 WL_HE_CMD_TWT_TEARDOWN = 3u, 21060 WL_HE_CMD_TWT_INFO = 4u, 21061 WL_HE_CMD_BSSCOLOR = 5u, 21062 WL_HE_CMD_PARTIAL_BSSCOLOR = 6u, 21063 WL_HE_CMD_CAP = 7u, 21064 WL_HE_CMD_STAID = 8u, 21065 WL_HE_CMD_MUEDCA = 9u, 21066 WL_HE_CMD_RTSDURTHRESH = 10u, 21067 WL_HE_CMD_PEDURATION = 11u, 21068 WL_HE_CMD_TESTBED_MODE = 12u, 21069 WL_HE_CMD_OMI_CONFIG = 13u, 21070 WL_HE_CMD_OMI_STATUS = 14u, 21071 WL_HE_CMD_OMI_ULMU_THROTTLE = 15u, 21072 WL_HE_CMD_ULMU_DISABLE_POLICY = 16u, 21073 WL_HE_CMD_ULMU_DISABLE_STATS = 17u, 21074 WL_HE_CMD_OMI_DLMU_RSD_RCM_MPF_MAP = 18u, 21075 WL_HE_CMD_SR_PROHIBIT = 19u, 21076 WL_HE_CMD_LAST 21077 }; 21078 21079 enum { 21080 WL_HE_MUEDCA_IE = 0, 21081 WL_HE_MUEDCA_SHM = 1, 21082 WL_HE_MUEDCA_LAST 21083 }; 21084 21085 #ifdef WL11AX 21086 21087 /* struct for dump MU EDCA IE/SHM paramters */ 21088 typedef struct wl_he_muedca_ie_v1 { 21089 uint16 version; /* structure version */ 21090 uint16 length; /* data length (starting after this field) */ 21091 uint8 mu_qos_info; 21092 he_mu_ac_param_record_t param_ac[AC_COUNT]; 21093 } wl_he_muedca_ie_v1_t; 21094 21095 typedef wl_he_muedca_ie_v1_t wl_he_muedca_ie_t; 21096 21097 #define WL_HE_MUEDCA_VER_1 1 21098 21099 #endif /* WL11AX */ 21100 21101 /* TWT top level command IDs */ 21102 enum { 21103 WL_TWT_CMD_ENAB = 0, 21104 WL_TWT_CMD_SETUP = 1, 21105 WL_TWT_CMD_TEARDOWN = 2, 21106 WL_TWT_CMD_INFO = 3, 21107 WL_TWT_CMD_AUTOSCHED = 4, 21108 WL_TWT_CMD_STATS = 5, 21109 WL_TWT_CMD_EARLY_TERM_TIME = 6, 21110 WL_TWT_CMD_RESP_CONFIG = 7, 21111 WL_TWT_CMD_SPPS_ENAB = 8, 21112 WL_TWT_CMD_CAP = 9, 21113 WL_TWT_CMD_STATUS = 10, 21114 WL_TWT_CMD_CONFIG = 11, 21115 WL_TWT_CMD_LAST 21116 }; 21117 21118 #define WL_HEB_VER_1 1 21119 21120 /* HEB top level command IDs */ 21121 enum { 21122 WL_HEB_CMD_ENAB = 0, 21123 WL_HEB_CMD_NUM_HEB = 1, 21124 WL_HEB_CMD_COUNTERS = 2, 21125 WL_HEB_CMD_CLEAR_COUNTERS = 3, 21126 WL_HEB_CMD_CONFIG = 4, 21127 WL_HEB_CMD_STATUS = 5, 21128 WL_HEB_CMD_LAST 21129 }; 21130 21131 /* HEB counters structures */ 21132 typedef struct wl_heb_int_cnt_v1 { 21133 uint16 pre_event; 21134 uint16 start_event; 21135 uint16 end_event; 21136 uint16 missed; 21137 } wl_heb_int_cnt_v1_t; 21138 21139 typedef struct wl_heb_cnt_v1 { 21140 /* structure control */ 21141 uint16 version; /* structure version */ 21142 uint16 length; /* data length (starting after this field) */ 21143 wl_heb_int_cnt_v1_t heb_int_cnt[1]; 21144 } wl_heb_cnt_v1_t; 21145 21146 // struct for configuring HEB 21147 typedef struct wl_config_heb_fill_v1 { 21148 uint16 version; /* structure version */ 21149 uint16 length; /* data length (starting after this field) */ 21150 uint32 duration; 21151 uint32 periodicity; 21152 uint16 heb_idx; 21153 uint16 preeventtime; 21154 uint8 count; 21155 uint8 PAD[3]; 21156 } wl_config_heb_fill_v1_t; 21157 21158 typedef struct wl_heb_blk_params_v1 { 21159 /* Don't change the order of following elements. This is as per the HEB HW spec */ 21160 uint32 event_int_val_l; 21161 uint32 event_int_val_h; 21162 uint32 param2; 21163 uint32 param3; 21164 uint32 pre_event_intmsk_bmp; 21165 uint32 start_event_intmsk_bmp; 21166 uint32 end_event_intmsk_bmp; 21167 uint32 event_driver_info; 21168 uint16 param1; 21169 uint8 event_count; 21170 uint8 noa_invert; 21171 } wl_heb_blk_params_v1_t; 21172 21173 typedef struct wl_heb_int_status_v1 { 21174 uint32 heb_idx; 21175 wl_heb_blk_params_v1_t blk_params; 21176 } wl_heb_reg_status_v1_t; 21177 21178 typedef struct wl_heb_status_v1 { 21179 uint16 version; /* structure version */ 21180 uint16 length; /* data length (starting after this field) */ 21181 wl_heb_reg_status_v1_t heb_status[1]; 21182 } wl_heb_status_v1_t; 21183 21184 /* HWA */ 21185 #define WL_HWA_VER_1 1 21186 21187 /* HWA top level command IDs */ 21188 typedef enum wl_hwa_cmd_type { 21189 WL_HWA_CMD_ENAB = 0, 21190 WL_HWA_CMD_CAPS = 1, 21191 WL_HWA_CMD_COUNTERS = 2, 21192 WL_HWA_CMD_CLRCNTS = 3, 21193 WL_HWA_CMD_REGDUMP = 4, 21194 WL_HWA_CMD_INDUCE_ERR = 5, 21195 WL_HWA_CMD_LAST 21196 } wl_hwa_cmd_type_t; 21197 21198 typedef struct wl_hwa_cnts_info_v1 { 21199 uint16 cnt_rxs_filter; /* #filters added */ 21200 uint16 cnt_rxs_chainable; /* #rxchainable matched */ 21201 } wl_hwa_cnts_info_v1_t; 21202 21203 /* HWA dump info structures */ 21204 typedef struct wl_hwa_hwcaps_info_v1 { 21205 uint16 up; /* is hwa init'd/deint'd */ 21206 uint16 corerev; /* hwa core revision */ 21207 uint32 submodules_mask; /* mask for hwa submodules that are enabled */ 21208 } wl_hwa_hwcaps_info_v1_t; 21209 21210 typedef struct wl_hwa_cnts_v1 { 21211 /* structure control */ 21212 uint16 version; /* structure version */ 21213 uint16 length; /* data length (starting after this field) */ 21214 wl_hwa_cnts_info_v1_t hwa_cnts_info[]; /* variable length array with hwa counters */ 21215 } wl_hwa_cnts_v1_t; 21216 21217 /* All submodules, order is important and define order of initialization. */ 21218 /* Not use enumeration here because these defines are also used in macro */ 21219 #define HWA_SUBMODULES_COMMON 0 /**< Common */ 21220 #define HWA_SUBMODULES_TXPOST 1u /**< TxPost 3a */ 21221 #define HWA_SUBMODULES_RXPOSTFILL 2u /**< RxPost and Fill 1a/1b */ 21222 #define HWA_SUBMODULES_TXDMA 3u /**< TxDMA 3b */ 21223 #define HWA_SUBMODULES_TXS 4u /**< TxStatus 4a */ 21224 #define HWA_SUBMODULES_BUFMGR 5u /**< Buffer Manager, RX and TX. Do this last */ 21225 #define HWA_SUBMODULES_CPL 6u /**< Completion 2b/4b */ 21226 #define HWA_SUBMODULES_RXS 7u /**< RxStatus 2a */ 21227 #define HWA_SUBMODULES_NUM 8u /**< number of submodules */ 21228 21229 #define HWA_SUBMODULES_ALL 0xFF /* Bitmaps for all submodules */ 21230 #ifdef HWA 21231 #define HWA_SUBMODULE_MASK(submodule) (1u << (submodule)) 21232 #else 21233 #define HWA_SUBMODULE_MASK(submodule) (0) 21234 #endif /* HWA */ 21235 /* 21236 * NOTES: 21237 * wl_twt_sdesc_t is used to support both broadcast TWT and individual TWT. 21238 * Value in bit[0:2] in 'flow_id' field is interpreted differently: 21239 * - flow id for individual TWT (when WL_TWT_FLOW_FLAG_BROADCAST bit is NOT set 21240 * in 'flow_flags' field) 21241 * - flow id as defined in Table 8-248l1 for broadcast TWT (when 21242 * WL_TWT_FLOW_FLAG_BROADCAST bit is set) 21243 * In latter case other bits could be used to differentiate different flows 21244 * in order to support multiple broadcast TWTs with the same flow id. 21245 */ 21246 21247 /* TWT Setup descriptor */ 21248 21249 /* Any change to wl_twt_sdesc is not possible without affecting this ROMed structure 21250 * in various current branches. Hence to use new updated structure wl_twt_sdesc_v1 21251 * typecast it to wl_twt_sdesc_t and define WL_TWT_SDESC_TYPEDEF_HAS_ALIAS 21252 * in required branches 21253 */ 21254 #ifndef WL_TWT_SDESC_TYPEDEF_HAS_ALIAS 21255 typedef struct wl_twt_sdesc { 21256 /* Setup Command. */ 21257 uint8 setup_cmd; /* See TWT_SETUP_CMD_XXXX in 802.11ah.h */ 21258 uint8 flow_flags; /* Flow attributes. See WL_TWT_FLOW_FLAG_XXXX below */ 21259 uint8 flow_id; /* must be between 0 and 7. Set 0xFF for auto assignment */ 21260 uint8 bid; /* must be between 0 and 31. Set 0xFF for auto assignment */ 21261 uint8 channel; /* Twt channel - Not used for now */ 21262 uint8 negotiation_type; /* Negotiation Type: See macros TWT_NEGO_TYPE_X */ 21263 uint8 frame_recomm; /* frame recommendation for broadcast TWTs - Not used for now */ 21264 uint8 wake_type; /* See WL_TWT_TIME_TYPE_XXXX below */ 21265 uint32 wake_time_h; /* target wake time - BSS TSF (us) */ 21266 uint32 wake_time_l; 21267 uint32 wake_dur; /* target wake duration in unit of microseconds */ 21268 uint32 wake_int; /* target wake interval */ 21269 uint32 btwt_persistence; /* Broadcast TWT Persistence */ 21270 uint32 wake_int_max; /* max wake interval(uS) for TWT */ 21271 uint8 duty_cycle_min; /* min duty cycle for TWT(Percentage) */ 21272 uint8 pad; 21273 /* deprecated - to be removed */ 21274 uint16 li; 21275 } wl_twt_sdesc_t; 21276 #endif /* WL_TWT_SDESC_TYPEDEF_HAS_ALIAS */ 21277 21278 #define WL_TWT_SETUP_DESC_VER 1u 21279 21280 /* TWT Setup descriptor (Version controlled) */ 21281 typedef struct wl_twt_sdesc_v1 { 21282 /* structure control */ 21283 uint16 version; /* structure version */ 21284 uint16 length; /* data length (starting after this field) */ 21285 uint8 setup_cmd; /* See TWT_SETUP_CMD_XXXX in 802.11ah.h */ 21286 uint8 flow_flags; /* Flow attributes. See WL_TWT_FLOW_FLAG_XXXX below */ 21287 uint8 flow_id; /* must be between 0 and 7. Set 0xFF for auto assignment */ 21288 uint8 bid; /* must be between 0 and 31. Set 0xFF for auto assignment */ 21289 uint8 channel; /* Twt channel - Not used for now */ 21290 uint8 negotiation_type; /* Negotiation Type: See macros TWT_NEGO_TYPE_X */ 21291 uint8 frame_recomm; /* frame recommendation for broadcast TWTs - Not used for now */ 21292 uint8 wake_type; /* See WL_TWT_TIME_TYPE_XXXX below */ 21293 uint32 wake_time_h; /* target wake time - BSS TSF (us) */ 21294 uint32 wake_time_l; 21295 uint32 wake_dur; /* target wake duration in unit of microseconds */ 21296 uint32 wake_int; /* target wake interval */ 21297 uint32 btwt_persistence; /* Broadcast TWT Persistence */ 21298 uint32 wake_int_max; /* max wake interval(uS) for TWT */ 21299 uint32 wake_int_min; /* Min. wake interval allowed for TWT Setup */ 21300 uint32 wake_dur_min; /* Min. wake duration allowed for TWT Setup */ 21301 uint32 wake_dur_max; /* Max. wake duration allowed for TWT Setup */ 21302 } wl_twt_sdesc_v1_t; 21303 21304 #define WL_TWT_CONFIG_DESC_VER 1u 21305 21306 /* TWT config descriptor */ 21307 typedef struct wl_twt_cdesc { 21308 /* structure control */ 21309 uint16 version; /* structure version */ 21310 uint16 length; /* data length (starting after this field) */ 21311 uint8 negotiation_type; /* Negotiation Type: See macros TWT_NEGO_TYPE_X */ 21312 uint8 configID; /* TWT Configuration ID */ 21313 uint8 flow_flags; /* Flow Flags Configuration. See WL_TWT_FLOW_FLAG_XXXX */ 21314 uint8 PAD; 21315 uint32 wake_time_h; /* target wake time - BSS TSF (us) */ 21316 uint32 wake_time_l; 21317 uint32 wake_dur; /* target wake duration in unit of microseconds */ 21318 uint32 wake_int; /* target wake interval */ 21319 uint32 wake_int_max; /* max wake interval(uS) for TWT */ 21320 uint32 wake_int_min; /* Min. wake interval allowed for TWT Setup */ 21321 uint32 wake_dur_min; /* Min. wake duration allowed for TWT Setup */ 21322 uint32 wake_dur_max; /* Max. wake duration allowed for TWT Setup */ 21323 uint32 avg_pkt_num; /* Average Number of Packets per interval */ 21324 uint32 avg_pkt_size; /* Average packet size for TWT SP */ 21325 } wl_twt_cdesc_t; 21326 21327 /* Flow flags */ 21328 #define WL_TWT_FLOW_FLAG_UNANNOUNCED (1u << 0u) 21329 #define WL_TWT_FLOW_FLAG_TRIGGER (1u << 1u) 21330 #define WL_TWT_FLOW_FLAG_REQUEST (1u << 2u) 21331 #define WL_TWT_FLOW_FLAG_PROTECT (1u << 3u) 21332 #define WL_TWT_FLOW_FLAG_RESPONDER_PM (1u << 4u) 21333 #define WL_TWT_FLOW_FLAG_UNSOLICITED (1u << 5u) 21334 #define WL_TWT_FLOW_FLAG_WAKEDUR_UNIT_1ms (1u << 6u) 21335 #define WL_TWT_FLOW_FLAG_INFO_FRM_DISABLED (1u << 7u) 21336 21337 /* Deprecated - To be removed */ 21338 #define WL_TWT_FLOW_FLAG_BROADCAST (1u << 5u) 21339 #define WL_TWT_FLOW_FLAG_IMPLICIT (1u << 7u) 21340 21341 /* Flow id */ 21342 #define WL_TWT_FLOW_ID_FID 0x07u /* flow id */ 21343 #define WL_TWT_FLOW_ID_GID_MASK 0x70u /* group id - broadcast TWT only */ 21344 #define WL_TWT_FLOW_ID_GID_SHIFT 4u 21345 21346 #define WL_TWT_INV_BCAST_ID 0xFFu 21347 #define WL_TWT_INV_FLOW_ID 0xFFu 21348 #define WL_TWT_INV_CONFIG_ID 0xFFu 21349 #define WL_TWT_ALL_TWT_CONFIG_ID 0u /* ConfigID 0 corresponds to All TWT */ 21350 21351 #define WL_TWT_INV_WAKE_DUR 0xFFFFFFFFu 21352 #define WL_TWT_INV_WAKE_INT 0xFFFFFFFFu 21353 #define WL_TWT_INV_PKT_NUM 0xFFFFFFFFu 21354 #define WL_TWT_INV_PKT_SIZE 0xFFFFFFFFu 21355 #define WL_TWT_INV_WAKE_TIME 0xFFFFFFFFu 21356 21357 /* auto flow_id */ 21358 #define WL_TWT_SETUP_FLOW_ID_AUTO 0xFFu 21359 /* auto broadcast ID */ 21360 #define WL_TWT_SETUP_BCAST_ID_AUTO 0xFFu 21361 /* Infinite persistence for broadcast schedule */ 21362 #define WL_TWT_INFINITE_BTWT_PERSIST 0xFFFFFFFFu 21363 21364 /* Maximum individual & broadcast TWT supported */ 21365 #define WL_TWT_MAX_ITWT 4u 21366 #define WL_TWT_MAX_BTWT 4u 21367 21368 /* should be larger than what chip supports */ 21369 #define WL_TWT_STATS_MAX_BTWT WL_TWT_MAX_BTWT 21370 #define WL_TWT_STATS_MAX_ITWT WL_TWT_MAX_ITWT 21371 21372 /* TWT States */ 21373 #define WL_TWT_INACTIVE 0u /* Resource is not allotted */ 21374 #define WL_TWT_ACTIVE 1u /* Resource is allotted and HEB is programmed */ 21375 #define WL_TWT_SUSPEND 2u /* Resource is suspended and HEB released */ 21376 #define WL_TWT_RESERVED 3u /* Resource is allotted but HEB is not yet programmed */ 21377 21378 /* Wake type */ 21379 /* TODO: not yet finalized */ 21380 #define WL_TWT_TIME_TYPE_BSS 0u /* The time specified in wake_time_h/l is 21381 * the BSS TSF time. 21382 */ 21383 #define WL_TWT_TIME_TYPE_OFFSET 1u /* The time specified in wake_time_h/l is an offset 21384 * of the TSF time when the iovar is processed. 21385 */ 21386 #define WL_TWT_TIME_TYPE_AUTO 2u /* The target wake time is chosen internally by the FW */ 21387 21388 #define WL_TWT_SETUP_VER 0u 21389 21390 /* HE TWT Setup command */ 21391 typedef struct wl_twt_setup { 21392 /* structure control */ 21393 uint16 version; /* structure version */ 21394 uint16 length; /* data length (starting after this field) */ 21395 struct ether_addr peer; /* Peer address - leave it all 0s' for AP */ 21396 uint8 pad[2]; 21397 #ifndef WL_TWT_SDESC_TYPEDEF_HAS_ALIAS /* Use either legacy structure or 21398 * the new versioned structure 21399 */ 21400 wl_twt_sdesc_t desc; /* Setup Descriptor */ 21401 #else 21402 struct wl_twt_sdesc_v1 desc; 21403 #endif /* WL_TWT_SDESC_TYPEDEF_HAS_ALIAS */ 21404 uint16 dialog; /* Deprecated - to be removed */ 21405 uint8 pad1[2]; 21406 } wl_twt_setup_t; 21407 21408 #define WL_TWT_CONFIG_VER 0u 21409 21410 /* TWT Config command */ 21411 typedef struct wl_twt_config { 21412 /* structure control */ 21413 uint16 version; /* structure version */ 21414 uint16 length; /* data length (starting after this field) */ 21415 struct ether_addr peer; /* Peer address. leave it all 0s' for AP */ 21416 uint8 pad[2]; 21417 wl_twt_cdesc_t desc; /* Config Descriptor */ 21418 } wl_twt_config_t; 21419 21420 #define WL_TWT_TEARDOWN_VER 0u 21421 21422 /* twt teardown descriptor */ 21423 typedef struct wl_twt_teardesc { 21424 uint8 negotiation_type; 21425 uint8 flow_id; /* must be between 0 and 7 */ 21426 uint8 bid; /* must be between 0 and 31 */ 21427 bool alltwt; /* all twt teardown - 0 or 1 */ 21428 } wl_twt_teardesc_t; 21429 21430 /* HE TWT Teardown command */ 21431 typedef struct wl_twt_teardown { 21432 /* structure control */ 21433 uint16 version; /* structure version */ 21434 uint16 length; /* data length (starting after this field) */ 21435 /* peer address */ 21436 struct ether_addr peer; /* leave it all 0s' for AP */ 21437 wl_twt_teardesc_t teardesc; /* Teardown descriptor */ 21438 21439 /* deprecated - to be removed - Start here */ 21440 uint8 flow_flags; 21441 uint8 flow_id; 21442 uint8 bid; 21443 /* deprecated - to be removed - End here */ 21444 21445 uint8 configID; /* TWT Configuration ID */ 21446 } wl_twt_teardown_t; 21447 21448 /* twt information descriptor */ 21449 typedef struct wl_twt_infodesc { 21450 uint8 flow_flags; /* See WL_TWT_INFO_FLAG_XXX below */ 21451 uint8 flow_id; 21452 uint8 pad[2]; 21453 uint32 next_twt_h; 21454 uint32 next_twt_l; 21455 /* deprecated - to be removed */ 21456 uint8 wake_type; 21457 uint8 pad1[3]; 21458 } wl_twt_infodesc_t; 21459 21460 /* Flow flags */ 21461 #define WL_TWT_INFO_FLAG_ALL_TWT (1u << 0u) /* All TWT */ 21462 #define WL_TWT_INFO_FLAG_RESUME (1u << 1u) /* 1 is TWT Resume, 0 is TWT Suspend */ 21463 21464 /* deprecated - to be removed */ 21465 #define WL_TWT_INFO_FLAG_RESP_REQ (1 << 0) /* Response Requested */ 21466 #define WL_TWT_INFO_FLAG_NEXT_TWT_REQ (1 << 1) /* Next TWT Request */ 21467 #define WL_TWT_INFO_FLAG_BTWT_RESCHED (1 << 2) /* Broadcast Reschedule */ 21468 typedef wl_twt_infodesc_t wl_twt_idesc_t; 21469 21470 #define WL_TWT_INFO_VER 0u 21471 21472 /* HE TWT Information command */ 21473 typedef struct wl_twt_info { 21474 /* structure control */ 21475 uint16 version; /* structure version */ 21476 uint16 length; /* data length (starting after this field) */ 21477 /* peer address */ 21478 struct ether_addr peer; /* leave it all 0s' for AP */ 21479 uint8 configID; /* TWT Configuration ID */ 21480 uint8 pad[1]; 21481 wl_twt_infodesc_t infodesc; /* information descriptor */ 21482 /* deprecated - to be removed */ 21483 wl_twt_idesc_t desc; 21484 } wl_twt_info_t; 21485 21486 /* wl twt status */ 21487 #define WL_TWT_CMD_STATUS_VERSION_1 1u 21488 21489 #define WL_TWT_STATUS_FLAG_SPPS_ENAB (1u << 0u) 21490 #define WL_TWT_STATUS_FLAG_WAKE_STATE (1u << 1u) 21491 #define WL_TWT_STATUS_FLAG_WAKE_OVERRIDE (1u << 2u) 21492 21493 typedef struct wl_twt_status { 21494 uint8 state; /* TWT State */ 21495 uint8 heb_id; /* HEB ID */ 21496 uint8 configID; /* TWT Configuration ID */ 21497 uint8 PAD[1]; 21498 struct ether_addr peer; 21499 uint8 PAD[2]; 21500 uint32 avg_pkt_num; /* Average Packet number per TWT SP Interval */ 21501 uint32 avg_pkt_size; /* Average Packet size for TWT SP */ 21502 #ifndef WL_TWT_SDESC_TYPEDEF_HAS_ALIAS /* Use either legacy structure or 21503 * the new versioned structure 21504 */ 21505 wl_twt_sdesc_t desc; /* Setup Descriptor */ 21506 #else 21507 struct wl_twt_sdesc_v1 desc; 21508 #endif /* WL_TWT_SDESC_TYPEDEF_HAS_ALIAS */ 21509 } wl_twt_status_t; 21510 21511 /* wl twt status output */ 21512 typedef struct wl_twt_status_v1 { 21513 uint16 version; 21514 uint16 length; 21515 uint8 num_fid; /* Number of individual TWT setup */ 21516 uint8 num_bid; /* Number of Broadcast TWT setup */ 21517 uint16 status_flags; /* see WL_TWT_STATUS_FLAGS_XX */ 21518 wl_twt_status_t itwt_status[WL_TWT_MAX_ITWT]; 21519 wl_twt_status_t btwt_status[WL_TWT_MAX_BTWT]; 21520 } wl_twt_status_v1_t; 21521 21522 /* wl twt status command input */ 21523 typedef struct wl_twt_status_cmd_v1 { 21524 uint16 version; 21525 uint16 length; 21526 struct ether_addr peer; 21527 uint8 configID; 21528 uint8 PAD; 21529 } wl_twt_status_cmd_v1_t; 21530 21531 #define WL_TWT_PEER_STATS_VERSION_1 1u 21532 typedef struct wl_twt_peer_stats_v1 { 21533 uint16 version; 21534 uint16 length; 21535 struct ether_addr peer; 21536 uint8 PAD[2]; 21537 uint8 id; 21538 uint8 flow_flags; 21539 uint8 PAD[2]; 21540 uint32 sp_seq; /* sequence number of the service period */ 21541 uint32 tx_ucast_pkts; 21542 uint32 tx_pkts_min; 21543 uint32 tx_pkts_max; 21544 uint32 tx_pkts_avg; 21545 uint32 tx_failures; 21546 uint32 rx_ucast_pkts; 21547 uint32 rx_pkts_min; 21548 uint32 rx_pkts_max; 21549 uint32 rx_pkts_avg; 21550 uint32 rx_pkts_retried; 21551 } wl_twt_peer_stats_v1_t; 21552 21553 #define WL_TWT_STATS_VERSION_1 1 21554 typedef struct wl_twt_stats_v1 { 21555 uint16 version; 21556 uint16 length; 21557 uint32 num_stats; /* number of peer stats in the peer_stats_list */ 21558 wl_twt_peer_stats_v1_t peer_stats_list[]; 21559 } wl_twt_stats_v1_t; 21560 21561 #define WL_TWT_PEER_STATS_VERSION_2 2u 21562 typedef struct wl_twt_peer_stats_v2 { 21563 uint16 version; 21564 uint16 length; 21565 struct ether_addr peer; 21566 uint8 id; /* TWT session ID */ 21567 uint8 flow_flags; 21568 uint8 configID; /* TWT Configuration ID */ 21569 uint8 PAD[3]; 21570 uint32 sp_seq; /* sequence number of the service period */ 21571 uint32 tx_ucast_pkts; /* Number of unicast Tx packets in TWT SPs */ 21572 uint32 tx_pkts_min; /* Minimum number of Tx packets in a TWT SP */ 21573 uint32 tx_pkts_max; /* Maximum number of Tx packets in a TWT SP */ 21574 uint32 tx_pkts_avg; /* Average number of Tx packets in each TWT SP */ 21575 uint32 tx_failures; /* Tx packets failure count */ 21576 uint32 rx_ucast_pkts; /* Number of unicast Rx packets in TWT SPs */ 21577 uint32 rx_pkts_min; /* Minimum number of Rx packets in a TWT SP */ 21578 uint32 rx_pkts_max; /* Maximum number of Rx packets in a TWT SP */ 21579 uint32 rx_pkts_avg; /* Average number of Rx packets in each TWT SP */ 21580 uint32 rx_pkts_retried; /* retried Rx packets count */ 21581 uint32 tx_pkt_sz_avg; /* Average Tx packet size in TWT SPs */ 21582 uint32 rx_pkt_sz_avg; /* Average Rx Packet size in TWT SPs */ 21583 uint32 eosp_dur_avg; /* Average Wake duration in SPs ended due to EOSP */ 21584 uint32 eosp_count; /* Count of TWT SPs ended due to EOSP */ 21585 } wl_twt_peer_stats_v2_t; 21586 21587 #define WL_TWT_STATS_VERSION_2 2u 21588 typedef struct wl_twt_stats_v2 { 21589 uint16 version; 21590 uint16 length; 21591 uint32 num_stats; /* number of peer stats in the peer_stats_list */ 21592 wl_twt_peer_stats_v2_t peer_stats_list[]; 21593 } wl_twt_stats_v2_t; 21594 21595 #define WL_TWT_STATS_CMD_VERSION_1 1 21596 #define WL_TWT_STATS_CMD_FLAGS_RESET (1u << 0u) 21597 /* HE TWT stats command */ 21598 typedef struct wl_twt_stats_cmd_v1 { 21599 uint16 version; 21600 uint16 length; 21601 struct ether_addr peer; 21602 uint8 configID; /* TWT Configuration ID */ 21603 uint8 PAD; 21604 uint16 flags; /* see WL_TWT_STATS_CMD_FLAGS */ 21605 uint8 num_fid; 21606 uint8 num_bid; 21607 uint8 fid_list[WL_TWT_STATS_MAX_ITWT]; 21608 uint8 bid_list[WL_TWT_STATS_MAX_BTWT]; 21609 } wl_twt_stats_cmd_v1_t; 21610 21611 #define WL_TWT_RESP_CFG_VER 0u 21612 21613 #define WL_TWT_CMD_RESP_CFG_TYPE_ALTERNATE 0u 21614 #define WL_TWT_CMD_RESP_CFG_TYPE_DICTATE 1u 21615 /* HE TWT resp command */ 21616 typedef struct wl_twt_resp_cfg { 21617 /* structure control */ 21618 uint16 version; /* Structure version */ 21619 uint16 length; /* Data length (starting after this field) */ 21620 uint8 dc_max; /* Max supported duty cycle for single TWT */ 21621 uint8 resp_type; /* Resp. type(Alt/dict) if duty cycle>max duty cycle */ 21622 } wl_twt_resp_cfg_t; 21623 21624 #define WL_TWT_CAP_CMD_VERSION_1 1u 21625 21626 #define WL_TWT_CAP_FLAGS_REQ_SUPPORT (1u << 0u) 21627 #define WL_TWT_CAP_FLAGS_RESP_SUPPORT (1u << 1u) 21628 #define WL_TWT_CAP_FLAGS_BTWT_SUPPORT (1u << 2u) 21629 #define WL_TWT_CAP_FLAGS_FLEX_SUPPORT (1u << 3u) 21630 #define WL_TWT_CAP_FLAGS_TWT_REQUIRED (1u << 4u) 21631 21632 /* HE TWT capabilities output */ 21633 typedef struct wl_twt_cap { 21634 uint16 version; 21635 uint16 length; 21636 uint16 device_cap; /* see WL_TWT_CAP_CMD_FLAGS */ 21637 uint16 peer_cap; /* see WL_TWT_CAP_CMD_FLAGS */ 21638 } wl_twt_cap_t; 21639 21640 /* HE TWT capabilities command input */ 21641 typedef struct wl_twt_cap_cmd { 21642 uint16 version; 21643 uint16 length; 21644 struct ether_addr peer; 21645 uint8 PAD[2]; 21646 } wl_twt_cap_cmd_t; 21647 21648 /* EHT sub command IDs */ 21649 enum { 21650 WL_EHT_CMD_ENAB = 0u, /* enable/disable EHT feature as a whole */ 21651 WL_EHT_CMD_DBG = 1u, /* configure EHT debug facilities */ 21652 WL_EHT_CMD_FEATURES = 2u, /* configure EHT sub-features */ 21653 WL_EHT_CMD_LAST 21654 }; 21655 21656 /* Current version for wlc_clm_power_limits_req_t structure and flags */ 21657 #define WLC_CLM_POWER_LIMITS_REQ_VERSION 1 21658 /* "clm_power_limits" iovar request structure */ 21659 typedef struct wlc_clm_power_limits_req { 21660 /* Input. Structure and flags version */ 21661 uint32 version; 21662 /* Full length of buffer (includes this structure and space for TLV-encoded PPR) */ 21663 uint32 buflen; 21664 /* Input. Flags (see WLC_CLM_POWER_LIMITS_INPUT_FLAG_... below) */ 21665 uint32 input_flags; 21666 /* Input. CC of region whose data is being requested */ 21667 char cc[WLC_CNTRY_BUF_SZ]; 21668 /* Input. Channel/subchannel in chanspec_t format */ 21669 uint32 chanspec; 21670 /* Subchannel encoded as clm_limits_type_t */ 21671 uint32 clm_subchannel; 21672 /* Input. 0-based antenna index */ 21673 uint32 antenna_idx; 21674 /* Output. General flags (see WLC_CLM_POWER_LIMITS_OUTPUT_FLAG_... below) */ 21675 uint32 output_flags; 21676 /* Output. 2.4G country flags, encoded as clm_flags_t enum */ 21677 uint32 clm_country_flags_2g; 21678 /* Output. 5G country flags, encoded as clm_flags_t enum */ 21679 uint32 clm_country_flags_5g; 21680 /* Output. Length of TLV-encoded PPR data that follows this structure */ 21681 uint32 ppr_tlv_size; 21682 /* Output. Beginning of buffer for TLV-encoded PPR data */ 21683 uint8 ppr_tlv[1]; 21684 } wlc_clm_power_limits_req_t; 21685 21686 /* Input. Do not apply SAR limits */ 21687 #define WLC_CLM_POWER_LIMITS_INPUT_FLAG_NO_SAR 0x00000001 21688 /* Input. Do not apply board limits */ 21689 #define WLC_CLM_POWER_LIMITS_INPUT_FLAG_NO_BOARD 0x00000002 21690 /* Output. Limits taken from product-specific country data */ 21691 #define WLC_CLM_POWER_LIMITS_OUTPUT_FLAG_PRODUCT_LIMITS 0x00000001 21692 /* Output. Limits taken from product-specific worldwide data */ 21693 #define WLC_CLM_POWER_LIMITS_OUTPUT_FLAG_WORLDWIDE_LIMITS 0x00000002 21694 /* Output. Limits taken from country-default (all-product) data */ 21695 #define WLC_CLM_POWER_LIMITS_OUTPUT_FLAG_DEFAULT_COUNTRY_LIMITS 0x00000004 21696 21697 #define WL_MBO_IOV_MAJOR_VER 1 21698 #define WL_MBO_IOV_MINOR_VER 1 21699 #define WL_MBO_IOV_MAJOR_VER_SHIFT 8 21700 #define WL_MBO_IOV_VERSION \ 21701 ((WL_MBO_IOV_MAJOR_VER << WL_MBO_IOV_MAJOR_VER_SHIFT)| WL_MBO_IOV_MINOR_VER) 21702 21703 #define MBO_MAX_CHAN_PREF_ENTRIES 16 21704 21705 enum wl_mbo_cmd_ids { 21706 WL_MBO_CMD_ADD_CHAN_PREF = 1, 21707 WL_MBO_CMD_DEL_CHAN_PREF = 2, 21708 WL_MBO_CMD_LIST_CHAN_PREF = 3, 21709 WL_MBO_CMD_CELLULAR_DATA_CAP = 4, 21710 WL_MBO_CMD_DUMP_COUNTERS = 5, 21711 WL_MBO_CMD_CLEAR_COUNTERS = 6, 21712 WL_MBO_CMD_FORCE_ASSOC = 7, 21713 WL_MBO_CMD_BSSTRANS_REJECT = 8, 21714 WL_MBO_CMD_SEND_NOTIF = 9, 21715 /* Unused command, This enum no can be use 21716 * for next new command 21717 */ 21718 WL_MBO_CMD_CLEAR_CHAN_PREF = 10, 21719 WL_MBO_CMD_NBR_INFO_CACHE = 11, 21720 WL_MBO_CMD_ANQPO_SUPPORT = 12, 21721 WL_MBO_CMD_DBG_EVENT_CHECK = 13, 21722 WL_MBO_CMD_EVENT_MASK = 14, 21723 /* Add before this !! */ 21724 WL_MBO_CMD_LAST 21725 }; 21726 21727 enum wl_mbo_xtlv_id { 21728 WL_MBO_XTLV_OPCLASS = 0x1, 21729 WL_MBO_XTLV_CHAN = 0x2, 21730 WL_MBO_XTLV_PREFERENCE = 0x3, 21731 WL_MBO_XTLV_REASON_CODE = 0x4, 21732 WL_MBO_XTLV_CELL_DATA_CAP = 0x5, 21733 WL_MBO_XTLV_COUNTERS = 0x6, 21734 WL_MBO_XTLV_ENABLE = 0x7, 21735 WL_MBO_XTLV_SUB_ELEM_TYPE = 0x8, 21736 WL_MBO_XTLV_BTQ_TRIG_START_OFFSET = 0x9, 21737 WL_MBO_XTLV_BTQ_TRIG_RSSI_DELTA = 0xa, 21738 WL_MBO_XTLV_ANQP_CELL_SUPP = 0xb, 21739 WL_MBO_XTLV_BIT_MASK = 0xc 21740 }; 21741 21742 /* event bit mask flags for MBO */ 21743 #define MBO_EVT_BIT_MASK_CELLULAR_SWITCH 0x0001 /* Evt bit mask to enab cellular switch */ 21744 #define MBO_EVT_BIT_MASK_BTM_REQ_RCVD 0x0002 /* Evt bit mask to enab BTM req rcvd */ 21745 21746 typedef struct wl_mbo_counters { 21747 /* No of transition req recvd */ 21748 uint16 trans_req_rcvd; 21749 /* No of transition req with disassoc imminent */ 21750 uint16 trans_req_disassoc; 21751 /* No of transition req with BSS Termination */ 21752 uint16 trans_req_bss_term; 21753 /* No of trans req w/ unspecified reason */ 21754 uint16 trans_resn_unspec; 21755 /* No of trans req w/ reason frame loss */ 21756 uint16 trans_resn_frm_loss; 21757 /* No of trans req w/ reason traffic delay */ 21758 uint16 trans_resn_traffic_delay; 21759 /* No of trans req w/ reason insufficient buffer */ 21760 uint16 trans_resn_insuff_bw; 21761 /* No of trans req w/ reason load balance */ 21762 uint16 trans_resn_load_bal; 21763 /* No of trans req w/ reason low rssi */ 21764 uint16 trans_resn_low_rssi; 21765 /* No of trans req w/ reason excessive retransmission */ 21766 uint16 trans_resn_xcess_retransmn; 21767 /* No of trans req w/ reason gray zone */ 21768 uint16 trans_resn_gray_zone; 21769 /* No of trans req w/ reason switch to premium AP */ 21770 uint16 trans_resn_prem_ap_sw; 21771 /* No of transition rejection sent */ 21772 uint16 trans_rejn_sent; 21773 /* No of trans rejn reason excessive frame loss */ 21774 uint16 trans_rejn_xcess_frm_loss; 21775 /* No of trans rejn reason excessive traffic delay */ 21776 uint16 trans_rejn_xcess_traffic_delay; 21777 /* No of trans rejn reason insufficient QoS capability */ 21778 uint16 trans_rejn_insuffic_qos_cap; 21779 /* No of trans rejn reason low RSSI */ 21780 uint16 trans_rejn_low_rssi; 21781 /* No of trans rejn reason high interference */ 21782 uint16 trans_rejn_high_interference; 21783 /* No of trans rejn reason service unavilable */ 21784 uint16 trans_rejn_service_unavail; 21785 /* No of beacon request rcvd */ 21786 uint16 bcn_req_rcvd; 21787 /* No of beacon report sent */ 21788 uint16 bcn_rep_sent; 21789 /* No of null beacon report sent */ 21790 uint16 null_bcn_rep_sent; 21791 /* No of wifi to cell switch */ 21792 uint16 wifi_to_cell; 21793 } wl_mbo_counters_t; 21794 21795 #define WL_FILS_IOV_MAJOR_VER 1 21796 #define WL_FILS_IOV_MINOR_VER 1 21797 #define WL_FILS_IOV_MAJOR_VER_SHIFT 8 21798 #define WL_FILS_IOV_VERSION \ 21799 ((WL_FILS_IOV_MAJOR_VER << WL_FILS_IOV_MAJOR_VER_SHIFT)| WL_FILS_IOV_MINOR_VER) 21800 21801 enum wl_fils_cmd_ids { 21802 WL_FILS_CMD_ADD_IND_IE = 1, 21803 WL_FILS_CMD_ADD_AUTH_DATA = 2, /* Deprecated, kept to prevent ROM invalidation */ 21804 WL_FILS_CMD_ADD_HLP_IE = 3, 21805 WL_FILS_CMD_ADD_CONNECT_PARAMS = 4, 21806 WL_FILS_CMD_GET_CONNECT_PARAMS = 5, 21807 /* Add before this !! */ 21808 WL_FILS_CMD_LAST 21809 }; 21810 21811 enum wl_fils_xtlv_id { 21812 WL_FILS_XTLV_IND_IE = 0x1, 21813 WL_FILS_XTLV_AUTH_DATA = 0x2, /* Deprecated, kept to prevent ROM invalidation */ 21814 WL_FILS_XTLV_HLP_IE = 0x3, 21815 WL_FILS_XTLV_ERP_USERNAME = 0x4, 21816 WL_FILS_XTLV_ERP_REALM = 0x5, 21817 WL_FILS_XTLV_ERP_RRK = 0x6, 21818 WL_FILS_XTLV_ERP_NEXT_SEQ_NUM = 0x7, 21819 WL_FILS_XTLV_KEK = 0x8, 21820 WL_FILS_XTLV_PMK = 0x9, 21821 WL_FILS_XTLV_TK = 0xa, 21822 WL_FILS_XTLV_PMKID = 0xb 21823 }; 21824 21825 #define WL_OCE_IOV_MAJOR_VER 1 21826 #define WL_OCE_IOV_MINOR_VER 1 21827 #define WL_OCE_IOV_MAJOR_VER_SHIFT 8 21828 #define WL_OCE_IOV_VERSION \ 21829 ((WL_OCE_IOV_MAJOR_VER << WL_OCE_IOV_MAJOR_VER_SHIFT)| WL_OCE_IOV_MINOR_VER) 21830 21831 enum wl_oce_cmd_ids { 21832 WL_OCE_CMD_ENABLE = 1, 21833 WL_OCE_CMD_PROBE_DEF_TIME = 2, 21834 WL_OCE_CMD_FD_TX_PERIOD = 3, 21835 WL_OCE_CMD_FD_TX_DURATION = 4, 21836 WL_OCE_CMD_RSSI_TH = 5, 21837 WL_OCE_CMD_RWAN_LINKS = 6, 21838 WL_OCE_CMD_CU_TRIGGER = 7, 21839 WL_OCE_CMD_TXPWR_USED = 8, 21840 /* Add before this !! */ 21841 WL_OCE_CMD_LAST 21842 }; 21843 21844 enum wl_oce_xtlv_id { 21845 WL_OCE_XTLV_ENABLE = 0x1, 21846 WL_OCE_XTLV_PROBE_DEF_TIME = 0x2, 21847 WL_OCE_XTLV_FD_TX_PERIOD = 0x3, 21848 WL_OCE_XTLV_FD_TX_DURATION = 0x4, 21849 WL_OCE_XTLV_RSSI_TH = 0x5, 21850 WL_OCE_XTLV_RWAN_LINKS = 0x6, 21851 WL_OCE_XTLV_CU_TRIGGER = 0x7, 21852 WL_OCE_XTLV_TXPWR_USED = 0x8 21853 }; 21854 21855 /* Robust Audio Video (RAV), MSCS (Mirrored Stream Classification Service) commands */ 21856 #define WL_RAV_MSCS_IOV_MAJOR_VER 1u 21857 #define WL_RAV_MSCS_IOV_MINOR_VER 1u 21858 #define WL_RAV_MSCS_IOV_MAJOR_VER_SHIFT 8u 21859 21860 #define WL_RAV_MSCS_IOV_VERSION \ 21861 ((WL_RAV_MSCS_IOV_MAJOR_VER << WL_RAV_MSCS_IOV_MAJOR_VER_SHIFT)| WL_RAV_MSCS_IOV_MINOR_VER) 21862 21863 enum wl_rav_mscs_cmd_ids { 21864 WL_RAV_MSCS_CMD_CONFIG = 1u, /* MSCS configuration */ 21865 WL_RAV_MSCS_CMD_ENABLE = 2u, /* Activate/deactivate MSCS */ 21866 WL_RAV_MSCS_CMD_UP_BITMAP = 3u, /* User priority bitmap */ 21867 WL_RAV_MSCS_CMD_UP_LIMIT = 4u, /* User priority limit */ 21868 WL_RAV_MSCS_CMD_STREAM_TIMEOUT = 5u, /* Stream timeout for MSCS Request */ 21869 WL_RAV_MSCS_CMD_FC_TYPE = 6u, /* Frame classifier type, IPv4, IPv6, etc. */ 21870 WL_RAV_MSCS_CMD_FC_MASK = 7u, /* Specifies the frame classifier mask */ 21871 WL_RAV_MSCS_CMD_REQ_TYPE = 8u, /* Indicates the MSCS Request type (add/remove) */ 21872 WL_RAV_MSCS_CMD_ASSOC_NEG = 9u, /* MSCS negotiation in the association */ 21873 21874 /* Add before this !! */ 21875 WL_RAV_MSCS_CMD_LAST 21876 }; 21877 21878 typedef enum wl_rav_mscs_xtlv_id { 21879 WL_RAV_MSCS_XTLV_CONFIG = 1u, 21880 WL_RAV_MSCS_XTLV_ENABLE = 2u, 21881 WL_RAV_MSCS_XTLV_UP_BITMAP = 3u, 21882 WL_RAV_MSCS_XTLV_UP_LIMIT = 4u, 21883 WL_RAV_MSCS_XTLV_STREAM_TIMEOUT = 5u, 21884 WL_RAV_MSCS_XTLV_FC_TYPE = 6u, 21885 WL_RAV_MSCS_XTLV_FC_MASK = 7u, 21886 WL_RAV_MSCS_XTLV_REQ_TYPE = 8u, 21887 WL_RAV_MSCS_XTLV_ASSOC_NEG = 9u 21888 } wl_rav_mscs_xtlv_id_t; 21889 21890 #define WL_ESP_IOV_MAJOR_VER 1 21891 #define WL_ESP_IOV_MINOR_VER 1 21892 #define WL_ESP_IOV_MAJOR_VER_SHIFT 8 21893 #define WL_ESP_IOV_VERSION \ 21894 ((WL_ESP_IOV_MAJOR_VER << WL_ESP_IOV_MAJOR_VER_SHIFT)| WL_ESP_IOV_MINOR_VER) 21895 21896 enum wl_esp_cmd_ids { 21897 WL_ESP_CMD_ENABLE = 1, 21898 WL_ESP_CMD_STATIC = 2, 21899 /* Add before this !! */ 21900 WL_ESP_CMD_LAST 21901 }; 21902 21903 enum wl_esp_xtlv_id { 21904 WL_ESP_XTLV_ENABLE = 0x1, 21905 WL_ESP_XTLV_STATIC_AC = 0x2, /* access category */ 21906 WL_ESP_XTLV_STATIC_TYPE = 0x3, /* data type */ 21907 WL_ESP_XTLV_STATIC_VAL = 0x4 21908 }; 21909 21910 #define WL_BCN_PROT_IOV_MAJOR_VER 1 21911 #define WL_BCN_PROT_IOV_MINOR_VER 1 21912 #define WL_BCN_PROT_IOV_MAJOR_VER_SHIFT 8 21913 #define WL_BCN_PROT_IOV_VERSION \ 21914 ((WL_BCN_PROT_IOV_MAJOR_VER << WL_BCN_PROT_IOV_MAJOR_VER_SHIFT)| WL_BCN_PROT_IOV_MINOR_VER) 21915 21916 enum wl_bcn_prot_cmd_ids { 21917 WL_BCN_PROT_CMD_ENABLE = 1, 21918 WL_BCN_PROT_CMD_COUNTERS = 2, 21919 /* Add before this !! */ 21920 WL_BCN_PROT_CMD_LAST 21921 }; 21922 21923 enum wl_bcn_prot_xtlv_id { 21924 WL_BCN_PROT_XTLV_ENABLE = 0x1, 21925 WL_BCN_PROT_XTLV_COUNTERS = 0x2 21926 }; 21927 21928 typedef struct wlc_bcn_prot_counters { 21929 uint32 no_en_bit; /* counts beacons without bcn prot enable bit at ext cap */ 21930 uint32 no_mme_ie; /* counts beacons without mme ie */ 21931 uint32 mic_fails; /* counts beacons failed mic check */ 21932 uint32 replay_fails; /* counts beacons failed replay check */ 21933 } wlc_bcn_prot_counters_t; 21934 #define BCN_PROT_COUNTERS_SIZE sizeof(wlc_bcn_prot_counters_t) 21935 21936 #define WL_DRR_IOV_MAJOR_VER 1 21937 #define WL_DRR_IOV_MINOR_VER 1 21938 #define WL_DRR_IOV_MAJOR_VER_SHIFT 8 21939 #define WL_DRR_IOV_VERSION \ 21940 ((WL_DRR_IOV_MAJOR_VER << WL_DRR_IOV_MAJOR_VER_SHIFT)| WL_DRR_IOV_MINOR_VER) 21941 21942 enum wl_drr_cmd_ids { 21943 WL_DRR_CMD_ENABLE = 1u, 21944 /* Add before this !! */ 21945 WL_DRR_CMD_LAST 21946 }; 21947 21948 enum wl_drr_xtlv_id { 21949 WL_DRR_XTLV_ENABLE = 0x1u 21950 }; 21951 21952 /* otpread command */ 21953 #define WL_OTPREAD_VER 1 21954 21955 typedef struct { 21956 uint16 version; /* cmd structure version */ 21957 uint16 cmd_len; /* cmd struct len */ 21958 uint32 rdmode; /* otp read mode */ 21959 uint32 rdoffset; /* byte offset into otp to start read */ 21960 uint32 rdsize; /* number of bytes to read */ 21961 } wl_otpread_cmd_t; 21962 21963 /* "otpecc_rows" command */ 21964 typedef struct { 21965 uint16 version; /* version of this structure */ 21966 uint16 len; /* len in bytes of this structure */ 21967 uint32 cmdtype; /* command type : 0 : read row data, 1 : ECC lock */ 21968 uint32 rowoffset; /* start row offset */ 21969 uint32 numrows; /* number of rows */ 21970 uint8 rowdata[]; /* read rows data */ 21971 } wl_otpecc_rows_t; 21972 21973 #define WL_OTPECC_ROWS_VER 1 21974 21975 #define WL_OTPECC_ROWS_CMD_READ 0 21976 #define WL_OTPECC_ROWS_CMD_LOCK 1 21977 21978 #define WL_OTPECC_ARGIDX_CMDTYPE 0 /* command type */ 21979 #define WL_OTPECC_ARGIDX_ROWOFFSET 1 /* start row offset */ 21980 #define WL_OTPECC_ARGIDX_NUMROWS 2 /* number of rows */ 21981 21982 /* "otpeccrows" raw data size per row */ 21983 #define WL_ECCDUMP_ROW_SIZE_BYTE 6 /* 4 bytes row data + 2 bytes ECC status */ 21984 #define WL_ECCDUMP_ROW_SIZE_WORD 3 21985 21986 /* otpECCstatus */ 21987 #define OTP_ECC_ENAB_SHIFT 13 21988 #define OTP_ECC_ENAB_MASK 0x7 21989 #define OTP_ECC_CORR_ST_SHIFT 12 21990 #define OTP_ECC_CORR_ST_MASK 0x1 21991 #define OTP_ECC_DBL_ERR_SHIFT 11 21992 #define OTP_ECC_DBL_ERR_MASK 0x1 21993 #define OTP_ECC_DED_ST_SHIFT 10 21994 #define OTP_ECC_DED_ST_MASK 0x1 21995 #define OTP_ECC_SEC_ST_SHIFT 9 21996 #define OTP_ECC_SEC_ST_MASK 0x1 21997 #define OTP_ECC_DATA_SHIFT 0 21998 #define OTP_ECC_DATA_MASK 0x7f 21999 22000 /* OTP_ECC_CORR_ST field */ 22001 #define OTP_ECC_MODE 1 22002 #define OTP_NO_ECC_MODE 0 22003 22004 /* OTP_ECC_ENAB field (bit15:13) : 22005 * When 2 or 3 bits are set, 22006 * it indicates that OTP ECC is enabled on the last row read. 22007 * Otherwise, ECC is disabled 22008 */ 22009 #define OTP_ECC_ENAB(val) \ 22010 (bcm_bitcount((uint8 *)&(val), sizeof(uint8)) > 1) 22011 22012 /* otp command details */ 22013 #define WL_OTP_IOV_MAJOR_VER 1u 22014 #define WL_OTP_IOV_MINOR_VER 1u 22015 #define WL_OTP_IOV_MAJOR_VER_SHIFT 8u 22016 #define WL_OTP_IOV_VERSION \ 22017 ((WL_OTP_IOV_MAJOR_VER << WL_OTP_IOV_MAJOR_VER_SHIFT) | WL_OTP_IOV_MINOR_VER) 22018 22019 /* OTP Regions HW/SW */ 22020 #define OTP_RGN_NONE 0u 22021 #define OTP_RGN_HW 1u 22022 #define OTP_RGN_SW 2u 22023 22024 /* OTP Lock Regions */ 22025 #define OTP_LOCK_RGN_NONE 0u 22026 #define OTP_LOCK_RGN_WAFER_SORT 1u 22027 #define OTP_LOCK_RGN_HASH_DATA 2u 22028 #define OTP_LOCK_RGN_FINAL_TEST 3u 22029 #define OTP_LOCK_RGN_AUTOLOAD 4u 22030 #define OTP_LOCK_RGN_UPPER_GU 5u 22031 #define OTP_LOCK_RGN_LOWER_GU 6u 22032 #define OTP_LOCK_RGN_HW_SW 7u 22033 #define OTP_LOCK_RGN_BT 8u 22034 #define OTP_LOCK_RGN_SECURE 9u 22035 #define OTP_LOCK_RGN_SECURE_V 10u 22036 #define OTP_LOCK_RGN_SECURE_VI_0 11u 22037 #define OTP_LOCK_RGN_SECURE_VI_1 12u 22038 22039 enum wl_otp_cmd_ids { 22040 WL_OTP_CMD_RGNSTATUS = 1u, 22041 WL_OTP_CMD_RGNDUMP = 2u, 22042 WL_OTP_CMD_RGNWRITE = 3u, 22043 WL_OTP_CMD_SBOOT = 4u, 22044 WL_OTP_CMD_RGNLOCK = 5u, 22045 22046 /* Add before this !!! */ 22047 WL_OTP_CMD_LAST 22048 }; 22049 22050 enum wl_otp_xtlv_id { 22051 WL_OTP_XTLV_NONE = 0u, /* Not valid otp tag */ 22052 WL_OTP_XTLV_RGN = 1u, /* OTP region type */ 22053 WL_OTP_XTLV_ADDR = 2u, /* OTP region start address */ 22054 WL_OTP_XTLV_SIZE = 3u, /* OTP region size */ 22055 WL_OTP_XTLV_DATA = 4u, /* OTP dump data */ 22056 22057 /* SBOOT TAGs: */ 22058 WL_OTP_XTLV_SBOOT_FW_SIG_ENABLE = 5u, /* FW signing enable bit */ 22059 WL_OTP_XTLV_SBOOT_FW_SIG_DISABLE = 6u, /* FW signing disaable bit */ 22060 WL_OTP_XTLV_SBOOT_ROM_PROTECT_ENABLE = 7u, /* ROM protect enable bit */ 22061 WL_OTP_XTLV_SBOOT_ROM_PROTECT_PATCH = 8u, /* ROM protect from patch */ 22062 WL_OTP_XTLV_SBOOT_HOST_READ_NONSEC_EN = 9u, /* Host read non secure enable bit */ 22063 WL_OTP_XTLV_SBOOT_HOST_READ_NONSEC_DIS = 10u, /* Host read non secure disable bit */ 22064 WL_OTP_XTLV_SBOOT_HOST_WRITE_NONSEC_EN = 11u, /* Host write non secure enable bit */ 22065 WL_OTP_XTLV_SBOOT_HOST_WRITE_NONSEC_DIS = 12u, /* Host write non secure disable bit */ 22066 WL_OTP_XTLV_SBOOT_DBGREGS_PROTECT_ENAB = 13u, /* ARM DBG regs protect enable bit */ 22067 WL_OTP_XTLV_SBOOT_DBGREGS_PROTECT_DIS = 14u, /* ARM DBG regs protect disable bit */ 22068 WL_OTP_XTLV_SBOOT_JTAG_PROTECT_ENAB = 15u, /* JTAG protect disable bit */ 22069 WL_OTP_XTLV_SBOOT_JTAG_PROTECT_DIS = 16u, /* JTAG protect re-enable bit */ 22070 WL_OTP_XTLV_SBOOT_TCAM_PROTECT_SIZE = 17u, /* TCAM protect enable size field 8 bits */ 22071 WL_OTP_XTLV_SBOOT_ACTIVATE_SECURITY = 18u, /* Active security enable bit */ 22072 WL_OTP_XTLV_SBOOT_KEY_REVOC_BITS = 19u, /* Key revocation Bits field 16 bits */ 22073 WL_OTP_XTLV_SBOOT_CUSTOMER_PUBLIC_KEY_1 = 20u, /* Customer public key 1 field 257 bits */ 22074 WL_OTP_XTLV_SBOOT_CUSTOMER_PUBLIC_KEY_2 = 21u, /* Customer public key 2 field 257 bits */ 22075 WL_OTP_XTLV_SBOOT_LOT_NUM = 22u, /* Chip lot num 17 bits */ 22076 WL_OTP_XTLV_SBOOT_WAFER_NUM = 23u, /* Chip wafer num 5 bits */ 22077 WL_OTP_XTLV_SBOOT_WAFER_X = 24u, /* Chip wafer X 9 bits */ 22078 WL_OTP_XTLV_SBOOT_WAFER_Y = 25u, /* Chip wafer Y 9 bits */ 22079 WL_OTP_XTLV_SBOOT_UNLOCK_HASH_VAL = 26u, /* Unlock Hash Val 128 bits */ 22080 }; 22081 22082 #define WL_LEAKY_AP_STATS_GT_TYPE 0 22083 #define WL_LEAKY_AP_STATS_PKT_TYPE 1 22084 typedef struct wlc_leaked_infra_guard_marker { 22085 /* type field for this TLV: WL_LEAKY_AP_STATS_GT_TYPE */ 22086 uint16 type; 22087 /* length field for this TLV */ 22088 uint16 len; 22089 /* guard sample sequence number; Updated by 1 on every guard sample */ 22090 uint32 seq_number; 22091 /* Guard time start time (tsf; PS indicated and acked) */ 22092 uint32 start_time; 22093 /* tsf timestamp for the GT end event */ 22094 uint32 gt_tsf_l; 22095 /* Guard time period in ms */ 22096 uint16 guard_duration; 22097 /* Number PPDUs in the notification */ 22098 uint16 num_pkts; 22099 /* Flags to indicate some states see below */ 22100 uint8 flag; 22101 /* pad for 32-bit alignment */ 22102 uint8 reserved[3]; 22103 } wlc_leaked_infra_guard_marker_t; 22104 22105 /* Flag information */ 22106 #define WL_LEAKED_GUARD_TIME_NONE 0 /* Not in any guard time */ 22107 #define WL_LEAKED_GUARD_TIME_FRTS (0x01 << 0) /* Normal FRTS power save */ 22108 #define WL_LEAKED_GUARD_TIME_SCAN (0x01 << 1) /* Channel switch due to scanning */ 22109 22110 #ifdef WLAWDL 22111 #define WL_LEAKED_GUARD_TIME_AWDL_PSF (0x01 << 2) /* Channel switch due to AWDL PSF */ 22112 #define WL_LEAKED_GUARD_TIME_AWDL_AW (0x01 << 3) /* Channel switch due to AWDL AW */ 22113 #endif /* WLAWDL */ 22114 22115 #define WL_LEAKED_GUARD_TIME_INFRA_STA (0x01 << 4) /* generic type infra sta channel switch */ 22116 #define WL_LEAKED_GUARD_TIME_TERMINATED (0x01 << 7) /* indicate a GT is terminated early */ 22117 22118 typedef struct wlc_leaked_infra_packet_stat { 22119 uint16 type; /* type field for this TLV: WL_LEAKY_AP_STATS_PKT_TYPE */ 22120 uint16 len; /* length field for this TLV */ 22121 uint16 ppdu_len_bytes; /* PPDU packet length in bytes */ 22122 uint16 num_mpdus; /* number of the MPDUs in the PPDU */ 22123 uint32 ppdu_time; /* PPDU arrival time at the begining of the guard time */ 22124 uint32 rate; /* PPDU packet rate; Received packet's data rate */ 22125 uint16 seq_number; /* sequence number */ 22126 int8 rssi; /* RSSI */ 22127 uint8 tid; /* tid */ 22128 } wlc_leaked_infra_packet_stat_t; 22129 22130 /* Wake timer structure definition */ 22131 #define WAKE_TIMER_VERSION 1 22132 #define WAKE_TIMER_NOLIMIT 0xFFFF 22133 22134 typedef struct wake_timer { 22135 uint16 ver; 22136 uint16 len; 22137 uint16 limit; /* number of events to deliver 22138 * 0-disable, 0xffff-indefinite, num_events otherwise 22139 */ 22140 uint16 count; /* number of events delivered since enable (get only) */ 22141 uint16 period; /* timeout/period in milliseconds */ 22142 } wake_timer_t; 22143 22144 typedef struct wl_desense_restage_gain { 22145 uint16 version; 22146 uint16 length; 22147 uint32 band; 22148 uint8 num_cores; 22149 uint8 desense_array[WL_TX_CHAINS_MAX]; 22150 uint8 PAD[3]; 22151 } wl_desense_restage_gain_t; 22152 22153 #define MAX_UCM_CHAINS 5 22154 #define MAX_UCM_PROFILES 10 22155 #define UCM_PROFILE_VERSION_1 1 22156 22157 /* UCM per chain attribute struct */ 22158 typedef struct wlc_btcx_chain_attr { 22159 uint16 length; /* chain attr length, version is same as profile version */ 22160 int8 desense_level; /* per chain desense level */ 22161 int8 ack_pwr_strong_rssi; /* per chain ack power at strong rssi */ 22162 int8 ack_pwr_weak_rssi; /* per chain ack power at weak rssi */ 22163 int8 tx_pwr_strong_rssi; /* per chain tx power at strong rssi */ 22164 int8 tx_pwr_weak_rssi; /* per chain tx power at weak rssi */ 22165 uint8 PAD[1]; /* additional bytes for alignment */ 22166 } wlc_btcx_chain_attr_t; 22167 22168 typedef struct wlc_btcx_profile_v1 { 22169 uint16 version; /* UCM profile version */ 22170 uint16 length; /* profile size */ 22171 uint16 fixed_length; /* size of the fixed portion of the profile */ 22172 uint8 init; /* profile initialized or not */ 22173 uint8 chain_attr_count; /* Number of elements in chain_attr array */ 22174 uint8 profile_index; /* profile index */ 22175 uint8 mode_strong_wl_bt; /* Mode under strong WLAN and BT RSSI */ 22176 uint8 mode_weak_wl; /* Mode under weak WLAN RSSI */ 22177 uint8 mode_weak_bt; /* Mode under weak BT RSSI */ 22178 uint8 mode_weak_wl_bt; /* Mode under weak BT and WLAN RSSI */ 22179 int8 mode_wl_hi_lo_rssi_thresh; /* Strong to weak WLAN RSSI threshold for mode selection */ 22180 int8 mode_wl_lo_hi_rssi_thresh; /* Weak to strong WLAN RSSI threshold for mode selection */ 22181 int8 mode_bt_hi_lo_rssi_thresh; /* Strong to weak BT RSSI threshold for mode selection */ 22182 int8 mode_bt_lo_hi_rssi_thresh; /* Weak to strong BT RSSI threshold for mode selection */ 22183 int8 desense_wl_hi_lo_rssi_thresh; /* Strong to weak RSSI threshold for desense */ 22184 int8 desense_wl_lo_hi_rssi_thresh; /* Weak to strong RSSI threshold for desense */ 22185 int8 ack_pwr_wl_hi_lo_rssi_thresh; /* Strong to weak RSSI threshold for ACK power */ 22186 int8 ack_pwr_wl_lo_hi_rssi_thresh; /* Weak to strong RSSI threshold for ACK power */ 22187 int8 tx_pwr_wl_hi_lo_rssi_thresh; /* Strong to weak RSSI threshold for Tx power */ 22188 int8 tx_pwr_wl_lo_hi_rssi_thresh; /* Weak to strong RSSI threshold for Tx power */ 22189 uint8 PAD[1]; /* additional bytes for 4 byte alignment */ 22190 wlc_btcx_chain_attr_t chain_attr[]; /* variable length array with chain attributes */ 22191 } wlc_btcx_profile_v1_t; 22192 22193 #define UCM_PROFILE_VERSION_2 2u 22194 22195 typedef struct wlc_btcx_profile_v2 { 22196 uint16 version; /* UCM profile version */ 22197 uint16 length; /* profile size */ 22198 uint16 fixed_length; /* size of the fixed portion of the profile */ 22199 uint8 init; /* profile initialized or not */ 22200 uint8 chain_attr_count; /* Number of elements in chain_attr array */ 22201 uint8 profile_index; /* profile index */ 22202 uint8 mode_strong_wl_bt; /* Mode under strong WLAN and BT RSSI */ 22203 uint8 mode_weak_wl; /* Mode under weak WLAN RSSI */ 22204 uint8 mode_weak_bt; /* Mode under weak BT RSSI */ 22205 uint8 mode_weak_wl_bt; /* Mode under weak BT and WLAN RSSI */ 22206 int8 mode_wl_hi_lo_rssi_thresh; /* Strong to weak WLAN RSSI threshold for mode selection */ 22207 int8 mode_wl_lo_hi_rssi_thresh; /* Weak to strong WLAN RSSI threshold for mode selection */ 22208 int8 mode_bt_hi_lo_rssi_thresh; /* Strong to weak BT RSSI threshold for mode selection */ 22209 int8 mode_bt_lo_hi_rssi_thresh; /* Weak to strong BT RSSI threshold for mode selection */ 22210 int8 desense_wl_hi_lo_rssi_thresh; /* Strong to weak RSSI threshold for desense */ 22211 int8 desense_wl_lo_hi_rssi_thresh; /* Weak to strong RSSI threshold for desense */ 22212 int8 ack_pwr_wl_hi_lo_rssi_thresh; /* Strong to weak RSSI threshold for ACK power */ 22213 int8 ack_pwr_wl_lo_hi_rssi_thresh; /* Weak to strong RSSI threshold for ACK power */ 22214 int8 tx_pwr_wl_hi_lo_rssi_thresh; /* Strong to weak RSSI threshold for Tx power */ 22215 int8 tx_pwr_wl_lo_hi_rssi_thresh; /* Weak to strong RSSI threshold for Tx power */ 22216 uint8 hybrid_ant_core_config; /* Select antenna configuration for hybrid */ 22217 wlc_btcx_chain_attr_t chain_attr[]; /* variable length array with chain attributes */ 22218 } wlc_btcx_profile_v2_t; 22219 22220 #define SSSR_D11_RESET_SEQ_STEPS 5u 22221 #define SSSR_HWA_RESET_SEQ_STEPS 8u 22222 22223 #define SSSR_REG_INFO_VER_0 0u 22224 #define SSSR_REG_INFO_VER_1 1u 22225 #define SSSR_REG_INFO_VER_2 2u 22226 #define SSSR_REG_INFO_VER_3 3u 22227 22228 typedef struct sssr_reg_info_v0 { 22229 uint16 version; 22230 uint16 length; /* length of the structure validated at host */ 22231 struct { 22232 struct { 22233 uint32 pmuintmask0; 22234 uint32 pmuintmask1; 22235 uint32 resreqtimer; 22236 uint32 macresreqtimer; 22237 uint32 macresreqtimer1; 22238 } base_regs; 22239 } pmu_regs; 22240 struct { 22241 struct { 22242 uint32 intmask; 22243 uint32 powerctrl; 22244 uint32 clockcontrolstatus; 22245 uint32 powerctrl_mask; 22246 } base_regs; 22247 } chipcommon_regs; 22248 struct { 22249 struct { 22250 uint32 clockcontrolstatus; 22251 uint32 clockcontrolstatus_val; 22252 } base_regs; 22253 struct { 22254 uint32 resetctrl; 22255 uint32 itopoobb; 22256 } wrapper_regs; 22257 } arm_regs; 22258 struct { 22259 struct { 22260 uint32 ltrstate; 22261 uint32 clockcontrolstatus; 22262 uint32 clockcontrolstatus_val; 22263 } base_regs; 22264 struct { 22265 uint32 itopoobb; 22266 } wrapper_regs; 22267 } pcie_regs; 22268 struct { 22269 struct { 22270 uint32 ioctrl; 22271 } wrapper_regs; 22272 uint32 vasip_sr_addr; 22273 uint32 vasip_sr_size; 22274 } vasip_regs; 22275 struct { 22276 struct { 22277 uint32 xmtaddress; 22278 uint32 xmtdata; 22279 uint32 clockcontrolstatus; 22280 uint32 clockcontrolstatus_val; 22281 } base_regs; 22282 struct { 22283 uint32 resetctrl; 22284 uint32 itopoobb; 22285 uint32 ioctrl; 22286 uint32 ioctrl_resetseq_val[SSSR_D11_RESET_SEQ_STEPS]; 22287 } wrapper_regs; 22288 uint32 sr_size; 22289 } mac_regs[MAX_NUM_D11CORES]; 22290 } sssr_reg_info_v0_t; 22291 22292 typedef struct sssr_reg_info_v1 { 22293 uint16 version; 22294 uint16 length; /* length of the structure validated at host */ 22295 struct { 22296 struct { 22297 uint32 pmuintmask0; 22298 uint32 pmuintmask1; 22299 uint32 resreqtimer; 22300 uint32 macresreqtimer; 22301 uint32 macresreqtimer1; 22302 } base_regs; 22303 } pmu_regs; 22304 struct { 22305 struct { 22306 uint32 intmask; 22307 uint32 powerctrl; 22308 uint32 clockcontrolstatus; 22309 uint32 powerctrl_mask; 22310 } base_regs; 22311 } chipcommon_regs; 22312 struct { 22313 struct { 22314 uint32 clockcontrolstatus; 22315 uint32 clockcontrolstatus_val; 22316 } base_regs; 22317 struct { 22318 uint32 resetctrl; 22319 uint32 itopoobb; 22320 } wrapper_regs; 22321 } arm_regs; 22322 struct { 22323 struct { 22324 uint32 ltrstate; 22325 uint32 clockcontrolstatus; 22326 uint32 clockcontrolstatus_val; 22327 } base_regs; 22328 struct { 22329 uint32 itopoobb; 22330 } wrapper_regs; 22331 } pcie_regs; 22332 struct { 22333 struct { 22334 uint32 ioctrl; 22335 } wrapper_regs; 22336 uint32 vasip_sr_addr; 22337 uint32 vasip_sr_size; 22338 } vasip_regs; 22339 struct { 22340 struct { 22341 uint32 xmtaddress; 22342 uint32 xmtdata; 22343 uint32 clockcontrolstatus; 22344 uint32 clockcontrolstatus_val; 22345 } base_regs; 22346 struct { 22347 uint32 resetctrl; 22348 uint32 itopoobb; 22349 uint32 ioctrl; 22350 uint32 ioctrl_resetseq_val[SSSR_D11_RESET_SEQ_STEPS]; 22351 } wrapper_regs; 22352 uint32 sr_size; 22353 } mac_regs[MAX_NUM_D11CORES]; 22354 struct { 22355 uint32 dig_sr_addr; 22356 uint32 dig_sr_size; 22357 } dig_mem_info; 22358 } sssr_reg_info_v1_t; 22359 22360 #define MAX_NUM_D11_CORES_WITH_SCAN 3u 22361 22362 typedef struct sssr_reg_info_v2 { 22363 uint16 version; 22364 uint16 length; /* length of the structure validated at host */ 22365 struct { 22366 struct { 22367 uint32 pmuintmask0; 22368 uint32 pmuintmask1; 22369 uint32 resreqtimer; 22370 uint32 macresreqtimer; 22371 uint32 macresreqtimer1; 22372 uint32 macresreqtimer2; 22373 } base_regs; 22374 } pmu_regs; 22375 struct { 22376 struct { 22377 uint32 intmask; 22378 uint32 powerctrl; 22379 uint32 clockcontrolstatus; 22380 uint32 powerctrl_mask; 22381 } base_regs; 22382 } chipcommon_regs; 22383 struct { 22384 struct { 22385 uint32 clockcontrolstatus; 22386 uint32 clockcontrolstatus_val; 22387 } base_regs; 22388 struct { 22389 uint32 resetctrl; 22390 uint32 extrsrcreq; 22391 } wrapper_regs; 22392 } arm_regs; 22393 struct { 22394 struct { 22395 uint32 ltrstate; 22396 uint32 clockcontrolstatus; 22397 uint32 clockcontrolstatus_val; 22398 } base_regs; 22399 struct { 22400 uint32 extrsrcreq; 22401 } wrapper_regs; 22402 } pcie_regs; 22403 struct { 22404 struct { 22405 uint32 xmtaddress; 22406 uint32 xmtdata; 22407 uint32 clockcontrolstatus; 22408 uint32 clockcontrolstatus_val; 22409 } base_regs; 22410 struct { 22411 uint32 resetctrl; 22412 uint32 extrsrcreq; 22413 uint32 ioctrl; 22414 uint32 ioctrl_resetseq_val[SSSR_D11_RESET_SEQ_STEPS]; 22415 } wrapper_regs; 22416 uint32 sr_size; 22417 } mac_regs[MAX_NUM_D11_CORES_WITH_SCAN]; 22418 struct { 22419 uint32 dig_sr_addr; 22420 uint32 dig_sr_size; 22421 } dig_mem_info; 22422 } sssr_reg_info_v2_t; 22423 22424 typedef struct sssr_reg_info_v3 { 22425 uint16 version; 22426 uint16 length; /* length of the structure validated at host */ 22427 struct { 22428 struct { 22429 uint32 pmuintmask0; 22430 uint32 pmuintmask1; 22431 uint32 resreqtimer; 22432 uint32 macresreqtimer; 22433 uint32 macresreqtimer1; 22434 uint32 macresreqtimer2; 22435 } base_regs; 22436 } pmu_regs; 22437 struct { 22438 struct { 22439 uint32 intmask; 22440 uint32 powerctrl; 22441 uint32 clockcontrolstatus; 22442 uint32 powerctrl_mask; 22443 } base_regs; 22444 } chipcommon_regs; 22445 struct { 22446 struct { 22447 uint32 clockcontrolstatus; 22448 uint32 clockcontrolstatus_val; 22449 } base_regs; 22450 struct { 22451 uint32 resetctrl; 22452 uint32 extrsrcreq; 22453 } wrapper_regs; 22454 } arm_regs; 22455 struct { 22456 struct { 22457 uint32 ltrstate; 22458 uint32 clockcontrolstatus; 22459 uint32 clockcontrolstatus_val; 22460 } base_regs; 22461 struct { 22462 uint32 extrsrcreq; 22463 } wrapper_regs; 22464 } pcie_regs; 22465 struct { 22466 struct { 22467 uint32 xmtaddress; 22468 uint32 xmtdata; 22469 uint32 clockcontrolstatus; 22470 uint32 clockcontrolstatus_val; 22471 } base_regs; 22472 struct { 22473 uint32 resetctrl; 22474 uint32 extrsrcreq; 22475 uint32 ioctrl; 22476 uint32 ioctrl_resetseq_val[SSSR_D11_RESET_SEQ_STEPS]; 22477 } wrapper_regs; 22478 uint32 sr_size; 22479 } mac_regs[MAX_NUM_D11_CORES_WITH_SCAN]; 22480 struct { 22481 uint32 dig_sr_addr; 22482 uint32 dig_sr_size; 22483 } dig_mem_info; 22484 uint32 fis_enab; 22485 struct { 22486 struct { 22487 uint32 clkenable; 22488 uint32 clkgatingenable; 22489 uint32 clkext; 22490 uint32 clkctlstatus; 22491 } base_regs; 22492 struct { 22493 uint32 ioctrl; 22494 uint32 resetctrl; 22495 } wrapper_regs; 22496 uint32 hwa_resetseq_val[SSSR_HWA_RESET_SEQ_STEPS]; 22497 } hwa_regs; 22498 } sssr_reg_info_v3_t; 22499 22500 #ifndef SSSR_REG_INFO_HAS_ALIAS 22501 typedef sssr_reg_info_v0_t sssr_reg_info_t; 22502 #define SSSR_REG_INFO_VER SSSR_REG_INFO_VER_0 22503 #endif 22504 22505 /* A wrapper structure for all versions of SSSR register information structures */ 22506 typedef union sssr_reg_info { 22507 sssr_reg_info_v0_t rev0; 22508 sssr_reg_info_v1_t rev1; 22509 sssr_reg_info_v2_t rev2; 22510 sssr_reg_info_v3_t rev3; 22511 } sssr_reg_info_cmn_t; 22512 22513 /* ADaptive Power Save(ADPS) structure definition */ 22514 #define WL_ADPS_IOV_MAJOR_VER 1 22515 #define WL_ADPS_IOV_MINOR_VER 0 22516 #define WL_ADPS_IOV_MAJOR_VER_SHIFT 8 22517 #define WL_ADPS_IOV_VER \ 22518 ((WL_ADPS_IOV_MAJOR_VER << WL_ADPS_IOV_MAJOR_VER_SHIFT) | WL_ADPS_IOV_MINOR_VER) 22519 22520 #define ADPS_NUM_DIR 2 22521 #define ADPS_RX 0 22522 #define ADPS_TX 1 22523 22524 #define WL_ADPS_IOV_MODE 0x0001 22525 #define WL_ADPS_IOV_RSSI 0x0002 22526 #define WL_ADPS_IOV_DUMP 0x0003 22527 #define WL_ADPS_IOV_DUMP_CLEAR 0x0004 22528 #define WL_ADPS_IOV_SUSPEND 0x0005 22529 #define WL_ADPS_IOV_GAIN 0x0006 22530 #define WL_ADPS_IOV_RESET_GAIN 0x0007 22531 22532 #define ADPS_SUMMARY_STEP_NUM 2 22533 #define ADPS_SUMMARY_STEP_LOW 0 22534 #define ADPS_SUMMARY_STEP_HIGH 1 22535 22536 #define ADPS_SUB_IOV_VERSION_1 1 22537 #define ADPS_SUB_IOV_VERSION_2 2 22538 22539 /* suspend/resume ADPS by wl/private command from host */ 22540 #define ADPS_RESUME 0u 22541 #define ADPS_SUSPEND 1u 22542 22543 typedef struct wl_adps_params_v1 { 22544 uint16 version; 22545 uint16 length; 22546 uint8 band; /* band - 2G or 5G */ 22547 uint8 mode; /* operation mode, default = 0 (ADPS disable) */ 22548 uint16 padding; 22549 } wl_adps_params_v1_t; 22550 22551 typedef struct wl_adps_rssi { 22552 int32 thresh_hi; /* rssi threshold to resume ADPS operation */ 22553 int32 thresh_lo; /* rssi threshold to suspend ADPS operation */ 22554 } wl_adps_rssi_t; 22555 22556 typedef struct wl_adps_rssi_params_v1 { 22557 uint16 version; 22558 uint16 length; 22559 uint8 band; 22560 uint8 padding[3]; 22561 wl_adps_rssi_t rssi; 22562 } wl_adps_rssi_params_v1_t; 22563 22564 typedef struct adps_stat_elem { 22565 uint32 duration; /* each step duration time (mSec) */ 22566 uint32 counts; /* each step hit count number */ 22567 } adps_stat_elem_t; 22568 22569 typedef struct wl_adps_dump_summary_v1 { 22570 uint16 version; 22571 uint16 length; 22572 uint8 mode; /* operation mode: On/Off */ 22573 uint8 flags; /* restrict flags */ 22574 uint8 current_step; /* current step */ 22575 uint8 padding; 22576 adps_stat_elem_t stat[ADPS_SUMMARY_STEP_NUM]; /* statistics */ 22577 } wl_adps_dump_summary_v1_t; 22578 22579 typedef struct wl_adps_dump_summary_v2 { 22580 uint16 version; 22581 uint16 length; 22582 uint8 mode; /* operation mode: On/Off */ 22583 uint8 current_step; /* current step */ 22584 uint8 padding[2]; 22585 uint32 flags; /* restrict flags */ 22586 adps_stat_elem_t stat[ADPS_SUMMARY_STEP_NUM]; /* statistics */ 22587 } wl_adps_dump_summary_v2_t; 22588 22589 typedef struct wl_adps_suspend_v1 { 22590 uint16 version; 22591 uint16 length; 22592 uint8 suspend; /* 1: suspend 0: resume */ 22593 uint8 padding[3]; 22594 } wl_adps_suspend_v1_t; 22595 22596 /* For ADPS energy gain */ 22597 typedef struct wlc_adps_energy_gain_data { 22598 uint32 pm_dur_gain; /* gain of pm duration by ADPS */ 22599 uint32 step0_dur; /* duration of ADPS STEP0(PM MAX + PSPOLL PRD) */ 22600 uint32 wake_up_dur; /* duration of wake up state */ 22601 uint32 pad; 22602 uint64 tx_tot_bytes; /* Total Tx bytes */ 22603 } wlc_adps_energy_gain_data_t; 22604 22605 typedef struct wl_adps_energy_gain_v1 { 22606 uint16 version; 22607 uint16 length; 22608 uint32 pad; 22609 wlc_adps_energy_gain_data_t gain_data[MAX_BANDS]; 22610 } wl_adps_energy_gain_v1_t; 22611 22612 typedef struct wlc_btc_2gchain_dis { 22613 uint16 ver; 22614 uint16 len; 22615 uint8 chain_dis; 22616 uint8 flag; 22617 } wlc_btc_2gchain_dis_t; 22618 22619 /* TDLS structure definition */ 22620 #define WL_TDLS_T_VERSION_V1 1 22621 typedef struct wl_tdls_dump_summary_v1 { 22622 uint16 version; 22623 uint16 length; /* length of the entire structure */ 22624 uint32 txsetupreq; /* tdls setup req sent */ 22625 uint32 txsetupresp; /* tdls setup resp sent */ 22626 uint32 txsetupcfm; /* tdls setup confirm sent */ 22627 uint32 txteardown; /* tdls teardwon frames sent */ 22628 uint32 txptireq; /* tdls pti req frames sent */ 22629 uint32 txptiresp; /* tdls pti resp frames sent */ 22630 uint32 txchswreq; /* tdls chsw req frames sent */ 22631 uint32 txchswresp; /* tdls chsw resp frame sent */ 22632 uint32 rxsetupreq; /* tdls setup req rcvd */ 22633 uint32 rxdsetupresp; /* tdls setup resp rcvd */ 22634 uint32 rxsetupcfm; /* tdls setup confirm rcvd */ 22635 uint32 rxteardown; /* tdls teardown frames rcvd */ 22636 uint32 rxptireq; /* tdls pti req frames rcvd */ 22637 uint32 rxptiresp; /* tdls pti resp frames rcvd */ 22638 uint32 rxchswreq; /* tdls chsw req frames rcvd */ 22639 uint32 rxchswresp; /* tdls chsw resp frames rcvd */ 22640 uint32 discard; /* frames discarded due to full buffer */ 22641 uint32 ubuffered; /* frames buffered by TDLS txmod */ 22642 uint32 buf_reinserted; /* frames reinserted */ 22643 uint32 idletime; /* time since no traffic on tdls link */ 22644 uint32 uptime; /* time since tdls link connected */ 22645 uint32 tx_cnt; /* frames txed over tdls link */ 22646 uint32 rx_cnt; /* frames rcvd over tdls link */ 22647 uint32 blist_cnt; /* number of tdls black list */ 22648 uint32 scb_flags; /* connected tdls scb flags */ 22649 struct ether_addr peer_addr; /* connected peer addr */ 22650 uint8 padding[2]; 22651 } wl_tdls_dump_summary_v1_t; 22652 22653 #define WLC_BTC_2GCHAIN_DIS_REASSOC 0x1 22654 #define WLC_BTC_2GCHAIN_DIS_VER1 0x1 22655 #define WLC_BTC_2GCHAIN_DIS_VER1_LEN 6 22656 22657 /* --- BTCX WiFi Protection (btc_wifi_prot iovar) --- */ 22658 22659 /* Current iovar structure version: 1 */ 22660 #define WL_BTC_WIFI_PROT_VER_1 1 22661 22662 typedef struct wl_btc_wifi_prot_v1 { 22663 uint16 ver; /* version */ 22664 uint16 len; /* total length */ 22665 uint8 data[]; /* bcm_xtlv_t payload */ 22666 } wl_btc_wifi_prot_v1_t; 22667 22668 /* Xtlv tags (protection type) and data */ 22669 #define WL_BTC_WIFI_PROT_M1_M4 1 22670 typedef struct wl_btc_wifi_prot_m1_m4 { 22671 uint32 enable; /* enable/disable m1-m4 protection */ 22672 uint32 timeout; /* maximum timeout in ms (0: default) */ 22673 } wl_btc_wifi_prot_m1_m4_t; 22674 22675 #define WL_BTC_WIFI_PROT_ENABLE 1 22676 #define WL_BTC_WIFI_PROT__DISABLE 0 22677 22678 /* --- End BTCX WiFi Protection --- */ 22679 22680 /* --- BTCX ULMU disable (btc_ulmu_config iovar) --- */ 22681 22682 /* Version number */ 22683 #define WL_BTC_ULMU_CONFIG_VER_1 1 22684 typedef struct wl_btc_ulmu_config_v1 { 22685 uint16 version; /* btc_ulmu_config version */ 22686 uint16 len; /* Total length */ 22687 uint32 ulmu_bt_task_bm; /* BT Task bimtap for ULMU disable */ 22688 uint32 ulmu_bt_period_th; /* BT period thresh for ULMU disable */ 22689 } wl_btc_ulmu_config_v1_t; 22690 22691 /* --- End BTCX ULMU config --- */ 22692 22693 #define RPSNOA_IOV_MAJOR_VER 1 22694 #define RPSNOA_IOV_MINOR_VER 1 22695 #define RPSNOA_IOV_MAJOR_VER_SHIFT 8 22696 #define RPSNOA_IOV_VERSION \ 22697 ((RPSNOA_IOV_MAJOR_VER << RPSNOA_IOV_MAJOR_VER_SHIFT)| RPSNOA_IOV_MINOR_VER) 22698 22699 enum wl_rpsnoa_cmd_ids { 22700 WL_RPSNOA_CMD_ENABLE = 1, 22701 WL_RPSNOA_CMD_STATUS, 22702 WL_RPSNOA_CMD_PARAMS, 22703 WL_RPSNOA_CMD_LAST 22704 }; 22705 22706 typedef struct rpsnoa_cmnhdr { 22707 uint16 ver; /* cmd structure version */ 22708 uint16 len; /* cmd structure len */ 22709 uint32 subcmd; 22710 uint32 cnt; 22711 } rpsnoa_cmnhdr_t; 22712 22713 typedef struct rpsnoa_data { 22714 int16 band; 22715 int16 value; 22716 } rpsnoa_data_t; 22717 22718 typedef struct rpsnoa_stats { 22719 int16 band; 22720 int16 state; 22721 uint32 sleep_dur; 22722 uint32 sleep_avail_dur; 22723 uint32 last_pps; 22724 } rpsnoa_stats_t; 22725 22726 typedef struct rpsnoa_param { 22727 uint16 band; 22728 uint8 level; 22729 uint8 stas_assoc_check; 22730 uint32 pps; 22731 uint32 quiet_time; 22732 } rpsnoa_param_t; 22733 22734 typedef struct rpsnoa_iovar { 22735 rpsnoa_cmnhdr_t hdr; 22736 rpsnoa_data_t data[1]; 22737 } rpsnoa_iovar_t; 22738 22739 typedef struct rpsnoa_iovar_status { 22740 rpsnoa_cmnhdr_t hdr; 22741 rpsnoa_stats_t stats[1]; 22742 } rpsnoa_iovar_status_t; 22743 22744 typedef struct rpsnoa_iovar_params { 22745 rpsnoa_cmnhdr_t hdr; 22746 rpsnoa_param_t param[1]; 22747 } rpsnoa_iovar_params_t; 22748 22749 /* Per-interface reportable stats types */ 22750 enum wl_ifstats_xtlv_id { 22751 /* global */ 22752 WL_IFSTATS_XTLV_SLICE_INDEX = 1, 22753 WL_IFSTATS_XTLV_IF_INDEX = 2, 22754 WL_IFSTATS_XTLV_MAC_ADDR = 3, 22755 WL_IFSTATS_XTLV_REPORT_CMD = 4, /* Comes in an iovar */ 22756 WL_IFSTATS_XTLV_BUS_PCIE = 5, 22757 WL_STATS_XTLV_BUS_PCIE_TX_HISTOGRAMS = 6, 22758 WL_STATS_XTLV_BUS_PCIE_TX_QUEUE_DEPTH = 7, 22759 /* history of blocks freed most recently */ 22760 WL_STATS_XTLV_FBINFO_STATS = 8, 22761 22762 /* Report data across all SCBs using ecounters */ 22763 /* STA_info ecounters */ 22764 WL_IFSTATS_XTLV_WL_STA_INFO_ECOUNTERS = 0x100, 22765 /* For AMPDU stat sub-types requested in a different format */ 22766 /* these could be sum and report stats across slices. OR 22767 * report sub-types in pairs so host can sum and add. 22768 * Information sent here is across slices, therefore global 22769 */ 22770 WL_IFSTATS_XTLV_TX_AMPDU_STATS = 0x101, 22771 WL_IFSTATS_XTLV_RX_AMPDU_STATS = 0x102, 22772 /* scb ecounter statistics */ 22773 WL_IFSTATS_XTLV_SCB_ECOUNTERS = 0x103, 22774 /* Global NAN stats */ 22775 WL_IFSTATS_XTLV_NAN_STATS = 0x104, 22776 WL_IFSTATS_XTLV_CHAN_STATS = 0x105, 22777 /* TDLS state */ 22778 WL_IFSTATS_XTLV_IF_TDLS_STATE = 0x106, 22779 WL_IFSTATS_XTLV_KEY_PLUMB_INFO = 0x107, 22780 /* HE TX related stats */ 22781 WL_IFSTATS_XTLV_HE_TXMU_STATS = 0x108, 22782 22783 WL_IFSTATS_XTLV_SC_PERIODIC_STATE = 0x109, 22784 WL_IFSTATS_XTLV_WBUS_PERIODIC_STATE = 0x10A, 22785 22786 /* Per-slice information 22787 * Per-interface reporting could also include slice specific data 22788 */ 22789 /* xtlv container for reporting */ 22790 WL_IFSTATS_XTLV_WL_SLICE = 0x301, 22791 /* Per-slice AMPDU stats */ 22792 WL_IFSTATS_XTLV_WL_SLICE_TX_AMPDU_DUMP = 0x302, 22793 WL_IFSTATS_XTLV_WL_SLICE_RX_AMPDU_DUMP = 0x303, 22794 /* Per-slice BTCOEX stats */ 22795 WL_IFSTATS_XTLV_WL_SLICE_BTCOEX = 0x304, 22796 /* V11_WLCNTRS used in ecounters */ 22797 WL_IFSTATS_XTLV_WL_SLICE_V11_WLCNTRS = 0x305, 22798 /* V30_WLCNTRS Used in ecounters */ 22799 WL_IFSTATS_XTLV_WL_SLICE_V30_WLCNTRS = 0x306, 22800 /* phy,ucode,scan pwrstats */ 22801 WL_IFSTATS_XTLV_WL_SLICE_PWRSTATS_PHY = 0x307, 22802 WL_IFSTATS_XTLV_WL_SLICE_PWRSTATS_SCAN = 0x308, 22803 WL_IFSTATS_XTLV_WL_SLICE_PWRSTATS_WAKE_V2 = 0x309, 22804 /* Per-slice LTECOEX stats */ 22805 WL_IFSTATS_XTLV_WL_SLICE_LTECOEX = 0x30A, 22806 /* TVPM ecounters */ 22807 WL_IFSTATS_XTLV_WL_SLICE_TVPM = 0x30B, 22808 /* TDMTX ecounters */ 22809 WL_IFSTATS_XTLV_WL_SLICE_TDMTX = 0x30C, 22810 /* Slice specific state capture in periodic fasion */ 22811 WL_SLICESTATS_XTLV_PERIODIC_STATE = 0x30D, 22812 WL_SLICESTATS_XTLV_HIST_TX_STATS = 0x30E, 22813 WL_SLICESTATS_XTLV_HIST_RX_STATS = 0x30F, 22814 /* TX histograms */ 22815 WL_STATS_XTLV_WL_SLICE_TX_HISTOGRAMS = 0x310, 22816 /* TX queue depth */ 22817 WL_STATS_XTLV_WL_SLICE_TX_QUEUE_DEPTH = 0x311, 22818 /* Latency instrumentation debug */ 22819 WL_STATS_XTLV_WL_QUEUE_STOP = 0x312, 22820 /* Beamforming counters */ 22821 WL_IFSTATS_XTLV_WL_SLICE_TXBF = 0x313, 22822 /* Per-slice BTCOEX task duration stats */ 22823 WL_IFSTATS_XTLV_WL_SLICE_BTCOEX_TSKDUR_STATS = 0x314, 22824 /* Per-slice RC1 COEX (NR5G Coex) stats */ 22825 WL_IFSTATS_XTLV_WL_SLICE_NR5GCX = 0x315, 22826 /* Per-slice RC1 COEX (RC1 Coex) stats for trunk and future branches */ 22827 WL_IFSTATS_XTLV_WL_SLICE_RC1CX = 0x315, 22828 /* Per-slice sta offload stats */ 22829 WL_IFSTATS_XTLV_WL_SLICE_STA_OFLD_STATS = 0x316, 22830 /* Per-Slice [only aux] btcec sc stats */ 22831 WL_IFSTATS_XTLV_WL_SLICE_BTCEC_PERIODIC_STATS = 0x317, 22832 /* Per-Slice sc lq stats */ 22833 WL_IFSTATS_XTLV_SC_CHANIM_PERIODIC_STATS = 0x318, 22834 /* Per-slice RC2 COEX stats */ 22835 WL_IFSTATS_XTLV_WL_SLICE_RC2CX = 0x319, 22836 22837 /* Per-interface */ 22838 /* XTLV container for reporting */ 22839 WL_IFSTATS_XTLV_IF = 0x501, 22840 /* Generic stats applicable to all IFs */ 22841 WL_IFSTATS_XTLV_GENERIC = 0x502, 22842 /* Infra specific */ 22843 WL_IFSTATS_XTLV_INFRA_SPECIFIC = 0x503, 22844 /* MGT counters infra and softAP */ 22845 WL_IFSTATS_XTLV_MGT_CNT = 0x504, 22846 /* AMPDU stats on per-IF */ 22847 WL_IFSTATS_XTLV_AMPDU_DUMP = 0x505, 22848 WL_IFSTATS_XTLV_IF_SPECIFIC = 0x506, 22849 22850 #ifdef WLAWDL 22851 WL_IFSTATS_XTLV_WL_PWRSTATS_AWDL = 0x507, 22852 #endif /* WLAWDL */ 22853 22854 WL_IFSTATS_XTLV_IF_LQM = 0x508, 22855 /* Interface specific state capture in periodic fashion */ 22856 WL_IFSTATS_XTLV_IF_PERIODIC_STATE = 0x509, 22857 /* Event statistics on per-IF */ 22858 WL_IFSTATS_XTLV_IF_EVENT_STATS = 0x50A, 22859 /* Infra HE specific */ 22860 WL_IFSTATS_XTLV_INFRA_SPECIFIC_HE = 0x50B, 22861 /* Roam statistics */ 22862 WL_IFSTATS_XTLV_ROAM_STATS_PERIODIC = 0x50C, 22863 WL_IFSTATS_XTLV_ROAM_STATS_EVENT = 0x50D, 22864 /* ecounters for nan */ 22865 /* nan slot stats */ 22866 WL_IFSTATS_XTLV_NAN_SLOT_STATS = 0x601, 22867 /* Ecounters for NDP session status */ 22868 WL_STATS_XTLV_NDP_SESSION_STATUS = 0x602, 22869 /* NAN disc frame status ecounters */ 22870 WL_STATS_XTLV_NAN_DISC_FRM_STATUS = 0x603 22871 }; 22872 22873 /* current version of wl_stats_report_t structure for request */ 22874 #define WL_STATS_REPORT_REQUEST_VERSION_V2 2 22875 22876 /* current version of wl_stats_report_t structure for response */ 22877 #define WL_STATS_REPORT_RESPONSE_VERSION_V2 2 22878 22879 /** Top structure of if_counters IOVar buffer */ 22880 typedef struct wl_stats_report { 22881 uint16 version; /**< see version definitions above */ 22882 uint16 length; /**< length of data including all paddings. */ 22883 uint8 data []; /**< variable length payload: 22884 * 1 or more bcm_xtlv_t type of tuples. 22885 * each tuple is padded to multiple of 4 bytes. 22886 * 'length' field of this structure includes all paddings. 22887 */ 22888 } wl_stats_report_t; 22889 22890 /* interface specific mgt count */ 22891 #define WL_MGT_STATS_VERSION_V1 1 22892 /* Associated stats type: WL_IFSTATS_MGT_CNT */ 22893 typedef struct { 22894 uint16 version; 22895 uint16 length; 22896 22897 /* detailed control/management frames */ 22898 uint32 txnull; 22899 uint32 rxnull; 22900 uint32 txqosnull; 22901 uint32 rxqosnull; 22902 uint32 txassocreq; 22903 uint32 rxassocreq; 22904 uint32 txreassocreq; 22905 uint32 rxreassocreq; 22906 uint32 txdisassoc; 22907 uint32 rxdisassoc; 22908 uint32 txassocrsp; 22909 uint32 rxassocrsp; 22910 uint32 txreassocrsp; 22911 uint32 rxreassocrsp; 22912 uint32 txauth; 22913 uint32 rxauth; 22914 uint32 txdeauth; 22915 uint32 rxdeauth; 22916 uint32 txprobereq; 22917 uint32 rxprobereq; 22918 uint32 txprobersp; 22919 uint32 rxprobersp; 22920 uint32 txaction; 22921 uint32 rxaction; 22922 uint32 txpspoll; 22923 uint32 rxpspoll; 22924 } wl_if_mgt_stats_t; 22925 22926 /* This structure (wl_if_infra_stats_t) is deprecated in favour of 22927 * versioned structure (wl_if_infra_enh_stats_vxxx_t) defined below 22928 */ 22929 #define WL_INFRA_STATS_VERSION_V1 1 22930 /* Associated stats type: WL_IFSTATS_INFRA_SPECIFIC */ 22931 typedef struct wl_infra_stats { 22932 uint16 version; /**< version of the structure */ 22933 uint16 length; 22934 uint32 rxbeaconmbss; 22935 uint32 tbtt; 22936 } wl_if_infra_stats_t; 22937 22938 /* Starting the versioned structure with version as 2 to distinguish 22939 * between legacy unversioned structure 22940 */ 22941 #define WL_INFRA_ENH_STATS_VERSION_V2 2u 22942 /* Associated stats type: WL_IFSTATS_INFRA_SPECIFIC */ 22943 typedef struct wl_infra_enh_stats_v2 { 22944 uint16 version; /**< version of the structure */ 22945 uint16 length; 22946 uint32 rxbeaconmbss; 22947 uint32 tbtt; 22948 uint32 tim_mcast_ind; /**< number of beacons with tim bits indicating multicast data */ 22949 uint32 tim_ucast_ind; /**< number of beacons with tim bits indicating unicast data */ 22950 } wl_if_infra_enh_stats_v2_t; 22951 22952 #define WL_INFRA_STATS_HE_VERSION_V1 (1u) 22953 /* Associated stats type: WL_IFSTATS_INFRA_SPECIFIC_HE */ 22954 typedef struct wl_infra_stats_he { 22955 uint16 version; /**< version of the structure */ 22956 uint16 length; 22957 uint32 PAD; /**< Explicit padding */ 22958 22959 /* DL SU MPDUs and total number of bytes */ 22960 uint64 dlsu_mpdudata; 22961 uint64 dlsu_mpdu_bytes; 22962 22963 /* DL MUMIMO MPDUs and total number of bytes */ 22964 uint64 dlmumimo_mpdudata; 22965 uint64 dlmumimo_mpdu_bytes; 22966 22967 /* DL OFDMA MPDUs and total number of bytes */ 22968 uint64 dlofdma_mpdudata; 22969 uint64 dlofdma_mpdu_bytes; 22970 22971 /* UL SU MPDUs and total number of bytes */ 22972 uint64 ulsu_mpdudata; 22973 uint64 ulsu_mpdu_bytes; 22974 22975 /* ULOFDMA MPSUs and total number of bytes */ 22976 uint64 ulofdma_mpdudata; 22977 uint64 ulofdma_mpdu_bytes; 22978 } wl_if_infra_stats_he_t; 22979 22980 #define LTECOEX_STATS_VER 1 22981 22982 typedef struct wlc_ltecoex_stats { 22983 uint16 version; /**< WL_IFSTATS_XTLV_WL_SLICE_LTECOEX */ 22984 uint16 len; /* Length of wl_ltecx_stats structure */ 22985 uint8 slice_index; /* Slice unit of wl_ltecx_stats structure */ 22986 uint8 pad[3]; /* Padding */ 22987 /* LTE noise based eCounters Bins 22988 cumulative the wl_cnt_wlc_t and wl_ctl_mgt_cnt_t 22989 counter information based on LTE Coex interference level 22990 */ 22991 uint32 txframe_no_LTE; /* txframe counter in no LTE Coex case */ 22992 uint32 rxframe_no_LTE; /* rxframe counter in no LTE Coex case */ 22993 uint32 rxrtry_no_LTE; /* rxrtry counter in no LTE Coex case */ 22994 uint32 txretrans_no_LTE; /* txretrans counter in no LTE Coex case */ 22995 uint32 txnocts_no_LTE; /* txnocts counter in no LTE Coex case */ 22996 uint32 txrts_no_LTE; /* txrts counter in no LTE Coex case */ 22997 uint32 txdeauth_no_LTE; /* txdeauth counter in no LTE Coex case */ 22998 uint32 txassocreq_no_LTE; /* txassocreq counter in no LTE Coex case */ 22999 uint32 txassocrsp_no_LTE; /* txassocrsp counter in no LTE Coex case */ 23000 uint32 txreassocreq_no_LTE; /* txreassocreq counter in no LTE Coex case */ 23001 uint32 txreassocrsp_no_LTE; /* txreassocrsp counter in no LTE Coex case */ 23002 uint32 txframe_light_LTE; /* txframe counter in light LTE Coex case */ 23003 uint32 txretrans_light_LTE; /* txretrans counter in light LTE Coex case */ 23004 uint32 rxframe_light_LTE; /* rxframe counter in light LTE Coex case */ 23005 uint32 rxrtry_light_LTE; /* rxrtry counter in light LTE Coex case */ 23006 uint32 txnocts_light_LTE; /* txnocts counter in light LTE Coex case */ 23007 uint32 txrts_light_LTE; /* txrts counter in light LTE Coex case */ 23008 uint32 txdeauth_light_LTE; /* txdeauth counter in light LTE Coex case */ 23009 uint32 txassocreq_light_LTE; /* txassocreq counter in light LTE Coex case */ 23010 uint32 txassocrsp_light_LTE; /* txassocrsp counter in light LTE Coex case */ 23011 uint32 txreassocreq_light_LTE; /* txreassocreq counter in light LTE Coex case */ 23012 uint32 txreassocrsp_light_LTE; /* txreassocrsp counter in light LTE Coex case */ 23013 uint32 txframe_heavy_LTE; /* txframe counter in heavy LTE Coex case */ 23014 uint32 txretrans_heavy_LTE; /* txretrans counter in heavy LTE Coex case */ 23015 uint32 rxframe_heavy_LTE; /* rxframe counter in heavy LTE Coex case */ 23016 uint32 rxrtry_heavy_LTE; /* rxrtry counter in heavy LTE Coex case */ 23017 uint32 txnocts_heavy_LTE; /* txnocts counter in heavy LTE Coex case */ 23018 uint32 txrts_heavy_LTE; /* txrts counter in heavy LTE Coex case */ 23019 uint32 txdeauth_heavy_LTE; /* txdeauth counter in heavy LTE Coex case */ 23020 uint32 txassocreq_heavy_LTE; /* txassocreq counter in heavy LTE Coex case */ 23021 uint32 txassocrsp_heavy_LTE; /* txassocrsp counter in heavy LTE Coex case */ 23022 uint32 txreassocreq_heavy_LTE; /* txreassocreq counter in heavy LTE Coex case */ 23023 uint32 txreassocrsp_heavy_LTE; /* txreassocrsp counter in heavy LTE Coex case */ 23024 23025 /* LTE specific ecounters */ 23026 uint16 type4_txinhi_dur; /* Duration of tx inhibit(in ms) due to Type4 */ 23027 uint16 type4_nonzero_cnt; /* Counts of none zero Type4 msg */ 23028 uint16 type4_timeout_cnt; /* Counts of Type4 timeout */ 23029 uint16 rx_pri_dur; /* Duration of wlan_rx_pri assertions */ 23030 uint16 rx_pri_cnt; /* Count of wlan_rx_pri assertions */ 23031 uint16 type6_dur; /* duration of LTE Tx power limiting assertions */ 23032 uint16 type6_cnt; /* Count of LTE Tx power limiting assertions */ 23033 uint16 ts_prot_frm_cnt; /* count of WLAN protection frames triggered by LTE coex */ 23034 uint16 ts_gr_cnt; /* count of intervals granted to WLAN in timesharing */ 23035 uint16 ts_gr_dur; /* duration granted to WLAN in timesharing */ 23036 } wlc_ltecoex_stats_t; 23037 23038 #define CSA_EVT_CSA_RXED (1 << 0) 23039 #define CSA_EVT_CSA_TIMEOUT (1 << 1) 23040 #define CSA_EVT_FROM_INFRA (1 << 2) 23041 typedef struct csa_event_data { 23042 chanspec_t chan_old; 23043 dot11_ext_csa_ie_t ecsa; 23044 dot11_mesh_csp_ie_t mcsp; 23045 dot11_wide_bw_chan_switch_ie_t wbcs; 23046 uint8 flags; 23047 uint8 pad[3]; 23048 } csa_event_data_t; 23049 23050 /* ifdef (WL_ASSOC_BCN_RPT) */ 23051 enum wl_bcn_report_cmd_id { 23052 WL_BCN_RPT_CMD_VER = 0, 23053 WL_BCN_RPT_CMD_CONFIG = 1, 23054 WL_BCN_RPT_CMD_VENDOR_IE = 2, 23055 WL_BCN_RPT_CMD_LAST 23056 }; 23057 23058 /* beacon report specific macros */ 23059 #define WL_BCN_RPT_CCX_IE_OVERRIDE (1u << 0) 23060 23061 /* beacon report specific macros */ 23062 #define WL_BCN_RPT_ASSOC_SCAN_UNSOLICITED_MODE (1u << 1) 23063 #define WL_BCN_RPT_ASSOC_SCAN_SOLICITED_MODE (1u << 2) 23064 #define WL_BCN_RPT_ASSOC_SCAN_MODE_SHIFT (1) 23065 #define WL_BCN_RPT_ASSOC_SCAN_MODE_MASK (WL_BCN_RPT_ASSOC_SCAN_UNSOLICITED_MODE |\ 23066 WL_BCN_RPT_ASSOC_SCAN_SOLICITED_MODE) 23067 #define WL_BCN_RPT_ASSOC_SCAN_MODE_MAX (WL_BCN_RPT_ASSOC_SCAN_MODE_MASK >> \ 23068 WL_BCN_RPT_ASSOC_SCAN_MODE_SHIFT) 23069 /* beacon report mode specific macro */ 23070 #define WL_BCN_RPT_ASSOC_SCAN_MODE_DEFAULT WL_BCN_RPT_ASSOC_SCAN_UNSOLICITED_MODE 23071 23072 /* beacon report timeout config specific macros */ 23073 #define WL_BCN_RPT_ASSOC_SCAN_CACHE_TIMEOUT_DEFAULT (120000) 23074 #define WL_BCN_RPT_ASSOC_SCAN_CACHE_TIMEOUT_MIN (60000) 23075 #define WL_BCN_RPT_ASSOC_SCAN_CACHE_TIMEOUT_MAX (0xFFFFFFFF) 23076 23077 /* beacon report cache count specific macros */ 23078 #define WL_BCN_RPT_ASSOC_SCAN_CACHE_COUNT_MIN (0) 23079 #define WL_BCN_RPT_ASSOC_SCAN_CACHE_COUNT_MAX (8) 23080 #define WL_BCN_RPT_ASSOC_SCAN_CACHE_COUNT_DEFAULT (WL_BCN_RPT_ASSOC_SCAN_CACHE_COUNT_MAX) 23081 23082 #define WL_BCN_REPORT_CMD_VERSION 1 23083 struct wl_bcn_report_cfg { 23084 uint32 flags; /**< Flags that defines the operation/setting information */ 23085 uint32 scan_cache_timeout; /**< scan cache timeout value in millisec */ 23086 uint32 scan_cache_timer_pend; /**< Read only pending time for timer expiry in millisec */ 23087 uint8 scan_cache_cnt; /**< scan cache count */ 23088 }; 23089 23090 /* endif (WL_ASSOC_BCN_RPT) */ 23091 23092 /* Thermal, Voltage, and Power Mitigation */ 23093 #define TVPM_REQ_VERSION_1 1 23094 #define TVPM_REQ_CURRENT_VERSION TVPM_REQ_VERSION_1 23095 23096 /* tvpm iovar data */ 23097 typedef struct { 23098 uint16 version; /* TVPM request version */ 23099 uint16 length; /* Length of the entire structure */ 23100 23101 uint16 req_type; /* Request type: wl_tvpm_req_type_t */ 23102 uint16 req_len; /* Length of the following value */ 23103 uint8 value[]; /* Variable length data depending on req_type */ 23104 } wl_tvpm_req_t; 23105 23106 /* tvpm iovar request types */ 23107 typedef enum { 23108 WL_TVPM_REQ_CLTM_INDEX, /* req_value: uint32, range 1...100 */ 23109 WL_TVPM_REQ_PPM_INDEX, /* req_value: uint32, range 1...100 */ 23110 WL_TVPM_REQ_ENABLE, /* req_value: uint32, range 0...1 */ 23111 WL_TVPM_REQ_STATUS, /* req_value: none */ 23112 WL_TVPM_REQ_PERIOD, /* req_value: int32, range {-1,1-10} */ 23113 WL_TVPM_REQ_TXDC, /* req_value: uint32, range 1...100 */ 23114 WL_TVPM_REQ_MAX 23115 } wl_tvpm_req_type_t; 23116 23117 /* structure for data returned by request type WL_TVPM_REQ_STATUS */ 23118 typedef struct wl_tvpm_status { 23119 uint16 enable; /* whether TVPM is enabled */ 23120 uint16 tx_dutycycle; /* a percentage: 1-100 */ 23121 int16 tx_power_backoff; /* 0...-6 */ 23122 uint16 num_active_chains; /* 1...3 */ 23123 int16 temp; /* local temperature in degrees C */ 23124 uint8 vbat; /* local voltage in units of 0.1V */ 23125 uint8 pad; 23126 } wl_tvpm_status_t; 23127 23128 /* TVPM ecounters */ 23129 typedef struct wl_tvpm_ecounters_t { 23130 uint16 version; /* version field */ 23131 uint16 length; /* byte length in wl_tvpm_ecounters_t starting at version */ 23132 uint16 tx_dutycycle; /* a percentage: 1-100 */ 23133 int16 tx_power_backoff; /* 0...-6 */ 23134 uint16 num_active_chains; /* 1...3 */ 23135 int16 temp; /* local temperature */ 23136 uint8 vbat; /* local voltage */ 23137 uint8 cltm; /* CLTM index */ 23138 uint8 ppm; /* PPM index */ 23139 uint8 pad; /* pad to align to uint16 */ 23140 } wl_tvpm_ecounters_t; 23141 23142 #define TDMTX_ECOUNTERS_VERSION_V1 1 23143 #define TDMTX_ECOUNTERS_VERSION_V2 2 23144 23145 /* TDMTX ecounters */ 23146 typedef struct wl_tdmtx_ecounters_v1 { 23147 uint16 version; /* version field */ 23148 uint16 length; /* byte length in wl_tdmtx_ecounters_t starting at version */ 23149 uint32 txa_on; /* TXA on requests */ 23150 uint32 txa_tmcnt; /* Total number of TXA timeout */ 23151 uint32 por_on; /* TXA POR requests */ 23152 uint32 txpuen; /* Path enable requests */ 23153 uint32 txpudis; /* Total number of times Tx path is muted on the slice */ 23154 uint32 txpri_on; /* Total number of times Tx priority was obtained by the slice */ 23155 uint32 txdefer; /* Total number of times Tx was deferred by the slice */ 23156 uint32 txmute; /* Total number of times active Tx muted on the slice */ 23157 uint32 actpwrboff; /* Total number of times TX power is backed off by the slice */ 23158 uint32 txa_dur; /* Total time txa on */ 23159 uint32 txpri_dur; /* Total time TXPri */ 23160 uint32 txdefer_dur; /* Total time txdefer */ 23161 } wl_tdmtx_ecounters_v1_t; 23162 23163 /* TDMTX ecounters for version 2 */ 23164 typedef struct wl_tdmtx_ecounters_v2 { 23165 uint16 version; /* version field */ 23166 uint16 length; /* byte length in wl_tdmtx_ecounters_t starting at version */ 23167 uint32 txa_on; /* TXA on requests */ 23168 uint32 txa_tmcnt; /* Total number of TXA timeout */ 23169 uint32 porhi_on; /* TXA PORHI requests */ 23170 uint32 porlo_on; /* TXA PORLO requests */ 23171 uint32 txpuen; /* Path enable requests */ 23172 uint32 txpudis; /* Total number of times Tx path is muted on the slice */ 23173 uint32 txpri_on; /* Total number of times Tx priority was obtained by the slice */ 23174 uint32 txdefer; /* Total number of times Tx was deferred by the slice */ 23175 uint32 txmute; /* Total number of times active Tx muted on the slice */ 23176 uint32 actpwrboff; /* Total number of times TX power is backed off by the slice */ 23177 uint32 txa_dur; /* Total time txa on */ 23178 uint32 txpri_dur; /* Total time TXPri */ 23179 uint32 txdefer_dur; /* Total time txdefer */ 23180 } wl_tdmtx_ecounters_v2_t; 23181 23182 /* Note: if this struct is changing update wl_scb_ecounters_vX_t version, 23183 * as this struct is sent as payload in wl_scb_ecounters_vX_t 23184 */ 23185 typedef struct wlc_scb_stats_v1 { 23186 uint32 tx_pkts; /* num of packets transmitted (ucast) */ 23187 uint32 tx_failures; /* num of packets failed */ 23188 uint32 rx_ucast_pkts; /* num of unicast packets received */ 23189 uint32 rx_mcast_pkts; /* num of multicast packets received */ 23190 uint32 tx_rate; /* Rate of last successful tx frame */ 23191 uint32 rx_rate; /* Rate of last successful rx frame */ 23192 uint32 rx_decrypt_succeeds; /* num of packets decrypted successfully */ 23193 uint32 rx_decrypt_failures; /* num of packets decrypted unsuccessfully */ 23194 uint32 tx_mcast_pkts; /* num of mcast pkts txed */ 23195 uint64 tx_ucast_bytes; /* data bytes txed (ucast) */ 23196 uint64 tx_mcast_bytes; /* data bytes txed (mcast) */ 23197 uint64 rx_ucast_bytes; /* data bytes recvd ucast */ 23198 uint64 rx_mcast_bytes; /* data bytes recvd mcast */ 23199 uint32 tx_pkts_retried; /* num of packets where a retry was necessary */ 23200 uint32 tx_pkts_retry_exhausted; /* num of packets where a retry was exhausted */ 23201 uint32 tx_rate_mgmt; /* Rate of last transmitted management frame */ 23202 uint32 tx_rate_fallback; /* last used lowest fallback TX rate */ 23203 uint32 rx_pkts_retried; /* # rx with retry bit set */ 23204 uint32 tx_pkts_total; /* total num of tx pkts */ 23205 uint32 tx_pkts_retries; /* total num of tx retries */ 23206 uint32 tx_pkts_fw_total; /* total num of tx pkts generated from fw */ 23207 uint32 tx_pkts_fw_retries; /* num of fw generated tx pkts retried */ 23208 uint32 tx_pkts_fw_retry_exhausted; /* num of fw generated tx pkts where retry exhausted */ 23209 } wlc_scb_stats_v1_t; 23210 23211 /* ecounters for scb stats 23212 * XTLV ID: WL_IFSTATS_XTLV_SCB_ECOUNTERS 23213 */ 23214 23215 #define WL_SCB_ECOUNTERS_VERSION_1 1 23216 #define WL_SCB_ECOUNTERS_VERSION_2 2 23217 23218 typedef struct wl_scb_ecounters_v1 { 23219 uint16 version; /* version field */ 23220 uint16 length; /* struct length starting from version */ 23221 uint32 chanspec; /* current chanspec where scb is operating */ 23222 struct ether_addr ea; /* peer ndi or sta ea */ 23223 uint8 peer_type; /* peer type */ 23224 uint8 pad; 23225 23226 /* scb tx and rx stats */ 23227 wlc_scb_stats_v1_t stats; 23228 } wl_scb_ecounters_v1_t; 23229 23230 typedef struct wl_scb_ecounters_v2 { 23231 uint16 version; /* version field */ 23232 uint16 length; /* struct length starting from version */ 23233 uint32 chanspec; /* current chanspec where scb is operating */ 23234 struct ether_addr ea; /* peer ndi or sta ea */ 23235 uint8 peer_type; /* peer type */ 23236 uint8 pad; 23237 23238 /* scb tx and rx stats */ 23239 uint16 tx_rate; /* Rate(in Mbps) of last successful tx frame */ 23240 uint16 rx_rate; /* Rate(in Mbps) of last successful rx frame */ 23241 uint16 tx_rate_fallback; /* last used lowest fallback TX rate(in Mbps) */ 23242 uint16 pad1; 23243 uint32 rx_decrypt_succeeds; /* num of packets decrypted successfully */ 23244 uint32 rx_decrypt_failures; /* num of packets decrypted unsuccessfully */ 23245 uint32 rx_pkts_retried; /* # rx with retry bit set */ 23246 uint32 tx_pkts_retries; /* total num of tx retries */ 23247 uint32 tx_failures; /* num of packets failed */ 23248 uint32 tx_pkts_total; /* total num of tx pkts */ 23249 int8 rssi[WL_STA_ANT_MAX]; /* average rssi per antenna of data frames */ 23250 } wl_scb_ecounters_v2_t; 23251 23252 /* ecounters for nan slot stats 23253 * XTLV ID: WL_IFSTATS_XTLV_NAN_SLOT_STATS 23254 */ 23255 23256 #define WL_NAN_SLOT_ECOUNTERS_VERSION_1 1 23257 #define WL_NAN_SLOT_ECOUNTERS_VERSION_2 2 23258 #define WL_NAN_SLOT_ECOUNTERS_VERSION_3 3 23259 23260 typedef struct wl_nan_slot_ecounters_v1 { 23261 uint16 version; /* version field */ 23262 uint16 length; /* struct length starting from version */ 23263 uint32 chan[NAN_MAX_BANDS]; /* cur nan slot chanspec of both bands */ 23264 uint16 cur_slot_idx; /* cur nan slot index */ 23265 uint16 pad; 23266 nan_sched_stats_t sched; /* sched stats */ 23267 wl_nan_mac_stats_t mac; /* mac stats */ 23268 } wl_nan_slot_ecounters_v1_t; 23269 23270 typedef struct wl_nan_slot_ecounters_v2 { 23271 uint16 version; /* version field */ 23272 uint16 length; /* struct length starting from version */ 23273 uint32 chan[NAN_MAX_BANDS]; /* cur nan slot chanspec of both bands */ 23274 uint16 cur_slot_idx; /* cur nan slot index */ 23275 uint16 pad; 23276 nan_sched_stats_t sched; /* sched stats */ 23277 wl_nan_mac_stats_t mac; /* mac stats */ 23278 /* for v2 */ 23279 uint16 bcn_rx_drop_rssi; /* Beacon received but ignored due to weak rssi */ 23280 uint16 bcn_rx_drop_rssi_5g; /* 5G Beacon received but ignored due to weak rssi */ 23281 uint16 cnt_rssi_close; /* cnt of beacon rssi > rssi_close received */ 23282 uint16 cnt_rssi_close_5g; /* cnt of 5G beacon rssi > rssi_close received */ 23283 uint16 cnt_rssi_mid; /* cnt of beacon rssi > rssi_middle received */ 23284 uint16 cnt_rssi_mid_5g; /* cnt of 5G beacon rssi > rssi_middle received */ 23285 uint16 bcn_txfail; /* Beacon sending failure count */ 23286 uint16 bcn_txfail_5g; /* sending 5G beacon failure count */ 23287 } wl_nan_slot_ecounters_v2_t; 23288 23289 typedef struct wl_nan_slot_ecounters_v3 { 23290 uint16 version; /* version field */ 23291 uint16 length; /* struct length starting from version */ 23292 uint32 chan[NAN_MAX_BANDS]; /* cur nan slot chanspec of both bands */ 23293 uint16 cur_slot_idx; /* cur nan slot index */ 23294 uint16 pad; 23295 nan_sched_stats_t sched; /* sched stats */ 23296 /* for v3 */ 23297 wl_nan_mac_stats_v1_t mac; /* mac stats */ 23298 uint16 bcn_rx_drop_rssi; /* Beacon received but ignored due to weak rssi */ 23299 uint16 bcn_rx_drop_rssi_5g; /* 5G Beacon received but ignored due to weak rssi */ 23300 uint16 cnt_rssi_close; /* cnt of beacon rssi > rssi_close received */ 23301 uint16 cnt_rssi_close_5g; /* cnt of 5G beacon rssi > rssi_close received */ 23302 uint16 cnt_rssi_mid; /* cnt of beacon rssi > rssi_middle received */ 23303 uint16 cnt_rssi_mid_5g; /* cnt of 5G beacon rssi > rssi_middle received */ 23304 uint16 bcn_txfail; /* Beacon sending failure count */ 23305 uint16 bcn_txfail_5g; /* sending 5G beacon failure count */ 23306 } wl_nan_slot_ecounters_v3_t; 23307 23308 /* WL_STATS_XTLV_NDP_SESSION_STATUS for ecounters */ 23309 #define WL_NAN_SESSION_STATUS_EC_VERSION_1 1 23310 typedef struct wl_nan_ndp_session_status_v1_s { 23311 uint16 version; /* version field */ 23312 uint16 length; /* struct length starting from version */ 23313 uint8 role; /* Role of NAN device */ 23314 uint8 ndp_id; /* local NDP ID */ 23315 uint8 state; /* NDP state */ 23316 uint8 nan_sec_csid; /* security csid */ 23317 struct ether_addr lndi_addr; /* Local NDI addr */ 23318 struct ether_addr pnmi_addr; /* Peer NMI addr */ 23319 struct ether_addr pndi_addr; /* Peer NDI addr */ 23320 uint8 dpe_state; /* DPE state to know where timeout/dpend has come */ 23321 uint8 pad; 23322 } wl_nan_ndp_session_status_v1_t; 23323 23324 /* WL_STATS_XTLV_NAN_DISC_FRM_STATUS for ecounters */ 23325 #define WL_NAN_DISC_FRM_STATUS_EC_VERSION_1 1 23326 typedef struct wl_nan_disc_frame_status_v1_s { 23327 uint16 version; /* version field */ 23328 uint16 length; /* struct length starting from version */ 23329 uint8 type; /* wl_nan_frame_type_t */ 23330 uint8 status; /* For TX status, success or failure */ 23331 uint8 reason_code; /* to identify reason when status is failure */ 23332 uint8 inst_id; /* Publish or subscribe instance id */ 23333 uint8 req_id; /* Requestor instance id */ 23334 uint8 pad; 23335 uint16 token; /* seq num to keep track of pkts sent by host */ 23336 } wl_nan_disc_frame_status_v1_t; 23337 23338 typedef struct wl_nan_oob_af { 23339 uint64 bitmap; /* 16 TU slots in 1024 TU window */ 23340 struct ether_addr sa; /* Optional SA. Default set to NMI */ 23341 struct ether_addr da; 23342 struct ether_addr bssid; 23343 bool secured; /* Optional. Default set to 0 (Open) */ 23344 uint8 map_id; /* Host selected map id. Default 0 */ 23345 uint16 timeout; /* OOB AF session timeout in milliseconds */ 23346 uint16 pad[3]; /* Structure padding. Can be used in future */ 23347 uint16 token; /* host generated. Used by FW in TX status event */ 23348 uint16 payload_len; 23349 uint8 payload[]; /* AF hdr + NAN attrbutes in TLV format */ 23350 } wl_nan_oob_af_t; 23351 23352 /* 23353 * BT log definitions 23354 */ 23355 23356 /* common iovar struct */ 23357 typedef struct wl_btl { 23358 uint16 subcmd_id; /* subcommand id */ 23359 uint16 len; /* total length of data[] */ 23360 uint8 data[2]; /* subcommand data, variable length */ 23361 } wl_btl_t; 23362 23363 /* subcommand ids */ 23364 #define WL_BTL_SUBCMD_ENABLE 0 /* enable/disable logging */ 23365 #define WL_BTL_SUBCMD_STATS 1 /* statistics */ 23366 23367 /* WL_BTL_SUBCMD_ENABLE data */ 23368 typedef struct wl_blt_enable { 23369 uint8 enable; /* 1 - enable, 0 - disable */ 23370 uint8 pad[3]; /* 4-byte struct alignment */ 23371 } wl_btl_enable_t; 23372 23373 /* WL_BTL_SUBCMD_STATS data */ 23374 typedef struct wl_blt_stats { 23375 uint32 bt_interrupt; /* num BT interrupts */ 23376 uint32 config_req; /* num CONFIG_REQ */ 23377 uint32 config_res_success; /* num CONFIG_RES successful */ 23378 uint32 config_res_fail; /* num CONFIG_RES failed */ 23379 uint32 log_req; /* num LOG_REQ */ 23380 uint32 log_res_success; /* num LOG_RES successful */ 23381 uint32 log_res_fail; /* num LOG_RES failed */ 23382 uint32 indirect_read_fail; /* num indirect read fail */ 23383 uint32 indirect_write_fail; /* num indirect write fail */ 23384 uint32 dma_fail; /* num DMA failed */ 23385 uint32 min_log_req_duration; /* min log request duration in usec */ 23386 uint32 max_log_req_duration; /* max log request duration in usec */ 23387 uint16 mem_dump_req; /* num mem dump requests */ 23388 uint16 mem_dump_success; /* num mem dumps successful */ 23389 uint16 mem_dump_fail; /* num mem dumps failed */ 23390 uint16 bt_wake_success; /* num BT wakes successful */ 23391 uint16 bt_wake_fail; /* num BT wakes failed */ 23392 uint16 mem_dump_req_interrupt; /* num MEM_DUMP_REQ interrupt */ 23393 uint16 mem_dump_res_interrupt; /* num MEM_DUMP_RES interrupt */ 23394 uint16 mem_dump_res_timeout; /* num MEM_DUMP_RES timeout */ 23395 uint16 mem_dump_proc_no_bt_ready; /* num proceed if no BT ready */ 23396 uint16 mem_dump_proc_no_bt_response; /* num proceed if no BT response */ 23397 uint16 mem_dump_proc_no_bt_clock; /* num proceed if no BT clock */ 23398 uint16 pad; /* alignment */ 23399 uint32 last_failed_region; /* start addr of last failed region */ 23400 uint32 min_mem_dump_duration; /* min mem dump duration in usec */ 23401 uint32 max_mem_dump_duration; /* max mem dump duration in usec */ 23402 } wl_btl_stats_t; 23403 23404 /* IOV AWD DATA */ 23405 23406 /* AWD DATA structures */ 23407 typedef struct { 23408 uint8 version; /* Extended trap version info */ 23409 uint8 reserved; /* currently unused */ 23410 uint16 length; /* Length of data excluding this header */ 23411 uint8 data[]; /* this data is TLV of tags */ 23412 } awd_data_v1_t; 23413 23414 /* AWD TAG structure */ 23415 typedef struct { 23416 uint8 tagid; /* one of AWD DATA TAGs numbers */ 23417 uint8 length; /* the data size represented by this field must be aligned to 32 bits */ 23418 uint8 data[]; /* variable size, defined by length field */ 23419 } awd_tag_data_v1_t; 23420 23421 /* IOV ETD DATA */ 23422 23423 /* ETD DATA structures */ 23424 typedef struct { 23425 uint8 version; /* Extended trap version info */ 23426 uint8 reserved; /* currently unused */ 23427 uint16 length; /* Length of data excluding this header */ 23428 uint8 data[]; /* this data is TLV of tags */ 23429 } etd_data_v1_t; 23430 23431 /* ETD TAG structure */ 23432 typedef struct { 23433 uint8 tagid; /* one of ETD DATA TAGs numbers */ 23434 uint8 length; /* the data size represented by this field must be aligned to 32 bits */ 23435 uint8 data[]; /* variable size, defined by length field */ 23436 } etd_tag_data_v1_t; 23437 23438 /* ETD information structures associated with ETD_DATA_Tags */ 23439 /* ETD_JOIN_CLASSIFICATION_INFO 10 */ 23440 typedef struct { 23441 uint8 assoc_type; /* assoc type */ 23442 uint8 assoc_state; /* current state of assoc state machine */ 23443 uint8 wpa_state; /* wpa->state */ 23444 uint8 wsec_portopen; /* shows if security port is open */ 23445 uint8 total_attempts_num; /* total number of join attempts (bss_retries) */ 23446 uint8 num_of_targets; /* up to 3, in current design */ 23447 uint8 reserved [2]; /* padding to get 32 bits alignment */ 23448 uint32 wsec; /* bsscfg->wsec */ 23449 uint32 wpa_auth; /* bsscfg->WPA_auth */ 23450 uint32 time_to_join; /* time duration to process WLC_SET_SSID request (ms) */ 23451 } join_classification_info_v1_t; 23452 23453 /* ETD_JOIN_TARGET_CLASSIFICATION_INFO 11 */ 23454 typedef struct { 23455 int8 rssi; /* RSSI on current channel */ 23456 uint8 cca; /* CCA on current channel */ 23457 uint8 channel; /* current channel */ 23458 uint8 num_of_attempts; /* (bss_retries) up to 5 */ 23459 uint8 oui[3]; /* the first three octets of the AP's address */ 23460 uint8 reserved; /* padding to get 32 bits alignment */ 23461 uint32 time_duration; /* time duration of current attempt (ms) */ 23462 } join_target_classification_info_v1_t; 23463 23464 /* ETD_ASSOC_STATE 12 */ 23465 typedef struct { 23466 uint8 assoc_state; /* assoc type */ 23467 uint8 reserved [3]; /* padding to get 32 bits alignment */ 23468 } join_assoc_state_v1_t; 23469 23470 /* ETD_CHANNEL 13 tag */ 23471 typedef struct { 23472 uint8 channel; /* last attempt channel */ 23473 uint8 reserved [3]; /* padding to get 32 bits alignment */ 23474 } join_channel_v1_t; 23475 23476 /* ETD_TOTAL_NUM_OF_JOIN_ATTEMPTS 14 */ 23477 typedef struct { 23478 uint8 total_attempts_num; /* total number of join attempts (bss_retries) */ 23479 uint8 reserved [3]; /* padding to get 32 bits alignment */ 23480 } join_total_attempts_num_v1_t; 23481 23482 /* IOV_ROAM_CACHE structures */ 23483 23484 enum wl_rmc_report_cmd_id { 23485 WL_RMC_RPT_CMD_VER = 0, 23486 WL_RMC_RPT_CMD_DATA = 1, 23487 WL_RMC_RPT_CMD_LAST 23488 }; 23489 23490 enum wl_rmc_report_xtlv_id { 23491 WL_RMC_RPT_XTLV_VER = 0x0, 23492 WL_RMC_RPT_XTLV_BSS_INFO = 0x1, 23493 WL_RMC_RPT_XTLV_CANDIDATE_INFO = 0x2, 23494 WL_RMC_RPT_XTLV_USER_CACHE_INFO = 0x3 23495 }; 23496 23497 /* WL_RMC_RPT_XTLV_BSS_INFO */ 23498 typedef struct { 23499 int16 rssi; /* current BSS RSSI */ 23500 uint8 reason; /* reason code for last full scan */ 23501 uint8 status; /* last status code for not roaming */ 23502 uint32 fullscan_count; /* number of full scans performed on current BSS */ 23503 uint32 time_full_scan; /* delta time (in ms) between cur time and full scan timestamp */ 23504 } rmc_bss_info_v1_t; 23505 23506 /* WL_RMC_RPT_XTLV_CANDIDATE_INFO */ 23507 typedef struct { 23508 int16 rssi; /* last seen rssi */ 23509 uint16 ctl_channel; /* channel */ 23510 uint32 time_last_seen; /* delta time (in ms) between cur time and last seen timestamp */ 23511 uint16 bss_load; /* BSS load */ 23512 uint8 bssid [6]; /* padding to get 32 bits alignment */ 23513 } rmc_candidate_info_v1_t; 23514 23515 #define WL_FILTER_IE_VERSION 1 /* deprecated */ 23516 enum wl_filter_ie_options { 23517 WL_FILTER_IE_CLEAR = 0, /* allow element id in packet.For suboption */ 23518 WL_FILTER_IE_SET = 1, /* filter element id in packet.For suboption */ 23519 WL_FILTER_IE_LIST = 2, /* list element ID's.Set as option */ 23520 WL_FILTER_IE_CLEAR_ALL = 3, /* clear all the element.Set as option */ 23521 WL_FILTER_IE_CHECK_SUB_OPTION = 4 /* check for suboptions.Set only as option */ 23522 }; 23523 23524 typedef struct wl_filter_ie_tlv { 23525 uint16 id; /* elelment id [ + ext id ] */ 23526 uint16 len; /* sub option length + pattern length */ 23527 uint8 data[]; /* sub option + pattern matching(OUI,type,sub-type) */ 23528 } wl_filter_ie_tlv_t; 23529 23530 #define WL_FILTER_IE_VERSION_1 1 /* the latest version */ 23531 typedef struct wl_filter_ie_iov_v1 { 23532 uint16 version; /* Structure version */ 23533 uint16 len; /* Total length of the structure */ 23534 uint16 fixed_length; /* Total length of fixed fields */ 23535 uint8 option; /* Filter action - check for suboption */ 23536 uint8 pad[1]; /* Align to 4 bytes */ 23537 uint32 pktflag; /* frame type - FC_XXXX */ 23538 uint8 tlvs[]; /* variable data (zero in for list ,clearall) */ 23539 } wl_filter_ie_iov_v1_t; 23540 23541 /* Event aggregation config */ 23542 #define EVENT_AGGR_CFG_VERSION 1 23543 #define EVENT_AGGR_DISABLED 0x0 23544 #define EVENT_AGGR_ENABLED 0x1 23545 23546 #define EVENT_AGGR_BUFSIZE_MAX 1512 23547 #define EVENT_AGGR_BUFSIZE_MIN 512 23548 23549 #define EVENT_AGGR_FLUSH_TIMEOUT_DEFAULT 100 23550 #define EVENT_AGGR_FLUSH_TIMEOUT_MAX 2000 23551 #define EVENT_AGGR_NUM_EVENTS_FLUSH 5 23552 typedef struct event_aggr_config { 23553 uint16 version; 23554 uint16 len; 23555 uint16 flags; /* bit 0 to enable/disable the feature */ 23556 uint16 bufsize; /* Aggregate buffer size */ 23557 uint16 flush_timeout; /* Timeout for event flush */ 23558 uint16 num_events_flush; /* Number of events aggregated before flush */ 23559 } event_aggr_config_t; 23560 23561 #ifndef WL_TDMTX_TYPEDEF_HAS_ALIAS 23562 typedef tdmtx_cnt_v1_t tdmtx_cnt_t; 23563 typedef tdmtx_cnt_shm_v1_t tdmtx_cnt_shm_t; 23564 typedef wl_tdmtx_ecounters_v1_t wl_tdmtx_ecounters_t; 23565 #define WL_CNT_TDMTX_STRUCT_SZ (sizeof(tdmtx_cnt_t)) 23566 #define WL_CNT_TDMTX_SHM_SZ (sizeof(tdmtx_cnt_shm_t)) 23567 #endif 23568 23569 /** chanctxt related statistics */ 23570 #define CHANCTXT_STATS_VERSION_1 1 23571 #define CHANCTXT_STATS_CURRENT_VERSION CHANCTXT_STATS_VERSION_1 23572 typedef struct wlc_chanctxt_stats { 23573 uint32 excursionq_end_miss; 23574 uint32 activeq_end_miss; 23575 uint32 no_chanctxt_count; 23576 uint32 txqueue_end_incomplete; 23577 uint32 txqueue_start_incomplete; 23578 } wlc_chanctxt_stats_core_t; 23579 23580 typedef struct chanctxt_stats { 23581 uint16 version; 23582 uint16 length; 23583 wlc_chanctxt_stats_core_t corestats[MAX_NUM_D11CORES]; 23584 } wlc_chanctxt_stats_t; 23585 23586 typedef struct wl_txdc_ioc { 23587 uint8 ver; 23588 uint8 id; /* ID of the sub-command */ 23589 uint16 len; /* total length of all data[] */ 23590 uint8 data[]; /* var len payload */ 23591 } wl_txdc_ioc_t; 23592 23593 /* 23594 * iovar subcommand ids 23595 */ 23596 enum { 23597 IOV_TXDC_ENB = 1, 23598 IOV_TXDC_MODE = 2, 23599 IOV_TXDC_DUMP = 3, 23600 IOV_TXDC_LAST 23601 }; 23602 23603 /* WL_NAN_XTLV_SLOT_STATS */ 23604 /* WL_NAN_EVENT_SLOT_START, WL_NAN_EVENT_SLOT_END */ 23605 typedef struct nan_slot_event_data { 23606 uint32 cur_slot_idx; /* current idx in channel schedule */ 23607 uint32 fw_time; /* target current time in microseconds */ 23608 uint32 band; /* current band (2G/5G) for which the event is received */ 23609 } nan_slot_event_data_t; 23610 23611 #ifndef BCMUTILS_ERR_CODES 23612 23613 /* SAE (Simultaneous Authentication of Equals) error codes. 23614 * These error codes are local. 23615 */ 23616 23617 /* SAE status codes are reserved from -3072 to -4095 (1K) */ 23618 23619 enum wl_sae_status { 23620 WL_SAE_E_AUTH_FAILURE = -3072, 23621 /* Discard silently */ 23622 WL_SAE_E_AUTH_DISCARD = -3073, 23623 /* Authentication in progress */ 23624 WL_SAE_E_AUTH_CONTINUE = -3074, 23625 /* Invalid scalar/elt */ 23626 WL_SAE_E_AUTH_COMMIT_INVALID = -3075, 23627 /* Invalid confirm token */ 23628 WL_SAE_E_AUTH_CONFIRM_INVALID = -3076, 23629 /* Peer scalar validation failure */ 23630 WL_SAE_E_CRYPTO_SCALAR_VALIDATION = -3077, 23631 /* Peer element prime validation failure */ 23632 WL_SAE_E_CRYPTO_ELE_PRIME_VALIDATION = -3078, 23633 /* Peer element is not on the curve */ 23634 WL_SAE_E_CRYPTO_ELE_NOT_ON_CURVE = -3079, 23635 /* Generic EC error (eliptic curve related) */ 23636 WL_SAE_E_CRYPTO_EC_ERROR = -3080, 23637 /* Both local and peer mac addrs are same */ 23638 WL_SAE_E_CRYPTO_EQUAL_MACADDRS = -3081, 23639 /* Loop exceeded in deriving the scalar */ 23640 WL_SAE_E_CRYPTO_SCALAR_ITER_EXCEEDED = -3082, 23641 /* ECC group is unsupported */ 23642 WL_SAE_E_CRYPTO_UNSUPPORTED_GROUP = -3083, 23643 /* Exceeded the hunting-and-pecking counter */ 23644 WL_SAE_E_CRYPTO_PWE_COUNTER_EXCEEDED = -3084, 23645 /* SAE crypto component is not initialized */ 23646 WL_SAE_E_CRYPTO_NOT_INITED = -3085, 23647 /* bn_get has failed */ 23648 WL_SAE_E_CRYPTO_BN_GET_ERROR = -3086, 23649 /* bn_set has failed */ 23650 WL_SAE_E_CRYPTO_BN_SET_ERROR = -3087, 23651 /* PMK is not computed yet */ 23652 WL_SAE_E_CRYPTO_PMK_UNAVAILABLE = -3088, 23653 /* Peer confirm did not match */ 23654 WL_SAE_E_CRYPTO_CONFIRM_MISMATCH = -3089, 23655 /* Element K is at infinity no the curve */ 23656 WL_SAE_E_CRYPTO_KEY_AT_INFINITY = -3090, 23657 /* SAE Crypto private data magic number mismatch */ 23658 WL_SAE_E_CRYPTO_PRIV_MAGIC_MISMATCH = -3091, 23659 /* Max retry exhausted */ 23660 WL_SAE_E_MAX_RETRY_LIMIT_REACHED = -3092 23661 }; 23662 23663 /* PMK manager block. Event codes from -5120 to -6143 */ 23664 23665 /* PSK hashing event codes */ 23666 typedef enum wlc_pmk_psk_hash_status { 23667 WL_PMK_E_PSK_HASH_FAILED = -5120, 23668 WL_PMK_E_PSK_HASH_DONE = -5121, 23669 WL_PMK_E_PSK_HASH_RUNNING = -5122, 23670 WL_PMK_E_PSK_INVALID = -5123, 23671 WL_PMK_E_PSK_NOMEM = -5124 23672 } wlc_pmk_psk_hash_status_t; 23673 23674 #endif /* BCMUTILS_ERR_CODES */ 23675 23676 /* Block Channel */ 23677 #define WL_BLOCK_CHANNEL_VER_1 1u 23678 23679 typedef struct wl_block_ch_v1 { 23680 uint16 version; 23681 uint16 len; 23682 uint32 band; /* Band select */ 23683 uint8 channel_num; /* The number of block channels in the selected band */ 23684 uint8 padding[3]; 23685 uint8 channel[]; /* Channel to block, Variable Length */ 23686 } wl_block_ch_v1_t; 23687 23688 typedef struct dma_wl_addr_region { 23689 uint32 addr_low; 23690 uint32 addr_high; 23691 } dma_wl_addr_region_t; 23692 23693 #define WL_ROAMSTATS_IOV_VERSION 1 23694 23695 #define MAX_PREV_ROAM_EVENTS 16u 23696 23697 #define ROAMSTATS_UNKNOWN_CNT 0xFFFFu 23698 23699 /* roaming statistics counter structures */ 23700 typedef struct wlc_assoc_roamstats_event_msg_v1 { 23701 uint32 event_type; /* Message (see below) */ 23702 uint32 status; /* Status code (see below) */ 23703 uint32 reason; /* Reason code (if applicable) */ 23704 uint32 timestamp; /* Timestamp of event */ 23705 } wlc_assoc_roamstats_event_msg_v1_t; 23706 23707 enum wl_roamstats_cmd_id { 23708 WL_ROAMSTATS_XTLV_CMD_VER = 0, 23709 WL_ROAMSTATS_XTLV_CMD_RESET = 1, 23710 WL_ROAMSTATS_XTLV_CMD_STATUS = 2, 23711 WL_ROAMSTATS_XTLV_CMD_LAST /* Keep this at the end */ 23712 }; 23713 23714 enum wl_roamstats_xtlv_id { 23715 WL_ROAMSTATS_XTLV_VER = 0x0, 23716 WL_ROAMSTATS_XTLV_COUNTER_INFO = 0x1, 23717 WL_ROAMSTATS_XTLV_PREV_ROAM_EVENTS = 0x2, 23718 WL_ROAMSTATS_XTLV_REASON_INFO = 0x3 23719 }; 23720 23721 /* WL_ROAMSTATS_XTLV_COUNTER_INFO */ 23722 typedef struct { 23723 uint32 initial_assoc_time; 23724 uint32 prev_roam_time; 23725 uint32 host_access_time; 23726 uint16 roam_success_cnt; 23727 uint16 roam_fail_cnt; 23728 uint16 roam_attempt_cnt; 23729 uint16 max_roam_target_cnt; 23730 uint16 min_roam_target_cnt; 23731 uint16 max_cached_ch_cnt; 23732 uint16 min_cached_ch_cnt; 23733 uint16 partial_roam_scan_cnt; 23734 uint16 full_roam_scan_cnt; 23735 } roamstats_counter_info_v1_t; 23736 23737 /* WL_ROAMSTATS_XTLV_PREV_ROAM_EVENTS */ 23738 typedef struct { 23739 uint16 max; 23740 uint16 pos; 23741 wlc_assoc_roamstats_event_msg_v1_t roam_event[]; 23742 } roamstats_prev_roam_events_v1_t; 23743 23744 /* WL_ROAMSTATS_XTLV_REASON_INFO */ 23745 typedef struct { 23746 uint16 max; 23747 uint16 reason_cnt[]; 23748 } roamstats_reason_info_v1_t; 23749 23750 #ifdef HEALTH_CHECK_WLIOCTL 23751 /* Health check status format: 23752 * reporting status size = uint32 23753 * 8 LSB bits are reserved for: WARN (0), ERROR (1), and other levels 23754 * MSB 24 bits are reserved for client to fill in its specific status 23755 */ 23756 #define HEALTH_CHECK_STATUS_OK 0 23757 /* Bit positions. */ 23758 #define HEALTH_CHECK_STATUS_WARN 0x1 23759 #define HEALTH_CHECK_STATUS_ERROR 0x2 23760 #define HEALTH_CHECK_STATUS_TRAP 0x4 23761 #define HEALTH_CHECK_STATUS_NOEVENT 0x8 23762 23763 /* Indication that required information is populated in log buffers */ 23764 #define HEALTH_CHECK_STATUS_INFO_LOG_BUF 0x80 23765 #define HEALTH_CHECK_STATUS_MASK (0xFF) 23766 23767 #define HEALTH_CHECK_STATUS_MSB_SHIFT 8 23768 #endif /* HEALTH_CHECK_WLIOCTL */ 23769 23770 /** receive signal reporting module interface */ 23771 23772 #define WL_RXSIG_IOV_MAJOR_VER (1u) 23773 #define WL_RXSIG_IOV_MINOR_VER (1u) 23774 #define WL_RXSIG_IOV_MAJOR_VER_SHIFT (8u) 23775 #define WL_RXSIG_IOV_VERSION \ 23776 ((WL_RXSIG_IOV_MAJOR_VER << WL_RXSIG_IOV_MAJOR_VER_SHIFT) | WL_RXSIG_IOV_MINOR_VER) 23777 #define WL_RXSIG_IOV_GET_MAJOR(x) (x >> WL_RXSIG_IOV_MAJOR_VER_SHIFT) 23778 #define WL_RXSIG_IOV_GET_MINOR(x) (x & 0xFF) 23779 23780 enum wl_rxsig_cmd_rssi_mode { 23781 WL_RXSIG_MODE_DB = 0x0, 23782 WL_RXSIG_MODE_QDB = 0x1, 23783 WL_RXSIG_MODE_LAST 23784 }; 23785 23786 /* structure defs for 'wl rxsig [cmd]' iovars */ 23787 enum wl_rxsig_iov_v1 { 23788 WL_RXSIG_CMD_RSSI = 0x1, /**< combined rssi moving avg */ 23789 WL_RXSIG_CMD_SNR = 0x2, /**< combined snr moving avg */ 23790 WL_RXSIG_CMD_RSSIANT = 0x3, /**< rssi moving avg per-ant */ 23791 WL_RXSIG_CMD_SNRANT = 0x4, /**< snr moving avg per-snr */ 23792 WL_RXSIG_CMD_SMPLWIN = 0x5, /**< config for sampling window size */ 23793 WL_RXSIG_CMD_SMPLGRP = 0x7, /**< config for grouping of pkt type */ 23794 WL_RXSIG_CMD_STA_MA = 0x8, 23795 WL_RXSIG_CMD_MAMODE = 0x9, 23796 WL_RXSIG_CMD_MADIV = 0xa, 23797 WL_RXSIG_CMD_DUMP = 0xb, 23798 WL_RXSIG_CMD_DUMPWIN = 0xc, 23799 WL_RXSIG_CMD_TOTAL 23800 }; 23801 23802 struct wl_rxsig_cfg_v1 { 23803 uint16 version; 23804 chanspec_t chan; /**< chanspec info for querying stats */ 23805 uint8 pmac[ETHER_ADDR_LEN]; /**< peer(link) mac address */ 23806 }; 23807 23808 struct wl_rxsig_iov_rssi_v1 { 23809 int8 rssi; 23810 uint8 rssi_qdb; 23811 uint8 pad[2]; 23812 }; 23813 23814 struct wl_rxsig_iov_snr_v1 { 23815 int16 snr; 23816 uint16 pad; 23817 }; 23818 23819 struct wl_rxsig_iov_rssi_ant_v1 { 23820 int8 deci[WL_RSSI_ANT_MAX]; 23821 uint8 frac[WL_RSSI_ANT_MAX]; 23822 uint8 rssi_mode; /**< MODE_DB or MODE_QDB */ 23823 uint8 num_of_ant; /**< total number of ants */ 23824 uint8 pad[2]; /**< padding for 32bit align */ 23825 }; 23826 23827 #ifdef BCM_SDC 23828 23829 #define SDC_TRIGGER_CONFIG_VER_1 1 23830 typedef struct { 23831 uint16 version; 23832 uint16 type; 23833 uint8 activate; 23834 uint8 pad; 23835 } sdc_trigger_cfg_t; 23836 23837 typedef enum sdc_trigger_types { 23838 SDC_TYPE_STA_ONBOARD_DEBUG = 1, 23839 SDC_TYPE_SCAN_DEBUG = 2, 23840 #ifdef SDC_TEST 23841 /* 23842 * This is for test purpose only. Don't assign specific value. 23843 * Keep at the end 23844 */ 23845 SDC_TYPE_TEST1, 23846 SDC_TYPE_TEST2, 23847 SDC_TYPE_TEST3, 23848 #endif /* SDC_TEST */ 23849 SDC_TYPE_MAX_TRIGGER 23850 } sdc_trigger_types_t; 23851 23852 /* *** SDC_TYPE_STA_ONBOARD_DEBUG specific ******* */ 23853 23854 /* tlv IDs uniquely identifies tx and rx stats component */ 23855 enum wl_slice_hist_stats_xtlv_id { 23856 WL_STATE_HIST_TX_TOSS_REASONS = 0x1, 23857 WL_STATE_HIST_RX_TOSS_REASONS = 0x2 23858 }; 23859 23860 #ifndef WLC_HIST_TOSS_LEN 23861 #define WLC_HIST_TOSS_LEN (8u) 23862 #endif 23863 #define WL_HIST_COMPACT_TOSS_STATS_TX_VER_1 (1u) 23864 #define WL_HIST_COMPACT_TOSS_STATS_RX_VER_1 (1u) 23865 23866 /* Format of running toss reasons with seq 23867 * [see HIST_TOSS_xxxx macros] 23868 * bits [7..0] : 8 bits : toss sts. 23869 * [11..8] : cfgidx 23870 * [15..12]: ac 23871 * [31..16]: seq 23872 */ 23873 #define HIST_TOSS_STS_POS (0u) 23874 #define HIST_TOSS_STS_MASK (0x000000ffu) 23875 #define HIST_TOSS_CFGIDX_POS (8u) 23876 #define HIST_TOSS_CFGIDX_MASK (0x00000f00u) 23877 #define HIST_TOSS_AC_POS (12u) 23878 #define HIST_TOSS_AC_MASK (0x0000f000u) 23879 #define HIST_TOSS_SEQ_POS (16u) 23880 #define HIST_TOSS_SEQ_MASK (0xffff0000u) 23881 23882 /* Format of toss reasons with count 23883 * bits [15..0] : 16 bits : toss reason 23884 * bits [31..16]: 16 bits : count 23885 */ 23886 #define HIST_TOSS_RC_REASON_POS (0u) 23887 #define HIST_TOSS_RC_REASON_MASK (0xffffu) 23888 #define HIST_TOSS_RC_COUNT_POS (16u) 23889 #define HIST_TOSS_RC_COUNT_MASK (0xffff0000u) 23890 23891 typedef struct { 23892 uint16 version; 23893 uint8 hist_toss_type; /* from wl_slice_hist_XX_stats_xtlv_id */ 23894 uint8 hist_toss_num; /* number of elements in hist_toss_xxx */ 23895 uint32 hist_toss_cur_idx; /* latest data is in this index */ 23896 uint32 hist_toss_reasons[WLC_HIST_TOSS_LEN]; /* last 8 reasons along with seq, etc as 23897 * per HIST_TOSS_xxx format 23898 */ 23899 uint32 hist_toss_counts[WLC_HIST_TOSS_LEN]; /* toss counts corr to reasons */ 23900 } wl_hist_compact_toss_stats_v1_t; 23901 23902 #define WL_HIST_COMPACT_TOSS_STATS_TX_VER_2 (2u) 23903 #define WL_HIST_COMPACT_TOSS_STATS_RX_VER_2 (2u) 23904 23905 typedef struct { 23906 uint16 version; 23907 uint8 htr_type; /* from wl_slice_hist_XX_stats_xtlv_id */ 23908 uint8 htr_num; /* number of elements in htr_running or htr_rc */ 23909 uint16 htr_rnidx; /* htr_running[rnidx-1] has latest data */ 23910 uint16 htr_rcidx; /* htr_rc[rcidx-1] has latest data */ 23911 uint32 htr_running[WLC_HIST_TOSS_LEN]; /* last 8 reasons along with seq, etc as 23912 * per WLC_SDC_COMPACT_TOSS_REASON() format 23913 */ 23914 uint32 htr_rn_ts[WLC_HIST_TOSS_LEN]; /* time stamps corr to htr_running data */ 23915 uint32 htr_rc[WLC_HIST_TOSS_LEN]; /* last 8 toss reasons and counts in 23916 * WLC_SDC_COMPACT_TOSS_RC() format 23917 */ 23918 uint32 htr_rc_ts[WLC_HIST_TOSS_LEN]; /* time stamps corr to htr_rc */ 23919 } wl_hist_compact_toss_stats_v2_t; 23920 23921 #define WL_HIST_COMPACT_TOSS_STATS_TX_VER_3 (3u) 23922 #define WL_HIST_COMPACT_TOSS_STATS_RX_VER_3 (3u) 23923 23924 typedef struct { 23925 uint8 toss_reason; 23926 uint8 cfg_ac; 23927 uint16 toss_seq; 23928 } toss_info_t; 23929 23930 typedef struct { 23931 uint16 toss_reason; 23932 uint16 toss_cnt; 23933 } toss_cnt_t; 23934 23935 typedef struct { 23936 uint16 version; 23937 uint8 htr_type; /* from wl_slice_hist_XX_stats_xtlv_id */ 23938 uint8 htr_num; /* number of elements in htr_running or htr_rc */ 23939 uint16 htr_rnidx; /* htr_running[rnidx-1] has latest data */ 23940 uint16 htr_rcidx; /* htr_rc[rcidx-1] has latest data */ 23941 toss_info_t htr_running[WLC_HIST_TOSS_LEN]; /* last 8 reasons along with seq, etc as 23942 * per WLC_SDC_COMPACT_TOSS_REASON() format 23943 */ 23944 uint32 htr_rn_ts[WLC_HIST_TOSS_LEN]; /* time stamps corr to htr_running data */ 23945 toss_cnt_t htr_rc[WLC_HIST_TOSS_LEN]; /* last 8 toss reasons and counts in 23946 * WLC_SDC_COMPACT_TOSS_RC() format 23947 */ 23948 uint32 htr_rc_ts[WLC_HIST_TOSS_LEN]; /* time stamps corr to htr_rc */ 23949 } wl_hist_compact_toss_stats_v3_t; 23950 23951 /* ***END of SDC_TYPE_STA_ONBOARD_DEBUG specific ******* */ 23952 23953 #endif /* BCM_SDC */ 23954 23955 typedef struct wl_avs_info_v1 { 23956 uint16 version; /* Structure version */ 23957 uint16 equ_version; /* Equation Version */ 23958 uint32 RO; /* RO in OTP */ 23959 uint32 equ_csr; /* Equated CSR */ 23960 uint32 read_csr; /* Read Back CSR */ 23961 uint32 aging; /* aging setting in nvram */ 23962 } wl_avs_info_v1_t; 23963 23964 #define WL_AVS_INFO_VER_1 1 23965 23966 /* bitmap for clm_flags iovar */ 23967 #define WL_CLM_TXBF 0x01u /**< Flag for Tx beam forming */ 23968 #define WL_CLM_RED_EU 0x02u /* Flag for EU RED */ 23969 #define WL_CLM_EDCRS_EU 0x04u /**< Use EU post-2015 energy detect */ 23970 #define WL_CLM_DFS_TPC 0x08u /**< Flag for DFS TPC */ 23971 #define WL_CLM_RADAR_TYPE_EU 0x10u /**< Flag for EU */ 23972 #define WL_CLM_DSA 0x20u /**< Flag for DSA */ 23973 #define WL_CLM_PER_ANTENNA 0x40u /**< Flag for PER_ANTENNA */ 23974 #define WL_CLM_LO_GAIN_NBCAL 0x20u /**< Flag for LO_GAIN_NBCAL */ 23975 #define WL_CLM_PSD 0x80u /**< Flag for PSD */ 23976 #define WL_CLM_HE 0x100u /**< Flag for HE */ 23977 #define WL_CLM_NO_80MHZ 0x200u /**< Flag for NO_80MHZ */ 23978 #define WL_CLM_NO_40MHZ 0x400u /**< Flag for NO_40MHZ */ 23979 #define WL_CLM_NO_MIMO 0x800u /**< Flag for NO_MIMO */ 23980 #define WL_CLM_HAS_DSSS_EIRP 0x1000u /**< Flag for HAS_DSSS_EIRP */ 23981 #define WL_CLM_HAS_OFDM_EIRP 0x2000u /**< Flag for HAS_OFDM_EIRP */ 23982 #define WL_CLM_NO_160MHZ 0x4000u /**< Flag for NO_160MHZ */ 23983 #define WL_CLM_NO_80_80MHZ 0x8000u /**< Flag for NO_80_80MHZ */ 23984 #define WL_CLM_NO_240MHZ 0x10000u /**< Flag for NO_240MHZ */ 23985 #define WL_CLM_NO_320MHZ 0x200000u /**< Flag for NO_320MHZ */ 23986 #define WL_CLM_NO_160_160MHZ 0x400000u /**< Flag for NO_160_160MHZ */ 23987 #define WL_CLM_DFS_FCC WL_CLM_DFS_TPC /**< Flag for DFS FCC */ 23988 #define WL_CLM_DFS_EU (WL_CLM_DFS_TPC | WL_CLM_RADAR_TYPE_EU) /**< Flag for DFS EU */ 23989 23990 /* SC (scan core) command IDs */ 23991 enum wl_sc_cmd { 23992 WL_SC_CMD_DBG = 0, 23993 WL_SC_CMD_CNX = 1, 23994 WL_SC_CMD_CAP = 2, 23995 WL_SC_CMD_CONFIG = 3, 23996 WL_SC_CMD_PMALERT_ADJ_FACTOR = 4, 23997 WL_SC_CMD_LAST 23998 }; 23999 24000 /* WBUS sub-command IDs for unit test */ 24001 #define WL_WBUS_INA_SLOT_START 0x01u /**< Inactive slot start sub command ID. */ 24002 #define WL_WBUS_INA_SLOT_STOP 0x02u /**< Inactive slot stop sub command ID. */ 24003 24004 /* WBUS (WiFi BT uniform scheduler) command IDs */ 24005 enum wl_wbus_cmd { 24006 WL_WBUS_CMD_VER = 0, 24007 WL_WBUS_CMD_STATS = 1, 24008 WL_WBUS_CMD_UNIT_TEST = 2, 24009 WL_WBUS_CMD_BT_TEST = 3, 24010 WL_WBUS_CMD_CAP = 4, 24011 WL_WBUS_CMD_LAST 24012 }; 24013 24014 #define WBUS_BT_SCHED_TEST_PARAMS_VER_1 1 24015 24016 typedef struct wbus_bt_sched_test_params_v1 { 24017 uint16 version; 24018 uint8 min_duty_cycle; 24019 uint8 type; 24020 uint32 flags; 24021 uint32 action; 24022 uint32 duration; 24023 uint32 interval; 24024 } wbus_bt_sched_test_params_v1_t; 24025 24026 enum wl_wbus_bt_test_type { 24027 WBUS_TEST_BT_USER_TYPE_LE_SCAN = 0u, 24028 WBUS_TEST_BT_USER_TYPE_PAGE_SCAN = 1u, 24029 WBUS_TEST_BT_USER_TYPE_MAX = 2u 24030 }; 24031 24032 #define WBUS_BT_SCHED_ADD 0u 24033 #define WBUS_BT_SCHED_REMOVE 1u 24034 #define WBUS_BT_SCHED_INVALID 0xFFu 24035 24036 enum wlc_btcec_iocv_subcmds { 24037 WL_BTCEC_SUBCMD_TEST = 0, 24038 WL_BTCEC_SUBCMD_STATS = 1, 24039 WL_BTCEC_SUBCMD_TEST_BTMC_MODE = 2, 24040 WL_BTCEC_SUBCMD_LAST 24041 }; 24042 24043 /* btcec - bt schedule id's */ 24044 typedef enum { 24045 BTCEC_SCHED_ID_LE_SCAN = 1, 24046 BTCEC_SCHED_ID_PAGE_SCAN = 2 24047 } BTCEC_SCHED_IDS; 24048 /* max schedule id must be equal to last valid schedule id */ 24049 #define BTCEC_SCHED_MAX_V1 BTCEC_SCHED_ID_PAGE_SCAN 24050 24051 /* meanings of flags */ 24052 /* bit0: schedule with the given sch_id is present in btcec */ 24053 #define BTCEC_SCHSTATS_FLAG_ACTIVE (0x1) 24054 /* bit1: schedule with the given sch_id is successfully registered with wbus */ 24055 #define BTCEC_SCHSTATS_FLAG_WBUS_REG_OK (0x2) 24056 /* bit2: schedule with the given sch_id is being scheduled in wbus */ 24057 #define BTCEC_SCHSTATS_FLAG_WBUS_SCHEDULED (0x4) 24058 24059 /* v1 supports pmdur only */ 24060 #define WLC_BTCEC_STATS_V1 1u 24061 typedef struct wlc_btcec_stats_v1 { 24062 uint16 ver; 24063 uint16 len; 24064 uint32 pmdur; /* duration in millisec granted for bt corr to which wlsc slept */ 24065 } wlc_btcec_stats_v1_t; 24066 24067 /* v2 supports 1 page scan and 1 le scan */ 24068 #define WLC_BTCEC_STATS_V2 2u 24069 /* btcec per schedule stats for general reporting */ 24070 typedef struct wlc_btcec_sch_stats_v2 { 24071 uint8 sch_id; /* schedule id */ 24072 uint8 flags; /* flags. see BTCEC_SCHSTATS_FLAG_xxx */ 24073 uint8 pad[2]; 24074 uint32 slcnt; /* num slots granted to bt */ 24075 uint32 skip; /* count of btsc le/page scan, skipped */ 24076 uint32 btdur; /* duration in millisec granted for bt corr to which wlsc slept */ 24077 uint32 overlap; /* wlsc was awake and btsc le/page scan overlapped, in ms */ 24078 uint32 txblnk; /* wlauxtx blanked btsc le/page scan, in ms */ 24079 } wlc_btcec_sch_stats_v2_t; 24080 24081 /* btcec stats for general reporting */ 24082 typedef struct wlc_btcec_stats_v2 { 24083 uint16 ver; 24084 uint16 len; 24085 uint32 rx_msg_cnt; /* received messages counter */ 24086 uint32 tx_msg_cnt; /* transmitted messages counter */ 24087 uint32 add_msg_cnt; /* rx add messages counter */ 24088 uint32 del_msg_cnt; /* rx del messages counter */ 24089 uint32 stats_dur; /* dur in sec for which stats is accumulated */ 24090 uint8 pad[3]; 24091 uint8 num_sstats; /* number of elements in sstats struct */ 24092 wlc_btcec_sch_stats_v2_t sstats[]; /* sch specific stats */ 24093 } wlc_btcec_stats_v2_t; 24094 24095 /* v3 = v2 + ac_overlap */ 24096 #define WLC_BTCEC_STATS_V3 3u 24097 /* btcec per schedule stats for general reporting */ 24098 typedef struct wlc_btcec_sch_stats_v3 { 24099 uint8 sch_id; /* schedule id */ 24100 uint8 flags; /* flags. see BTCEC_SCHSTATS_FLAG_xxx */ 24101 uint8 pad[2]; 24102 uint32 slcnt; /* num slots granted to bt */ 24103 uint32 skip; /* count of btsc le/page scan, skipped */ 24104 uint32 btdur; /* duration in millisec granted for bt corr to which wlsc slept */ 24105 uint32 overlap; /* wlsc was awake and btsc le/page scan overlapped, in ms */ 24106 uint32 txblnk; /* wlauxtx blanked btsc le/page scan, in ms */ 24107 uint32 ac_overlap; /* wlaux overlapped btsc le/page scan, in ms */ 24108 uint16 sched_duration; /* duration finally scheduled in msch, in ms */ 24109 uint16 sched_interval; /* interval finally scheduled in msch, in ms */ 24110 uint16 req_duration; /* duration finally scheduled in msch, in ms */ 24111 uint16 req_interval; /* interval finally scheduled in msch, in ms */ 24112 uint16 min_duty_cycle; /* interval finally scheduled in msch, in ms */ 24113 uint16 pad2; 24114 } wlc_btcec_sch_stats_v3_t; 24115 24116 /* btcec stats for general reporting */ 24117 typedef struct wlc_btcec_stats_v3 { 24118 uint16 ver; 24119 uint16 len; 24120 uint32 rx_msg_cnt; /* received messages counter */ 24121 uint32 tx_msg_cnt; /* transmitted messages counter */ 24122 uint32 add_msg_cnt; /* rx add messages counter */ 24123 uint32 del_msg_cnt; /* rx del messages counter */ 24124 uint32 stats_dur; /* dur in sec for which stats is accumulated */ 24125 uint8 pad[3]; 24126 uint8 num_sstats; /* number of elements in sstats struct */ 24127 wlc_btcec_sch_stats_v3_t sstats[]; /* sch specific stats */ 24128 } wlc_btcec_stats_v3_t; 24129 24130 /* btcec periodic ecounters structs 24131 * [similar to wlc_btcec_stats_vX_t, but constrained in size due to its periodicity of reporting] 24132 */ 24133 #define WLC_BTCEC_PERIODIC_CNTRS_V1 (1u) 24134 24135 /* btcec per schedule stats for periodic ecounters reporting */ 24136 typedef struct wlc_btcec_periodic_sch_stats_v1 { 24137 uint8 sch_id; /* schedule id from BTCEC_SCHED_IDS */ 24138 uint8 flags; /* flags. see BTCEC_SCHSTATS_FLAG_xxx */ 24139 uint8 slcnt; /* num slots granted to bt */ 24140 uint8 skip; /* count of btsc le/page scan, skipped */ 24141 uint16 btdur; /* duration in millisec granted for bt corr to which wlsc slept */ 24142 uint16 overlap; /* wlsc was awake and btsc le/page scan overlapped, in ms */ 24143 uint16 txblnk; /* wlauxtx blanked btsc le/page scan, in ms */ 24144 uint16 ac_overlap; /* wlaux overlapped btsc le/page scan, in ms */ 24145 uint16 sched_duration; /* duration finally scheduled in msch, in ms */ 24146 uint16 sched_interval; /* interval finally scheduled in msch, in ms */ 24147 uint16 req_duration; /* duration finally scheduled in msch, in ms */ 24148 uint16 req_interval; /* interval finally scheduled in msch, in ms */ 24149 uint16 min_duty_cycle; /* interval finally scheduled in msch, in ms */ 24150 uint16 pad2; 24151 } wlc_btcec_periodic_sch_stats_v1_t; 24152 24153 /* btcec stats for periodic ecounters reporting */ 24154 typedef struct { 24155 uint16 ver; 24156 uint16 len; 24157 uint8 rx_msg_cnt; /* received messages counter */ 24158 uint8 tx_msg_cnt; /* transmitted messages counter */ 24159 uint8 add_msg_cnt; /* rx add messages counter */ 24160 uint8 del_msg_cnt; /* rx del messages counter */ 24161 uint8 pad[3]; 24162 uint8 num_sstats; /* number of elements in sstats struct */ 24163 wlc_btcec_periodic_sch_stats_v1_t sstats[BTCEC_SCHED_MAX_V1]; /* sch specific */ 24164 } wlc_btcec_periodic_stats_v1_t; 24165 24166 #define WBUS_OFFLOAD_STATS_V1 1u 24167 #define WBUS_OFFLOAD_USER_STATS_V1 1u 24168 24169 typedef struct wbus_offload_user_stats_v1 { 24170 uint16 version; /* version of this structure */ 24171 uint16 len; /* size of this structure */ 24172 uint8 type; /* Offload type */ 24173 uint8 pad[3]; 24174 uint32 num_accepted; /* num of times user got accepted */ 24175 uint32 num_rejected; /* num of times user got rejected */ 24176 uint32 num_failed; /* num of times user accept failed */ 24177 } wbus_offload_user_stats_v1_t; 24178 24179 typedef struct wbus_offload_stats_v1 { 24180 uint16 version; /* version of this structure */ 24181 uint16 len; /* size of this structure */ 24182 uint32 num_accept_ok; /* num accept pass */ 24183 uint32 num_accept_fail; /* num accept fail */ 24184 uint32 num_rejected; /* num of rejected users so far */ 24185 uint32 num_rejected_bt; /* num of rejected users so far for BT */ 24186 uint32 num_rejected_all; /* num times all offloads are rejected */ 24187 uint8 pad[3]; 24188 uint8 num_user; /* num of users stats */ 24189 wbus_offload_user_stats_v1_t user_stats[]; /* per user stats */ 24190 } wbus_offload_stats_v1_t; 24191 24192 #define KEY_UPDATE_INFO_VER_V1 1 24193 typedef struct key_update_info_v1 24194 { 24195 uint16 ver; 24196 uint8 pad; 24197 uint8 flags; 24198 uint32 timestamp; 24199 uint32 algo; 24200 uint32 key_flags; 24201 struct ether_addr ea; 24202 struct ether_addr sa; 24203 } key_update_info_v1_t; 24204 24205 /* Key update flag bit field */ 24206 #define KEY_UPD_FLAG_ADD_KEY 0x1 /* 0 - Removal, 1 - Add key */ 24207 24208 #ifdef WLLLW 24209 /* LLW Session */ 24210 #define LLW_VERSION 1 24211 #define LLW_STATS_VERSION 1 24212 24213 /* LLW roles */ 24214 #define LLW_ROLE_SCHEDULER 0 24215 #define LLW_ROLE_CLIENT 1 24216 24217 /* LLW modes */ 24218 #define LLW_MODE_GAPS 0 24219 #define LLW_MODE_BACK_TO_BACK 1 24220 24221 /* LLW session max values */ 24222 #define LLW_MAX_SESSION_ID 10 24223 #define LLW_MAX_FLOW_ID 40 24224 #define LLW_MAX_CLIENT_NUM 15 24225 #define LLW_MAX_GAPS_PERIOD 20 24226 #define LLW_MAX_GAPS_VAR 3 24227 #define LLW_MAX_RETX_CNT 10 24228 #define LLW_MAX_AIFSN EDCF_AIFSN_MAX 24229 #define LLW_MAX_CWMIN EDCF_ECW_MAX 24230 #define LLW_MAX_CWMAX EDCF_ECW_MAX 24231 #define LLW_MAX_PER_NUMERATOR 100 24232 #define LLW_MAX_PER_DENOM 10000 24233 #define LLW_MAX_CLIENT_ID 15 24234 #define LLW_MAX_PKT_SIZE 1500 24235 #define LLW_MAX_PKT_NUM 10 24236 #define LLW_MAX_MCS 9 24237 #define LLW_MAX_NUM_STREAMS 8 24238 #define LLW_MAX_IBS 32 24239 24240 /* Per LLW session config */ 24241 /* WL_LLW_CMD_SESSION_CREATE, WL_LLW_CMD_SESSION_UPDATE */ 24242 typedef struct wl_llw_session_cfg { 24243 uint8 session_id; 24244 uint8 role; 24245 uint8 mode; 24246 uint8 client_id; 24247 uint8 gaps_period; 24248 uint8 gaps_var; 24249 uint8 aifsn; 24250 uint8 ecwmin; /* exponent value for minimum contention window */ 24251 uint8 ecwmax; /* exponent value for maximum contention window */ 24252 uint8 mcs; 24253 uint8 num_streams; 24254 uint8 ibs; /* interblock spacing in usecs, for spacing between Transaction Blocks */ 24255 uint16 ul_pkt_size; 24256 uint16 dl_pkt_size; 24257 uint16 per_denom; /* denominator for target PER */ 24258 uint8 per_numerator; /* this value divided by per_denom gives the target PER */ 24259 uint8 dl_pkt_num; 24260 uint8 client_num; 24261 uint8 retx_cnt; 24262 uint8 pwr_save; 24263 uint8 auto_ba; /* automatic RX/TX BA session setup (no negotiation needed) */ 24264 uint8 if_index; 24265 uint8 padding[3]; 24266 struct ether_addr multicast_addr; 24267 struct ether_addr scheduler_addr; 24268 } wl_llw_session_cfg_t; 24269 24270 /* WL_LLW_CMD_SESSION_DELETE, WL_LLW_CMD_SESSION_ENABLE, WL_LLW_CMD_SESSION_DISABLE, */ 24271 /* WL_LLW_CMD_SESSION_GET */ 24272 typedef struct wl_llw_session_cmd { 24273 uint8 session_id; 24274 uint8 padding[3]; 24275 } wl_llw_session_cmd_t; 24276 24277 /* LLW client config */ 24278 /* WL_LLW_CMD_CLIENT_ADD, WL_LLW_CMD_CLIENT_DELETE, WL_LLW_CMD_CLIENT_GET */ 24279 typedef struct wl_llw_client_cfg { 24280 uint8 session_id; 24281 uint8 client_id; 24282 struct ether_addr mac; 24283 } wl_llw_client_cfg_t; 24284 24285 /* Get list of session IDs from FW */ 24286 /* WL_LLW_CMD_SESSION_ID */ 24287 typedef struct llw_session_id_list { 24288 uint8 id_count; /* Number of session IDs */ 24289 uint8 list[]; /* list of session IDs */ 24290 } llw_session_id_list_t; 24291 24292 /* LLW XTLV structures */ 24293 typedef struct wl_llw_iov_cmd { 24294 uint16 version; 24295 uint8 cmd_cnt; 24296 uint8 pad; 24297 uint8 cmds[]; 24298 } wl_llw_iov_cmd_t; 24299 24300 typedef struct wl_llw_iov_sub_cmd { 24301 uint16 type; 24302 uint16 len; 24303 union { 24304 int32 status; /* Processed status - Set by FW */ 24305 uint32 options; /* Command Process Options - Set by Host */ 24306 } u; 24307 uint8 data[]; 24308 } wl_llw_iov_sub_cmd_t; 24309 24310 /* to be used in type field of wl_llw_iov_sub_cmd_t structure while issuing LLW commands */ 24311 typedef enum wl_llw_sub_cmd_xtlv_id { 24312 WL_LLW_CMD_SESSION_ID, 24313 WL_LLW_CMD_SESSION_CREATE, 24314 WL_LLW_CMD_SESSION_DELETE, 24315 WL_LLW_CMD_SESSION_UPDATE, 24316 WL_LLW_CMD_SESSION_ENABLE, 24317 WL_LLW_CMD_SESSION_DISABLE, 24318 WL_LLW_CMD_SESSION_GET, 24319 WL_LLW_CMD_CLIENT_ADD, 24320 WL_LLW_CMD_CLIENT_DELETE, 24321 WL_LLW_CMD_CLIENT_GET, 24322 WL_LLW_CMD_FLOW_ADD, 24323 WL_LLW_CMD_FLOW_DELETE, 24324 WL_LLW_CMD_FLOW_GET, 24325 WL_LLW_CMD_STATS 24326 } wl_llw_sub_cmd_xtlv_id_t; 24327 24328 /* LLW stats */ 24329 typedef enum wl_llw_xtlv { 24330 WL_LLW_XTLV_STATS 24331 } wl_llw_xtlv_t; 24332 24333 typedef struct wl_llw_stats { 24334 uint32 txpackets; 24335 uint32 txbytes; 24336 uint32 txrts; 24337 uint32 txnocts; 24338 uint32 txnoack; 24339 uint32 txfail; 24340 uint32 txretry; 24341 uint32 txdropped; 24342 uint32 tx_avg_q_time; 24343 uint32 tx_min_q_time; 24344 uint32 tx_max_q_time; 24345 uint32 tx_avg_rem_lifetime; 24346 uint32 tx_min_rem_lifetime; 24347 uint32 tx_max_rem_lifetime; 24348 uint32 rxpackets; 24349 uint32 rxbytes; 24350 uint32 rxfail; 24351 uint32 rxretry; 24352 uint32 txschedfrm; 24353 uint32 retxschedfrm; 24354 } wl_llw_stats_t; 24355 24356 typedef struct wl_llw_stats_hdr { 24357 uint16 version; 24358 uint16 stats_cnt; 24359 uint32 tot_len; 24360 uint8 stat_xtlvs[]; 24361 } wl_llw_stats_hdr_t; 24362 24363 /* WL_LLW_XTLV_STATS */ 24364 typedef struct wl_llw_stats_xtlv { 24365 uint16 type; 24366 uint16 len; 24367 uint8 stats[]; 24368 } wl_llw_stats_xtlv_t; 24369 24370 /* WL_LLW_CMD_STATS */ 24371 typedef struct wl_llw_stats_cmd { 24372 uint8 session_id; 24373 uint8 client_id; 24374 uint16 padding; 24375 } wl_llw_stats_cmd_t; 24376 24377 /* LLW flow ring ID config */ 24378 /* WL_LLW_CMD_FLOW_ADD, WL_LLW_CMD_FLOW_DELETE, WL_LLW_CMD_FLOW_GET */ 24379 typedef struct wl_llw_flow_cfg { 24380 uint8 session_id; 24381 uint8 flow_id; 24382 uint16 padding; 24383 } wl_llw_flow_cfg_t; 24384 #endif /* End of LLW Session */ 24385 24386 #define WL_OMI_CONFIG_VERSION_1 1u 24387 24388 /* values for valid_bm */ 24389 #define OMI_CONFIG_VALID_BMP_RXNSS 0x0001u 24390 #define OMI_CONFIG_VALID_BMP_BW 0x0002u 24391 #define OMI_CONFIG_VALID_BMP_ULMU_DISABLE 0x0004u 24392 #define OMI_CONFIG_VALID_BMP_TXNSTS 0x0008u 24393 #define OMI_CONFIG_VALID_BMP_ERSU_DISABLE 0x0010u 24394 #define OMI_CONFIG_VALID_BMP_DLMU_RSD_RCM 0x0020u 24395 #define OMI_CONFIG_VALID_BMP_ULMU_DATA_DISABLE 0x0040u 24396 #define OMI_CONFIG_VALID_BMP_ALL 0x0FFFu 24397 24398 #define OMI_CONFIG_BW_MAX 3u 24399 24400 typedef struct wl_omi_config { 24401 uint16 valid_bm; /* validity bitmask for each config */ 24402 uint8 rxnss; 24403 uint8 bw; 24404 uint8 ulmu_disable; 24405 uint8 txnsts; 24406 uint8 ersu_disable; 24407 uint8 dlmu_resound_rec; 24408 uint8 ulmu_data_disable; 24409 uint8 pad[3]; 24410 } wl_omi_config_t; 24411 24412 typedef struct wl_omi_req { 24413 uint16 version; 24414 uint16 len; 24415 wl_omi_config_t config; 24416 } wl_omi_req_v1_t; 24417 24418 /* Bits for ULMU disable reason */ 24419 #define OMI_ULMU_DISABLED_HOST 0x01u /* Host has disabled through he omi */ 24420 24421 #ifdef WLAWDL 24422 #define OMI_ULMU_DISABLED_AWDL 0x02u /* Disabled due to AWDL enabled */ 24423 #endif /* WLAWDL */ 24424 24425 #define OMI_ULMU_DISABLED_NAN 0x04u /* Disabled due to NAN enabled */ 24426 #define OMI_ULMU_DISABLED_BTCOEX 0x08u /* Disabled while in BT Coex activity */ 24427 #define OMI_ULMU_DISABLED_LTECOEX 0x10u /* Disabled due to LTE Coex activity */ 24428 #define OMI_ULMU_DISABLED_NON11AX_CONN 0x20u /* Disabled due to not associated to 11ax AP */ 24429 #define OMI_ULMU_DISABLED_THROTTLE_ENABLE 0x40u /* Disabled due to throttle timer running */ 24430 #define OMI_ULMU_DISABLED_TXCHAIN_DOWNGRADE 0x80u /* Disabled due to Txchain downgrade */ 24431 #define OMI_ULMU_DISABLED_TX_DUTY_CYCLE 0x100u /* Disabled due to tx duty cycle */ 24432 24433 /* Bits for DLMU Resound Recommendation reason */ 24434 #define OMI_DLMU_RSD_RCM_HOST (0x1u << 0u) /* Host directly set the bit */ 24435 #define OMI_DLMU_RSD_RCM_MPF (0x1u << 1u) /* Set on MPF state change */ 24436 24437 #define WL_OMI_STATUS_VERSION_1 1u 24438 typedef struct wl_omi_status { 24439 uint16 version; 24440 uint16 len; 24441 wl_omi_config_t omi_pending; /* OMI requests pending */ 24442 uint16 omi_data; /* current OM Control field for completed OMI requests */ 24443 uint16 ulmu_disable_reason; /* Bits representing UL OFDMA disable reasons */ 24444 uint32 ulmu_disable_duration; /* Duration (ms) for which UL OFDMA is disabled */ 24445 } wl_omi_status_v1_t; 24446 24447 #define WL_OMI_STATUS_VERSION_2 2u 24448 typedef struct wl_omi_status_v2 { 24449 uint16 version; 24450 uint16 len; 24451 wl_omi_config_t omi_pending; /* OMI requests pending */ 24452 uint16 omi_data; /* Current OM Control field for completed OMI requests */ 24453 uint16 ulmu_disable_reason; /* Bits representing UL OFDMA disable reasons */ 24454 uint32 ulmu_disable_duration; /* Duration (ms) for which UL OFDMA is disabled */ 24455 uint32 dlmu_rsd_rcm_duration; /* Dur (ms) for which ResoundRecommentation is set */ 24456 uint16 dlmu_rsd_rcm_mpf_state; /* The MPF state value */ 24457 uint16 dlmu_rsd_rcm_reason; /* DL MU-MIMO recommendation reasons bitmap */ 24458 } wl_omi_status_v2_t; 24459 24460 #define WL_ULMU_DISABLE_STATS_VERSION_1 1u 24461 typedef struct wl_ulmu_disable_stats { 24462 uint16 version; 24463 uint16 len; 24464 uint32 ulmu_disable_ts; /* UL OFDMA disabled timestamp (ms) */ 24465 uint16 ulmu_disable_reason; /* Bits representing UL OFDMA disable reasons */ 24466 uint16 ulmu_disable_count; /* UL MU disable count during current infra association */ 24467 uint32 last_trig_rx_ts; /* Last trigger frame received timestamp (ms) */ 24468 uint16 trig_rx_count; /* No of trigger frames received after last UL OFDMA disable */ 24469 uint16 max_latency; /* Max latency by AP to re-act for UL OFDMA disable request (ms) */ 24470 uint16 min_latency; /* Min latency by AP to re-act for UL OFDMA disable request (ms) */ 24471 uint16 avg_latency; /* Avg latency by AP to re-act for UL OFDMA disable request (ms) */ 24472 } wl_ulmu_disable_stats_v1_t; 24473 24474 /* sub-xtlv IDs within WL_STATS_XTLV_WL_SLICE_TX_HISTOGRAMS */ 24475 enum wl_tx_histogram_id { 24476 WL_TX_HIST_TXQ_ID = 1, 24477 WL_TX_HIST_LOW_TXQ_ID = 2, 24478 WL_TX_HIST_SCBQ_ID = 3, 24479 WL_TX_HIST_EXCUR_TXQ_ID = 4, 24480 WL_TX_HIST_EXCUR_LOW_TXQ_ID = 5 24481 }; 24482 24483 /* common tx histogram structure */ 24484 typedef struct wl_tx_hist { 24485 uint16 hist_bmap; /* bit N indicates histogram follows for priority or fifo N */ 24486 uint16 hist_count; /* count of histograms in var len array */ 24487 uint32 hist[1]; /* var len array of histograms each prefix by hist length */ 24488 } wl_tx_hist_t; 24489 24490 #define WL_TX_HIST_FIXED_LEN (OFFSETOF(wl_tx_hist_t, hist)) 24491 #define WL_TX_HIST_FULL_LEN(num_hist, max_hist_size) \ 24492 (WL_TX_HIST_FIXED_LEN + (num_hist) * \ 24493 (max_hist_size + 1) * sizeof(uint32)) 24494 24495 /* structure for WL_TX_HIST_TXQ, WL_TX_HIST_EXCUR_TXQ_ID */ 24496 typedef struct wl_tx_hist_txq { 24497 uint32 bsscfg_bmap; /* bitmap of bsscfg indexes associated with this queue */ 24498 wl_tx_hist_t tx_hist; /* tx histograms */ 24499 } wl_tx_hist_txq_t; 24500 24501 #define WL_TX_HIST_TXQ_FIXED_LEN \ 24502 (OFFSETOF(wl_tx_hist_txq_t, tx_hist) + WL_TX_HIST_FIXED_LEN) 24503 #define WL_TX_HIST_TXQ_FULL_LEN(num_hist, max_hist_size) \ 24504 (OFFSETOF(wl_tx_hist_txq_t, tx_hist) + \ 24505 WL_TX_HIST_FULL_LEN(num_hist, max_hist_size)) 24506 24507 /* sub-xtlv IDs within WL_STATS_XTLV_WL_SLICE_TX_HISTOGRAMS */ 24508 enum wl_txq_stop_histogram_id { 24509 WL_TXQ_STOP_HIST_SW = 1, 24510 WL_TXQ_STOP_HIST_HW = 2, 24511 WL_TXQ_STOP_HIST_PKTS_SW = 3, 24512 WL_TXQ_STOP_HIST_PKTS_HW = 4, 24513 WL_TXQ_STOP_HIST_MAX = WL_TXQ_STOP_HIST_PKTS_HW 24514 }; 24515 24516 /* common tx histogram structure */ 24517 typedef struct wl_txq_stop_hist { 24518 wl_tx_hist_t tx_hist; /* tx histograms */ 24519 } wl_txq_stop_hist_t; 24520 24521 #define WL_TXQ_STOP_HIST_FIXED_LEN \ 24522 (OFFSETOF(wl_txq_stop_hist_t, tx_hist) + WL_TX_HIST_FIXED_LEN) 24523 #define WL_TXQ_STOP_HIST_FULL_LEN(num_hist, max_hist_size) \ 24524 (OFFSETOF(wl_txq_stop_hist_t, tx_hist) + \ 24525 WL_TX_HIST_FULL_LEN(num_hist, max_hist_size)) 24526 24527 /* structure for WL_TX_HIST_LOW_TXQ, WL_TX_HIST_EXCUR_LOW_TXQ_ID */ 24528 typedef struct wl_tx_hist_low_txq { 24529 wl_tx_hist_t tx_hist; /* tx histograms */ 24530 } wl_tx_hist_low_txq_t; 24531 24532 #define WL_TX_HIST_LOW_TXQ_FIXED_LEN \ 24533 (OFFSETOF(wl_tx_hist_low_txq_t, tx_hist) + WL_TX_HIST_FIXED_LEN) 24534 #define WL_TX_HIST_LOW_TXQ_FULL_LEN(num_hist, max_hist_size) \ 24535 (OFFSETOF(wl_tx_hist_low_txq_t, tx_hist) + \ 24536 WL_TX_HIST_FULL_LEN(num_hist, max_hist_size)) 24537 24538 /* structure for WL_TX_HIST_SCBQ */ 24539 typedef struct wl_tx_hist_scbq { 24540 struct ether_addr ea; /* ether addr of peer */ 24541 uint16 bsscfg_idx; /* bsscfg index */ 24542 wl_tx_hist_t tx_hist; /* tx histograms */ 24543 } wl_tx_hist_scbq_t; 24544 24545 #define WL_TX_HIST_SCBQ_FIXED_LEN \ 24546 (OFFSETOF(wl_tx_hist_scbq_t, tx_hist) + WL_TX_HIST_FIXED_LEN) 24547 #define WL_TX_HIST_SCBQ_FULL_LEN(num_hist, max_hist_size) \ 24548 (OFFSETOF(wl_tx_hist_scbq_t, tx_hist) + \ 24549 WL_TX_HIST_FULL_LEN(num_hist, max_hist_size)) 24550 24551 /* sub-xtlv IDs within WL_STATS_XTLV_WL_SLICE_TX_QUEUE_DEPTH */ 24552 enum wl_tx_queue_depth_id { 24553 WL_TX_QUEUE_DEPTH_TXQ_ID = 1, 24554 WL_TX_QUEUE_DEPTH_LOW_TXQ_ID = 2, 24555 WL_TX_QUEUE_DEPTH_SCBQ_ID = 3, 24556 WL_TX_QUEUE_DEPTH_EXCUR_TXQ_ID = 4, 24557 WL_TX_QUEUE_DEPTH_EXCUR_LOW_TXQ_ID = 5 24558 }; 24559 24560 /* common tx queue depth structure */ 24561 typedef struct wl_tx_queue_depth { 24562 uint16 queue_depth_bmap; /* bitmap of queue depth in var len array */ 24563 uint16 queue_depth_count; /* count of queue depth in var len array */ 24564 uint16 queue_depth[1]; /* var len array of queue depth */ 24565 } wl_tx_queue_depth_t; 24566 24567 #define WL_TX_QUEUE_DEPTH_FIXED_LEN (OFFSETOF(wl_tx_queue_depth_t, queue_depth)) 24568 #define WL_TX_QUEUE_DEPTH_FULL_LEN(num_queue_depth) \ 24569 (WL_TX_QUEUE_DEPTH_FIXED_LEN + (num_queue_depth) * \ 24570 sizeof(uint16)) 24571 24572 /* structure for WL_TX_QUEUE_DEPTH_TXQ_ID, WL_TX_QUEUE_DEPTH_EXCUR_TXQ_ID */ 24573 typedef struct wl_tx_queue_depth_txq { 24574 uint32 bsscfg_map; /* bitmap of bsscfg indexes associated with this queue */ 24575 wl_tx_queue_depth_t tx_queue_depth; /* queue depth */ 24576 } wl_tx_queue_depth_txq_t; 24577 24578 #define WL_TX_QUEUE_DEPTH_TXQ_FIXED_LEN \ 24579 (OFFSETOF(wl_tx_queue_depth_txq_t, tx_queue_depth) + WL_TX_QUEUE_DEPTH_FIXED_LEN) 24580 #define WL_TX_QUEUE_DEPTH_TXQ_FULL_LEN(num_queue_depth) \ 24581 (OFFSETOF(wl_tx_queue_depth_txq_t, tx_queue_depth) + \ 24582 WL_TX_QUEUE_DEPTH_FULL_LEN(num_queue_depth)) 24583 24584 /* structure for WL_TX_QUEUE_DEPTH_LOW_TXQ_ID, WL_TX_QUEUE_DEPTH_EXCUR_LOW_TXQ_ID */ 24585 typedef struct wl_tx_queue_depth_low_txq { 24586 wl_tx_queue_depth_t tx_queue_depth; /* queue depth */ 24587 } wl_tx_queue_depth_low_txq_t; 24588 24589 #define WL_TX_QUEUE_DEPTH_LOW_TXQ_FIXED_LEN \ 24590 (OFFSETOF(wl_tx_queue_depth_low_txq_t, tx_queue_depth) + WL_TX_QUEUE_DEPTH_FIXED_LEN) 24591 #define WL_TX_QUEUE_DEPTH_LOW_TXQ_FULL_LEN(num_queue_depth) \ 24592 (OFFSETOF(wl_tx_queue_depth_low_txq_t, tx_queue_depth) + \ 24593 WL_TX_QUEUE_DEPTH_FULL_LEN(num_queue_depth)) 24594 24595 /* structure for WL_TX_QUEUE_DEPTH_SCBQ_ID */ 24596 typedef struct wl_tx_queue_depth_scbq { 24597 struct ether_addr ea; /* ether addr of peer */ 24598 uint16 bsscfg_idx; /* bsscfg index */ 24599 wl_tx_queue_depth_t tx_queue_depth; /* queue depth */ 24600 } wl_tx_queue_depth_scbq_t; 24601 24602 #define WL_TX_QUEUE_DEPTH_SCBQ_FIXED_LEN \ 24603 (OFFSETOF(wl_tx_queue_depth_scbq_t, tx_queue_depth) + WL_TX_QUEUE_DEPTH_FIXED_LEN) 24604 #define WL_TX_QUEUE_DEPTH_SCBQ_FULL_LEN(num_queue_depth) \ 24605 (OFFSETOF(wl_tx_queue_depth_scbq_t, tx_queue_depth) + \ 24606 WL_TX_QUEUE_DEPTH_FULL_LEN(num_queue_depth)) 24607 24608 /* sub-xtlv IDs within WL_STATS_XTLV_BUS_PCIE_TX_HISTOGRAMS */ 24609 enum wl_pcie_tx_histogram_id { 24610 WL_PCIE_TX_HIST_ID = 1 24611 }; 24612 24613 /* structure for PCIE_TX_HIST_ID */ 24614 typedef struct wl_pcie_tx_hist { 24615 uint16 ring_id; /* PCIe ring id */ 24616 uint16 pad; /* 4-byte alignment */ 24617 wl_tx_hist_t tx_hist; /* hist_bmap: 24618 * 0x1=tx histogram 24619 * 0x2=tx status pending histogram 24620 */ 24621 } wl_pcie_tx_hist_t; 24622 24623 #define WL_PCIE_TX_HIST_FIXED_LEN \ 24624 (OFFSETOF(wl_pcie_tx_hist_t, tx_hist) + WL_TX_HIST_FIXED_LEN) 24625 #define WL_PCIE_TX_HIST_FULL_LEN(num_hist, max_hist_size) \ 24626 (OFFSETOF(wl_pcie_tx_hist_t, tx_hist) + \ 24627 WL_TX_HIST_FULL_LEN(num_hist, max_hist_size)) 24628 24629 /* sub-xtlv IDs within WL_STATS_XTLV_BUS_PCIE_TX_QUEUE_DEPTH */ 24630 enum wl_pcie_tx_queue_depth_id { 24631 WL_PCIE_TX_QUEUE_DEPTH_ID = 1 24632 }; 24633 24634 /* structure for WL_PCIE_TX_QUEUE_DEPTH_ID */ 24635 typedef struct wl_pcie_tx_queue_depth { 24636 uint16 ring_id; /* PCIe ring id */ 24637 uint16 queue_depth; /* queue depth of ring id */ 24638 uint16 tx_status_pend; /* tx status pending of ring id */ 24639 uint16 pad; /* 4-byte alignment */ 24640 } wl_pcie_tx_queue_depth_t; 24641 24642 #define WL_PCIE_TX_QUEUE_DEPTH_FIXED_LEN sizeof(wl_pcie_tx_queue_depth_t) 24643 24644 #define WL_WSEC_DEL_PMK_VER_V1 1u 24645 /* tlv ids for del pmk */ 24646 #define WL_DEL_PMK_TLV_ID 1u 24647 #define WL_DEL_PMKID_TLV_ID 2u 24648 #define WL_DEL_PEER_ADDR_TLV_ID 3u 24649 typedef struct wl_wsec_del_pmk { 24650 uint16 version; 24651 uint16 length; 24652 uint8 xtlvs[]; 24653 } wl_wsec_del_pmk_t; 24654 #define WL_WSEC_DEL_PMK_FIXED_LEN_V1 OFFSETOF(wl_wsec_del_pmk_t, xtlvs) 24655 24656 /* WTC */ 24657 #define WLC_WTC_ROAM_VER_1 1 24658 24659 #define WLC_WTC_ROAM_CUR_VER WLC_WTC_ROAM_VER_1 24660 #define WLC_WTC_ROAM_CONFIG_HDRLEN 4u 24661 24662 typedef enum wtc_band_list { 24663 WTC_BAND_2G = 0, 24664 WTC_BAND_5G = 1, 24665 WTC_MAX_BAND = 2 24666 } wtc_band_list_e; 24667 24668 typedef struct wlc_wtcroam { 24669 uint16 ver; 24670 uint16 len; 24671 uint8 data[]; 24672 } wlc_wtc_args_t; 24673 24674 typedef struct wlc_wtcconfig_info { 24675 uint8 mode; /* enable or disable wtc. static config */ 24676 uint8 scantype; /* type of scan for wtc roam */ 24677 int8 rssithresh[WTC_MAX_BAND]; /* rssi value below which wtc is active */ 24678 int8 ap_rssithresh[WTC_MAX_BAND]; /* rssi value above which candidate AP is good */ 24679 } wlc_wtcconfig_info_v1_t; 24680 24681 /* RCROAM */ 24682 #define WLC_RC_ROAM_VER_1 1 24683 24684 typedef struct wlc_rcroam { 24685 uint16 ver; 24686 uint16 len; 24687 uint8 data[]; 24688 } wlc_rcroam_t; 24689 24690 typedef struct wlc_rcroam_info_v1 { 24691 uint16 inactivity_period; /* inactivty monitor period */ 24692 uint16 roam_scan_timeout; 24693 uint16 periodic_roam_scan_timeout; 24694 uint8 roam_trig_step; /* roaming trigger step value */ 24695 bool enab; 24696 } wlc_rcroam_info_v1_t; 24697 24698 #define WLC_RC_ROAM_CUR_VER WLC_RC_ROAM_VER_1 24699 #define RCROAM_HDRLEN 4u 24700 #define MAX_RCSCAN_TIMER 300u 24701 24702 /* Reasons for re-setting RC ROAM params */ 24703 #define WLC_RCROAM_RESET_JOIN 0 /* New join */ 24704 #define WLC_RCROAM_REASON_ROAM_SUCCESS 1 /* Successful roam */ 24705 #define WLC_RCROAM_RESET_RSSI_CHANGE 2 /* RSSI of the link which was bad regained/worsened */ 24706 #define WLC_RCROAM_RESET_BCN_LOSS 3 /* Beacon loss */ 24707 #define WLC_RCROAM_RESET_DISASSOC_RX 4 /* Disassoc was received */ 24708 #define WLC_RCROAM_RESET_DEAUTH_RX 5 /* Deauth was received */ 24709 #define WLC_RCROAM_RESET_IOVAR 6 /* Iovar to disable rcroam was received from host */ 24710 #define WLC_RCROAM_RESET_WTCREQ 7 /* WTC request overriding rcroam */ 24711 #define WLC_RCROAM_RESET_RSN_ABORT 8 /* Reset RCROAM params due to roam abort */ 24712 24713 #define WLC_SILENT_ROAM_VER_1 1 24714 /* silent roam information struct */ 24715 typedef struct wlc_sroam_info_v1 { 24716 /* Silent roam Set/Get value */ 24717 uint8 sroam_on; /* sroam on/off */ 24718 int8 sroam_min_rssi; /* minimum rssi threshold to activate the feature */ 24719 uint8 sroam_rssi_range; /* rssi tolerance to determine stationary status */ 24720 uint8 sroam_score_delta; /* roam score delta value to prune candidate ap */ 24721 uint8 sroam_period_time; /* required monitoring period to trigger roaming scan */ 24722 uint8 sroam_band; /* band setting of roaming scan (all, 5g, 2g) */ 24723 uint8 sroam_inact_cnt; /* tx/rx frame count threshold for checking inactivity */ 24724 /* Silent roam monitor value */ 24725 int8 sroam_ref_rssi; /* reference rssi which is picked when monitoring is 24726 * started. it is updated to current rssi when it's 24727 * out from rssi range 24728 */ 24729 uint8 sroam_time_since; /* elapsed time since start monitoring */ 24730 uint8 pad[3]; 24731 uint32 sroam_txfrm_prev; /* save current tx frame counts */ 24732 uint32 sroam_rxfrm_prev; /* save current rx frame counts */ 24733 } wlc_sroam_info_v1_t; 24734 24735 typedef struct wlc_sroam { 24736 uint16 ver; 24737 uint16 len; 24738 uint8 data[]; 24739 } wlc_sroam_t; 24740 24741 #define WLC_SILENT_ROAM_CUR_VER WLC_SILENT_ROAM_VER_1 24742 #define SROAM_HDRLEN 4u 24743 24744 #define DEF_SROAM_OFF 0 24745 #define DEF_SROAM_MIN_RSSI -65 24746 #define DEF_SROAM_RSSI_RANGE 3u 24747 #define DEF_SROAM_SCORE_DELTA 1u 24748 #define DEF_SROAM_PERIOD_TIME 10u 24749 #define DEF_SROAM_INACT_CNT 5u 24750 #define MAX_SROAM_RSSI -70 24751 #define MAX_SROAM_RSSI_RANGE 5u 24752 #define MAX_SROAM_SCORE_DELTA 10u 24753 #define MAX_SROAM_PERIOD_TIME 250u 24754 #define SROAM_BAND_AUTO 3u 24755 24756 /* MACSMPL IOVAR parameters */ 24757 typedef enum wl_macdbg_macsmpl_iovar_id { 24758 WL_MACSMPL_START = 0, 24759 WL_MACSMPL_STOP = 1, 24760 WL_MACSMPL_DUMP = 2, 24761 WL_MACSMPL_STATUS = 3, 24762 WL_MACSMPL_SIZE = 4 24763 } wl_macdbg_macsmpl_iovar_id_t; 24764 24765 /* WL_MACSMPL_STATUS values */ 24766 typedef enum wl_macdbg_macsmpl_status { 24767 WL_MACSMPL_STATUS_IDLE = 0, 24768 WL_MACSMPL_STATUS_ACTIVE = 1, 24769 WL_MACSMPL_STATUS_WAIT_FOR_TRIG = 2, 24770 WL_MACSMPL_STATUS_TRIGGERED = 3 24771 } wl_macdbg_macsmpl_status_t; 24772 24773 /* WL_MACSMPL_START_PARAM subcommand data */ 24774 typedef struct wl_macsmpl_start_param { 24775 uint32 trig_condition; /* trigger condition */ 24776 uint16 gpio_mux; /* MACControl1 GPIOSel field */ 24777 uint8 pad[2]; /* 4-byte struct alignment */ 24778 } wl_macsmpl_param_start_t; 24779 24780 /* MAC SC fragment request data */ 24781 typedef struct wl_macsmpl_frag_req_param { 24782 uint32 offset; /* requested MAC SC fragment offset */ 24783 uint32 size; /* requested MAC SC fragment size, bytes */ 24784 } wl_macsmpl_frag_req_param_t; 24785 24786 /* MAC SC fragment response data */ 24787 typedef struct wl_macsmpl_frag_resp_param { 24788 uint32 offset; /* MAC SC response fragment offset */ 24789 uint32 size; /* MAC SC reponse fragment size, bytes */ 24790 uint8 data[]; /* MAC SC response fragment data, flexible array */ 24791 } wl_macsmpl_frag_resp_param_t; 24792 24793 /* MAC SC status data */ 24794 typedef struct wl_macsmpl_status { 24795 uint32 maccontrol1; /* MACControl1 register value */ 24796 uint32 macsc_flags; /* M_MACSC_FLAGS SHM register value */ 24797 uint16 sc_play_ctrl; /* TXE SampleCollectPlayCtrl register value */ 24798 uint16 sc_cur_ptr; /* TXE SampleCollectCurPtr register value */ 24799 uint16 sc_start_ptr; /* TXE SampleCollectStartPtr register value */ 24800 uint16 sc_stop_ptr; /* TXE SampleCollectStopPtr register value */ 24801 } wl_macsmpl_status_t; 24802 24803 /* WL_MACSMPL parameters data */ 24804 typedef struct wl_macsmpl_param { 24805 wl_macdbg_macsmpl_iovar_id_t subcmd_id; 24806 union { 24807 wl_macsmpl_param_start_t start; 24808 wl_macsmpl_frag_req_param_t frag_req; 24809 } u; 24810 } wl_macsmpl_param_t; 24811 24812 /* High priority P2P */ 24813 #define WL_HP2P_COUNTERS_VER 2u 24814 typedef struct hp2p_counters { 24815 uint16 frames_queued; 24816 uint16 frames_processed; 24817 uint16 frames_exp; 24818 uint16 frames_preempt; 24819 uint16 frames_retried; 24820 uint16 reserved; /* reserved, rsvd2 and rsvd3 are experimental counters */ 24821 uint16 rsvd2; 24822 uint16 rsvd3; 24823 } hp2p_counters_t; 24824 24825 typedef struct hp2p_counters_v2 { 24826 uint32 frames_queued; /* Number of AMPDUs processed */ 24827 uint16 frames_exp; /* Number of Lifetime expiries */ 24828 uint16 edt_retry; /* Exceed due to - retry */ 24829 uint16 mpif_reconf; /* MPIF Reconfigure */ 24830 uint16 exceed_delay; /* Exceed delay threshold */ 24831 uint16 edt_nav_thresh; /* Exceed due to - NAV threshold */ 24832 uint16 edt_dc_def; /* Exceed due to - DC based deferral */ 24833 uint16 edt_tx_fifo_full; /* Exceed due to - Tx FIFO full */ 24834 uint16 edt_cts_thresh; /* Exceed due to - CTS threshold */ 24835 uint16 dbg1; /* dbgX are for internal debugging */ 24836 uint16 dbg2; 24837 uint16 dbg3; 24838 uint16 dbg4; 24839 uint16 dbg5; 24840 uint16 dbg6; 24841 uint16 dbg7; 24842 uint16 dbg8; 24843 uint16 dbg9; 24844 uint16 dbg10; 24845 } hp2p_counters_v2_t; 24846 24847 typedef struct hp2p_counters_hdr { 24848 uint16 version; /* version of hp2p_counters_t structure */ 24849 uint16 len; 24850 uint16 slice_idx; 24851 uint16 pad; 24852 uint8 counters[]; 24853 } hp2p_counters_hdr_t; 24854 24855 /* HP2P RLLW Stats */ 24856 #define WL_HP2P_RLLW_STATS_VER 1u 24857 typedef struct hp2p_rllw_stats_hdr { 24858 uint16 version; /* version of hptp_rllw_stats structure */ 24859 uint16 len; /* length of the payload */ 24860 uint8 slice_idx; /* Slice idx BAND_2G_INDEX - 0 / BAND_5G_INDEX - 1 */ 24861 uint8 pad[3]; 24862 uint8 stats[]; /* rllw_stats instance */ 24863 } hp2p_rllw_stats_hdr_t; 24864 24865 /* 24866 * rllw stats common & per band 24867 * 24868 */ 24869 typedef struct hp2p_rllw_stats_v1 { 24870 /* Slice Specific Stats */ 24871 uint16 n_hnav_intrs; /* # of high nav interrupts */ 24872 uint16 n_switches; /* # of Switches to band n */ 24873 /* Stats on wlc_trig */ 24874 uint16 n_override_pkts; /* # of pkts enqd with ovrd bit set */ 24875 uint16 n_overrides; /* # of overrides - this is only trig_wlc */ 24876 uint16 n_override_pkts_acked; /* # of ovrd pkts that got an ACK */ 24877 uint16 n_override_pkts_not_acked; /* # of ovrd pkts that werent ACKed */ 24878 } hp2p_rllw_stats_v1_t; 24879 24880 /* TX enable flags */ 24881 #define WL_HP2P_TX_AMPDU 0x0001u 24882 #define WL_HP2P_TX_AMSDU 0x0002u 24883 #define WL_HP2P_TX_RDG 0x0004u 24884 #define WL_HP2P_TX_TXOP 0x0008u 24885 #define WL_HP2P_TX_TXOP_RTS 0x0010u 24886 24887 /* RX enable flags */ 24888 #define WL_HP2P_RX_AMPDU 0x0001u 24889 #define WL_HP2P_RX_AMSDU 0x0002u 24890 #define WL_HP2P_RX_RDG 0x0004u 24891 #define WL_HP2P_RX_AMPDU_REORDER 0x0008u 24892 #define WL_HP2P_RX_DELETE 0x0010u 24893 24894 /* Max/min values for configuration parameters to check validity */ 24895 #define WL_HP2P_MAX_RETRY_MAX 14u 24896 #define WL_HP2P_MAX_RETRY_MIN 6u 24897 #define WL_HP2P_LATENCY_TARGET_MAX 30u 24898 #define WL_HP2P_BURST_INTERVAL_MAX 64u 24899 #define WL_HP2P_MAX_FIFO 5u 24900 #define WL_HP2P_MAX_UCODE_LATENCY_THR 500u 24901 #define WL_HP2P_MAX_UCODE_RECOV_TO 500u 24902 #define WL_HP2P_MAX_UCODE_NAV_THR 50000u 24903 24904 #define WLC_HP2P_DEF_NAV_THRESH 13u 24905 #define WLC_HP2P_MIN_NAV_THRESH 1u 24906 #define WLC_HP2P_MAX_NAV_THRESH 35u 24907 #define WLC_HP2P_MAX_HOF_WAIT_THRESH 65u 24908 24909 #define WL_HP2P_VERSION 1u 24910 typedef struct hp2p_tx_config { 24911 struct ether_addr peer_addr; 24912 uint16 max_burst; 24913 uint16 txop; /* stored in network order (ls octet first) */ 24914 uint16 flags; /* flags to enable/disable AMPDU, AMSDU, RDG, TXOP, TXOP_RTS */ 24915 uint8 aci; 24916 uint8 ecw; 24917 uint8 fifo; 24918 uint8 tid; 24919 uint8 burst_interval; 24920 uint8 latency_target; 24921 uint8 max_retry; 24922 uint8 pad; 24923 } hp2p_tx_config_t; 24924 24925 typedef struct hp2p_rx_config { 24926 struct ether_addr peer_addr; 24927 uint16 flags; /* flags to enable/disable AMPDU, AMSDU, RDG, AMPDU Reorder */ 24928 uint8 tid; 24929 uint8 pad; 24930 uint16 ba_wsize; /* AMPDU BA Window size */ 24931 } hp2p_rx_config_t; 24932 24933 typedef struct hp2p_udbg_config { 24934 uint16 recovery_timeout; /* multiples of 256 usecs */ 24935 uint16 latency_thresh; /* multiples of 256 usecs */ 24936 uint16 enable_trap; /* trap if ucode delay exceeds latency_thresh */ 24937 uint16 nav_thresh; /* in usec */ 24938 } hp2p_udbg_config_t; 24939 24940 #define WLC_HP2P_RLLW_RETRY_LIMIT 7u 24941 #define WLC_HP2P_MAX_PKTLIFETIME_IN_MS 2000u /* 2 seconds */ 24942 24943 /* 24944 * nav_thresh: 13 : By default set to 13ms 24945 * retry_limit: 0 : Auto / Default retry limit to be applied 24946 * Max retry limit is 7 24947 * pkt_lifetime: 0 : Auto / Default pkt lifetime to be applied 24948 * Max value cant exceed 2000u (2seconds) 24949 * floor_rate: 0 : Auto / Default min rate to be applied 24950 * ceiling_rate: 0 : Auto / Default max rate to be applied 24951 * hof_wait_thr: 0 : Disabled by default 24952 * hof_switch_dur: 0 : Disabled by default 24953 */ 24954 typedef struct hp2p_rllw_cfg { 24955 uint8 nav_thresh; /* NAV threshold in ms */ 24956 uint8 retry_limit; /* # max retries before pkt is discarded */ 24957 uint16 pkt_lifetime; /* Pkt lifetime in ms */ 24958 uint16 floor_rate; /* Min rate in Mbps */ 24959 uint16 ceiling_rate; /* Max rate in Mbps */ 24960 uint16 hof_wait_thr; /* HOF packet wait threshold in ms */ 24961 uint16 hof_switch_dur; /* How long to stay in the switched band in ms */ 24962 uint16 hof_pkt_life_thr; /* HOF remaining pkt lifetime threshold in ms */ 24963 uint16 pad; 24964 } hp2p_rllw_cfg_t; 24965 24966 #define WL_HP2P_CAP_MPEER 0x01u /* Multipeer Hp2p */ 24967 #define WL_HP2P_CAP_MPEER_TXOP 0x02u /* Same txop transmit on mpeer Hp2p */ 24968 #define WL_HP2P_CAP_RLLW 0x04u /* Band switching and override on NAV */ 24969 #define WL_HP2P_CAP_SPLIT_TXS 0x08u /* Spilt tx status for rllw sub feature */ 24970 24971 typedef uint32 hp2p_cap_t; /* HP2P capabilities */ 24972 24973 typedef struct hp2p_cmd { 24974 uint16 type; 24975 uint16 len; 24976 uint8 data[]; 24977 } hp2p_cmd_t; 24978 24979 #define WL_HP2P_CTRL_MPEER_TXOP_ENAB 0x01u /* Same txop transmit on mpeer Hp2p */ 24980 /* 24981 * Band switching on NAV. Control for band 24982 * switching for HPP traffic, applies only 24983 * for dual local/peer map availability. 24984 */ 24985 #define WL_HP2P_CTRL_RLLW_SWITCH_ENAB 0x02u /* RLLW Band switching enabled */ 24986 #define WL_HP2P_CTRL_RLLW_PRIMARY_OVR 0x04u /* RLLW Override enab on primary band. */ 24987 #define WL_HP2P_CTRL_RLLW_DENY_BT 0x08u /* RLLW Give WiFi priority over BT */ 24988 #define WL_HP2P_CTRL_RLLW_PKTLT_ENAB 0x10u /* RLLW pkt lifetime based decision enabled */ 24989 #define WL_HP2P_CTRL_RLLW_HOF_SW_ENAB 0x20u /* RLLW Band switching due to HOF timeout enabled */ 24990 24991 typedef uint32 hp2p_ctrl_t; /* HP2P Ctrl bits */ 24992 24993 /* TLVs for HP2P related IOVARs */ 24994 typedef enum wl_hp2p_tlv { 24995 HP2P_TLV_RLLW_SLICE_STATS = 1u, 24996 HP2P_TLV_RLLW_PEER_STATS = 2u 24997 } wl_hp2p_tlv_t; 24998 24999 /* Top level HP2P RLLW stats header */ 25000 typedef struct wl_hp2p_stats_hdr { 25001 uint32 n_stats; /* # of TLVs in the payload */ 25002 uint32 totlen; /* total length of TLVs following this field */ 25003 uint8 stats_tlvs[]; /* chain of TLVs for reader to decode based on length */ 25004 } wl_hp2p_stats_hdr; 25005 25006 /* Per Slice RLLW Stats */ 25007 typedef struct wlc_hp2p_rllw_slice_stats { 25008 uint8 slice; /* slice number */ 25009 uint8 pad; 25010 uint16 n_hnav_intrs; /* # of high nav interrupts on slice n */ 25011 uint16 n_overrides; /* # of overrides */ 25012 uint16 n_switches; /* # of switches */ 25013 uint32 n_switched_pkts; /* # of packets after switching to slice n */ 25014 uint32 n_switched_pkts_not_acked; /* # of packets after switch & Not ACKed */ 25015 uint32 n_override_pkts; /* # of pkts enqd with ovrd bit set on slice n */ 25016 uint32 n_override_pkts_not_acked; /* # of ovrd pkts that werent ACKed on slice n */ 25017 uint32 n_no_switch_in_pktlife; /* # of no switch happened,pkts within lifetime */ 25018 uint32 n_no_override_in_pktlife; /* # of no ovrd happened,pkts within lifetime */ 25019 uint16 n_no_hof_switch_in_pktlife; /* # of skipped HOF switches due to pkt lifetime */ 25020 uint16 n_no_hof_switch_null_pkt; /* # of skipped HOF switches due to NULL HOF pkt */ 25021 uint16 n_hof_switches; /* # of switches triggered by HOF timeout */ 25022 uint16 n_hof_intrs; /* # of HOF interrupts on slice n */ 25023 } wlc_hp2p_rllw_slice_stats_t; 25024 25025 /* Peer specific stats */ 25026 typedef struct { 25027 uint8 slice; /* slice number */ 25028 uint8 pad[3]; 25029 uint16 n_overrides; /* # of overrides */ 25030 uint16 n_switches; /* # of switches */ 25031 uint32 n_switched_pkts; /* # of packets after switching to slice n */ 25032 uint32 n_switched_pkts_not_acked; /* # of packets after switch & Not ACKed */ 25033 uint32 n_override_pkts; /* # of pkts enqd with ovrd bit set on slice n */ 25034 uint32 n_override_pkts_not_acked; /* # of ovrd pkts that werent ACKed on slice n */ 25035 uint32 n_no_switch_in_pktlife; /* # of no switch happened,pkts within lifetime */ 25036 uint32 n_no_override_in_pktlife; /* # of no ovrd happened,pkts within lifetime */ 25037 uint16 n_no_hof_switch_in_pktlife; /* # of skipped HOF switches due to pkt lifetime */ 25038 uint16 n_hof_switches; /* # of switches triggered by HOF timeout */ 25039 } wlc_hp2p_rllw_peer_stats_t; 25040 25041 /* Peer Stats Info to host */ 25042 typedef struct wlc_hp2p_peer_stats_info { 25043 struct ether_addr peer_mac; /* Mac Address of the HP2P peer */ 25044 uint16 nslices; /* Number of slices */ 25045 wlc_hp2p_rllw_peer_stats_t peer_stats[MAX_NUM_D11CORES]; /* Peer specific stats */ 25046 } wlc_hp2p_peer_stats_info_t; 25047 25048 typedef struct hp2p_cmd_hdr { 25049 uint16 version; 25050 uint16 slice_idx; 25051 uint8 cmd[]; 25052 } hp2p_cmd_hdr_t; 25053 25054 /* to be used in type field of hp2p_cmd_t structure while issuing HP2P commands */ 25055 typedef enum hp2p_cmd_id { 25056 WL_HP2P_CMD_ENABLE = 0, /* Enable HP2P */ 25057 WL_HP2P_CMD_TX_CONFIG = 1, /* Tx Configuration */ 25058 WL_HP2P_CMD_RX_CONFIG = 2, /* Rx Configuration */ 25059 WL_HP2P_CMD_COUNTERS = 3, /* HP2P Counters */ 25060 WL_HP2P_CMD_UDBG_CONFIG = 4, /* ucode debug config */ 25061 WL_HP2P_CMD_RLLW_CFG = 5, /* HP2P RLLW config */ 25062 WL_HP2P_CMD_RLLW_STATS = 6, /* HP2P RLLW Stats */ 25063 WL_HP2P_CMD_CAP = 7, /* HP2P Capability */ 25064 WL_HP2P_CMD_CTRL = 8, /* HP2P feature ctrl */ 25065 WL_HP2P_CMD_RLLW_CFG_V2 = 9, /* HP2P RLLW config v2 */ 25066 WL_HP2P_CMD_RLLW_STATS_V2 = 10 /* HP2P RLLW Stats v2 */ 25067 } hp2p_cmd_id_t; 25068 25069 /** 25070 * TX Profile. 25071 * 25072 * TX Profile allows the host to configure frames with a specific profile. This 25073 * includes but is not limited to transmit rate, number of retries, whether or 25074 * not to use frame aggregation, whether or not to use AMSDU and RTS protection 25075 * threshold. The original intent is for the host to be able to specify transmit 25076 * "reliability". 25077 */ 25078 25079 /* IOVAR */ 25080 typedef struct wlc_tx_profile_ioc { 25081 uint16 id; 25082 uint16 length; 25083 union { 25084 uint32 options; 25085 uint32 status; 25086 } u; 25087 uint8 data[]; 25088 } wlc_tx_profile_ioc_t; 25089 25090 #define TX_PROFILE_IOV_HDR_SIZE (OFFSETOF(wlc_tx_profile_ioc_t, u)) 25091 #define TX_PROFILE_IOV_OPTION_SIZE (sizeof(wlc_tx_profile_ioc_t) - TX_PROFILE_IOV_HDR_SIZE) 25092 25093 /* TX Profile parameter TLV */ 25094 enum tx_profile_param_id { 25095 WL_TX_PROFILE_PARAM_RATE = 0, 25096 WL_TX_PROFILE_PARAM_RTS = 1, 25097 WL_TX_PROFILE_PARAM_RETRY = 2, 25098 WL_TX_PROFILE_PARAM_BW = 3, 25099 WL_TX_PROFILE_PARAM_AGGRE = 4, 25100 WL_TX_PROFILE_PARAM_AMSDU = 5, 25101 WL_TX_PROFILE_PARAM_AMPDU = 6, 25102 WL_TX_PROFILE_PARAM_LAST = 7 25103 }; 25104 25105 typedef enum tx_profile_param_id tx_profile_param_id_t; 25106 25107 typedef struct tx_profile_param { 25108 uint16 param_id; 25109 uint16 length; 25110 uint8 param[]; 25111 } tx_profile_param_t; 25112 25113 /* Subcommands */ 25114 typedef enum tx_profile_cmd_id { 25115 /* The IOVAR to enable/disable the TX Profile in general. An integer 25116 * is passed to the firmware with value 0 or 1. 25117 */ 25118 WL_TX_PROFILE_ENABLE = 0, 25119 /* Create a TX Profile with provided parameters. */ 25120 WL_TX_PROFILE_CREATE = 1, 25121 /* Update a TX profile with provided parameters. */ 25122 WL_TX_PROFILE_UPDATE = 2, 25123 /* Delete a TX Profile. */ 25124 WL_TX_PROFILE_DELETE = 3, 25125 /* Dump TX Profile related debug information. */ 25126 WL_TX_PROFILE_DUMP = 4, 25127 /* Show TX Profile stats */ 25128 WL_TX_PROFILE_STATS = 5, 25129 /* Show Tx Profile tagged packets log */ 25130 WL_TX_PROFILE_PKT_LOGS = 6 25131 } tx_profile_cmd_id_t; 25132 25133 typedef struct tx_profile_index_params { 25134 uint16 profile_index; 25135 uint16 length; 25136 uint8 params[]; 25137 } tx_profile_index_params_t; 25138 25139 typedef struct tx_profile_index_stats { 25140 uint32 profile_index; 25141 uint32 tx_finish_cnt; 25142 uint32 tx_acked_cnt; 25143 uint32 tx_phy_err_cnt; 25144 uint32 tx_suspend_cnt; 25145 } tx_profile_index_stats_t; 25146 25147 typedef struct tx_profile_pkt_log { 25148 uint32 rate; 25149 uint16 retries; 25150 uint16 rts; 25151 } tx_profile_pkt_log_t; 25152 25153 /* End TX Profile section */ 25154 25155 typedef enum wl_rffe_cmd_type { 25156 WL_RFFE_CMD_DEBUG_MODE = 0, 25157 WL_RFFE_CMD_ELNABYP_MODE = 1, 25158 WL_RFFE_CMD_REG = 2, 25159 WL_RFFE_CMD_ELNA_VDD_MODE = 3, 25160 WL_RFFE_CMD_LAST 25161 } wl_rffe_cmd_type_t; 25162 25163 /** RFFE struct passed through ioctl */ 25164 typedef struct { 25165 uint32 regaddr; /**< rFEM_RegAddr */ 25166 uint32 antnum; /**< rFEM AntNum */ 25167 uint32 slaveid; /**< rFEM SlaveID */ 25168 uint32 value; /**< read/write value */ 25169 } rffe_reg_t; 25170 25171 #ifndef BCMUTILS_ERR_CODES 25172 25173 /* 25174 * SOE (Security Offload Engine) status codes. 25175 */ 25176 25177 /* SOE status codes are reserved from -6144 to -7167 (1K) */ 25178 25179 enum wl_soe_status { 25180 /* Invalid operational context */ 25181 WL_SOE_E_BAD_OP_CONTEXT = -6144, 25182 25183 /* Invalid operational type */ 25184 WL_SOE_E_BAD_OP_TYPE = -6145, 25185 25186 /* Failure to get NAF3 encoded scalar */ 25187 WL_SOE_E_BN_GET_NAF3_ERROR = -6146, 25188 25189 /* Failure to get NAF3 params */ 25190 WL_SOE_E_ECG_GET_NAF3_PARAMS_ERROR = -6147, 25191 25192 /* FAILURE to get Montgomery params */ 25193 WL_SOE_E_MONT_PARAMS_GET_ERROR = -6148, 25194 25195 /* Invalid OSL handle */ 25196 WL_SOE_E_BAD_SI_OSH = -6149, 25197 25198 /* Invalid ECG group */ 25199 WL_SOE_E_BAD_ECG_GROUP = -6150, 25200 25201 /* Invalid BN context */ 25202 WL_SOE_E_BAD_BN_CTX = -6151, 25203 25204 /* Invalid SOE core register base address */ 25205 WL_SOE_E_BAD_SOE_REGBASE = -6152, 25206 25207 /* Invalid SOE context */ 25208 WL_SOE_E_BAD_SOE_CONTXT = -6153, 25209 25210 /* Number of words are too short (i.e., not enough 25211 * room to encode the PKA sequence) 25212 */ 25213 WL_SOE_E_PKA_SEQUENCE_WORDS_TOO_SHORT = -6154, 25214 25215 /* Generic bn_get error */ 25216 WL_SOE_E_PKA_BN_GET_ERROR = -6155, 25217 25218 /* Sequence buf too short for BN */ 25219 WL_SOE_E_PKA_BN_BUF_TOO_SHORT_BN = -6156, 25220 25221 /* Sequence buf too short for ECG prime */ 25222 WL_SOE_E_PKA_BN_BUF_TOO_SHORT_ECG_PRIME = -6157, 25223 25224 /* Sequence buf too short for Montgomery N' */ 25225 WL_SOE_E_PKA_SEQ_BUF_TOO_SHORT_MONT_PRIME = -6158, 25226 25227 /* Sequence buf too short for Accumulator registers */ 25228 WL_SOE_E_PKA_SEQ_BUF_TOO_SHORT_ACCM_REG = -6159, 25229 25230 /* Sequence buf too short for the point P */ 25231 WL_SOE_E_PKA_SEQ_BUF_TOO_SHORT_P = -6160, 25232 25233 /* Sequence buf too short for -P */ 25234 WL_SOE_E_PKA_SEQ_BUF_TOO_SHORT_PN = -6161, 25235 25236 /* Sequence buf too short for 3P */ 25237 WL_SOE_E_PKA_SEQ_BUF_TOO_SHORT_3P = -6162, 25238 25239 /* Sequence buf too short for -3P */ 25240 WL_SOE_E_PKA_SEQ_BUF_TOO_SHORT_3PN = -6163, 25241 25242 /* Sequence buf too short for NAF3 scalar */ 25243 WL_SOE_E_PKA_SEQ_BUF_TOO_SHORT_NAF3_SCALAR = -6164, 25244 25245 /* Sequence buf too short for load shift count */ 25246 WL_SOE_E_PKA_SEQ_BUF_TOO_SHORT_PRE_JMP = -6165, 25247 25248 /* SOE engine(SHA/PKA) failed to complete the operation */ 25249 WL_SOE_E_ENGINE_UNABLE_TO_COMPLETE = -6166, 25250 25251 /* Wrong LIR (Long Integer Register) type */ 25252 WL_SOE_E_PKA_BAD_LIR_TYPE = -6167, 25253 25254 /* Reference count has reached maximum */ 25255 WL_SOE_E_MAX_REF_COUNT_REACHED = -6168, 25256 25257 /* Failed to get the SOE context reference */ 25258 WL_SOE_E_GET_REF_FAILED = -6169, 25259 25260 /* Incoming digest length is invalid */ 25261 WL_SOE_E_SHA_WRONG_DIGEST_LEN = -6170 25262 }; 25263 25264 #endif /* BCMUTILS_ERR_CODES */ 25265 25266 #define NR5GCX_STATUS_VER_1 1 25267 /* NR coex status structures */ 25268 typedef struct wlc_nr5gcx_status_v1 { 25269 uint16 version; /* version info */ 25270 uint16 len; /* status length */ 25271 uint32 mode; /* NR coex status */ 25272 uint32 nr_req_cnt; /* NR req number since last read */ 25273 uint32 nr_dur; /* NR duration since last read, us */ 25274 uint32 nr_duty_cycle; /* NR duty cycle since last read */ 25275 uint32 nr_max_dur; /* NR max duration in a single request */ 25276 uint32 wlan_crit_cnt; /* aggregated # of WLAN critical events */ 25277 uint32 wlan_crit_dur; /* aggregated WLAN critical event duration, ms */ 25278 uint32 wlan_crit_max_dur; /* Duration of the WLAN critical events whose dur is max */ 25279 uint16 wlan_crit_evt_bitmap; /* WLAN critical event occurrence bitmap, 25280 * 1 event per bit. 25281 */ 25282 uint16 wlan_crit_max_evt_type; /* The event type of the WLAN critical 25283 * event whose dur is max 25284 */ 25285 } wlc_nr5gcx_status_v1_t; 25286 25287 #define NR5GCX_STATUS_VER_2 2 25288 /* NR coex status structures */ 25289 typedef struct wlc_nr5gcx_status_v2 { 25290 uint16 version; /* version info */ 25291 uint16 len; /* status length */ 25292 uint32 mode; /* NR coex status */ 25293 uint32 nr_req_cnt; /* NR req number since last read */ 25294 uint32 nr_dur; /* NR duration since last read, us */ 25295 uint32 nr_duty_cycle; /* NR duty cycle since last read */ 25296 uint32 nr_max_dur; /* NR max duration in a single request */ 25297 uint32 wlan_crit_cnt; /* aggregated # of WLAN critical events */ 25298 uint32 wlan_crit_dur; /* aggregated WLAN critical event duration, ms */ 25299 uint32 wlan_crit_max_dur; /* Duration of the WLAN critical events whose dur is max */ 25300 uint16 wlan_crit_evt_bitmap; /* WLAN critical event occurrence bitmap, 25301 * 1 event per bit. 25302 */ 25303 uint16 wlan_crit_max_evt_type; /* The event type of the WLAN critical 25304 * event whose dur is max 25305 */ 25306 uint16 data_stall_cnt; /* # of data stall, i.e., # of rate recovery. */ 25307 uint16 nr_deny_cnt_data_stall; /* # of NR deny due to data stall. */ 25308 uint16 nr_deny_dur_data_stall; /* Duration of NR deny due to data stall. */ 25309 uint16 succ_rr_cnt; /* # of successful rate recovery. */ 25310 } wlc_nr5gcx_status_v2_t; 25311 25312 #define RC1CX_STATUS_VER_1 1 25313 /* RC1 coex status structures */ 25314 typedef struct wlc_rc1cx_status_v1 { 25315 uint16 version; /* version info */ 25316 uint16 len; /* status length */ 25317 uint32 mode; /* RC1 coex status */ 25318 uint32 rc1_req_cnt; /* RC1 req number since last read */ 25319 uint32 rc1_dur; /* RC1 duration since last read, us */ 25320 uint32 rc1_duty_cycle; /* RC1 duty cycle since last read */ 25321 uint32 rc1_max_dur; /* RC1 max duration in a single request */ 25322 uint32 wlan_crit_cnt; /* aggregated # of WLAN critical events */ 25323 uint32 wlan_crit_dur; /* aggregated WLAN critical event duration, ms */ 25324 uint32 wlan_crit_max_dur; /* Duration of the WLAN critical events whose dur is max */ 25325 uint16 wlan_crit_evt_bitmap; /* WLAN critical event occurrence bitmap, 25326 * 1 event per bit. 25327 */ 25328 uint16 wlan_crit_max_evt_type; /* The event type of the WLAN critical 25329 * event whose dur is max 25330 */ 25331 } wlc_rc1cx_status_v1_t; 25332 25333 #define RC1CX_STATUS_VER_2 2 25334 /* RC1 coex status structures */ 25335 typedef struct wlc_rc1cx_status_v2 { 25336 uint16 version; /* version info */ 25337 uint16 len; /* status length */ 25338 uint32 mode; /* RC1 coex status */ 25339 uint32 rc1_req_cnt; /* RC1 req number since last read */ 25340 uint32 rc1_dur; /* RC1 duration since last read, us */ 25341 uint32 rc1_duty_cycle; /* RC1 duty cycle since last read */ 25342 uint32 rc1_max_dur; /* RC1 max duration in a single request */ 25343 uint32 wlan_crit_cnt; /* aggregated # of WLAN critical events */ 25344 uint32 wlan_crit_dur; /* aggregated WLAN critical event duration, ms */ 25345 uint32 wlan_crit_max_dur; /* Duration of the WLAN critical events whose dur is max */ 25346 uint16 wlan_crit_evt_bitmap; /* WLAN critical event occurrence bitmap, 25347 * 1 event per bit. 25348 */ 25349 uint16 wlan_crit_max_evt_type; /* The event type of the WLAN critical 25350 * event whose dur is max 25351 */ 25352 uint16 data_stall_cnt; /* # of data stall, i.e., # of rate recovery. */ 25353 uint16 rc1_deny_cnt_data_stall; /* # of RC1 deny due to data stall. */ 25354 uint16 rc1_deny_dur_data_stall; /* Duration of RC1 deny due to data stall. */ 25355 uint16 succ_rr_cnt; /* # of successful rate recovery. */ 25356 } wlc_rc1cx_status_v2_t; 25357 25358 /* ifdef (WLC_OBSS_HW) */ 25359 /* OBSS HW specific Macros */ 25360 #define WLC_OBSS_HW_CMD_VERSION_1 1u 25361 25362 /* OBSS HW config sub command identification flag */ 25363 #define OBSS_HW_CFG_SUB_CMD_ENABLE (1u << 0u) 25364 #define OBSS_HW_CFG_SUB_CMD_SW_CACHE_INTVL (1u << 1u) 25365 #define OBSS_HW_CFG_SUB_CMD_PHY_SENSE_DUR (1u << 2u) 25366 #define OBSS_HW_CFG_SUB_CMD_MASK (OBSS_HW_CFG_SUB_CMD_ENABLE | \ 25367 OBSS_HW_CFG_SUB_CMD_SW_CACHE_INTVL | \ 25368 OBSS_HW_CFG_SUB_CMD_PHY_SENSE_DUR) 25369 25370 #define WLC_OBSS_HW_DEF_SW_CACHE_INTVL 1u /* 1 sec */ 25371 #define WLC_OBSS_HW_MAX_SW_CACHE_INTVL 5u /* 5 sec */ 25372 #define WLC_OBSS_HW_DEF_PHY_SENSE_DUR 30 /* 30 msec */ 25373 #define WLC_OBSS_HW_MAX_PHY_SENSE_DUR 500 /* 500 msec */ 25374 25375 /* OBSS HW test sub command identification flag */ 25376 #define WLC_OBSS_HW_TEST_SUB_CMD_TEST_MODE (1u << 0u) 25377 #define WLC_OBSS_HW_TEST_SUB_CMD_MITI_MODE (1u << 1u) 25378 #define WLC_OBSS_HW_TEST_SUB_CMD_MASK (WLC_OBSS_HW_TEST_SUB_CMD_TEST_MODE |\ 25379 WLC_OBSS_HW_TEST_SUB_CMD_MITI_MODE) 25380 25381 /* Test mode values */ 25382 #define WLC_OBSS_HW_TEST_MODE_STOP 0u /* Stop the test */ 25383 #define WLC_OBSS_HW_TEST_MODE_TRIGGER 1u /* Trigger mode */ 25384 #define WLC_OBSS_HW_TEST_MODE_FREE_RUNNING 2u /* Free running stats collection */ 25385 25386 #define WLC_OBSS_HW_TEST_MITI_TX_RX_DISABLE 0u /* Both Tx and Rx mitigation disabled */ 25387 #define WLC_OBSS_HW_TEST_MITI_RX_FILT_PKTENG 1u /* Rx mitigation via filter override enabled */ 25388 /* All Tx miti disabled; Only pkteng */ 25389 #define WLC_OBSS_HW_TEST_MITI_TX_ONLY 2u /* Rx mitigation disabled, Tx mitigation */ 25390 #define WLC_OBSS_HW_TEST_MITI_TX_RX_FILT 3u /* Rx Tx mitigation enabled */ 25391 #define WLC_OBSS_HW_TEST_MITI_CHAN_CHANGE 4u /* Mitigation by chanspec change */ 25392 25393 #define WL_OBSS_ANT_MAX 2u /* Max Antennas */ 25394 #define ACPHY_OBSS_STATS_BIN_CNT 8u /* min 1 for default */ 25395 #define ACPHY_OBSS_SUBBAND_CNT 8u /* Max sub band counts i.e., 160Mhz = 8 * 20MHZ */ 25396 25397 enum wlc_obss_hw_cmd_id { 25398 WLC_OBSS_HW_CMD_VER = 1u, 25399 WLC_OBSS_HW_CMD_CONFIG = 2u, 25400 WLC_OBSS_HW_CMD_DUMP_STATS = 3u, 25401 WLC_OBSS_HW_CMD_TEST = 4u, 25402 WLC_OBSS_HW_CMD_LAST 25403 }; 25404 25405 /* OBSS HW specific structures */ 25406 typedef struct wlc_obss_hw_cfg_v1 { 25407 uint16 sub_cmd_flags; /* Flag bits to Identify configuring sub command */ 25408 uint8 is_enable; /* Feature is enabled or not */ 25409 uint8 sw_cache_interval; /* SW cache interval to cache OBSS stats in sec */ 25410 uint16 phy_sensing_duration; /* PHY OBSS sensing duration in msec */ 25411 } wlc_obss_hw_cfg_v1_t; 25412 25413 typedef struct wlc_obss_hw_stats_v1 { 25414 uint16 avg_obss_stats[WL_OBSS_ANT_MAX][ACPHY_OBSS_SUBBAND_CNT][ACPHY_OBSS_STATS_BIN_CNT]; 25415 uint16 obss_det_stats[ACPHY_OBSS_SUBBAND_CNT]; 25416 uint16 stats_cnt; /* Stats count */ 25417 uint8 obss_mit_status; /* OBSS mitigation status */ 25418 uint8 mit_bw; /* Mitigation BW that got selected */ 25419 } wlc_obss_hw_stats_v1_t; 25420 25421 typedef struct wlc_obss_hw_test_v1 { 25422 uint16 sub_cmd_flags; /* Flag bits to Identify configuring sub command */ 25423 uint8 test_mode; /* To stop/start respective test mode */ 25424 uint8 mitigation_mode; /* mitigation enabling/disabling options */ 25425 } wlc_obss_hw_test_v1_t; 25426 25427 #define STA_PM_SC_OFLD_CFG_VER_V1 1u 25428 #define STA_PM_SC_OFLD_ENAB_FLAG (1u << 0u) 25429 25430 #define STA_PM_SC_FLAG_MASK (1u << 0u) 25431 #define STA_PM_SC_CONS_EXP_BCN_RX_THR_MASK (1u << 1u) 25432 #define STA_PM_SC_MISSED_BCN_THR_MASK (1u << 2u) 25433 #define STA_PM_SC_OFLD_RSSI_THR_MASK (1u << 3u) 25434 #define STA_PM_SC_OFLD_RSSI_HYST_MASK (1u << 4u) 25435 #define STA_PM_SC_OFLD_TIM_EXIT_DLY_MASK (1u << 5u) 25436 #define STA_PM_SC_OFLD_FIELD_MASK_ALL (STA_PM_SC_FLAG_MASK | \ 25437 STA_PM_SC_CONS_EXP_BCN_RX_THR_MASK | \ 25438 STA_PM_SC_MISSED_BCN_THR_MASK | \ 25439 STA_PM_SC_OFLD_RSSI_THR_MASK | \ 25440 STA_PM_SC_OFLD_RSSI_HYST_MASK | \ 25441 STA_PM_SC_OFLD_TIM_EXIT_DLY_MASK) 25442 25443 #define STA_PM_SC_OFLD_RSSI_HYST_MAX 80u 25444 25445 typedef struct wlc_sta_pm_sc_ofld_cfg_v1 { 25446 uint16 version; 25447 uint16 len; 25448 uint16 field_mask; /* Provides info on which of the following fields are valid */ 25449 uint16 flags; /* enable 0x1 */ 25450 uint8 cons_exp_bcn_rx_thr; /* Consecutive expected bcn in true slice to offload to SC */ 25451 uint8 sc_missed_bcn_thr; /* Missed beacons threshold in SC to exit offload */ 25452 int8 sc_offload_rssi_thr; /* Bcn RSSI threshold to exit offload, must be negative */ 25453 uint8 sc_offload_rssi_hyst; /* Hysteresis for the RSSI threshold, 0 - RSSI_HYST_MAX */ 25454 uint8 tim_exit_delay_ms; /* TIM exit delay when DTIM AID=0 is also set */ 25455 uint8 PAD[3]; 25456 } wlc_sta_pm_sc_ofld_cfg_v1_t; 25457 25458 typedef enum wlc_sta_pm_sc_ofld_fail_reason { 25459 STA_PM_SC_OFLD_FAIL_RSSI = (1u << 0u), /* Low rssi */ 25460 STA_PM_SC_OFLD_FAIL_UNSUPPORTED = (1u << 1u), /* Unsupported by WBUS */ 25461 STA_PM_SC_OFLD_FAIL_MISSED_BCN = (1u << 2u), /* missed bcns on true slice */ 25462 STA_PM_SC_OFLD_FAIL_NO_PS = (1u << 3u), /* not in PM */ 25463 STA_PM_SC_OFLD_FAIL_TX_ACTIVE = (1u << 4u), /* Active TX in true slice */ 25464 STA_PM_SC_OFLD_FAIL_CSA = (1u << 5u), /* CSA */ 25465 STA_PM_SC_OFLD_FAIL_MRC = (1u << 6u), /* in MRC */ 25466 STA_PM_SC_OFLD_FAIL_AS_STATE = (1u << 7u), /* Assoc state not IDLE */ 25467 STA_PM_SC_OFLD_FAIL_NO_BASIC_RATESET = (1u << 8u), /* AP bcn has no basic rate */ 25468 STA_PM_SC_OFLD_FAIL_UNSUP_BCN_RATE_RX = (1u << 8u), /* AP bcn at SC unsup rate */ 25469 STA_PM_SC_OFLD_FAIL_DISABLED = (1u << 9u), /* Offload disabled */ 25470 STA_PM_SC_OFLD_FAIL_CAL = (1u << 10u), /* Cal on main/aux core */ 25471 STA_PM_SC_OFLD_FAIL_UNSUP_BCMC_RATE_RX = (1u << 11u), /* unsupported bcmc rate rx */ 25472 STA_PM_SC_OFLD_FAIL_TWT_ACTIVE = (1u << 12u), /* TWT is active */ 25473 STA_PM_SC_OFLD_FAIL_AP_ENAB = (1u << 13u), /* AP cfg is enabled */ 25474 STA_PM_SC_OFLD_FAIL_SLOTTED_BSS_ENAB = (1u << 14u), /* Slotted BSS is enabled */ 25475 STA_PM_SC_OFLD_FAIL_BTMC_ACTIVE = (1u << 15u), /* BT Main Core is active */ 25476 STA_PM_SC_OFLD_FAIL_UNSUP_BASIC_RATE = (1u << 16u) /* SC Unsupported basic rate */ 25477 } wlc_sta_pm_sc_ofld_fail_reason_t; 25478 25479 typedef enum wlc_sta_pm_sc_ofld_exit_reason { 25480 STA_PM_SC_OFLD_EXIT_AS_STATE = 1u, /* Exit due to assoc state not IDLE */ 25481 STA_PM_SC_OFLD_EXIT_BCN_LOSS = 2u, /* Exit due to beacon loss */ 25482 STA_PM_SC_OFLD_EXIT_TIM = 3u, /* Exit due to TIM bit set */ 25483 STA_PM_SC_OFLD_EXIT_PM = 4u, /* Exit due to exit out of PM mode */ 25484 STA_PM_SC_OFLD_EXIT_TX = 5u, /* Exit due to tx on true slice */ 25485 STA_PM_SC_OFLD_EXIT_CSA = 6u, /* Exit due to CSA */ 25486 STA_PM_SC_OFLD_EXIT_LOW_RSSI = 7u, /* Exit due to rssi lower than threshold */ 25487 STA_PM_SC_OFLD_EXIT_MRC = 8u, /* Exit due to MRC being active */ 25488 STA_PM_SC_OFLD_EXIT_BSSCFG_DOWN = 9u, /* Exit due to bsscfg down */ 25489 STA_PM_SC_OFLD_EXIT_WLC_DOWN = 10u, /* Exit due to wlc down */ 25490 STA_PM_SC_OFLD_EXIT_WBUS_REJECT = 11u, /* Exit due to wbus reject */ 25491 STA_PM_SC_OFLD_EXIT_HOST_DISABLE = 12u, /* Exit due to disable by host */ 25492 STA_PM_SC_OFLD_EXIT_CAL_TVPM = 13u, /* Exit due to Cal/TVPM on main/aux core */ 25493 STA_PM_SC_OFLD_EXIT_DISASSOC = 14u, /* Exit due to disassoc */ 25494 STA_PM_SC_OFLD_EXIT_CAC = 15u, /* Exit due to CAC admit */ 25495 STA_PM_SC_OFLD_EXIT_CHN_OVERLAP = 16u, /* Exit due to true slice chan overlap */ 25496 STA_PM_SC_OFLD_EXIT_UNSUP_BCMC_RATE_RX = 17u, /* Exit due to unsupported bcmc rate rx */ 25497 STA_PM_SC_OFLD_EXIT_BCMC_LOSS = 18u, /* Exit due to bcmc pkt loss */ 25498 STA_PM_SC_OFLD_EXIT_TWT = 19u, /* Exit due to TWT active */ 25499 STA_PM_SC_OFLD_EXIT_SLOTTED_BSS = 20u, /* Exit due to Slotted BSS active */ 25500 STA_PM_SC_OFLD_EXIT_AP_BSS = 21u, /* Exit due to AP BSS active */ 25501 STA_PM_SC_OFLD_EXIT_MAX = 255u /* Max, uint8 for now */ 25502 } wlc_sta_pm_sc_ofld_exit_reason_t; 25503 25504 #define STA_PM_SC_OFLD_STATUS_VER_V1 1u 25505 25506 #define STA_PM_SC_OFLD_STATUS_CLEAR (1u << 0u) 25507 #define STA_PM_SC_OFLD_STATUS_OFFLOADED (1u << 1u) 25508 #define STA_PM_SC_OFLD_STATUS_ASSOCIATED (1u << 2u) 25509 25510 typedef struct wlc_sta_pm_sc_status_v1 { 25511 uint16 version; 25512 uint16 len; 25513 uint32 flags; 25514 uint32 sc_offload_enter_cnt; /* Offload enter cnt */ 25515 uint32 sc_offload_exit_cnt; /* Offload exit cnt */ 25516 uint32 sc_offload_wbus_reject_cnt; /* WBUS reject reg cnt */ 25517 uint32 sc_offload_exp_bcn_cnt; /* SC ofld expected bcn cnt */ 25518 uint32 sc_offload_exp_bcn_missed_cnt; /* SC ofld missed bcn cnt */ 25519 uint32 sc_offload_last_exit_reason; /* Previous exit reason */ 25520 uint32 sc_offload_enter_fail_reason; /* SC ofld enter fail reason */ 25521 uint32 sc_offload_total_dur_ms; /* Cumulative duration in offload (ms) */ 25522 uint32 sc_offload_tim_exit_dly_cnt; /* TIM exit delay cnt */ 25523 } wlc_sta_pm_sc_status_v1_t; 25524 25525 #define WL_SDTC_IOV_VERSION 1 25526 #define SDTC_SUB_IOV_VERSION_1 1 25527 #define SDTC_SUB_IOV_VERSION_1_1 1 25528 #define MAX_ATID_CORES 5u 25529 #define SDTC_ID_ALL 0xFFu 25530 25531 /* SDTC IOV ID's */ 25532 enum wl_sdtc_iov_id { 25533 SDTC_ID_INVALID = 0x0, 25534 SDTC_ID_CB = 0x1, 25535 SDTC_ID_PCIE = 0x2, 25536 SDTC_ID_SYSMEM = 0x3, 25537 SDTC_ID_AUXMAC = 0x4, 25538 SDTC_ID_MAINMAC = 0x5 25539 }; 25540 25541 /* SDTC Iovars */ 25542 enum wl_sdtc_cmd_ids { 25543 WL_SDTC_CMD_EN = 0x1, 25544 WL_SDTC_CMD_CONFIG = 0x2, 25545 WL_SDTC_CMD_CORE_ENAB = 0x3, 25546 WL_SDTC_CMD_ETB_INFO = 0x4, 25547 WL_SDTC_CMD_LAST 25548 }; 25549 25550 enum wl_sdtc_xtlv_version { 25551 WL_SDTC_ENABLE_V1 = 0x1 25552 }; 25553 25554 typedef struct sdtc_regs { 25555 uint32 addr; 25556 uint32 val; 25557 } sdtc_regs_t; 25558 25559 typedef struct sdtc_config { 25560 uint16 version; 25561 uint16 len; 25562 25563 uint8 sdtc_id; /* 0xFF indicates, all core id's enable */ 25564 uint8 pad; /* 32 bit alignment */ 25565 uint16 num_of_registers; /* if no of reg is "0",it will use default SDTC config */ 25566 sdtc_regs_t regs[1]; /* Array of register list */ 25567 } sdtc_config_t; 25568 25569 typedef struct sdtc_enab_atid_list { 25570 uint16 version; 25571 uint16 len; 25572 25573 uint32 sdtc_id_bmp; 25574 uint32 sdtc_id_mask; 25575 } sdtc_enab_atid_list_t; 25576 25577 typedef struct etb_addr_info { 25578 uint16 version; 25579 uint16 len; 25580 uint32 etbinfo_addr; /* etb_info address */ 25581 } etb_addr_info_t; 25582 25583 typedef struct etb_info { 25584 uint16 version; 25585 uint16 len; 25586 uint32 read_write_p; /* read write pointer address */ 25587 uint8 etb_full; /* status bit */ 25588 uint8 pad[3]; /* 32bit alignment */ 25589 uint32 addr; /* H/W Address */ 25590 uint32 read_bytes; /* Size of ETB(Embedded Trace Buffer) Memory */ 25591 } etb_info_t; 25592 25593 /* This ROAM RSSI limit value is used in order to prune LOW RSSI candidate 25594 * for Priority roam and Beacon lost 25595 * WLC_E_REASON_DEAUTH, WLC_E_REASON_DISASSOC, WLC_E_REASON_BCNS_LOST 25596 */ 25597 #define WLC_ROAM_RSSI_LMT_VER_1 1 25598 typedef struct wlc_roam_rssi_lmt_info_v1 { 25599 int16 rssi_limit_2g; 25600 int16 rssi_limit_5g; 25601 } wlc_roam_rssi_lmt_info_v1_t; 25602 25603 typedef struct wlc_wlc_roam_rssi_limit { 25604 uint16 ver; 25605 uint16 len; 25606 uint8 data[]; 25607 } wlc_roam_rssi_limit_t; 25608 25609 #define ROAMRSSI_HDRLEN 4u 25610 #define ROAMRSSI_2G_DEFAULT -128 25611 #define ROAMRSSI_2G_MAX -70 25612 #define ROAMRSSI_2G_MIN -128 25613 #define ROAMRSSI_5G_DEFAULT -128 25614 #define ROAMRSSI_5G_MAX -70 25615 #define ROAMRSSI_5G_MIN -128 25616 25617 #define WLC_ROAM_MIN_DELTA_VER_1 1 25618 typedef struct wlc_roam_min_score_delta_info_v1 { 25619 uint32 roam_min_delta_2g; 25620 uint32 roam_min_delta_5g; 25621 } wlc_roam_min_delta_info_v1_t; 25622 25623 typedef struct wlc_roam_min_delta { 25624 uint16 ver; 25625 uint16 len; 25626 uint8 data[]; 25627 } wlc_roam_min_delta_t; 25628 25629 #define ROAM_MIN_DELTA_HDRLEN 4u 25630 #define ROAM_MIN_DELTA_DEFAULT 0u 25631 /* MAX score is (RSSI Factor MAX * RSSI weight) + (CU factor MAX * CU weight) 25632 * 10000 = (100 * 65) + (100 * 35) 25633 */ 25634 #define ROAM_MIN_DELTA_MAX 10000u 25635 25636 /* Beacon mute mitigation specific Macros */ 25637 25638 /* Macro flags to identify the specific config commands in IOVAR set operation */ 25639 #define WLC_BCN_MUTE_MITI_CFG_CMD_ENABLE (1u << 0u) 25640 #define WLC_BCN_MUTE_MITI_CFG_CMD_PM0_PERIOD (1u << 1u) 25641 #define WLC_BCN_MUTE_MITI_CFG_CMD_MAX_MITI_TIMEOUT (1u << 2u) 25642 #define WLC_BCN_MUTE_MITI_CFG_CMD_MASK (WLC_BCN_MUTE_MITI_CFG_CMD_ENABLE |\ 25643 WLC_BCN_MUTE_MITI_CFG_CMD_PM0_PERIOD |\ 25644 WLC_BCN_MUTE_MITI_CFG_CMD_MAX_MITI_TIMEOUT) 25645 25646 /* Configurable PM0 period range in sec */ 25647 #define WLC_BCN_MUTE_MITI_CFG_PM0_PERIOD_MIN (0u) /* Minimum PM0 periodicity */ 25648 #define WLC_BCN_MUTE_MITI_CFG_PM0_PERIOD_DEFAULT (1u) /* Default PM0 periodicity */ 25649 #define WLC_BCN_MUTE_MITI_CFG_PM0_PERIOD_MAX (10u) /* Maximum PM0 priodicity */ 25650 25651 /* Configurable mitigation Timeout range */ 25652 #define WLC_BCN_MUTE_MITI_CFG_TIMEOUT_MIN (30u) /* Minimum Timeout in sec */ 25653 #define WLC_BCN_MUTE_MITI_CFG_TIMEOUT_DEFAULT (60u) /* Default Timeout in sec */ 25654 #define WLC_BCN_MUTE_MITI_CFG_TIMEOUT_MAX (120u) /* Maximum Timeout in sec */ 25655 25656 #define WLC_BCN_MUTE_MITI_CMD_VER_1 1u /* Version number for wlc_bcn_mute_miti_cfg_v1 struct */ 25657 typedef struct wlc_bcn_mute_miti_cfg_v1 { 25658 uint16 version; /* Structure version */ 25659 uint16 length; /* Length of whole struct */ 25660 uint32 cmd_flags; /* Flag bits to Identify configuring command */ 25661 uint8 is_enabled; /* Feature is enabled or not */ 25662 uint8 pm0_periodicity; /* Interval between consecutive PM0 during mitigation 25663 * period (in sec) 25664 */ 25665 uint16 max_miti_timeout; /* Maximum mitigation timeout in sec to send 25666 * Mitigation Timeout event. 25667 */ 25668 } wlc_bcn_mute_miti_cfg_v1_t; 25669 25670 #define WLC_BCN_TBTT_CMD_VER_1 (1u) /* Ver num for wlc_bcn_tbtt_cfg struct */ 25671 /* Configurable mitigation Timeout range */ 25672 #define WLC_BCN_TBTT_CFG_EVENT_PERIOD (3u) /* Send event after this value of drift */ 25673 #define WLC_BCN_TBTT_CFG_DRIFT_THRESH (3) /* in ms */ 25674 #define WLC_BCN_TBTT_CFG_JITTER_THRESH (1) /* in ms */ 25675 25676 /* Macro flags to identify the specific config commands in IOVAR set operation */ 25677 #define WLC_BCN_DRIFT_BCN_OFFSET (1u << 0u) 25678 #define WLC_BCN_DRIFT_EVENT_PERIOD (1u << 1u) 25679 #define WLC_BCN_DRIFT_DRIFT_THRESHOLD (1u << 2u) 25680 #define WLC_BCN_DRIFT_JITTER_THRESHOLD (1u << 3u) 25681 25682 /* configurable range */ 25683 #define WLC_BCN_DRIFT_BCN_OFFSET_MAX (15u) 25684 #define WLC_BCN_DRIFT_BCN_OFFSET_MIN (5u) 25685 25686 #define WLC_BCN_DRIFT_DRIFT_THRESHOLD_MAX (10) 25687 #define WLC_BCN_DRIFT_DRIFT_THRESHOLD_MIN (-4) 25688 25689 #define WLC_BCN_DRIFT_JITTER_THRESHOLD_MAX (2) 25690 #define WLC_BCN_DRIFT_JITTER_THRESHOLD_MIN (-2) 25691 25692 typedef struct wlc_bcn_tbtt_cfg_v1 { 25693 uint16 version; /* Structure version */ 25694 uint16 length; /* Length of whole struct */ 25695 uint32 cmd; /* type of cmd */ 25696 uint8 tbtt_bcn_off; /* num btw (5-15u) for uatbtt */ 25697 uint8 event_period; /* continous / periodic event */ 25698 int8 drift_thres; /* drift threshold for event in ms */ 25699 int8 jitter_thres; /* jitter threshold for event in ms */ 25700 } wlc_bcn_tbtt_cfg_v1_t; 25701 25702 /* SC scan retry config params */ 25703 #define SC_SCAN_RETRY_CFG_VERSION_1 1u 25704 #define SC_SCAN_RETRY_CFG_VERSION_2 2u 25705 25706 /* Bits indicating which are the valid params in the set command. */ 25707 #define SC_SCAN_RETRY_CFG_PARAMS_THRESHOLD (1u << 0u) 25708 #define SC_SCAN_RETRY_CFG_PARAMS_MODE (1u << 1u) 25709 #define SC_SCAN_RETRY_CFG_PARAMS_BTMCRX_WEIGHT (1u << 2u) 25710 25711 #ifndef SC_SCAN_RETRY_CFG_HAS_ALIAS 25712 #define SC_SCAN_RETRY_CFG_VERSION SC_SCAN_RETRY_CFG_VERSION_1 25713 #endif 25714 25715 /* Input structure for sc_scan_retry_cfg IOVAR */ 25716 typedef struct sc_scan_retry_cfg_params_v1 { 25717 uint16 version; /* config version. */ 25718 uint16 len; /* Length of this struct. */ 25719 uint32 set_flag; /* Flag bits to Identify valid param type to be set */ 25720 uint8 threshold; /* Amount of Tx-Blanking in percentage considered as failed scan. */ 25721 uint8 scan_mode; /* Scan mode in which scan need to be re-scheduled. */ 25722 uint8 PAD[2]; /* 32bit alignment */ 25723 } sc_scan_retry_cfg_params_v1_t; 25724 25725 /* Input structure for sc_scan_retry_cfg v2 IOVAR */ 25726 typedef struct sc_scan_retry_cfg_params_v2 { 25727 uint16 version; /* config version. */ 25728 uint16 len; /* Length of this struct. */ 25729 uint32 set_flag; /* Flag bits to Identify valid param type to 25730 * be set. 25731 */ 25732 uint8 threshold; /* Amount of Tx-Blanking + the weighted 25733 * BTMC Rx overlap. 25734 * in percentage considered as failed scan. 25735 */ 25736 uint8 scan_mode; /* Scan mode in which scan need to be 25737 *re-scheduled.. 25738 */ 25739 uint8 btmc_rx_overlap_weightage; /* weightage for btmc_rx_overlap duration in % */ 25740 uint8 PAD; /* 32bit alignment */ 25741 } sc_scan_retry_cfg_params_v2_t; 25742 25743 /* host queries RNG version from 'wl cap' iovar */ 25744 #define BCM_RNG_VERSION_1 1u /* for initial "reseed" version */ 25745 /* Supported entropy size, bytes */ 25746 #define BCM_RNG_ENTROPY_SIZE_BYTES 64u 25747 25748 /* RNG top level command IDs */ 25749 typedef enum wl_rng_cmd_id { 25750 WL_RNG_CMD_RESEED = 0u, 25751 WL_RNG_CMD_LAST = 1u 25752 } wl_rng_cmd_id_t; 25753 25754 /* RNG reseed host entropy */ 25755 typedef struct bcm_rng_reseed { 25756 uint16 entropy_size; /* host entropy size, bytes */ 25757 uint8 entropy[]; /* host entropy, flexible array */ 25758 } bcm_rng_reseed_t; 25759 25760 /* RNG IOVAR data */ 25761 typedef struct wl_rng_iovar { 25762 uint16 version; /* Version of this structure */ 25763 uint16 subcmd_id; /* RNG subcmd ID */ 25764 uint16 pad; /* padding for 32-bit struct alignment */ 25765 uint16 length; /* Length of data following this length field */ 25766 union { 25767 bcm_rng_reseed_t reseed; /* RNG reseed data */ 25768 } u; 25769 } wl_rng_iovar_t; 25770 25771 #ifdef RC2CX 25772 #define RC2CX_STATUS_VER_1 1 25773 /* RC2 coex status structures */ 25774 typedef struct wlc_rc2cx_stats_v1 { 25775 uint16 version; /* version info */ 25776 uint8 len; /* status length */ 25777 uint8 mode; /* RC2 coex mode */ 25778 uint16 rc2_req_cnt; /* RC2 req number since last read. */ 25779 uint16 rc2_grant_cnt; /* RC2 grant count since last read. */ 25780 uint32 rc2_dur; /* RC2 duration since last read, us. */ 25781 uint16 rc2_succ_pm_prot_cnt; /* RC2 number of successfully acked PM. */ 25782 uint16 rc2_succ_cts_prot_cnt; /* RC2 number of successfully TXed CTS2A. */ 25783 uint16 rc2_grant_delay_cnt; /* RC2 grant delay counter, delay > 4.5ms. */ 25784 uint16 rc2_crit_phycal_cnt; /* RC2 WLAN/BT critical: PHY cal. counter. */ 25785 uint16 rc2_crit_rate_cnt; /* RC2 WLAN/BT critical: rate recovery counter. */ 25786 uint16 rc2_crit_bcnloss_cnt; /* RC2 WLAN/BT critical: beacon loss counter. */ 25787 uint16 rc2_crit_hpp_cnt; /* RC2 WLAN/BT critical: HPP counter. */ 25788 uint16 rc2_crit_bt_cnt; /* RC2 WLAN/BT critical: BT counter. */ 25789 uint16 rc2_crit_slotbss_cnt; /* RC2 WLAN/BT critical: AWDL/NAN counter. */ 25790 uint16 rsvd; 25791 uint32 rc2_crit_cnt; /* RC2 WLAN/BT critical counter, aggregate. */ 25792 } wlc_rc2cx_stats_v1_t; 25793 25794 /* Definitions for RC2 coex iovar */ 25795 #define WL_RC2CX_VERSION 1 25796 25797 /* RC2 coex IOV sub command IDs */ 25798 typedef enum rc2cx_cmd_id { 25799 WL_RC2CX_CMD_VER = 0, /* RC2CX version sub command */ 25800 WL_RC2CX_CMD_MODE = 1, /* RC2CX Mode sub command */ 25801 WL_RC2CX_CMD_PM_PROT = 2, /* RC2CX PM Protection sub command */ 25802 WL_RC2CX_CMD_PER_CTS = 3 /* RC2CX Periodic CTS sub command */ 25803 } rc2cx_cmd_id_t; 25804 25805 /* first byte of bcm_iov_batch_subcmd.data for the WL_RC2CX_CMD_MODE command */ 25806 #define RC2CX_MODE_TDD 0x01u 25807 #define RC2CX_MODE_DISABLED 0x00u 25808 25809 /* first byte of bcm_iov_batch_subcmd.data for the WL_RC2CX_CMD_PM_PROT command */ 25810 #define RC2CX_PM_PROT_ENABLED 0x01u 25811 #define RC2CX_PM_PROT_DISABLED 0x00u 25812 25813 /* first byte of bcm_iov_batch_subcmd.data for the WL_RC2CX_CMD_PER_CTS command */ 25814 #define RC2CX_PER_CTS_ENABLED 0x01u 25815 #define RC2CX_PER_CTS_DISABLED 0x00u 25816 25817 #define RC2CX_PER_CTS_DENY_BT 0x02u 25818 #define RC2CX_PER_CTS_GRANT_BT 0x01u 25819 25820 /* payload for the WL_RC2CX_CMD_PER_CTS command */ 25821 typedef struct rc2cx_per_cts_config { 25822 uint8 enable_flag; /* 0: feature disabled; 25823 * 1: grant BT when granting RC2; 25824 * 2: deny BT when granting RC2 25825 */ 25826 uint8 duration_val; /* Must be valid with enable command */ 25827 uint8 interval_val; /* Must be valid with enable command */ 25828 uint8 pad; 25829 } rc2cx_per_cts_config_t; 25830 25831 #endif /* RC2CX */ 25832 25833 enum phy_rxgcrs_ed_enhncd_cmd_id { 25834 PHY_RXGCRS_ED_ENHNCD_CMD_EN = 1u, 25835 PHY_RXGCRS_ED_ENHNCD_CMD_STATUS = 2u, 25836 PHY_RXGCRS_ED_ENHNCD_CMD_COREMASK = 3u, 25837 PHY_RXGCRS_ED_ENHNCD_CMD_LAST 25838 }; 25839 25840 /* SAE command 25841 * Only IOV batching support - see bcmiov.h 25842 */ 25843 25844 /* SAE command version */ 25845 #define WL_SAE_CMD_VERSION 1 25846 25847 /* SAE sub-commands */ 25848 typedef enum sae_cmd_id { 25849 WL_SAE_CMD_AP_SESSION_HOLD_TIME = 1, /* AP rate limit session hold time 25850 * Data: uint32, 25851 * miliseconds 25852 */ 25853 WL_SAE_CMD_AP_MAX_ACTIVE_SESSIONS = 2, /* AP max sessions 25854 * Data: 25855 * uint32 25856 */ 25857 } sae_cmd_id_t; 25858 25859 /* Frameburst COT IOVAR data */ 25860 #define WL_FRAMEBURST_COT_VERSION 1u /* current version of frameburst_cot structure */ 25861 #define WL_FRAMEBURST_MAX_AC 4u 25862 typedef struct frameburst_cot { 25863 uint16 version; /* version of frameburst_cot_t structure */ 25864 uint16 length; 25865 chanspec_t chspec; 25866 uint16 pad; /* padding */ 25867 uint16 fbcot[WL_FRAMEBURST_MAX_AC]; /* per AC (BK, BE, VI, and VO) in us units */ 25868 } frameburst_cot_t; 25869 25870 typedef enum { 25871 BCM_TRACE_VER = 1, 25872 BCM_TRACE_ENAB = 2, 25873 BCM_TRACE_EVENT_ENAB = 3 25874 } bcm_trace_sub_cmds_t; 25875 25876 /* Trace events 25877 * Max trace event allowed = 255 25878 */ 25879 enum { 25880 BCM_TRACE_E_INVALID = 0, 25881 BCM_TRACE_E_WBUS = 1, 25882 BCM_TRACE_E_MSCH = 2, 25883 BCM_TRACE_E_SC = 3, 25884 BCM_TRACE_E_SCAN = 4, 25885 BCM_TRACE_E_LAST 25886 }; 25887 25888 #define BCM_TRACE_VERSION_1 1u 25889 25890 typedef struct bcm_trace_event_enab_v1 { 25891 uint8 version; 25892 uint8 event; 25893 uint8 enab; 25894 uint8 pad[1]; 25895 } bcm_trace_event_enab_v1_t; 25896 25897 /* rate_info command version */ 25898 #define WL_RATE_INFO_VERSION 1 25899 typedef struct wl_rate_info { 25900 uint16 version; /**< structure version */ 25901 uint16 length; /**< length of this struct */ 25902 uint32 mode_tx_rate; /**< the most used tx rate in tx_rate_histo */ 25903 uint32 mode_rx_rate; /**< the most used rx rate in rx_rate_histo */ 25904 } wl_rate_info_t; 25905 25906 /* "rng_test" IOVAR param */ 25907 typedef struct { 25908 uint32 rounds_no; /* IN number of generate cycles */ 25909 uint32 gen_no; /* IN number of buffers per cycle */ 25910 uint32 time_max; /* OUT max time of one cycle, us */ 25911 uint32 time_min; /* OUT min time of one cycle, us */ 25912 uint32 time_aver; /* OUT time of all cycles, us */ 25913 } rng_test_t; 25914 25915 /* latency_critical_data mode to reduce a latency */ 25916 typedef enum { 25917 LATENCY_CRT_DATA_MODE_OFF = 0, /* Turn off */ 25918 LATENCY_CRT_DATA_MODE_1 = 1u, /* Remap BLE scan window size */ 25919 LATENCY_CRT_DATA_MODE_2 = 2u, /* Remap BLE scan window size + 25920 * Prevent full roam scan 25921 */ 25922 LATENCY_CRT_DATA_MODE_LAST 25923 } latency_crt_mode_t; 25924 25925 typedef struct wl_ext_auth_evt { 25926 wlc_ssid_t ssid; 25927 struct ether_addr bssid; 25928 unsigned int key_mgmt_suite; 25929 int status; 25930 } wl_ext_auth_evt_t; 25931 25932 #define WL_AUTH_START_EVT_V1 1u 25933 typedef struct wl_auth_start_evt { 25934 uint16 version; 25935 uint16 len; 25936 wlc_ssid_t ssid; 25937 struct ether_addr bssid; 25938 uint8 PAD[2]; 25939 uint32 key_mgmt_suite; 25940 uint8 opt_tlvs[]; 25941 } wl_auth_start_evt_t; 25942 #endif /* _wlioctl_h_ */ 25943