1 /* 2 * Copyright 2020 Rockchip Electronics Co. LTD 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #ifndef __VPU_API_MLVEC_H__ 18 #define __VPU_API_MLVEC_H__ 19 20 #include "rk_mpi.h" 21 22 #define MLVEC_MAGIC 'M' 23 #define MLVEC_VERSION '0' 24 25 #define VPU_API_ENC_MAX_TID_UPDATED (0x00000001) 26 #define VPU_API_ENC_MARK_LTR_UPDATED (0x00000002) 27 #define VPU_API_ENC_USE_LTR_UPDATED (0x00000004) 28 #define VPU_API_ENC_FRAME_QP_UPDATED (0x00000008) 29 #define VPU_API_ENC_BASE_PID_UPDATED (0x00000010) 30 31 typedef struct VpuApiMlvecStaticCfg_t { 32 RK_S16 width; 33 RK_S16 sar_width; 34 RK_S16 height; 35 RK_S16 sar_height; 36 RK_S32 rc_mode; /* 0 - CQP mode; 1 - CBR mode; */ 37 RK_S32 bitRate; /* target bitrate */ 38 RK_S32 framerate; 39 RK_S32 qp; 40 RK_S32 enableCabac; 41 RK_S32 cabacInitIdc; 42 RK_S32 format; 43 RK_S32 intraPicRate; 44 RK_S32 framerateout; 45 RK_S32 profileIdc; 46 RK_S32 levelIdc; 47 48 RK_S32 magic; /* MLVEC magic word */ 49 /* static configure */ 50 RK_S32 max_tid : 8; /* max temporal layer id */ 51 RK_S32 ltr_frames : 8; /* max long-term reference frame count */ 52 RK_S32 hdr_on_idr : 8; /* sps/pps header with IDR frame */ 53 RK_S32 add_prefix : 8; /* add prefix before each frame */ 54 RK_S32 slice_mbs : 16; /* macroblock row count for each slice */ 55 RK_S32 reserved : 16; 56 } VpuApiMlvecStaticCfg; 57 58 typedef struct VpuApiMlvecDynamicCfg_t { 59 /* dynamic configure */ 60 RK_U32 updated; 61 RK_S32 max_tid; 62 RK_S32 mark_ltr; 63 RK_S32 use_ltr; 64 RK_S32 frame_qp; 65 RK_S32 base_layer_pid; 66 } VpuApiMlvecDynamicCfg; 67 68 typedef void* VpuApiMlvec; 69 70 #ifdef __cplusplus 71 extern "C" { 72 #endif 73 74 MPP_RET vpu_api_mlvec_init(VpuApiMlvec *ctx); 75 MPP_RET vpu_api_mlvec_deinit(VpuApiMlvec ctx); 76 77 /* setup basic mpp info in vpu_api */ 78 MPP_RET vpu_api_mlvec_setup(VpuApiMlvec ctx, MppCtx mpp, MppApi *mpi, MppEncCfg enc_cfg); 79 /* check the input encoder parameter is mlvec configure or not */ 80 MPP_RET vpu_api_mlvec_check_cfg(void *p); 81 82 /* setup mlvec static configure */ 83 MPP_RET vpu_api_mlvec_set_st_cfg(VpuApiMlvec ctx, VpuApiMlvecStaticCfg *cfg); 84 /* setup mlvec dynamic configure and setup MppMeta in MppFrame */ 85 MPP_RET vpu_api_mlvec_set_dy_cfg(VpuApiMlvec ctx, VpuApiMlvecDynamicCfg *cfg, MppMeta meta); 86 /* setup mlvec max temporal layer count dynamic configure */ 87 MPP_RET vpu_api_mlvec_set_dy_max_tid(VpuApiMlvec ctx, RK_S32 max_tid); 88 89 #ifdef __cplusplus 90 } 91 #endif 92 93 #endif /* __VPU_API_MLVEC_H__ */ 94