| /utopia/UTPA2-700.0.x/modules/sc/hal/maserati/sc/ |
| H A D | regSC.h | 129 #define UART1_WRITE(addr, val) WRITE_BYTE(RIU_BUS_BASE + ((REG_SC_BASE1 + ((addr) << 1)) << 1)… macro
135 #define UART1_WRITE(addr, val) WRITE_BYTE((REG_SC_BASE1 + ((addr) << 2)), (val)) macro
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| /utopia/UTPA2-700.0.x/modules/sc/hal/M7621/sc/ |
| H A D | regSC.h | 129 #define UART1_WRITE(addr, val) WRITE_BYTE(RIU_BUS_BASE + ((REG_SC_BASE1 + ((addr) << 1)) << 1)… macro
135 #define UART1_WRITE(addr, val) WRITE_BYTE((REG_SC_BASE1 + ((addr) << 2)), (val)) macro
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| /utopia/UTPA2-700.0.x/modules/sc/hal/maldives/sc/ |
| H A D | regSC.h | 129 #define UART1_WRITE(addr, val) WRITE_BYTE(RIU_BUS_BASE + ((REG_SC_BASE1 + ((addr) << 1… macro
135 #define UART1_WRITE(addr, val) WRITE_BYTE((REG_SC_BASE1 + ((addr) << 2)), (val)) macro
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| /utopia/UTPA2-700.0.x/modules/sc/hal/mainz/sc/ |
| H A D | regSC.h | 129 #define UART1_WRITE(addr, val) WRITE_BYTE(RIU_BUS_BASE + ((REG_SC_BASE1 + ((addr) << 1)) << 1)… macro
135 #define UART1_WRITE(addr, val) WRITE_BYTE((REG_SC_BASE1 + ((addr) << 2)), (val)) macro
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| /utopia/UTPA2-700.0.x/modules/sc/hal/mustang/sc/ |
| H A D | regSC.h | 129 #define UART1_WRITE(addr, val) WRITE_BYTE(RIU_BUS_BASE + ((REG_SC_BASE1 + ((addr) << 1… macro
135 #define UART1_WRITE(addr, val) WRITE_BYTE((REG_SC_BASE1 + ((addr) << 2)), (val)) macro
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| /utopia/UTPA2-700.0.x/modules/sc/hal/messi/sc/ |
| H A D | regSC.h | 129 #define UART1_WRITE(addr, val) WRITE_BYTE(RIU_BUS_BASE + ((REG_SC_BASE1 + ((addr) << 1)) << 1)… macro
135 #define UART1_WRITE(addr, val) WRITE_BYTE((REG_SC_BASE1 + ((addr) << 2)), (val)) macro
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| /utopia/UTPA2-700.0.x/modules/sc/hal/manhattan/sc/ |
| H A D | regSC.h | 129 #define UART1_WRITE(addr, val) WRITE_BYTE(RIU_BUS_BASE + ((REG_SC_BASE1 + ((addr) << 1)) << 1)… macro
135 #define UART1_WRITE(addr, val) WRITE_BYTE((REG_SC_BASE1 + ((addr) << 2)), (val)) macro
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| /utopia/UTPA2-700.0.x/modules/sc/hal/macan/sc/ |
| H A D | regSC.h | 129 #define UART1_WRITE(addr, val) WRITE_BYTE(RIU_BUS_BASE + ((REG_SC_BASE1 + ((addr) << 1)) << 1)… macro
135 #define UART1_WRITE(addr, val) WRITE_BYTE((REG_SC_BASE1 + ((addr) << 2)), (val)) macro
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| /utopia/UTPA2-700.0.x/modules/sc/hal/M7821/sc/ |
| H A D | regSC.h | 129 #define UART1_WRITE(addr, val) WRITE_BYTE(RIU_BUS_BASE + ((REG_SC_BASE1 + ((addr) << 1)) << 1)… macro
135 #define UART1_WRITE(addr, val) WRITE_BYTE((REG_SC_BASE1 + ((addr) << 2)), (val)) macro
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| /utopia/UTPA2-700.0.x/modules/sc/hal/maxim/sc/ |
| H A D | regSC.h | 129 #define UART1_WRITE(addr, val) WRITE_BYTE(RIU_BUS_BASE + ((REG_SC_BASE1 + ((addr) << 1)) << 1)… macro
135 #define UART1_WRITE(addr, val) WRITE_BYTE((REG_SC_BASE1 + ((addr) << 2)), (val)) macro
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| /utopia/UTPA2-700.0.x/modules/sc/hal/curry/sc/ |
| H A D | regSC.h | 130 #define UART1_WRITE(addr, val) WRITE_BYTE(RIU_BUS_BASE + ((REG_SC_BASE1 + ((addr) << 1… macro
136 #define UART1_WRITE(addr, val) WRITE_BYTE((REG_SC_BASE1 + ((addr) << 2)), (val)) macro
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| /utopia/UTPA2-700.0.x/modules/sc/hal/kano/sc/ |
| H A D | regSC.h | 130 #define UART1_WRITE(addr, val) WRITE_BYTE(RIU_BUS_BASE + ((REG_SC_BASE1 + ((addr) << 1… macro
136 #define UART1_WRITE(addr, val) WRITE_BYTE((REG_SC_BASE1 + ((addr) << 2)), (val)) macro
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| /utopia/UTPA2-700.0.x/modules/sc/hal/k6lite/sc/ |
| H A D | regSC.h | 130 #define UART1_WRITE(addr, val) WRITE_BYTE(RIU_BUS_BASE + ((REG_SC_BASE1 + ((addr) << 1… macro
136 #define UART1_WRITE(addr, val) WRITE_BYTE((REG_SC_BASE1 + ((addr) << 2)), (val)) macro
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| /utopia/UTPA2-700.0.x/modules/sc/hal/k6/sc/ |
| H A D | regSC.h | 130 #define UART1_WRITE(addr, val) WRITE_BYTE(RIU_BUS_BASE + ((REG_SC_BASE1 + ((addr) << 1… macro
136 #define UART1_WRITE(addr, val) WRITE_BYTE((REG_SC_BASE1 + ((addr) << 2)), (val)) macro
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